iha.c revision 1.16
1 /* $NetBSD: iha.c,v 1.16 2002/03/15 12:57:21 tsutsui Exp $ */ 2 /* 3 * Initio INI-9xxxU/UW SCSI Device Driver 4 * 5 * Copyright (c) 2000 Ken Westerback 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer, 13 * without modification, immediately at the beginning of the file. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 26 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 *------------------------------------------------------------------------- 30 * 31 * Ported from i91u.c, provided by Initio Corporation, which credits: 32 * 33 * Device driver for the INI-9XXXU/UW or INIC-940/950 PCI SCSI Controller. 34 * 35 * FreeBSD 36 * 37 * Written for 386bsd and FreeBSD by 38 * Winston Hung <winstonh (at) initio.com> 39 * 40 * Copyright (c) 1997-99 Initio Corp. All rights reserved. 41 * 42 *------------------------------------------------------------------------- 43 */ 44 45 /* 46 * Ported to NetBSD by Izumi Tsutsui <tsutsui (at) ceres.dti.ne.jp> from OpenBSD: 47 * $OpenBSD: iha.c,v 1.3 2001/02/20 00:47:33 krw Exp $ 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: iha.c,v 1.16 2002/03/15 12:57:21 tsutsui Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/kernel.h> 56 #include <sys/buf.h> 57 #include <sys/device.h> 58 #include <sys/malloc.h> 59 60 #include <uvm/uvm_extern.h> 61 62 #include <machine/bus.h> 63 #include <machine/intr.h> 64 65 #include <dev/scsipi/scsi_all.h> 66 #include <dev/scsipi/scsipi_all.h> 67 #include <dev/scsipi/scsiconf.h> 68 #include <dev/scsipi/scsi_message.h> 69 70 #include <dev/ic/ihareg.h> 71 #include <dev/ic/ihavar.h> 72 73 /* 74 * SCSI Rate Table, indexed by FLAG_SCSI_RATE field of 75 * tcs flags. 76 */ 77 static const u_int8_t iha_rate_tbl[] = { 78 /* fast 20 */ 79 /* nanosecond divide by 4 */ 80 12, /* 50ns, 20M */ 81 18, /* 75ns, 13.3M */ 82 25, /* 100ns, 10M */ 83 31, /* 125ns, 8M */ 84 37, /* 150ns, 6.6M */ 85 43, /* 175ns, 5.7M */ 86 50, /* 200ns, 5M */ 87 62 /* 250ns, 4M */ 88 }; 89 #define IHA_MAX_PERIOD 62 90 91 #ifdef notused 92 static u_int16_t eeprom_default[EEPROM_SIZE] = { 93 /* -- Header ------------------------------------ */ 94 /* signature */ 95 EEP_SIGNATURE, 96 /* size, revision */ 97 EEP_WORD(EEPROM_SIZE * 2, 0x01), 98 /* -- Host Adapter Structure -------------------- */ 99 /* model */ 100 0x0095, 101 /* model info, number of channel */ 102 EEP_WORD(0x00, 1), 103 /* BIOS config */ 104 EEP_BIOSCFG_DEFAULT, 105 /* host adapter config */ 106 0, 107 108 /* -- eeprom_adapter[0] ------------------------------- */ 109 /* ID, adapter config 1 */ 110 EEP_WORD(7, CFG_DEFAULT), 111 /* adapter config 2, number of targets */ 112 EEP_WORD(0x00, 8), 113 /* target flags */ 114 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 115 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 116 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 117 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 118 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 119 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 120 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 121 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 122 123 /* -- eeprom_adapter[1] ------------------------------- */ 124 /* ID, adapter config 1 */ 125 EEP_WORD(7, CFG_DEFAULT), 126 /* adapter config 2, number of targets */ 127 EEP_WORD(0x00, 8), 128 /* target flags */ 129 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 130 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 131 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 132 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 133 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 134 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 135 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 136 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 137 /* reserved[5] */ 138 0, 0, 0, 0, 0, 139 /* checksum */ 140 0 141 }; 142 #endif 143 144 static void iha_append_free_scb(struct iha_softc *, struct iha_scb *); 145 static void iha_append_done_scb(struct iha_softc *, struct iha_scb *, u_int8_t); 146 static __inline struct iha_scb *iha_pop_done_scb(struct iha_softc *); 147 148 static struct iha_scb *iha_find_pend_scb(struct iha_softc *); 149 static __inline void iha_append_pend_scb(struct iha_softc *, struct iha_scb *); 150 static __inline void iha_push_pend_scb(struct iha_softc *, struct iha_scb *); 151 static __inline void iha_del_pend_scb(struct iha_softc *, struct iha_scb *); 152 static __inline void iha_mark_busy_scb(struct iha_scb *); 153 154 static __inline void iha_set_ssig(struct iha_softc *, u_int8_t, u_int8_t); 155 156 static int iha_alloc_sglist(struct iha_softc *); 157 158 static void iha_scsipi_request(struct scsipi_channel *, scsipi_adapter_req_t, 159 void *); 160 static void iha_update_xfer_mode(struct iha_softc *, int); 161 162 static void iha_reset_scsi_bus(struct iha_softc *); 163 static void iha_reset_chip(struct iha_softc *); 164 static void iha_reset_dma(struct iha_softc *); 165 static void iha_reset_tcs(struct tcs *, u_int8_t); 166 167 static void iha_main(struct iha_softc *); 168 static void iha_scsi(struct iha_softc *); 169 static void iha_select(struct iha_softc *, struct iha_scb *, u_int8_t); 170 static int iha_wait(struct iha_softc *, u_int8_t); 171 172 static void iha_exec_scb(struct iha_softc *, struct iha_scb *); 173 static void iha_done_scb(struct iha_softc *, struct iha_scb *); 174 static int iha_push_sense_request(struct iha_softc *, struct iha_scb *); 175 176 static void iha_timeout(void *); 177 static void iha_abort_xs(struct iha_softc *, struct scsipi_xfer *, u_int8_t); 178 static u_int8_t iha_data_over_run(struct iha_scb *); 179 180 static int iha_next_state(struct iha_softc *); 181 static int iha_state_1(struct iha_softc *); 182 static int iha_state_2(struct iha_softc *); 183 static int iha_state_3(struct iha_softc *); 184 static int iha_state_4(struct iha_softc *); 185 static int iha_state_5(struct iha_softc *); 186 static int iha_state_6(struct iha_softc *); 187 static int iha_state_8(struct iha_softc *); 188 189 static int iha_xfer_data(struct iha_softc *, struct iha_scb *, int); 190 static int iha_xpad_in(struct iha_softc *); 191 static int iha_xpad_out(struct iha_softc *); 192 193 static int iha_status_msg(struct iha_softc *); 194 static void iha_busfree(struct iha_softc *); 195 static int iha_resel(struct iha_softc *); 196 197 static int iha_msgin(struct iha_softc *); 198 static int iha_msgin_extended(struct iha_softc *); 199 static int iha_msgin_sdtr(struct iha_softc *); 200 static int iha_msgin_ignore_wid_resid(struct iha_softc *); 201 202 static int iha_msgout(struct iha_softc *, u_int8_t); 203 static void iha_msgout_abort(struct iha_softc *, u_int8_t); 204 static int iha_msgout_reject(struct iha_softc *); 205 static int iha_msgout_extended(struct iha_softc *); 206 static int iha_msgout_wdtr(struct iha_softc *); 207 static int iha_msgout_sdtr(struct iha_softc *); 208 209 static void iha_wide_done(struct iha_softc *); 210 static void iha_sync_done(struct iha_softc *); 211 212 static void iha_bad_seq(struct iha_softc *); 213 214 static void iha_read_eeprom(struct iha_softc *, struct iha_eeprom *); 215 static int iha_se2_rd_all(struct iha_softc *, u_int16_t *); 216 static void iha_se2_instr(struct iha_softc *, int); 217 static u_int16_t iha_se2_rd(struct iha_softc *, int); 218 #ifdef notused 219 static void iha_se2_update_all(struct iha_softc *); 220 static void iha_se2_wr(struct iha_softc *, int, u_int16_t); 221 #endif 222 223 /* 224 * iha_append_free_scb - append the supplied SCB to the tail of the 225 * sc_freescb queue after clearing and resetting 226 * everything possible. 227 */ 228 static void 229 iha_append_free_scb(sc, scb) 230 struct iha_softc *sc; 231 struct iha_scb *scb; 232 { 233 int s; 234 235 s = splbio(); 236 237 if (scb == sc->sc_actscb) 238 sc->sc_actscb = NULL; 239 240 scb->status = STATUS_QUEUED; 241 scb->ha_stat = HOST_OK; 242 scb->ta_stat = SCSI_OK; 243 244 scb->nextstat = 0; 245 scb->scb_tagmsg = 0; 246 247 scb->xs = NULL; 248 scb->tcs = NULL; 249 250 /* 251 * scb_tagid, sg_addr, sglist 252 * SCB_SensePtr are set at initialization 253 * and never change 254 */ 255 256 TAILQ_INSERT_TAIL(&sc->sc_freescb, scb, chain); 257 258 splx(s); 259 } 260 261 static void 262 iha_append_done_scb(sc, scb, hastat) 263 struct iha_softc *sc; 264 struct iha_scb *scb; 265 u_int8_t hastat; 266 { 267 struct tcs *tcs; 268 int s; 269 270 s = splbio(); 271 272 if (scb->xs != NULL) 273 callout_stop(&scb->xs->xs_callout); 274 275 if (scb == sc->sc_actscb) 276 sc->sc_actscb = NULL; 277 278 tcs = scb->tcs; 279 280 if (scb->scb_tagmsg != 0) { 281 if (tcs->tagcnt) 282 tcs->tagcnt--; 283 } else if (tcs->ntagscb == scb) 284 tcs->ntagscb = NULL; 285 286 scb->status = STATUS_QUEUED; 287 scb->ha_stat = hastat; 288 289 TAILQ_INSERT_TAIL(&sc->sc_donescb, scb, chain); 290 291 splx(s); 292 } 293 294 static __inline struct iha_scb * 295 iha_pop_done_scb(sc) 296 struct iha_softc *sc; 297 { 298 struct iha_scb *scb; 299 int s; 300 301 s = splbio(); 302 303 scb = TAILQ_FIRST(&sc->sc_donescb); 304 305 if (scb != NULL) { 306 scb->status = STATUS_RENT; 307 TAILQ_REMOVE(&sc->sc_donescb, scb, chain); 308 } 309 310 splx(s); 311 312 return (scb); 313 } 314 315 /* 316 * iha_find_pend_scb - scan the pending queue for a SCB that can be 317 * processed immediately. Return NULL if none found 318 * and a pointer to the SCB if one is found. If there 319 * is an active SCB, return NULL! 320 */ 321 static struct iha_scb * 322 iha_find_pend_scb(sc) 323 struct iha_softc *sc; 324 { 325 struct iha_scb *scb; 326 struct tcs *tcs; 327 int s; 328 329 s = splbio(); 330 331 if (sc->sc_actscb != NULL) 332 scb = NULL; 333 334 else 335 TAILQ_FOREACH(scb, &sc->sc_pendscb, chain) { 336 if ((scb->xs->xs_control & XS_CTL_RESET) != 0) 337 /* ALWAYS willing to reset a device */ 338 break; 339 340 tcs = scb->tcs; 341 342 if ((scb->scb_tagmsg) != 0) { 343 /* 344 * A Tagged I/O. OK to start If no 345 * non-tagged I/O is active on the same 346 * target 347 */ 348 if (tcs->ntagscb == NULL) 349 break; 350 351 } else if (scb->cmd[0] == REQUEST_SENSE) { 352 /* 353 * OK to do a non-tagged request sense 354 * even if a non-tagged I/O has been 355 * started, 'cuz we don't allow any 356 * disconnect during a request sense op 357 */ 358 break; 359 360 } else if (tcs->tagcnt == 0) { 361 /* 362 * No tagged I/O active on this target, 363 * ok to start a non-tagged one if one 364 * is not already active 365 */ 366 if (tcs->ntagscb == NULL) 367 break; 368 } 369 } 370 371 splx(s); 372 373 return (scb); 374 } 375 376 static __inline void 377 iha_append_pend_scb(sc, scb) 378 struct iha_softc *sc; 379 struct iha_scb *scb; 380 { 381 /* ASSUMPTION: only called within a splbio()/splx() pair */ 382 383 if (scb == sc->sc_actscb) 384 sc->sc_actscb = NULL; 385 386 scb->status = STATUS_QUEUED; 387 388 TAILQ_INSERT_TAIL(&sc->sc_pendscb, scb, chain); 389 } 390 391 static __inline void 392 iha_push_pend_scb(sc, scb) 393 struct iha_softc *sc; 394 struct iha_scb *scb; 395 { 396 int s; 397 398 s = splbio(); 399 400 if (scb == sc->sc_actscb) 401 sc->sc_actscb = NULL; 402 403 scb->status = STATUS_QUEUED; 404 405 TAILQ_INSERT_HEAD(&sc->sc_pendscb, scb, chain); 406 407 splx(s); 408 } 409 410 /* 411 * iha_del_pend_scb - remove scb from sc_pendscb 412 */ 413 static __inline void 414 iha_del_pend_scb(sc, scb) 415 struct iha_softc *sc; 416 struct iha_scb *scb; 417 { 418 int s; 419 420 s = splbio(); 421 422 TAILQ_REMOVE(&sc->sc_pendscb, scb, chain); 423 424 splx(s); 425 } 426 427 static __inline void 428 iha_mark_busy_scb(scb) 429 struct iha_scb *scb; 430 { 431 int s; 432 433 s = splbio(); 434 435 scb->status = STATUS_BUSY; 436 437 if (scb->scb_tagmsg == 0) 438 scb->tcs->ntagscb = scb; 439 else 440 scb->tcs->tagcnt++; 441 442 splx(s); 443 } 444 445 /* 446 * iha_set_ssig - read the current scsi signal mask, then write a new 447 * one which turns off/on the specified signals. 448 */ 449 static __inline void 450 iha_set_ssig(sc, offsigs, onsigs) 451 struct iha_softc *sc; 452 u_int8_t offsigs, onsigs; 453 { 454 bus_space_tag_t iot = sc->sc_iot; 455 bus_space_handle_t ioh = sc->sc_ioh; 456 u_int8_t currsigs; 457 458 currsigs = bus_space_read_1(iot, ioh, TUL_SSIGI); 459 bus_space_write_1(iot, ioh, TUL_SSIGO, (currsigs & ~offsigs) | onsigs); 460 } 461 462 /* 463 * iha_intr - the interrupt service routine for the iha driver 464 */ 465 int 466 iha_intr(arg) 467 void *arg; 468 { 469 bus_space_tag_t iot; 470 bus_space_handle_t ioh; 471 struct iha_softc *sc; 472 int s; 473 474 sc = (struct iha_softc *)arg; 475 iot = sc->sc_iot; 476 ioh = sc->sc_ioh; 477 478 if ((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 479 return (0); 480 481 s = splbio(); /* XXX - Or are interrupts off when ISR's are called? */ 482 483 if (sc->sc_semaph != SEMAPH_IN_MAIN) { 484 /* XXX - need these inside a splbio()/splx()? */ 485 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 486 sc->sc_semaph = SEMAPH_IN_MAIN; 487 488 iha_main(sc); 489 490 sc->sc_semaph = ~SEMAPH_IN_MAIN; 491 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 492 } 493 494 splx(s); 495 496 return (1); 497 } 498 499 void 500 iha_attach(sc) 501 struct iha_softc *sc; 502 { 503 bus_space_tag_t iot = sc->sc_iot; 504 bus_space_handle_t ioh = sc->sc_ioh; 505 struct iha_scb *scb; 506 struct iha_eeprom eeprom; 507 struct eeprom_adapter *conf; 508 int i, error, reg; 509 510 iha_read_eeprom(sc, &eeprom); 511 512 conf = &eeprom.adapter[0]; 513 514 /* 515 * fill in the rest of the iha_softc fields 516 */ 517 sc->sc_id = CFG_ID(conf->config1); 518 sc->sc_semaph = ~SEMAPH_IN_MAIN; 519 sc->sc_status0 = 0; 520 sc->sc_actscb = NULL; 521 522 TAILQ_INIT(&sc->sc_freescb); 523 TAILQ_INIT(&sc->sc_pendscb); 524 TAILQ_INIT(&sc->sc_donescb); 525 error = iha_alloc_sglist(sc); 526 if (error != 0) { 527 printf(": cannot allocate sglist\n"); 528 return; 529 } 530 531 sc->sc_scb = malloc(sizeof(struct iha_scb) * IHA_MAX_SCB, 532 M_DEVBUF, M_NOWAIT|M_ZERO); 533 if (sc->sc_scb == NULL) { 534 printf(": cannot allocate SCB\n"); 535 return; 536 } 537 538 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) { 539 scb->scb_tagid = i; 540 scb->sgoffset = IHA_SG_SIZE * i; 541 scb->sglist = sc->sc_sglist + IHA_MAX_SG_ENTRIES * i; 542 scb->sg_addr = 543 sc->sc_dmamap->dm_segs[0].ds_addr + scb->sgoffset; 544 545 error = bus_dmamap_create(sc->sc_dmat, 546 MAXPHYS, IHA_MAX_SG_ENTRIES, MAXPHYS, 0, 547 BUS_DMA_NOWAIT, &scb->dmap); 548 549 if (error != 0) { 550 printf(": couldn't create SCB DMA map, error = %d\n", 551 error); 552 return; 553 } 554 TAILQ_INSERT_TAIL(&sc->sc_freescb, scb, chain); 555 } 556 557 /* Mask all the interrupts */ 558 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 559 560 /* Stop any I/O and reset the scsi module */ 561 iha_reset_dma(sc); 562 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSMOD); 563 564 /* Program HBA's SCSI ID */ 565 bus_space_write_1(iot, ioh, TUL_SID, sc->sc_id << 4); 566 567 /* 568 * Configure the channel as requested by the NVRAM settings read 569 * by iha_read_eeprom() above. 570 */ 571 572 sc->sc_sconf1 = SCONFIG0DEFAULT; 573 if ((conf->config1 & CFG_EN_PAR) != 0) 574 sc->sc_sconf1 |= SPCHK; 575 bus_space_write_1(iot, ioh, TUL_SCONFIG0, sc->sc_sconf1); 576 577 /* set selection time out 250 ms */ 578 bus_space_write_1(iot, ioh, TUL_STIMO, STIMO_250MS); 579 580 /* Enable desired SCSI termination configuration read from eeprom */ 581 reg = 0; 582 if (conf->config1 & CFG_ACT_TERM1) 583 reg |= ENTMW; 584 if (conf->config1 & CFG_ACT_TERM2) 585 reg |= ENTM; 586 bus_space_write_1(iot, ioh, TUL_DCTRL0, reg); 587 588 reg = bus_space_read_1(iot, ioh, TUL_GCTRL1) & ~ATDEN; 589 if (conf->config1 & CFG_AUTO_TERM) 590 reg |= ATDEN; 591 bus_space_write_1(iot, ioh, TUL_GCTRL1, reg); 592 593 for (i = 0; i < IHA_MAX_TARGETS / 2; i++) { 594 sc->sc_tcs[i * 2 ].flags = EEP_LBYTE(conf->tflags[i]); 595 sc->sc_tcs[i * 2 + 1].flags = EEP_HBYTE(conf->tflags[i]); 596 iha_reset_tcs(&sc->sc_tcs[i * 2 ], sc->sc_sconf1); 597 iha_reset_tcs(&sc->sc_tcs[i * 2 + 1], sc->sc_sconf1); 598 } 599 600 iha_reset_chip(sc); 601 bus_space_write_1(iot, ioh, TUL_SIEN, ALL_INTERRUPTS); 602 603 /* 604 * fill in the adapter. 605 */ 606 sc->sc_adapter.adapt_dev = &sc->sc_dev; 607 sc->sc_adapter.adapt_nchannels = 1; 608 sc->sc_adapter.adapt_openings = IHA_MAX_SCB; 609 sc->sc_adapter.adapt_max_periph = IHA_MAX_SCB; 610 sc->sc_adapter.adapt_ioctl = NULL; 611 sc->sc_adapter.adapt_minphys = minphys; 612 sc->sc_adapter.adapt_request = iha_scsipi_request; 613 614 /* 615 * fill in the channel. 616 */ 617 sc->sc_channel.chan_adapter = &sc->sc_adapter; 618 sc->sc_channel.chan_bustype = &scsi_bustype; 619 sc->sc_channel.chan_channel = 0; 620 sc->sc_channel.chan_ntargets = CFG_TARGET(conf->config2); 621 sc->sc_channel.chan_nluns = 8; 622 sc->sc_channel.chan_id = sc->sc_id; 623 624 /* 625 * Now try to attach all the sub devices. 626 */ 627 config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 628 } 629 630 /* 631 * iha_alloc_sglist - allocate and map sglist for SCB's 632 */ 633 static int 634 iha_alloc_sglist(sc) 635 struct iha_softc *sc; 636 { 637 bus_dma_segment_t seg; 638 int error, rseg; 639 640 /* 641 * Allocate dma-safe memory for the SCB's sglist 642 */ 643 if ((error = bus_dmamem_alloc(sc->sc_dmat, 644 IHA_SG_SIZE * IHA_MAX_SCB, 645 PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 646 printf(": unable to allocate sglist, error = %d\n", error); 647 return (error); 648 } 649 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 650 IHA_SG_SIZE * IHA_MAX_SCB, (caddr_t *)&sc->sc_sglist, 651 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 652 printf(": unable to map sglist, error = %d\n", error); 653 return (error); 654 } 655 656 /* 657 * Create and load the DMA map used for the SCBs 658 */ 659 if ((error = bus_dmamap_create(sc->sc_dmat, 660 IHA_SG_SIZE * IHA_MAX_SCB, 1, IHA_SG_SIZE * IHA_MAX_SCB, 661 0, BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 662 printf(": unable to create control DMA map, error = %d\n", 663 error); 664 return (error); 665 } 666 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, 667 sc->sc_sglist, IHA_SG_SIZE * IHA_MAX_SCB, 668 NULL, BUS_DMA_NOWAIT)) != 0) { 669 printf(": unable to load control DMA map, error = %d\n", error); 670 return (error); 671 } 672 673 memset(sc->sc_sglist, 0, IHA_SG_SIZE * IHA_MAX_SCB); 674 675 return (0); 676 } 677 678 void 679 iha_scsipi_request(chan, req, arg) 680 struct scsipi_channel *chan; 681 scsipi_adapter_req_t req; 682 void *arg; 683 { 684 struct scsipi_xfer *xs; 685 struct scsipi_periph *periph; 686 struct iha_scb *scb; 687 struct iha_softc *sc; 688 int error, s; 689 690 sc = (struct iha_softc *)chan->chan_adapter->adapt_dev; 691 692 switch (req) { 693 case ADAPTER_REQ_RUN_XFER: 694 xs = arg; 695 periph = xs->xs_periph; 696 697 if (xs->cmdlen > sizeof(struct scsi_generic) || 698 periph->periph_target >= IHA_MAX_TARGETS) { 699 xs->error = XS_DRIVER_STUFFUP; 700 return; 701 } 702 703 s = splbio(); 704 scb = TAILQ_FIRST(&sc->sc_freescb); 705 if (scb != NULL) { 706 scb->status = STATUS_RENT; 707 TAILQ_REMOVE(&sc->sc_freescb, scb, chain); 708 } 709 #ifdef DIAGNOSTIC 710 else { 711 scsipi_printaddr(periph); 712 printf("unable to allocate scb\n"); 713 panic("iha_scsipi_request"); 714 } 715 #endif 716 splx(s); 717 718 scb->target = periph->periph_target; 719 scb->lun = periph->periph_lun; 720 scb->tcs = &sc->sc_tcs[scb->target]; 721 scb->scb_id = MSG_IDENTIFY(periph->periph_lun, 722 (xs->xs_control & XS_CTL_REQSENSE) == 0); 723 724 scb->xs = xs; 725 scb->cmdlen = xs->cmdlen; 726 memcpy(&scb->cmd, xs->cmd, xs->cmdlen); 727 scb->buflen = xs->datalen; 728 scb->flags = 0; 729 if (xs->xs_control & XS_CTL_DATA_OUT) 730 scb->flags |= FLAG_DATAOUT; 731 if (xs->xs_control & XS_CTL_DATA_IN) 732 scb->flags |= FLAG_DATAIN; 733 734 if (scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) { 735 error = bus_dmamap_load(sc->sc_dmat, scb->dmap, 736 xs->data, scb->buflen, NULL, 737 ((xs->xs_control & XS_CTL_NOSLEEP) ? 738 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) | 739 BUS_DMA_STREAMING | 740 ((scb->flags & FLAG_DATAIN) ? 741 BUS_DMA_READ : BUS_DMA_WRITE)); 742 743 if (error) { 744 printf("%s: error %d loading dma map\n", 745 sc->sc_dev.dv_xname, error); 746 iha_append_free_scb(sc, scb); 747 xs->error = XS_DRIVER_STUFFUP; 748 scsipi_done(xs); 749 return; 750 } 751 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 752 0, scb->dmap->dm_mapsize, 753 (scb->flags & FLAG_DATAIN) ? 754 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 755 } 756 757 iha_exec_scb(sc, scb); 758 return; 759 760 case ADAPTER_REQ_GROW_RESOURCES: 761 return; /* XXX */ 762 763 case ADAPTER_REQ_SET_XFER_MODE: 764 { 765 struct tcs *tcs; 766 struct scsipi_xfer_mode *xm = arg; 767 768 tcs = &sc->sc_tcs[xm->xm_target]; 769 770 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0 && 771 (tcs->flags & FLAG_NO_WIDE) == 0) 772 tcs->flags &= ~(FLAG_WIDE_DONE|FLAG_SYNC_DONE); 773 774 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 && 775 (tcs->flags & FLAG_NO_SYNC) == 0) 776 tcs->flags &= ~FLAG_SYNC_DONE; 777 778 /* 779 * If we're not going to negotiate, send the 780 * notification now, since it won't happen later. 781 */ 782 if ((tcs->flags & (FLAG_WIDE_DONE|FLAG_SYNC_DONE)) == 783 (FLAG_WIDE_DONE|FLAG_SYNC_DONE)) 784 iha_update_xfer_mode(sc, xm->xm_target); 785 786 return; 787 } 788 } 789 } 790 791 void 792 iha_update_xfer_mode(sc, target) 793 struct iha_softc *sc; 794 int target; 795 { 796 struct tcs *tcs = &sc->sc_tcs[target]; 797 struct scsipi_xfer_mode xm; 798 799 xm.xm_target = target; 800 xm.xm_mode = 0; 801 xm.xm_period = 0; 802 xm.xm_offset = 0; 803 804 if (tcs->syncm & PERIOD_WIDE_SCSI) 805 xm.xm_mode |= PERIPH_CAP_WIDE16; 806 807 if (tcs->period) { 808 xm.xm_mode |= PERIPH_CAP_SYNC; 809 xm.xm_period = tcs->period; 810 xm.xm_offset = tcs->offset; 811 } 812 813 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 814 } 815 816 static void 817 iha_reset_scsi_bus(sc) 818 struct iha_softc *sc; 819 { 820 struct iha_scb *scb; 821 struct tcs *tcs; 822 int i, s; 823 824 s = splbio(); 825 826 iha_reset_dma(sc); 827 828 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 829 switch (scb->status) { 830 case STATUS_BUSY: 831 iha_append_done_scb(sc, scb, HOST_SCSI_RST); 832 break; 833 834 case STATUS_SELECT: 835 iha_push_pend_scb(sc, scb); 836 break; 837 838 default: 839 break; 840 } 841 842 for (i = 0, tcs = sc->sc_tcs; i < IHA_MAX_TARGETS; i++, tcs++) 843 iha_reset_tcs(tcs, sc->sc_sconf1); 844 845 splx(s); 846 } 847 848 void 849 iha_reset_chip(sc) 850 struct iha_softc *sc; 851 { 852 bus_space_tag_t iot = sc->sc_iot; 853 bus_space_handle_t ioh = sc->sc_ioh; 854 855 /* reset tulip chip */ 856 857 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSCSI); 858 859 do { 860 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 861 } while ((sc->sc_sistat & SRSTD) == 0); 862 863 iha_set_ssig(sc, 0, 0); 864 865 bus_space_read_1(iot, ioh, TUL_SISTAT); /* Clear any active interrupt*/ 866 } 867 868 /* 869 * iha_reset_dma - abort any active DMA xfer, reset tulip FIFO. 870 */ 871 static void 872 iha_reset_dma(sc) 873 struct iha_softc *sc; 874 { 875 bus_space_tag_t iot = sc->sc_iot; 876 bus_space_handle_t ioh = sc->sc_ioh; 877 878 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 879 /* if DMA xfer is pending, abort DMA xfer */ 880 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 881 /* wait Abort DMA xfer done */ 882 while ((bus_space_read_1(iot, ioh, TUL_ISTUS0) & DABT) == 0) 883 ; 884 } 885 886 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 887 } 888 889 /* 890 * iha_reset_tcs - reset the target control structure pointed 891 * to by tcs to default values. tcs flags 892 * only has the negotiation done bits reset as 893 * the other bits are fixed at initialization. 894 */ 895 static void 896 iha_reset_tcs(tcs, config0) 897 struct tcs *tcs; 898 u_int8_t config0; 899 { 900 901 tcs->flags &= ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 902 tcs->period = 0; 903 tcs->offset = 0; 904 tcs->tagcnt = 0; 905 tcs->ntagscb = NULL; 906 tcs->syncm = 0; 907 tcs->sconfig0 = config0; 908 } 909 910 /* 911 * iha_main - process the active SCB, taking one off pending and making it 912 * active if necessary, and any done SCB's created as 913 * a result until there are no interrupts pending and no pending 914 * SCB's that can be started. 915 */ 916 static void 917 iha_main(sc) 918 struct iha_softc *sc; 919 { 920 bus_space_tag_t iot = sc->sc_iot; 921 bus_space_handle_t ioh =sc->sc_ioh; 922 struct iha_scb *scb; 923 924 for (;;) { 925 iha_scsi(sc); 926 927 while ((scb = iha_pop_done_scb(sc)) != NULL) 928 iha_done_scb(sc, scb); 929 930 /* 931 * If there are no interrupts pending, or we can't start 932 * a pending sc, break out of the for(;;). Otherwise 933 * continue the good work with another call to 934 * iha_scsi(). 935 */ 936 if (((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 937 && (iha_find_pend_scb(sc) == NULL)) 938 break; 939 } 940 } 941 942 /* 943 * iha_scsi - service any outstanding interrupts. If there are none, try to 944 * start another SCB currently in the pending queue. 945 */ 946 static void 947 iha_scsi(sc) 948 struct iha_softc *sc; 949 { 950 bus_space_tag_t iot = sc->sc_iot; 951 bus_space_handle_t ioh = sc->sc_ioh; 952 struct iha_scb *scb; 953 struct tcs *tcs; 954 u_int8_t stat; 955 956 /* service pending interrupts asap */ 957 958 stat = bus_space_read_1(iot, ioh, TUL_STAT0); 959 if ((stat & INTPD) != 0) { 960 sc->sc_status0 = stat; 961 sc->sc_status1 = bus_space_read_1(iot, ioh, TUL_STAT1); 962 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 963 964 sc->sc_phase = sc->sc_status0 & PH_MASK; 965 966 if ((sc->sc_sistat & SRSTD) != 0) { 967 iha_reset_scsi_bus(sc); 968 return; 969 } 970 971 if ((sc->sc_sistat & RSELED) != 0) { 972 iha_resel(sc); 973 return; 974 } 975 976 if ((sc->sc_sistat & (STIMEO | DISCD)) != 0) { 977 iha_busfree(sc); 978 return; 979 } 980 981 if ((sc->sc_sistat & (SCMDN | SBSRV)) != 0) { 982 iha_next_state(sc); 983 return; 984 } 985 986 if ((sc->sc_sistat & SELED) != 0) 987 iha_set_ssig(sc, 0, 0); 988 } 989 990 /* 991 * There were no interrupts pending which required action elsewhere, so 992 * see if it is possible to start the selection phase on a pending SCB 993 */ 994 if ((scb = iha_find_pend_scb(sc)) == NULL) 995 return; 996 997 tcs = scb->tcs; 998 999 /* program HBA's SCSI ID & target SCSI ID */ 1000 bus_space_write_1(iot, ioh, TUL_SID, (sc->sc_id << 4) | scb->target); 1001 1002 if ((scb->xs->xs_control & XS_CTL_RESET) == 0) { 1003 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 1004 1005 if ((tcs->flags & FLAG_NO_NEG_SYNC) == 0 || 1006 (tcs->flags & FLAG_NO_NEG_WIDE) == 0) 1007 iha_select(sc, scb, SELATNSTOP); 1008 1009 else if (scb->scb_tagmsg != 0) 1010 iha_select(sc, scb, SEL_ATN3); 1011 1012 else 1013 iha_select(sc, scb, SEL_ATN); 1014 1015 } else { 1016 iha_select(sc, scb, SELATNSTOP); 1017 scb->nextstat = 8; 1018 } 1019 1020 if ((scb->xs->xs_control & XS_CTL_POLL) != 0) { 1021 int timeout; 1022 for (timeout = scb->xs->timeout; timeout > 0; timeout--) { 1023 if (iha_wait(sc, NO_OP) == -1) 1024 break; 1025 if (iha_next_state(sc) == -1) 1026 break; 1027 delay(1000); /* Only happens in boot, so it's ok */ 1028 } 1029 1030 /* 1031 * Since done queue processing not done until AFTER this 1032 * function returns, scb is on the done queue, not 1033 * the free queue at this point and still has valid data 1034 * 1035 * Conversely, xs->error has not been set yet 1036 */ 1037 if (timeout == 0) 1038 iha_timeout(scb); 1039 } 1040 } 1041 1042 static void 1043 iha_select(sc, scb, select_type) 1044 struct iha_softc *sc; 1045 struct iha_scb *scb; 1046 u_int8_t select_type; 1047 { 1048 bus_space_tag_t iot = sc->sc_iot; 1049 bus_space_handle_t ioh = sc->sc_ioh; 1050 1051 switch (select_type) { 1052 case SEL_ATN: 1053 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 1054 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 1055 scb->cmd, scb->cmdlen); 1056 1057 scb->nextstat = 2; 1058 break; 1059 1060 case SELATNSTOP: 1061 scb->nextstat = 1; 1062 break; 1063 1064 case SEL_ATN3: 1065 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 1066 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_tagmsg); 1067 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_tagid); 1068 1069 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, scb->cmd, 1070 scb->cmdlen); 1071 1072 scb->nextstat = 2; 1073 break; 1074 1075 default: 1076 printf("[debug] iha_select() - unknown select type = 0x%02x\n", 1077 select_type); 1078 return; 1079 } 1080 1081 iha_del_pend_scb(sc, scb); 1082 scb->status = STATUS_SELECT; 1083 1084 sc->sc_actscb = scb; 1085 1086 bus_space_write_1(iot, ioh, TUL_SCMD, select_type); 1087 } 1088 1089 /* 1090 * iha_wait - wait for an interrupt to service or a SCSI bus phase change 1091 * after writing the supplied command to the tulip chip. If 1092 * the command is NO_OP, skip the command writing. 1093 */ 1094 static int 1095 iha_wait(sc, cmd) 1096 struct iha_softc *sc; 1097 u_int8_t cmd; 1098 { 1099 bus_space_tag_t iot = sc->sc_iot; 1100 bus_space_handle_t ioh = sc->sc_ioh; 1101 1102 if (cmd != NO_OP) 1103 bus_space_write_1(iot, ioh, TUL_SCMD, cmd); 1104 1105 /* 1106 * Have to do this here, in addition to in iha_isr, because 1107 * interrupts might be turned off when we get here. 1108 */ 1109 do { 1110 sc->sc_status0 = bus_space_read_1(iot, ioh, TUL_STAT0); 1111 } while ((sc->sc_status0 & INTPD) == 0); 1112 1113 sc->sc_status1 = bus_space_read_1(iot, ioh, TUL_STAT1); 1114 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 1115 1116 sc->sc_phase = sc->sc_status0 & PH_MASK; 1117 1118 if ((sc->sc_sistat & SRSTD) != 0) { 1119 /* SCSI bus reset interrupt */ 1120 iha_reset_scsi_bus(sc); 1121 return (-1); 1122 } 1123 1124 if ((sc->sc_sistat & RSELED) != 0) 1125 /* Reselection interrupt */ 1126 return (iha_resel(sc)); 1127 1128 if ((sc->sc_sistat & STIMEO) != 0) { 1129 /* selected/reselected timeout interrupt */ 1130 iha_busfree(sc); 1131 return (-1); 1132 } 1133 1134 if ((sc->sc_sistat & DISCD) != 0) { 1135 /* BUS disconnection interrupt */ 1136 if ((sc->sc_flags & FLAG_EXPECT_DONE_DISC) != 0) { 1137 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1138 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 1139 SCONFIG0DEFAULT); 1140 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1141 iha_append_done_scb(sc, sc->sc_actscb, HOST_OK); 1142 sc->sc_flags &= ~FLAG_EXPECT_DONE_DISC; 1143 1144 } else if ((sc->sc_flags & FLAG_EXPECT_DISC) != 0) { 1145 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1146 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 1147 SCONFIG0DEFAULT); 1148 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1149 sc->sc_actscb = NULL; 1150 sc->sc_flags &= ~FLAG_EXPECT_DISC; 1151 1152 } else 1153 iha_busfree(sc); 1154 1155 return (-1); 1156 } 1157 1158 return (sc->sc_phase); 1159 } 1160 1161 static void 1162 iha_exec_scb(sc, scb) 1163 struct iha_softc *sc; 1164 struct iha_scb *scb; 1165 { 1166 bus_space_tag_t iot; 1167 bus_space_handle_t ioh; 1168 bus_dmamap_t dm; 1169 struct scsipi_xfer *xs = scb->xs; 1170 int nseg, s; 1171 1172 dm = scb->dmap; 1173 nseg = dm->dm_nsegs; 1174 1175 if (nseg > 1) { 1176 struct iha_sg_element *sg = scb->sglist; 1177 int i; 1178 1179 for (i = 0; i < nseg; i++) { 1180 sg[i].sg_len = htole32(dm->dm_segs[i].ds_len); 1181 sg[i].sg_addr = htole32(dm->dm_segs[i].ds_addr); 1182 } 1183 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1184 scb->sgoffset, IHA_SG_SIZE, 1185 BUS_DMASYNC_PREWRITE); 1186 1187 scb->flags |= FLAG_SG; 1188 scb->sg_size = scb->sg_max = nseg; 1189 scb->sg_index = 0; 1190 1191 scb->bufaddr = scb->sg_addr; 1192 } else 1193 scb->bufaddr = dm->dm_segs[0].ds_addr; 1194 1195 if ((xs->xs_control & XS_CTL_POLL) == 0) { 1196 int timeout = xs->timeout; 1197 timeout = (timeout > 100000) ? 1198 timeout / 1000 * hz : timeout * hz / 1000; 1199 if (timeout == 0) 1200 timeout = 1; 1201 callout_reset(&xs->xs_callout, timeout, iha_timeout, scb); 1202 } 1203 1204 s = splbio(); 1205 1206 if (((scb->xs->xs_control & XS_RESET) != 0) || 1207 (scb->cmd[0] == REQUEST_SENSE)) 1208 iha_push_pend_scb(sc, scb); /* Insert SCB at head of Pend */ 1209 else 1210 iha_append_pend_scb(sc, scb); /* Append SCB to tail of Pend */ 1211 1212 /* 1213 * Run through iha_main() to ensure something is active, if 1214 * only this new SCB. 1215 */ 1216 if (sc->sc_semaph != SEMAPH_IN_MAIN) { 1217 iot = sc->sc_iot; 1218 ioh = sc->sc_ioh; 1219 1220 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 1221 sc->sc_semaph = SEMAPH_IN_MAIN;; 1222 1223 splx(s); 1224 iha_main(sc); 1225 s = splbio(); 1226 1227 sc->sc_semaph = ~SEMAPH_IN_MAIN;; 1228 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 1229 } 1230 1231 splx(s); 1232 } 1233 1234 /* 1235 * iha_done_scb - We have a scb which has been processed by the 1236 * adaptor, now we look to see how the operation went. 1237 */ 1238 static void 1239 iha_done_scb(sc, scb) 1240 struct iha_softc *sc; 1241 struct iha_scb *scb; 1242 { 1243 struct scsipi_xfer *xs = scb->xs; 1244 1245 if (xs != NULL) { 1246 /* Cancel the timeout. */ 1247 callout_stop(&xs->xs_callout); 1248 1249 if (scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) { 1250 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 1251 0, scb->dmap->dm_mapsize, 1252 (scb->flags & FLAG_DATAIN) ? 1253 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1254 bus_dmamap_unload(sc->sc_dmat, scb->dmap); 1255 } 1256 1257 xs->status = scb->ta_stat; 1258 1259 switch (scb->ha_stat) { 1260 case HOST_OK: 1261 switch (scb->ta_stat) { 1262 case SCSI_OK: 1263 case SCSI_CONDITION_MET: 1264 case SCSI_INTERM: 1265 case SCSI_INTERM_COND_MET: 1266 xs->resid = scb->buflen; 1267 xs->error = XS_NOERROR; 1268 if ((scb->flags & FLAG_RSENS) != 0) 1269 xs->error = XS_SENSE; 1270 break; 1271 1272 case SCSI_RESV_CONFLICT: 1273 case SCSI_BUSY: 1274 case SCSI_QUEUE_FULL: 1275 xs->error = XS_BUSY; 1276 break; 1277 1278 case SCSI_TERMINATED: 1279 case SCSI_ACA_ACTIVE: 1280 case SCSI_CHECK: 1281 scb->tcs->flags &= 1282 ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 1283 1284 if ((scb->flags & FLAG_RSENS) != 0 || 1285 iha_push_sense_request(sc, scb) != 0) { 1286 scb->flags &= ~FLAG_RSENS; 1287 printf("%s: request sense failed\n", 1288 sc->sc_dev.dv_xname); 1289 xs->error = XS_DRIVER_STUFFUP; 1290 break; 1291 } 1292 1293 xs->error = XS_SENSE; 1294 return; 1295 1296 default: 1297 xs->error = XS_DRIVER_STUFFUP; 1298 break; 1299 } 1300 break; 1301 1302 case HOST_SEL_TOUT: 1303 xs->error = XS_SELTIMEOUT; 1304 break; 1305 1306 case HOST_SCSI_RST: 1307 case HOST_DEV_RST: 1308 xs->error = XS_RESET; 1309 break; 1310 1311 case HOST_SPERR: 1312 printf("%s: SCSI Parity error detected\n", 1313 sc->sc_dev.dv_xname); 1314 xs->error = XS_DRIVER_STUFFUP; 1315 break; 1316 1317 case HOST_TIMED_OUT: 1318 xs->error = XS_TIMEOUT; 1319 break; 1320 1321 case HOST_DO_DU: 1322 case HOST_BAD_PHAS: 1323 default: 1324 xs->error = XS_DRIVER_STUFFUP; 1325 break; 1326 } 1327 1328 scsipi_done(xs); 1329 } 1330 1331 iha_append_free_scb(sc, scb); 1332 } 1333 1334 /* 1335 * iha_push_sense_request - obtain auto sense data by pushing the 1336 * SCB needing it back onto the pending 1337 * queue with a REQUEST_SENSE CDB. 1338 */ 1339 static int 1340 iha_push_sense_request(sc, scb) 1341 struct iha_softc *sc; 1342 struct iha_scb *scb; 1343 { 1344 struct scsipi_xfer *xs = scb->xs; 1345 struct scsipi_periph *periph = xs->xs_periph; 1346 struct scsipi_sense *ss = (struct scsipi_sense *)scb->cmd; 1347 int lun = periph->periph_lun; 1348 int err; 1349 1350 ss->opcode = REQUEST_SENSE; 1351 ss->byte2 = lun << SCSI_CMD_LUN_SHIFT; 1352 ss->unused[0] = ss->unused[1] = 0; 1353 ss->length = sizeof(struct scsipi_sense_data); 1354 ss->control = 0; 1355 1356 scb->flags = FLAG_RSENS | FLAG_DATAIN; 1357 1358 scb->scb_id &= ~MSG_IDENTIFY_DISCFLAG; 1359 1360 scb->scb_tagmsg = 0; 1361 scb->ta_stat = SCSI_OK; 1362 1363 scb->cmdlen = sizeof(struct scsipi_sense); 1364 scb->buflen = ss->length; 1365 1366 err = bus_dmamap_load(sc->sc_dmat, scb->dmap, 1367 &xs->sense.scsi_sense, scb->buflen, NULL, 1368 BUS_DMA_READ|BUS_DMA_NOWAIT); 1369 if (err != 0) { 1370 printf("iha_push_sense_request: cannot bus_dmamap_load()\n"); 1371 xs->error = XS_DRIVER_STUFFUP; 1372 return 1; 1373 } 1374 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 1375 0, scb->buflen, BUS_DMASYNC_PREREAD); 1376 1377 /* XXX What about queued command? */ 1378 iha_exec_scb(sc, scb); 1379 1380 return 0; 1381 } 1382 1383 static void 1384 iha_timeout(arg) 1385 void *arg; 1386 { 1387 struct iha_scb *scb = (struct iha_scb *)arg; 1388 struct scsipi_xfer *xs = scb->xs; 1389 struct scsipi_periph *periph = xs->xs_periph; 1390 struct iha_softc *sc; 1391 1392 sc = (void *)periph->periph_channel->chan_adapter->adapt_dev; 1393 1394 if (xs == NULL) 1395 printf("[debug] iha_timeout called with xs == NULL\n"); 1396 1397 else { 1398 scsipi_printaddr(periph); 1399 printf("SCSI OpCode 0x%02x timed out\n", xs->cmd->opcode); 1400 1401 iha_abort_xs(sc, xs, HOST_TIMED_OUT); 1402 } 1403 } 1404 1405 /* 1406 * iha_abort_xs - find the SCB associated with the supplied xs and 1407 * stop all processing on it, moving it to the done 1408 * queue with the supplied host status value. 1409 */ 1410 static void 1411 iha_abort_xs(sc, xs, hastat) 1412 struct iha_softc *sc; 1413 struct scsipi_xfer *xs; 1414 u_int8_t hastat; 1415 { 1416 struct iha_scb *scb; 1417 int i, s; 1418 1419 s = splbio(); 1420 1421 /* Check the pending queue for the SCB pointing to xs */ 1422 1423 TAILQ_FOREACH(scb, &sc->sc_pendscb, chain) 1424 if (scb->xs == xs) { 1425 iha_del_pend_scb(sc, scb); 1426 iha_append_done_scb(sc, scb, hastat); 1427 splx(s); 1428 return; 1429 } 1430 1431 /* 1432 * If that didn't work, check all BUSY/SELECTING SCB's for one 1433 * pointing to xs 1434 */ 1435 1436 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 1437 switch (scb->status) { 1438 case STATUS_BUSY: 1439 case STATUS_SELECT: 1440 if (scb->xs == xs) { 1441 iha_append_done_scb(sc, scb, hastat); 1442 splx(s); 1443 return; 1444 } 1445 break; 1446 default: 1447 break; 1448 } 1449 1450 splx(s); 1451 } 1452 1453 /* 1454 * iha_data_over_run - return HOST_OK for all SCSI opcodes where BufLen 1455 * is an 'Allocation Length'. All other SCSI opcodes 1456 * get HOST_DO_DU as they SHOULD have xferred all the 1457 * data requested. 1458 * 1459 * The list of opcodes using 'Allocation Length' was 1460 * found by scanning all the SCSI-3 T10 drafts. See 1461 * www.t10.org for the curious with a .pdf reader. 1462 */ 1463 static u_int8_t 1464 iha_data_over_run(scb) 1465 struct iha_scb *scb; 1466 { 1467 switch (scb->cmd[0]) { 1468 case 0x03: /* Request Sense SPC-2 */ 1469 case 0x12: /* Inquiry SPC-2 */ 1470 case 0x1a: /* Mode Sense (6 byte version) SPC-2 */ 1471 case 0x1c: /* Receive Diagnostic Results SPC-2 */ 1472 case 0x23: /* Read Format Capacities MMC-2 */ 1473 case 0x29: /* Read Generation SBC */ 1474 case 0x34: /* Read Position SSC-2 */ 1475 case 0x37: /* Read Defect Data SBC */ 1476 case 0x3c: /* Read Buffer SPC-2 */ 1477 case 0x42: /* Read Sub Channel MMC-2 */ 1478 case 0x43: /* Read TOC/PMA/ATIP MMC */ 1479 1480 /* XXX - 2 with same opcode of 0x44? */ 1481 case 0x44: /* Read Header/Read Density Suprt MMC/SSC*/ 1482 1483 case 0x46: /* Get Configuration MMC-2 */ 1484 case 0x4a: /* Get Event/Status Notification MMC-2 */ 1485 case 0x4d: /* Log Sense SPC-2 */ 1486 case 0x51: /* Read Disc Information MMC */ 1487 case 0x52: /* Read Track Information MMC */ 1488 case 0x59: /* Read Master CUE MMC */ 1489 case 0x5a: /* Mode Sense (10 byte version) SPC-2 */ 1490 case 0x5c: /* Read Buffer Capacity MMC */ 1491 case 0x5e: /* Persistant Reserve In SPC-2 */ 1492 case 0x84: /* Receive Copy Results SPC-2 */ 1493 case 0xa0: /* Report LUNs SPC-2 */ 1494 case 0xa3: /* Various Report requests SBC-2/SCC-2*/ 1495 case 0xa4: /* Report Key MMC-2 */ 1496 case 0xad: /* Read DVD Structure MMC-2 */ 1497 case 0xb4: /* Read Element Status (Attached) SMC */ 1498 case 0xb5: /* Request Volume Element Address SMC */ 1499 case 0xb7: /* Read Defect Data (12 byte ver.) SBC */ 1500 case 0xb8: /* Read Element Status (Independ.) SMC */ 1501 case 0xba: /* Report Redundancy SCC-2 */ 1502 case 0xbd: /* Mechanism Status MMC */ 1503 case 0xbe: /* Report Basic Redundancy SCC-2 */ 1504 1505 return (HOST_OK); 1506 break; 1507 1508 default: 1509 return (HOST_DO_DU); 1510 break; 1511 } 1512 } 1513 1514 /* 1515 * iha_next_state - prcess the current SCB as requested in it's 1516 * nextstat member. 1517 */ 1518 static int 1519 iha_next_state(sc) 1520 struct iha_softc *sc; 1521 { 1522 1523 if (sc->sc_actscb == NULL) 1524 return (-1); 1525 1526 switch (sc->sc_actscb->nextstat) { 1527 case 1: 1528 if (iha_state_1(sc) == 3) 1529 goto state_3; 1530 break; 1531 1532 case 2: 1533 switch (iha_state_2(sc)) { 1534 case 3: 1535 goto state_3; 1536 case 4: 1537 goto state_4; 1538 default: 1539 break; 1540 } 1541 break; 1542 1543 case 3: 1544 state_3: 1545 if (iha_state_3(sc) == 4) 1546 goto state_4; 1547 break; 1548 1549 case 4: 1550 state_4: 1551 switch (iha_state_4(sc)) { 1552 case 0: 1553 return (0); 1554 case 6: 1555 goto state_6; 1556 default: 1557 break; 1558 } 1559 break; 1560 1561 case 5: 1562 switch (iha_state_5(sc)) { 1563 case 4: 1564 goto state_4; 1565 case 6: 1566 goto state_6; 1567 default: 1568 break; 1569 } 1570 break; 1571 1572 case 6: 1573 state_6: 1574 iha_state_6(sc); 1575 break; 1576 1577 case 8: 1578 iha_state_8(sc); 1579 break; 1580 1581 default: 1582 #ifdef IHA_DEBUG_STATE 1583 printf("[debug] -unknown state: %i-\n", 1584 sc->sc_actscb->nextstat); 1585 #endif 1586 iha_bad_seq(sc); 1587 break; 1588 } 1589 1590 return (-1); 1591 } 1592 1593 /* 1594 * iha_state_1 - selection is complete after a SELATNSTOP. If the target 1595 * has put the bus into MSG_OUT phase start wide/sync 1596 * negotiation. Otherwise clear the FIFO and go to state 3, 1597 * which will send the SCSI CDB to the target. 1598 */ 1599 static int 1600 iha_state_1(sc) 1601 struct iha_softc *sc; 1602 { 1603 bus_space_tag_t iot = sc->sc_iot; 1604 bus_space_handle_t ioh = sc->sc_ioh; 1605 struct iha_scb *scb = sc->sc_actscb; 1606 struct tcs *tcs; 1607 int flags; 1608 1609 iha_mark_busy_scb(scb); 1610 1611 tcs = scb->tcs; 1612 1613 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 1614 1615 /* 1616 * If we are in PHASE_MSG_OUT, send 1617 * a) IDENT message (with tags if appropriate) 1618 * b) WDTR if the target is configured to negotiate wide xfers 1619 * ** OR ** 1620 * c) SDTR if the target is configured to negotiate sync xfers 1621 * but not wide ones 1622 * 1623 * If we are NOT, then the target is not asking for anything but 1624 * the data/command, so go straight to state 3. 1625 */ 1626 if (sc->sc_phase == PHASE_MSG_OUT) { 1627 bus_space_write_1(iot, ioh, TUL_SCTRL1, (ESBUSIN | EHRSL)); 1628 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 1629 1630 if (scb->scb_tagmsg != 0) { 1631 bus_space_write_1(iot, ioh, TUL_SFIFO, 1632 scb->scb_tagmsg); 1633 bus_space_write_1(iot, ioh, TUL_SFIFO, 1634 scb->scb_tagid); 1635 } 1636 1637 flags = tcs->flags; 1638 if ((flags & FLAG_NO_NEG_WIDE) == 0) { 1639 if (iha_msgout_wdtr(sc) == -1) 1640 return (-1); 1641 } else if ((flags & FLAG_NO_NEG_SYNC) == 0) { 1642 if (iha_msgout_sdtr(sc) == -1) 1643 return (-1); 1644 } 1645 1646 } else { 1647 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1648 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 1649 } 1650 1651 return (3); 1652 } 1653 1654 /* 1655 * iha_state_2 - selection is complete after a SEL_ATN or SEL_ATN3. If the SCSI 1656 * CDB has already been send, go to state 4 to start the data 1657 * xfer. Otherwise reset the FIFO and go to state 3, sending 1658 * the SCSI CDB. 1659 */ 1660 static int 1661 iha_state_2(sc) 1662 struct iha_softc *sc; 1663 { 1664 bus_space_tag_t iot = sc->sc_iot; 1665 bus_space_handle_t ioh = sc->sc_ioh; 1666 struct iha_scb *scb = sc->sc_actscb; 1667 1668 iha_mark_busy_scb(scb); 1669 1670 bus_space_write_1(iot, ioh, TUL_SCONFIG0, scb->tcs->sconfig0); 1671 1672 if ((sc->sc_status1 & CPDNE) != 0) 1673 return (4); 1674 1675 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1676 1677 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 1678 1679 return (3); 1680 } 1681 1682 /* 1683 * iha_state_3 - send the SCSI CDB to the target, processing any status 1684 * or other messages received until that is done or 1685 * abandoned. 1686 */ 1687 static int 1688 iha_state_3(sc) 1689 struct iha_softc *sc; 1690 { 1691 bus_space_tag_t iot = sc->sc_iot; 1692 bus_space_handle_t ioh = sc->sc_ioh; 1693 struct iha_scb *scb = sc->sc_actscb; 1694 int flags; 1695 1696 for (;;) { 1697 switch (sc->sc_phase) { 1698 case PHASE_CMD_OUT: 1699 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 1700 scb->cmd, scb->cmdlen); 1701 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1702 return (-1); 1703 else if (sc->sc_phase == PHASE_CMD_OUT) { 1704 iha_bad_seq(sc); 1705 return (-1); 1706 } else 1707 return (4); 1708 1709 case PHASE_MSG_IN: 1710 scb->nextstat = 3; 1711 if (iha_msgin(sc) == -1) 1712 return (-1); 1713 break; 1714 1715 case PHASE_STATUS_IN: 1716 if (iha_status_msg(sc) == -1) 1717 return (-1); 1718 break; 1719 1720 case PHASE_MSG_OUT: 1721 flags = scb->tcs->flags; 1722 if ((flags & FLAG_NO_NEG_SYNC) != 0) { 1723 if (iha_msgout(sc, MSG_NOOP) == -1) 1724 return (-1); 1725 } else if (iha_msgout_sdtr(sc) == -1) 1726 return (-1); 1727 break; 1728 1729 default: 1730 printf("[debug] -s3- bad phase = %d\n", sc->sc_phase); 1731 iha_bad_seq(sc); 1732 return (-1); 1733 } 1734 } 1735 } 1736 1737 /* 1738 * iha_state_4 - start a data xfer. Handle any bus state 1739 * transitions until PHASE_DATA_IN/_OUT 1740 * or the attempt is abandoned. If there is 1741 * no data to xfer, go to state 6 and finish 1742 * processing the current SCB. 1743 */ 1744 static int 1745 iha_state_4(sc) 1746 struct iha_softc *sc; 1747 { 1748 struct iha_scb *scb = sc->sc_actscb; 1749 1750 if ((scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) == 1751 (FLAG_DATAIN | FLAG_DATAOUT)) 1752 return (6); /* Both dir flags set => NO xfer was requested */ 1753 1754 for (;;) { 1755 if (scb->buflen == 0) 1756 return (6); 1757 1758 switch (sc->sc_phase) { 1759 case PHASE_STATUS_IN: 1760 if ((scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) != 0) 1761 scb->ha_stat = iha_data_over_run(scb); 1762 if ((iha_status_msg(sc)) == -1) 1763 return (-1); 1764 break; 1765 1766 case PHASE_MSG_IN: 1767 scb->nextstat = 4; 1768 if (iha_msgin(sc) == -1) 1769 return (-1); 1770 break; 1771 1772 case PHASE_MSG_OUT: 1773 if ((sc->sc_status0 & SPERR) != 0) { 1774 scb->buflen = 0; 1775 scb->ha_stat = HOST_SPERR; 1776 if (iha_msgout(sc, MSG_INITIATOR_DET_ERR) == -1) 1777 return (-1); 1778 else 1779 return (6); 1780 } else { 1781 if (iha_msgout(sc, MSG_NOOP) == -1) 1782 return (-1); 1783 } 1784 break; 1785 1786 case PHASE_DATA_IN: 1787 return (iha_xfer_data(sc, scb, FLAG_DATAIN)); 1788 1789 case PHASE_DATA_OUT: 1790 return (iha_xfer_data(sc, scb, FLAG_DATAOUT)); 1791 1792 default: 1793 iha_bad_seq(sc); 1794 return (-1); 1795 } 1796 } 1797 } 1798 1799 /* 1800 * iha_state_5 - handle the partial or final completion of the current 1801 * data xfer. If DMA is still active stop it. If there is 1802 * more data to xfer, go to state 4 and start the xfer. 1803 * If not go to state 6 and finish the SCB. 1804 */ 1805 static int 1806 iha_state_5(sc) 1807 struct iha_softc *sc; 1808 { 1809 bus_space_tag_t iot = sc->sc_iot; 1810 bus_space_handle_t ioh = sc->sc_ioh; 1811 struct iha_scb *scb = sc->sc_actscb; 1812 struct iha_sg_element *sg; 1813 u_int32_t cnt; 1814 u_int8_t period, stat; 1815 long xcnt; /* cannot use unsigned!! see code: if (xcnt < 0) */ 1816 int i; 1817 1818 cnt = bus_space_read_4(iot, ioh, TUL_STCNT0) & TCNT; 1819 1820 /* 1821 * Stop any pending DMA activity and check for parity error. 1822 */ 1823 1824 if ((bus_space_read_1(iot, ioh, TUL_DCMD) & XDIR) != 0) { 1825 /* Input Operation */ 1826 if ((sc->sc_status0 & SPERR) != 0) 1827 scb->ha_stat = HOST_SPERR; 1828 1829 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1830 bus_space_write_1(iot, ioh, TUL_DCTRL0, 1831 bus_space_read_1(iot, ioh, TUL_DCTRL0) | SXSTP); 1832 while (bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) 1833 ; 1834 } 1835 1836 } else { 1837 /* Output Operation */ 1838 if ((sc->sc_status1 & SXCMP) == 0) { 1839 period = scb->tcs->syncm; 1840 if ((period & PERIOD_WIDE_SCSI) != 0) 1841 cnt += (bus_space_read_1(iot, ioh, 1842 TUL_SFIFOCNT) & FIFOC) * 2; 1843 else 1844 cnt += bus_space_read_1(iot, ioh, 1845 TUL_SFIFOCNT) & FIFOC; 1846 } 1847 1848 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1849 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 1850 do 1851 stat = bus_space_read_1(iot, ioh, TUL_ISTUS0); 1852 while ((stat & DABT) == 0); 1853 } 1854 1855 if ((cnt == 1) && (sc->sc_phase == PHASE_DATA_OUT)) { 1856 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1857 return (-1); 1858 cnt = 0; 1859 1860 } else if ((sc->sc_status1 & SXCMP) == 0) 1861 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1862 } 1863 1864 if (cnt == 0) { 1865 scb->buflen = 0; 1866 return (6); 1867 } 1868 1869 /* Update active data pointer and restart the I/O at the new point */ 1870 1871 xcnt = scb->buflen - cnt; /* xcnt == bytes xferred */ 1872 scb->buflen = cnt; /* cnt == bytes left */ 1873 1874 if ((scb->flags & FLAG_SG) != 0) { 1875 sg = &scb->sglist[scb->sg_index]; 1876 for (i = scb->sg_index; i < scb->sg_max; sg++, i++) { 1877 xcnt -= le32toh(sg->sg_len); 1878 if (xcnt < 0) { 1879 xcnt += le32toh(sg->sg_len); 1880 1881 sg->sg_addr = 1882 htole32(le32toh(sg->sg_addr) + xcnt); 1883 sg->sg_len = 1884 htole32(le32toh(sg->sg_len) - xcnt); 1885 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1886 scb->sgoffset, IHA_SG_SIZE, 1887 BUS_DMASYNC_PREWRITE); 1888 1889 scb->bufaddr += (i - scb->sg_index) * 1890 sizeof(struct iha_sg_element); 1891 scb->sg_size = scb->sg_max - i; 1892 scb->sg_index = i; 1893 1894 return (4); 1895 } 1896 } 1897 return (6); 1898 1899 } else 1900 scb->bufaddr += xcnt; 1901 1902 return (4); 1903 } 1904 1905 /* 1906 * iha_state_6 - finish off the active scb (may require several 1907 * iterations if PHASE_MSG_IN) and return -1 to indicate 1908 * the bus is free. 1909 */ 1910 static int 1911 iha_state_6(sc) 1912 struct iha_softc *sc; 1913 { 1914 1915 for (;;) { 1916 switch (sc->sc_phase) { 1917 case PHASE_STATUS_IN: 1918 if (iha_status_msg(sc) == -1) 1919 return (-1); 1920 break; 1921 1922 case PHASE_MSG_IN: 1923 sc->sc_actscb->nextstat = 6; 1924 if ((iha_msgin(sc)) == -1) 1925 return (-1); 1926 break; 1927 1928 case PHASE_MSG_OUT: 1929 if ((iha_msgout(sc, MSG_NOOP)) == -1) 1930 return (-1); 1931 break; 1932 1933 case PHASE_DATA_IN: 1934 if (iha_xpad_in(sc) == -1) 1935 return (-1); 1936 break; 1937 1938 case PHASE_DATA_OUT: 1939 if (iha_xpad_out(sc) == -1) 1940 return (-1); 1941 break; 1942 1943 default: 1944 iha_bad_seq(sc); 1945 return (-1); 1946 } 1947 } 1948 } 1949 1950 /* 1951 * iha_state_8 - reset the active device and all busy SCBs using it 1952 */ 1953 static int 1954 iha_state_8(sc) 1955 struct iha_softc *sc; 1956 { 1957 bus_space_tag_t iot = sc->sc_iot; 1958 bus_space_handle_t ioh = sc->sc_ioh; 1959 struct iha_scb *scb; 1960 int i; 1961 u_int8_t tar; 1962 1963 if (sc->sc_phase == PHASE_MSG_OUT) { 1964 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_BUS_DEV_RESET); 1965 1966 scb = sc->sc_actscb; 1967 1968 /* This SCB finished correctly -- resetting the device */ 1969 iha_append_done_scb(sc, scb, HOST_OK); 1970 1971 iha_reset_tcs(scb->tcs, sc->sc_sconf1); 1972 1973 tar = scb->target; 1974 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 1975 if (scb->target == tar) 1976 switch (scb->status) { 1977 case STATUS_BUSY: 1978 iha_append_done_scb(sc, 1979 scb, HOST_DEV_RST); 1980 break; 1981 1982 case STATUS_SELECT: 1983 iha_push_pend_scb(sc, scb); 1984 break; 1985 1986 default: 1987 break; 1988 } 1989 1990 sc->sc_flags |= FLAG_EXPECT_DISC; 1991 1992 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1993 return (-1); 1994 } 1995 1996 iha_bad_seq(sc); 1997 return (-1); 1998 } 1999 2000 /* 2001 * iha_xfer_data - initiate the DMA xfer of the data 2002 */ 2003 static int 2004 iha_xfer_data(sc, scb, direction) 2005 struct iha_softc *sc; 2006 struct iha_scb *scb; 2007 int direction; 2008 { 2009 bus_space_tag_t iot = sc->sc_iot; 2010 bus_space_handle_t ioh = sc->sc_ioh; 2011 u_int32_t xferlen; 2012 u_int8_t xfercmd; 2013 2014 if ((scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) != direction) 2015 return (6); /* wrong direction, abandon I/O */ 2016 2017 bus_space_write_4(iot, ioh, TUL_STCNT0, scb->buflen); 2018 2019 xfercmd = STRXFR; 2020 if (direction == FLAG_DATAIN) 2021 xfercmd |= XDIR; 2022 2023 if (scb->flags & FLAG_SG) { 2024 xferlen = scb->sg_size * sizeof(struct iha_sg_element); 2025 xfercmd |= SGXFR; 2026 } else 2027 xferlen = scb->buflen; 2028 2029 bus_space_write_4(iot, ioh, TUL_DXC, xferlen); 2030 bus_space_write_4(iot, ioh, TUL_DXPA, scb->bufaddr); 2031 bus_space_write_1(iot, ioh, TUL_DCMD, xfercmd); 2032 2033 bus_space_write_1(iot, ioh, TUL_SCMD, 2034 (direction == FLAG_DATAIN) ? XF_DMA_IN : XF_DMA_OUT); 2035 2036 scb->nextstat = 5; 2037 2038 return (0); 2039 } 2040 2041 static int 2042 iha_xpad_in(sc) 2043 struct iha_softc *sc; 2044 { 2045 bus_space_tag_t iot = sc->sc_iot; 2046 bus_space_handle_t ioh = sc->sc_ioh; 2047 struct iha_scb *scb = sc->sc_actscb; 2048 2049 if ((scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) != 0) 2050 scb->ha_stat = HOST_DO_DU; 2051 2052 for (;;) { 2053 if ((scb->tcs->syncm & PERIOD_WIDE_SCSI) != 0) 2054 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 2055 else 2056 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 2057 2058 switch (iha_wait(sc, XF_FIFO_IN)) { 2059 case -1: 2060 return (-1); 2061 2062 case PHASE_DATA_IN: 2063 bus_space_read_1(iot, ioh, TUL_SFIFO); 2064 break; 2065 2066 default: 2067 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2068 return (6); 2069 } 2070 } 2071 } 2072 2073 static int 2074 iha_xpad_out(sc) 2075 struct iha_softc *sc; 2076 { 2077 bus_space_tag_t iot = sc->sc_iot; 2078 bus_space_handle_t ioh = sc->sc_ioh; 2079 struct iha_scb *scb = sc->sc_actscb; 2080 2081 if ((scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) != 0) 2082 scb->ha_stat = HOST_DO_DU; 2083 2084 for (;;) { 2085 if ((scb->tcs->syncm & PERIOD_WIDE_SCSI) != 0) 2086 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 2087 else 2088 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 2089 2090 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 2091 2092 switch (iha_wait(sc, XF_FIFO_OUT)) { 2093 case -1: 2094 return (-1); 2095 2096 case PHASE_DATA_OUT: 2097 break; 2098 2099 default: 2100 /* Disable wide CPU to allow read 16 bits */ 2101 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2102 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2103 return (6); 2104 } 2105 } 2106 } 2107 2108 static int 2109 iha_status_msg(sc) 2110 struct iha_softc *sc; 2111 { 2112 bus_space_tag_t iot = sc->sc_iot; 2113 bus_space_handle_t ioh = sc->sc_ioh; 2114 struct iha_scb *scb; 2115 u_int8_t msg; 2116 int phase; 2117 2118 if ((phase = iha_wait(sc, CMD_COMP)) == -1) 2119 return (-1); 2120 2121 scb = sc->sc_actscb; 2122 2123 scb->ta_stat = bus_space_read_1(iot, ioh, TUL_SFIFO); 2124 2125 if (phase == PHASE_MSG_OUT) { 2126 if ((sc->sc_status0 & SPERR) == 0) 2127 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_NOOP); 2128 else 2129 bus_space_write_1(iot, ioh, TUL_SFIFO, 2130 MSG_PARITY_ERROR); 2131 2132 return (iha_wait(sc, XF_FIFO_OUT)); 2133 2134 } else if (phase == PHASE_MSG_IN) { 2135 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 2136 2137 if ((sc->sc_status0 & SPERR) != 0) 2138 switch (iha_wait(sc, MSG_ACCEPT)) { 2139 case -1: 2140 return (-1); 2141 case PHASE_MSG_OUT: 2142 bus_space_write_1(iot, ioh, TUL_SFIFO, 2143 MSG_PARITY_ERROR); 2144 return (iha_wait(sc, XF_FIFO_OUT)); 2145 default: 2146 iha_bad_seq(sc); 2147 return (-1); 2148 } 2149 2150 if (msg == MSG_CMDCOMPLETE) { 2151 if ((scb->ta_stat & 2152 (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) { 2153 iha_bad_seq(sc); 2154 return (-1); 2155 } 2156 sc->sc_flags |= FLAG_EXPECT_DONE_DISC; 2157 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2158 return (iha_wait(sc, MSG_ACCEPT)); 2159 } 2160 2161 if ((msg == MSG_LINK_CMD_COMPLETE) 2162 || (msg == MSG_LINK_CMD_COMPLETEF)) { 2163 if ((scb->ta_stat & 2164 (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) 2165 return (iha_wait(sc, MSG_ACCEPT)); 2166 } 2167 } 2168 2169 iha_bad_seq(sc); 2170 return (-1); 2171 } 2172 2173 /* 2174 * iha_busfree - SCSI bus free detected as a result of a TIMEOUT or 2175 * DISCONNECT interrupt. Reset the tulip FIFO and 2176 * SCONFIG0 and enable hardware reselect. Move any active 2177 * SCB to sc_donescb list. Return an appropriate host status 2178 * if an I/O was active. 2179 */ 2180 static void 2181 iha_busfree(sc) 2182 struct iha_softc *sc; 2183 { 2184 bus_space_tag_t iot = sc->sc_iot; 2185 bus_space_handle_t ioh = sc->sc_ioh; 2186 struct iha_scb *scb; 2187 2188 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2189 bus_space_write_1(iot, ioh, TUL_SCONFIG0, SCONFIG0DEFAULT); 2190 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2191 2192 scb = sc->sc_actscb; 2193 2194 if (scb != NULL) { 2195 if (scb->status == STATUS_SELECT) 2196 /* selection timeout */ 2197 iha_append_done_scb(sc, scb, HOST_SEL_TOUT); 2198 else 2199 /* Unexpected bus free */ 2200 iha_append_done_scb(sc, scb, HOST_BAD_PHAS); 2201 } 2202 } 2203 2204 /* 2205 * iha_resel - handle a detected SCSI bus reselection request. 2206 */ 2207 static int 2208 iha_resel(sc) 2209 struct iha_softc *sc; 2210 { 2211 bus_space_tag_t iot = sc->sc_iot; 2212 bus_space_handle_t ioh = sc->sc_ioh; 2213 struct iha_scb *scb; 2214 struct tcs *tcs; 2215 u_int8_t tag, target, lun, msg, abortmsg; 2216 2217 if (sc->sc_actscb != NULL) { 2218 if ((sc->sc_actscb->status == STATUS_SELECT)) 2219 iha_push_pend_scb(sc, sc->sc_actscb); 2220 sc->sc_actscb = NULL; 2221 } 2222 2223 target = bus_space_read_1(iot, ioh, TUL_SBID); 2224 lun = bus_space_read_1(iot, ioh, TUL_SALVC) & MSG_IDENTIFY_LUNMASK; 2225 2226 tcs = &sc->sc_tcs[target]; 2227 2228 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 2229 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 2230 2231 abortmsg = MSG_ABORT; /* until a valid tag has been obtained */ 2232 2233 if (tcs->ntagscb != NULL) 2234 /* There is a non-tagged I/O active on the target */ 2235 scb = tcs->ntagscb; 2236 2237 else { 2238 /* 2239 * Since there is no active non-tagged operation 2240 * read the tag type, the tag itself, and find 2241 * the appropriate scb by indexing sc_scb with 2242 * the tag. 2243 */ 2244 2245 switch (iha_wait(sc, MSG_ACCEPT)) { 2246 case -1: 2247 return (-1); 2248 case PHASE_MSG_IN: 2249 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 2250 if ((iha_wait(sc, XF_FIFO_IN)) == -1) 2251 return (-1); 2252 break; 2253 default: 2254 goto abort; 2255 } 2256 2257 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag Msg */ 2258 2259 if ((msg < MSG_SIMPLE_Q_TAG) || (msg > MSG_ORDERED_Q_TAG)) 2260 goto abort; 2261 2262 switch (iha_wait(sc, MSG_ACCEPT)) { 2263 case -1: 2264 return (-1); 2265 case PHASE_MSG_IN: 2266 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 2267 if ((iha_wait(sc, XF_FIFO_IN)) == -1) 2268 return (-1); 2269 break; 2270 default: 2271 goto abort; 2272 } 2273 2274 tag = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag ID */ 2275 scb = &sc->sc_scb[tag]; 2276 2277 abortmsg = MSG_ABORT_TAG; /* Now that we have valdid tag! */ 2278 } 2279 2280 if ((scb->target != target) 2281 || (scb->lun != lun) 2282 || (scb->status != STATUS_BUSY)) { 2283 abort: 2284 iha_msgout_abort(sc, abortmsg); 2285 return (-1); 2286 } 2287 2288 sc->sc_actscb = scb; 2289 2290 if (iha_wait(sc, MSG_ACCEPT) == -1) 2291 return (-1); 2292 2293 return (iha_next_state(sc)); 2294 } 2295 2296 static int 2297 iha_msgin(sc) 2298 struct iha_softc *sc; 2299 { 2300 bus_space_tag_t iot = sc->sc_iot; 2301 bus_space_handle_t ioh = sc->sc_ioh; 2302 int flags; 2303 int phase; 2304 u_int8_t msg; 2305 2306 for (;;) { 2307 if ((bus_space_read_1(iot, ioh, TUL_SFIFOCNT) & FIFOC) > 0) 2308 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2309 2310 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 2311 2312 phase = iha_wait(sc, XF_FIFO_IN); 2313 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 2314 2315 switch (msg) { 2316 case MSG_DISCONNECT: 2317 sc->sc_flags |= FLAG_EXPECT_DISC; 2318 if (iha_wait(sc, MSG_ACCEPT) != -1) 2319 iha_bad_seq(sc); 2320 phase = -1; 2321 break; 2322 case MSG_SAVEDATAPOINTER: 2323 case MSG_RESTOREPOINTERS: 2324 case MSG_NOOP: 2325 phase = iha_wait(sc, MSG_ACCEPT); 2326 break; 2327 case MSG_MESSAGE_REJECT: 2328 /* XXX - need to clear FIFO like other 'Clear ATN'?*/ 2329 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 2330 flags = sc->sc_actscb->tcs->flags; 2331 if ((flags & FLAG_NO_NEG_SYNC) == 0) 2332 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2333 phase = iha_wait(sc, MSG_ACCEPT); 2334 break; 2335 case MSG_EXTENDED: 2336 phase = iha_msgin_extended(sc); 2337 break; 2338 case MSG_IGN_WIDE_RESIDUE: 2339 phase = iha_msgin_ignore_wid_resid(sc); 2340 break; 2341 case MSG_CMDCOMPLETE: 2342 sc->sc_flags |= FLAG_EXPECT_DONE_DISC; 2343 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2344 phase = iha_wait(sc, MSG_ACCEPT); 2345 if (phase != -1) { 2346 iha_bad_seq(sc); 2347 return (-1); 2348 } 2349 break; 2350 default: 2351 printf("[debug] iha_msgin: bad msg type: %d\n", msg); 2352 phase = iha_msgout_reject(sc); 2353 break; 2354 } 2355 2356 if (phase != PHASE_MSG_IN) 2357 return (phase); 2358 } 2359 /* NOTREACHED */ 2360 } 2361 2362 static int 2363 iha_msgin_extended(sc) 2364 struct iha_softc *sc; 2365 { 2366 bus_space_tag_t iot = sc->sc_iot; 2367 bus_space_handle_t ioh = sc->sc_ioh; 2368 int flags, i, phase, msglen, msgcode; 2369 2370 /* 2371 * XXX - can we just stop reading and reject, or do we have to 2372 * read all input, discarding the excess, and then reject 2373 */ 2374 for (i = 0; i < IHA_MAX_EXTENDED_MSG; i++) { 2375 phase = iha_wait(sc, MSG_ACCEPT); 2376 2377 if (phase != PHASE_MSG_IN) 2378 return (phase); 2379 2380 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 2381 2382 if (iha_wait(sc, XF_FIFO_IN) == -1) 2383 return (-1); 2384 2385 sc->sc_msg[i] = bus_space_read_1(iot, ioh, TUL_SFIFO); 2386 2387 if (sc->sc_msg[0] == i) 2388 break; 2389 } 2390 2391 msglen = sc->sc_msg[0]; 2392 msgcode = sc->sc_msg[1]; 2393 2394 if ((msglen == MSG_EXT_SDTR_LEN) && (msgcode == MSG_EXT_SDTR)) { 2395 if (iha_msgin_sdtr(sc) == 0) { 2396 iha_sync_done(sc); 2397 return (iha_wait(sc, MSG_ACCEPT)); 2398 } 2399 2400 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2401 2402 phase = iha_wait(sc, MSG_ACCEPT); 2403 if (phase != PHASE_MSG_OUT) 2404 return (phase); 2405 2406 /* Clear FIFO for important message - final SYNC offer */ 2407 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2408 2409 iha_sync_done(sc); /* This is our final offer */ 2410 2411 } else if ((msglen == MSG_EXT_WDTR_LEN) && (msgcode == MSG_EXT_WDTR)) { 2412 2413 flags = sc->sc_actscb->tcs->flags; 2414 2415 if ((flags & FLAG_NO_WIDE) != 0) 2416 /* Offer 8bit xfers only */ 2417 sc->sc_msg[2] = MSG_EXT_WDTR_BUS_8_BIT; 2418 2419 else if (sc->sc_msg[2] > MSG_EXT_WDTR_BUS_32_BIT) 2420 /* BAD MSG */ 2421 return (iha_msgout_reject(sc)); 2422 2423 else if (sc->sc_msg[2] == MSG_EXT_WDTR_BUS_32_BIT) 2424 /* Offer 16bit instead */ 2425 sc->sc_msg[2] = MSG_EXT_WDTR_BUS_16_BIT; 2426 2427 else { 2428 iha_wide_done(sc); 2429 if ((flags & FLAG_NO_NEG_SYNC) == 0) 2430 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2431 return (iha_wait(sc, MSG_ACCEPT)); 2432 } 2433 2434 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2435 2436 phase = iha_wait(sc, MSG_ACCEPT); 2437 if (phase != PHASE_MSG_OUT) 2438 return (phase); 2439 } else 2440 return (iha_msgout_reject(sc)); 2441 2442 return (iha_msgout_extended(sc)); 2443 } 2444 2445 /* 2446 * iha_msgin_sdtr - check SDTR msg in sc_msg. If the offer is 2447 * acceptable leave sc_msg as is and return 0. 2448 * If the negotiation must continue, modify sc_msg 2449 * as needed and return 1. Else return 0. 2450 */ 2451 static int 2452 iha_msgin_sdtr(sc) 2453 struct iha_softc *sc; 2454 { 2455 int flags; 2456 int newoffer; 2457 u_int8_t default_period; 2458 2459 flags = sc->sc_actscb->tcs->flags; 2460 2461 default_period = iha_rate_tbl[flags & FLAG_SCSI_RATE]; 2462 2463 if (sc->sc_msg[3] == 0) 2464 /* target offered async only. Accept it. */ 2465 return (0); 2466 2467 newoffer = 0; 2468 2469 if ((flags & FLAG_NO_SYNC) != 0) { 2470 sc->sc_msg[3] = 0; 2471 newoffer = 1; 2472 } 2473 2474 if (sc->sc_msg[3] > IHA_MAX_OFFSET) { 2475 sc->sc_msg[3] = IHA_MAX_OFFSET; 2476 newoffer = 1; 2477 } 2478 2479 if (sc->sc_msg[2] < default_period) { 2480 sc->sc_msg[2] = default_period; 2481 newoffer = 1; 2482 } 2483 2484 if (sc->sc_msg[2] > IHA_MAX_PERIOD) { 2485 /* Use async */ 2486 sc->sc_msg[3] = 0; 2487 newoffer = 1; 2488 } 2489 2490 return (newoffer); 2491 } 2492 2493 static int 2494 iha_msgin_ignore_wid_resid(sc) 2495 struct iha_softc *sc; 2496 { 2497 bus_space_tag_t iot = sc->sc_iot; 2498 bus_space_handle_t ioh = sc->sc_ioh; 2499 int phase; 2500 2501 phase = iha_wait(sc, MSG_ACCEPT); 2502 2503 if (phase == PHASE_MSG_IN) { 2504 phase = iha_wait(sc, XF_FIFO_IN); 2505 2506 if (phase != -1) { 2507 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 2508 bus_space_read_1(iot, ioh, TUL_SFIFO); 2509 bus_space_read_1(iot, ioh, TUL_SFIFO); 2510 2511 phase = iha_wait(sc, MSG_ACCEPT); 2512 } 2513 } 2514 2515 return (phase); 2516 } 2517 2518 static int 2519 iha_msgout(sc, msg) 2520 struct iha_softc *sc; 2521 u_int8_t msg; 2522 { 2523 2524 bus_space_write_1(sc->sc_iot, sc->sc_ioh, TUL_SFIFO, msg); 2525 2526 return (iha_wait(sc, XF_FIFO_OUT)); 2527 } 2528 2529 static void 2530 iha_msgout_abort(sc, aborttype) 2531 struct iha_softc *sc; 2532 u_int8_t aborttype; 2533 { 2534 2535 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2536 2537 switch (iha_wait(sc, MSG_ACCEPT)) { 2538 case -1: 2539 break; 2540 2541 case PHASE_MSG_OUT: 2542 sc->sc_flags |= FLAG_EXPECT_DISC; 2543 if (iha_msgout(sc, aborttype) != -1) 2544 iha_bad_seq(sc); 2545 break; 2546 2547 default: 2548 iha_bad_seq(sc); 2549 break; 2550 } 2551 } 2552 2553 static int 2554 iha_msgout_reject(sc) 2555 struct iha_softc *sc; 2556 { 2557 2558 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2559 2560 if (iha_wait(sc, MSG_ACCEPT) == PHASE_MSG_OUT) 2561 return (iha_msgout(sc, MSG_MESSAGE_REJECT)); 2562 2563 return (-1); 2564 } 2565 2566 static int 2567 iha_msgout_extended(sc) 2568 struct iha_softc *sc; 2569 { 2570 bus_space_tag_t iot = sc->sc_iot; 2571 bus_space_handle_t ioh = sc->sc_ioh; 2572 int phase; 2573 2574 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_EXTENDED); 2575 2576 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2577 sc->sc_msg, sc->sc_msg[0] + 1); 2578 2579 phase = iha_wait(sc, XF_FIFO_OUT); 2580 2581 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2582 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 2583 2584 return (phase); 2585 } 2586 2587 static int 2588 iha_msgout_wdtr(sc) 2589 struct iha_softc *sc; 2590 { 2591 2592 sc->sc_actscb->tcs->flags |= FLAG_WIDE_DONE; 2593 2594 sc->sc_msg[0] = MSG_EXT_WDTR_LEN; 2595 sc->sc_msg[1] = MSG_EXT_WDTR; 2596 sc->sc_msg[2] = MSG_EXT_WDTR_BUS_16_BIT; 2597 2598 return (iha_msgout_extended(sc)); 2599 } 2600 2601 static int 2602 iha_msgout_sdtr(sc) 2603 struct iha_softc *sc; 2604 { 2605 struct tcs *tcs = sc->sc_actscb->tcs; 2606 2607 tcs->flags |= FLAG_SYNC_DONE; 2608 2609 sc->sc_msg[0] = MSG_EXT_SDTR_LEN; 2610 sc->sc_msg[1] = MSG_EXT_SDTR; 2611 sc->sc_msg[2] = iha_rate_tbl[tcs->flags & FLAG_SCSI_RATE]; 2612 sc->sc_msg[3] = IHA_MAX_OFFSET; /* REQ/ACK */ 2613 2614 return (iha_msgout_extended(sc)); 2615 } 2616 2617 static void 2618 iha_wide_done(sc) 2619 struct iha_softc *sc; 2620 { 2621 bus_space_tag_t iot = sc->sc_iot; 2622 bus_space_handle_t ioh = sc->sc_ioh; 2623 struct tcs *tcs = sc->sc_actscb->tcs; 2624 2625 tcs->syncm = 0; 2626 tcs->period = 0; 2627 tcs->offset = 0; 2628 2629 if (sc->sc_msg[2] != 0) 2630 tcs->syncm |= PERIOD_WIDE_SCSI; 2631 2632 tcs->sconfig0 &= ~ALTPD; 2633 tcs->flags &= ~FLAG_SYNC_DONE; 2634 tcs->flags |= FLAG_WIDE_DONE; 2635 2636 iha_update_xfer_mode(sc, sc->sc_actscb->target); 2637 2638 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 2639 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 2640 } 2641 2642 static void 2643 iha_sync_done(sc) 2644 struct iha_softc *sc; 2645 { 2646 bus_space_tag_t iot = sc->sc_iot; 2647 bus_space_handle_t ioh = sc->sc_ioh; 2648 struct tcs *tcs = sc->sc_actscb->tcs; 2649 int i; 2650 2651 tcs->period = sc->sc_msg[2]; 2652 tcs->offset = sc->sc_msg[3]; 2653 if (tcs->offset != 0) { 2654 tcs->syncm |= tcs->offset; 2655 2656 /* pick the highest possible rate */ 2657 for (i = 0; i < sizeof(iha_rate_tbl); i++) 2658 if (iha_rate_tbl[i] >= tcs->period) 2659 break; 2660 2661 tcs->syncm |= (i << 4); 2662 tcs->sconfig0 |= ALTPD; 2663 } 2664 2665 tcs->flags |= FLAG_SYNC_DONE; 2666 2667 iha_update_xfer_mode(sc, sc->sc_actscb->target); 2668 2669 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 2670 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 2671 } 2672 2673 /* 2674 * iha_bad_seq - a SCSI bus phase was encountered out of the 2675 * correct/expected sequence. Reset the SCSI bus. 2676 */ 2677 static void 2678 iha_bad_seq(sc) 2679 struct iha_softc *sc; 2680 { 2681 struct iha_scb *scb = sc->sc_actscb; 2682 2683 if (scb != NULL) 2684 iha_append_done_scb(sc, scb, HOST_BAD_PHAS); 2685 2686 iha_reset_scsi_bus(sc); 2687 iha_reset_chip(sc); 2688 } 2689 2690 /* 2691 * iha_read_eeprom - read Serial EEPROM value & set to defaults 2692 * if required. XXX - Writing does NOT work! 2693 */ 2694 static void 2695 iha_read_eeprom(sc, eeprom) 2696 struct iha_softc *sc; 2697 struct iha_eeprom *eeprom; 2698 { 2699 bus_space_tag_t iot = sc->sc_iot; 2700 bus_space_handle_t ioh = sc->sc_ioh; 2701 u_int16_t *buf = (u_int16_t *)eeprom; 2702 u_int8_t gctrl; 2703 2704 /* Enable EEProm programming */ 2705 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) | EEPRG; 2706 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2707 2708 /* Read EEProm */ 2709 if (iha_se2_rd_all(sc, buf) == 0) 2710 panic("%s: cannot read EEPROM\n", sc->sc_dev.dv_xname); 2711 2712 /* Disable EEProm programming */ 2713 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) & ~EEPRG; 2714 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2715 } 2716 2717 #ifdef notused 2718 /* 2719 * iha_se2_update_all - Update SCSI H/A configuration parameters from 2720 * serial EEPROM Setup default pattern. Only 2721 * change those values different from the values 2722 * in iha_eeprom. 2723 */ 2724 static void 2725 iha_se2_update_all(sc) 2726 struct iha_softc *sc; 2727 { 2728 bus_space_tag_t iot = sc->sc_iot; 2729 bus_space_handle_t ioh = sc->sc_ioh; 2730 u_int16_t *np; 2731 u_int32_t chksum; 2732 int i; 2733 2734 /* Enable erase/write state of EEPROM */ 2735 iha_se2_instr(sc, ENABLE_ERASE); 2736 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2737 EEP_WAIT(); 2738 2739 np = (u_int16_t *)&eeprom_default; 2740 2741 for (i = 0, chksum = 0; i < EEPROM_SIZE - 1; i++) { 2742 iha_se2_wr(sc, i, *np); 2743 chksum += *np++; 2744 } 2745 2746 chksum &= 0x0000ffff; 2747 iha_se2_wr(sc, 31, chksum); 2748 2749 /* Disable erase/write state of EEPROM */ 2750 iha_se2_instr(sc, 0); 2751 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2752 EEP_WAIT(); 2753 } 2754 2755 /* 2756 * iha_se2_wr - write the given 16 bit value into the Serial EEPROM 2757 * at the specified offset 2758 */ 2759 static void 2760 iha_se2_wr(sc, addr, writeword) 2761 struct iha_softc *sc; 2762 int addr; 2763 u_int16_t writeword; 2764 { 2765 bus_space_tag_t iot = sc->sc_iot; 2766 bus_space_handle_t ioh = sc->sc_ioh; 2767 int i, bit; 2768 2769 /* send 'WRITE' Instruction == address | WRITE bit */ 2770 iha_se2_instr(sc, addr | WRITE); 2771 2772 for (i = 16; i > 0; i--) { 2773 if (writeword & (1 << (i - 1))) 2774 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRDO); 2775 else 2776 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2777 EEP_WAIT(); 2778 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2779 EEP_WAIT(); 2780 } 2781 2782 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2783 EEP_WAIT(); 2784 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2785 EEP_WAIT(); 2786 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2787 EEP_WAIT(); 2788 2789 for (;;) { 2790 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2791 EEP_WAIT(); 2792 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2793 EEP_WAIT(); 2794 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI; 2795 EEP_WAIT(); 2796 if (bit != 0) 2797 break; /* write complete */ 2798 } 2799 2800 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2801 } 2802 #endif 2803 2804 /* 2805 * iha_se2_rd - read & return the 16 bit value at the specified 2806 * offset in the Serial E2PROM 2807 * 2808 */ 2809 static u_int16_t 2810 iha_se2_rd(sc, addr) 2811 struct iha_softc *sc; 2812 int addr; 2813 { 2814 bus_space_tag_t iot = sc->sc_iot; 2815 bus_space_handle_t ioh = sc->sc_ioh; 2816 int i, bit; 2817 u_int16_t readword; 2818 2819 /* Send 'READ' instruction == address | READ bit */ 2820 iha_se2_instr(sc, addr | READ); 2821 2822 readword = 0; 2823 for (i = 16; i > 0; i--) { 2824 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2825 EEP_WAIT(); 2826 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2827 EEP_WAIT(); 2828 /* sample data after the following edge of clock */ 2829 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI ? 1 : 0; 2830 EEP_WAIT(); 2831 2832 readword |= bit << (i - 1); 2833 } 2834 2835 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2836 2837 return (readword); 2838 } 2839 2840 /* 2841 * iha_se2_rd_all - Read SCSI H/A config parameters from serial EEPROM 2842 */ 2843 static int 2844 iha_se2_rd_all(sc, buf) 2845 struct iha_softc *sc; 2846 u_int16_t *buf; 2847 { 2848 struct iha_eeprom *eeprom = (struct iha_eeprom *)buf; 2849 u_int32_t chksum; 2850 int i; 2851 2852 for (i = 0, chksum = 0; i < EEPROM_SIZE - 1; i++) { 2853 *buf = iha_se2_rd(sc, i); 2854 chksum += *buf++; 2855 } 2856 *buf = iha_se2_rd(sc, 31); /* read checksum from EEPROM */ 2857 2858 chksum &= 0x0000ffff; /* lower 16 bits */ 2859 2860 return (eeprom->signature == EEP_SIGNATURE) && 2861 (eeprom->checksum == chksum); 2862 } 2863 2864 /* 2865 * iha_se2_instr - write an octet to serial E2PROM one bit at a time 2866 */ 2867 static void 2868 iha_se2_instr(sc, instr) 2869 struct iha_softc *sc; 2870 int instr; 2871 { 2872 bus_space_tag_t iot = sc->sc_iot; 2873 bus_space_handle_t ioh = sc->sc_ioh; 2874 int b, i; 2875 2876 b = NVRCS | NVRDO; /* Write the start bit (== 1) */ 2877 2878 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2879 EEP_WAIT(); 2880 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2881 EEP_WAIT(); 2882 2883 for (i = 8; i > 0; i--) { 2884 if (instr & (1 << (i - 1))) 2885 b = NVRCS | NVRDO; /* Write a 1 bit */ 2886 else 2887 b = NVRCS; /* Write a 0 bit */ 2888 2889 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2890 EEP_WAIT(); 2891 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2892 EEP_WAIT(); 2893 } 2894 2895 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2896 } 2897
Indexes created Tue Sep 23 21:09:50 GMT 2025