iha.c revision 1.8
1 /* $NetBSD: iha.c,v 1.8 2001/07/27 16:16:34 tsutsui Exp $ */ 2 /* 3 * Initio INI-9xxxU/UW SCSI Device Driver 4 * 5 * Copyright (c) 2000 Ken Westerback 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer, 13 * without modification, immediately at the beginning of the file. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 26 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 *------------------------------------------------------------------------- 30 * 31 * Ported from i91u.c, provided by Initio Corporation, which credits: 32 * 33 * Device driver for the INI-9XXXU/UW or INIC-940/950 PCI SCSI Controller. 34 * 35 * FreeBSD 36 * 37 * Written for 386bsd and FreeBSD by 38 * Winston Hung <winstonh (at) initio.com> 39 * 40 * Copyright (c) 1997-99 Initio Corp. All rights reserved. 41 * 42 *------------------------------------------------------------------------- 43 */ 44 45 /* 46 * Ported to NetBSD by Izumi Tsutsui <tsutsui (at) ceres.dti.ne.jp> from OpenBSD: 47 * $OpenBSD: iha.c,v 1.3 2001/02/20 00:47:33 krw Exp $ 48 */ 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/kernel.h> 53 #include <sys/buf.h> 54 #include <sys/device.h> 55 #include <sys/malloc.h> 56 57 #include <uvm/uvm_extern.h> 58 59 #include <machine/bus.h> 60 #include <machine/intr.h> 61 62 #include <dev/scsipi/scsi_all.h> 63 #include <dev/scsipi/scsipi_all.h> 64 #include <dev/scsipi/scsiconf.h> 65 #include <dev/scsipi/scsi_message.h> 66 67 #include <dev/ic/ihareg.h> 68 #include <dev/ic/ihavar.h> 69 70 /* 71 * SCSI Rate Table, indexed by FLAG_SCSI_RATE field of 72 * tcs flags. 73 */ 74 static const u_int8_t iha_rate_tbl[8] = { 75 /* fast 20 */ 76 /* nanosecond divide by 4 */ 77 12, /* 50ns, 20M */ 78 18, /* 75ns, 13.3M */ 79 25, /* 100ns, 10M */ 80 31, /* 125ns, 8M */ 81 37, /* 150ns, 6.6M */ 82 43, /* 175ns, 5.7M */ 83 50, /* 200ns, 5M */ 84 62 /* 250ns, 4M */ 85 }; 86 87 #ifdef notused 88 static u_int16_t eeprom_default[EEPROM_SIZE] = { 89 /* -- Header ------------------------------------ */ 90 /* signature */ 91 EEP_SIGNATURE, 92 /* size, revision */ 93 EEP_WORD(EEPROM_SIZE * 2, 0x01), 94 /* -- Host Adapter Structure -------------------- */ 95 /* model */ 96 0x0095, 97 /* model info, number of channel */ 98 EEP_WORD(0x00, 1), 99 /* BIOS config */ 100 EEP_BIOSCFG_DEFAULT, 101 /* host adapter config */ 102 0, 103 104 /* -- eeprom_adapter[0] ------------------------------- */ 105 /* ID, adapter config 1 */ 106 EEP_WORD(7, CFG_DEFAULT), 107 /* adapter config 2, number of targets */ 108 EEP_WORD(0x00, 8), 109 /* target flags */ 110 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 111 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 112 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 113 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 114 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 115 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 116 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 117 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 118 119 /* -- eeprom_adapter[1] ------------------------------- */ 120 /* ID, adapter config 1 */ 121 EEP_WORD(7, CFG_DEFAULT), 122 /* adapter config 2, number of targets */ 123 EEP_WORD(0x00, 8), 124 /* target flags */ 125 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 126 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 127 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 128 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 129 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 130 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 131 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 132 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 133 /* reserved[5] */ 134 0, 0, 0, 0, 0, 135 /* checksum */ 136 0 137 }; 138 #endif 139 140 static u_int8_t iha_data_over_run(struct iha_scsi_req_q *); 141 142 static int iha_push_sense_request(struct iha_softc *, struct iha_scsi_req_q *); 143 static void iha_timeout(void *); 144 static int iha_alloc_sglist(struct iha_softc *); 145 146 static void iha_read_eeprom(struct iha_softc *, struct iha_eeprom *); 147 static int iha_se2_rd_all(struct iha_softc *, u_int16_t *); 148 static void iha_se2_instr(struct iha_softc *, int); 149 static u_int16_t iha_se2_rd(struct iha_softc *, int); 150 #ifdef notused 151 static void iha_se2_update_all(struct iha_softc *); 152 static void iha_se2_wr(struct iha_softc *, int, u_int16_t); 153 #endif 154 155 static void iha_reset_scsi_bus(struct iha_softc *); 156 static void iha_reset_chip(struct iha_softc *); 157 static void iha_reset_dma(struct iha_softc *); 158 159 static void iha_reset_tcs(struct tcs *, u_int8_t); 160 161 static void iha_done_scb(struct iha_softc *, struct iha_scsi_req_q *); 162 static void iha_exec_scb(struct iha_softc *, struct iha_scsi_req_q *); 163 164 static void iha_main(struct iha_softc *); 165 static void iha_scsi(struct iha_softc *); 166 167 static int iha_wait(struct iha_softc *, u_int8_t); 168 169 static __inline void iha_mark_busy_scb(struct iha_scsi_req_q *); 170 171 static void iha_append_free_scb(struct iha_softc *, struct iha_scsi_req_q *); 172 static void iha_append_done_scb(struct iha_softc *, struct iha_scsi_req_q *, 173 u_int8_t); 174 static __inline struct iha_scsi_req_q *iha_pop_done_scb(struct iha_softc *); 175 176 static __inline void iha_append_pend_scb(struct iha_softc *, 177 struct iha_scsi_req_q *); 178 static __inline void iha_push_pend_scb(struct iha_softc *, 179 struct iha_scsi_req_q *); 180 static __inline void iha_del_pend_scb(struct iha_softc *, 181 struct iha_scsi_req_q *); 182 static struct iha_scsi_req_q *iha_find_pend_scb(struct iha_softc *); 183 184 static void iha_sync_done(struct iha_softc *); 185 static void iha_wide_done(struct iha_softc *); 186 static void iha_bad_seq(struct iha_softc *); 187 188 static int iha_next_state(struct iha_softc *); 189 static int iha_state_1(struct iha_softc *); 190 static int iha_state_2(struct iha_softc *); 191 static int iha_state_3(struct iha_softc *); 192 static int iha_state_4(struct iha_softc *); 193 static int iha_state_5(struct iha_softc *); 194 static int iha_state_6(struct iha_softc *); 195 static int iha_state_8(struct iha_softc *); 196 197 static void iha_set_ssig(struct iha_softc *, u_int8_t, u_int8_t); 198 199 static int iha_xpad_in(struct iha_softc *); 200 static int iha_xpad_out(struct iha_softc *); 201 202 static int iha_xfer_data(struct iha_softc *, struct iha_scsi_req_q *, 203 int direction); 204 205 static int iha_status_msg(struct iha_softc *); 206 207 static int iha_msgin(struct iha_softc *); 208 static int iha_msgin_sdtr(struct iha_softc *); 209 static int iha_msgin_extended(struct iha_softc *); 210 static int iha_msgin_ignore_wid_resid(struct iha_softc *); 211 212 static int iha_msgout(struct iha_softc *, u_int8_t); 213 static int iha_msgout_extended(struct iha_softc *); 214 static void iha_msgout_abort(struct iha_softc *, u_int8_t); 215 static int iha_msgout_reject(struct iha_softc *); 216 static int iha_msgout_sdtr(struct iha_softc *); 217 static int iha_msgout_wdtr(struct iha_softc *); 218 219 static void iha_select(struct iha_softc *, struct iha_scsi_req_q *, u_int8_t); 220 221 static void iha_busfree(struct iha_softc *); 222 static int iha_resel(struct iha_softc *); 223 224 static void iha_abort_xs(struct iha_softc *, struct scsipi_xfer *, u_int8_t); 225 226 static void iha_minphys(struct buf *); 227 void iha_scsipi_request(struct scsipi_channel *, scsipi_adapter_req_t, 228 void *arg); 229 230 /* 231 * iha_intr - the interrupt service routine for the iha driver 232 */ 233 int 234 iha_intr(arg) 235 void *arg; 236 { 237 bus_space_tag_t iot; 238 bus_space_handle_t ioh; 239 struct iha_softc *sc; 240 int s; 241 242 sc = (struct iha_softc *)arg; 243 iot = sc->sc_iot; 244 ioh = sc->sc_ioh; 245 246 if ((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 247 return (0); 248 249 s = splbio(); /* XXX - Or are interrupts off when ISR's are called? */ 250 251 if (sc->sc_semaph != SEMAPH_IN_MAIN) { 252 /* XXX - need these inside a splbio()/splx()? */ 253 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 254 sc->sc_semaph = SEMAPH_IN_MAIN; 255 256 iha_main(sc); 257 258 sc->sc_semaph = ~SEMAPH_IN_MAIN; 259 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 260 } 261 262 splx(s); 263 264 return (1); 265 } 266 267 void 268 iha_scsipi_request(chan, req, arg) 269 struct scsipi_channel *chan; 270 scsipi_adapter_req_t req; 271 void *arg; 272 { 273 struct scsipi_xfer *xs; 274 struct scsipi_periph *periph; 275 struct iha_scsi_req_q *scb; 276 struct iha_softc *sc; 277 int error, flags, s; 278 279 sc = (struct iha_softc *)chan->chan_adapter->adapt_dev; 280 281 switch (req) { 282 case ADAPTER_REQ_RUN_XFER: 283 xs = arg; 284 periph = xs->xs_periph; 285 flags = xs->xs_control; 286 287 if (xs->cmdlen > sizeof(struct scsi_generic) || 288 periph->periph_target >= IHA_MAX_TARGETS) { 289 xs->error = XS_DRIVER_STUFFUP; 290 return; 291 } 292 293 s = splbio(); 294 scb = TAILQ_FIRST(&sc->sc_freescb); 295 if (scb != NULL) { 296 scb->status = STATUS_RENT; 297 TAILQ_REMOVE(&sc->sc_freescb, scb, chain); 298 } 299 #ifdef DIAGNOSTIC 300 else { 301 scsipi_printaddr(periph); 302 printf("unable to allocate scb\n"); 303 panic("iha_scsipi_request"); 304 } 305 #endif 306 splx(s); 307 308 scb->target = periph->periph_target; 309 scb->lun = periph->periph_lun; 310 scb->tcs = &sc->sc_tcs[scb->target]; 311 scb->flags = xs->xs_control; /* XXX */ 312 scb->scb_id = MSG_IDENTIFY(periph->periph_lun, 313 (xs->xs_control & XS_CTL_REQSENSE) == 0); 314 315 scb->xs = xs; 316 scb->timeout = xs->timeout; 317 scb->cmdlen = xs->cmdlen; 318 memcpy(&scb->cmd, xs->cmd, xs->cmdlen); 319 320 scb->buflen = xs->datalen; 321 322 if (scb->buflen > 0) { 323 error = bus_dmamap_load(sc->sc_dmat, scb->dmap, 324 xs->data, scb->buflen, NULL, 325 ((xs->xs_control & XS_CTL_NOSLEEP) ? 326 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) | 327 BUS_DMA_STREAMING | 328 ((xs->xs_control & XS_CTL_DATA_IN) ? 329 BUS_DMA_READ : BUS_DMA_WRITE)); 330 331 if (error) { 332 printf("%s: error %d loading dma map\n", 333 sc->sc_dev.dv_xname, error); 334 iha_append_free_scb(sc, scb); 335 xs->error = XS_DRIVER_STUFFUP; 336 scsipi_done(xs); 337 return; 338 } 339 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 340 0, scb->dmap->dm_mapsize, 341 (xs->xs_control & XS_CTL_DATA_IN) ? 342 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 343 } 344 345 iha_exec_scb(sc, scb); 346 return; 347 348 case ADAPTER_REQ_GROW_RESOURCES: 349 return; /* XXX */ 350 351 case ADAPTER_REQ_SET_XFER_MODE: 352 return; /* XXX */ 353 } 354 } 355 356 void 357 iha_attach(sc) 358 struct iha_softc *sc; 359 { 360 bus_space_tag_t iot = sc->sc_iot; 361 bus_space_handle_t ioh = sc->sc_ioh; 362 struct iha_scsi_req_q *scb; 363 struct iha_eeprom eeprom; 364 struct eeprom_adapter *conf; 365 int i, error, reg; 366 367 iha_read_eeprom(sc, &eeprom); 368 369 conf = &eeprom.adapter[0]; 370 371 /* 372 * fill in the rest of the iha_softc fields 373 */ 374 sc->sc_id = CFG_ID(conf->config1); 375 sc->sc_semaph = ~SEMAPH_IN_MAIN; 376 sc->sc_status0 = 0; 377 sc->sc_actscb = NULL; 378 379 TAILQ_INIT(&sc->sc_freescb); 380 TAILQ_INIT(&sc->sc_pendscb); 381 TAILQ_INIT(&sc->sc_donescb); 382 error = iha_alloc_sglist(sc); 383 if (error != 0) { 384 printf(": cannot allocate sglist\n"); 385 return; 386 } 387 388 sc->sc_scb = malloc(sizeof(struct iha_scsi_req_q) * IHA_MAX_SCB, 389 M_DEVBUF, M_NOWAIT); 390 if (sc->sc_scb == NULL) { 391 printf(": cannot allocate SCB\n"); 392 return; 393 } 394 memset(sc->sc_scb, 0, sizeof(struct iha_scsi_req_q) * IHA_MAX_SCB); 395 396 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) { 397 scb->scb_tagid = i; 398 scb->sgoffset = IHA_SG_SIZE * i; 399 scb->sglist = &sc->sc_sglist[i].sg_element[0]; 400 scb->sg_addr = 401 sc->sc_dmamap->dm_segs[0].ds_addr + scb->sgoffset; 402 403 error = bus_dmamap_create(sc->sc_dmat, 404 (IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE, IHA_MAX_SG_ENTRIES, 405 (IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE, 0, 406 BUS_DMA_NOWAIT, &scb->dmap); 407 408 if (error != 0) { 409 printf(": couldn't create SCB DMA map, error = %d\n", 410 error); 411 return; 412 } 413 TAILQ_INSERT_TAIL(&sc->sc_freescb, scb, chain); 414 } 415 416 /* Mask all the interrupts */ 417 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 418 419 /* Stop any I/O and reset the scsi module */ 420 iha_reset_dma(sc); 421 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSMOD); 422 423 /* Program HBA's SCSI ID */ 424 bus_space_write_1(iot, ioh, TUL_SID, sc->sc_id << 4); 425 426 /* 427 * Configure the channel as requested by the NVRAM settings read 428 * by iha_read_eeprom() above. 429 */ 430 431 sc->sc_sconf1 = SCONFIG0DEFAULT; 432 if ((conf->config1 & CFG_EN_PAR) != 0) 433 sc->sc_sconf1 |= SPCHK; 434 bus_space_write_1(iot, ioh, TUL_SCONFIG0, sc->sc_sconf1); 435 436 /* set selection time out 250 ms */ 437 bus_space_write_1(iot, ioh, TUL_STIMO, STIMO_250MS); 438 439 /* Enable desired SCSI termination configuration read from eeprom */ 440 reg = 0; 441 if (conf->config1 & CFG_ACT_TERM1) 442 reg |= ENTMW; 443 if (conf->config1 & CFG_ACT_TERM2) 444 reg |= ENTM; 445 bus_space_write_1(iot, ioh, TUL_DCTRL0, reg); 446 447 reg = bus_space_read_1(iot, ioh, TUL_GCTRL1) & ~ATDEN; 448 if (conf->config1 & CFG_AUTO_TERM) 449 reg |= ATDEN; 450 bus_space_write_1(iot, ioh, TUL_GCTRL1, reg); 451 452 for (i = 0; i < IHA_MAX_TARGETS / 2; i++) { 453 sc->sc_tcs[i * 2 ].flags = EEP_LBYTE(conf->tflags[i]); 454 sc->sc_tcs[i * 2 + 1].flags = EEP_HBYTE(conf->tflags[i]); 455 iha_reset_tcs(&sc->sc_tcs[i * 2 ], sc->sc_sconf1); 456 iha_reset_tcs(&sc->sc_tcs[i * 2 + 1], sc->sc_sconf1); 457 } 458 459 iha_reset_chip(sc); 460 bus_space_write_1(iot, ioh, TUL_SIEN, ALL_INTERRUPTS); 461 462 /* 463 * fill in the adapter. 464 */ 465 sc->sc_adapter.adapt_dev = &sc->sc_dev; 466 sc->sc_adapter.adapt_nchannels = 1; 467 sc->sc_adapter.adapt_openings = IHA_MAX_SCB; 468 sc->sc_adapter.adapt_max_periph = IHA_MAX_SCB; 469 sc->sc_adapter.adapt_ioctl = NULL; 470 sc->sc_adapter.adapt_minphys = iha_minphys; 471 sc->sc_adapter.adapt_request = iha_scsipi_request; 472 473 /* 474 * fill in the channel. 475 */ 476 sc->sc_channel.chan_adapter = &sc->sc_adapter; 477 sc->sc_channel.chan_bustype = &scsi_bustype; 478 sc->sc_channel.chan_channel = 0; 479 sc->sc_channel.chan_ntargets = CFG_TARGET(conf->config2); 480 sc->sc_channel.chan_nluns = 8; 481 sc->sc_channel.chan_id = sc->sc_id; 482 483 /* 484 * Now try to attach all the sub devices. 485 */ 486 config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 487 } 488 489 /* 490 * iha_minphys - reduce bp->b_bcount to something less than 491 * or equal to the largest I/O possible through 492 * the adapter. Called from higher layers 493 * via sc->sc_adapter.scsi_minphys. 494 */ 495 static void 496 iha_minphys(bp) 497 struct buf *bp; 498 { 499 if (bp->b_bcount > ((IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE)) 500 bp->b_bcount = ((IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE); 501 502 minphys(bp); 503 } 504 505 /* 506 * iha_reset_dma - abort any active DMA xfer, reset tulip FIFO. 507 */ 508 static void 509 iha_reset_dma(sc) 510 struct iha_softc *sc; 511 { 512 bus_space_tag_t iot = sc->sc_iot; 513 bus_space_handle_t ioh = sc->sc_ioh; 514 515 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 516 /* if DMA xfer is pending, abort DMA xfer */ 517 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 518 /* wait Abort DMA xfer done */ 519 while ((bus_space_read_1(iot, ioh, TUL_ISTUS0) & DABT) == 0) 520 ; 521 } 522 523 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 524 } 525 526 /* 527 * iha_append_free_scb - append the supplied SCB to the tail of the 528 * sc_freescb queue after clearing and resetting 529 * everything possible. 530 */ 531 static void 532 iha_append_free_scb(sc, scb) 533 struct iha_softc *sc; 534 struct iha_scsi_req_q *scb; 535 { 536 int s; 537 538 s = splbio(); 539 540 if (scb == sc->sc_actscb) 541 sc->sc_actscb = NULL; 542 543 scb->status = STATUS_QUEUED; 544 scb->ha_stat = HOST_OK; 545 scb->ta_stat = SCSI_OK; 546 547 scb->nextstat = 0; 548 scb->sg_index = 0; 549 scb->sg_max = 0; 550 scb->flags = 0; 551 scb->target = 0; 552 scb->lun = 0; 553 scb->buflen = 0; 554 scb->sg_size = 0; 555 scb->cmdlen = 0; 556 scb->scb_id = 0; 557 scb->scb_tagmsg = 0; 558 scb->timeout = 0; 559 scb->bufaddr = 0; 560 561 scb->xs = NULL; 562 scb->tcs = NULL; 563 564 memset(scb->cmd, 0, sizeof(scb->cmd)); 565 memset(scb->sglist, 0, sizeof(scb->sglist)); 566 567 /* 568 * scb_tagid, sg_addr, sglist 569 * SCB_SensePtr are set at initialization 570 * and never change 571 */ 572 573 TAILQ_INSERT_TAIL(&sc->sc_freescb, scb, chain); 574 575 splx(s); 576 } 577 578 static __inline void 579 iha_append_pend_scb(sc, scb) 580 struct iha_softc *sc; 581 struct iha_scsi_req_q *scb; 582 { 583 /* ASSUMPTION: only called within a splbio()/splx() pair */ 584 585 if (scb == sc->sc_actscb) 586 sc->sc_actscb = NULL; 587 588 scb->status = STATUS_QUEUED; 589 590 TAILQ_INSERT_TAIL(&sc->sc_pendscb, scb, chain); 591 } 592 593 static __inline void 594 iha_push_pend_scb(sc, scb) 595 struct iha_softc *sc; 596 struct iha_scsi_req_q *scb; 597 { 598 int s; 599 600 s = splbio(); 601 602 if (scb == sc->sc_actscb) 603 sc->sc_actscb = NULL; 604 605 scb->status = STATUS_QUEUED; 606 607 TAILQ_INSERT_HEAD(&sc->sc_pendscb, scb, chain); 608 609 splx(s); 610 } 611 612 /* 613 * iha_find_pend_scb - scan the pending queue for a SCB that can be 614 * processed immediately. Return NULL if none found 615 * and a pointer to the SCB if one is found. If there 616 * is an active SCB, return NULL! 617 */ 618 static struct iha_scsi_req_q * 619 iha_find_pend_scb(sc) 620 struct iha_softc *sc; 621 { 622 struct iha_scsi_req_q *scb; 623 struct tcs *tcs; 624 int s; 625 626 s = splbio(); 627 628 if (sc->sc_actscb != NULL) 629 scb = NULL; 630 631 else 632 TAILQ_FOREACH(scb, &sc->sc_pendscb, chain) { 633 if ((scb->flags & XS_CTL_RESET) != 0) 634 /* ALWAYS willing to reset a device */ 635 break; 636 637 tcs = scb->tcs; 638 639 if ((scb->scb_tagmsg) != 0) { 640 /* 641 * A Tagged I/O. OK to start If no 642 * non-tagged I/O is active on the same 643 * target 644 */ 645 if (tcs->ntagscb == NULL) 646 break; 647 648 } else if (scb->cmd[0] == REQUEST_SENSE) { 649 /* 650 * OK to do a non-tagged request sense 651 * even if a non-tagged I/O has been 652 * started, 'cuz we don't allow any 653 * disconnect during a request sense op 654 */ 655 break; 656 657 } else if (tcs->tagcnt == 0) { 658 /* 659 * No tagged I/O active on this target, 660 * ok to start a non-tagged one if one 661 * is not already active 662 */ 663 if (tcs->ntagscb == NULL) 664 break; 665 } 666 } 667 668 splx(s); 669 670 return (scb); 671 } 672 673 /* 674 * iha_del_pend_scb - remove scb from sc_pendscb 675 */ 676 static __inline void 677 iha_del_pend_scb(sc, scb) 678 struct iha_softc *sc; 679 struct iha_scsi_req_q *scb; 680 { 681 int s; 682 683 s = splbio(); 684 685 TAILQ_REMOVE(&sc->sc_pendscb, scb, chain); 686 687 splx(s); 688 } 689 690 static __inline void 691 iha_mark_busy_scb(scb) 692 struct iha_scsi_req_q *scb; 693 { 694 int s; 695 696 s = splbio(); 697 698 scb->status = STATUS_BUSY; 699 700 if (scb->scb_tagmsg == 0) 701 scb->tcs->ntagscb = scb; 702 else 703 scb->tcs->tagcnt++; 704 705 splx(s); 706 } 707 708 static void 709 iha_append_done_scb(sc, scb, hastat) 710 struct iha_softc *sc; 711 struct iha_scsi_req_q *scb; 712 u_int8_t hastat; 713 { 714 struct tcs *tcs; 715 int s; 716 717 s = splbio(); 718 719 if (scb->xs != NULL) 720 callout_stop(&scb->xs->xs_callout); 721 722 if (scb == sc->sc_actscb) 723 sc->sc_actscb = NULL; 724 725 tcs = scb->tcs; 726 727 if (scb->scb_tagmsg != 0) { 728 if (tcs->tagcnt) 729 tcs->tagcnt--; 730 } else if (tcs->ntagscb == scb) 731 tcs->ntagscb = NULL; 732 733 scb->status = STATUS_QUEUED; 734 scb->ha_stat = hastat; 735 736 TAILQ_INSERT_TAIL(&sc->sc_donescb, scb, chain); 737 738 splx(s); 739 } 740 741 static __inline struct iha_scsi_req_q * 742 iha_pop_done_scb(sc) 743 struct iha_softc *sc; 744 { 745 struct iha_scsi_req_q *scb; 746 int s; 747 748 s = splbio(); 749 750 scb = TAILQ_FIRST(&sc->sc_donescb); 751 752 if (scb != NULL) { 753 scb->status = STATUS_RENT; 754 TAILQ_REMOVE(&sc->sc_donescb, scb, chain); 755 } 756 757 splx(s); 758 759 return (scb); 760 } 761 762 /* 763 * iha_abort_xs - find the SCB associated with the supplied xs and 764 * stop all processing on it, moving it to the done 765 * queue with the supplied host status value. 766 */ 767 static void 768 iha_abort_xs(sc, xs, hastat) 769 struct iha_softc *sc; 770 struct scsipi_xfer *xs; 771 u_int8_t hastat; 772 { 773 struct iha_scsi_req_q *scb; 774 int i, s; 775 776 s = splbio(); 777 778 /* Check the pending queue for the SCB pointing to xs */ 779 780 TAILQ_FOREACH(scb, &sc->sc_pendscb, chain) 781 if (scb->xs == xs) { 782 iha_del_pend_scb(sc, scb); 783 iha_append_done_scb(sc, scb, hastat); 784 splx(s); 785 return; 786 } 787 788 /* 789 * If that didn't work, check all BUSY/SELECTING SCB's for one 790 * pointing to xs 791 */ 792 793 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 794 switch (scb->status) { 795 case STATUS_BUSY: 796 case STATUS_SELECT: 797 if (scb->xs == xs) { 798 iha_append_done_scb(sc, scb, hastat); 799 splx(s); 800 return; 801 } 802 break; 803 default: 804 break; 805 } 806 807 splx(s); 808 } 809 810 /* 811 * iha_bad_seq - a SCSI bus phase was encountered out of the 812 * correct/expected sequence. Reset the SCSI bus. 813 */ 814 static void 815 iha_bad_seq(sc) 816 struct iha_softc *sc; 817 { 818 struct iha_scsi_req_q *scb = sc->sc_actscb; 819 820 if (scb != NULL) 821 iha_append_done_scb(sc, scb, HOST_BAD_PHAS); 822 823 iha_reset_scsi_bus(sc); 824 iha_reset_chip(sc); 825 } 826 827 /* 828 * iha_push_sense_request - obtain auto sense data by pushing the 829 * SCB needing it back onto the pending 830 * queue with a REQUEST_SENSE CDB. 831 */ 832 static int 833 iha_push_sense_request(sc, scb) 834 struct iha_softc *sc; 835 struct iha_scsi_req_q *scb; 836 { 837 struct scsipi_xfer *xs = scb->xs; 838 struct scsipi_periph *periph = xs->xs_periph; 839 struct scsipi_sense *ss = (struct scsipi_sense *)scb->cmd; 840 int lun = periph->periph_lun; 841 int err; 842 843 ss->opcode = REQUEST_SENSE; 844 ss->byte2 = lun << SCSI_CMD_LUN_SHIFT; 845 ss->unused[0] = ss->unused[1] = 0; 846 ss->length = sizeof(struct scsipi_sense_data); 847 ss->control = 0; 848 849 scb->flags &= ~(FLAG_SG | XS_CTL_DATA_OUT); 850 scb->flags |= FLAG_RSENS | XS_CTL_DATA_IN; 851 852 scb->scb_id &= ~MSG_IDENTIFY_DISCFLAG; 853 854 scb->scb_tagmsg = 0; 855 scb->ta_stat = SCSI_OK; 856 857 scb->cmdlen = sizeof(struct scsipi_sense); 858 scb->buflen = ss->length; 859 860 err = bus_dmamap_load(sc->sc_dmat, scb->dmap, 861 &xs->sense.scsi_sense, scb->buflen, NULL, 862 BUS_DMA_READ|BUS_DMA_NOWAIT); 863 if (err != 0) { 864 printf("iha_push_sense_request: cannot bus_dmamap_load()\n"); 865 xs->error = XS_DRIVER_STUFFUP; 866 return 1; 867 } 868 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 869 0, scb->buflen, BUS_DMASYNC_PREREAD); 870 871 /* XXX What about queued command? */ 872 iha_exec_scb(sc, scb); 873 874 return 0; 875 } 876 877 /* 878 * iha_main - process the active SCB, taking one off pending and making it 879 * active if necessary, and any done SCB's created as 880 * a result until there are no interrupts pending and no pending 881 * SCB's that can be started. 882 */ 883 static void 884 iha_main(sc) 885 struct iha_softc *sc; 886 { 887 bus_space_tag_t iot = sc->sc_iot; 888 bus_space_handle_t ioh =sc->sc_ioh; 889 struct iha_scsi_req_q *scb; 890 891 for (;;) { 892 iha_scsi(sc); 893 894 while ((scb = iha_pop_done_scb(sc)) != NULL) 895 iha_done_scb(sc, scb); 896 897 /* 898 * If there are no interrupts pending, or we can't start 899 * a pending sc, break out of the for(;;). Otherwise 900 * continue the good work with another call to 901 * iha_scsi(). 902 */ 903 if (((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 904 && (iha_find_pend_scb(sc) == NULL)) 905 break; 906 } 907 } 908 909 /* 910 * iha_scsi - service any outstanding interrupts. If there are none, try to 911 * start another SCB currently in the pending queue. 912 */ 913 static void 914 iha_scsi(sc) 915 struct iha_softc *sc; 916 { 917 bus_space_tag_t iot = sc->sc_iot; 918 bus_space_handle_t ioh = sc->sc_ioh; 919 struct iha_scsi_req_q *scb; 920 struct tcs *tcs; 921 u_int8_t stat; 922 923 /* service pending interrupts asap */ 924 925 stat = bus_space_read_1(iot, ioh, TUL_STAT0); 926 if ((stat & INTPD) != 0) { 927 sc->sc_status0 = stat; 928 sc->sc_status1 = bus_space_read_1(iot, ioh, TUL_STAT1); 929 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 930 931 sc->sc_phase = sc->sc_status0 & PH_MASK; 932 933 if ((sc->sc_sistat & SRSTD) != 0) { 934 iha_reset_scsi_bus(sc); 935 return; 936 } 937 938 if ((sc->sc_sistat & RSELED) != 0) { 939 iha_resel(sc); 940 return; 941 } 942 943 if ((sc->sc_sistat & (STIMEO | DISCD)) != 0) { 944 iha_busfree(sc); 945 return; 946 } 947 948 if ((sc->sc_sistat & (SCMDN | SBSRV)) != 0) { 949 iha_next_state(sc); 950 return; 951 } 952 953 if ((sc->sc_sistat & SELED) != 0) 954 iha_set_ssig(sc, 0, 0); 955 } 956 957 /* 958 * There were no interrupts pending which required action elsewhere, so 959 * see if it is possible to start the selection phase on a pending SCB 960 */ 961 if ((scb = iha_find_pend_scb(sc)) == NULL) 962 return; 963 964 tcs = scb->tcs; 965 966 /* program HBA's SCSI ID & target SCSI ID */ 967 bus_space_write_1(iot, ioh, TUL_SID, (sc->sc_id << 4) | scb->target); 968 969 if ((scb->flags & XS_CTL_RESET) == 0) { 970 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 971 972 if ((tcs->flags & FLAG_NO_NEG_SYNC) == 0 || 973 (tcs->flags & FLAG_NO_NEG_WIDE) == 0) 974 iha_select(sc, scb, SELATNSTOP); 975 976 else if (scb->scb_tagmsg != 0) 977 iha_select(sc, scb, SEL_ATN3); 978 979 else 980 iha_select(sc, scb, SEL_ATN); 981 982 } else { 983 iha_select(sc, scb, SELATNSTOP); 984 scb->nextstat = 8; 985 } 986 987 if ((scb->flags & XS_CTL_POLL) != 0) { 988 for (; scb->timeout > 0; scb->timeout--) { 989 if (iha_wait(sc, NO_OP) == -1) 990 break; 991 if (iha_next_state(sc) == -1) 992 break; 993 delay(1000); /* Only happens in boot, so it's ok */ 994 } 995 996 /* 997 * Since done queue processing not done until AFTER this 998 * function returns, scb is on the done queue, not 999 * the free queue at this point and still has valid data 1000 * 1001 * Conversely, xs->error has not been set yet 1002 */ 1003 if (scb->timeout == 0) 1004 iha_timeout(scb); 1005 } 1006 } 1007 1008 /* 1009 * iha_data_over_run - return HOST_OK for all SCSI opcodes where BufLen 1010 * is an 'Allocation Length'. All other SCSI opcodes 1011 * get HOST_DO_DU as they SHOULD have xferred all the 1012 * data requested. 1013 * 1014 * The list of opcodes using 'Allocation Length' was 1015 * found by scanning all the SCSI-3 T10 drafts. See 1016 * www.t10.org for the curious with a .pdf reader. 1017 */ 1018 static u_int8_t 1019 iha_data_over_run(scb) 1020 struct iha_scsi_req_q *scb; 1021 { 1022 switch (scb->cmd[0]) { 1023 case 0x03: /* Request Sense SPC-2 */ 1024 case 0x12: /* Inquiry SPC-2 */ 1025 case 0x1a: /* Mode Sense (6 byte version) SPC-2 */ 1026 case 0x1c: /* Receive Diagnostic Results SPC-2 */ 1027 case 0x23: /* Read Format Capacities MMC-2 */ 1028 case 0x29: /* Read Generation SBC */ 1029 case 0x34: /* Read Position SSC-2 */ 1030 case 0x37: /* Read Defect Data SBC */ 1031 case 0x3c: /* Read Buffer SPC-2 */ 1032 case 0x42: /* Read Sub Channel MMC-2 */ 1033 case 0x43: /* Read TOC/PMA/ATIP MMC */ 1034 1035 /* XXX - 2 with same opcode of 0x44? */ 1036 case 0x44: /* Read Header/Read Density Suprt MMC/SSC*/ 1037 1038 case 0x46: /* Get Configuration MMC-2 */ 1039 case 0x4a: /* Get Event/Status Notification MMC-2 */ 1040 case 0x4d: /* Log Sense SPC-2 */ 1041 case 0x51: /* Read Disc Information MMC */ 1042 case 0x52: /* Read Track Information MMC */ 1043 case 0x59: /* Read Master CUE MMC */ 1044 case 0x5a: /* Mode Sense (10 byte version) SPC-2 */ 1045 case 0x5c: /* Read Buffer Capacity MMC */ 1046 case 0x5e: /* Persistant Reserve In SPC-2 */ 1047 case 0x84: /* Receive Copy Results SPC-2 */ 1048 case 0xa0: /* Report LUNs SPC-2 */ 1049 case 0xa3: /* Various Report requests SBC-2/SCC-2*/ 1050 case 0xa4: /* Report Key MMC-2 */ 1051 case 0xad: /* Read DVD Structure MMC-2 */ 1052 case 0xb4: /* Read Element Status (Attached) SMC */ 1053 case 0xb5: /* Request Volume Element Address SMC */ 1054 case 0xb7: /* Read Defect Data (12 byte ver.) SBC */ 1055 case 0xb8: /* Read Element Status (Independ.) SMC */ 1056 case 0xba: /* Report Redundancy SCC-2 */ 1057 case 0xbd: /* Mechanism Status MMC */ 1058 case 0xbe: /* Report Basic Redundancy SCC-2 */ 1059 1060 return (HOST_OK); 1061 break; 1062 1063 default: 1064 return (HOST_DO_DU); 1065 break; 1066 } 1067 } 1068 1069 /* 1070 * iha_next_state - prcess the current SCB as requested in it's 1071 * nextstat member. 1072 */ 1073 static int 1074 iha_next_state(sc) 1075 struct iha_softc *sc; 1076 { 1077 1078 if (sc->sc_actscb == NULL) 1079 return (-1); 1080 1081 switch (sc->sc_actscb->nextstat) { 1082 case 1: 1083 if (iha_state_1(sc) == 3) 1084 goto state_3; 1085 break; 1086 1087 case 2: 1088 switch (iha_state_2(sc)) { 1089 case 3: 1090 goto state_3; 1091 case 4: 1092 goto state_4; 1093 default: 1094 break; 1095 } 1096 break; 1097 1098 case 3: 1099 state_3: 1100 if (iha_state_3(sc) == 4) 1101 goto state_4; 1102 break; 1103 1104 case 4: 1105 state_4: 1106 switch (iha_state_4(sc)) { 1107 case 0: 1108 return (0); 1109 case 6: 1110 goto state_6; 1111 default: 1112 break; 1113 } 1114 break; 1115 1116 case 5: 1117 switch (iha_state_5(sc)) { 1118 case 4: 1119 goto state_4; 1120 case 6: 1121 goto state_6; 1122 default: 1123 break; 1124 } 1125 break; 1126 1127 case 6: 1128 state_6: 1129 iha_state_6(sc); 1130 break; 1131 1132 case 8: 1133 iha_state_8(sc); 1134 break; 1135 1136 default: 1137 #ifdef IHA_DEBUG_STATE 1138 printf("[debug] -unknown state: %i-\n", 1139 sc->sc_actscb->nextstat); 1140 #endif 1141 iha_bad_seq(sc); 1142 break; 1143 } 1144 1145 return (-1); 1146 } 1147 1148 /* 1149 * iha_state_1 - selection is complete after a SELATNSTOP. If the target 1150 * has put the bus into MSG_OUT phase start wide/sync 1151 * negotiation. Otherwise clear the FIFO and go to state 3, 1152 * which will send the SCSI CDB to the target. 1153 */ 1154 static int 1155 iha_state_1(sc) 1156 struct iha_softc *sc; 1157 { 1158 bus_space_tag_t iot = sc->sc_iot; 1159 bus_space_handle_t ioh = sc->sc_ioh; 1160 struct iha_scsi_req_q *scb = sc->sc_actscb; 1161 struct tcs *tcs; 1162 int flags; 1163 1164 iha_mark_busy_scb(scb); 1165 1166 tcs = scb->tcs; 1167 1168 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 1169 1170 /* 1171 * If we are in PHASE_MSG_OUT, send 1172 * a) IDENT message (with tags if appropriate) 1173 * b) WDTR if the target is configured to negotiate wide xfers 1174 * ** OR ** 1175 * c) SDTR if the target is configured to negotiate sync xfers 1176 * but not wide ones 1177 * 1178 * If we are NOT, then the target is not asking for anything but 1179 * the data/command, so go straight to state 3. 1180 */ 1181 if (sc->sc_phase == PHASE_MSG_OUT) { 1182 bus_space_write_1(iot, ioh, TUL_SCTRL1, (ESBUSIN | EHRSL)); 1183 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 1184 1185 if (scb->scb_tagmsg != 0) { 1186 bus_space_write_1(iot, ioh, TUL_SFIFO, 1187 scb->scb_tagmsg); 1188 bus_space_write_1(iot, ioh, TUL_SFIFO, 1189 scb->scb_tagid); 1190 } 1191 1192 flags = tcs->flags; 1193 if ((flags & FLAG_NO_NEG_WIDE) == 0) { 1194 if (iha_msgout_wdtr(sc) == -1) 1195 return (-1); 1196 } else if ((flags & FLAG_NO_NEG_SYNC) == 0) { 1197 if (iha_msgout_sdtr(sc) == -1) 1198 return (-1); 1199 } 1200 1201 } else { 1202 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1203 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 1204 } 1205 1206 return (3); 1207 } 1208 1209 /* 1210 * iha_state_2 - selection is complete after a SEL_ATN or SEL_ATN3. If the SCSI 1211 * CDB has already been send, go to state 4 to start the data 1212 * xfer. Otherwise reset the FIFO and go to state 3, sending 1213 * the SCSI CDB. 1214 */ 1215 static int 1216 iha_state_2(sc) 1217 struct iha_softc *sc; 1218 { 1219 bus_space_tag_t iot = sc->sc_iot; 1220 bus_space_handle_t ioh = sc->sc_ioh; 1221 struct iha_scsi_req_q *scb = sc->sc_actscb; 1222 1223 iha_mark_busy_scb(scb); 1224 1225 bus_space_write_1(iot, ioh, TUL_SCONFIG0, scb->tcs->sconfig0); 1226 1227 if ((sc->sc_status1 & CPDNE) != 0) 1228 return (4); 1229 1230 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1231 1232 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 1233 1234 return (3); 1235 } 1236 1237 /* 1238 * iha_state_3 - send the SCSI CDB to the target, processing any status 1239 * or other messages received until that is done or 1240 * abandoned. 1241 */ 1242 static int 1243 iha_state_3(sc) 1244 struct iha_softc *sc; 1245 { 1246 bus_space_tag_t iot = sc->sc_iot; 1247 bus_space_handle_t ioh = sc->sc_ioh; 1248 struct iha_scsi_req_q *scb = sc->sc_actscb; 1249 int flags; 1250 1251 for (;;) { 1252 switch (sc->sc_phase) { 1253 case PHASE_CMD_OUT: 1254 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 1255 scb->cmd, scb->cmdlen); 1256 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1257 return (-1); 1258 else if (sc->sc_phase == PHASE_CMD_OUT) { 1259 iha_bad_seq(sc); 1260 return (-1); 1261 } else 1262 return (4); 1263 1264 case PHASE_MSG_IN: 1265 scb->nextstat = 3; 1266 if (iha_msgin(sc) == -1) 1267 return (-1); 1268 break; 1269 1270 case PHASE_STATUS_IN: 1271 if (iha_status_msg(sc) == -1) 1272 return (-1); 1273 break; 1274 1275 case PHASE_MSG_OUT: 1276 flags = scb->tcs->flags; 1277 if ((flags & FLAG_NO_NEG_SYNC) != 0) { 1278 if (iha_msgout(sc, MSG_NOOP) == -1) 1279 return (-1); 1280 } else if (iha_msgout_sdtr(sc) == -1) 1281 return (-1); 1282 break; 1283 1284 default: 1285 printf("[debug] -s3- bad phase = %d\n", sc->sc_phase); 1286 iha_bad_seq(sc); 1287 return (-1); 1288 } 1289 } 1290 } 1291 1292 /* 1293 * iha_state_4 - start a data xfer. Handle any bus state 1294 * transitions until PHASE_DATA_IN/_OUT 1295 * or the attempt is abandoned. If there is 1296 * no data to xfer, go to state 6 and finish 1297 * processing the current SCB. 1298 */ 1299 static int 1300 iha_state_4(sc) 1301 struct iha_softc *sc; 1302 { 1303 struct iha_scsi_req_q *scb = sc->sc_actscb; 1304 1305 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) == 1306 (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) 1307 return (6); /* Both dir flags set => NO xfer was requested */ 1308 1309 for (;;) { 1310 if (scb->buflen == 0) 1311 return (6); 1312 1313 switch (sc->sc_phase) { 1314 case PHASE_STATUS_IN: 1315 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) 1316 != 0) 1317 scb->ha_stat = iha_data_over_run(scb); 1318 if ((iha_status_msg(sc)) == -1) 1319 return (-1); 1320 break; 1321 1322 case PHASE_MSG_IN: 1323 scb->nextstat = 4; 1324 if (iha_msgin(sc) == -1) 1325 return (-1); 1326 break; 1327 1328 case PHASE_MSG_OUT: 1329 if ((sc->sc_status0 & SPERR) != 0) { 1330 scb->buflen = 0; 1331 scb->ha_stat = HOST_SPERR; 1332 if (iha_msgout(sc, MSG_INITIATOR_DET_ERR) == -1) 1333 return (-1); 1334 else 1335 return (6); 1336 } else { 1337 if (iha_msgout(sc, MSG_NOOP) == -1) 1338 return (-1); 1339 } 1340 break; 1341 1342 case PHASE_DATA_IN: 1343 return (iha_xfer_data(sc, scb, XS_CTL_DATA_IN)); 1344 1345 case PHASE_DATA_OUT: 1346 return (iha_xfer_data(sc, scb, XS_CTL_DATA_OUT)); 1347 1348 default: 1349 iha_bad_seq(sc); 1350 return (-1); 1351 } 1352 } 1353 } 1354 1355 /* 1356 * iha_state_5 - handle the partial or final completion of the current 1357 * data xfer. If DMA is still active stop it. If there is 1358 * more data to xfer, go to state 4 and start the xfer. 1359 * If not go to state 6 and finish the SCB. 1360 */ 1361 static int 1362 iha_state_5(sc) 1363 struct iha_softc *sc; 1364 { 1365 bus_space_tag_t iot = sc->sc_iot; 1366 bus_space_handle_t ioh = sc->sc_ioh; 1367 struct iha_scsi_req_q *scb = sc->sc_actscb; 1368 struct iha_sg_element *sg; 1369 u_int32_t cnt; 1370 u_int8_t period, stat; 1371 long xcnt; /* cannot use unsigned!! see code: if (xcnt < 0) */ 1372 int i; 1373 1374 cnt = bus_space_read_4(iot, ioh, TUL_STCNT0) & TCNT; 1375 1376 /* 1377 * Stop any pending DMA activity and check for parity error. 1378 */ 1379 1380 if ((bus_space_read_1(iot, ioh, TUL_DCMD) & XDIR) != 0) { 1381 /* Input Operation */ 1382 if ((sc->sc_status0 & SPERR) != 0) 1383 scb->ha_stat = HOST_SPERR; 1384 1385 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1386 bus_space_write_1(iot, ioh, TUL_DCTRL0, 1387 bus_space_read_1(iot, ioh, TUL_DCTRL0) | SXSTP); 1388 while (bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) 1389 ; 1390 } 1391 1392 } else { 1393 /* Output Operation */ 1394 if ((sc->sc_status1 & SXCMP) == 0) { 1395 period = scb->tcs->syncm; 1396 if ((period & PERIOD_WIDE_SCSI) != 0) 1397 cnt += (bus_space_read_1(iot, ioh, 1398 TUL_SFIFOCNT) & FIFOC) * 2; 1399 else 1400 cnt += bus_space_read_1(iot, ioh, 1401 TUL_SFIFOCNT) & FIFOC; 1402 } 1403 1404 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1405 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 1406 do 1407 stat = bus_space_read_1(iot, ioh, TUL_ISTUS0); 1408 while ((stat & DABT) == 0); 1409 } 1410 1411 if ((cnt == 1) && (sc->sc_phase == PHASE_DATA_OUT)) { 1412 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1413 return (-1); 1414 cnt = 0; 1415 1416 } else if ((sc->sc_status1 & SXCMP) == 0) 1417 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1418 } 1419 1420 if (cnt == 0) { 1421 scb->buflen = 0; 1422 return (6); 1423 } 1424 1425 /* Update active data pointer and restart the I/O at the new point */ 1426 1427 xcnt = scb->buflen - cnt; /* xcnt == bytes xferred */ 1428 scb->buflen = cnt; /* cnt == bytes left */ 1429 1430 if ((scb->flags & FLAG_SG) != 0) { 1431 sg = &scb->sglist[scb->sg_index]; 1432 for (i = scb->sg_index; i < scb->sg_max; sg++, i++) { 1433 xcnt -= le32toh(sg->sg_len); 1434 if (xcnt < 0) { 1435 xcnt += le32toh(sg->sg_len); 1436 1437 sg->sg_addr = 1438 htole32(le32toh(sg->sg_addr) + xcnt); 1439 sg->sg_len = 1440 htole32(le32toh(sg->sg_len) - xcnt); 1441 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1442 scb->sgoffset, IHA_SG_SIZE, 1443 BUS_DMASYNC_PREWRITE); 1444 1445 scb->bufaddr += (i - scb->sg_index) * 1446 sizeof(struct iha_sg_element); 1447 scb->sg_size = scb->sg_max - i; 1448 scb->sg_index = i; 1449 1450 return (4); 1451 } 1452 } 1453 return (6); 1454 1455 } else 1456 scb->bufaddr += xcnt; 1457 1458 return (4); 1459 } 1460 1461 /* 1462 * iha_state_6 - finish off the active scb (may require several 1463 * iterations if PHASE_MSG_IN) and return -1 to indicate 1464 * the bus is free. 1465 */ 1466 static int 1467 iha_state_6(sc) 1468 struct iha_softc *sc; 1469 { 1470 1471 for (;;) { 1472 switch (sc->sc_phase) { 1473 case PHASE_STATUS_IN: 1474 if (iha_status_msg(sc) == -1) 1475 return (-1); 1476 break; 1477 1478 case PHASE_MSG_IN: 1479 sc->sc_actscb->nextstat = 6; 1480 if ((iha_msgin(sc)) == -1) 1481 return (-1); 1482 break; 1483 1484 case PHASE_MSG_OUT: 1485 if ((iha_msgout(sc, MSG_NOOP)) == -1) 1486 return (-1); 1487 break; 1488 1489 case PHASE_DATA_IN: 1490 if (iha_xpad_in(sc) == -1) 1491 return (-1); 1492 break; 1493 1494 case PHASE_DATA_OUT: 1495 if (iha_xpad_out(sc) == -1) 1496 return (-1); 1497 break; 1498 1499 default: 1500 iha_bad_seq(sc); 1501 return (-1); 1502 } 1503 } 1504 } 1505 1506 /* 1507 * iha_state_8 - reset the active device and all busy SCBs using it 1508 */ 1509 static int 1510 iha_state_8(sc) 1511 struct iha_softc *sc; 1512 { 1513 bus_space_tag_t iot = sc->sc_iot; 1514 bus_space_handle_t ioh = sc->sc_ioh; 1515 struct iha_scsi_req_q *scb; 1516 int i; 1517 u_int8_t tar; 1518 1519 if (sc->sc_phase == PHASE_MSG_OUT) { 1520 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_BUS_DEV_RESET); 1521 1522 scb = sc->sc_actscb; 1523 1524 /* This SCB finished correctly -- resetting the device */ 1525 iha_append_done_scb(sc, scb, HOST_OK); 1526 1527 iha_reset_tcs(scb->tcs, sc->sc_sconf1); 1528 1529 tar = scb->target; 1530 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 1531 if (scb->target == tar) 1532 switch (scb->status) { 1533 case STATUS_BUSY: 1534 iha_append_done_scb(sc, 1535 scb, HOST_DEV_RST); 1536 break; 1537 1538 case STATUS_SELECT: 1539 iha_push_pend_scb(sc, scb); 1540 break; 1541 1542 default: 1543 break; 1544 } 1545 1546 sc->sc_flags |= FLAG_EXPECT_DISC; 1547 1548 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1549 return (-1); 1550 } 1551 1552 iha_bad_seq(sc); 1553 return (-1); 1554 } 1555 1556 /* 1557 * iha_xfer_data - initiate the DMA xfer of the data 1558 */ 1559 static int 1560 iha_xfer_data(sc, scb, direction) 1561 struct iha_softc *sc; 1562 struct iha_scsi_req_q *scb; 1563 int direction; 1564 { 1565 bus_space_tag_t iot = sc->sc_iot; 1566 bus_space_handle_t ioh = sc->sc_ioh; 1567 u_int32_t xferlen; 1568 u_int8_t xfertype; 1569 1570 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) != direction) 1571 return (6); /* wrong direction, abandon I/O */ 1572 1573 bus_space_write_4(iot, ioh, TUL_STCNT0, scb->buflen); 1574 1575 if ((scb->flags & FLAG_SG) == 0) { 1576 xferlen = scb->buflen; 1577 xfertype = (direction == XS_CTL_DATA_IN) ? ST_X_IN : ST_X_OUT; 1578 1579 } else { 1580 xferlen = scb->sg_size * sizeof(struct iha_sg_element); 1581 xfertype = (direction == XS_CTL_DATA_IN) ? ST_SG_IN : ST_SG_OUT; 1582 } 1583 1584 bus_space_write_4(iot, ioh, TUL_DXC, xferlen); 1585 bus_space_write_4(iot, ioh, TUL_DXPA, scb->bufaddr); 1586 bus_space_write_1(iot, ioh, TUL_DCMD, xfertype); 1587 1588 bus_space_write_1(iot, ioh, TUL_SCMD, 1589 (direction == XS_CTL_DATA_IN) ? XF_DMA_IN : XF_DMA_OUT); 1590 1591 scb->nextstat = 5; 1592 1593 return (0); 1594 } 1595 1596 static int 1597 iha_xpad_in(sc) 1598 struct iha_softc *sc; 1599 { 1600 bus_space_tag_t iot = sc->sc_iot; 1601 bus_space_handle_t ioh = sc->sc_ioh; 1602 struct iha_scsi_req_q *scb = sc->sc_actscb; 1603 1604 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) != 0) 1605 scb->ha_stat = HOST_DO_DU; 1606 1607 for (;;) { 1608 if ((scb->tcs->syncm & PERIOD_WIDE_SCSI) != 0) 1609 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 1610 else 1611 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1612 1613 switch (iha_wait(sc, XF_FIFO_IN)) { 1614 case -1: 1615 return (-1); 1616 1617 case PHASE_DATA_IN: 1618 bus_space_read_1(iot, ioh, TUL_SFIFO); 1619 break; 1620 1621 default: 1622 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1623 return (6); 1624 } 1625 } 1626 } 1627 1628 static int 1629 iha_xpad_out(sc) 1630 struct iha_softc *sc; 1631 { 1632 bus_space_tag_t iot = sc->sc_iot; 1633 bus_space_handle_t ioh = sc->sc_ioh; 1634 struct iha_scsi_req_q *scb = sc->sc_actscb; 1635 1636 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) != 0) 1637 scb->ha_stat = HOST_DO_DU; 1638 1639 for (;;) { 1640 if ((scb->tcs->syncm & PERIOD_WIDE_SCSI) != 0) 1641 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 1642 else 1643 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1644 1645 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 1646 1647 switch (iha_wait(sc, XF_FIFO_OUT)) { 1648 case -1: 1649 return (-1); 1650 1651 case PHASE_DATA_OUT: 1652 break; 1653 1654 default: 1655 /* Disable wide CPU to allow read 16 bits */ 1656 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1657 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1658 return (6); 1659 } 1660 } 1661 } 1662 1663 static int 1664 iha_status_msg(sc) 1665 struct iha_softc *sc; 1666 { 1667 bus_space_tag_t iot = sc->sc_iot; 1668 bus_space_handle_t ioh = sc->sc_ioh; 1669 struct iha_scsi_req_q *scb; 1670 u_int8_t msg; 1671 int phase; 1672 1673 if ((phase = iha_wait(sc, CMD_COMP)) == -1) 1674 return (-1); 1675 1676 scb = sc->sc_actscb; 1677 1678 scb->ta_stat = bus_space_read_1(iot, ioh, TUL_SFIFO); 1679 1680 if (phase == PHASE_MSG_OUT) { 1681 if ((sc->sc_status0 & SPERR) == 0) 1682 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_NOOP); 1683 else 1684 bus_space_write_1(iot, ioh, TUL_SFIFO, 1685 MSG_PARITY_ERROR); 1686 1687 return (iha_wait(sc, XF_FIFO_OUT)); 1688 1689 } else if (phase == PHASE_MSG_IN) { 1690 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 1691 1692 if ((sc->sc_status0 & SPERR) != 0) 1693 switch (iha_wait(sc, MSG_ACCEPT)) { 1694 case -1: 1695 return (-1); 1696 case PHASE_MSG_OUT: 1697 bus_space_write_1(iot, ioh, TUL_SFIFO, 1698 MSG_PARITY_ERROR); 1699 return (iha_wait(sc, XF_FIFO_OUT)); 1700 default: 1701 iha_bad_seq(sc); 1702 return (-1); 1703 } 1704 1705 if (msg == MSG_CMDCOMPLETE) { 1706 if ((scb->ta_stat & 1707 (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) { 1708 iha_bad_seq(sc); 1709 return (-1); 1710 } 1711 sc->sc_flags |= FLAG_EXPECT_DONE_DISC; 1712 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1713 return (iha_wait(sc, MSG_ACCEPT)); 1714 } 1715 1716 if ((msg == MSG_LINK_CMD_COMPLETE) 1717 || (msg == MSG_LINK_CMD_COMPLETEF)) { 1718 if ((scb->ta_stat & 1719 (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) 1720 return (iha_wait(sc, MSG_ACCEPT)); 1721 } 1722 } 1723 1724 iha_bad_seq(sc); 1725 return (-1); 1726 } 1727 1728 /* 1729 * iha_busfree - SCSI bus free detected as a result of a TIMEOUT or 1730 * DISCONNECT interrupt. Reset the tulip FIFO and 1731 * SCONFIG0 and enable hardware reselect. Move any active 1732 * SCB to sc_donescb list. Return an appropriate host status 1733 * if an I/O was active. 1734 */ 1735 static void 1736 iha_busfree(sc) 1737 struct iha_softc *sc; 1738 { 1739 bus_space_tag_t iot = sc->sc_iot; 1740 bus_space_handle_t ioh = sc->sc_ioh; 1741 struct iha_scsi_req_q *scb; 1742 1743 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1744 bus_space_write_1(iot, ioh, TUL_SCONFIG0, SCONFIG0DEFAULT); 1745 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1746 1747 scb = sc->sc_actscb; 1748 1749 if (scb != NULL) { 1750 if (scb->status == STATUS_SELECT) 1751 /* selection timeout */ 1752 iha_append_done_scb(sc, scb, HOST_SEL_TOUT); 1753 else 1754 /* Unexpected bus free */ 1755 iha_append_done_scb(sc, scb, HOST_BAD_PHAS); 1756 } 1757 } 1758 1759 static void 1760 iha_reset_scsi_bus(sc) 1761 struct iha_softc *sc; 1762 { 1763 struct iha_scsi_req_q *scb; 1764 struct tcs *tcs; 1765 int i, s; 1766 1767 s = splbio(); 1768 1769 iha_reset_dma(sc); 1770 1771 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 1772 switch (scb->status) { 1773 case STATUS_BUSY: 1774 iha_append_done_scb(sc, scb, HOST_SCSI_RST); 1775 break; 1776 1777 case STATUS_SELECT: 1778 iha_push_pend_scb(sc, scb); 1779 break; 1780 1781 default: 1782 break; 1783 } 1784 1785 for (i = 0, tcs = sc->sc_tcs; i < IHA_MAX_TARGETS; i++, tcs++) 1786 iha_reset_tcs(tcs, sc->sc_sconf1); 1787 1788 splx(s); 1789 } 1790 1791 /* 1792 * iha_resel - handle a detected SCSI bus reselection request. 1793 */ 1794 static int 1795 iha_resel(sc) 1796 struct iha_softc *sc; 1797 { 1798 bus_space_tag_t iot = sc->sc_iot; 1799 bus_space_handle_t ioh = sc->sc_ioh; 1800 struct iha_scsi_req_q *scb; 1801 struct tcs *tcs; 1802 u_int8_t tag, target, lun, msg, abortmsg; 1803 1804 if (sc->sc_actscb != NULL) { 1805 if ((sc->sc_actscb->status == STATUS_SELECT)) 1806 iha_push_pend_scb(sc, sc->sc_actscb); 1807 sc->sc_actscb = NULL; 1808 } 1809 1810 target = bus_space_read_1(iot, ioh, TUL_SBID); 1811 lun = bus_space_read_1(iot, ioh, TUL_SALVC) & MSG_IDENTIFY_LUNMASK; 1812 1813 tcs = &sc->sc_tcs[target]; 1814 1815 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 1816 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 1817 1818 abortmsg = MSG_ABORT; /* until a valid tag has been obtained */ 1819 1820 if (tcs->ntagscb != NULL) 1821 /* There is a non-tagged I/O active on the target */ 1822 scb = tcs->ntagscb; 1823 1824 else { 1825 /* 1826 * Since there is no active non-tagged operation 1827 * read the tag type, the tag itself, and find 1828 * the appropriate scb by indexing sc_scb with 1829 * the tag. 1830 */ 1831 1832 switch (iha_wait(sc, MSG_ACCEPT)) { 1833 case -1: 1834 return (-1); 1835 case PHASE_MSG_IN: 1836 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1837 if ((iha_wait(sc, XF_FIFO_IN)) == -1) 1838 return (-1); 1839 break; 1840 default: 1841 goto abort; 1842 } 1843 1844 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag Msg */ 1845 1846 if ((msg < MSG_SIMPLE_Q_TAG) || (msg > MSG_ORDERED_Q_TAG)) 1847 goto abort; 1848 1849 switch (iha_wait(sc, MSG_ACCEPT)) { 1850 case -1: 1851 return (-1); 1852 case PHASE_MSG_IN: 1853 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1854 if ((iha_wait(sc, XF_FIFO_IN)) == -1) 1855 return (-1); 1856 break; 1857 default: 1858 goto abort; 1859 } 1860 1861 tag = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag ID */ 1862 scb = &sc->sc_scb[tag]; 1863 1864 abortmsg = MSG_ABORT_TAG; /* Now that we have valdid tag! */ 1865 } 1866 1867 if ((scb->target != target) 1868 || (scb->lun != lun) 1869 || (scb->status != STATUS_BUSY)) { 1870 abort: 1871 iha_msgout_abort(sc, abortmsg); 1872 return (-1); 1873 } 1874 1875 sc->sc_actscb = scb; 1876 1877 if (iha_wait(sc, MSG_ACCEPT) == -1) 1878 return (-1); 1879 1880 return (iha_next_state(sc)); 1881 } 1882 1883 static int 1884 iha_msgin(sc) 1885 struct iha_softc *sc; 1886 { 1887 bus_space_tag_t iot = sc->sc_iot; 1888 bus_space_handle_t ioh = sc->sc_ioh; 1889 int flags; 1890 int phase; 1891 u_int8_t msg; 1892 1893 for (;;) { 1894 if ((bus_space_read_1(iot, ioh, TUL_SFIFOCNT) & FIFOC) > 0) 1895 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1896 1897 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1898 1899 phase = iha_wait(sc, XF_FIFO_IN); 1900 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 1901 1902 switch (msg) { 1903 case MSG_DISCONNECT: 1904 sc->sc_flags |= FLAG_EXPECT_DISC; 1905 if (iha_wait(sc, MSG_ACCEPT) != -1) 1906 iha_bad_seq(sc); 1907 phase = -1; 1908 break; 1909 case MSG_SAVEDATAPOINTER: 1910 case MSG_RESTOREPOINTERS: 1911 case MSG_NOOP: 1912 phase = iha_wait(sc, MSG_ACCEPT); 1913 break; 1914 case MSG_MESSAGE_REJECT: 1915 /* XXX - need to clear FIFO like other 'Clear ATN'?*/ 1916 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 1917 flags = sc->sc_actscb->tcs->flags; 1918 if ((flags & FLAG_NO_NEG_SYNC) == 0) 1919 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 1920 phase = iha_wait(sc, MSG_ACCEPT); 1921 break; 1922 case MSG_EXTENDED: 1923 phase = iha_msgin_extended(sc); 1924 break; 1925 case MSG_IGN_WIDE_RESIDUE: 1926 phase = iha_msgin_ignore_wid_resid(sc); 1927 break; 1928 case MSG_CMDCOMPLETE: 1929 sc->sc_flags |= FLAG_EXPECT_DONE_DISC; 1930 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1931 phase = iha_wait(sc, MSG_ACCEPT); 1932 if (phase != -1) { 1933 iha_bad_seq(sc); 1934 return (-1); 1935 } 1936 break; 1937 default: 1938 printf("[debug] iha_msgin: bad msg type: %d\n", msg); 1939 phase = iha_msgout_reject(sc); 1940 break; 1941 } 1942 1943 if (phase != PHASE_MSG_IN) 1944 return (phase); 1945 } 1946 /* NOTREACHED */ 1947 } 1948 1949 static int 1950 iha_msgin_ignore_wid_resid(sc) 1951 struct iha_softc *sc; 1952 { 1953 bus_space_tag_t iot = sc->sc_iot; 1954 bus_space_handle_t ioh = sc->sc_ioh; 1955 int phase; 1956 1957 phase = iha_wait(sc, MSG_ACCEPT); 1958 1959 if (phase == PHASE_MSG_IN) { 1960 phase = iha_wait(sc, XF_FIFO_IN); 1961 1962 if (phase != -1) { 1963 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 1964 bus_space_read_1(iot, ioh, TUL_SFIFO); 1965 bus_space_read_1(iot, ioh, TUL_SFIFO); 1966 1967 phase = iha_wait(sc, MSG_ACCEPT); 1968 } 1969 } 1970 1971 return (phase); 1972 } 1973 1974 static int 1975 iha_msgin_extended(sc) 1976 struct iha_softc *sc; 1977 { 1978 bus_space_tag_t iot = sc->sc_iot; 1979 bus_space_handle_t ioh = sc->sc_ioh; 1980 int flags, i, phase, msglen, msgcode; 1981 1982 /* 1983 * XXX - can we just stop reading and reject, or do we have to 1984 * read all input, discarding the excess, and then reject 1985 */ 1986 for (i = 0; i < IHA_MAX_EXTENDED_MSG; i++) { 1987 phase = iha_wait(sc, MSG_ACCEPT); 1988 1989 if (phase != PHASE_MSG_IN) 1990 return (phase); 1991 1992 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1993 1994 if (iha_wait(sc, XF_FIFO_IN) == -1) 1995 return (-1); 1996 1997 sc->sc_msg[i] = bus_space_read_1(iot, ioh, TUL_SFIFO); 1998 1999 if (sc->sc_msg[0] == i) 2000 break; 2001 } 2002 2003 msglen = sc->sc_msg[0]; 2004 msgcode = sc->sc_msg[1]; 2005 2006 if ((msglen == MSG_EXT_SDTR_LEN) && (msgcode == MSG_EXT_SDTR)) { 2007 if (iha_msgin_sdtr(sc) == 0) { 2008 iha_sync_done(sc); 2009 return (iha_wait(sc, MSG_ACCEPT)); 2010 } 2011 2012 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2013 2014 phase = iha_wait(sc, MSG_ACCEPT); 2015 if (phase != PHASE_MSG_OUT) 2016 return (phase); 2017 2018 /* Clear FIFO for important message - final SYNC offer */ 2019 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2020 2021 iha_sync_done(sc); /* This is our final offer */ 2022 2023 } else if ((msglen == MSG_EXT_WDTR_LEN) && (msgcode == MSG_EXT_WDTR)) { 2024 2025 flags = sc->sc_actscb->tcs->flags; 2026 2027 if ((flags & FLAG_NO_WIDE) != 0) 2028 sc->sc_msg[2] = 0; /* Offer async xfers only */ 2029 2030 else if (sc->sc_msg[2] > 2) /* BAD MSG: 2 is max value */ 2031 return (iha_msgout_reject(sc)); 2032 2033 else if (sc->sc_msg[2] == 2) /* a request for 32 bit xfers*/ 2034 sc->sc_msg[2] = 1; /* Offer 16 instead */ 2035 2036 else { 2037 iha_wide_done(sc); 2038 if ((flags & FLAG_NO_NEG_SYNC) == 0) 2039 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2040 return (iha_wait(sc, MSG_ACCEPT)); 2041 } 2042 2043 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2044 2045 phase = iha_wait(sc, MSG_ACCEPT); 2046 if (phase != PHASE_MSG_OUT) 2047 return (phase); 2048 } else 2049 return (iha_msgout_reject(sc)); 2050 2051 return (iha_msgout_extended(sc)); 2052 } 2053 2054 /* 2055 * iha_msgin_sdtr - check SDTR msg in sc_msg. If the offer is 2056 * acceptable leave sc_msg as is and return 0. 2057 * If the negotiation must continue, modify sc_msg 2058 * as needed and return 1. Else return 0. 2059 */ 2060 static int 2061 iha_msgin_sdtr(sc) 2062 struct iha_softc *sc; 2063 { 2064 int flags; 2065 int newoffer; 2066 u_int8_t default_period; 2067 2068 flags = sc->sc_actscb->tcs->flags; 2069 2070 default_period = iha_rate_tbl[flags & FLAG_SCSI_RATE]; 2071 2072 if (sc->sc_msg[3] == 0) /* target offered async only. Accept it. */ 2073 return (0); 2074 2075 newoffer = 0; 2076 2077 if ((flags & FLAG_NO_SYNC) != 0) { 2078 sc->sc_msg[3] = 0; 2079 newoffer = 1; 2080 } 2081 2082 if (sc->sc_msg[3] > IHA_MAX_OFFSET) { 2083 sc->sc_msg[3] = IHA_MAX_OFFSET; 2084 newoffer = 1; 2085 } 2086 2087 if (sc->sc_msg[2] < default_period) { 2088 sc->sc_msg[2] = default_period; 2089 newoffer = 1; 2090 } 2091 2092 if (sc->sc_msg[2] >= 59) { /* XXX magic */ 2093 sc->sc_msg[3] = 0; 2094 newoffer = 1; 2095 } 2096 2097 return (newoffer); 2098 } 2099 2100 static int 2101 iha_msgout(sc, msg) 2102 struct iha_softc *sc; 2103 u_int8_t msg; 2104 { 2105 2106 bus_space_write_1(sc->sc_iot, sc->sc_ioh, TUL_SFIFO, msg); 2107 2108 return (iha_wait(sc, XF_FIFO_OUT)); 2109 } 2110 2111 static void 2112 iha_msgout_abort(sc, aborttype) 2113 struct iha_softc *sc; 2114 u_int8_t aborttype; 2115 { 2116 2117 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2118 2119 switch (iha_wait(sc, MSG_ACCEPT)) { 2120 case -1: 2121 break; 2122 2123 case PHASE_MSG_OUT: 2124 sc->sc_flags |= FLAG_EXPECT_DISC; 2125 if (iha_msgout(sc, aborttype) != -1) 2126 iha_bad_seq(sc); 2127 break; 2128 2129 default: 2130 iha_bad_seq(sc); 2131 break; 2132 } 2133 } 2134 2135 static int 2136 iha_msgout_reject(sc) 2137 struct iha_softc *sc; 2138 { 2139 2140 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2141 2142 if (iha_wait(sc, MSG_ACCEPT) == PHASE_MSG_OUT) 2143 return (iha_msgout(sc, MSG_MESSAGE_REJECT)); 2144 2145 return (-1); 2146 } 2147 2148 static int 2149 iha_msgout_extended(sc) 2150 struct iha_softc *sc; 2151 { 2152 bus_space_tag_t iot = sc->sc_iot; 2153 bus_space_handle_t ioh = sc->sc_ioh; 2154 int phase; 2155 2156 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_EXTENDED); 2157 2158 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2159 sc->sc_msg, sc->sc_msg[0] + 1); 2160 2161 phase = iha_wait(sc, XF_FIFO_OUT); 2162 2163 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2164 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 2165 2166 return (phase); 2167 } 2168 2169 static int 2170 iha_msgout_wdtr(sc) 2171 struct iha_softc *sc; 2172 { 2173 2174 sc->sc_actscb->tcs->flags |= FLAG_WIDE_DONE; 2175 2176 sc->sc_msg[0] = MSG_EXT_WDTR_LEN; 2177 sc->sc_msg[1] = MSG_EXT_WDTR; 2178 sc->sc_msg[2] = MSG_EXT_WDTR_BUS_16_BIT; 2179 2180 return (iha_msgout_extended(sc)); 2181 } 2182 2183 static int 2184 iha_msgout_sdtr(sc) 2185 struct iha_softc *sc; 2186 { 2187 int rateindex; 2188 2189 rateindex = sc->sc_actscb->tcs->flags & FLAG_SCSI_RATE; 2190 2191 sc->sc_msg[0] = MSG_EXT_SDTR_LEN; 2192 sc->sc_msg[1] = MSG_EXT_SDTR; 2193 sc->sc_msg[2] = iha_rate_tbl[rateindex]; 2194 sc->sc_msg[3] = IHA_MAX_OFFSET; /* REQ/ACK */ 2195 2196 return (iha_msgout_extended(sc)); 2197 } 2198 2199 static void 2200 iha_wide_done(sc) 2201 struct iha_softc *sc; 2202 { 2203 bus_space_tag_t iot = sc->sc_iot; 2204 bus_space_handle_t ioh = sc->sc_ioh; 2205 struct tcs *tcs = sc->sc_actscb->tcs; 2206 2207 tcs->syncm = 0; 2208 tcs->period = 0; 2209 tcs->offset = 0; 2210 2211 if (sc->sc_msg[2] != 0) 2212 tcs->syncm |= PERIOD_WIDE_SCSI; 2213 2214 tcs->sconfig0 &= ~ALTPD; 2215 tcs->flags &= ~FLAG_SYNC_DONE; 2216 tcs->flags |= FLAG_WIDE_DONE; 2217 2218 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 2219 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 2220 } 2221 2222 static void 2223 iha_sync_done(sc) 2224 struct iha_softc *sc; 2225 { 2226 bus_space_tag_t iot = sc->sc_iot; 2227 bus_space_handle_t ioh = sc->sc_ioh; 2228 struct tcs *tcs = sc->sc_actscb->tcs; 2229 int i; 2230 2231 if ((tcs->flags & FLAG_SYNC_DONE) == 0) { 2232 tcs->period = sc->sc_msg[2]; 2233 tcs->offset = sc->sc_msg[3]; 2234 if (tcs->offset != 0) { 2235 tcs->syncm |= tcs->offset; 2236 2237 /* pick the highest possible rate */ 2238 for (i = 0; i < 8; i++) 2239 if (iha_rate_tbl[i] >= tcs->period) 2240 break; 2241 2242 tcs->syncm |= (i << 4); 2243 tcs->sconfig0 |= ALTPD; 2244 } 2245 2246 tcs->flags |= FLAG_SYNC_DONE; 2247 2248 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 2249 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 2250 } 2251 } 2252 2253 void 2254 iha_reset_chip(sc) 2255 struct iha_softc *sc; 2256 { 2257 bus_space_tag_t iot = sc->sc_iot; 2258 bus_space_handle_t ioh = sc->sc_ioh; 2259 2260 /* reset tulip chip */ 2261 2262 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSCSI); 2263 2264 do { 2265 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 2266 } while ((sc->sc_sistat & SRSTD) == 0); 2267 2268 iha_set_ssig(sc, 0, 0); 2269 2270 bus_space_read_1(iot, ioh, TUL_SISTAT); /* Clear any active interrupt*/ 2271 } 2272 2273 static void 2274 iha_select(sc, scb, select_type) 2275 struct iha_softc *sc; 2276 struct iha_scsi_req_q *scb; 2277 u_int8_t select_type; 2278 { 2279 bus_space_tag_t iot = sc->sc_iot; 2280 bus_space_handle_t ioh = sc->sc_ioh; 2281 2282 switch (select_type) { 2283 case SEL_ATN: 2284 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 2285 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2286 scb->cmd, scb->cmdlen); 2287 2288 scb->nextstat = 2; 2289 break; 2290 2291 case SELATNSTOP: 2292 scb->nextstat = 1; 2293 break; 2294 2295 case SEL_ATN3: 2296 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 2297 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_tagmsg); 2298 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_tagid); 2299 2300 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, scb->cmd, 2301 scb->cmdlen); 2302 2303 scb->nextstat = 2; 2304 break; 2305 2306 default: 2307 printf("[debug] iha_select() - unknown select type = 0x%02x\n", 2308 select_type); 2309 return; 2310 } 2311 2312 iha_del_pend_scb(sc, scb); 2313 scb->status = STATUS_SELECT; 2314 2315 sc->sc_actscb = scb; 2316 2317 bus_space_write_1(iot, ioh, TUL_SCMD, select_type); 2318 } 2319 2320 /* 2321 * iha_wait - wait for an interrupt to service or a SCSI bus phase change 2322 * after writing the supplied command to the tulip chip. If 2323 * the command is NO_OP, skip the command writing. 2324 */ 2325 static int 2326 iha_wait(sc, cmd) 2327 struct iha_softc *sc; 2328 u_int8_t cmd; 2329 { 2330 bus_space_tag_t iot = sc->sc_iot; 2331 bus_space_handle_t ioh = sc->sc_ioh; 2332 2333 if (cmd != NO_OP) 2334 bus_space_write_1(iot, ioh, TUL_SCMD, cmd); 2335 2336 /* 2337 * Have to do this here, in addition to in iha_isr, because 2338 * interrupts might be turned off when we get here. 2339 */ 2340 do { 2341 sc->sc_status0 = bus_space_read_1(iot, ioh, TUL_STAT0); 2342 } while ((sc->sc_status0 & INTPD) == 0); 2343 2344 sc->sc_status1 = bus_space_read_1(iot, ioh, TUL_STAT1); 2345 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 2346 2347 sc->sc_phase = sc->sc_status0 & PH_MASK; 2348 2349 if ((sc->sc_sistat & SRSTD) != 0) { 2350 /* SCSI bus reset interrupt */ 2351 iha_reset_scsi_bus(sc); 2352 return (-1); 2353 } 2354 2355 if ((sc->sc_sistat & RSELED) != 0) 2356 /* Reselection interrupt */ 2357 return (iha_resel(sc)); 2358 2359 if ((sc->sc_sistat & STIMEO) != 0) { 2360 /* selected/reselected timeout interrupt */ 2361 iha_busfree(sc); 2362 return (-1); 2363 } 2364 2365 if ((sc->sc_sistat & DISCD) != 0) { 2366 /* BUS disconnection interrupt */ 2367 if ((sc->sc_flags & FLAG_EXPECT_DONE_DISC) != 0) { 2368 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2369 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 2370 SCONFIG0DEFAULT); 2371 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2372 iha_append_done_scb(sc, sc->sc_actscb, HOST_OK); 2373 sc->sc_flags &= ~FLAG_EXPECT_DONE_DISC; 2374 2375 } else if ((sc->sc_flags & FLAG_EXPECT_DISC) != 0) { 2376 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2377 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 2378 SCONFIG0DEFAULT); 2379 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2380 sc->sc_actscb = NULL; 2381 sc->sc_flags &= ~FLAG_EXPECT_DISC; 2382 2383 } else 2384 iha_busfree(sc); 2385 2386 return (-1); 2387 } 2388 2389 return (sc->sc_phase); 2390 } 2391 2392 /* 2393 * iha_done_scb - We have a scb which has been processed by the 2394 * adaptor, now we look to see how the operation went. 2395 */ 2396 static void 2397 iha_done_scb(sc, scb) 2398 struct iha_softc *sc; 2399 struct iha_scsi_req_q *scb; 2400 { 2401 struct scsipi_xfer *xs = scb->xs; 2402 2403 if (xs != NULL) { 2404 /* Cancel the timeout. */ 2405 callout_stop(&xs->xs_callout); 2406 2407 if (xs->datalen > 0) { 2408 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 2409 0, scb->dmap->dm_mapsize, 2410 (xs->xs_control & XS_CTL_DATA_IN) ? 2411 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2412 bus_dmamap_unload(sc->sc_dmat, scb->dmap); 2413 } 2414 2415 xs->status = scb->ta_stat; 2416 2417 switch (scb->ha_stat) { 2418 case HOST_OK: 2419 switch (scb->ta_stat) { 2420 case SCSI_OK: 2421 case SCSI_CONDITION_MET: 2422 case SCSI_INTERM: 2423 case SCSI_INTERM_COND_MET: 2424 xs->resid = scb->buflen; 2425 xs->error = XS_NOERROR; 2426 if ((scb->flags & FLAG_RSENS) != 0) 2427 xs->error = XS_SENSE; 2428 break; 2429 2430 case SCSI_RESV_CONFLICT: 2431 case SCSI_BUSY: 2432 case SCSI_QUEUE_FULL: 2433 xs->error = XS_BUSY; 2434 break; 2435 2436 case SCSI_TERMINATED: 2437 case SCSI_ACA_ACTIVE: 2438 case SCSI_CHECK: 2439 scb->tcs->flags &= 2440 ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 2441 2442 if ((scb->flags & FLAG_RSENS) != 0 || 2443 iha_push_sense_request(sc, scb) != 0) { 2444 scb->flags &= FLAG_RSENS; 2445 printf("%s: request sense failed\n", 2446 sc->sc_dev.dv_xname); 2447 xs->error = XS_DRIVER_STUFFUP; 2448 break; 2449 } 2450 2451 xs->error = XS_SENSE; 2452 return; 2453 2454 default: 2455 xs->error = XS_DRIVER_STUFFUP; 2456 break; 2457 } 2458 break; 2459 2460 case HOST_SEL_TOUT: 2461 xs->error = XS_SELTIMEOUT; 2462 break; 2463 2464 case HOST_SCSI_RST: 2465 case HOST_DEV_RST: 2466 xs->error = XS_RESET; 2467 break; 2468 2469 case HOST_SPERR: 2470 printf("%s: SCSI Parity error detected\n", 2471 sc->sc_dev.dv_xname); 2472 xs->error = XS_DRIVER_STUFFUP; 2473 break; 2474 2475 case HOST_TIMED_OUT: 2476 xs->error = XS_TIMEOUT; 2477 break; 2478 2479 case HOST_DO_DU: 2480 case HOST_BAD_PHAS: 2481 default: 2482 xs->error = XS_DRIVER_STUFFUP; 2483 break; 2484 } 2485 2486 scsipi_done(xs); 2487 } 2488 2489 iha_append_free_scb(sc, scb); 2490 } 2491 2492 static void 2493 iha_timeout(arg) 2494 void *arg; 2495 { 2496 struct iha_scsi_req_q *scb = (struct iha_scsi_req_q *)arg; 2497 struct scsipi_xfer *xs = scb->xs; 2498 struct scsipi_periph *periph = xs->xs_periph; 2499 struct iha_softc *sc; 2500 2501 sc = (void *)periph->periph_channel->chan_adapter->adapt_dev; 2502 2503 if (xs == NULL) 2504 printf("[debug] iha_timeout called with xs == NULL\n"); 2505 2506 else { 2507 scsipi_printaddr(periph); 2508 printf("SCSI OpCode 0x%02x timed out\n", xs->cmd->opcode); 2509 2510 iha_abort_xs(sc, xs, HOST_TIMED_OUT); 2511 } 2512 } 2513 2514 static void 2515 iha_exec_scb(sc, scb) 2516 struct iha_softc *sc; 2517 struct iha_scsi_req_q *scb; 2518 { 2519 bus_space_tag_t iot; 2520 bus_space_handle_t ioh; 2521 bus_dmamap_t dm; 2522 struct scsipi_xfer *xs = scb->xs; 2523 int nseg, s; 2524 2525 dm = scb->dmap; 2526 nseg = dm->dm_nsegs; 2527 2528 if (nseg > 1) { 2529 struct iha_sg_element *sg = scb->sglist; 2530 int i; 2531 2532 for (i = 0; i < nseg; i++) { 2533 sg[i].sg_len = htole32(dm->dm_segs[i].ds_len); 2534 sg[i].sg_addr = htole32(dm->dm_segs[i].ds_addr); 2535 } 2536 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 2537 scb->sgoffset, IHA_SG_SIZE, 2538 BUS_DMASYNC_PREWRITE); 2539 2540 scb->flags |= FLAG_SG; /* XXX */ 2541 scb->sg_size = scb->sg_max = nseg; 2542 2543 scb->bufaddr = scb->sg_addr; 2544 } else 2545 scb->bufaddr = dm->dm_segs[0].ds_addr; 2546 2547 if ((xs->xs_control & XS_CTL_POLL) == 0) { 2548 int timeout = xs->timeout; 2549 timeout = (timeout > 100000) ? 2550 timeout / 1000 * hz : timeout * hz / 1000; 2551 if (timeout == 0) 2552 timeout = 1; 2553 callout_reset(&xs->xs_callout, timeout, iha_timeout, scb); 2554 } 2555 2556 s = splbio(); 2557 2558 if (((scb->flags & XS_RESET) != 0) || (scb->cmd[0] == REQUEST_SENSE)) 2559 iha_push_pend_scb(sc, scb); /* Insert SCB at head of Pend */ 2560 else 2561 iha_append_pend_scb(sc, scb); /* Append SCB to tail of Pend */ 2562 2563 /* 2564 * Run through iha_main() to ensure something is active, if 2565 * only this new SCB. 2566 */ 2567 if (sc->sc_semaph != SEMAPH_IN_MAIN) { 2568 iot = sc->sc_iot; 2569 ioh = sc->sc_ioh; 2570 2571 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 2572 sc->sc_semaph = SEMAPH_IN_MAIN;; 2573 2574 splx(s); 2575 iha_main(sc); 2576 s = splbio(); 2577 2578 sc->sc_semaph = ~SEMAPH_IN_MAIN;; 2579 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 2580 } 2581 2582 splx(s); 2583 } 2584 2585 2586 /* 2587 * iha_set_ssig - read the current scsi signal mask, then write a new 2588 * one which turns off/on the specified signals. 2589 */ 2590 static void 2591 iha_set_ssig(sc, offsigs, onsigs) 2592 struct iha_softc *sc; 2593 u_int8_t offsigs, onsigs; 2594 { 2595 bus_space_tag_t iot = sc->sc_iot; 2596 bus_space_handle_t ioh = sc->sc_ioh; 2597 u_int8_t currsigs; 2598 2599 currsigs = bus_space_read_1(iot, ioh, TUL_SSIGI); 2600 bus_space_write_1(iot, ioh, TUL_SSIGO, (currsigs & ~offsigs) | onsigs); 2601 } 2602 2603 /* 2604 * iha_alloc_sglist - allocate and map sglist for SCB's 2605 */ 2606 static int 2607 iha_alloc_sglist(sc) 2608 struct iha_softc *sc; 2609 { 2610 bus_dma_segment_t seg; 2611 int error, rseg; 2612 2613 /* 2614 * Allocate dma-safe memory for the SCB's sglist 2615 */ 2616 if ((error = bus_dmamem_alloc(sc->sc_dmat, 2617 IHA_SG_SIZE * IHA_MAX_SCB, 2618 PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 2619 printf(": unable to allocate sglist, error = %d\n", error); 2620 return (error); 2621 } 2622 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 2623 IHA_SG_SIZE * IHA_MAX_SCB, (caddr_t *)&sc->sc_sglist, 2624 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 2625 printf(": unable to map sglist, error = %d\n", error); 2626 return (error); 2627 } 2628 2629 /* 2630 * Create and load the DMA map used for the SCBs 2631 */ 2632 if ((error = bus_dmamap_create(sc->sc_dmat, 2633 IHA_SG_SIZE * IHA_MAX_SCB, 1, IHA_SG_SIZE * IHA_MAX_SCB, 2634 0, BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 2635 printf(": unable to create control DMA map, error = %d\n", 2636 error); 2637 return (error); 2638 } 2639 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, 2640 sc->sc_sglist, IHA_SG_SIZE * IHA_MAX_SCB, 2641 NULL, BUS_DMA_NOWAIT)) != 0) { 2642 printf(": unable to load control DMA map, error = %d\n", error); 2643 return (error); 2644 } 2645 2646 memset(sc->sc_sglist, 0, IHA_SG_SIZE * IHA_MAX_SCB); 2647 2648 return (0); 2649 } 2650 2651 /* 2652 * iha_read_eeprom - read Serial EEPROM value & set to defaults 2653 * if required. XXX - Writing does NOT work! 2654 */ 2655 void 2656 iha_read_eeprom(sc, eeprom) 2657 struct iha_softc *sc; 2658 struct iha_eeprom *eeprom; 2659 { 2660 bus_space_tag_t iot = sc->sc_iot; 2661 bus_space_handle_t ioh = sc->sc_ioh; 2662 u_int16_t *buf = (u_int16_t *)eeprom; 2663 u_int8_t gctrl; 2664 2665 /* Enable EEProm programming */ 2666 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) | EEPRG; 2667 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2668 2669 /* Read EEProm */ 2670 if (iha_se2_rd_all(sc, buf) == 0) 2671 panic("%s: cannot read EEPROM\n", sc->sc_dev.dv_xname); 2672 2673 /* Disable EEProm programming */ 2674 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) & ~EEPRG; 2675 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2676 } 2677 2678 #ifdef notused 2679 /* 2680 * iha_se2_update_all - Update SCSI H/A configuration parameters from 2681 * serial EEPROM Setup default pattern. Only 2682 * change those values different from the values 2683 * in iha_eeprom. 2684 */ 2685 void 2686 iha_se2_update_all(sc) 2687 struct iha_softc *sc; 2688 { 2689 bus_space_tag_t iot = sc->sc_iot; 2690 bus_space_handle_t ioh = sc->sc_ioh; 2691 u_int16_t *np; 2692 u_int32_t chksum; 2693 int i; 2694 2695 /* Enable erase/write state of EEPROM */ 2696 iha_se2_instr(sc, ENABLE_ERASE); 2697 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2698 EEP_WAIT(); 2699 2700 np = (u_int16_t *)&eeprom_default; 2701 2702 for (i = 0, chksum = 0; i < EEPROM_SIZE - 1; i++) { 2703 iha_se2_wr(sc, i, *np); 2704 chksum += *np++; 2705 } 2706 2707 chksum &= 0x0000ffff; 2708 iha_se2_wr(sc, 31, chksum); 2709 2710 /* Disable erase/write state of EEPROM */ 2711 iha_se2_instr(sc, 0); 2712 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2713 EEP_WAIT(); 2714 } 2715 2716 /* 2717 * iha_se2_wr - write the given 16 bit value into the Serial EEPROM 2718 * at the specified offset 2719 */ 2720 void 2721 iha_se2_wr(sc, addr, writeword) 2722 struct iha_softc *sc; 2723 int addr; 2724 u_int16_t writeword; 2725 { 2726 bus_space_tag_t iot = sc->sc_iot; 2727 bus_space_handle_t ioh = sc->sc_ioh; 2728 int i, bit; 2729 2730 /* send 'WRITE' Instruction == address | WRITE bit */ 2731 iha_se2_instr(sc, addr | WRITE); 2732 2733 for (i = 16; i > 0; i--) { 2734 if (writeword & (1 << (i - 1))) 2735 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRDO); 2736 else 2737 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2738 EEP_WAIT(); 2739 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2740 EEP_WAIT(); 2741 } 2742 2743 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2744 EEP_WAIT(); 2745 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2746 EEP_WAIT(); 2747 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2748 EEP_WAIT(); 2749 2750 for (;;) { 2751 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2752 EEP_WAIT(); 2753 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2754 EEP_WAIT(); 2755 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI; 2756 EEP_WAIT(); 2757 if (bit != 0) 2758 break; /* write complete */ 2759 } 2760 2761 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2762 } 2763 #endif 2764 2765 /* 2766 * iha_se2_rd - read & return the 16 bit value at the specified 2767 * offset in the Serial E2PROM 2768 * 2769 */ 2770 u_int16_t 2771 iha_se2_rd(sc, addr) 2772 struct iha_softc *sc; 2773 int addr; 2774 { 2775 bus_space_tag_t iot = sc->sc_iot; 2776 bus_space_handle_t ioh = sc->sc_ioh; 2777 int i, bit; 2778 u_int16_t readword; 2779 2780 /* Send 'READ' instruction == address | READ bit */ 2781 iha_se2_instr(sc, addr | READ); 2782 2783 readword = 0; 2784 for (i = 16; i > 0; i--) { 2785 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2786 EEP_WAIT(); 2787 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2788 EEP_WAIT(); 2789 /* sample data after the following edge of clock */ 2790 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI ? 1 : 0; 2791 EEP_WAIT(); 2792 2793 readword |= bit << (i - 1); 2794 } 2795 2796 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2797 2798 return (readword); 2799 } 2800 2801 /* 2802 * iha_se2_rd_all - Read SCSI H/A config parameters from serial EEPROM 2803 */ 2804 int 2805 iha_se2_rd_all(sc, buf) 2806 struct iha_softc *sc; 2807 u_int16_t *buf; 2808 { 2809 struct iha_eeprom *eeprom = (struct iha_eeprom *)buf; 2810 u_int32_t chksum; 2811 int i; 2812 2813 for (i = 0, chksum = 0; i < EEPROM_SIZE - 1; i++) { 2814 *buf = iha_se2_rd(sc, i); 2815 chksum += *buf++; 2816 } 2817 *buf = iha_se2_rd(sc, 31); /* read checksum from EEPROM */ 2818 2819 chksum &= 0x0000ffff; /* lower 16 bits */ 2820 2821 return (eeprom->signature == EEP_SIGNATURE) && 2822 (eeprom->checksum == chksum); 2823 } 2824 2825 /* 2826 * iha_se2_instr - write an octet to serial E2PROM one bit at a time 2827 */ 2828 void 2829 iha_se2_instr(sc, instr) 2830 struct iha_softc *sc; 2831 int instr; 2832 { 2833 bus_space_tag_t iot = sc->sc_iot; 2834 bus_space_handle_t ioh = sc->sc_ioh; 2835 int b, i; 2836 2837 b = NVRCS | NVRDO; /* Write the start bit (== 1) */ 2838 2839 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2840 EEP_WAIT(); 2841 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2842 EEP_WAIT(); 2843 2844 for (i = 8; i > 0; i--) { 2845 if (instr & (1 << (i - 1))) 2846 b = NVRCS | NVRDO; /* Write a 1 bit */ 2847 else 2848 b = NVRCS; /* Write a 0 bit */ 2849 2850 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2851 EEP_WAIT(); 2852 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2853 EEP_WAIT(); 2854 } 2855 2856 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2857 } 2858 2859 /* 2860 * iha_reset_tcs - reset the target control structure pointed 2861 * to by tcs to default values. tcs flags 2862 * only has the negotiation done bits reset as 2863 * the other bits are fixed at initialization. 2864 */ 2865 void 2866 iha_reset_tcs(tcs, config0) 2867 struct tcs *tcs; 2868 u_int8_t config0; 2869 { 2870 2871 tcs->flags &= ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 2872 tcs->period = 0; 2873 tcs->offset = 0; 2874 tcs->tagcnt = 0; 2875 tcs->ntagscb = NULL; 2876 tcs->syncm = 0; 2877 tcs->sconfig0 = config0; 2878 } 2879
Indexes created Tue Sep 23 13:09:54 GMT 2025