iha.c revision 1.9
1 /* $NetBSD: iha.c,v 1.9 2001/09/27 15:26:57 tsutsui Exp $ */ 2 /* 3 * Initio INI-9xxxU/UW SCSI Device Driver 4 * 5 * Copyright (c) 2000 Ken Westerback 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer, 13 * without modification, immediately at the beginning of the file. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 26 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 *------------------------------------------------------------------------- 30 * 31 * Ported from i91u.c, provided by Initio Corporation, which credits: 32 * 33 * Device driver for the INI-9XXXU/UW or INIC-940/950 PCI SCSI Controller. 34 * 35 * FreeBSD 36 * 37 * Written for 386bsd and FreeBSD by 38 * Winston Hung <winstonh (at) initio.com> 39 * 40 * Copyright (c) 1997-99 Initio Corp. All rights reserved. 41 * 42 *------------------------------------------------------------------------- 43 */ 44 45 /* 46 * Ported to NetBSD by Izumi Tsutsui <tsutsui (at) ceres.dti.ne.jp> from OpenBSD: 47 * $OpenBSD: iha.c,v 1.3 2001/02/20 00:47:33 krw Exp $ 48 */ 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/kernel.h> 53 #include <sys/buf.h> 54 #include <sys/device.h> 55 #include <sys/malloc.h> 56 57 #include <uvm/uvm_extern.h> 58 59 #include <machine/bus.h> 60 #include <machine/intr.h> 61 62 #include <dev/scsipi/scsi_all.h> 63 #include <dev/scsipi/scsipi_all.h> 64 #include <dev/scsipi/scsiconf.h> 65 #include <dev/scsipi/scsi_message.h> 66 67 #include <dev/ic/ihareg.h> 68 #include <dev/ic/ihavar.h> 69 70 /* 71 * SCSI Rate Table, indexed by FLAG_SCSI_RATE field of 72 * tcs flags. 73 */ 74 static const u_int8_t iha_rate_tbl[8] = { 75 /* fast 20 */ 76 /* nanosecond divide by 4 */ 77 12, /* 50ns, 20M */ 78 18, /* 75ns, 13.3M */ 79 25, /* 100ns, 10M */ 80 31, /* 125ns, 8M */ 81 37, /* 150ns, 6.6M */ 82 43, /* 175ns, 5.7M */ 83 50, /* 200ns, 5M */ 84 62 /* 250ns, 4M */ 85 }; 86 87 #ifdef notused 88 static u_int16_t eeprom_default[EEPROM_SIZE] = { 89 /* -- Header ------------------------------------ */ 90 /* signature */ 91 EEP_SIGNATURE, 92 /* size, revision */ 93 EEP_WORD(EEPROM_SIZE * 2, 0x01), 94 /* -- Host Adapter Structure -------------------- */ 95 /* model */ 96 0x0095, 97 /* model info, number of channel */ 98 EEP_WORD(0x00, 1), 99 /* BIOS config */ 100 EEP_BIOSCFG_DEFAULT, 101 /* host adapter config */ 102 0, 103 104 /* -- eeprom_adapter[0] ------------------------------- */ 105 /* ID, adapter config 1 */ 106 EEP_WORD(7, CFG_DEFAULT), 107 /* adapter config 2, number of targets */ 108 EEP_WORD(0x00, 8), 109 /* target flags */ 110 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 111 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 112 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 113 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 114 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 115 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 116 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 117 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 118 119 /* -- eeprom_adapter[1] ------------------------------- */ 120 /* ID, adapter config 1 */ 121 EEP_WORD(7, CFG_DEFAULT), 122 /* adapter config 2, number of targets */ 123 EEP_WORD(0x00, 8), 124 /* target flags */ 125 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 126 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 127 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 128 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 129 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 130 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 131 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 132 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 133 /* reserved[5] */ 134 0, 0, 0, 0, 0, 135 /* checksum */ 136 0 137 }; 138 #endif 139 140 static u_int8_t iha_data_over_run(struct iha_scsi_req_q *); 141 142 static int iha_push_sense_request(struct iha_softc *, struct iha_scsi_req_q *); 143 static void iha_timeout(void *); 144 static int iha_alloc_sglist(struct iha_softc *); 145 146 static void iha_read_eeprom(struct iha_softc *, struct iha_eeprom *); 147 static int iha_se2_rd_all(struct iha_softc *, u_int16_t *); 148 static void iha_se2_instr(struct iha_softc *, int); 149 static u_int16_t iha_se2_rd(struct iha_softc *, int); 150 #ifdef notused 151 static void iha_se2_update_all(struct iha_softc *); 152 static void iha_se2_wr(struct iha_softc *, int, u_int16_t); 153 #endif 154 155 static void iha_reset_scsi_bus(struct iha_softc *); 156 static void iha_reset_chip(struct iha_softc *); 157 static void iha_reset_dma(struct iha_softc *); 158 159 static void iha_reset_tcs(struct tcs *, u_int8_t); 160 161 static void iha_done_scb(struct iha_softc *, struct iha_scsi_req_q *); 162 static void iha_exec_scb(struct iha_softc *, struct iha_scsi_req_q *); 163 164 static void iha_main(struct iha_softc *); 165 static void iha_scsi(struct iha_softc *); 166 167 static int iha_wait(struct iha_softc *, u_int8_t); 168 169 static __inline void iha_mark_busy_scb(struct iha_scsi_req_q *); 170 171 static void iha_append_free_scb(struct iha_softc *, struct iha_scsi_req_q *); 172 static void iha_append_done_scb(struct iha_softc *, struct iha_scsi_req_q *, 173 u_int8_t); 174 static __inline struct iha_scsi_req_q *iha_pop_done_scb(struct iha_softc *); 175 176 static __inline void iha_append_pend_scb(struct iha_softc *, 177 struct iha_scsi_req_q *); 178 static __inline void iha_push_pend_scb(struct iha_softc *, 179 struct iha_scsi_req_q *); 180 static __inline void iha_del_pend_scb(struct iha_softc *, 181 struct iha_scsi_req_q *); 182 static struct iha_scsi_req_q *iha_find_pend_scb(struct iha_softc *); 183 184 static void iha_sync_done(struct iha_softc *); 185 static void iha_wide_done(struct iha_softc *); 186 static void iha_bad_seq(struct iha_softc *); 187 188 static int iha_next_state(struct iha_softc *); 189 static int iha_state_1(struct iha_softc *); 190 static int iha_state_2(struct iha_softc *); 191 static int iha_state_3(struct iha_softc *); 192 static int iha_state_4(struct iha_softc *); 193 static int iha_state_5(struct iha_softc *); 194 static int iha_state_6(struct iha_softc *); 195 static int iha_state_8(struct iha_softc *); 196 197 static void iha_set_ssig(struct iha_softc *, u_int8_t, u_int8_t); 198 199 static int iha_xpad_in(struct iha_softc *); 200 static int iha_xpad_out(struct iha_softc *); 201 202 static int iha_xfer_data(struct iha_softc *, struct iha_scsi_req_q *, 203 int direction); 204 205 static int iha_status_msg(struct iha_softc *); 206 207 static int iha_msgin(struct iha_softc *); 208 static int iha_msgin_sdtr(struct iha_softc *); 209 static int iha_msgin_extended(struct iha_softc *); 210 static int iha_msgin_ignore_wid_resid(struct iha_softc *); 211 212 static int iha_msgout(struct iha_softc *, u_int8_t); 213 static int iha_msgout_extended(struct iha_softc *); 214 static void iha_msgout_abort(struct iha_softc *, u_int8_t); 215 static int iha_msgout_reject(struct iha_softc *); 216 static int iha_msgout_sdtr(struct iha_softc *); 217 static int iha_msgout_wdtr(struct iha_softc *); 218 219 static void iha_select(struct iha_softc *, struct iha_scsi_req_q *, u_int8_t); 220 221 static void iha_busfree(struct iha_softc *); 222 static int iha_resel(struct iha_softc *); 223 224 static void iha_abort_xs(struct iha_softc *, struct scsipi_xfer *, u_int8_t); 225 226 void iha_scsipi_request(struct scsipi_channel *, scsipi_adapter_req_t, 227 void *arg); 228 229 /* 230 * iha_intr - the interrupt service routine for the iha driver 231 */ 232 int 233 iha_intr(arg) 234 void *arg; 235 { 236 bus_space_tag_t iot; 237 bus_space_handle_t ioh; 238 struct iha_softc *sc; 239 int s; 240 241 sc = (struct iha_softc *)arg; 242 iot = sc->sc_iot; 243 ioh = sc->sc_ioh; 244 245 if ((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 246 return (0); 247 248 s = splbio(); /* XXX - Or are interrupts off when ISR's are called? */ 249 250 if (sc->sc_semaph != SEMAPH_IN_MAIN) { 251 /* XXX - need these inside a splbio()/splx()? */ 252 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 253 sc->sc_semaph = SEMAPH_IN_MAIN; 254 255 iha_main(sc); 256 257 sc->sc_semaph = ~SEMAPH_IN_MAIN; 258 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 259 } 260 261 splx(s); 262 263 return (1); 264 } 265 266 void 267 iha_scsipi_request(chan, req, arg) 268 struct scsipi_channel *chan; 269 scsipi_adapter_req_t req; 270 void *arg; 271 { 272 struct scsipi_xfer *xs; 273 struct scsipi_periph *periph; 274 struct iha_scsi_req_q *scb; 275 struct iha_softc *sc; 276 int error, flags, s; 277 278 sc = (struct iha_softc *)chan->chan_adapter->adapt_dev; 279 280 switch (req) { 281 case ADAPTER_REQ_RUN_XFER: 282 xs = arg; 283 periph = xs->xs_periph; 284 flags = xs->xs_control; 285 286 if (xs->cmdlen > sizeof(struct scsi_generic) || 287 periph->periph_target >= IHA_MAX_TARGETS) { 288 xs->error = XS_DRIVER_STUFFUP; 289 return; 290 } 291 292 s = splbio(); 293 scb = TAILQ_FIRST(&sc->sc_freescb); 294 if (scb != NULL) { 295 scb->status = STATUS_RENT; 296 TAILQ_REMOVE(&sc->sc_freescb, scb, chain); 297 } 298 #ifdef DIAGNOSTIC 299 else { 300 scsipi_printaddr(periph); 301 printf("unable to allocate scb\n"); 302 panic("iha_scsipi_request"); 303 } 304 #endif 305 splx(s); 306 307 scb->target = periph->periph_target; 308 scb->lun = periph->periph_lun; 309 scb->tcs = &sc->sc_tcs[scb->target]; 310 scb->flags = xs->xs_control; /* XXX */ 311 scb->scb_id = MSG_IDENTIFY(periph->periph_lun, 312 (xs->xs_control & XS_CTL_REQSENSE) == 0); 313 314 scb->xs = xs; 315 scb->timeout = xs->timeout; 316 scb->cmdlen = xs->cmdlen; 317 memcpy(&scb->cmd, xs->cmd, xs->cmdlen); 318 319 scb->buflen = xs->datalen; 320 321 if (scb->buflen > 0) { 322 error = bus_dmamap_load(sc->sc_dmat, scb->dmap, 323 xs->data, scb->buflen, NULL, 324 ((xs->xs_control & XS_CTL_NOSLEEP) ? 325 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) | 326 BUS_DMA_STREAMING | 327 ((xs->xs_control & XS_CTL_DATA_IN) ? 328 BUS_DMA_READ : BUS_DMA_WRITE)); 329 330 if (error) { 331 printf("%s: error %d loading dma map\n", 332 sc->sc_dev.dv_xname, error); 333 iha_append_free_scb(sc, scb); 334 xs->error = XS_DRIVER_STUFFUP; 335 scsipi_done(xs); 336 return; 337 } 338 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 339 0, scb->dmap->dm_mapsize, 340 (xs->xs_control & XS_CTL_DATA_IN) ? 341 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 342 } 343 344 iha_exec_scb(sc, scb); 345 return; 346 347 case ADAPTER_REQ_GROW_RESOURCES: 348 return; /* XXX */ 349 350 case ADAPTER_REQ_SET_XFER_MODE: 351 return; /* XXX */ 352 } 353 } 354 355 void 356 iha_attach(sc) 357 struct iha_softc *sc; 358 { 359 bus_space_tag_t iot = sc->sc_iot; 360 bus_space_handle_t ioh = sc->sc_ioh; 361 struct iha_scsi_req_q *scb; 362 struct iha_eeprom eeprom; 363 struct eeprom_adapter *conf; 364 int i, error, reg; 365 366 iha_read_eeprom(sc, &eeprom); 367 368 conf = &eeprom.adapter[0]; 369 370 /* 371 * fill in the rest of the iha_softc fields 372 */ 373 sc->sc_id = CFG_ID(conf->config1); 374 sc->sc_semaph = ~SEMAPH_IN_MAIN; 375 sc->sc_status0 = 0; 376 sc->sc_actscb = NULL; 377 378 TAILQ_INIT(&sc->sc_freescb); 379 TAILQ_INIT(&sc->sc_pendscb); 380 TAILQ_INIT(&sc->sc_donescb); 381 error = iha_alloc_sglist(sc); 382 if (error != 0) { 383 printf(": cannot allocate sglist\n"); 384 return; 385 } 386 387 sc->sc_scb = malloc(sizeof(struct iha_scsi_req_q) * IHA_MAX_SCB, 388 M_DEVBUF, M_NOWAIT); 389 if (sc->sc_scb == NULL) { 390 printf(": cannot allocate SCB\n"); 391 return; 392 } 393 memset(sc->sc_scb, 0, sizeof(struct iha_scsi_req_q) * IHA_MAX_SCB); 394 395 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) { 396 scb->scb_tagid = i; 397 scb->sgoffset = IHA_SG_SIZE * i; 398 scb->sglist = &sc->sc_sglist[i].sg_element[0]; 399 scb->sg_addr = 400 sc->sc_dmamap->dm_segs[0].ds_addr + scb->sgoffset; 401 402 error = bus_dmamap_create(sc->sc_dmat, 403 (IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE, IHA_MAX_SG_ENTRIES, 404 (IHA_MAX_SG_ENTRIES - 1) * PAGE_SIZE, 0, 405 BUS_DMA_NOWAIT, &scb->dmap); 406 407 if (error != 0) { 408 printf(": couldn't create SCB DMA map, error = %d\n", 409 error); 410 return; 411 } 412 TAILQ_INSERT_TAIL(&sc->sc_freescb, scb, chain); 413 } 414 415 /* Mask all the interrupts */ 416 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 417 418 /* Stop any I/O and reset the scsi module */ 419 iha_reset_dma(sc); 420 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSMOD); 421 422 /* Program HBA's SCSI ID */ 423 bus_space_write_1(iot, ioh, TUL_SID, sc->sc_id << 4); 424 425 /* 426 * Configure the channel as requested by the NVRAM settings read 427 * by iha_read_eeprom() above. 428 */ 429 430 sc->sc_sconf1 = SCONFIG0DEFAULT; 431 if ((conf->config1 & CFG_EN_PAR) != 0) 432 sc->sc_sconf1 |= SPCHK; 433 bus_space_write_1(iot, ioh, TUL_SCONFIG0, sc->sc_sconf1); 434 435 /* set selection time out 250 ms */ 436 bus_space_write_1(iot, ioh, TUL_STIMO, STIMO_250MS); 437 438 /* Enable desired SCSI termination configuration read from eeprom */ 439 reg = 0; 440 if (conf->config1 & CFG_ACT_TERM1) 441 reg |= ENTMW; 442 if (conf->config1 & CFG_ACT_TERM2) 443 reg |= ENTM; 444 bus_space_write_1(iot, ioh, TUL_DCTRL0, reg); 445 446 reg = bus_space_read_1(iot, ioh, TUL_GCTRL1) & ~ATDEN; 447 if (conf->config1 & CFG_AUTO_TERM) 448 reg |= ATDEN; 449 bus_space_write_1(iot, ioh, TUL_GCTRL1, reg); 450 451 for (i = 0; i < IHA_MAX_TARGETS / 2; i++) { 452 sc->sc_tcs[i * 2 ].flags = EEP_LBYTE(conf->tflags[i]); 453 sc->sc_tcs[i * 2 + 1].flags = EEP_HBYTE(conf->tflags[i]); 454 iha_reset_tcs(&sc->sc_tcs[i * 2 ], sc->sc_sconf1); 455 iha_reset_tcs(&sc->sc_tcs[i * 2 + 1], sc->sc_sconf1); 456 } 457 458 iha_reset_chip(sc); 459 bus_space_write_1(iot, ioh, TUL_SIEN, ALL_INTERRUPTS); 460 461 /* 462 * fill in the adapter. 463 */ 464 sc->sc_adapter.adapt_dev = &sc->sc_dev; 465 sc->sc_adapter.adapt_nchannels = 1; 466 sc->sc_adapter.adapt_openings = IHA_MAX_SCB; 467 sc->sc_adapter.adapt_max_periph = IHA_MAX_SCB; 468 sc->sc_adapter.adapt_ioctl = NULL; 469 sc->sc_adapter.adapt_minphys = minphys; 470 sc->sc_adapter.adapt_request = iha_scsipi_request; 471 472 /* 473 * fill in the channel. 474 */ 475 sc->sc_channel.chan_adapter = &sc->sc_adapter; 476 sc->sc_channel.chan_bustype = &scsi_bustype; 477 sc->sc_channel.chan_channel = 0; 478 sc->sc_channel.chan_ntargets = CFG_TARGET(conf->config2); 479 sc->sc_channel.chan_nluns = 8; 480 sc->sc_channel.chan_id = sc->sc_id; 481 482 /* 483 * Now try to attach all the sub devices. 484 */ 485 config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 486 } 487 488 /* 489 * iha_reset_dma - abort any active DMA xfer, reset tulip FIFO. 490 */ 491 static void 492 iha_reset_dma(sc) 493 struct iha_softc *sc; 494 { 495 bus_space_tag_t iot = sc->sc_iot; 496 bus_space_handle_t ioh = sc->sc_ioh; 497 498 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 499 /* if DMA xfer is pending, abort DMA xfer */ 500 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 501 /* wait Abort DMA xfer done */ 502 while ((bus_space_read_1(iot, ioh, TUL_ISTUS0) & DABT) == 0) 503 ; 504 } 505 506 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 507 } 508 509 /* 510 * iha_append_free_scb - append the supplied SCB to the tail of the 511 * sc_freescb queue after clearing and resetting 512 * everything possible. 513 */ 514 static void 515 iha_append_free_scb(sc, scb) 516 struct iha_softc *sc; 517 struct iha_scsi_req_q *scb; 518 { 519 int s; 520 521 s = splbio(); 522 523 if (scb == sc->sc_actscb) 524 sc->sc_actscb = NULL; 525 526 scb->status = STATUS_QUEUED; 527 scb->ha_stat = HOST_OK; 528 scb->ta_stat = SCSI_OK; 529 530 scb->nextstat = 0; 531 scb->sg_index = 0; 532 scb->sg_max = 0; 533 scb->flags = 0; 534 scb->target = 0; 535 scb->lun = 0; 536 scb->buflen = 0; 537 scb->sg_size = 0; 538 scb->cmdlen = 0; 539 scb->scb_id = 0; 540 scb->scb_tagmsg = 0; 541 scb->timeout = 0; 542 scb->bufaddr = 0; 543 544 scb->xs = NULL; 545 scb->tcs = NULL; 546 547 memset(scb->cmd, 0, sizeof(scb->cmd)); 548 memset(scb->sglist, 0, sizeof(scb->sglist)); 549 550 /* 551 * scb_tagid, sg_addr, sglist 552 * SCB_SensePtr are set at initialization 553 * and never change 554 */ 555 556 TAILQ_INSERT_TAIL(&sc->sc_freescb, scb, chain); 557 558 splx(s); 559 } 560 561 static __inline void 562 iha_append_pend_scb(sc, scb) 563 struct iha_softc *sc; 564 struct iha_scsi_req_q *scb; 565 { 566 /* ASSUMPTION: only called within a splbio()/splx() pair */ 567 568 if (scb == sc->sc_actscb) 569 sc->sc_actscb = NULL; 570 571 scb->status = STATUS_QUEUED; 572 573 TAILQ_INSERT_TAIL(&sc->sc_pendscb, scb, chain); 574 } 575 576 static __inline void 577 iha_push_pend_scb(sc, scb) 578 struct iha_softc *sc; 579 struct iha_scsi_req_q *scb; 580 { 581 int s; 582 583 s = splbio(); 584 585 if (scb == sc->sc_actscb) 586 sc->sc_actscb = NULL; 587 588 scb->status = STATUS_QUEUED; 589 590 TAILQ_INSERT_HEAD(&sc->sc_pendscb, scb, chain); 591 592 splx(s); 593 } 594 595 /* 596 * iha_find_pend_scb - scan the pending queue for a SCB that can be 597 * processed immediately. Return NULL if none found 598 * and a pointer to the SCB if one is found. If there 599 * is an active SCB, return NULL! 600 */ 601 static struct iha_scsi_req_q * 602 iha_find_pend_scb(sc) 603 struct iha_softc *sc; 604 { 605 struct iha_scsi_req_q *scb; 606 struct tcs *tcs; 607 int s; 608 609 s = splbio(); 610 611 if (sc->sc_actscb != NULL) 612 scb = NULL; 613 614 else 615 TAILQ_FOREACH(scb, &sc->sc_pendscb, chain) { 616 if ((scb->flags & XS_CTL_RESET) != 0) 617 /* ALWAYS willing to reset a device */ 618 break; 619 620 tcs = scb->tcs; 621 622 if ((scb->scb_tagmsg) != 0) { 623 /* 624 * A Tagged I/O. OK to start If no 625 * non-tagged I/O is active on the same 626 * target 627 */ 628 if (tcs->ntagscb == NULL) 629 break; 630 631 } else if (scb->cmd[0] == REQUEST_SENSE) { 632 /* 633 * OK to do a non-tagged request sense 634 * even if a non-tagged I/O has been 635 * started, 'cuz we don't allow any 636 * disconnect during a request sense op 637 */ 638 break; 639 640 } else if (tcs->tagcnt == 0) { 641 /* 642 * No tagged I/O active on this target, 643 * ok to start a non-tagged one if one 644 * is not already active 645 */ 646 if (tcs->ntagscb == NULL) 647 break; 648 } 649 } 650 651 splx(s); 652 653 return (scb); 654 } 655 656 /* 657 * iha_del_pend_scb - remove scb from sc_pendscb 658 */ 659 static __inline void 660 iha_del_pend_scb(sc, scb) 661 struct iha_softc *sc; 662 struct iha_scsi_req_q *scb; 663 { 664 int s; 665 666 s = splbio(); 667 668 TAILQ_REMOVE(&sc->sc_pendscb, scb, chain); 669 670 splx(s); 671 } 672 673 static __inline void 674 iha_mark_busy_scb(scb) 675 struct iha_scsi_req_q *scb; 676 { 677 int s; 678 679 s = splbio(); 680 681 scb->status = STATUS_BUSY; 682 683 if (scb->scb_tagmsg == 0) 684 scb->tcs->ntagscb = scb; 685 else 686 scb->tcs->tagcnt++; 687 688 splx(s); 689 } 690 691 static void 692 iha_append_done_scb(sc, scb, hastat) 693 struct iha_softc *sc; 694 struct iha_scsi_req_q *scb; 695 u_int8_t hastat; 696 { 697 struct tcs *tcs; 698 int s; 699 700 s = splbio(); 701 702 if (scb->xs != NULL) 703 callout_stop(&scb->xs->xs_callout); 704 705 if (scb == sc->sc_actscb) 706 sc->sc_actscb = NULL; 707 708 tcs = scb->tcs; 709 710 if (scb->scb_tagmsg != 0) { 711 if (tcs->tagcnt) 712 tcs->tagcnt--; 713 } else if (tcs->ntagscb == scb) 714 tcs->ntagscb = NULL; 715 716 scb->status = STATUS_QUEUED; 717 scb->ha_stat = hastat; 718 719 TAILQ_INSERT_TAIL(&sc->sc_donescb, scb, chain); 720 721 splx(s); 722 } 723 724 static __inline struct iha_scsi_req_q * 725 iha_pop_done_scb(sc) 726 struct iha_softc *sc; 727 { 728 struct iha_scsi_req_q *scb; 729 int s; 730 731 s = splbio(); 732 733 scb = TAILQ_FIRST(&sc->sc_donescb); 734 735 if (scb != NULL) { 736 scb->status = STATUS_RENT; 737 TAILQ_REMOVE(&sc->sc_donescb, scb, chain); 738 } 739 740 splx(s); 741 742 return (scb); 743 } 744 745 /* 746 * iha_abort_xs - find the SCB associated with the supplied xs and 747 * stop all processing on it, moving it to the done 748 * queue with the supplied host status value. 749 */ 750 static void 751 iha_abort_xs(sc, xs, hastat) 752 struct iha_softc *sc; 753 struct scsipi_xfer *xs; 754 u_int8_t hastat; 755 { 756 struct iha_scsi_req_q *scb; 757 int i, s; 758 759 s = splbio(); 760 761 /* Check the pending queue for the SCB pointing to xs */ 762 763 TAILQ_FOREACH(scb, &sc->sc_pendscb, chain) 764 if (scb->xs == xs) { 765 iha_del_pend_scb(sc, scb); 766 iha_append_done_scb(sc, scb, hastat); 767 splx(s); 768 return; 769 } 770 771 /* 772 * If that didn't work, check all BUSY/SELECTING SCB's for one 773 * pointing to xs 774 */ 775 776 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 777 switch (scb->status) { 778 case STATUS_BUSY: 779 case STATUS_SELECT: 780 if (scb->xs == xs) { 781 iha_append_done_scb(sc, scb, hastat); 782 splx(s); 783 return; 784 } 785 break; 786 default: 787 break; 788 } 789 790 splx(s); 791 } 792 793 /* 794 * iha_bad_seq - a SCSI bus phase was encountered out of the 795 * correct/expected sequence. Reset the SCSI bus. 796 */ 797 static void 798 iha_bad_seq(sc) 799 struct iha_softc *sc; 800 { 801 struct iha_scsi_req_q *scb = sc->sc_actscb; 802 803 if (scb != NULL) 804 iha_append_done_scb(sc, scb, HOST_BAD_PHAS); 805 806 iha_reset_scsi_bus(sc); 807 iha_reset_chip(sc); 808 } 809 810 /* 811 * iha_push_sense_request - obtain auto sense data by pushing the 812 * SCB needing it back onto the pending 813 * queue with a REQUEST_SENSE CDB. 814 */ 815 static int 816 iha_push_sense_request(sc, scb) 817 struct iha_softc *sc; 818 struct iha_scsi_req_q *scb; 819 { 820 struct scsipi_xfer *xs = scb->xs; 821 struct scsipi_periph *periph = xs->xs_periph; 822 struct scsipi_sense *ss = (struct scsipi_sense *)scb->cmd; 823 int lun = periph->periph_lun; 824 int err; 825 826 ss->opcode = REQUEST_SENSE; 827 ss->byte2 = lun << SCSI_CMD_LUN_SHIFT; 828 ss->unused[0] = ss->unused[1] = 0; 829 ss->length = sizeof(struct scsipi_sense_data); 830 ss->control = 0; 831 832 scb->flags &= ~(FLAG_SG | XS_CTL_DATA_OUT); 833 scb->flags |= FLAG_RSENS | XS_CTL_DATA_IN; 834 835 scb->scb_id &= ~MSG_IDENTIFY_DISCFLAG; 836 837 scb->scb_tagmsg = 0; 838 scb->ta_stat = SCSI_OK; 839 840 scb->cmdlen = sizeof(struct scsipi_sense); 841 scb->buflen = ss->length; 842 843 err = bus_dmamap_load(sc->sc_dmat, scb->dmap, 844 &xs->sense.scsi_sense, scb->buflen, NULL, 845 BUS_DMA_READ|BUS_DMA_NOWAIT); 846 if (err != 0) { 847 printf("iha_push_sense_request: cannot bus_dmamap_load()\n"); 848 xs->error = XS_DRIVER_STUFFUP; 849 return 1; 850 } 851 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 852 0, scb->buflen, BUS_DMASYNC_PREREAD); 853 854 /* XXX What about queued command? */ 855 iha_exec_scb(sc, scb); 856 857 return 0; 858 } 859 860 /* 861 * iha_main - process the active SCB, taking one off pending and making it 862 * active if necessary, and any done SCB's created as 863 * a result until there are no interrupts pending and no pending 864 * SCB's that can be started. 865 */ 866 static void 867 iha_main(sc) 868 struct iha_softc *sc; 869 { 870 bus_space_tag_t iot = sc->sc_iot; 871 bus_space_handle_t ioh =sc->sc_ioh; 872 struct iha_scsi_req_q *scb; 873 874 for (;;) { 875 iha_scsi(sc); 876 877 while ((scb = iha_pop_done_scb(sc)) != NULL) 878 iha_done_scb(sc, scb); 879 880 /* 881 * If there are no interrupts pending, or we can't start 882 * a pending sc, break out of the for(;;). Otherwise 883 * continue the good work with another call to 884 * iha_scsi(). 885 */ 886 if (((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 887 && (iha_find_pend_scb(sc) == NULL)) 888 break; 889 } 890 } 891 892 /* 893 * iha_scsi - service any outstanding interrupts. If there are none, try to 894 * start another SCB currently in the pending queue. 895 */ 896 static void 897 iha_scsi(sc) 898 struct iha_softc *sc; 899 { 900 bus_space_tag_t iot = sc->sc_iot; 901 bus_space_handle_t ioh = sc->sc_ioh; 902 struct iha_scsi_req_q *scb; 903 struct tcs *tcs; 904 u_int8_t stat; 905 906 /* service pending interrupts asap */ 907 908 stat = bus_space_read_1(iot, ioh, TUL_STAT0); 909 if ((stat & INTPD) != 0) { 910 sc->sc_status0 = stat; 911 sc->sc_status1 = bus_space_read_1(iot, ioh, TUL_STAT1); 912 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 913 914 sc->sc_phase = sc->sc_status0 & PH_MASK; 915 916 if ((sc->sc_sistat & SRSTD) != 0) { 917 iha_reset_scsi_bus(sc); 918 return; 919 } 920 921 if ((sc->sc_sistat & RSELED) != 0) { 922 iha_resel(sc); 923 return; 924 } 925 926 if ((sc->sc_sistat & (STIMEO | DISCD)) != 0) { 927 iha_busfree(sc); 928 return; 929 } 930 931 if ((sc->sc_sistat & (SCMDN | SBSRV)) != 0) { 932 iha_next_state(sc); 933 return; 934 } 935 936 if ((sc->sc_sistat & SELED) != 0) 937 iha_set_ssig(sc, 0, 0); 938 } 939 940 /* 941 * There were no interrupts pending which required action elsewhere, so 942 * see if it is possible to start the selection phase on a pending SCB 943 */ 944 if ((scb = iha_find_pend_scb(sc)) == NULL) 945 return; 946 947 tcs = scb->tcs; 948 949 /* program HBA's SCSI ID & target SCSI ID */ 950 bus_space_write_1(iot, ioh, TUL_SID, (sc->sc_id << 4) | scb->target); 951 952 if ((scb->flags & XS_CTL_RESET) == 0) { 953 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 954 955 if ((tcs->flags & FLAG_NO_NEG_SYNC) == 0 || 956 (tcs->flags & FLAG_NO_NEG_WIDE) == 0) 957 iha_select(sc, scb, SELATNSTOP); 958 959 else if (scb->scb_tagmsg != 0) 960 iha_select(sc, scb, SEL_ATN3); 961 962 else 963 iha_select(sc, scb, SEL_ATN); 964 965 } else { 966 iha_select(sc, scb, SELATNSTOP); 967 scb->nextstat = 8; 968 } 969 970 if ((scb->flags & XS_CTL_POLL) != 0) { 971 for (; scb->timeout > 0; scb->timeout--) { 972 if (iha_wait(sc, NO_OP) == -1) 973 break; 974 if (iha_next_state(sc) == -1) 975 break; 976 delay(1000); /* Only happens in boot, so it's ok */ 977 } 978 979 /* 980 * Since done queue processing not done until AFTER this 981 * function returns, scb is on the done queue, not 982 * the free queue at this point and still has valid data 983 * 984 * Conversely, xs->error has not been set yet 985 */ 986 if (scb->timeout == 0) 987 iha_timeout(scb); 988 } 989 } 990 991 /* 992 * iha_data_over_run - return HOST_OK for all SCSI opcodes where BufLen 993 * is an 'Allocation Length'. All other SCSI opcodes 994 * get HOST_DO_DU as they SHOULD have xferred all the 995 * data requested. 996 * 997 * The list of opcodes using 'Allocation Length' was 998 * found by scanning all the SCSI-3 T10 drafts. See 999 * www.t10.org for the curious with a .pdf reader. 1000 */ 1001 static u_int8_t 1002 iha_data_over_run(scb) 1003 struct iha_scsi_req_q *scb; 1004 { 1005 switch (scb->cmd[0]) { 1006 case 0x03: /* Request Sense SPC-2 */ 1007 case 0x12: /* Inquiry SPC-2 */ 1008 case 0x1a: /* Mode Sense (6 byte version) SPC-2 */ 1009 case 0x1c: /* Receive Diagnostic Results SPC-2 */ 1010 case 0x23: /* Read Format Capacities MMC-2 */ 1011 case 0x29: /* Read Generation SBC */ 1012 case 0x34: /* Read Position SSC-2 */ 1013 case 0x37: /* Read Defect Data SBC */ 1014 case 0x3c: /* Read Buffer SPC-2 */ 1015 case 0x42: /* Read Sub Channel MMC-2 */ 1016 case 0x43: /* Read TOC/PMA/ATIP MMC */ 1017 1018 /* XXX - 2 with same opcode of 0x44? */ 1019 case 0x44: /* Read Header/Read Density Suprt MMC/SSC*/ 1020 1021 case 0x46: /* Get Configuration MMC-2 */ 1022 case 0x4a: /* Get Event/Status Notification MMC-2 */ 1023 case 0x4d: /* Log Sense SPC-2 */ 1024 case 0x51: /* Read Disc Information MMC */ 1025 case 0x52: /* Read Track Information MMC */ 1026 case 0x59: /* Read Master CUE MMC */ 1027 case 0x5a: /* Mode Sense (10 byte version) SPC-2 */ 1028 case 0x5c: /* Read Buffer Capacity MMC */ 1029 case 0x5e: /* Persistant Reserve In SPC-2 */ 1030 case 0x84: /* Receive Copy Results SPC-2 */ 1031 case 0xa0: /* Report LUNs SPC-2 */ 1032 case 0xa3: /* Various Report requests SBC-2/SCC-2*/ 1033 case 0xa4: /* Report Key MMC-2 */ 1034 case 0xad: /* Read DVD Structure MMC-2 */ 1035 case 0xb4: /* Read Element Status (Attached) SMC */ 1036 case 0xb5: /* Request Volume Element Address SMC */ 1037 case 0xb7: /* Read Defect Data (12 byte ver.) SBC */ 1038 case 0xb8: /* Read Element Status (Independ.) SMC */ 1039 case 0xba: /* Report Redundancy SCC-2 */ 1040 case 0xbd: /* Mechanism Status MMC */ 1041 case 0xbe: /* Report Basic Redundancy SCC-2 */ 1042 1043 return (HOST_OK); 1044 break; 1045 1046 default: 1047 return (HOST_DO_DU); 1048 break; 1049 } 1050 } 1051 1052 /* 1053 * iha_next_state - prcess the current SCB as requested in it's 1054 * nextstat member. 1055 */ 1056 static int 1057 iha_next_state(sc) 1058 struct iha_softc *sc; 1059 { 1060 1061 if (sc->sc_actscb == NULL) 1062 return (-1); 1063 1064 switch (sc->sc_actscb->nextstat) { 1065 case 1: 1066 if (iha_state_1(sc) == 3) 1067 goto state_3; 1068 break; 1069 1070 case 2: 1071 switch (iha_state_2(sc)) { 1072 case 3: 1073 goto state_3; 1074 case 4: 1075 goto state_4; 1076 default: 1077 break; 1078 } 1079 break; 1080 1081 case 3: 1082 state_3: 1083 if (iha_state_3(sc) == 4) 1084 goto state_4; 1085 break; 1086 1087 case 4: 1088 state_4: 1089 switch (iha_state_4(sc)) { 1090 case 0: 1091 return (0); 1092 case 6: 1093 goto state_6; 1094 default: 1095 break; 1096 } 1097 break; 1098 1099 case 5: 1100 switch (iha_state_5(sc)) { 1101 case 4: 1102 goto state_4; 1103 case 6: 1104 goto state_6; 1105 default: 1106 break; 1107 } 1108 break; 1109 1110 case 6: 1111 state_6: 1112 iha_state_6(sc); 1113 break; 1114 1115 case 8: 1116 iha_state_8(sc); 1117 break; 1118 1119 default: 1120 #ifdef IHA_DEBUG_STATE 1121 printf("[debug] -unknown state: %i-\n", 1122 sc->sc_actscb->nextstat); 1123 #endif 1124 iha_bad_seq(sc); 1125 break; 1126 } 1127 1128 return (-1); 1129 } 1130 1131 /* 1132 * iha_state_1 - selection is complete after a SELATNSTOP. If the target 1133 * has put the bus into MSG_OUT phase start wide/sync 1134 * negotiation. Otherwise clear the FIFO and go to state 3, 1135 * which will send the SCSI CDB to the target. 1136 */ 1137 static int 1138 iha_state_1(sc) 1139 struct iha_softc *sc; 1140 { 1141 bus_space_tag_t iot = sc->sc_iot; 1142 bus_space_handle_t ioh = sc->sc_ioh; 1143 struct iha_scsi_req_q *scb = sc->sc_actscb; 1144 struct tcs *tcs; 1145 int flags; 1146 1147 iha_mark_busy_scb(scb); 1148 1149 tcs = scb->tcs; 1150 1151 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 1152 1153 /* 1154 * If we are in PHASE_MSG_OUT, send 1155 * a) IDENT message (with tags if appropriate) 1156 * b) WDTR if the target is configured to negotiate wide xfers 1157 * ** OR ** 1158 * c) SDTR if the target is configured to negotiate sync xfers 1159 * but not wide ones 1160 * 1161 * If we are NOT, then the target is not asking for anything but 1162 * the data/command, so go straight to state 3. 1163 */ 1164 if (sc->sc_phase == PHASE_MSG_OUT) { 1165 bus_space_write_1(iot, ioh, TUL_SCTRL1, (ESBUSIN | EHRSL)); 1166 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 1167 1168 if (scb->scb_tagmsg != 0) { 1169 bus_space_write_1(iot, ioh, TUL_SFIFO, 1170 scb->scb_tagmsg); 1171 bus_space_write_1(iot, ioh, TUL_SFIFO, 1172 scb->scb_tagid); 1173 } 1174 1175 flags = tcs->flags; 1176 if ((flags & FLAG_NO_NEG_WIDE) == 0) { 1177 if (iha_msgout_wdtr(sc) == -1) 1178 return (-1); 1179 } else if ((flags & FLAG_NO_NEG_SYNC) == 0) { 1180 if (iha_msgout_sdtr(sc) == -1) 1181 return (-1); 1182 } 1183 1184 } else { 1185 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1186 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 1187 } 1188 1189 return (3); 1190 } 1191 1192 /* 1193 * iha_state_2 - selection is complete after a SEL_ATN or SEL_ATN3. If the SCSI 1194 * CDB has already been send, go to state 4 to start the data 1195 * xfer. Otherwise reset the FIFO and go to state 3, sending 1196 * the SCSI CDB. 1197 */ 1198 static int 1199 iha_state_2(sc) 1200 struct iha_softc *sc; 1201 { 1202 bus_space_tag_t iot = sc->sc_iot; 1203 bus_space_handle_t ioh = sc->sc_ioh; 1204 struct iha_scsi_req_q *scb = sc->sc_actscb; 1205 1206 iha_mark_busy_scb(scb); 1207 1208 bus_space_write_1(iot, ioh, TUL_SCONFIG0, scb->tcs->sconfig0); 1209 1210 if ((sc->sc_status1 & CPDNE) != 0) 1211 return (4); 1212 1213 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1214 1215 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 1216 1217 return (3); 1218 } 1219 1220 /* 1221 * iha_state_3 - send the SCSI CDB to the target, processing any status 1222 * or other messages received until that is done or 1223 * abandoned. 1224 */ 1225 static int 1226 iha_state_3(sc) 1227 struct iha_softc *sc; 1228 { 1229 bus_space_tag_t iot = sc->sc_iot; 1230 bus_space_handle_t ioh = sc->sc_ioh; 1231 struct iha_scsi_req_q *scb = sc->sc_actscb; 1232 int flags; 1233 1234 for (;;) { 1235 switch (sc->sc_phase) { 1236 case PHASE_CMD_OUT: 1237 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 1238 scb->cmd, scb->cmdlen); 1239 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1240 return (-1); 1241 else if (sc->sc_phase == PHASE_CMD_OUT) { 1242 iha_bad_seq(sc); 1243 return (-1); 1244 } else 1245 return (4); 1246 1247 case PHASE_MSG_IN: 1248 scb->nextstat = 3; 1249 if (iha_msgin(sc) == -1) 1250 return (-1); 1251 break; 1252 1253 case PHASE_STATUS_IN: 1254 if (iha_status_msg(sc) == -1) 1255 return (-1); 1256 break; 1257 1258 case PHASE_MSG_OUT: 1259 flags = scb->tcs->flags; 1260 if ((flags & FLAG_NO_NEG_SYNC) != 0) { 1261 if (iha_msgout(sc, MSG_NOOP) == -1) 1262 return (-1); 1263 } else if (iha_msgout_sdtr(sc) == -1) 1264 return (-1); 1265 break; 1266 1267 default: 1268 printf("[debug] -s3- bad phase = %d\n", sc->sc_phase); 1269 iha_bad_seq(sc); 1270 return (-1); 1271 } 1272 } 1273 } 1274 1275 /* 1276 * iha_state_4 - start a data xfer. Handle any bus state 1277 * transitions until PHASE_DATA_IN/_OUT 1278 * or the attempt is abandoned. If there is 1279 * no data to xfer, go to state 6 and finish 1280 * processing the current SCB. 1281 */ 1282 static int 1283 iha_state_4(sc) 1284 struct iha_softc *sc; 1285 { 1286 struct iha_scsi_req_q *scb = sc->sc_actscb; 1287 1288 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) == 1289 (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) 1290 return (6); /* Both dir flags set => NO xfer was requested */ 1291 1292 for (;;) { 1293 if (scb->buflen == 0) 1294 return (6); 1295 1296 switch (sc->sc_phase) { 1297 case PHASE_STATUS_IN: 1298 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) 1299 != 0) 1300 scb->ha_stat = iha_data_over_run(scb); 1301 if ((iha_status_msg(sc)) == -1) 1302 return (-1); 1303 break; 1304 1305 case PHASE_MSG_IN: 1306 scb->nextstat = 4; 1307 if (iha_msgin(sc) == -1) 1308 return (-1); 1309 break; 1310 1311 case PHASE_MSG_OUT: 1312 if ((sc->sc_status0 & SPERR) != 0) { 1313 scb->buflen = 0; 1314 scb->ha_stat = HOST_SPERR; 1315 if (iha_msgout(sc, MSG_INITIATOR_DET_ERR) == -1) 1316 return (-1); 1317 else 1318 return (6); 1319 } else { 1320 if (iha_msgout(sc, MSG_NOOP) == -1) 1321 return (-1); 1322 } 1323 break; 1324 1325 case PHASE_DATA_IN: 1326 return (iha_xfer_data(sc, scb, XS_CTL_DATA_IN)); 1327 1328 case PHASE_DATA_OUT: 1329 return (iha_xfer_data(sc, scb, XS_CTL_DATA_OUT)); 1330 1331 default: 1332 iha_bad_seq(sc); 1333 return (-1); 1334 } 1335 } 1336 } 1337 1338 /* 1339 * iha_state_5 - handle the partial or final completion of the current 1340 * data xfer. If DMA is still active stop it. If there is 1341 * more data to xfer, go to state 4 and start the xfer. 1342 * If not go to state 6 and finish the SCB. 1343 */ 1344 static int 1345 iha_state_5(sc) 1346 struct iha_softc *sc; 1347 { 1348 bus_space_tag_t iot = sc->sc_iot; 1349 bus_space_handle_t ioh = sc->sc_ioh; 1350 struct iha_scsi_req_q *scb = sc->sc_actscb; 1351 struct iha_sg_element *sg; 1352 u_int32_t cnt; 1353 u_int8_t period, stat; 1354 long xcnt; /* cannot use unsigned!! see code: if (xcnt < 0) */ 1355 int i; 1356 1357 cnt = bus_space_read_4(iot, ioh, TUL_STCNT0) & TCNT; 1358 1359 /* 1360 * Stop any pending DMA activity and check for parity error. 1361 */ 1362 1363 if ((bus_space_read_1(iot, ioh, TUL_DCMD) & XDIR) != 0) { 1364 /* Input Operation */ 1365 if ((sc->sc_status0 & SPERR) != 0) 1366 scb->ha_stat = HOST_SPERR; 1367 1368 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1369 bus_space_write_1(iot, ioh, TUL_DCTRL0, 1370 bus_space_read_1(iot, ioh, TUL_DCTRL0) | SXSTP); 1371 while (bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) 1372 ; 1373 } 1374 1375 } else { 1376 /* Output Operation */ 1377 if ((sc->sc_status1 & SXCMP) == 0) { 1378 period = scb->tcs->syncm; 1379 if ((period & PERIOD_WIDE_SCSI) != 0) 1380 cnt += (bus_space_read_1(iot, ioh, 1381 TUL_SFIFOCNT) & FIFOC) * 2; 1382 else 1383 cnt += bus_space_read_1(iot, ioh, 1384 TUL_SFIFOCNT) & FIFOC; 1385 } 1386 1387 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1388 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 1389 do 1390 stat = bus_space_read_1(iot, ioh, TUL_ISTUS0); 1391 while ((stat & DABT) == 0); 1392 } 1393 1394 if ((cnt == 1) && (sc->sc_phase == PHASE_DATA_OUT)) { 1395 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1396 return (-1); 1397 cnt = 0; 1398 1399 } else if ((sc->sc_status1 & SXCMP) == 0) 1400 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1401 } 1402 1403 if (cnt == 0) { 1404 scb->buflen = 0; 1405 return (6); 1406 } 1407 1408 /* Update active data pointer and restart the I/O at the new point */ 1409 1410 xcnt = scb->buflen - cnt; /* xcnt == bytes xferred */ 1411 scb->buflen = cnt; /* cnt == bytes left */ 1412 1413 if ((scb->flags & FLAG_SG) != 0) { 1414 sg = &scb->sglist[scb->sg_index]; 1415 for (i = scb->sg_index; i < scb->sg_max; sg++, i++) { 1416 xcnt -= le32toh(sg->sg_len); 1417 if (xcnt < 0) { 1418 xcnt += le32toh(sg->sg_len); 1419 1420 sg->sg_addr = 1421 htole32(le32toh(sg->sg_addr) + xcnt); 1422 sg->sg_len = 1423 htole32(le32toh(sg->sg_len) - xcnt); 1424 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1425 scb->sgoffset, IHA_SG_SIZE, 1426 BUS_DMASYNC_PREWRITE); 1427 1428 scb->bufaddr += (i - scb->sg_index) * 1429 sizeof(struct iha_sg_element); 1430 scb->sg_size = scb->sg_max - i; 1431 scb->sg_index = i; 1432 1433 return (4); 1434 } 1435 } 1436 return (6); 1437 1438 } else 1439 scb->bufaddr += xcnt; 1440 1441 return (4); 1442 } 1443 1444 /* 1445 * iha_state_6 - finish off the active scb (may require several 1446 * iterations if PHASE_MSG_IN) and return -1 to indicate 1447 * the bus is free. 1448 */ 1449 static int 1450 iha_state_6(sc) 1451 struct iha_softc *sc; 1452 { 1453 1454 for (;;) { 1455 switch (sc->sc_phase) { 1456 case PHASE_STATUS_IN: 1457 if (iha_status_msg(sc) == -1) 1458 return (-1); 1459 break; 1460 1461 case PHASE_MSG_IN: 1462 sc->sc_actscb->nextstat = 6; 1463 if ((iha_msgin(sc)) == -1) 1464 return (-1); 1465 break; 1466 1467 case PHASE_MSG_OUT: 1468 if ((iha_msgout(sc, MSG_NOOP)) == -1) 1469 return (-1); 1470 break; 1471 1472 case PHASE_DATA_IN: 1473 if (iha_xpad_in(sc) == -1) 1474 return (-1); 1475 break; 1476 1477 case PHASE_DATA_OUT: 1478 if (iha_xpad_out(sc) == -1) 1479 return (-1); 1480 break; 1481 1482 default: 1483 iha_bad_seq(sc); 1484 return (-1); 1485 } 1486 } 1487 } 1488 1489 /* 1490 * iha_state_8 - reset the active device and all busy SCBs using it 1491 */ 1492 static int 1493 iha_state_8(sc) 1494 struct iha_softc *sc; 1495 { 1496 bus_space_tag_t iot = sc->sc_iot; 1497 bus_space_handle_t ioh = sc->sc_ioh; 1498 struct iha_scsi_req_q *scb; 1499 int i; 1500 u_int8_t tar; 1501 1502 if (sc->sc_phase == PHASE_MSG_OUT) { 1503 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_BUS_DEV_RESET); 1504 1505 scb = sc->sc_actscb; 1506 1507 /* This SCB finished correctly -- resetting the device */ 1508 iha_append_done_scb(sc, scb, HOST_OK); 1509 1510 iha_reset_tcs(scb->tcs, sc->sc_sconf1); 1511 1512 tar = scb->target; 1513 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 1514 if (scb->target == tar) 1515 switch (scb->status) { 1516 case STATUS_BUSY: 1517 iha_append_done_scb(sc, 1518 scb, HOST_DEV_RST); 1519 break; 1520 1521 case STATUS_SELECT: 1522 iha_push_pend_scb(sc, scb); 1523 break; 1524 1525 default: 1526 break; 1527 } 1528 1529 sc->sc_flags |= FLAG_EXPECT_DISC; 1530 1531 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1532 return (-1); 1533 } 1534 1535 iha_bad_seq(sc); 1536 return (-1); 1537 } 1538 1539 /* 1540 * iha_xfer_data - initiate the DMA xfer of the data 1541 */ 1542 static int 1543 iha_xfer_data(sc, scb, direction) 1544 struct iha_softc *sc; 1545 struct iha_scsi_req_q *scb; 1546 int direction; 1547 { 1548 bus_space_tag_t iot = sc->sc_iot; 1549 bus_space_handle_t ioh = sc->sc_ioh; 1550 u_int32_t xferlen; 1551 u_int8_t xfertype; 1552 1553 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) != direction) 1554 return (6); /* wrong direction, abandon I/O */ 1555 1556 bus_space_write_4(iot, ioh, TUL_STCNT0, scb->buflen); 1557 1558 if ((scb->flags & FLAG_SG) == 0) { 1559 xferlen = scb->buflen; 1560 xfertype = (direction == XS_CTL_DATA_IN) ? ST_X_IN : ST_X_OUT; 1561 1562 } else { 1563 xferlen = scb->sg_size * sizeof(struct iha_sg_element); 1564 xfertype = (direction == XS_CTL_DATA_IN) ? ST_SG_IN : ST_SG_OUT; 1565 } 1566 1567 bus_space_write_4(iot, ioh, TUL_DXC, xferlen); 1568 bus_space_write_4(iot, ioh, TUL_DXPA, scb->bufaddr); 1569 bus_space_write_1(iot, ioh, TUL_DCMD, xfertype); 1570 1571 bus_space_write_1(iot, ioh, TUL_SCMD, 1572 (direction == XS_CTL_DATA_IN) ? XF_DMA_IN : XF_DMA_OUT); 1573 1574 scb->nextstat = 5; 1575 1576 return (0); 1577 } 1578 1579 static int 1580 iha_xpad_in(sc) 1581 struct iha_softc *sc; 1582 { 1583 bus_space_tag_t iot = sc->sc_iot; 1584 bus_space_handle_t ioh = sc->sc_ioh; 1585 struct iha_scsi_req_q *scb = sc->sc_actscb; 1586 1587 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) != 0) 1588 scb->ha_stat = HOST_DO_DU; 1589 1590 for (;;) { 1591 if ((scb->tcs->syncm & PERIOD_WIDE_SCSI) != 0) 1592 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 1593 else 1594 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1595 1596 switch (iha_wait(sc, XF_FIFO_IN)) { 1597 case -1: 1598 return (-1); 1599 1600 case PHASE_DATA_IN: 1601 bus_space_read_1(iot, ioh, TUL_SFIFO); 1602 break; 1603 1604 default: 1605 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1606 return (6); 1607 } 1608 } 1609 } 1610 1611 static int 1612 iha_xpad_out(sc) 1613 struct iha_softc *sc; 1614 { 1615 bus_space_tag_t iot = sc->sc_iot; 1616 bus_space_handle_t ioh = sc->sc_ioh; 1617 struct iha_scsi_req_q *scb = sc->sc_actscb; 1618 1619 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) != 0) 1620 scb->ha_stat = HOST_DO_DU; 1621 1622 for (;;) { 1623 if ((scb->tcs->syncm & PERIOD_WIDE_SCSI) != 0) 1624 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 1625 else 1626 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1627 1628 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 1629 1630 switch (iha_wait(sc, XF_FIFO_OUT)) { 1631 case -1: 1632 return (-1); 1633 1634 case PHASE_DATA_OUT: 1635 break; 1636 1637 default: 1638 /* Disable wide CPU to allow read 16 bits */ 1639 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1640 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1641 return (6); 1642 } 1643 } 1644 } 1645 1646 static int 1647 iha_status_msg(sc) 1648 struct iha_softc *sc; 1649 { 1650 bus_space_tag_t iot = sc->sc_iot; 1651 bus_space_handle_t ioh = sc->sc_ioh; 1652 struct iha_scsi_req_q *scb; 1653 u_int8_t msg; 1654 int phase; 1655 1656 if ((phase = iha_wait(sc, CMD_COMP)) == -1) 1657 return (-1); 1658 1659 scb = sc->sc_actscb; 1660 1661 scb->ta_stat = bus_space_read_1(iot, ioh, TUL_SFIFO); 1662 1663 if (phase == PHASE_MSG_OUT) { 1664 if ((sc->sc_status0 & SPERR) == 0) 1665 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_NOOP); 1666 else 1667 bus_space_write_1(iot, ioh, TUL_SFIFO, 1668 MSG_PARITY_ERROR); 1669 1670 return (iha_wait(sc, XF_FIFO_OUT)); 1671 1672 } else if (phase == PHASE_MSG_IN) { 1673 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 1674 1675 if ((sc->sc_status0 & SPERR) != 0) 1676 switch (iha_wait(sc, MSG_ACCEPT)) { 1677 case -1: 1678 return (-1); 1679 case PHASE_MSG_OUT: 1680 bus_space_write_1(iot, ioh, TUL_SFIFO, 1681 MSG_PARITY_ERROR); 1682 return (iha_wait(sc, XF_FIFO_OUT)); 1683 default: 1684 iha_bad_seq(sc); 1685 return (-1); 1686 } 1687 1688 if (msg == MSG_CMDCOMPLETE) { 1689 if ((scb->ta_stat & 1690 (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) { 1691 iha_bad_seq(sc); 1692 return (-1); 1693 } 1694 sc->sc_flags |= FLAG_EXPECT_DONE_DISC; 1695 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1696 return (iha_wait(sc, MSG_ACCEPT)); 1697 } 1698 1699 if ((msg == MSG_LINK_CMD_COMPLETE) 1700 || (msg == MSG_LINK_CMD_COMPLETEF)) { 1701 if ((scb->ta_stat & 1702 (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) 1703 return (iha_wait(sc, MSG_ACCEPT)); 1704 } 1705 } 1706 1707 iha_bad_seq(sc); 1708 return (-1); 1709 } 1710 1711 /* 1712 * iha_busfree - SCSI bus free detected as a result of a TIMEOUT or 1713 * DISCONNECT interrupt. Reset the tulip FIFO and 1714 * SCONFIG0 and enable hardware reselect. Move any active 1715 * SCB to sc_donescb list. Return an appropriate host status 1716 * if an I/O was active. 1717 */ 1718 static void 1719 iha_busfree(sc) 1720 struct iha_softc *sc; 1721 { 1722 bus_space_tag_t iot = sc->sc_iot; 1723 bus_space_handle_t ioh = sc->sc_ioh; 1724 struct iha_scsi_req_q *scb; 1725 1726 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1727 bus_space_write_1(iot, ioh, TUL_SCONFIG0, SCONFIG0DEFAULT); 1728 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1729 1730 scb = sc->sc_actscb; 1731 1732 if (scb != NULL) { 1733 if (scb->status == STATUS_SELECT) 1734 /* selection timeout */ 1735 iha_append_done_scb(sc, scb, HOST_SEL_TOUT); 1736 else 1737 /* Unexpected bus free */ 1738 iha_append_done_scb(sc, scb, HOST_BAD_PHAS); 1739 } 1740 } 1741 1742 static void 1743 iha_reset_scsi_bus(sc) 1744 struct iha_softc *sc; 1745 { 1746 struct iha_scsi_req_q *scb; 1747 struct tcs *tcs; 1748 int i, s; 1749 1750 s = splbio(); 1751 1752 iha_reset_dma(sc); 1753 1754 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 1755 switch (scb->status) { 1756 case STATUS_BUSY: 1757 iha_append_done_scb(sc, scb, HOST_SCSI_RST); 1758 break; 1759 1760 case STATUS_SELECT: 1761 iha_push_pend_scb(sc, scb); 1762 break; 1763 1764 default: 1765 break; 1766 } 1767 1768 for (i = 0, tcs = sc->sc_tcs; i < IHA_MAX_TARGETS; i++, tcs++) 1769 iha_reset_tcs(tcs, sc->sc_sconf1); 1770 1771 splx(s); 1772 } 1773 1774 /* 1775 * iha_resel - handle a detected SCSI bus reselection request. 1776 */ 1777 static int 1778 iha_resel(sc) 1779 struct iha_softc *sc; 1780 { 1781 bus_space_tag_t iot = sc->sc_iot; 1782 bus_space_handle_t ioh = sc->sc_ioh; 1783 struct iha_scsi_req_q *scb; 1784 struct tcs *tcs; 1785 u_int8_t tag, target, lun, msg, abortmsg; 1786 1787 if (sc->sc_actscb != NULL) { 1788 if ((sc->sc_actscb->status == STATUS_SELECT)) 1789 iha_push_pend_scb(sc, sc->sc_actscb); 1790 sc->sc_actscb = NULL; 1791 } 1792 1793 target = bus_space_read_1(iot, ioh, TUL_SBID); 1794 lun = bus_space_read_1(iot, ioh, TUL_SALVC) & MSG_IDENTIFY_LUNMASK; 1795 1796 tcs = &sc->sc_tcs[target]; 1797 1798 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 1799 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 1800 1801 abortmsg = MSG_ABORT; /* until a valid tag has been obtained */ 1802 1803 if (tcs->ntagscb != NULL) 1804 /* There is a non-tagged I/O active on the target */ 1805 scb = tcs->ntagscb; 1806 1807 else { 1808 /* 1809 * Since there is no active non-tagged operation 1810 * read the tag type, the tag itself, and find 1811 * the appropriate scb by indexing sc_scb with 1812 * the tag. 1813 */ 1814 1815 switch (iha_wait(sc, MSG_ACCEPT)) { 1816 case -1: 1817 return (-1); 1818 case PHASE_MSG_IN: 1819 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1820 if ((iha_wait(sc, XF_FIFO_IN)) == -1) 1821 return (-1); 1822 break; 1823 default: 1824 goto abort; 1825 } 1826 1827 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag Msg */ 1828 1829 if ((msg < MSG_SIMPLE_Q_TAG) || (msg > MSG_ORDERED_Q_TAG)) 1830 goto abort; 1831 1832 switch (iha_wait(sc, MSG_ACCEPT)) { 1833 case -1: 1834 return (-1); 1835 case PHASE_MSG_IN: 1836 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1837 if ((iha_wait(sc, XF_FIFO_IN)) == -1) 1838 return (-1); 1839 break; 1840 default: 1841 goto abort; 1842 } 1843 1844 tag = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag ID */ 1845 scb = &sc->sc_scb[tag]; 1846 1847 abortmsg = MSG_ABORT_TAG; /* Now that we have valdid tag! */ 1848 } 1849 1850 if ((scb->target != target) 1851 || (scb->lun != lun) 1852 || (scb->status != STATUS_BUSY)) { 1853 abort: 1854 iha_msgout_abort(sc, abortmsg); 1855 return (-1); 1856 } 1857 1858 sc->sc_actscb = scb; 1859 1860 if (iha_wait(sc, MSG_ACCEPT) == -1) 1861 return (-1); 1862 1863 return (iha_next_state(sc)); 1864 } 1865 1866 static int 1867 iha_msgin(sc) 1868 struct iha_softc *sc; 1869 { 1870 bus_space_tag_t iot = sc->sc_iot; 1871 bus_space_handle_t ioh = sc->sc_ioh; 1872 int flags; 1873 int phase; 1874 u_int8_t msg; 1875 1876 for (;;) { 1877 if ((bus_space_read_1(iot, ioh, TUL_SFIFOCNT) & FIFOC) > 0) 1878 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1879 1880 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1881 1882 phase = iha_wait(sc, XF_FIFO_IN); 1883 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 1884 1885 switch (msg) { 1886 case MSG_DISCONNECT: 1887 sc->sc_flags |= FLAG_EXPECT_DISC; 1888 if (iha_wait(sc, MSG_ACCEPT) != -1) 1889 iha_bad_seq(sc); 1890 phase = -1; 1891 break; 1892 case MSG_SAVEDATAPOINTER: 1893 case MSG_RESTOREPOINTERS: 1894 case MSG_NOOP: 1895 phase = iha_wait(sc, MSG_ACCEPT); 1896 break; 1897 case MSG_MESSAGE_REJECT: 1898 /* XXX - need to clear FIFO like other 'Clear ATN'?*/ 1899 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 1900 flags = sc->sc_actscb->tcs->flags; 1901 if ((flags & FLAG_NO_NEG_SYNC) == 0) 1902 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 1903 phase = iha_wait(sc, MSG_ACCEPT); 1904 break; 1905 case MSG_EXTENDED: 1906 phase = iha_msgin_extended(sc); 1907 break; 1908 case MSG_IGN_WIDE_RESIDUE: 1909 phase = iha_msgin_ignore_wid_resid(sc); 1910 break; 1911 case MSG_CMDCOMPLETE: 1912 sc->sc_flags |= FLAG_EXPECT_DONE_DISC; 1913 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1914 phase = iha_wait(sc, MSG_ACCEPT); 1915 if (phase != -1) { 1916 iha_bad_seq(sc); 1917 return (-1); 1918 } 1919 break; 1920 default: 1921 printf("[debug] iha_msgin: bad msg type: %d\n", msg); 1922 phase = iha_msgout_reject(sc); 1923 break; 1924 } 1925 1926 if (phase != PHASE_MSG_IN) 1927 return (phase); 1928 } 1929 /* NOTREACHED */ 1930 } 1931 1932 static int 1933 iha_msgin_ignore_wid_resid(sc) 1934 struct iha_softc *sc; 1935 { 1936 bus_space_tag_t iot = sc->sc_iot; 1937 bus_space_handle_t ioh = sc->sc_ioh; 1938 int phase; 1939 1940 phase = iha_wait(sc, MSG_ACCEPT); 1941 1942 if (phase == PHASE_MSG_IN) { 1943 phase = iha_wait(sc, XF_FIFO_IN); 1944 1945 if (phase != -1) { 1946 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 1947 bus_space_read_1(iot, ioh, TUL_SFIFO); 1948 bus_space_read_1(iot, ioh, TUL_SFIFO); 1949 1950 phase = iha_wait(sc, MSG_ACCEPT); 1951 } 1952 } 1953 1954 return (phase); 1955 } 1956 1957 static int 1958 iha_msgin_extended(sc) 1959 struct iha_softc *sc; 1960 { 1961 bus_space_tag_t iot = sc->sc_iot; 1962 bus_space_handle_t ioh = sc->sc_ioh; 1963 int flags, i, phase, msglen, msgcode; 1964 1965 /* 1966 * XXX - can we just stop reading and reject, or do we have to 1967 * read all input, discarding the excess, and then reject 1968 */ 1969 for (i = 0; i < IHA_MAX_EXTENDED_MSG; i++) { 1970 phase = iha_wait(sc, MSG_ACCEPT); 1971 1972 if (phase != PHASE_MSG_IN) 1973 return (phase); 1974 1975 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1976 1977 if (iha_wait(sc, XF_FIFO_IN) == -1) 1978 return (-1); 1979 1980 sc->sc_msg[i] = bus_space_read_1(iot, ioh, TUL_SFIFO); 1981 1982 if (sc->sc_msg[0] == i) 1983 break; 1984 } 1985 1986 msglen = sc->sc_msg[0]; 1987 msgcode = sc->sc_msg[1]; 1988 1989 if ((msglen == MSG_EXT_SDTR_LEN) && (msgcode == MSG_EXT_SDTR)) { 1990 if (iha_msgin_sdtr(sc) == 0) { 1991 iha_sync_done(sc); 1992 return (iha_wait(sc, MSG_ACCEPT)); 1993 } 1994 1995 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 1996 1997 phase = iha_wait(sc, MSG_ACCEPT); 1998 if (phase != PHASE_MSG_OUT) 1999 return (phase); 2000 2001 /* Clear FIFO for important message - final SYNC offer */ 2002 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2003 2004 iha_sync_done(sc); /* This is our final offer */ 2005 2006 } else if ((msglen == MSG_EXT_WDTR_LEN) && (msgcode == MSG_EXT_WDTR)) { 2007 2008 flags = sc->sc_actscb->tcs->flags; 2009 2010 if ((flags & FLAG_NO_WIDE) != 0) 2011 sc->sc_msg[2] = 0; /* Offer async xfers only */ 2012 2013 else if (sc->sc_msg[2] > 2) /* BAD MSG: 2 is max value */ 2014 return (iha_msgout_reject(sc)); 2015 2016 else if (sc->sc_msg[2] == 2) /* a request for 32 bit xfers*/ 2017 sc->sc_msg[2] = 1; /* Offer 16 instead */ 2018 2019 else { 2020 iha_wide_done(sc); 2021 if ((flags & FLAG_NO_NEG_SYNC) == 0) 2022 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2023 return (iha_wait(sc, MSG_ACCEPT)); 2024 } 2025 2026 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2027 2028 phase = iha_wait(sc, MSG_ACCEPT); 2029 if (phase != PHASE_MSG_OUT) 2030 return (phase); 2031 } else 2032 return (iha_msgout_reject(sc)); 2033 2034 return (iha_msgout_extended(sc)); 2035 } 2036 2037 /* 2038 * iha_msgin_sdtr - check SDTR msg in sc_msg. If the offer is 2039 * acceptable leave sc_msg as is and return 0. 2040 * If the negotiation must continue, modify sc_msg 2041 * as needed and return 1. Else return 0. 2042 */ 2043 static int 2044 iha_msgin_sdtr(sc) 2045 struct iha_softc *sc; 2046 { 2047 int flags; 2048 int newoffer; 2049 u_int8_t default_period; 2050 2051 flags = sc->sc_actscb->tcs->flags; 2052 2053 default_period = iha_rate_tbl[flags & FLAG_SCSI_RATE]; 2054 2055 if (sc->sc_msg[3] == 0) /* target offered async only. Accept it. */ 2056 return (0); 2057 2058 newoffer = 0; 2059 2060 if ((flags & FLAG_NO_SYNC) != 0) { 2061 sc->sc_msg[3] = 0; 2062 newoffer = 1; 2063 } 2064 2065 if (sc->sc_msg[3] > IHA_MAX_OFFSET) { 2066 sc->sc_msg[3] = IHA_MAX_OFFSET; 2067 newoffer = 1; 2068 } 2069 2070 if (sc->sc_msg[2] < default_period) { 2071 sc->sc_msg[2] = default_period; 2072 newoffer = 1; 2073 } 2074 2075 if (sc->sc_msg[2] >= 59) { /* XXX magic */ 2076 sc->sc_msg[3] = 0; 2077 newoffer = 1; 2078 } 2079 2080 return (newoffer); 2081 } 2082 2083 static int 2084 iha_msgout(sc, msg) 2085 struct iha_softc *sc; 2086 u_int8_t msg; 2087 { 2088 2089 bus_space_write_1(sc->sc_iot, sc->sc_ioh, TUL_SFIFO, msg); 2090 2091 return (iha_wait(sc, XF_FIFO_OUT)); 2092 } 2093 2094 static void 2095 iha_msgout_abort(sc, aborttype) 2096 struct iha_softc *sc; 2097 u_int8_t aborttype; 2098 { 2099 2100 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2101 2102 switch (iha_wait(sc, MSG_ACCEPT)) { 2103 case -1: 2104 break; 2105 2106 case PHASE_MSG_OUT: 2107 sc->sc_flags |= FLAG_EXPECT_DISC; 2108 if (iha_msgout(sc, aborttype) != -1) 2109 iha_bad_seq(sc); 2110 break; 2111 2112 default: 2113 iha_bad_seq(sc); 2114 break; 2115 } 2116 } 2117 2118 static int 2119 iha_msgout_reject(sc) 2120 struct iha_softc *sc; 2121 { 2122 2123 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2124 2125 if (iha_wait(sc, MSG_ACCEPT) == PHASE_MSG_OUT) 2126 return (iha_msgout(sc, MSG_MESSAGE_REJECT)); 2127 2128 return (-1); 2129 } 2130 2131 static int 2132 iha_msgout_extended(sc) 2133 struct iha_softc *sc; 2134 { 2135 bus_space_tag_t iot = sc->sc_iot; 2136 bus_space_handle_t ioh = sc->sc_ioh; 2137 int phase; 2138 2139 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_EXTENDED); 2140 2141 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2142 sc->sc_msg, sc->sc_msg[0] + 1); 2143 2144 phase = iha_wait(sc, XF_FIFO_OUT); 2145 2146 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2147 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 2148 2149 return (phase); 2150 } 2151 2152 static int 2153 iha_msgout_wdtr(sc) 2154 struct iha_softc *sc; 2155 { 2156 2157 sc->sc_actscb->tcs->flags |= FLAG_WIDE_DONE; 2158 2159 sc->sc_msg[0] = MSG_EXT_WDTR_LEN; 2160 sc->sc_msg[1] = MSG_EXT_WDTR; 2161 sc->sc_msg[2] = MSG_EXT_WDTR_BUS_16_BIT; 2162 2163 return (iha_msgout_extended(sc)); 2164 } 2165 2166 static int 2167 iha_msgout_sdtr(sc) 2168 struct iha_softc *sc; 2169 { 2170 int rateindex; 2171 2172 rateindex = sc->sc_actscb->tcs->flags & FLAG_SCSI_RATE; 2173 2174 sc->sc_msg[0] = MSG_EXT_SDTR_LEN; 2175 sc->sc_msg[1] = MSG_EXT_SDTR; 2176 sc->sc_msg[2] = iha_rate_tbl[rateindex]; 2177 sc->sc_msg[3] = IHA_MAX_OFFSET; /* REQ/ACK */ 2178 2179 return (iha_msgout_extended(sc)); 2180 } 2181 2182 static void 2183 iha_wide_done(sc) 2184 struct iha_softc *sc; 2185 { 2186 bus_space_tag_t iot = sc->sc_iot; 2187 bus_space_handle_t ioh = sc->sc_ioh; 2188 struct tcs *tcs = sc->sc_actscb->tcs; 2189 2190 tcs->syncm = 0; 2191 tcs->period = 0; 2192 tcs->offset = 0; 2193 2194 if (sc->sc_msg[2] != 0) 2195 tcs->syncm |= PERIOD_WIDE_SCSI; 2196 2197 tcs->sconfig0 &= ~ALTPD; 2198 tcs->flags &= ~FLAG_SYNC_DONE; 2199 tcs->flags |= FLAG_WIDE_DONE; 2200 2201 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 2202 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 2203 } 2204 2205 static void 2206 iha_sync_done(sc) 2207 struct iha_softc *sc; 2208 { 2209 bus_space_tag_t iot = sc->sc_iot; 2210 bus_space_handle_t ioh = sc->sc_ioh; 2211 struct tcs *tcs = sc->sc_actscb->tcs; 2212 int i; 2213 2214 if ((tcs->flags & FLAG_SYNC_DONE) == 0) { 2215 tcs->period = sc->sc_msg[2]; 2216 tcs->offset = sc->sc_msg[3]; 2217 if (tcs->offset != 0) { 2218 tcs->syncm |= tcs->offset; 2219 2220 /* pick the highest possible rate */ 2221 for (i = 0; i < 8; i++) 2222 if (iha_rate_tbl[i] >= tcs->period) 2223 break; 2224 2225 tcs->syncm |= (i << 4); 2226 tcs->sconfig0 |= ALTPD; 2227 } 2228 2229 tcs->flags |= FLAG_SYNC_DONE; 2230 2231 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 2232 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 2233 } 2234 } 2235 2236 void 2237 iha_reset_chip(sc) 2238 struct iha_softc *sc; 2239 { 2240 bus_space_tag_t iot = sc->sc_iot; 2241 bus_space_handle_t ioh = sc->sc_ioh; 2242 2243 /* reset tulip chip */ 2244 2245 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSCSI); 2246 2247 do { 2248 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 2249 } while ((sc->sc_sistat & SRSTD) == 0); 2250 2251 iha_set_ssig(sc, 0, 0); 2252 2253 bus_space_read_1(iot, ioh, TUL_SISTAT); /* Clear any active interrupt*/ 2254 } 2255 2256 static void 2257 iha_select(sc, scb, select_type) 2258 struct iha_softc *sc; 2259 struct iha_scsi_req_q *scb; 2260 u_int8_t select_type; 2261 { 2262 bus_space_tag_t iot = sc->sc_iot; 2263 bus_space_handle_t ioh = sc->sc_ioh; 2264 2265 switch (select_type) { 2266 case SEL_ATN: 2267 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 2268 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2269 scb->cmd, scb->cmdlen); 2270 2271 scb->nextstat = 2; 2272 break; 2273 2274 case SELATNSTOP: 2275 scb->nextstat = 1; 2276 break; 2277 2278 case SEL_ATN3: 2279 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 2280 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_tagmsg); 2281 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_tagid); 2282 2283 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, scb->cmd, 2284 scb->cmdlen); 2285 2286 scb->nextstat = 2; 2287 break; 2288 2289 default: 2290 printf("[debug] iha_select() - unknown select type = 0x%02x\n", 2291 select_type); 2292 return; 2293 } 2294 2295 iha_del_pend_scb(sc, scb); 2296 scb->status = STATUS_SELECT; 2297 2298 sc->sc_actscb = scb; 2299 2300 bus_space_write_1(iot, ioh, TUL_SCMD, select_type); 2301 } 2302 2303 /* 2304 * iha_wait - wait for an interrupt to service or a SCSI bus phase change 2305 * after writing the supplied command to the tulip chip. If 2306 * the command is NO_OP, skip the command writing. 2307 */ 2308 static int 2309 iha_wait(sc, cmd) 2310 struct iha_softc *sc; 2311 u_int8_t cmd; 2312 { 2313 bus_space_tag_t iot = sc->sc_iot; 2314 bus_space_handle_t ioh = sc->sc_ioh; 2315 2316 if (cmd != NO_OP) 2317 bus_space_write_1(iot, ioh, TUL_SCMD, cmd); 2318 2319 /* 2320 * Have to do this here, in addition to in iha_isr, because 2321 * interrupts might be turned off when we get here. 2322 */ 2323 do { 2324 sc->sc_status0 = bus_space_read_1(iot, ioh, TUL_STAT0); 2325 } while ((sc->sc_status0 & INTPD) == 0); 2326 2327 sc->sc_status1 = bus_space_read_1(iot, ioh, TUL_STAT1); 2328 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 2329 2330 sc->sc_phase = sc->sc_status0 & PH_MASK; 2331 2332 if ((sc->sc_sistat & SRSTD) != 0) { 2333 /* SCSI bus reset interrupt */ 2334 iha_reset_scsi_bus(sc); 2335 return (-1); 2336 } 2337 2338 if ((sc->sc_sistat & RSELED) != 0) 2339 /* Reselection interrupt */ 2340 return (iha_resel(sc)); 2341 2342 if ((sc->sc_sistat & STIMEO) != 0) { 2343 /* selected/reselected timeout interrupt */ 2344 iha_busfree(sc); 2345 return (-1); 2346 } 2347 2348 if ((sc->sc_sistat & DISCD) != 0) { 2349 /* BUS disconnection interrupt */ 2350 if ((sc->sc_flags & FLAG_EXPECT_DONE_DISC) != 0) { 2351 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2352 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 2353 SCONFIG0DEFAULT); 2354 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2355 iha_append_done_scb(sc, sc->sc_actscb, HOST_OK); 2356 sc->sc_flags &= ~FLAG_EXPECT_DONE_DISC; 2357 2358 } else if ((sc->sc_flags & FLAG_EXPECT_DISC) != 0) { 2359 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2360 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 2361 SCONFIG0DEFAULT); 2362 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2363 sc->sc_actscb = NULL; 2364 sc->sc_flags &= ~FLAG_EXPECT_DISC; 2365 2366 } else 2367 iha_busfree(sc); 2368 2369 return (-1); 2370 } 2371 2372 return (sc->sc_phase); 2373 } 2374 2375 /* 2376 * iha_done_scb - We have a scb which has been processed by the 2377 * adaptor, now we look to see how the operation went. 2378 */ 2379 static void 2380 iha_done_scb(sc, scb) 2381 struct iha_softc *sc; 2382 struct iha_scsi_req_q *scb; 2383 { 2384 struct scsipi_xfer *xs = scb->xs; 2385 2386 if (xs != NULL) { 2387 /* Cancel the timeout. */ 2388 callout_stop(&xs->xs_callout); 2389 2390 if (xs->datalen > 0) { 2391 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 2392 0, scb->dmap->dm_mapsize, 2393 (xs->xs_control & XS_CTL_DATA_IN) ? 2394 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2395 bus_dmamap_unload(sc->sc_dmat, scb->dmap); 2396 } 2397 2398 xs->status = scb->ta_stat; 2399 2400 switch (scb->ha_stat) { 2401 case HOST_OK: 2402 switch (scb->ta_stat) { 2403 case SCSI_OK: 2404 case SCSI_CONDITION_MET: 2405 case SCSI_INTERM: 2406 case SCSI_INTERM_COND_MET: 2407 xs->resid = scb->buflen; 2408 xs->error = XS_NOERROR; 2409 if ((scb->flags & FLAG_RSENS) != 0) 2410 xs->error = XS_SENSE; 2411 break; 2412 2413 case SCSI_RESV_CONFLICT: 2414 case SCSI_BUSY: 2415 case SCSI_QUEUE_FULL: 2416 xs->error = XS_BUSY; 2417 break; 2418 2419 case SCSI_TERMINATED: 2420 case SCSI_ACA_ACTIVE: 2421 case SCSI_CHECK: 2422 scb->tcs->flags &= 2423 ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 2424 2425 if ((scb->flags & FLAG_RSENS) != 0 || 2426 iha_push_sense_request(sc, scb) != 0) { 2427 scb->flags &= FLAG_RSENS; 2428 printf("%s: request sense failed\n", 2429 sc->sc_dev.dv_xname); 2430 xs->error = XS_DRIVER_STUFFUP; 2431 break; 2432 } 2433 2434 xs->error = XS_SENSE; 2435 return; 2436 2437 default: 2438 xs->error = XS_DRIVER_STUFFUP; 2439 break; 2440 } 2441 break; 2442 2443 case HOST_SEL_TOUT: 2444 xs->error = XS_SELTIMEOUT; 2445 break; 2446 2447 case HOST_SCSI_RST: 2448 case HOST_DEV_RST: 2449 xs->error = XS_RESET; 2450 break; 2451 2452 case HOST_SPERR: 2453 printf("%s: SCSI Parity error detected\n", 2454 sc->sc_dev.dv_xname); 2455 xs->error = XS_DRIVER_STUFFUP; 2456 break; 2457 2458 case HOST_TIMED_OUT: 2459 xs->error = XS_TIMEOUT; 2460 break; 2461 2462 case HOST_DO_DU: 2463 case HOST_BAD_PHAS: 2464 default: 2465 xs->error = XS_DRIVER_STUFFUP; 2466 break; 2467 } 2468 2469 scsipi_done(xs); 2470 } 2471 2472 iha_append_free_scb(sc, scb); 2473 } 2474 2475 static void 2476 iha_timeout(arg) 2477 void *arg; 2478 { 2479 struct iha_scsi_req_q *scb = (struct iha_scsi_req_q *)arg; 2480 struct scsipi_xfer *xs = scb->xs; 2481 struct scsipi_periph *periph = xs->xs_periph; 2482 struct iha_softc *sc; 2483 2484 sc = (void *)periph->periph_channel->chan_adapter->adapt_dev; 2485 2486 if (xs == NULL) 2487 printf("[debug] iha_timeout called with xs == NULL\n"); 2488 2489 else { 2490 scsipi_printaddr(periph); 2491 printf("SCSI OpCode 0x%02x timed out\n", xs->cmd->opcode); 2492 2493 iha_abort_xs(sc, xs, HOST_TIMED_OUT); 2494 } 2495 } 2496 2497 static void 2498 iha_exec_scb(sc, scb) 2499 struct iha_softc *sc; 2500 struct iha_scsi_req_q *scb; 2501 { 2502 bus_space_tag_t iot; 2503 bus_space_handle_t ioh; 2504 bus_dmamap_t dm; 2505 struct scsipi_xfer *xs = scb->xs; 2506 int nseg, s; 2507 2508 dm = scb->dmap; 2509 nseg = dm->dm_nsegs; 2510 2511 if (nseg > 1) { 2512 struct iha_sg_element *sg = scb->sglist; 2513 int i; 2514 2515 for (i = 0; i < nseg; i++) { 2516 sg[i].sg_len = htole32(dm->dm_segs[i].ds_len); 2517 sg[i].sg_addr = htole32(dm->dm_segs[i].ds_addr); 2518 } 2519 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 2520 scb->sgoffset, IHA_SG_SIZE, 2521 BUS_DMASYNC_PREWRITE); 2522 2523 scb->flags |= FLAG_SG; /* XXX */ 2524 scb->sg_size = scb->sg_max = nseg; 2525 2526 scb->bufaddr = scb->sg_addr; 2527 } else 2528 scb->bufaddr = dm->dm_segs[0].ds_addr; 2529 2530 if ((xs->xs_control & XS_CTL_POLL) == 0) { 2531 int timeout = xs->timeout; 2532 timeout = (timeout > 100000) ? 2533 timeout / 1000 * hz : timeout * hz / 1000; 2534 if (timeout == 0) 2535 timeout = 1; 2536 callout_reset(&xs->xs_callout, timeout, iha_timeout, scb); 2537 } 2538 2539 s = splbio(); 2540 2541 if (((scb->flags & XS_RESET) != 0) || (scb->cmd[0] == REQUEST_SENSE)) 2542 iha_push_pend_scb(sc, scb); /* Insert SCB at head of Pend */ 2543 else 2544 iha_append_pend_scb(sc, scb); /* Append SCB to tail of Pend */ 2545 2546 /* 2547 * Run through iha_main() to ensure something is active, if 2548 * only this new SCB. 2549 */ 2550 if (sc->sc_semaph != SEMAPH_IN_MAIN) { 2551 iot = sc->sc_iot; 2552 ioh = sc->sc_ioh; 2553 2554 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 2555 sc->sc_semaph = SEMAPH_IN_MAIN;; 2556 2557 splx(s); 2558 iha_main(sc); 2559 s = splbio(); 2560 2561 sc->sc_semaph = ~SEMAPH_IN_MAIN;; 2562 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 2563 } 2564 2565 splx(s); 2566 } 2567 2568 2569 /* 2570 * iha_set_ssig - read the current scsi signal mask, then write a new 2571 * one which turns off/on the specified signals. 2572 */ 2573 static void 2574 iha_set_ssig(sc, offsigs, onsigs) 2575 struct iha_softc *sc; 2576 u_int8_t offsigs, onsigs; 2577 { 2578 bus_space_tag_t iot = sc->sc_iot; 2579 bus_space_handle_t ioh = sc->sc_ioh; 2580 u_int8_t currsigs; 2581 2582 currsigs = bus_space_read_1(iot, ioh, TUL_SSIGI); 2583 bus_space_write_1(iot, ioh, TUL_SSIGO, (currsigs & ~offsigs) | onsigs); 2584 } 2585 2586 /* 2587 * iha_alloc_sglist - allocate and map sglist for SCB's 2588 */ 2589 static int 2590 iha_alloc_sglist(sc) 2591 struct iha_softc *sc; 2592 { 2593 bus_dma_segment_t seg; 2594 int error, rseg; 2595 2596 /* 2597 * Allocate dma-safe memory for the SCB's sglist 2598 */ 2599 if ((error = bus_dmamem_alloc(sc->sc_dmat, 2600 IHA_SG_SIZE * IHA_MAX_SCB, 2601 PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 2602 printf(": unable to allocate sglist, error = %d\n", error); 2603 return (error); 2604 } 2605 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 2606 IHA_SG_SIZE * IHA_MAX_SCB, (caddr_t *)&sc->sc_sglist, 2607 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 2608 printf(": unable to map sglist, error = %d\n", error); 2609 return (error); 2610 } 2611 2612 /* 2613 * Create and load the DMA map used for the SCBs 2614 */ 2615 if ((error = bus_dmamap_create(sc->sc_dmat, 2616 IHA_SG_SIZE * IHA_MAX_SCB, 1, IHA_SG_SIZE * IHA_MAX_SCB, 2617 0, BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 2618 printf(": unable to create control DMA map, error = %d\n", 2619 error); 2620 return (error); 2621 } 2622 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, 2623 sc->sc_sglist, IHA_SG_SIZE * IHA_MAX_SCB, 2624 NULL, BUS_DMA_NOWAIT)) != 0) { 2625 printf(": unable to load control DMA map, error = %d\n", error); 2626 return (error); 2627 } 2628 2629 memset(sc->sc_sglist, 0, IHA_SG_SIZE * IHA_MAX_SCB); 2630 2631 return (0); 2632 } 2633 2634 /* 2635 * iha_read_eeprom - read Serial EEPROM value & set to defaults 2636 * if required. XXX - Writing does NOT work! 2637 */ 2638 void 2639 iha_read_eeprom(sc, eeprom) 2640 struct iha_softc *sc; 2641 struct iha_eeprom *eeprom; 2642 { 2643 bus_space_tag_t iot = sc->sc_iot; 2644 bus_space_handle_t ioh = sc->sc_ioh; 2645 u_int16_t *buf = (u_int16_t *)eeprom; 2646 u_int8_t gctrl; 2647 2648 /* Enable EEProm programming */ 2649 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) | EEPRG; 2650 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2651 2652 /* Read EEProm */ 2653 if (iha_se2_rd_all(sc, buf) == 0) 2654 panic("%s: cannot read EEPROM\n", sc->sc_dev.dv_xname); 2655 2656 /* Disable EEProm programming */ 2657 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) & ~EEPRG; 2658 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2659 } 2660 2661 #ifdef notused 2662 /* 2663 * iha_se2_update_all - Update SCSI H/A configuration parameters from 2664 * serial EEPROM Setup default pattern. Only 2665 * change those values different from the values 2666 * in iha_eeprom. 2667 */ 2668 void 2669 iha_se2_update_all(sc) 2670 struct iha_softc *sc; 2671 { 2672 bus_space_tag_t iot = sc->sc_iot; 2673 bus_space_handle_t ioh = sc->sc_ioh; 2674 u_int16_t *np; 2675 u_int32_t chksum; 2676 int i; 2677 2678 /* Enable erase/write state of EEPROM */ 2679 iha_se2_instr(sc, ENABLE_ERASE); 2680 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2681 EEP_WAIT(); 2682 2683 np = (u_int16_t *)&eeprom_default; 2684 2685 for (i = 0, chksum = 0; i < EEPROM_SIZE - 1; i++) { 2686 iha_se2_wr(sc, i, *np); 2687 chksum += *np++; 2688 } 2689 2690 chksum &= 0x0000ffff; 2691 iha_se2_wr(sc, 31, chksum); 2692 2693 /* Disable erase/write state of EEPROM */ 2694 iha_se2_instr(sc, 0); 2695 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2696 EEP_WAIT(); 2697 } 2698 2699 /* 2700 * iha_se2_wr - write the given 16 bit value into the Serial EEPROM 2701 * at the specified offset 2702 */ 2703 void 2704 iha_se2_wr(sc, addr, writeword) 2705 struct iha_softc *sc; 2706 int addr; 2707 u_int16_t writeword; 2708 { 2709 bus_space_tag_t iot = sc->sc_iot; 2710 bus_space_handle_t ioh = sc->sc_ioh; 2711 int i, bit; 2712 2713 /* send 'WRITE' Instruction == address | WRITE bit */ 2714 iha_se2_instr(sc, addr | WRITE); 2715 2716 for (i = 16; i > 0; i--) { 2717 if (writeword & (1 << (i - 1))) 2718 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRDO); 2719 else 2720 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2721 EEP_WAIT(); 2722 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2723 EEP_WAIT(); 2724 } 2725 2726 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2727 EEP_WAIT(); 2728 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2729 EEP_WAIT(); 2730 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2731 EEP_WAIT(); 2732 2733 for (;;) { 2734 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2735 EEP_WAIT(); 2736 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2737 EEP_WAIT(); 2738 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI; 2739 EEP_WAIT(); 2740 if (bit != 0) 2741 break; /* write complete */ 2742 } 2743 2744 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2745 } 2746 #endif 2747 2748 /* 2749 * iha_se2_rd - read & return the 16 bit value at the specified 2750 * offset in the Serial E2PROM 2751 * 2752 */ 2753 u_int16_t 2754 iha_se2_rd(sc, addr) 2755 struct iha_softc *sc; 2756 int addr; 2757 { 2758 bus_space_tag_t iot = sc->sc_iot; 2759 bus_space_handle_t ioh = sc->sc_ioh; 2760 int i, bit; 2761 u_int16_t readword; 2762 2763 /* Send 'READ' instruction == address | READ bit */ 2764 iha_se2_instr(sc, addr | READ); 2765 2766 readword = 0; 2767 for (i = 16; i > 0; i--) { 2768 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2769 EEP_WAIT(); 2770 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2771 EEP_WAIT(); 2772 /* sample data after the following edge of clock */ 2773 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI ? 1 : 0; 2774 EEP_WAIT(); 2775 2776 readword |= bit << (i - 1); 2777 } 2778 2779 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2780 2781 return (readword); 2782 } 2783 2784 /* 2785 * iha_se2_rd_all - Read SCSI H/A config parameters from serial EEPROM 2786 */ 2787 int 2788 iha_se2_rd_all(sc, buf) 2789 struct iha_softc *sc; 2790 u_int16_t *buf; 2791 { 2792 struct iha_eeprom *eeprom = (struct iha_eeprom *)buf; 2793 u_int32_t chksum; 2794 int i; 2795 2796 for (i = 0, chksum = 0; i < EEPROM_SIZE - 1; i++) { 2797 *buf = iha_se2_rd(sc, i); 2798 chksum += *buf++; 2799 } 2800 *buf = iha_se2_rd(sc, 31); /* read checksum from EEPROM */ 2801 2802 chksum &= 0x0000ffff; /* lower 16 bits */ 2803 2804 return (eeprom->signature == EEP_SIGNATURE) && 2805 (eeprom->checksum == chksum); 2806 } 2807 2808 /* 2809 * iha_se2_instr - write an octet to serial E2PROM one bit at a time 2810 */ 2811 void 2812 iha_se2_instr(sc, instr) 2813 struct iha_softc *sc; 2814 int instr; 2815 { 2816 bus_space_tag_t iot = sc->sc_iot; 2817 bus_space_handle_t ioh = sc->sc_ioh; 2818 int b, i; 2819 2820 b = NVRCS | NVRDO; /* Write the start bit (== 1) */ 2821 2822 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2823 EEP_WAIT(); 2824 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2825 EEP_WAIT(); 2826 2827 for (i = 8; i > 0; i--) { 2828 if (instr & (1 << (i - 1))) 2829 b = NVRCS | NVRDO; /* Write a 1 bit */ 2830 else 2831 b = NVRCS; /* Write a 0 bit */ 2832 2833 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2834 EEP_WAIT(); 2835 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2836 EEP_WAIT(); 2837 } 2838 2839 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2840 } 2841 2842 /* 2843 * iha_reset_tcs - reset the target control structure pointed 2844 * to by tcs to default values. tcs flags 2845 * only has the negotiation done bits reset as 2846 * the other bits are fixed at initialization. 2847 */ 2848 void 2849 iha_reset_tcs(tcs, config0) 2850 struct tcs *tcs; 2851 u_int8_t config0; 2852 { 2853 2854 tcs->flags &= ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 2855 tcs->period = 0; 2856 tcs->offset = 0; 2857 tcs->tagcnt = 0; 2858 tcs->ntagscb = NULL; 2859 tcs->syncm = 0; 2860 tcs->sconfig0 = config0; 2861 } 2862
Indexes created Mon Sep 22 13:09:51 GMT 2025