1 1.2 martin /* $NetBSD: intersil7170reg.h,v 1.2 2008/04/28 20:23:50 martin Exp $ */ 2 1.1 tsutsui 3 1.1 tsutsui /*- 4 1.1 tsutsui * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 1.1 tsutsui * All rights reserved. 6 1.1 tsutsui * 7 1.1 tsutsui * This code is derived from software contributed to The NetBSD Foundation 8 1.1 tsutsui * by Adam Glass. 9 1.1 tsutsui * 10 1.1 tsutsui * Redistribution and use in source and binary forms, with or without 11 1.1 tsutsui * modification, are permitted provided that the following conditions 12 1.1 tsutsui * are met: 13 1.1 tsutsui * 1. Redistributions of source code must retain the above copyright 14 1.1 tsutsui * notice, this list of conditions and the following disclaimer. 15 1.1 tsutsui * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 tsutsui * notice, this list of conditions and the following disclaimer in the 17 1.1 tsutsui * documentation and/or other materials provided with the distribution. 18 1.1 tsutsui * 19 1.1 tsutsui * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 tsutsui * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 tsutsui * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 tsutsui * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 tsutsui * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 tsutsui * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 tsutsui * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 tsutsui * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 tsutsui * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 tsutsui * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 tsutsui * POSSIBILITY OF SUCH DAMAGE. 30 1.1 tsutsui */ 31 1.1 tsutsui 32 1.1 tsutsui #ifndef _INTERSIL7170REG_H_ 33 1.1 tsutsui #define _INTERSIL7170REG_H_ 34 1.1 tsutsui 35 1.1 tsutsui /* 36 1.1 tsutsui * Driver support for the intersil7170 used in sun[34]s to provide 37 1.1 tsutsui * real time clock and time-of-day support. 38 1.1 tsutsui * 39 1.1 tsutsui * Derived from: datasheet "ICM7170 a uP-Compatible Real-Time Clock" 40 1.1 tsutsui * document #301680-005, Dec 85 41 1.1 tsutsui * 42 1.1 tsutsui * Note that this device provides both time-of-day and interval timer 43 1.1 tsutsui * functionality. Both functions use the same control registers. On top 44 1.1 tsutsui * of that, the command control register is write-only. Currently, this 45 1.1 tsutsui * driver assumes that the interval timer is to be enabled, and hence 46 1.1 tsutsui * always sets/restores the INTERSIL_CMD_IENABLE control bit when 47 1.1 tsutsui * manipulating the TOD. 48 1.1 tsutsui */ 49 1.1 tsutsui 50 1.1 tsutsui struct intersil_dt { /* from p. 7 of 10 */ 51 1.1 tsutsui uint8_t dt_csec; 52 1.1 tsutsui uint8_t dt_hour; 53 1.1 tsutsui uint8_t dt_min; 54 1.1 tsutsui uint8_t dt_sec; 55 1.1 tsutsui uint8_t dt_month; 56 1.1 tsutsui uint8_t dt_day; 57 1.1 tsutsui uint8_t dt_year; 58 1.1 tsutsui uint8_t dt_dow; 59 1.1 tsutsui }; 60 1.1 tsutsui 61 1.1 tsutsui struct intersil7170 { 62 1.1 tsutsui struct intersil_dt counters; 63 1.1 tsutsui struct intersil_dt clk_ram; /* should be ok as both are word aligned */ 64 1.1 tsutsui uint8_t clk_intr_reg; 65 1.1 tsutsui uint8_t clk_cmd_reg; 66 1.1 tsutsui }; 67 1.1 tsutsui 68 1.1 tsutsui /* Indices to time-of-day clock registers */ 69 1.1 tsutsui #define INTERSIL_ICSEC 0 70 1.1 tsutsui #define INTERSIL_IHOUR 1 71 1.1 tsutsui #define INTERSIL_IMIN 2 72 1.1 tsutsui #define INTERSIL_ISEC 3 73 1.1 tsutsui #define INTERSIL_IMON 4 74 1.1 tsutsui #define INTERSIL_IDAY 5 75 1.1 tsutsui #define INTERSIL_IYEAR 6 76 1.1 tsutsui #define INTERSIL_IDOW 7 77 1.1 tsutsui 78 1.1 tsutsui #define INTERSIL_IINTR 16 79 1.1 tsutsui #define INTERSIL_ICMD 17 80 1.1 tsutsui 81 1.1 tsutsui /* bit assignments for command register, p. 6 of 10, write-only */ 82 1.1 tsutsui #define INTERSIL_CMD_FREQ_32K 0x0 83 1.1 tsutsui #define INTERSIL_CMD_FREQ_1M 0x1 84 1.1 tsutsui #define INTERSIL_CMD_FREQ_2M 0x2 85 1.1 tsutsui #define INTERSIL_CMD_FREQ_4M 0x3 86 1.1 tsutsui 87 1.1 tsutsui #define INTERSIL_CMD_12HR_MODE 0x0 88 1.1 tsutsui #define INTERSIL_CMD_24HR_MODE 0x4 89 1.1 tsutsui 90 1.1 tsutsui #define INTERSIL_CMD_STOP 0x0 91 1.1 tsutsui #define INTERSIL_CMD_RUN 0x8 92 1.1 tsutsui 93 1.1 tsutsui #define INTERSIL_CMD_IDISABLE 0x0 94 1.1 tsutsui #define INTERSIL_CMD_IENABLE 0x10 95 1.1 tsutsui 96 1.1 tsutsui #define INTERSIL_CMD_TEST_MODE 0x20 97 1.1 tsutsui #define INTERSIL_CMD_NORMAL_MODE 0x0 98 1.1 tsutsui 99 1.1 tsutsui #define INTERSIL_COMMAND(run, interrupt) \ 100 1.1 tsutsui ((run) | (interrupt) | INTERSIL_CMD_FREQ_32K | \ 101 1.1 tsutsui INTERSIL_CMD_24HR_MODE | INTERSIL_CMD_NORMAL_MODE) 102 1.1 tsutsui 103 1.1 tsutsui /* bit assignments for interrupt register r/w, p 7 of 10 */ 104 1.1 tsutsui 105 1.1 tsutsui #define INTERSIL_INTER_ALARM 0x1 /* r/w */ 106 1.1 tsutsui #define INTERSIL_INTER_CSECONDS 0x2 /* r/w */ 107 1.1 tsutsui #define INTERSIL_INTER_DSECONDS 0x4 /* r/w */ 108 1.1 tsutsui #define INTERSIL_INTER_SECONDS 0x8 /* r/w */ 109 1.1 tsutsui #define INTERSIL_INTER_MINUTES 0x10 /* r/w */ 110 1.1 tsutsui #define INTERSIL_INTER_HOURS 0x20 /* r/w */ 111 1.1 tsutsui #define INTERSIL_INTER_DAYS 0x40 /* r/w */ 112 1.1 tsutsui #define INTERSIL_INTER_PENDING 0x80 /* read-only */ 113 1.1 tsutsui 114 1.1 tsutsui #define INTERSIL_INTER_BITS \ 115 1.1 tsutsui "\20\10PENDING\7DAYS\6HRS\5MIN\4SCDS\3DSEC\2CSEC\1ALARM" 116 1.1 tsutsui 117 1.1 tsutsui #endif /* _INTERSIL7170REG_H_ */ 118