interwavereg.h revision 1.2.2.2
1 1.2.2.2 thorpej #ifndef INTERWAVEREG_H 2 1.2.2.2 thorpej #define INTERWAVEREG_H 3 1.2.2.2 thorpej 4 1.2.2.2 thorpej /* $NetBSD: interwavereg.h,v 1.2.2.2 1997/10/14 10:22:33 thorpej Exp $ */ 5 1.2.2.2 thorpej 6 1.2.2.2 thorpej /* 7 1.2.2.2 thorpej * Copyright (c) 1997 The NetBSD Foundation, Inc. 8 1.2.2.2 thorpej * All rights reserved. 9 1.2.2.2 thorpej * 10 1.2.2.2 thorpej * Author: Kari Mettinen 11 1.2.2.2 thorpej * 12 1.2.2.2 thorpej * Redistribution and use in source and binary forms, with or without 13 1.2.2.2 thorpej * modification, are permitted provided that the following conditions 14 1.2.2.2 thorpej * are met: 15 1.2.2.2 thorpej * 1. Redistributions of source code must retain the above copyright 16 1.2.2.2 thorpej * notice, this list of conditions and the following disclaimer. 17 1.2.2.2 thorpej * 2. Redistributions in binary form must reproduce the above copyright 18 1.2.2.2 thorpej * notice, this list of conditions and the following disclaimer in the 19 1.2.2.2 thorpej * documentation and/or other materials provided with the distribution. 20 1.2.2.2 thorpej * 3. All advertising materials mentioning features or use of this software 21 1.2.2.2 thorpej * must display the following acknowledgement: 22 1.2.2.2 thorpej * This product includes software developed by the NetBSD 23 1.2.2.2 thorpej * Foundation, Inc. and its contributors. 24 1.2.2.2 thorpej * 4. Neither the name of The NetBSD Foundation nor the names of its 25 1.2.2.2 thorpej * contributors may be used to endorse or promote products derived 26 1.2.2.2 thorpej * from this software without specific prior written permission. 27 1.2.2.2 thorpej * 28 1.2.2.2 thorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 1.2.2.2 thorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 1.2.2.2 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 1.2.2.2 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 1.2.2.2 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 1.2.2.2 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 1.2.2.2 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 1.2.2.2 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 1.2.2.2 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 1.2.2.2 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 1.2.2.2 thorpej * POSSIBILITY OF SUCH DAMAGE. 39 1.2.2.2 thorpej */ 40 1.2.2.2 thorpej 41 1.2.2.2 thorpej 42 1.2.2.2 thorpej #define IW_LINELEVEL_MAX ((1L << 10) - 1) 43 1.2.2.2 thorpej #define IW_LINELEVEL_CODEC_MAX ((1L << 10) - 1) 44 1.2.2.2 thorpej 45 1.2.2.2 thorpej #define IW_OUTPUT_CLASS 10 46 1.2.2.2 thorpej #define IW_INPUT_CLASS 11 47 1.2.2.2 thorpej #define IW_RECORD_CLASS 12 48 1.2.2.2 thorpej 49 1.2.2.2 thorpej 50 1.2.2.2 thorpej #define IW_MIC_IN 11 51 1.2.2.2 thorpej #define IW_MIC_IN_LVL 0 52 1.2.2.2 thorpej 53 1.2.2.2 thorpej /* these 2 are hw dependent values */ 54 1.2.2.2 thorpej #define IW_RIGHT_MIC_IN_PORT 0x16 55 1.2.2.2 thorpej #define IW_LEFT_MIC_IN_PORT 0x17 56 1.2.2.2 thorpej 57 1.2.2.2 thorpej #define IW_AUX1 12 58 1.2.2.2 thorpej #define IW_AUX1_LVL 1 59 1.2.2.2 thorpej 60 1.2.2.2 thorpej #define IW_RIGHT_AUX1_PORT 0x02 61 1.2.2.2 thorpej #define IW_LEFT_AUX1_PORT 0x03 62 1.2.2.2 thorpej 63 1.2.2.2 thorpej #define IW_AUX2 13 64 1.2.2.2 thorpej #define IW_AUX2_LVL 2 65 1.2.2.2 thorpej 66 1.2.2.2 thorpej #define IW_RIGHT_AUX2_PORT 0x04 67 1.2.2.2 thorpej #define IW_LEFT_AUX2_PORT 0x05 68 1.2.2.2 thorpej 69 1.2.2.2 thorpej #define IW_LINE_IN 14 70 1.2.2.2 thorpej #define IW_LINE_IN_LVL 3 71 1.2.2.2 thorpej 72 1.2.2.2 thorpej #define IW_RIGHT_LINE_IN_PORT 0x12 73 1.2.2.2 thorpej #define IW_LEFT_LINE_IN_PORT 0x13 74 1.2.2.2 thorpej 75 1.2.2.2 thorpej #define IW_LINE_OUT 15 76 1.2.2.2 thorpej #define IW_LINE_OUT_LVL 4 77 1.2.2.2 thorpej 78 1.2.2.2 thorpej #define IW_RIGHT_LINE_OUT_PORT 0x19 79 1.2.2.2 thorpej #define IW_LEFT_LINE_OUT_PORT 0x1b 80 1.2.2.2 thorpej 81 1.2.2.2 thorpej #define IW_RECORD_SOURCE 5 82 1.2.2.2 thorpej 83 1.2.2.2 thorpej #define IW_REC 16 84 1.2.2.2 thorpej #define IW_REC_LVL 6 85 1.2.2.2 thorpej #define IW_REC_LEFT_PORT 0x00 86 1.2.2.2 thorpej #define IW_REC_RIGHT_PORT 0x01 87 1.2.2.2 thorpej 88 1.2.2.2 thorpej #define IW_DAC 18 89 1.2.2.2 thorpej #define IW_DAC_LVL 7 90 1.2.2.2 thorpej #define IW_LEFT_DAC_PORT 0x06 91 1.2.2.2 thorpej #define IW_RIGHT_DAC_PORT 0x07 92 1.2.2.2 thorpej 93 1.2.2.2 thorpej #define IW_LOOPBACK 19 94 1.2.2.2 thorpej #define IW_LOOPBACK_LVL 8 95 1.2.2.2 thorpej #define IW_LOOPBACK_PORT 0x0d 96 1.2.2.2 thorpej 97 1.2.2.2 thorpej #define IW_MONO_IN 20 98 1.2.2.2 thorpej #define IW_MONO_IN_LVL 9 99 1.2.2.2 thorpej #define IW_MONO_IN_PORT 0x1a 100 1.2.2.2 thorpej 101 1.2.2.2 thorpej #define IW_LINE_IN_SRC 0 102 1.2.2.2 thorpej #define IW_AUX1_SRC 1 103 1.2.2.2 thorpej #define IW_MIC_IN_SRC 2 104 1.2.2.2 thorpej #define IW_MIX_OUT_SRC 3 105 1.2.2.2 thorpej 106 1.2.2.2 thorpej 107 1.2.2.2 thorpej #define IW_OUTPORT IW_MIC_IN_SRC 108 1.2.2.2 thorpej 109 1.2.2.2 thorpej /* dma flags */ 110 1.2.2.2 thorpej 111 1.2.2.2 thorpej #define IW_PLAYBACK 1L 112 1.2.2.2 thorpej #define IW_RECORD 2L 113 1.2.2.2 thorpej 114 1.2.2.2 thorpej #define ADDR_HIGH(a) (u_short)((a) >> 7) 115 1.2.2.2 thorpej #define ADDR_LOW(a) (u_short)((a) << 9) 116 1.2.2.2 thorpej 117 1.2.2.2 thorpej #define MIDI_TX_IRQ 0x01 118 1.2.2.2 thorpej #define MIDI_RX_IRQ 0x02 119 1.2.2.2 thorpej #define ALIB_TIMER1_IRQ 0x04 120 1.2.2.2 thorpej #define ALIB_TIMER2_IRQ 0x08 121 1.2.2.2 thorpej #define UASBCI 0x45 /* UASBCI index */ 122 1.2.2.2 thorpej #define SAMPLE_CONTROL 0x49 /* Not used by IW */ 123 1.2.2.2 thorpej #define SET_VOICES 0x0E 124 1.2.2.2 thorpej #define SAVI_WR 0x0E 125 1.2.2.2 thorpej #define WAVETABLE_IRQ 0x20 126 1.2.2.2 thorpej #define ENVELOPE_IRQ 0x40 127 1.2.2.2 thorpej #define DMA_TC_IRQ 0x80 128 1.2.2.2 thorpej 129 1.2.2.2 thorpej #define GEN_INDEX 0x03 /* IGIDX offset into p3xr */ 130 1.2.2.2 thorpej #define VOICE_SELECT 0x02 /* SVSR offset into p3xr */ 131 1.2.2.2 thorpej #define VOICE_IRQS 0x8F /* SVII index (read) */ 132 1.2.2.2 thorpej #define URSTI 0x4C /* URSTI index */ 133 1.2.2.2 thorpej #define GF1_SET 0x01 /* URSTI[0] */ 134 1.2.2.2 thorpej #define GF1_OUT_ENABLE 0x02 /* URSTI[1] */ 135 1.2.2.2 thorpej #define GF1_IRQ_ENABLE 0x04 /* URSTI[2] */ 136 1.2.2.2 thorpej #define GF1_RESET 0xFE /* URSTI[0]=0 */ 137 1.2.2.2 thorpej #define VOICE_VOLUME_IRQ 0x04 /* SVII[2] */ 138 1.2.2.2 thorpej #define VOICE_WAVE_IRQ 0x08 /* SVII[3] */ 139 1.2.2.2 thorpej #define VC_IRQ_ENABLE 0x20 /* SACI[5] or SVCI[5]*/ 140 1.2.2.2 thorpej #define VOICE_NUMBER 0x1F /* Mask for SVII[4:0] */ 141 1.2.2.2 thorpej #define VC_IRQ_PENDING 0x80 /* SACI[7] or SVCI[7] */ 142 1.2.2.2 thorpej #define VC_DIRECT 0x40 /* SACI[6] or SVCI[6]*/ 143 1.2.2.2 thorpej #define VC_DATA_WIDTH 0x04 /* SACI[2] */ 144 1.2.2.2 thorpej #define VOICE_STOP 0x02 /* SACI[1] */ 145 1.2.2.2 thorpej #define VOICE_STOPPED 0x01 /* SACI[0] */ 146 1.2.2.2 thorpej #define VOLUME_STOP 0x02 /* SVCI[1] */ 147 1.2.2.2 thorpej #define VOLUME_STOPPED 0x01 /* SVCI[0] */ 148 1.2.2.2 thorpej #define VC_ROLLOVER 0x04 /* SVCI[2] */ 149 1.2.2.2 thorpej #define VC_LOOP_ENABLE 0x08 /* SVCI[3] or SACI[3]*/ 150 1.2.2.2 thorpej #define VC_BI_LOOP 0x10 /* SVCI[4] or SACI[4]*/ 151 1.2.2.2 thorpej #define VOICE_OFFSET 0x20 /* SMSI[5] */ 152 1.2.2.2 thorpej #define VOLUME_RATE0 0x00 /* SVRI[7:6]=(0,0) */ 153 1.2.2.2 thorpej #define VOLUME_RATE1 0x40 /* SVRI[7:6]=(0,1) */ 154 1.2.2.2 thorpej #define VOLUME_RATE2 0x80 /* SVRI[7:6]=(1,0) */ 155 1.2.2.2 thorpej #define VOLUME_RATE3 0xC0 /* SVRI[7:6]=(1,1) */ 156 1.2.2.2 thorpej 157 1.2.2.2 thorpej #define CSR1R 0x02 158 1.2.2.2 thorpej #define CPDR 0x03 159 1.2.2.2 thorpej #define CRDR 0x03 160 1.2.2.2 thorpej 161 1.2.2.2 thorpej #define SHUT_DOWN 0x7E /* shuts InterWave down */ 162 1.2.2.2 thorpej #define POWER_UP 0xFE /* enables all modules */ 163 1.2.2.2 thorpej #define CODEC_PWR_UP 0x81 /* enables Codec Analog Ckts */ 164 1.2.2.2 thorpej #define CODEC_PWR_DOWN 0x01 /* disables Codec Analog Ckts */ 165 1.2.2.2 thorpej #define CODEC_REC_UP 0x82 /* Enables Record Path */ 166 1.2.2.2 thorpej #define CODEC_REC_DOWN 0x02 /* Disables Record Path */ 167 1.2.2.2 thorpej #define CODEC_PLAY_UP 0x84 /* Enables Playback Path */ 168 1.2.2.2 thorpej #define CODEC_PLAY_DOWN 0x04 /* Disables Playback Path */ 169 1.2.2.2 thorpej #define CODEC_IRQ_ENABLE 0x02 /* CEXTI[2] */ 170 1.2.2.2 thorpej #define CODEC_TIMER_IRQ 0x40 /* CSR3I[6] */ 171 1.2.2.2 thorpej #define CODEC_REC_IRQ 0x20 /* CSR3I[5] */ 172 1.2.2.2 thorpej #define CODEC_PLAY_IRQ 0x10 /* CSR3I[4] */ 173 1.2.2.2 thorpej #define CODEC_INT 0x01 /* CSR1R[0] */ 174 1.2.2.2 thorpej #define MONO_INPUT 0x80 /* CMONOI[7] */ 175 1.2.2.2 thorpej #define MONO_OUTPUT 0x40 /* CMONOI[6] */ 176 1.2.2.2 thorpej #define MIDI_UP 0x88 /* Enables MIDI ports */ 177 1.2.2.2 thorpej #define MIDI_DOWN 0x08 /* Disables MIDI ports */ 178 1.2.2.2 thorpej #define SYNTH_UP 0x90 /* Enables Synthesizer */ 179 1.2.2.2 thorpej #define SYNTH_DOWN 0x10 /* Disables Synthesizer */ 180 1.2.2.2 thorpej #define LMC_UP 0xA0 /* Enables LM Module */ 181 1.2.2.2 thorpej #define LMC_DOWN 0x20 /* Disbales LM Module */ 182 1.2.2.2 thorpej #define XTAL24_UP 0xC0 /* Enables 24MHz Osc */ 183 1.2.2.2 thorpej #define XTAL24_DOWN 0x40 /* Disables 24MHz Osc */ 184 1.2.2.2 thorpej #define PPWRI 0xF2 /* PPWRI index */ 185 1.2.2.2 thorpej #define PLAY 0x0F 186 1.2.2.2 thorpej #define REC 0x1F 187 1.2.2.2 thorpej #define LEFT_AUX1_INPUT 0x02 188 1.2.2.2 thorpej #define RIGHT_AUX1_INPUT 0x03 189 1.2.2.2 thorpej #define LEFT_AUX2_INPUT 0x04 190 1.2.2.2 thorpej #define RIGHT_AUX2_INPUT 0x05 191 1.2.2.2 thorpej #define LEFT_LINE_IN 0x12 192 1.2.2.2 thorpej #define RIGHT_LINE_IN 0x13 193 1.2.2.2 thorpej #define LEFT_LINE_OUT 0x19 194 1.2.2.2 thorpej #define RIGHT_LINE_OUT 0x1B 195 1.2.2.2 thorpej #define LEFT_SOURCE 0x00 196 1.2.2.2 thorpej #define RIGHT_SOURCE 0x01 197 1.2.2.2 thorpej #define LINE_IN 0x00 198 1.2.2.2 thorpej #define AUX1_IN 0x40 199 1.2.2.2 thorpej #define MIC_IN 0x80 200 1.2.2.2 thorpej #define MIX_IN 0xC0 201 1.2.2.2 thorpej #define LEFT_DAC 0x06 202 1.2.2.2 thorpej #define RIGHT_DAC 0x07 203 1.2.2.2 thorpej #define LEFT_MIC_IN 0x16 204 1.2.2.2 thorpej #define RIGHT_MIC_IN 0x17 205 1.2.2.2 thorpej #define CUPCTI 0x0E 206 1.2.2.2 thorpej #define CLPCTI 0x0F 207 1.2.2.2 thorpej #define CURCTI 0x1E 208 1.2.2.2 thorpej #define CLRCTI 0x1F 209 1.2.2.2 thorpej #define CLAX1I 0x02 210 1.2.2.2 thorpej #define CRAX1I 0x03 211 1.2.2.2 thorpej #define CLAX2I 0x04 212 1.2.2.2 thorpej #define CRAX2I 0x05 213 1.2.2.2 thorpej #define CLLICI 0x12 214 1.2.2.2 thorpej #define CRLICI 0x13 215 1.2.2.2 thorpej #define CLOAI 0x19 216 1.2.2.2 thorpej #define CROAI 0x1B 217 1.2.2.2 thorpej #define CLICI 0x00 218 1.2.2.2 thorpej #define CRICI 0x01 219 1.2.2.2 thorpej #define CLDACI 0x06 220 1.2.2.2 thorpej #define CRDACI 0x07 221 1.2.2.2 thorpej #define CPVFI 0x1D 222 1.2.2.2 thorpej 223 1.2.2.2 thorpej #define MAX_DMA 0x07 224 1.2.2.2 thorpej #define DMA_DECREMENT 0x20 225 1.2.2.2 thorpej #define AUTO_INIT 0x10 226 1.2.2.2 thorpej #define DMA_READ 0x01 227 1.2.2.2 thorpej #define DMA_WRITE 0x02 228 1.2.2.2 thorpej #define AUTO_READ 0x03 229 1.2.2.2 thorpej #define AUTO_WRITE 0x04 230 1.2.2.2 thorpej #define IDMA_INV 0x0400 231 1.2.2.2 thorpej #define IDMA_WIDTH_16 0x0100 232 1.2.2.2 thorpej 233 1.2.2.2 thorpej #define LDMACI 0x41 /* Index */ 234 1.2.2.2 thorpej #define DMA_INV 0x80 235 1.2.2.2 thorpej #define DMA_IRQ_ENABLE 0x20 236 1.2.2.2 thorpej #define DMA_IRQ_PENDING 0x40 /* on reads of LDMACI[6] */ 237 1.2.2.2 thorpej #define DMA_DATA_16 0x40 /* on writes to LDMACI[6] */ 238 1.2.2.2 thorpej #define DMA_WIDTH_16 0x04 /* 1=16-bit, 0=8-bit (DMA channel) */ 239 1.2.2.2 thorpej #define DMA_RATE 0x18 /* 00=fastest,...,11=slowest */ 240 1.2.2.2 thorpej #define DMA_UPLOAD 0x02 /* From LM to PC */ 241 1.2.2.2 thorpej #define DMA_ENABLE 0x01 242 1.2.2.2 thorpej 243 1.2.2.2 thorpej #define GUS_MODE 0x00 // SGMI[0]=0 244 1.2.2.2 thorpej #define ENH_MODE 0x01 // SGMI[0]=1 245 1.2.2.2 thorpej #define ENABLE_LFOS 0x02 // SGMI[1] 246 1.2.2.2 thorpej #define NO_WAVETABLE 0x04 // SGMI[2] 247 1.2.2.2 thorpej #define RAM_TEST 0x08 // SGMI[3] 248 1.2.2.2 thorpej 249 1.2.2.2 thorpej #define DMA_SET_MASK 0x04 250 1.2.2.2 thorpej 251 1.2.2.2 thorpej #define VOICE_STOP 0x02 /* SACI[1] */ 252 1.2.2.2 thorpej #define VOICE_STOPPED 0x01 /* SACI[0] */ 253 1.2.2.2 thorpej 254 1.2.2.2 thorpej #define LDSALI 0x42 255 1.2.2.2 thorpej #define LDSAHI 0x50 256 1.2.2.2 thorpej #define LMALI 0x43 257 1.2.2.2 thorpej #define LMAHI 0x44 258 1.2.2.2 thorpej #define LMCFI 0x52 259 1.2.2.2 thorpej #define LMCI 0x53 260 1.2.2.2 thorpej #define LMFSI 0x56 261 1.2.2.2 thorpej #define LDIBI 0x58 262 1.2.2.2 thorpej #define LDICI 0x57 263 1.2.2.2 thorpej #define LMSBAI 0x51 264 1.2.2.2 thorpej #define LMRFAI 0x54 265 1.2.2.2 thorpej #define LMPFAI 0x55 266 1.2.2.2 thorpej #define SVCI_RD 0x8D 267 1.2.2.2 thorpej #define SVCI_WR 0x0D 268 1.2.2.2 thorpej #define SACI_RD 0x80 269 1.2.2.2 thorpej #define SACI_WR 0x00 270 1.2.2.2 thorpej #define SALI_RD 0x8B 271 1.2.2.2 thorpej #define SALI_WR 0x0B 272 1.2.2.2 thorpej #define SAHI_RD 0x8A 273 1.2.2.2 thorpej #define SAHI_WR 0x0A 274 1.2.2.2 thorpej #define SASHI_RD 0x82 275 1.2.2.2 thorpej #define SASHI_WR 0x02 276 1.2.2.2 thorpej #define SASLI_RD 0x83 277 1.2.2.2 thorpej #define SASLI_WR 0x03 278 1.2.2.2 thorpej #define SAEHI_RD 0x84 279 1.2.2.2 thorpej #define SAEHI_WR 0x04 280 1.2.2.2 thorpej #define SAELI_RD 0x85 281 1.2.2.2 thorpej #define SAELI_WR 0x05 282 1.2.2.2 thorpej #define SVRI_RD 0x86 283 1.2.2.2 thorpej #define SVRI_WR 0x06 284 1.2.2.2 thorpej #define SVSI_RD 0x87 285 1.2.2.2 thorpej #define SVSI_WR 0x07 286 1.2.2.2 thorpej #define SVEI_RD 0x88 287 1.2.2.2 thorpej #define SVEI_WR 0x08 288 1.2.2.2 thorpej #define SVLI_RD 0x89 289 1.2.2.2 thorpej #define SVLI_WR 0x09 290 1.2.2.2 thorpej #define SROI_RD 0x8C 291 1.2.2.2 thorpej #define SROI_WR 0x0C 292 1.2.2.2 thorpej #define SLOI_RD 0x93 293 1.2.2.2 thorpej #define SLOI_WR 0x13 294 1.2.2.2 thorpej #define SMSI_RD 0x95 295 1.2.2.2 thorpej #define SMSI_WR 0x15 296 1.2.2.2 thorpej #define SGMI_RD 0x99 297 1.2.2.2 thorpej #define SGMI_WR 0x19 298 1.2.2.2 thorpej #define SFCI_RD 0x81 299 1.2.2.2 thorpej #define SFCI_WR 0x01 300 1.2.2.2 thorpej #define SUAI_RD 0x90 301 1.2.2.2 thorpej #define SUAI_WR 0x10 302 1.2.2.2 thorpej #define SVII 0x8F 303 1.2.2.2 thorpej #define CMODEI 0x0C /* index for CMODEI */ 304 1.2.2.2 thorpej #define CMONOI 0x1A 305 1.2.2.2 thorpej #define CFIG3I 0x11 306 1.2.2.2 thorpej #define CFIG2I 0x10 307 1.2.2.2 thorpej #define CLTIMI 0x14 308 1.2.2.2 thorpej #define CUTIMI 0x15 309 1.2.2.2 thorpej #define CSR3I 0x18 /* Index to CSR3I (Interrupt Status) */ 310 1.2.2.2 thorpej #define CEXTI 0x0A /* Index to External Control Register */ 311 1.2.2.2 thorpej #define CFIG1I 0x09 /* Index to Codec Conf Reg 1 */ 312 1.2.2.2 thorpej #define CSR2I 0x0B /* Index to Codec Stat Reg 2 */ 313 1.2.2.2 thorpej #define CPDFI 0x08 /* Index to Play Data Format Reg */ 314 1.2.2.2 thorpej #define CRDFI 0x1C /* Index to Rec Data Format Reg */ 315 1.2.2.2 thorpej #define CLMICI 0x16 /* Index to Left Mic Input Ctrl Register */ 316 1.2.2.2 thorpej #define CRMICI 0x17 /* Index to Right Mic Input Ctrl Register */ 317 1.2.2.2 thorpej #define CLCI 0x0D /* Index to Loopback Ctrl Register */ 318 1.2.2.2 thorpej #define IVERI 0x5B /* Index to register IVERI */ 319 1.2.2.2 thorpej #define IDECI 0x5A 320 1.2.2.2 thorpej #define ICMPTI 0x59 321 1.2.2.2 thorpej #define CODEC_MODE1 0x00 322 1.2.2.2 thorpej #define CODEC_MODE2 0x40 323 1.2.2.2 thorpej #define CODEC_MODE3 0x6C /* Enhanced Mode */ 324 1.2.2.2 thorpej #define CODEC_STATUS1 0x01 325 1.2.2.2 thorpej #define CODEC_STATUS2 0x0B /* Index to CSR2I */ 326 1.2.2.2 thorpej #define CODEC_STATUS3 0x18 /* Index to CSR3I */ 327 1.2.2.2 thorpej #define PLAYBACK 0x01 /* Enable playback path CFIG1I[0]=1*/ 328 1.2.2.2 thorpej #define RECORD 0x02 /* Enable Record path CFIG1I[1]=1*/ 329 1.2.2.2 thorpej #define TIMER_ENABLE 0x40 /* CFIG2I[6] */ 330 1.2.2.2 thorpej #define CODEC_MCE 0x40 /* CIDXR[6] */ 331 1.2.2.2 thorpej #define CALIB_IN_PROGRESS 0x20 /* CSR2I[5] */ 332 1.2.2.2 thorpej #define CODEC_INIT 0x80 /* CIDXR[7] */ 333 1.2.2.2 thorpej #define BIT16_BIG 0xC0 /* 16-bit signed, big endian */ 334 1.2.2.2 thorpej #define IMA_ADPCM 0xA0 /* IMA-compliant ADPCM */ 335 1.2.2.2 thorpej #define BIT8_ALAW 0x60 /* 8-bit A-law */ 336 1.2.2.2 thorpej #define BIT16_LITTLE 0x40 /* 16-bit signed, lillte endian */ 337 1.2.2.2 thorpej #define BIT8_ULAW 0x20 /* 8-bit u-law */ 338 1.2.2.2 thorpej #define BIT8_LINEAR 0x00 /* 8-bit unsigned */ 339 1.2.2.2 thorpej #define REC_DFORMAT 0x1C 340 1.2.2.2 thorpej #define PLAY_DFORMAT 0x08 341 1.2.2.2 thorpej #define DMA_ACCESS 0x00 342 1.2.2.2 thorpej #define PIO_ACCESS 0xC0 343 1.2.2.2 thorpej #define DMA_SIMPLEX 0x04 344 1.2.2.2 thorpej #define STEREO 0x10 /* CxDFI[4] */ 345 1.2.2.2 thorpej #define AUTOCALIB 0x08 /* CFIG1I[3] */ 346 1.2.2.2 thorpej #define ROM_IO 0x02 /* ROM I/O cycles - LMCI[1]=1 */ 347 1.2.2.2 thorpej #define DRAM_IO 0x4D /* DRAM I/O cycles - LMCI[1]=0 */ 348 1.2.2.2 thorpej #define AUTOI 0x01 /* LMCI[0]=1 */ 349 1.2.2.2 thorpej #define PLDNI 0x07 350 1.2.2.2 thorpej #define ACTIVATE_DEV 0x30 351 1.2.2.2 thorpej #define PWAKEI 0x03 /* Index for PWAKEI */ 352 1.2.2.2 thorpej #define PISOCI 0x01 /* Index for PISOCI */ 353 1.2.2.2 thorpej #define PSECI 0xF1 /* Index for PSECI */ 354 1.2.2.2 thorpej #define RANGE_IOCHK 0x31 /* PURCI or PRRCI Index */ 355 1.2.2.2 thorpej #define MIDI_RESET 0x03 356 1.2.2.2 thorpej 357 1.2.2.2 thorpej #define IW_DMA_RECORD 0x02 358 1.2.2.2 thorpej #define IW_DMA_PLAYBACK 0x01 359 1.2.2.2 thorpej 360 1.2.2.2 thorpej #define IW_MCE 0x40 361 1.2.2.2 thorpej 362 1.2.2.2 thorpej #define IN 0 363 1.2.2.2 thorpej #define OUT 1 364 1.2.2.2 thorpej 365 1.2.2.2 thorpej /* codec indirect register access */ 366 1.2.2.2 thorpej 367 1.2.2.2 thorpej #define IW_WRITE_CODEC_1(reg,val) \ 368 1.2.2.2 thorpej do{\ 369 1.2.2.2 thorpej bus_space_write_1(sc->sc_iot,sc->codec_index_h, 0, (u_char)(reg));\ 370 1.2.2.2 thorpej bus_space_write_1(sc->sc_iot,sc->codec_index_h,sc->cdatap,(u_char)val);\ 371 1.2.2.2 thorpej bus_space_write_1(sc->sc_iot,sc->codec_index_h, 0,0);\ 372 1.2.2.2 thorpej }while(0)\ 373 1.2.2.2 thorpej 374 1.2.2.2 thorpej #define IW_READ_CODEC_1(reg,ret) \ 375 1.2.2.2 thorpej do{\ 376 1.2.2.2 thorpej bus_space_write_1(sc->sc_iot,sc->codec_index_h,sc->codec_index,(u_char)(reg));\ 377 1.2.2.2 thorpej ret=bus_space_read_1(sc->sc_iot,sc->codec_index_h,sc->cdatap);\ 378 1.2.2.2 thorpej bus_space_write_1(sc->sc_iot,sc->codec_index_h, 0,0);\ 379 1.2.2.2 thorpej }while(0)\ 380 1.2.2.2 thorpej 381 1.2.2.2 thorpej /* iw direct register access */ 382 1.2.2.2 thorpej 383 1.2.2.2 thorpej #define IW_WRITE_DIRECT_1(reg,h,val) \ 384 1.2.2.2 thorpej do{\ 385 1.2.2.2 thorpej bus_space_write_1(sc->sc_iot,h,reg,(u_char)val);\ 386 1.2.2.2 thorpej }while(0)\ 387 1.2.2.2 thorpej 388 1.2.2.2 thorpej #define IW_READ_DIRECT_1(reg,h,ret) \ 389 1.2.2.2 thorpej do{\ 390 1.2.2.2 thorpej ret=bus_space_read_1(sc->sc_iot,h,(u_char)reg);\ 391 1.2.2.2 thorpej }while(0)\ 392 1.2.2.2 thorpej 393 1.2.2.2 thorpej /* general indexed regs access */ 394 1.2.2.2 thorpej 395 1.2.2.2 thorpej #define IW_WRITE_GENERAL_1(reg,val) \ 396 1.2.2.2 thorpej do{\ 397 1.2.2.2 thorpej bus_space_write_1(sc->sc_iot,sc->p3xr_h,3,(u_char)reg);\ 398 1.2.2.2 thorpej bus_space_write_1(sc->sc_iot,sc->p3xr_h,5,(u_char)val);\ 399 1.2.2.2 thorpej }while(0)\ 400 1.2.2.2 thorpej 401 1.2.2.2 thorpej #define IW_WRITE_GENERAL_2(reg,val) \ 402 1.2.2.2 thorpej do{\ 403 1.2.2.2 thorpej bus_space_write_1(sc->sc_iot,sc->p3xr_h,3,(u_char)reg);\ 404 1.2.2.2 thorpej bus_space_write_2(sc->sc_iot,sc->p3xr_h,4,(u_short)val);\ 405 1.2.2.2 thorpej }while(0)\ 406 1.2.2.2 thorpej 407 1.2.2.2 thorpej #define IW_READ_GENERAL_1(reg,ret) \ 408 1.2.2.2 thorpej do{\ 409 1.2.2.2 thorpej bus_space_write_1(sc->sc_iot,sc->p3xr_h,3,(u_char)reg);\ 410 1.2.2.2 thorpej ret=bus_space_read_1(sc->sc_iot,sc->p3xr_h,5);\ 411 1.2.2.2 thorpej }while(0)\ 412 1.2.2.2 thorpej 413 1.2.2.2 thorpej #define IW_READ_GENERAL_2(reg,ret) \ 414 1.2.2.2 thorpej do{\ 415 1.2.2.2 thorpej bus_space_write_1(sc->sc_iot,sc->p3xr_h,3,(u_char)reg);\ 416 1.2.2.2 thorpej ret=bus_space_read_2(sc->sc_iot,sc->p3xr_h,4);\ 417 1.2.2.2 thorpej }while(0)\ 418 1.2.2.2 thorpej 419 1.2.2.2 thorpej 420 1.2.2.2 thorpej #endif /* INTERWAVEREG_H */ 421
Indexes created Wed Oct 22 00:09:40 GMT 2025