isp1763reg.h revision 1.1 1 /* $NetBSD: isp1763reg.h,v 1.1 2026/10/11 16:09:06 rkujawa Exp $ */
2
3 /*-
4 * Copyright (c) 2026 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Radoslaw Kujawa.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * ISP1763A USB 2.0 host controller.
34 */
35
36 #ifndef _DEV_IC_ISP1763REG_H_
37 #define _DEV_IC_ISP1763REG_H_
38
39 #define ISP1763_CHIPID 0x70 /* 32 bits */
40 #define ISP1763_CHIPID_VALUE 0x00176320
41 #define ISP1763_SCRATCH 0x78
42
43 /* HCI regs, 32-bit. */
44 #define ISP1763_USBCMD 0x8c
45 #define ISP1763_USBCMD_RS __BIT(0)
46 #define ISP1763_USBCMD_HCRESET __BIT(1)
47 #define ISP1763_USBCMD_LHCR __BIT(7)
48 #define ISP1763_USBSTS 0x90
49 #define ISP1763_USBSTS_PCD __BIT(2)
50 #define ISP1763_USBSTS_FLR __BIT(3)
51 #define ISP1763_USBINTR 0x94
52 #define ISP1763_USBINTR_PCDIE __BIT(2)
53 #define ISP1763_FRINDEX 0x98
54 #define ISP1763_CONFIGFLAG 0x9c
55 #define ISP1763_CONFIGFLAG_CF __BIT(0)
56 #define ISP1763_PORTSC1 0xa0
57 #define ISP1763_PORTSC_ECCS __BIT(0)
58 #define ISP1763_PORTSC_ECSC __BIT(1)
59 #define ISP1763_PORTSC_PED __BIT(2)
60 #define ISP1763_PORTSC_FPR __BIT(6)
61 #define ISP1763_PORTSC_SUSP __BIT(7)
62 #define ISP1763_PORTSC_PR __BIT(8)
63 #define ISP1763_PORTSC_LS __BITS(11, 10)
64 #define ISP1763_PORTSC_PP __BIT(12)
65 #define ISP1763_PORTSC_PO __BIT(13)
66 #define ISP1763_PORTSC_PTC __BITS(19, 16)
67
68 /* Transfer descriptor maps, 16-bits. */
69 #define ISP1763_ISO_DONE 0xa4
70 #define ISP1763_ISO_SKIP 0xa6
71 #define ISP1763_ISO_LAST 0xa8
72 #define ISP1763_INT_DONE 0xaa
73 #define ISP1763_INT_SKIP 0xac
74 #define ISP1763_INT_LAST 0xae
75 #define ISP1763_ATL_DONE 0xb0
76 #define ISP1763_ATL_SKIP 0xb2
77 #define ISP1763_ATL_LAST 0xb4
78
79 /* Configuration registers, 16 bits. */
80 #define ISP1763_HWMODE 0xb6
81 #define ISP1763_HWMODE_GLINTEN __BIT(0)
82 #define ISP1763_HWMODE_INTLEVEL __BIT(1) /* 1 = edge */
83 #define ISP1763_HWMODE_INTPOL __BIT(2) /* 1 = active high */
84 #define ISP1763_HWMODE_INTFLOCK __BIT(3)
85 #define ISP1763_HWMODE_BUS8 __BIT(4)
86 #define ISP1763_SWRESET 0xb8
87 #define ISP1763_SWRESET_ALL __BIT(0)
88 #define ISP1763_SWRESET_HC __BIT(1)
89 #define ISP1763_SWRESET_ATX __BIT(3)
90 #define ISP1763_BUFSTS 0xba
91 #define ISP1763_BUFSTS_ATL __BIT(0)
92 #define ISP1763_BUFSTS_INT __BIT(1)
93 #define ISP1763_BUFSTS_ISO __BIT(2)
94 #define ISP1763_MEMORY 0xc4
95 #define ISP1763_DATAPORT 0xc6
96
97 /* Interrupt registers, 16 bits. */
98 #define ISP1763_HCINT 0xd4
99 #define ISP1763_HCINTEN 0xd6
100 #define ISP1763_HCINT_OPR __BIT(4)
101 #define ISP1763_HCINT_INT __BIT(7)
102 #define ISP1763_HCINT_ATL __BIT(8)
103 #define ISP1763_HCINT_ISO __BIT(9)
104 #define ISP1763_HCINT_ALL __BITS(10, 0)
105 #define ISP1763_ISO_ORMASK 0xd8
106 #define ISP1763_INT_ORMASK 0xda
107 #define ISP1763_ATL_ORMASK 0xdc
108 #define ISP1763_ISO_ANDMASK 0xde
109 #define ISP1763_INT_ANDMASK 0xe0
110 #define ISP1763_ATL_ANDMASK 0xe2
111
112 /* OTG control. */
113 #define ISP1763_OTGCTL_SET 0xe4
114 #define ISP1763_OTGCTL_CLR 0xe6
115 #define ISP1763_OTGCTL_SWSELHC __BIT(7) /* clear = port 1 to host */
116 #define ISP1763_OTGCTL_OTGDIS __BIT(10)
117 #define ISP1763_OTGCTL_HC2DIS __BIT(15)
118
119 /* Memory map. */
120 #define ISP1763_PTD_SIZE 32
121 #define ISP1763_NSLOTS 16
122 #define ISP1763_ISO_PTD_BASE 0x0400
123 #define ISP1763_INT_PTD_BASE 0x0800
124 #define ISP1763_ATL_PTD_BASE 0x0c00
125 #define ISP1763_PAYLOAD_BASE 0x1000
126 #define ISP1763_MEM_END 0x6000
127
128 /* Payload */
129 #define ISP1763_PTD_ADDR(a) (((a) - 0x400) >> 3)
130
131 /*
132 * Transfer descriptor.
133 */
134 #define ISP1763_PTD_DW0_V __BIT(0)
135 #define ISP1763_PTD_DW0_NBYTES __BITS(17, 3)
136 #define ISP1763_PTD_DW0_MPS __BITS(28, 18)
137 #define ISP1763_PTD_DW0_MULT __BITS(30, 29)
138 #define ISP1763_PTD_DW0_EP0 __BIT(31)
139
140 #define ISP1763_PTD_DW1_EP31 __BITS(2, 0)
141 #define ISP1763_PTD_DW1_ADDR __BITS(9, 3)
142 #define ISP1763_PTD_DW1_TOKEN __BITS(11, 10)
143 #define ISP1763_TOKEN_OUT 0
144 #define ISP1763_TOKEN_IN 1
145 #define ISP1763_TOKEN_SETUP 2
146 #define ISP1763_PTD_DW1_EPTYPE __BITS(13, 12)
147 #define ISP1763_EPTYPE_CTRL 0
148 #define ISP1763_EPTYPE_ISOC 1
149 #define ISP1763_EPTYPE_BULK 2
150 #define ISP1763_EPTYPE_INTR 3
151 #define ISP1763_PTD_DW1_SPLIT __BIT(14)
152 #define ISP1763_PTD_DW1_RETIRE __BIT(15)
153 #define ISP1763_PTD_DW1_SE __BITS(17, 16)
154 #define ISP1763_SE_FULL 0
155 #define ISP1763_SE_LOW 2
156 #define ISP1763_PTD_DW1_PORT __BITS(24, 18)
157 #define ISP1763_PTD_DW1_HUB __BITS(31, 25)
158
159 #define ISP1763_PTD_DW2_UFRAME __BITS(7, 0)
160 #define ISP1763_PTD_DW2_DATA __BITS(23, 8)
161 #define ISP1763_PTD_DW2_RL __BITS(28, 25)
162
163 #define ISP1763_PTD_DW3_NDONE __BITS(14, 0)
164 #define ISP1763_PTD_DW3_NDONE_SPLIT __BITS(11, 0)
165 #define ISP1763_PTD_DW3_NAKCNT __BITS(22, 19)
166 #define ISP1763_PTD_DW3_CERR __BITS(24, 23)
167 #define ISP1763_PTD_DW3_DT __BIT(25)
168 #define ISP1763_PTD_DW3_PING __BIT(26)
169 #define ISP1763_PTD_DW3_SC __BIT(27)
170 #define ISP1763_PTD_DW3_X __BIT(28)
171 #define ISP1763_PTD_DW3_B __BIT(29)
172 #define ISP1763_PTD_DW3_H __BIT(30)
173 #define ISP1763_PTD_DW3_A __BIT(31)
174
175 #define ISP1763_PTD_DW4_USA __BITS(7, 0)
176 #define ISP1763_PTD_DW5_USCS __BITS(7, 0)
177
178 #endif /* !_DEV_IC_ISP1763REG_H_ */
179