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ispmbox.h revision 1.31.2.9
      1  1.31.2.9  nathanw /* $NetBSD: ispmbox.h,v 1.31.2.9 2002/06/20 03:44:51 nathanw Exp $ */
      2      1.26   mjacob /*
      3      1.26   mjacob  * This driver, which is contained in NetBSD in the files:
      4      1.26   mjacob  *
      5      1.26   mjacob  *	sys/dev/ic/isp.c
      6      1.28      wiz  *	sys/dev/ic/isp_inline.h
      7      1.28      wiz  *	sys/dev/ic/isp_netbsd.c
      8      1.28      wiz  *	sys/dev/ic/isp_netbsd.h
      9      1.28      wiz  *	sys/dev/ic/isp_target.c
     10      1.28      wiz  *	sys/dev/ic/isp_target.h
     11      1.28      wiz  *	sys/dev/ic/isp_tpublic.h
     12      1.28      wiz  *	sys/dev/ic/ispmbox.h
     13      1.28      wiz  *	sys/dev/ic/ispreg.h
     14      1.28      wiz  *	sys/dev/ic/ispvar.h
     15      1.26   mjacob  *	sys/microcode/isp/asm_sbus.h
     16      1.26   mjacob  *	sys/microcode/isp/asm_1040.h
     17      1.26   mjacob  *	sys/microcode/isp/asm_1080.h
     18      1.26   mjacob  *	sys/microcode/isp/asm_12160.h
     19      1.26   mjacob  *	sys/microcode/isp/asm_2100.h
     20      1.26   mjacob  *	sys/microcode/isp/asm_2200.h
     21      1.26   mjacob  *	sys/pci/isp_pci.c
     22      1.26   mjacob  *	sys/sbus/isp_sbus.c
     23      1.26   mjacob  *
     24      1.26   mjacob  * Is being actively maintained by Matthew Jacob (mjacob (at) netbsd.org).
     25      1.26   mjacob  * This driver also is shared source with FreeBSD, OpenBSD, Linux, Solaris,
     26      1.26   mjacob  * Linux versions. This tends to be an interesting maintenance problem.
     27      1.26   mjacob  *
     28      1.26   mjacob  * Please coordinate with Matthew Jacob on changes you wish to make here.
     29      1.26   mjacob  */
     30       1.1      cgd /*
     31      1.18   mjacob  * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration
     32       1.1      cgd  * All rights reserved.
     33       1.1      cgd  *
     34       1.1      cgd  * Redistribution and use in source and binary forms, with or without
     35       1.1      cgd  * modification, are permitted provided that the following conditions
     36       1.1      cgd  * are met:
     37       1.1      cgd  * 1. Redistributions of source code must retain the above copyright
     38      1.18   mjacob  *    notice, this list of conditions and the following disclaimer.
     39       1.1      cgd  * 2. Redistributions in binary form must reproduce the above copyright
     40       1.1      cgd  *    notice, this list of conditions and the following disclaimer in the
     41       1.1      cgd  *    documentation and/or other materials provided with the distribution.
     42       1.1      cgd  * 3. The name of the author may not be used to endorse or promote products
     43      1.18   mjacob  *    derived from this software without specific prior written permission
     44       1.6   mjacob  *
     45      1.18   mjacob  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     46      1.18   mjacob  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     47      1.18   mjacob  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     48      1.18   mjacob  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     49      1.18   mjacob  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     50      1.18   mjacob  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     51      1.18   mjacob  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     52      1.18   mjacob  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     53      1.18   mjacob  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     54      1.18   mjacob  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     55      1.18   mjacob  */
     56      1.18   mjacob 
     57      1.18   mjacob /*
     58      1.18   mjacob  * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
     59      1.18   mjacob  * <mjacob (at) nas.nasa.gov>
     60       1.1      cgd  */
     61       1.1      cgd #ifndef	_ISPMBOX_H
     62       1.1      cgd #define	_ISPMBOX_H
     63       1.1      cgd 
     64       1.1      cgd /*
     65       1.1      cgd  * Mailbox Command Opcodes
     66       1.1      cgd  */
     67       1.1      cgd #define MBOX_NO_OP			0x0000
     68       1.1      cgd #define MBOX_LOAD_RAM			0x0001
     69       1.1      cgd #define MBOX_EXEC_FIRMWARE		0x0002
     70       1.1      cgd #define MBOX_DUMP_RAM			0x0003
     71       1.1      cgd #define MBOX_WRITE_RAM_WORD		0x0004
     72       1.1      cgd #define MBOX_READ_RAM_WORD		0x0005
     73       1.1      cgd #define MBOX_MAILBOX_REG_TEST		0x0006
     74       1.1      cgd #define MBOX_VERIFY_CHECKSUM		0x0007
     75       1.1      cgd #define MBOX_ABOUT_FIRMWARE		0x0008
     76       1.1      cgd 					/*   9 */
     77       1.1      cgd 					/*   a */
     78       1.1      cgd 					/*   b */
     79       1.1      cgd 					/*   c */
     80       1.1      cgd 					/*   d */
     81       1.1      cgd #define MBOX_CHECK_FIRMWARE		0x000e
     82  1.31.2.7  nathanw #define	MBOX_READ_RAM_WORD_EXTENDED	0x000f
     83       1.1      cgd #define MBOX_INIT_REQ_QUEUE		0x0010
     84       1.1      cgd #define MBOX_INIT_RES_QUEUE		0x0011
     85       1.1      cgd #define MBOX_EXECUTE_IOCB		0x0012
     86       1.1      cgd #define MBOX_WAKE_UP			0x0013
     87       1.1      cgd #define MBOX_STOP_FIRMWARE		0x0014
     88       1.1      cgd #define MBOX_ABORT			0x0015
     89       1.1      cgd #define MBOX_ABORT_DEVICE		0x0016
     90       1.1      cgd #define MBOX_ABORT_TARGET		0x0017
     91       1.1      cgd #define MBOX_BUS_RESET			0x0018
     92       1.1      cgd #define MBOX_STOP_QUEUE			0x0019
     93       1.1      cgd #define MBOX_START_QUEUE		0x001a
     94       1.1      cgd #define MBOX_SINGLE_STEP_QUEUE		0x001b
     95       1.1      cgd #define MBOX_ABORT_QUEUE		0x001c
     96       1.1      cgd #define MBOX_GET_DEV_QUEUE_STATUS	0x001d
     97       1.1      cgd 					/*  1e */
     98       1.1      cgd #define MBOX_GET_FIRMWARE_STATUS	0x001f
     99       1.1      cgd #define MBOX_GET_INIT_SCSI_ID		0x0020
    100       1.1      cgd #define MBOX_GET_SELECT_TIMEOUT		0x0021
    101       1.1      cgd #define MBOX_GET_RETRY_COUNT		0x0022
    102       1.1      cgd #define MBOX_GET_TAG_AGE_LIMIT		0x0023
    103       1.1      cgd #define MBOX_GET_CLOCK_RATE		0x0024
    104       1.1      cgd #define MBOX_GET_ACT_NEG_STATE		0x0025
    105       1.1      cgd #define MBOX_GET_ASYNC_DATA_SETUP_TIME	0x0026
    106       1.1      cgd #define MBOX_GET_SBUS_PARAMS		0x0027
    107  1.31.2.3  nathanw #define		MBOX_GET_PCI_PARAMS	MBOX_GET_SBUS_PARAMS
    108       1.1      cgd #define MBOX_GET_TARGET_PARAMS		0x0028
    109       1.1      cgd #define MBOX_GET_DEV_QUEUE_PARAMS	0x0029
    110      1.17   mjacob #define	MBOX_GET_RESET_DELAY_PARAMS	0x002a
    111       1.1      cgd 					/*  2b */
    112       1.1      cgd 					/*  2c */
    113       1.1      cgd 					/*  2d */
    114       1.1      cgd 					/*  2e */
    115       1.1      cgd 					/*  2f */
    116       1.1      cgd #define MBOX_SET_INIT_SCSI_ID		0x0030
    117       1.1      cgd #define MBOX_SET_SELECT_TIMEOUT		0x0031
    118       1.1      cgd #define MBOX_SET_RETRY_COUNT		0x0032
    119       1.1      cgd #define MBOX_SET_TAG_AGE_LIMIT		0x0033
    120       1.1      cgd #define MBOX_SET_CLOCK_RATE		0x0034
    121      1.17   mjacob #define MBOX_SET_ACT_NEG_STATE		0x0035
    122       1.1      cgd #define MBOX_SET_ASYNC_DATA_SETUP_TIME	0x0036
    123       1.1      cgd #define MBOX_SET_SBUS_CONTROL_PARAMS	0x0037
    124       1.3   mjacob #define		MBOX_SET_PCI_PARAMETERS	0x0037
    125       1.1      cgd #define MBOX_SET_TARGET_PARAMS		0x0038
    126       1.1      cgd #define MBOX_SET_DEV_QUEUE_PARAMS	0x0039
    127      1.17   mjacob #define	MBOX_SET_RESET_DELAY_PARAMS	0x003a
    128       1.1      cgd 					/*  3b */
    129       1.1      cgd 					/*  3c */
    130       1.1      cgd 					/*  3d */
    131       1.1      cgd 					/*  3e */
    132       1.1      cgd 					/*  3f */
    133       1.1      cgd #define	MBOX_RETURN_BIOS_BLOCK_ADDR	0x0040
    134       1.1      cgd #define	MBOX_WRITE_FOUR_RAM_WORDS	0x0041
    135       1.1      cgd #define	MBOX_EXEC_BIOS_IOCB		0x0042
    136      1.12   mjacob #define	MBOX_SET_FW_FEATURES		0x004a
    137      1.12   mjacob #define	MBOX_GET_FW_FEATURES		0x004b
    138      1.12   mjacob #define		FW_FEATURE_FAST_POST	0x1
    139  1.31.2.7  nathanw #define		FW_FEATURE_LVD_NOTIFY	0x2
    140  1.31.2.7  nathanw #define		FW_FEATURE_RIO_32BIT	0x4
    141  1.31.2.7  nathanw #define		FW_FEATURE_RIO_16BIT	0x8
    142       1.1      cgd 
    143  1.31.2.4  nathanw #define	MBOX_ENABLE_TARGET_MODE		0x0055
    144      1.20   mjacob #define		ENABLE_TARGET_FLAG	0x8000
    145  1.31.2.1  nathanw #define		ENABLE_TQING_FLAG	0x0004
    146  1.31.2.1  nathanw #define		ENABLE_MANDATORY_DISC	0x0002
    147  1.31.2.4  nathanw #define	MBOX_GET_TARGET_STATUS		0x0056
    148  1.31.2.4  nathanw 
    149  1.31.2.4  nathanw /* These are for the ISP2X00 FC cards */
    150  1.31.2.4  nathanw #define	MBOX_GET_LOOP_ID		0x0020
    151  1.31.2.4  nathanw #define	MBOX_GET_FIRMWARE_OPTIONS	0x0028
    152  1.31.2.4  nathanw #define	MBOX_SET_FIRMWARE_OPTIONS	0x0038
    153  1.31.2.4  nathanw #define	MBOX_GET_RESOURCE_COUNT		0x0042
    154  1.31.2.4  nathanw #define	MBOX_ENHANCED_GET_PDB		0x0047
    155  1.31.2.4  nathanw #define	MBOX_EXEC_COMMAND_IOCB_A64	0x0054
    156  1.31.2.4  nathanw #define	MBOX_INIT_FIRMWARE		0x0060
    157  1.31.2.4  nathanw #define	MBOX_GET_INIT_CONTROL_BLOCK	0x0061
    158  1.31.2.4  nathanw #define	MBOX_INIT_LIP			0x0062
    159  1.31.2.4  nathanw #define	MBOX_GET_FC_AL_POSITION_MAP	0x0063
    160  1.31.2.4  nathanw #define	MBOX_GET_PORT_DB		0x0064
    161  1.31.2.4  nathanw #define	MBOX_CLEAR_ACA			0x0065
    162  1.31.2.4  nathanw #define	MBOX_TARGET_RESET		0x0066
    163  1.31.2.4  nathanw #define	MBOX_CLEAR_TASK_SET		0x0067
    164  1.31.2.4  nathanw #define	MBOX_ABORT_TASK_SET		0x0068
    165  1.31.2.4  nathanw #define	MBOX_GET_FW_STATE		0x0069
    166  1.31.2.4  nathanw #define	MBOX_GET_PORT_NAME		0x006A
    167  1.31.2.4  nathanw #define	MBOX_GET_LINK_STATUS		0x006B
    168  1.31.2.4  nathanw #define	MBOX_INIT_LIP_RESET		0x006C
    169  1.31.2.4  nathanw #define	MBOX_SEND_SNS			0x006E
    170  1.31.2.4  nathanw #define	MBOX_FABRIC_LOGIN		0x006F
    171  1.31.2.4  nathanw #define	MBOX_SEND_CHANGE_REQUEST	0x0070
    172  1.31.2.4  nathanw #define	MBOX_FABRIC_LOGOUT		0x0071
    173  1.31.2.4  nathanw #define	MBOX_INIT_LIP_LOGIN		0x0072
    174  1.31.2.9  nathanw 
    175  1.31.2.9  nathanw #define	MBOX_DRIVER_HEARTBEAT		0x005B
    176  1.31.2.9  nathanw #define	MBOX_FW_HEARTBEAT		0x005C
    177  1.31.2.4  nathanw 
    178  1.31.2.4  nathanw #define	MBOX_GET_SET_DATA_RATE		0x005D	/* 23XX only */
    179  1.31.2.4  nathanw #define		MBGSD_GET_RATE	0
    180  1.31.2.4  nathanw #define		MBGSD_SET_RATE	1
    181  1.31.2.4  nathanw #define		MBGSD_ONEGB	0
    182  1.31.2.4  nathanw #define		MBGSD_TWOGB	1
    183  1.31.2.4  nathanw #define		MBGSD_AUTO	2
    184      1.20   mjacob 
    185       1.3   mjacob 
    186       1.3   mjacob #define	ISP2100_SET_PCI_PARAM		0x00ff
    187       1.3   mjacob 
    188       1.1      cgd #define	MBOX_BUSY			0x04
    189       1.1      cgd 
    190       1.1      cgd typedef struct {
    191       1.3   mjacob 	u_int16_t param[8];
    192       1.1      cgd } mbreg_t;
    193       1.1      cgd 
    194       1.1      cgd /*
    195       1.8   mjacob  * Mailbox Command Complete Status Codes
    196       1.8   mjacob  */
    197       1.8   mjacob #define	MBOX_COMMAND_COMPLETE		0x4000
    198       1.8   mjacob #define	MBOX_INVALID_COMMAND		0x4001
    199       1.8   mjacob #define	MBOX_HOST_INTERFACE_ERROR	0x4002
    200       1.8   mjacob #define	MBOX_TEST_FAILED		0x4003
    201       1.8   mjacob #define	MBOX_COMMAND_ERROR		0x4005
    202       1.8   mjacob #define	MBOX_COMMAND_PARAM_ERROR	0x4006
    203      1.22   mjacob #define	MBOX_PORT_ID_USED		0x4007
    204      1.22   mjacob #define	MBOX_LOOP_ID_USED		0x4008
    205      1.22   mjacob #define	MBOX_ALL_IDS_USED		0x4009
    206      1.22   mjacob #define	MBOX_NOT_LOGGED_IN		0x400A
    207      1.25   mjacob #define	MBLOGALL			0x000f
    208      1.25   mjacob #define	MBLOGNONE			0x0000
    209      1.25   mjacob #define	MBLOGMASK(x)			((x) & 0xf)
    210       1.8   mjacob 
    211       1.8   mjacob /*
    212       1.8   mjacob  * Asynchronous event status codes
    213       1.8   mjacob  */
    214       1.8   mjacob #define	ASYNC_BUS_RESET			0x8001
    215       1.8   mjacob #define	ASYNC_SYSTEM_ERROR		0x8002
    216       1.8   mjacob #define	ASYNC_RQS_XFER_ERR		0x8003
    217       1.8   mjacob #define	ASYNC_RSP_XFER_ERR		0x8004
    218       1.8   mjacob #define	ASYNC_QWAKEUP			0x8005
    219       1.8   mjacob #define	ASYNC_TIMEOUT_RESET		0x8006
    220      1.10   mjacob #define	ASYNC_DEVICE_RESET		0x8007
    221       1.8   mjacob #define	ASYNC_EXTMSG_UNDERRUN		0x800A
    222       1.8   mjacob #define	ASYNC_SCAM_INT			0x800B
    223       1.8   mjacob #define	ASYNC_HUNG_SCSI			0x800C
    224       1.8   mjacob #define	ASYNC_KILLED_BUS		0x800D
    225       1.8   mjacob #define	ASYNC_BUS_TRANSIT		0x800E	/* LVD -> HVD, eg. */
    226       1.8   mjacob #define	ASYNC_LIP_OCCURRED		0x8010
    227       1.8   mjacob #define	ASYNC_LOOP_UP			0x8011
    228       1.8   mjacob #define	ASYNC_LOOP_DOWN			0x8012
    229       1.8   mjacob #define	ASYNC_LOOP_RESET		0x8013
    230      1.10   mjacob #define	ASYNC_PDB_CHANGED		0x8014
    231       1.8   mjacob #define	ASYNC_CHANGE_NOTIFY		0x8015
    232  1.31.2.3  nathanw #define	ASYNC_LIP_F8			0x8016
    233  1.31.2.2  nathanw #define	ASYNC_CMD_CMPLT			0x8020
    234  1.31.2.2  nathanw #define	ASYNC_CTIO_DONE			0x8021
    235  1.31.2.2  nathanw #define	ASYNC_IP_XMIT_DONE		0x8022
    236  1.31.2.2  nathanw #define	ASYNC_IP_RECV_DONE		0x8023
    237  1.31.2.2  nathanw #define	ASYNC_IP_BROADCAST		0x8024
    238  1.31.2.2  nathanw #define	ASYNC_IP_RCVQ_LOW		0x8025
    239  1.31.2.2  nathanw #define	ASYNC_IP_RCVQ_EMPTY		0x8026
    240  1.31.2.2  nathanw #define	ASYNC_IP_RECV_DONE_ALIGNED	0x8027
    241      1.21   mjacob #define	ASYNC_PTPMODE			0x8030
    242  1.31.2.2  nathanw #define	ASYNC_RIO1			0x8031
    243  1.31.2.2  nathanw #define	ASYNC_RIO2			0x8032
    244  1.31.2.2  nathanw #define	ASYNC_RIO3			0x8033
    245  1.31.2.2  nathanw #define	ASYNC_RIO4			0x8034
    246  1.31.2.2  nathanw #define	ASYNC_RIO5			0x8035
    247      1.21   mjacob #define	ASYNC_CONNMODE			0x8036
    248      1.21   mjacob #define		ISP_CONN_LOOP		1
    249      1.21   mjacob #define		ISP_CONN_PTP		2
    250      1.21   mjacob #define		ISP_CONN_BADLIP		3
    251      1.21   mjacob #define		ISP_CONN_FATAL		4
    252      1.21   mjacob #define		ISP_CONN_LOOPBACK	5
    253  1.31.2.2  nathanw #define	ASYNC_RIO_RESP			0x8040
    254  1.31.2.2  nathanw #define	ASYNC_RIO_COMP			0x8042
    255  1.31.2.2  nathanw /*
    256  1.31.2.2  nathanw  * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options
    257  1.31.2.2  nathanw  * mailbox command to enable this.
    258  1.31.2.2  nathanw  */
    259  1.31.2.2  nathanw #define	ASYNC_QFULL_SENT		0x8049
    260  1.31.2.2  nathanw 
    261  1.31.2.2  nathanw /*
    262  1.31.2.2  nathanw  * Mailbox Usages
    263  1.31.2.2  nathanw  */
    264  1.31.2.2  nathanw 
    265  1.31.2.2  nathanw #define	WRITE_REQUEST_QUEUE_IN_POINTER(isp, value)	\
    266  1.31.2.3  nathanw 	ISP_WRITE(isp, isp->isp_rqstinrp, value)
    267  1.31.2.2  nathanw 
    268  1.31.2.3  nathanw #define	READ_REQUEST_QUEUE_OUT_POINTER(isp)		\
    269  1.31.2.3  nathanw 	ISP_READ(isp, isp->isp_rqstoutrp)
    270  1.31.2.2  nathanw 
    271  1.31.2.3  nathanw #define	READ_RESPONSE_QUEUE_IN_POINTER(isp)		\
    272  1.31.2.3  nathanw 	ISP_READ(isp, isp->isp_respinrp)
    273  1.31.2.2  nathanw 
    274  1.31.2.3  nathanw #define	WRITE_RESPONSE_QUEUE_OUT_POINTER(isp, value)	\
    275  1.31.2.3  nathanw 	ISP_WRITE(isp, isp->isp_respoutrp, value)
    276      1.21   mjacob 
    277       1.8   mjacob /*
    278       1.1      cgd  * Command Structure Definitions
    279       1.1      cgd  */
    280       1.1      cgd 
    281       1.1      cgd typedef struct {
    282       1.1      cgd 	u_int32_t	ds_base;
    283       1.1      cgd 	u_int32_t	ds_count;
    284       1.1      cgd } ispds_t;
    285       1.1      cgd 
    286  1.31.2.2  nathanw typedef struct {
    287  1.31.2.3  nathanw 	u_int32_t	ds_base;
    288  1.31.2.3  nathanw 	u_int32_t	ds_basehi;
    289  1.31.2.2  nathanw 	u_int32_t	ds_count;
    290  1.31.2.2  nathanw } ispds64_t;
    291  1.31.2.2  nathanw 
    292  1.31.2.5  nathanw #define	DSTYPE_32BIT	0
    293  1.31.2.5  nathanw #define	DSTYPE_64BIT	1
    294  1.31.2.2  nathanw typedef struct {
    295  1.31.2.2  nathanw 	u_int16_t	ds_type;	/* 0-> ispds_t, 1-> ispds64_t */
    296  1.31.2.2  nathanw 	u_int32_t	ds_segment;	/* unused */
    297  1.31.2.2  nathanw 	u_int32_t	ds_base;	/* 32 bit address of DSD list */
    298  1.31.2.2  nathanw } ispdslist_t;
    299  1.31.2.2  nathanw 
    300  1.31.2.2  nathanw 
    301  1.31.2.2  nathanw /*
    302  1.31.2.2  nathanw  * These elements get swizzled around for SBus instances.
    303  1.31.2.2  nathanw  */
    304  1.31.2.5  nathanw #define	ISP_SWAP8(a, b)	{		\
    305      1.16   mjacob 	u_int8_t tmp;			\
    306      1.16   mjacob 	tmp = a;			\
    307      1.16   mjacob 	a = b;				\
    308      1.16   mjacob 	b = tmp;			\
    309      1.16   mjacob }
    310       1.1      cgd typedef struct {
    311       1.1      cgd 	u_int8_t	rqs_entry_type;
    312       1.1      cgd 	u_int8_t	rqs_entry_count;
    313       1.1      cgd 	u_int8_t	rqs_seqno;
    314       1.1      cgd 	u_int8_t	rqs_flags;
    315      1.16   mjacob } isphdr_t;
    316       1.1      cgd 
    317       1.1      cgd /* RQS Flag definitions */
    318       1.1      cgd #define	RQSFLAG_CONTINUATION	0x01
    319       1.1      cgd #define	RQSFLAG_FULL		0x02
    320       1.1      cgd #define	RQSFLAG_BADHEADER	0x04
    321       1.1      cgd #define	RQSFLAG_BADPACKET	0x08
    322       1.3   mjacob 
    323       1.1      cgd /* RQS entry_type definitions */
    324       1.8   mjacob #define	RQSTYPE_REQUEST		0x01
    325       1.8   mjacob #define	RQSTYPE_DATASEG		0x02
    326       1.8   mjacob #define	RQSTYPE_RESPONSE	0x03
    327       1.8   mjacob #define	RQSTYPE_MARKER		0x04
    328       1.8   mjacob #define	RQSTYPE_CMDONLY		0x05
    329       1.8   mjacob #define	RQSTYPE_ATIO		0x06	/* Target Mode */
    330      1.20   mjacob #define	RQSTYPE_CTIO		0x07	/* Target Mode */
    331       1.8   mjacob #define	RQSTYPE_SCAM		0x08
    332       1.8   mjacob #define	RQSTYPE_A64		0x09
    333       1.8   mjacob #define	RQSTYPE_A64_CONT	0x0a
    334       1.8   mjacob #define	RQSTYPE_ENABLE_LUN	0x0b	/* Target Mode */
    335       1.8   mjacob #define	RQSTYPE_MODIFY_LUN	0x0c	/* Target Mode */
    336       1.8   mjacob #define	RQSTYPE_NOTIFY		0x0d	/* Target Mode */
    337       1.8   mjacob #define	RQSTYPE_NOTIFY_ACK	0x0e	/* Target Mode */
    338       1.8   mjacob #define	RQSTYPE_CTIO1		0x0f	/* Target Mode */
    339       1.8   mjacob #define	RQSTYPE_STATUS_CONT	0x10
    340       1.8   mjacob #define	RQSTYPE_T2RQS		0x11
    341  1.31.2.2  nathanw #define	RQSTYPE_IP_XMIT		0x13
    342       1.8   mjacob #define	RQSTYPE_T4RQS		0x15
    343  1.31.2.2  nathanw #define	RQSTYPE_ATIO2		0x16	/* Target Mode */
    344  1.31.2.2  nathanw #define	RQSTYPE_CTIO2		0x17	/* Target Mode */
    345       1.8   mjacob #define	RQSTYPE_CSET0		0x18
    346       1.8   mjacob #define	RQSTYPE_T3RQS		0x19
    347  1.31.2.2  nathanw #define	RQSTYPE_IP_XMIT_64	0x1b
    348  1.31.2.2  nathanw #define	RQSTYPE_CTIO4		0x1e	/* Target Mode */
    349  1.31.2.2  nathanw #define	RQSTYPE_CTIO3		0x1f	/* Target Mode */
    350  1.31.2.2  nathanw #define	RQSTYPE_RIO1		0x21
    351  1.31.2.2  nathanw #define	RQSTYPE_RIO2		0x22
    352  1.31.2.2  nathanw #define	RQSTYPE_IP_RECV		0x23
    353  1.31.2.2  nathanw #define	RQSTYPE_IP_RECV_CONT	0x24
    354       1.1      cgd 
    355       1.1      cgd 
    356       1.1      cgd #define	ISP_RQDSEG	4
    357       1.1      cgd typedef struct {
    358       1.1      cgd 	isphdr_t	req_header;
    359       1.1      cgd 	u_int32_t	req_handle;
    360       1.1      cgd 	u_int8_t	req_lun_trn;
    361       1.1      cgd 	u_int8_t	req_target;
    362       1.1      cgd 	u_int16_t	req_cdblen;
    363       1.1      cgd #define	req_modifier	req_cdblen	/* marker packet */
    364       1.1      cgd 	u_int16_t	req_flags;
    365      1.10   mjacob 	u_int16_t	req_reserved;
    366       1.1      cgd 	u_int16_t	req_time;
    367       1.1      cgd 	u_int16_t	req_seg_count;
    368       1.1      cgd 	u_int8_t	req_cdb[12];
    369       1.1      cgd 	ispds_t		req_dataseg[ISP_RQDSEG];
    370       1.1      cgd } ispreq_t;
    371       1.1      cgd 
    372      1.16   mjacob /*
    373      1.16   mjacob  * A request packet can also be a marker packet.
    374      1.16   mjacob  */
    375      1.16   mjacob #define SYNC_DEVICE	0
    376      1.16   mjacob #define SYNC_TARGET	1
    377      1.16   mjacob #define SYNC_ALL	2
    378      1.16   mjacob 
    379  1.31.2.3  nathanw #define	ISP_RQDSEG_T2		3
    380       1.3   mjacob typedef struct {
    381       1.3   mjacob 	isphdr_t	req_header;
    382       1.3   mjacob 	u_int32_t	req_handle;
    383       1.3   mjacob 	u_int8_t	req_lun_trn;
    384       1.3   mjacob 	u_int8_t	req_target;
    385      1.10   mjacob 	u_int16_t	req_scclun;
    386       1.4   mjacob 	u_int16_t	req_flags;
    387       1.4   mjacob 	u_int16_t	_res2;
    388       1.3   mjacob 	u_int16_t	req_time;
    389       1.3   mjacob 	u_int16_t	req_seg_count;
    390  1.31.2.5  nathanw 	u_int8_t	req_cdb[16];
    391       1.3   mjacob 	u_int32_t	req_totalcnt;
    392       1.3   mjacob 	ispds_t		req_dataseg[ISP_RQDSEG_T2];
    393       1.3   mjacob } ispreqt2_t;
    394       1.3   mjacob 
    395  1.31.2.3  nathanw #define	ISP_RQDSEG_T3		2
    396  1.31.2.3  nathanw typedef struct {
    397  1.31.2.3  nathanw 	isphdr_t	req_header;
    398  1.31.2.3  nathanw 	u_int32_t	req_handle;
    399  1.31.2.3  nathanw 	u_int8_t	req_lun_trn;
    400  1.31.2.3  nathanw 	u_int8_t	req_target;
    401  1.31.2.3  nathanw 	u_int16_t	req_scclun;
    402  1.31.2.3  nathanw 	u_int16_t	req_flags;
    403  1.31.2.3  nathanw 	u_int16_t	_res2;
    404  1.31.2.3  nathanw 	u_int16_t	req_time;
    405  1.31.2.3  nathanw 	u_int16_t	req_seg_count;
    406  1.31.2.5  nathanw 	u_int8_t	req_cdb[16];
    407  1.31.2.3  nathanw 	u_int32_t	req_totalcnt;
    408  1.31.2.3  nathanw 	ispds64_t	req_dataseg[ISP_RQDSEG_T3];
    409  1.31.2.3  nathanw } ispreqt3_t;
    410  1.31.2.3  nathanw 
    411       1.1      cgd /* req_flag values */
    412       1.1      cgd #define	REQFLAG_NODISCON	0x0001
    413       1.1      cgd #define	REQFLAG_HTAG		0x0002
    414       1.1      cgd #define	REQFLAG_OTAG		0x0004
    415       1.1      cgd #define	REQFLAG_STAG		0x0008
    416       1.1      cgd #define	REQFLAG_TARGET_RTN	0x0010
    417       1.1      cgd 
    418       1.1      cgd #define	REQFLAG_NODATA		0x0000
    419       1.1      cgd #define	REQFLAG_DATA_IN		0x0020
    420       1.1      cgd #define	REQFLAG_DATA_OUT	0x0040
    421       1.1      cgd #define	REQFLAG_DATA_UNKNOWN	0x0060
    422       1.1      cgd 
    423       1.1      cgd #define	REQFLAG_DISARQ		0x0100
    424       1.8   mjacob #define	REQFLAG_FRC_ASYNC	0x0200
    425       1.8   mjacob #define	REQFLAG_FRC_SYNC	0x0400
    426       1.8   mjacob #define	REQFLAG_FRC_WIDE	0x0800
    427       1.8   mjacob #define	REQFLAG_NOPARITY	0x1000
    428       1.8   mjacob #define	REQFLAG_STOPQ		0x2000
    429       1.8   mjacob #define	REQFLAG_XTRASNS		0x4000
    430       1.8   mjacob #define	REQFLAG_PRIORITY	0x8000
    431       1.1      cgd 
    432       1.1      cgd typedef struct {
    433       1.1      cgd 	isphdr_t	req_header;
    434       1.1      cgd 	u_int32_t	req_handle;
    435       1.1      cgd 	u_int8_t	req_lun_trn;
    436       1.1      cgd 	u_int8_t	req_target;
    437       1.1      cgd 	u_int16_t	req_cdblen;
    438       1.1      cgd 	u_int16_t	req_flags;
    439       1.1      cgd 	u_int16_t	_res1;
    440       1.1      cgd 	u_int16_t	req_time;
    441       1.1      cgd 	u_int16_t	req_seg_count;
    442       1.1      cgd 	u_int8_t	req_cdb[44];
    443       1.1      cgd } ispextreq_t;
    444       1.1      cgd 
    445       1.1      cgd #define	ISP_CDSEG	7
    446       1.1      cgd typedef struct {
    447       1.1      cgd 	isphdr_t	req_header;
    448       1.1      cgd 	u_int32_t	_res1;
    449       1.1      cgd 	ispds_t		req_dataseg[ISP_CDSEG];
    450       1.1      cgd } ispcontreq_t;
    451       1.1      cgd 
    452  1.31.2.3  nathanw #define	ISP_CDSEG64	5
    453  1.31.2.3  nathanw typedef struct {
    454  1.31.2.3  nathanw 	isphdr_t	req_header;
    455  1.31.2.3  nathanw 	ispds64_t	req_dataseg[ISP_CDSEG64];
    456  1.31.2.3  nathanw } ispcontreq64_t;
    457  1.31.2.3  nathanw 
    458       1.1      cgd typedef struct {
    459       1.1      cgd 	isphdr_t	req_header;
    460       1.1      cgd 	u_int32_t	req_handle;
    461       1.1      cgd 	u_int16_t	req_scsi_status;
    462       1.1      cgd 	u_int16_t	req_completion_status;
    463       1.1      cgd 	u_int16_t	req_state_flags;
    464       1.1      cgd 	u_int16_t	req_status_flags;
    465       1.1      cgd 	u_int16_t	req_time;
    466      1.20   mjacob #define	req_response_len	req_time	/* FC only */
    467       1.1      cgd 	u_int16_t	req_sense_len;
    468       1.1      cgd 	u_int32_t	req_resid;
    469      1.27   mjacob 	u_int8_t	req_response[8];	/* FC only */
    470       1.1      cgd 	u_int8_t	req_sense_data[32];
    471       1.1      cgd } ispstatusreq_t;
    472  1.31.2.5  nathanw 
    473  1.31.2.5  nathanw typedef struct {
    474  1.31.2.5  nathanw 	isphdr_t	req_header;
    475  1.31.2.5  nathanw 	u_int8_t	req_sense_data[60];
    476  1.31.2.5  nathanw } ispstatus_cont_t;
    477       1.1      cgd 
    478       1.3   mjacob /*
    479      1.29   mjacob  * For Qlogic 2X00, the high order byte of SCSI status has
    480       1.3   mjacob  * additional meaning.
    481       1.3   mjacob  */
    482       1.3   mjacob #define	RQCS_RU	0x800	/* Residual Under */
    483       1.3   mjacob #define	RQCS_RO	0x400	/* Residual Over */
    484      1.27   mjacob #define	RQCS_RESID	(RQCS_RU|RQCS_RO)
    485       1.3   mjacob #define	RQCS_SV	0x200	/* Sense Length Valid */
    486      1.27   mjacob #define	RQCS_RV	0x100	/* FCP Response Length Valid */
    487       1.3   mjacob 
    488       1.3   mjacob /*
    489       1.3   mjacob  * Completion Status Codes.
    490       1.3   mjacob  */
    491       1.1      cgd #define RQCS_COMPLETE			0x0000
    492       1.1      cgd #define RQCS_DMA_ERROR			0x0002
    493       1.1      cgd #define RQCS_RESET_OCCURRED		0x0004
    494       1.1      cgd #define RQCS_ABORTED			0x0005
    495       1.1      cgd #define RQCS_TIMEOUT			0x0006
    496       1.1      cgd #define RQCS_DATA_OVERRUN		0x0007
    497      1.27   mjacob #define RQCS_DATA_UNDERRUN		0x0015
    498      1.27   mjacob #define	RQCS_QUEUE_FULL			0x001C
    499      1.27   mjacob 
    500      1.27   mjacob /* 1X00 Only Completion Codes */
    501      1.27   mjacob #define RQCS_INCOMPLETE			0x0001
    502      1.27   mjacob #define RQCS_TRANSPORT_ERROR		0x0003
    503       1.1      cgd #define RQCS_COMMAND_OVERRUN		0x0008
    504       1.1      cgd #define RQCS_STATUS_OVERRUN		0x0009
    505       1.1      cgd #define RQCS_BAD_MESSAGE		0x000a
    506       1.1      cgd #define RQCS_NO_MESSAGE_OUT		0x000b
    507       1.1      cgd #define RQCS_EXT_ID_FAILED		0x000c
    508       1.1      cgd #define RQCS_IDE_MSG_FAILED		0x000d
    509       1.1      cgd #define RQCS_ABORT_MSG_FAILED		0x000e
    510       1.1      cgd #define RQCS_REJECT_MSG_FAILED		0x000f
    511       1.1      cgd #define RQCS_NOP_MSG_FAILED		0x0010
    512       1.1      cgd #define RQCS_PARITY_ERROR_MSG_FAILED	0x0011
    513       1.1      cgd #define RQCS_DEVICE_RESET_MSG_FAILED	0x0012
    514       1.1      cgd #define RQCS_ID_MSG_FAILED		0x0013
    515       1.1      cgd #define RQCS_UNEXP_BUS_FREE		0x0014
    516       1.8   mjacob #define	RQCS_XACT_ERR1			0x0018
    517       1.8   mjacob #define	RQCS_XACT_ERR2			0x0019
    518       1.8   mjacob #define	RQCS_XACT_ERR3			0x001A
    519       1.8   mjacob #define	RQCS_BAD_ENTRY			0x001B
    520       1.8   mjacob #define	RQCS_PHASE_SKIPPED		0x001D
    521       1.8   mjacob #define	RQCS_ARQS_FAILED		0x001E
    522       1.8   mjacob #define	RQCS_WIDE_FAILED		0x001F
    523       1.8   mjacob #define	RQCS_SYNCXFER_FAILED		0x0020
    524       1.8   mjacob #define	RQCS_LVD_BUSERR			0x0021
    525       1.8   mjacob 
    526      1.27   mjacob /* 2X00 Only Completion Codes */
    527       1.3   mjacob #define	RQCS_PORT_UNAVAILABLE		0x0028
    528       1.3   mjacob #define	RQCS_PORT_LOGGED_OUT		0x0029
    529       1.3   mjacob #define	RQCS_PORT_CHANGED		0x002A
    530       1.3   mjacob #define	RQCS_PORT_BUSY			0x002B
    531       1.1      cgd 
    532       1.3   mjacob /*
    533      1.27   mjacob  * 1X00 specific State Flags
    534       1.3   mjacob  */
    535       1.1      cgd #define RQSF_GOT_BUS			0x0100
    536       1.1      cgd #define RQSF_GOT_TARGET			0x0200
    537       1.1      cgd #define RQSF_SENT_CDB			0x0400
    538       1.5   mjacob #define RQSF_XFRD_DATA			0x0800
    539       1.1      cgd #define RQSF_GOT_STATUS			0x1000
    540       1.1      cgd #define RQSF_GOT_SENSE			0x2000
    541       1.5   mjacob #define	RQSF_XFER_COMPLETE		0x4000
    542       1.1      cgd 
    543       1.3   mjacob /*
    544      1.29   mjacob  * 2X00 specific State Flags
    545      1.29   mjacob  * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available)
    546      1.29   mjacob  */
    547      1.29   mjacob #define	RQSF_DATA_IN			0x0020
    548      1.29   mjacob #define	RQSF_DATA_OUT			0x0040
    549      1.29   mjacob #define	RQSF_STAG			0x0008
    550      1.29   mjacob #define	RQSF_OTAG			0x0004
    551      1.29   mjacob #define	RQSF_HTAG			0x0002
    552      1.29   mjacob /*
    553      1.27   mjacob  * 1X00 Status Flags
    554       1.3   mjacob  */
    555       1.1      cgd #define RQSTF_DISCONNECT		0x0001
    556       1.1      cgd #define RQSTF_SYNCHRONOUS		0x0002
    557       1.1      cgd #define RQSTF_PARITY_ERROR		0x0004
    558       1.1      cgd #define RQSTF_BUS_RESET			0x0008
    559       1.1      cgd #define RQSTF_DEVICE_RESET		0x0010
    560       1.1      cgd #define RQSTF_ABORTED			0x0020
    561       1.1      cgd #define RQSTF_TIMEOUT			0x0040
    562       1.1      cgd #define RQSTF_NEGOTIATION		0x0080
    563      1.27   mjacob 
    564      1.27   mjacob /*
    565      1.27   mjacob  * 2X00 specific state flags
    566      1.27   mjacob  */
    567      1.27   mjacob /* RQSF_SENT_CDB	*/
    568      1.27   mjacob /* RQSF_XFRD_DATA	*/
    569      1.27   mjacob /* RQSF_GOT_STATUS	*/
    570      1.27   mjacob /* RQSF_XFER_COMPLETE	*/
    571      1.27   mjacob 
    572      1.27   mjacob /*
    573      1.27   mjacob  * 2X00 specific status flags
    574      1.27   mjacob  */
    575      1.27   mjacob /* RQSTF_ABORTED */
    576      1.27   mjacob /* RQSTF_TIMEOUT */
    577      1.27   mjacob #define	RQSTF_DMA_ERROR			0x0080
    578      1.27   mjacob #define	RQSTF_LOGOUT			0x2000
    579      1.27   mjacob 
    580      1.27   mjacob /*
    581      1.27   mjacob  * Miscellaneous
    582      1.27   mjacob  */
    583      1.27   mjacob #ifndef	ISP_EXEC_THROTTLE
    584      1.27   mjacob #define	ISP_EXEC_THROTTLE	16
    585      1.27   mjacob #endif
    586  1.31.2.1  nathanw 
    587  1.31.2.1  nathanw /*
    588  1.31.2.1  nathanw  * About Firmware returns an 'attribute' word in mailbox 6.
    589  1.31.2.1  nathanw  */
    590  1.31.2.1  nathanw #define	ISP_FW_ATTR_TMODE	0x01
    591  1.31.2.1  nathanw #define	ISP_FW_ATTR_SCCLUN	0x02
    592  1.31.2.1  nathanw #define	ISP_FW_ATTR_FABRIC	0x04
    593  1.31.2.1  nathanw #define	ISP_FW_ATTR_CLASS2	0x08
    594  1.31.2.1  nathanw #define	ISP_FW_ATTR_FCTAPE	0x10
    595  1.31.2.1  nathanw #define	ISP_FW_ATTR_IP		0x20
    596  1.31.2.2  nathanw 
    597  1.31.2.2  nathanw /*
    598  1.31.2.2  nathanw  * Reduced Interrupt Operation Response Queue Entreis
    599  1.31.2.2  nathanw  */
    600  1.31.2.2  nathanw 
    601  1.31.2.2  nathanw typedef struct {
    602  1.31.2.2  nathanw 	isphdr_t	req_header;
    603  1.31.2.2  nathanw 	u_int32_t	req_handles[15];
    604  1.31.2.2  nathanw } isp_rio1_t;
    605  1.31.2.2  nathanw 
    606  1.31.2.2  nathanw typedef struct {
    607  1.31.2.2  nathanw 	isphdr_t	req_header;
    608  1.31.2.2  nathanw 	u_int16_t	req_handles[30];
    609  1.31.2.2  nathanw } isp_rio2_t;
    610       1.3   mjacob 
    611       1.3   mjacob /*
    612      1.14   mjacob  * FC (ISP2100) specific data structures
    613       1.3   mjacob  */
    614       1.3   mjacob 
    615       1.3   mjacob /*
    616       1.3   mjacob  * Initialization Control Block
    617       1.8   mjacob  *
    618      1.19   mjacob  * Version One (prime) format.
    619       1.3   mjacob  */
    620      1.19   mjacob typedef struct isp_icb {
    621       1.3   mjacob 	u_int8_t	icb_version;
    622       1.3   mjacob 	u_int8_t	_reserved0;
    623      1.19   mjacob 	u_int16_t	icb_fwoptions;
    624      1.19   mjacob 	u_int16_t	icb_maxfrmlen;
    625       1.3   mjacob 	u_int16_t	icb_maxalloc;
    626       1.3   mjacob 	u_int16_t	icb_execthrottle;
    627       1.3   mjacob 	u_int8_t	icb_retry_count;
    628       1.3   mjacob 	u_int8_t	icb_retry_delay;
    629      1.19   mjacob 	u_int8_t	icb_portname[8];
    630       1.3   mjacob 	u_int16_t	icb_hardaddr;
    631       1.8   mjacob 	u_int8_t	icb_iqdevtype;
    632      1.19   mjacob 	u_int8_t	icb_logintime;
    633      1.19   mjacob 	u_int8_t	icb_nodename[8];
    634       1.3   mjacob 	u_int16_t	icb_rqstout;
    635       1.3   mjacob 	u_int16_t	icb_rspnsin;
    636      1.19   mjacob 	u_int16_t	icb_rqstqlen;
    637      1.19   mjacob 	u_int16_t	icb_rsltqlen;
    638      1.19   mjacob 	u_int16_t	icb_rqstaddr[4];
    639      1.19   mjacob 	u_int16_t	icb_respaddr[4];
    640      1.19   mjacob 	u_int16_t	icb_lunenables;
    641      1.19   mjacob 	u_int8_t	icb_ccnt;
    642      1.19   mjacob 	u_int8_t	icb_icnt;
    643      1.19   mjacob 	u_int16_t	icb_lunetimeout;
    644      1.19   mjacob 	u_int16_t	_reserved1;
    645      1.19   mjacob 	u_int16_t	icb_xfwoptions;
    646      1.19   mjacob 	u_int8_t	icb_racctimer;
    647      1.19   mjacob 	u_int8_t	icb_idelaytimer;
    648      1.19   mjacob 	u_int16_t	icb_zfwoptions;
    649      1.19   mjacob 	u_int16_t	_reserved2[13];
    650       1.3   mjacob } isp_icb_t;
    651       1.8   mjacob #define	ICB_VERSION1	1
    652       1.8   mjacob 
    653      1.18   mjacob #define	ICBOPT_HARD_ADDRESS	0x0001
    654      1.18   mjacob #define	ICBOPT_FAIRNESS		0x0002
    655      1.18   mjacob #define	ICBOPT_FULL_DUPLEX	0x0004
    656      1.18   mjacob #define	ICBOPT_FAST_POST	0x0008
    657      1.18   mjacob #define	ICBOPT_TGT_ENABLE	0x0010
    658      1.18   mjacob #define	ICBOPT_INI_DISABLE	0x0020
    659      1.18   mjacob #define	ICBOPT_INI_ADISC	0x0040
    660      1.18   mjacob #define	ICBOPT_INI_TGTTYPE	0x0080
    661      1.18   mjacob #define	ICBOPT_PDBCHANGE_AE	0x0100
    662      1.18   mjacob #define	ICBOPT_NOLIP		0x0200
    663      1.18   mjacob #define	ICBOPT_SRCHDOWN		0x0400
    664      1.18   mjacob #define	ICBOPT_PREVLOOP		0x0800
    665      1.18   mjacob #define	ICBOPT_STOP_ON_QFULL	0x1000
    666      1.18   mjacob #define	ICBOPT_FULL_LOGIN	0x2000
    667      1.31   mjacob #define	ICBOPT_BOTH_WWNS	0x4000
    668      1.19   mjacob #define	ICBOPT_EXTENDED		0x8000
    669      1.21   mjacob 
    670      1.21   mjacob #define	ICBXOPT_CLASS2_ACK0	0x0200
    671      1.21   mjacob #define	ICBXOPT_CLASS2		0x0100
    672      1.21   mjacob #define	ICBXOPT_LOOP_ONLY	(0 << 4)
    673      1.21   mjacob #define	ICBXOPT_PTP_ONLY	(1 << 4)
    674      1.21   mjacob #define	ICBXOPT_LOOP_2_PTP	(2 << 4)
    675      1.21   mjacob #define	ICBXOPT_PTP_2_LOOP	(3 << 4)
    676      1.21   mjacob 
    677      1.21   mjacob #define	ICBXOPT_RIO_OFF		0
    678      1.21   mjacob #define	ICBXOPT_RIO_16BIT	1
    679      1.21   mjacob #define	ICBXOPT_RIO_32BIT	2
    680  1.31.2.6  nathanw #define	ICBXOPT_RIO_16BIT_IOCB	3
    681  1.31.2.6  nathanw #define	ICBXOPT_RIO_32BIT_IOCB	4
    682      1.21   mjacob 
    683  1.31.2.6  nathanw #define	ICBZOPT_ENA_RDXFR_RDY	0x01
    684  1.31.2.6  nathanw #define	ICBZOPT_ENA_OOF		(1 << 6) /* out of order frame handling */
    685  1.31.2.3  nathanw /* These 3 only apply to the 2300 */
    686  1.31.2.4  nathanw #define	ICBZOPT_RATE_ONEGB	(MBGSD_ONEGB << 14)
    687  1.31.2.4  nathanw #define	ICBZOPT_RATE_TWOGB	(MBGSD_TWOGB << 14)
    688  1.31.2.4  nathanw #define	ICBZOPT_RATE_AUTO	(MBGSD_AUTO << 14)
    689       1.8   mjacob 
    690       1.8   mjacob 
    691       1.8   mjacob #define	ICB_MIN_FRMLEN		256
    692       1.8   mjacob #define	ICB_MAX_FRMLEN		2112
    693       1.8   mjacob #define	ICB_DFLT_FRMLEN		1024
    694      1.18   mjacob #define	ICB_DFLT_ALLOC		256
    695      1.18   mjacob #define	ICB_DFLT_THROTTLE	16
    696      1.18   mjacob #define	ICB_DFLT_RDELAY		5
    697      1.18   mjacob #define	ICB_DFLT_RCOUNT		3
    698      1.18   mjacob 
    699       1.8   mjacob 
    700       1.8   mjacob #define	RQRSP_ADDR0015	0
    701       1.8   mjacob #define	RQRSP_ADDR1631	1
    702       1.8   mjacob #define	RQRSP_ADDR3247	2
    703       1.8   mjacob #define	RQRSP_ADDR4863	3
    704       1.8   mjacob 
    705       1.8   mjacob 
    706       1.8   mjacob #define	ICB_NNM0	7
    707       1.8   mjacob #define	ICB_NNM1	6
    708       1.8   mjacob #define	ICB_NNM2	5
    709       1.8   mjacob #define	ICB_NNM3	4
    710       1.8   mjacob #define	ICB_NNM4	3
    711       1.8   mjacob #define	ICB_NNM5	2
    712       1.8   mjacob #define	ICB_NNM6	1
    713       1.8   mjacob #define	ICB_NNM7	0
    714       1.3   mjacob 
    715       1.8   mjacob #define	MAKE_NODE_NAME_FROM_WWN(array, wwn)	\
    716       1.8   mjacob 	array[ICB_NNM0] = (u_int8_t) ((wwn >>  0) & 0xff), \
    717       1.8   mjacob 	array[ICB_NNM1] = (u_int8_t) ((wwn >>  8) & 0xff), \
    718       1.8   mjacob 	array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \
    719       1.8   mjacob 	array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \
    720       1.8   mjacob 	array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \
    721       1.8   mjacob 	array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \
    722       1.8   mjacob 	array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \
    723       1.8   mjacob 	array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff)
    724      1.30   mjacob 
    725      1.30   mjacob /*
    726      1.30   mjacob  * FC-AL Position Map
    727      1.30   mjacob  *
    728      1.30   mjacob  * This is an at most 128 byte map that returns either
    729      1.30   mjacob  * the LILP or Firmware generated list of ports.
    730      1.30   mjacob  *
    731      1.30   mjacob  * We deviate a bit from the returned qlogic format to
    732      1.30   mjacob  * use an extra bit to say whether this was a LILP or
    733      1.30   mjacob  * f/w generated map.
    734      1.30   mjacob  */
    735      1.30   mjacob typedef struct {
    736      1.30   mjacob 	u_int8_t	fwmap	: 1,
    737      1.30   mjacob 			count	: 7;
    738      1.30   mjacob 	u_int8_t	map[127];
    739      1.30   mjacob } fcpos_map_t;
    740      1.14   mjacob 
    741      1.14   mjacob /*
    742      1.14   mjacob  * Port Data Base Element
    743      1.14   mjacob  */
    744      1.14   mjacob 
    745      1.14   mjacob typedef struct {
    746      1.14   mjacob 	u_int16_t	pdb_options;
    747      1.14   mjacob 	u_int8_t	pdb_mstate;
    748      1.14   mjacob 	u_int8_t	pdb_sstate;
    749      1.23       he #define	BITS2WORD(x)	((x)[0] << 16 | (x)[3] << 8 | (x)[2])
    750      1.14   mjacob 	u_int8_t	pdb_hardaddr_bits[4];
    751      1.14   mjacob 	u_int8_t	pdb_portid_bits[4];
    752      1.14   mjacob 	u_int8_t	pdb_nodename[8];
    753      1.14   mjacob 	u_int8_t	pdb_portname[8];
    754      1.14   mjacob 	u_int16_t	pdb_execthrottle;
    755      1.14   mjacob 	u_int16_t	pdb_exec_count;
    756      1.14   mjacob 	u_int8_t	pdb_retry_count;
    757      1.14   mjacob 	u_int8_t	pdb_retry_delay;
    758      1.14   mjacob 	u_int16_t	pdb_resalloc;
    759      1.14   mjacob 	u_int16_t	pdb_curalloc;
    760      1.14   mjacob 	u_int16_t	pdb_qhead;
    761      1.14   mjacob 	u_int16_t	pdb_qtail;
    762      1.14   mjacob 	u_int16_t	pdb_tl_next;
    763      1.14   mjacob 	u_int16_t	pdb_tl_last;
    764      1.14   mjacob 	u_int16_t	pdb_features;	/* PLOGI, Common Service */
    765      1.14   mjacob 	u_int16_t	pdb_pconcurrnt;	/* PLOGI, Common Service */
    766      1.14   mjacob 	u_int16_t	pdb_roi;	/* PLOGI, Common Service */
    767      1.14   mjacob 	u_int8_t	pdb_target;
    768      1.14   mjacob 	u_int8_t	pdb_initiator;	/* PLOGI, Class 3 Control Flags */
    769      1.14   mjacob 	u_int16_t	pdb_rdsiz;	/* PLOGI, Class 3 */
    770      1.14   mjacob 	u_int16_t	pdb_ncseq;	/* PLOGI, Class 3 */
    771      1.14   mjacob 	u_int16_t	pdb_noseq;	/* PLOGI, Class 3 */
    772      1.14   mjacob 	u_int16_t	pdb_labrtflg;
    773      1.14   mjacob 	u_int16_t	pdb_lstopflg;
    774      1.14   mjacob 	u_int16_t	pdb_sqhead;
    775      1.14   mjacob 	u_int16_t	pdb_sqtail;
    776      1.14   mjacob 	u_int16_t	pdb_ptimer;
    777      1.14   mjacob 	u_int16_t	pdb_nxt_seqid;
    778      1.14   mjacob 	u_int16_t	pdb_fcount;
    779      1.14   mjacob 	u_int16_t	pdb_prli_len;
    780      1.14   mjacob 	u_int16_t	pdb_prli_svc0;
    781      1.14   mjacob 	u_int16_t	pdb_prli_svc3;
    782      1.14   mjacob 	u_int16_t	pdb_loopid;
    783      1.14   mjacob 	u_int16_t	pdb_il_ptr;
    784      1.14   mjacob 	u_int16_t	pdb_sl_ptr;
    785      1.14   mjacob } isp_pdb_t;
    786      1.14   mjacob 
    787      1.14   mjacob #define	PDB_OPTIONS_XMITTING	(1<<11)
    788      1.14   mjacob #define	PDB_OPTIONS_LNKXMIT	(1<<10)
    789      1.14   mjacob #define	PDB_OPTIONS_ABORTED	(1<<9)
    790      1.14   mjacob #define	PDB_OPTIONS_ADISC	(1<<1)
    791      1.14   mjacob 
    792      1.14   mjacob #define	PDB_STATE_DISCOVERY	0
    793      1.14   mjacob #define	PDB_STATE_WDISC_ACK	1
    794      1.14   mjacob #define	PDB_STATE_PLOGI		2
    795      1.14   mjacob #define	PDB_STATE_PLOGI_ACK	3
    796      1.14   mjacob #define	PDB_STATE_PRLI		4
    797      1.14   mjacob #define	PDB_STATE_PRLI_ACK	5
    798      1.14   mjacob #define	PDB_STATE_LOGGED_IN	6
    799      1.14   mjacob #define	PDB_STATE_PORT_UNAVAIL	7
    800      1.14   mjacob #define	PDB_STATE_PRLO		8
    801      1.14   mjacob #define	PDB_STATE_PRLO_ACK	9
    802      1.14   mjacob #define	PDB_STATE_PLOGO		10
    803      1.14   mjacob #define	PDB_STATE_PLOG_ACK	11
    804      1.14   mjacob 
    805      1.14   mjacob #define		SVC3_TGT_ROLE		0x10
    806      1.14   mjacob #define 	SVC3_INI_ROLE		0x20
    807      1.14   mjacob #define			SVC3_ROLE_MASK	0x30
    808      1.18   mjacob #define			SVC3_ROLE_SHIFT	4
    809      1.18   mjacob 
    810  1.31.2.8  nathanw /*
    811  1.31.2.8  nathanw  * CT definition
    812  1.31.2.8  nathanw  *
    813  1.31.2.8  nathanw  * This is as the QLogic f/w documentations defines it- which is just opposite,
    814  1.31.2.8  nathanw  * bit wise, from what the specification defines it as. Additionally, the
    815  1.31.2.8  nathanw  * ct_response and ct_resid (really from FC-GS-2) need to be byte swapped.
    816  1.31.2.8  nathanw  */
    817  1.31.2.8  nathanw 
    818  1.31.2.8  nathanw typedef struct {
    819  1.31.2.8  nathanw 	u_int8_t	ct_revision;
    820  1.31.2.8  nathanw 	u_int8_t	ct_portid[3];
    821  1.31.2.8  nathanw 	u_int8_t	ct_fcs_type;
    822  1.31.2.8  nathanw 	u_int8_t	ct_fcs_subtype;
    823  1.31.2.8  nathanw 	u_int8_t	ct_options;
    824  1.31.2.8  nathanw 	u_int8_t	ct_res0;
    825  1.31.2.8  nathanw 	u_int16_t	ct_response;
    826  1.31.2.8  nathanw 	u_int16_t	ct_resid;
    827  1.31.2.8  nathanw 	u_int8_t	ct_res1;
    828  1.31.2.8  nathanw 	u_int8_t	ct_reason;
    829  1.31.2.8  nathanw 	u_int8_t	ct_explanation;
    830  1.31.2.8  nathanw 	u_int8_t	ct_vunique;
    831  1.31.2.8  nathanw } ct_hdr_t;
    832  1.31.2.8  nathanw #define	FS_ACC	0x8002
    833  1.31.2.8  nathanw #define	FS_RJT	0x8001
    834  1.31.2.8  nathanw 
    835  1.31.2.8  nathanw #define	FC4_IP		5 /* ISO/EEC 8802-2 LLC/SNAP "Out of Order Delivery" */
    836  1.31.2.8  nathanw #define	FC4_SCSI	8 /* SCSI-3 via Fivre Channel Protocol (FCP) */
    837  1.31.2.8  nathanw 
    838  1.31.2.8  nathanw #define	SNS_GA_NXT	0x100
    839  1.31.2.8  nathanw #define	SNS_GPN_ID	0x112
    840  1.31.2.8  nathanw #define	SNS_GNN_ID	0x113
    841  1.31.2.8  nathanw #define	SNS_GFF_ID	0x11F
    842  1.31.2.8  nathanw #define	SNS_GID_FT	0x171
    843  1.31.2.8  nathanw #define	SNS_RFT_ID	0x217
    844      1.18   mjacob typedef struct {
    845      1.18   mjacob 	u_int16_t	snscb_rblen;	/* response buffer length (words) */
    846      1.18   mjacob 	u_int16_t	snscb_res0;
    847      1.18   mjacob 	u_int16_t	snscb_addr[4];	/* response buffer address */
    848      1.18   mjacob 	u_int16_t	snscb_sblen;	/* subcommand buffer length (words) */
    849      1.18   mjacob 	u_int16_t	snscb_res1;
    850      1.18   mjacob 	u_int16_t	snscb_data[1];	/* variable data */
    851      1.18   mjacob } sns_screq_t;	/* Subcommand Request Structure */
    852      1.18   mjacob 
    853      1.18   mjacob typedef struct {
    854  1.31.2.8  nathanw 	u_int16_t	snscb_rblen;	/* response buffer length (words) */
    855  1.31.2.8  nathanw 	u_int16_t	snscb_res0;
    856  1.31.2.8  nathanw 	u_int16_t	snscb_addr[4];	/* response buffer address */
    857  1.31.2.8  nathanw 	u_int16_t	snscb_sblen;	/* subcommand buffer length (words) */
    858  1.31.2.8  nathanw 	u_int16_t	snscb_res1;
    859  1.31.2.8  nathanw 	u_int16_t	snscb_cmd;
    860  1.31.2.8  nathanw 	u_int16_t	snscb_res2;
    861  1.31.2.8  nathanw 	u_int32_t	snscb_res3;
    862  1.31.2.8  nathanw 	u_int32_t	snscb_port;
    863  1.31.2.8  nathanw } sns_ga_nxt_req_t;
    864  1.31.2.8  nathanw #define	SNS_GA_NXT_REQ_SIZE	(sizeof (sns_ga_nxt_req_t))
    865  1.31.2.8  nathanw 
    866  1.31.2.8  nathanw typedef struct {
    867  1.31.2.8  nathanw 	u_int16_t	snscb_rblen;	/* response buffer length (words) */
    868  1.31.2.8  nathanw 	u_int16_t	snscb_res0;
    869  1.31.2.8  nathanw 	u_int16_t	snscb_addr[4];	/* response buffer address */
    870  1.31.2.8  nathanw 	u_int16_t	snscb_sblen;	/* subcommand buffer length (words) */
    871  1.31.2.8  nathanw 	u_int16_t	snscb_res1;
    872  1.31.2.8  nathanw 	u_int16_t	snscb_cmd;
    873  1.31.2.8  nathanw 	u_int16_t	snscb_res2;
    874  1.31.2.8  nathanw 	u_int32_t	snscb_res3;
    875  1.31.2.8  nathanw 	u_int32_t	snscb_portid;
    876  1.31.2.8  nathanw } sns_gxn_id_req_t;
    877  1.31.2.8  nathanw #define	SNS_GXN_ID_REQ_SIZE	(sizeof (sns_gxn_id_req_t))
    878  1.31.2.8  nathanw 
    879  1.31.2.8  nathanw typedef struct {
    880  1.31.2.8  nathanw 	u_int16_t	snscb_rblen;	/* response buffer length (words) */
    881  1.31.2.8  nathanw 	u_int16_t	snscb_res0;
    882  1.31.2.8  nathanw 	u_int16_t	snscb_addr[4];	/* response buffer address */
    883  1.31.2.8  nathanw 	u_int16_t	snscb_sblen;	/* subcommand buffer length (words) */
    884  1.31.2.8  nathanw 	u_int16_t	snscb_res1;
    885  1.31.2.8  nathanw 	u_int16_t	snscb_cmd;
    886  1.31.2.8  nathanw 	u_int16_t	snscb_mword_div_2;
    887  1.31.2.8  nathanw 	u_int32_t	snscb_res3;
    888  1.31.2.8  nathanw 	u_int32_t	snscb_fc4_type;
    889  1.31.2.8  nathanw } sns_gid_ft_req_t;
    890  1.31.2.8  nathanw #define	SNS_GID_FT_REQ_SIZE	(sizeof (sns_gid_ft_req_t))
    891  1.31.2.8  nathanw 
    892  1.31.2.8  nathanw typedef struct {
    893  1.31.2.8  nathanw 	u_int16_t	snscb_rblen;	/* response buffer length (words) */
    894  1.31.2.8  nathanw 	u_int16_t	snscb_res0;
    895  1.31.2.8  nathanw 	u_int16_t	snscb_addr[4];	/* response buffer address */
    896  1.31.2.8  nathanw 	u_int16_t	snscb_sblen;	/* subcommand buffer length (words) */
    897  1.31.2.8  nathanw 	u_int16_t	snscb_res1;
    898  1.31.2.8  nathanw 	u_int16_t	snscb_cmd;
    899  1.31.2.8  nathanw 	u_int16_t	snscb_res2;
    900  1.31.2.8  nathanw 	u_int32_t	snscb_res3;
    901  1.31.2.8  nathanw 	u_int32_t	snscb_port;
    902  1.31.2.8  nathanw 	u_int32_t	snscb_fc4_types[8];
    903  1.31.2.8  nathanw } sns_rft_id_req_t;
    904  1.31.2.8  nathanw #define	SNS_RFT_ID_REQ_SIZE	(sizeof (sns_rft_id_req_t))
    905  1.31.2.8  nathanw 
    906  1.31.2.8  nathanw typedef struct {
    907  1.31.2.8  nathanw 	ct_hdr_t	snscb_cthdr;
    908      1.18   mjacob 	u_int8_t	snscb_port_type;
    909      1.18   mjacob 	u_int8_t	snscb_port_id[3];
    910      1.18   mjacob 	u_int8_t	snscb_portname[8];
    911      1.18   mjacob 	u_int16_t	snscb_data[1];	/* variable data */
    912      1.18   mjacob } sns_scrsp_t;	/* Subcommand Response Structure */
    913      1.22   mjacob 
    914      1.22   mjacob typedef struct {
    915  1.31.2.8  nathanw 	ct_hdr_t	snscb_cthdr;
    916      1.22   mjacob 	u_int8_t	snscb_port_type;
    917      1.22   mjacob 	u_int8_t	snscb_port_id[3];
    918      1.22   mjacob 	u_int8_t	snscb_portname[8];
    919      1.22   mjacob 	u_int8_t	snscb_pnlen;		/* symbolic port name length */
    920      1.22   mjacob 	u_int8_t	snscb_pname[255];	/* symbolic port name */
    921      1.22   mjacob 	u_int8_t	snscb_nodename[8];
    922      1.22   mjacob 	u_int8_t	snscb_nnlen;		/* symbolic node name length */
    923      1.22   mjacob 	u_int8_t	snscb_nname[255];	/* symbolic node name */
    924      1.22   mjacob 	u_int8_t	snscb_ipassoc[8];
    925      1.22   mjacob 	u_int8_t	snscb_ipaddr[16];
    926      1.22   mjacob 	u_int8_t	snscb_svc_class[4];
    927      1.22   mjacob 	u_int8_t	snscb_fc4_types[32];
    928      1.22   mjacob 	u_int8_t	snscb_fpname[8];
    929      1.22   mjacob 	u_int8_t	snscb_reserved;
    930      1.22   mjacob 	u_int8_t	snscb_hardaddr[3];
    931  1.31.2.8  nathanw } sns_ga_nxt_rsp_t;	/* Subcommand Response Structure */
    932  1.31.2.8  nathanw #define	SNS_GA_NXT_RESP_SIZE	(sizeof (sns_ga_nxt_rsp_t))
    933  1.31.2.8  nathanw 
    934  1.31.2.8  nathanw typedef struct {
    935  1.31.2.8  nathanw 	ct_hdr_t	snscb_cthdr;
    936  1.31.2.8  nathanw 	u_int8_t	snscb_wwn[8];
    937  1.31.2.8  nathanw } sns_gxn_id_rsp_t;
    938  1.31.2.8  nathanw #define	SNS_GXN_ID_RESP_SIZE	(sizeof (sns_gxn_id_rsp_t))
    939  1.31.2.8  nathanw 
    940  1.31.2.8  nathanw typedef struct {
    941  1.31.2.8  nathanw 	ct_hdr_t	snscb_cthdr;
    942  1.31.2.8  nathanw 	u_int32_t	snscb_fc4_features[32];
    943  1.31.2.8  nathanw } sns_gff_id_rsp_t;
    944  1.31.2.8  nathanw #define	SNS_GFF_ID_RESP_SIZE	(sizeof (sns_gff_id_rsp_t))
    945  1.31.2.8  nathanw 
    946  1.31.2.8  nathanw typedef struct {
    947  1.31.2.8  nathanw 	ct_hdr_t	snscb_cthdr;
    948  1.31.2.8  nathanw 	struct {
    949  1.31.2.8  nathanw 		u_int8_t	control;
    950  1.31.2.8  nathanw 		u_int8_t	portid[3];
    951  1.31.2.8  nathanw 	} snscb_ports[1];
    952  1.31.2.8  nathanw } sns_gid_ft_rsp_t;
    953  1.31.2.8  nathanw #define	SNS_GID_FT_RESP_SIZE(x)	((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2))
    954  1.31.2.8  nathanw 
    955  1.31.2.8  nathanw #define	SNS_RFT_ID_RESP_SIZE	(sizeof (ct_hdr_t))
    956       1.1      cgd 
    957       1.1      cgd #endif	/* _ISPMBOX_H */
    958