ispmbox.h revision 1.16
1 /* $NetBSD: ispmbox.h,v 1.16 1999/04/04 01:32:44 mjacob Exp $ */ 2 /* release_4_3_99 */ 3 /* 4 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 5 * 6 *--------------------------------------- 7 * Copyright (c) 1997, 1998 by Matthew Jacob 8 * NASA/Ames Research Center 9 * All rights reserved. 10 *--------------------------------------- 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice immediately at the beginning of the file, without modification, 17 * this list of conditions, and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 */ 37 #ifndef _ISPMBOX_H 38 #define _ISPMBOX_H 39 40 /* 41 * Mailbox Command Opcodes 42 */ 43 44 #define MBOX_NO_OP 0x0000 45 #define MBOX_LOAD_RAM 0x0001 46 #define MBOX_EXEC_FIRMWARE 0x0002 47 #define MBOX_DUMP_RAM 0x0003 48 #define MBOX_WRITE_RAM_WORD 0x0004 49 #define MBOX_READ_RAM_WORD 0x0005 50 #define MBOX_MAILBOX_REG_TEST 0x0006 51 #define MBOX_VERIFY_CHECKSUM 0x0007 52 #define MBOX_ABOUT_FIRMWARE 0x0008 53 /* 9 */ 54 /* a */ 55 /* b */ 56 /* c */ 57 /* d */ 58 #define MBOX_CHECK_FIRMWARE 0x000e 59 /* f */ 60 #define MBOX_INIT_REQ_QUEUE 0x0010 61 #define MBOX_INIT_RES_QUEUE 0x0011 62 #define MBOX_EXECUTE_IOCB 0x0012 63 #define MBOX_WAKE_UP 0x0013 64 #define MBOX_STOP_FIRMWARE 0x0014 65 #define MBOX_ABORT 0x0015 66 #define MBOX_ABORT_DEVICE 0x0016 67 #define MBOX_ABORT_TARGET 0x0017 68 #define MBOX_BUS_RESET 0x0018 69 #define MBOX_STOP_QUEUE 0x0019 70 #define MBOX_START_QUEUE 0x001a 71 #define MBOX_SINGLE_STEP_QUEUE 0x001b 72 #define MBOX_ABORT_QUEUE 0x001c 73 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 74 /* 1e */ 75 #define MBOX_GET_FIRMWARE_STATUS 0x001f 76 #define MBOX_GET_INIT_SCSI_ID 0x0020 77 #define MBOX_GET_SELECT_TIMEOUT 0x0021 78 #define MBOX_GET_RETRY_COUNT 0x0022 79 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 80 #define MBOX_GET_CLOCK_RATE 0x0024 81 #define MBOX_GET_ACT_NEG_STATE 0x0025 82 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 83 #define MBOX_GET_SBUS_PARAMS 0x0027 84 #define MBOX_GET_TARGET_PARAMS 0x0028 85 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 86 /* 2a */ 87 /* 2b */ 88 /* 2c */ 89 /* 2d */ 90 /* 2e */ 91 /* 2f */ 92 #define MBOX_SET_INIT_SCSI_ID 0x0030 93 #define MBOX_SET_SELECT_TIMEOUT 0x0031 94 #define MBOX_SET_RETRY_COUNT 0x0032 95 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 96 #define MBOX_SET_CLOCK_RATE 0x0034 97 #define MBOX_SET_ACTIVE_NEG_STATE 0x0035 98 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 99 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 100 #define MBOX_SET_PCI_PARAMETERS 0x0037 101 #define MBOX_SET_TARGET_PARAMS 0x0038 102 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 103 /* 3a */ 104 /* 3b */ 105 /* 3c */ 106 /* 3d */ 107 /* 3e */ 108 /* 3f */ 109 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 110 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 111 #define MBOX_EXEC_BIOS_IOCB 0x0042 112 #define MBOX_SET_FW_FEATURES 0x004a 113 #define MBOX_GET_FW_FEATURES 0x004b 114 #define FW_FEATURE_LVD_NOTIFY 0x2 115 #define FW_FEATURE_FAST_POST 0x1 116 117 /* These are for the ISP2100 FC cards */ 118 #define MBOX_GET_LOOP_ID 0x20 119 #define MBOX_EXEC_COMMAND_IOCB_A64 0x54 120 #define MBOX_INIT_FIRMWARE 0x60 121 #define MBOX_GET_INIT_CONTROL_BLOCK 0x61 122 #define MBOX_INIT_LIP 0x62 123 #define MBOX_GET_FC_AL_POSITION_MAP 0x63 124 #define MBOX_GET_PORT_DB 0x64 125 #define MBOX_CLEAR_ACA 0x65 126 #define MBOX_TARGET_RESET 0x66 127 #define MBOX_CLEAR_TASK_SET 0x67 128 #define MBOX_ABORT_TASK_SET 0x68 129 #define MBOX_GET_FW_STATE 0x69 130 #define MBOX_GET_PORT_NAME 0x6a 131 #define MBOX_GET_LINK_STATUS 0x6b 132 #define MBOX_INIT_LIP_RESET 0x6c 133 #define MBOX_INIT_LIP_LOGIN 0x72 134 135 #define ISP2100_SET_PCI_PARAM 0x00ff 136 137 #define MBOX_BUSY 0x04 138 139 typedef struct { 140 u_int16_t param[8]; 141 } mbreg_t; 142 143 /* 144 * Mailbox Command Complete Status Codes 145 */ 146 #define MBOX_COMMAND_COMPLETE 0x4000 147 #define MBOX_INVALID_COMMAND 0x4001 148 #define MBOX_HOST_INTERFACE_ERROR 0x4002 149 #define MBOX_TEST_FAILED 0x4003 150 #define MBOX_COMMAND_ERROR 0x4005 151 #define MBOX_COMMAND_PARAM_ERROR 0x4006 152 153 /* 154 * Asynchronous event status codes 155 */ 156 #define ASYNC_BUS_RESET 0x8001 157 #define ASYNC_SYSTEM_ERROR 0x8002 158 #define ASYNC_RQS_XFER_ERR 0x8003 159 #define ASYNC_RSP_XFER_ERR 0x8004 160 #define ASYNC_QWAKEUP 0x8005 161 #define ASYNC_TIMEOUT_RESET 0x8006 162 #define ASYNC_DEVICE_RESET 0x8007 163 #define ASYNC_EXTMSG_UNDERRUN 0x800A 164 #define ASYNC_SCAM_INT 0x800B 165 #define ASYNC_HUNG_SCSI 0x800C 166 #define ASYNC_KILLED_BUS 0x800D 167 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 168 #define ASYNC_CMD_CMPLT 0x8020 169 #define ASYNC_CTIO_DONE 0x8021 170 171 /* for ISP2100 only */ 172 #define ASYNC_LIP_OCCURRED 0x8010 173 #define ASYNC_LOOP_UP 0x8011 174 #define ASYNC_LOOP_DOWN 0x8012 175 #define ASYNC_LOOP_RESET 0x8013 176 #define ASYNC_PDB_CHANGED 0x8014 177 #define ASYNC_CHANGE_NOTIFY 0x8015 178 179 /* 180 * Command Structure Definitions 181 */ 182 183 typedef struct { 184 u_int32_t ds_base; 185 u_int32_t ds_count; 186 } ispds_t; 187 188 #define _ISP_SWAP8(a, b) { \ 189 u_int8_t tmp; \ 190 tmp = a; \ 191 a = b; \ 192 b = tmp; \ 193 } 194 195 /* 196 * These elements get swizzled around for SBus instances. 197 */ 198 typedef struct { 199 u_int8_t rqs_entry_type; 200 u_int8_t rqs_entry_count; 201 u_int8_t rqs_seqno; 202 u_int8_t rqs_flags; 203 } isphdr_t; 204 /* 205 * There are no (for all intents and purposes) non-sparc SBus machines 206 */ 207 #ifdef __sparc__ 208 #define ISP_SBUSIFY_ISPHDR(isp, hdrp) \ 209 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 210 _ISP_SWAP8((hdrp)->rqs_entry_count, (hdrp)->rqs_entry_type); \ 211 _ISP_SWAP8((hdrp)->rqs_flags, (hdrp)->rqs_seqno); \ 212 } 213 #else 214 #define ISP_SBUSIFY_ISPHDR(a, b) 215 #endif 216 217 /* RQS Flag definitions */ 218 #define RQSFLAG_CONTINUATION 0x01 219 #define RQSFLAG_FULL 0x02 220 #define RQSFLAG_BADHEADER 0x04 221 #define RQSFLAG_BADPACKET 0x08 222 223 /* RQS entry_type definitions */ 224 #define RQSTYPE_REQUEST 0x01 225 #define RQSTYPE_DATASEG 0x02 226 #define RQSTYPE_RESPONSE 0x03 227 #define RQSTYPE_MARKER 0x04 228 #define RQSTYPE_CMDONLY 0x05 229 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 230 #define RQSTYPE_CTIO0 0x07 /* Target Mode */ 231 #define RQSTYPE_SCAM 0x08 232 #define RQSTYPE_A64 0x09 233 #define RQSTYPE_A64_CONT 0x0a 234 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 235 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 236 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 237 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 238 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 239 #define RQSTYPE_STATUS_CONT 0x10 240 #define RQSTYPE_T2RQS 0x11 241 242 #define RQSTYPE_T4RQS 0x15 243 #define RQSTYPE_ATIO2 0x16 244 #define RQSTYPE_CTIO2 0x17 245 #define RQSTYPE_CSET0 0x18 246 #define RQSTYPE_T3RQS 0x19 247 248 #define RQSTYPE_CTIO3 0x1f 249 250 251 #define ISP_RQDSEG 4 252 typedef struct { 253 isphdr_t req_header; 254 u_int32_t req_handle; 255 u_int8_t req_lun_trn; 256 u_int8_t req_target; 257 u_int16_t req_cdblen; 258 #define req_modifier req_cdblen /* marker packet */ 259 u_int16_t req_flags; 260 u_int16_t req_reserved; 261 u_int16_t req_time; 262 u_int16_t req_seg_count; 263 u_int8_t req_cdb[12]; 264 ispds_t req_dataseg[ISP_RQDSEG]; 265 } ispreq_t; 266 267 /* 268 * A request packet can also be a marker packet. 269 */ 270 #define SYNC_DEVICE 0 271 #define SYNC_TARGET 1 272 #define SYNC_ALL 2 273 274 /* 275 * There are no (for all intents and purposes) non-sparc SBus machines 276 */ 277 #ifdef __sparc__ 278 #define ISP_SBUSIFY_ISPREQ(isp, rqp) \ 279 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 280 _ISP_SWAP8((rqp)->req_target, (rqp)->req_lun_trn); \ 281 } 282 #else 283 #define ISP_SBUSIFY_ISPREQ(a, b) 284 #endif 285 286 #define ISP_RQDSEG_T2 3 287 typedef struct { 288 isphdr_t req_header; 289 u_int32_t req_handle; 290 u_int8_t req_lun_trn; 291 u_int8_t req_target; 292 u_int16_t req_scclun; 293 u_int16_t req_flags; 294 u_int16_t _res2; 295 u_int16_t req_time; 296 u_int16_t req_seg_count; 297 u_int32_t req_cdb[4]; 298 u_int32_t req_totalcnt; 299 ispds_t req_dataseg[ISP_RQDSEG_T2]; 300 } ispreqt2_t; 301 302 /* req_flag values */ 303 #define REQFLAG_NODISCON 0x0001 304 #define REQFLAG_HTAG 0x0002 305 #define REQFLAG_OTAG 0x0004 306 #define REQFLAG_STAG 0x0008 307 #define REQFLAG_TARGET_RTN 0x0010 308 309 #define REQFLAG_NODATA 0x0000 310 #define REQFLAG_DATA_IN 0x0020 311 #define REQFLAG_DATA_OUT 0x0040 312 #define REQFLAG_DATA_UNKNOWN 0x0060 313 314 #define REQFLAG_DISARQ 0x0100 315 #define REQFLAG_FRC_ASYNC 0x0200 316 #define REQFLAG_FRC_SYNC 0x0400 317 #define REQFLAG_FRC_WIDE 0x0800 318 #define REQFLAG_NOPARITY 0x1000 319 #define REQFLAG_STOPQ 0x2000 320 #define REQFLAG_XTRASNS 0x4000 321 #define REQFLAG_PRIORITY 0x8000 322 323 typedef struct { 324 isphdr_t req_header; 325 u_int32_t req_handle; 326 u_int8_t req_lun_trn; 327 u_int8_t req_target; 328 u_int16_t req_cdblen; 329 u_int16_t req_flags; 330 u_int16_t _res1; 331 u_int16_t req_time; 332 u_int16_t req_seg_count; 333 u_int8_t req_cdb[44]; 334 } ispextreq_t; 335 336 #define ISP_CDSEG 7 337 typedef struct { 338 isphdr_t req_header; 339 u_int32_t _res1; 340 ispds_t req_dataseg[ISP_CDSEG]; 341 } ispcontreq_t; 342 343 typedef struct { 344 isphdr_t req_header; 345 u_int32_t req_handle; 346 u_int16_t req_scsi_status; 347 u_int16_t req_completion_status; 348 u_int16_t req_state_flags; 349 u_int16_t req_status_flags; 350 u_int16_t req_time; 351 u_int16_t req_sense_len; 352 u_int32_t req_resid; 353 u_int8_t _res1[8]; 354 u_int8_t req_sense_data[32]; 355 } ispstatusreq_t; 356 357 /* 358 * For Qlogic 2100, the high order byte of SCSI status has 359 * additional meaning. 360 */ 361 #define RQCS_RU 0x800 /* Residual Under */ 362 #define RQCS_RO 0x400 /* Residual Over */ 363 #define RQCS_SV 0x200 /* Sense Length Valid */ 364 #define RQCS_RV 0x100 /* Residual Valid */ 365 366 /* 367 * Completion Status Codes. 368 */ 369 #define RQCS_COMPLETE 0x0000 370 #define RQCS_INCOMPLETE 0x0001 371 #define RQCS_DMA_ERROR 0x0002 372 #define RQCS_TRANSPORT_ERROR 0x0003 373 #define RQCS_RESET_OCCURRED 0x0004 374 #define RQCS_ABORTED 0x0005 375 #define RQCS_TIMEOUT 0x0006 376 #define RQCS_DATA_OVERRUN 0x0007 377 #define RQCS_COMMAND_OVERRUN 0x0008 378 #define RQCS_STATUS_OVERRUN 0x0009 379 #define RQCS_BAD_MESSAGE 0x000a 380 #define RQCS_NO_MESSAGE_OUT 0x000b 381 #define RQCS_EXT_ID_FAILED 0x000c 382 #define RQCS_IDE_MSG_FAILED 0x000d 383 #define RQCS_ABORT_MSG_FAILED 0x000e 384 #define RQCS_REJECT_MSG_FAILED 0x000f 385 #define RQCS_NOP_MSG_FAILED 0x0010 386 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 387 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 388 #define RQCS_ID_MSG_FAILED 0x0013 389 #define RQCS_UNEXP_BUS_FREE 0x0014 390 #define RQCS_DATA_UNDERRUN 0x0015 391 #define RQCS_XACT_ERR1 0x0018 392 #define RQCS_XACT_ERR2 0x0019 393 #define RQCS_XACT_ERR3 0x001A 394 #define RQCS_BAD_ENTRY 0x001B 395 #define RQCS_QUEUE_FULL 0x001C 396 #define RQCS_PHASE_SKIPPED 0x001D 397 #define RQCS_ARQS_FAILED 0x001E 398 #define RQCS_WIDE_FAILED 0x001F 399 #define RQCS_SYNCXFER_FAILED 0x0020 400 #define RQCS_LVD_BUSERR 0x0021 401 402 /* 2100 Only Completion Codes */ 403 #define RQCS_PORT_UNAVAILABLE 0x0028 404 #define RQCS_PORT_LOGGED_OUT 0x0029 405 #define RQCS_PORT_CHANGED 0x002A 406 #define RQCS_PORT_BUSY 0x002B 407 408 /* 409 * State Flags (not applicable to 2100) 410 */ 411 #define RQSF_GOT_BUS 0x0100 412 #define RQSF_GOT_TARGET 0x0200 413 #define RQSF_SENT_CDB 0x0400 414 #define RQSF_XFRD_DATA 0x0800 415 #define RQSF_GOT_STATUS 0x1000 416 #define RQSF_GOT_SENSE 0x2000 417 #define RQSF_XFER_COMPLETE 0x4000 418 419 /* 420 * Status Flags (not applicable to 2100) 421 */ 422 #define RQSTF_DISCONNECT 0x0001 423 #define RQSTF_SYNCHRONOUS 0x0002 424 #define RQSTF_PARITY_ERROR 0x0004 425 #define RQSTF_BUS_RESET 0x0008 426 #define RQSTF_DEVICE_RESET 0x0010 427 #define RQSTF_ABORTED 0x0020 428 #define RQSTF_TIMEOUT 0x0040 429 #define RQSTF_NEGOTIATION 0x0080 430 431 /* 432 * FC (ISP2100) specific data structures 433 */ 434 435 /* 436 * Initialization Control Block 437 * 438 * Version One format. 439 */ 440 typedef struct { 441 u_int8_t icb_version; 442 u_int8_t _reserved0; 443 u_int16_t icb_fwoptions; 444 u_int16_t icb_maxfrmlen; 445 u_int16_t icb_maxalloc; 446 u_int16_t icb_execthrottle; 447 u_int8_t icb_retry_count; 448 u_int8_t icb_retry_delay; 449 u_int8_t icb_nodename[8]; 450 u_int16_t icb_hardaddr; 451 u_int8_t icb_iqdevtype; 452 u_int8_t _reserved1; 453 u_int8_t icb_portname[8]; 454 u_int16_t icb_rqstout; 455 u_int16_t icb_rspnsin; 456 u_int16_t icb_rqstqlen; 457 u_int16_t icb_rsltqlen; 458 u_int16_t icb_rqstaddr[4]; 459 u_int16_t icb_respaddr[4]; 460 } isp_icb_t; 461 #define ICB_VERSION1 1 462 463 #define ICBOPT_HARD_ADDRESS (1<<0) 464 #define ICBOPT_FAIRNESS (1<<1) 465 #define ICBOPT_FULL_DUPLEX (1<<2) 466 #define ICBOPT_FAST_POST (1<<3) 467 #define ICBOPT_TGT_ENABLE (1<<4) 468 #define ICBOPT_INI_DISABLE (1<<5) 469 #define ICBOPT_INI_ADISC (1<<6) 470 #define ICBOPT_INI_TGTTYPE (1<<7) 471 #define ICBOPT_PDBCHANGE_AE (1<<8) 472 #define ICBOPT_NOLIP (1<<9) 473 #define ICBOPT_SRCHDOWN (1<<10) 474 #define ICBOPT_PREVLOOP (1<<11) 475 #define ICBOPT_STOP_ON_QFULL (1<<12) 476 #define ICBOPT_FULL_LOGIN (1<<13) 477 #define ICBOPT_USE_PORTNAME (1<<14) 478 479 480 #define ICB_MIN_FRMLEN 256 481 #define ICB_MAX_FRMLEN 2112 482 #define ICB_DFLT_FRMLEN 1024 483 484 #define RQRSP_ADDR0015 0 485 #define RQRSP_ADDR1631 1 486 #define RQRSP_ADDR3247 2 487 #define RQRSP_ADDR4863 3 488 489 490 #define ICB_NNM0 7 491 #define ICB_NNM1 6 492 #define ICB_NNM2 5 493 #define ICB_NNM3 4 494 #define ICB_NNM4 3 495 #define ICB_NNM5 2 496 #define ICB_NNM6 1 497 #define ICB_NNM7 0 498 499 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 500 array[ICB_NNM0] = (u_int8_t) ((wwn >> 0) & 0xff), \ 501 array[ICB_NNM1] = (u_int8_t) ((wwn >> 8) & 0xff), \ 502 array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \ 503 array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \ 504 array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \ 505 array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \ 506 array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \ 507 array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff) 508 509 /* 510 * Port Data Base Element 511 */ 512 513 typedef struct { 514 u_int16_t pdb_options; 515 u_int8_t pdb_mstate; 516 u_int8_t pdb_sstate; 517 #define BITS2WORD(x) (x)[0] << 16 | (x)[3] << 8 | (x)[2] 518 u_int8_t pdb_hardaddr_bits[4]; 519 u_int8_t pdb_portid_bits[4]; 520 u_int8_t pdb_nodename[8]; 521 u_int8_t pdb_portname[8]; 522 u_int16_t pdb_execthrottle; 523 u_int16_t pdb_exec_count; 524 u_int8_t pdb_retry_count; 525 u_int8_t pdb_retry_delay; 526 u_int16_t pdb_resalloc; 527 u_int16_t pdb_curalloc; 528 u_int16_t pdb_qhead; 529 u_int16_t pdb_qtail; 530 u_int16_t pdb_tl_next; 531 u_int16_t pdb_tl_last; 532 u_int16_t pdb_features; /* PLOGI, Common Service */ 533 u_int16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 534 u_int16_t pdb_roi; /* PLOGI, Common Service */ 535 u_int8_t pdb_target; 536 u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 537 u_int16_t pdb_rdsiz; /* PLOGI, Class 3 */ 538 u_int16_t pdb_ncseq; /* PLOGI, Class 3 */ 539 u_int16_t pdb_noseq; /* PLOGI, Class 3 */ 540 u_int16_t pdb_labrtflg; 541 u_int16_t pdb_lstopflg; 542 u_int16_t pdb_sqhead; 543 u_int16_t pdb_sqtail; 544 u_int16_t pdb_ptimer; 545 u_int16_t pdb_nxt_seqid; 546 u_int16_t pdb_fcount; 547 u_int16_t pdb_prli_len; 548 u_int16_t pdb_prli_svc0; 549 u_int16_t pdb_prli_svc3; 550 u_int16_t pdb_loopid; 551 u_int16_t pdb_il_ptr; 552 u_int16_t pdb_sl_ptr; 553 } isp_pdb_t; 554 555 #define INVALID_PDB_OPTIONS 0xDEAD 556 557 #define PDB_OPTIONS_XMITTING (1<<11) 558 #define PDB_OPTIONS_LNKXMIT (1<<10) 559 #define PDB_OPTIONS_ABORTED (1<<9) 560 #define PDB_OPTIONS_ADISC (1<<1) 561 562 #define PDB_STATE_DISCOVERY 0 563 #define PDB_STATE_WDISC_ACK 1 564 #define PDB_STATE_PLOGI 2 565 #define PDB_STATE_PLOGI_ACK 3 566 #define PDB_STATE_PRLI 4 567 #define PDB_STATE_PRLI_ACK 5 568 #define PDB_STATE_LOGGED_IN 6 569 #define PDB_STATE_PORT_UNAVAIL 7 570 #define PDB_STATE_PRLO 8 571 #define PDB_STATE_PRLO_ACK 9 572 #define PDB_STATE_PLOGO 10 573 #define PDB_STATE_PLOG_ACK 11 574 575 #define SVC3_TGT_ROLE 0x10 576 #define SVC3_INI_ROLE 0x20 577 #define SVC3_ROLE_MASK 0x30 578 579 /* 580 * Target Mode Structures 581 */ 582 #define TGTSVALID 0x80 /* scsi status & sense data valid */ 583 #define SUGGSENSELEN 18 584 585 /* 586 * Structure for Enable Lun and Modify Lun queue entries 587 */ 588 typedef struct { 589 isphdr_t le_header; 590 u_int32_t le_reserved2; 591 u_int8_t le_lun; 592 u_int8_t le_rsvd; 593 u_int8_t le_ops; /* Modify LUN only */ 594 u_int8_t le_tgt; /* Not for FC */ 595 u_int32_t le_flags; /* Not for FC */ 596 u_int8_t le_status; 597 u_int8_t le_rsvd2; 598 u_int8_t le_cmd_count; 599 u_int8_t le_in_count; 600 u_int8_t le_cdb6len; /* Not for FC */ 601 u_int8_t le_cdb7len; /* Not for FC */ 602 u_int16_t le_timeout; 603 u_int16_t le_reserved[20]; 604 } lun_entry_t; 605 606 /* 607 * le_flags values 608 */ 609 #define LUN_TQAE 0x00000001 /* Tagged Queue Action Enable */ 610 #define LUN_DSSM 0x01000000 /* Disable Sending SDP Message */ 611 #define LUN_DM 0x40000000 /* Disconnects Mandatory */ 612 613 /* 614 * le_ops values 615 */ 616 #define LUN_CCINCR 0x01 /* increment command count */ 617 #define LUN_CCDECR 0x02 /* decrement command count */ 618 #define LUN_ININCR 0x40 /* increment immed. notify count */ 619 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 620 621 /* 622 * le_status values 623 */ 624 #define LUN_ERR 0x04 /* request completed with error */ 625 #define LUN_INVAL 0x06 /* invalid request */ 626 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 627 #define LUN_ENABLED 0x3E /* LUN already enabled */ 628 629 /* 630 * Immediate Notify Entry structure 631 */ 632 #define IN_MSGLEN 8 /* 8 bytes */ 633 #define IN_RSVDLEN 8 /* 8 words */ 634 typedef struct { 635 isphdr_t in_header; 636 u_int32_t in_reserved2; 637 u_int8_t in_lun; /* lun */ 638 u_int8_t in_iid; /* initiator */ 639 u_int8_t in_rsvd; 640 u_int8_t in_tgt; /* target */ 641 u_int32_t in_flags; 642 u_int8_t in_status; 643 u_int8_t in_rsvd2; 644 u_int8_t in_tag_val; /* tag value */ 645 u_int8_t in_tag_type; /* tag type */ 646 u_int16_t in_seqid; /* sequence id */ 647 u_int8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 648 u_int16_t in_reserved[IN_RSVDLEN]; 649 u_int8_t in_sense[SUGGSENSELEN]; /* suggested sense data */ 650 } in_entry_t; 651 652 typedef struct { 653 isphdr_t in_header; 654 u_int32_t in_reserved2; 655 u_int8_t in_lun; /* lun */ 656 u_int8_t in_iid; /* initiator */ 657 u_int16_t in_rsvd; 658 u_int32_t in_rsvd2; 659 u_int16_t in_status; 660 u_int16_t in_task_flags; 661 u_int16_t in_seqid; /* sequence id */ 662 } in_fcentry_t; 663 664 /* 665 * Values for the in_status field 666 */ 667 #define IN_NO_RCAP 0x16 /* requested capability not available */ 668 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 669 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 670 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 671 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 672 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 673 674 /* 675 * Notify Acknowledge Entry structure 676 */ 677 #define NA_RSVDLEN 22 678 typedef struct { 679 isphdr_t na_header; 680 u_int32_t na_reserved2; 681 u_int8_t na_lun; /* lun */ 682 u_int8_t na_iid; /* initiator */ 683 u_int8_t na_rsvd; 684 u_int8_t na_tgt; /* target */ 685 u_int32_t na_flags; 686 u_int8_t na_status; 687 u_int8_t na_event; 688 u_int16_t na_seqid; /* sequence id */ 689 u_int16_t na_reserved[NA_RSVDLEN]; 690 } na_entry_t; 691 692 /* 693 * Value for the na_event field 694 */ 695 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 696 697 #define NA2_RSVDLEN 21 698 typedef struct { 699 isphdr_t na_header; 700 u_int32_t na_reserved2; 701 u_int8_t na_lun; /* lun */ 702 u_int8_t na_iid; /* initiator */ 703 u_int16_t na_rsvd; 704 u_int16_t na_flags; 705 u_int16_t na_rsvd2; 706 u_int16_t na_status; 707 u_int16_t na_task_flags; 708 u_int16_t na_seqid; /* sequence id */ 709 u_int16_t na_reserved[NA2_RSVDLEN]; 710 } na_fcentry_t; 711 #define NAFC_RST_CLRD 0x40 712 713 /* 714 * Value for the na_event field 715 */ 716 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 717 /* 718 * Accept Target I/O Entry structure 719 */ 720 #define ATIO_CDBLEN 26 721 722 typedef struct { 723 isphdr_t at_header; 724 u_int32_t at_reserved2; 725 u_int8_t at_lun; /* lun */ 726 u_int8_t at_iid; /* initiator */ 727 u_int8_t at_cdblen; /* cdb length */ 728 u_int8_t at_tgt; /* target */ 729 u_int32_t at_flags; 730 u_int8_t at_status; /* firmware status */ 731 u_int8_t at_scsi_status; /* scsi status */ 732 u_int8_t at_tag_val; /* tag value */ 733 u_int8_t at_tag_type; /* tag type */ 734 u_int8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 735 u_int8_t at_sense[SUGGSENSELEN]; /* suggested sense data */ 736 } at_entry_t; 737 738 /* 739 * at_flags values 740 */ 741 #define AT_NODISC 0x00008000 /* disconnect disabled */ 742 #define AT_TQAE 0x00000001 /* Tagged Queue Action enabled */ 743 744 /* 745 * at_status values 746 */ 747 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 748 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 749 #define AT_NOCAP 0x16 /* Requested capability not available */ 750 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 751 #define AT_CDB 0x3D /* CDB received */ 752 753 /* 754 * Accept Target I/O Entry structure, Type 2 755 */ 756 #define ATIO2_CDBLEN 16 757 758 typedef struct { 759 isphdr_t at_header; 760 u_int32_t at_reserved2; 761 u_int8_t at_lun; /* lun */ 762 u_int8_t at_iid; /* initiator */ 763 u_int16_t at_rxid; /* response ID */ 764 u_int16_t at_flags; 765 u_int16_t at_status; /* firmware status */ 766 u_int8_t at_reserved1; 767 u_int8_t at_taskcodes; 768 u_int8_t at_taskflags; 769 u_int8_t at_execodes; 770 u_int8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 771 u_int32_t at_datalen; /* allocated data len */ 772 u_int16_t at_scclun; 773 u_int16_t at_reserved3; 774 u_int16_t at_scsi_status; 775 u_int8_t at_sense[SUGGSENSELEN]; /* suggested sense data */ 776 } at2_entry_t; 777 778 #define ATIO2_TC_ATTR_MASK 0x7 779 #define ATIO2_TC_ATTR_SIMPLEQ 0 780 #define ATIO2_TC_ATTR_HEADOFQ 1 781 #define ATIO2_TC_ATTR_ORDERED 2 782 #define ATIO2_TC_ATTR_ACAQ 4 783 #define ATIO2_TC_ATTR_UNTAGGED 5 784 #define TC2TT(code) \ 785 (((code) == ATIO2_TC_ATTR_SIMPLEQ)? 0x20 : \ 786 (((code) == ATIO2_TC_ATTR_HEADOFQ)? 0x21 : \ 787 (((code) == ATIO2_TC_ATTR_ORDERED)? 0x22 : \ 788 (((code) == ATIO2_TC_ATTR_ACAQ)? 0x24 : 0)))) 789 790 791 /* 792 * Continue Target I/O Entry structure 793 * Request from driver. The response from the 794 * ISP firmware is the same except that the last 18 795 * bytes are overwritten by suggested sense data if 796 * the 'autosense valid' bit is set in the status byte. 797 */ 798 typedef struct { 799 isphdr_t ct_header; 800 u_int32_t ct_reserved; 801 u_int8_t ct_lun; /* lun */ 802 u_int8_t ct_iid; /* initiator id */ 803 u_int8_t ct_rsvd; 804 u_int8_t ct_tgt; /* our target id */ 805 u_int32_t ct_flags; 806 u_int8_t ct_status; /* isp status */ 807 u_int8_t ct_scsi_status; /* scsi status */ 808 u_int8_t ct_tag_val; /* tag value */ 809 u_int8_t ct_tag_type; /* tag type */ 810 u_int32_t ct_xfrlen; /* transfer length */ 811 u_int32_t ct_resid; /* residual length */ 812 u_int16_t ct_timeout; 813 u_int16_t ct_seg_count; 814 ispds_t ct_dataseg[ISP_RQDSEG]; 815 } ct_entry_t; 816 817 /* 818 * ct_flags values 819 */ 820 #define CT_TQAE 0x00000001 /* Tagged Queue Action enable */ 821 #define CT_DATA_IN 0x00000040 /* Data direction */ 822 #define CT_DATA_OUT 0x00000080 /* Data direction */ 823 #define CT_NO_DATA 0x000000C0 /* Data direction */ 824 #define CT_DATAMASK 0x000000C0 /* Data direction */ 825 #define CT_NODISC 0x00008000 /* Disconnects disabled */ 826 #define CT_DSDP 0x01000000 /* Disable Save Data Pointers */ 827 #define CT_SENDRDP 0x04000000 /* Send Restore Pointers msg */ 828 #define CT_SENDSTATUS 0x80000000 /* Send SCSI status byte */ 829 830 /* 831 * ct_status values 832 * - set by the firmware when it returns the CTIO 833 */ 834 #define CT_OK 0x01 /* completed without error */ 835 #define CT_ABORTED 0x02 /* aborted by host */ 836 #define CT_ERR 0x04 /* see sense data for error */ 837 #define CT_INVAL 0x06 /* request for disabled lun */ 838 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 839 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 840 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 841 #define CT_TIMEOUT 0x0B /* timed out */ 842 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 843 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 844 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 845 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 846 #define CT_LOGOUT 0x29 /* port logout not acknowledged yet */ 847 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 848 849 /* 850 * When the firmware returns a CTIO entry, it may overwrite the last 851 * part of the structure with sense data. This starts at offset 0x2E 852 * into the entry, which is in the middle of ct_dataseg[1]. Rather 853 * than define a new struct for this, I'm just using the sense data 854 * offset. 855 */ 856 #define CTIO_SENSE_OFFSET 0x2E 857 858 /* 859 * Entry length in u_longs. All entries are the same size so 860 * any one will do as the numerator. 861 */ 862 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(u_int32_t)) 863 864 /* 865 * QLA2100 CTIO (type 2) entry 866 */ 867 #define MAXRESPLEN 26 868 typedef struct { 869 isphdr_t ct_header; 870 u_int32_t ct_reserved; 871 u_int8_t ct_lun; /* lun */ 872 u_int8_t ct_iid; /* initiator id */ 873 u_int16_t ct_rxid; /* response ID */ 874 u_int16_t ct_flags; 875 u_int16_t ct_status; /* isp status */ 876 u_int16_t ct_timeout; 877 u_int16_t ct_seg_count; 878 u_int32_t ct_reloff; /* relative offset */ 879 u_int32_t ct_resid; /* residual length */ 880 union { 881 /* 882 * The three different modes that the target driver 883 * can set the CTIO2 up as. 884 * 885 * The first is for sending FCP_DATA_IUs as well as 886 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 887 * 888 * The second is for sending SCSI sense data in an FCP_RSP_IU. 889 * Note that no FCP_DATA_IUs will be sent. 890 * 891 * The third is for sending FCP_RSP_IUs as built specifically 892 * in system memory as located by the isp_dataseg. 893 */ 894 struct { 895 u_int32_t _reserved; 896 u_int16_t _reserved2; 897 u_int16_t ct_scsi_status; 898 u_int32_t ct_xfrlen; 899 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 900 } m0; 901 struct { 902 u_int16_t _reserved; 903 u_int16_t _reserved2; 904 u_int16_t ct_senselen; 905 u_int16_t ct_scsi_status; 906 u_int16_t ct_resplen; 907 u_int8_t ct_resp[MAXRESPLEN]; 908 } m1; 909 struct { 910 u_int32_t _reserved; 911 u_int16_t _reserved2; 912 u_int16_t _reserved3; 913 u_int32_t ct_datalen; 914 ispds_t ct_fcp_rsp_iudata; 915 } m2; 916 /* 917 * CTIO2 returned from F/W... 918 */ 919 struct { 920 u_int32_t _reserved[4]; 921 u_int16_t ct_scsi_status; 922 u_int8_t ct_sense[SUGGSENSELEN]; 923 } fw; 924 } rsp; 925 } ct2_entry_t; 926 /* 927 * ct_flags values for CTIO2 928 */ 929 #define CT2_FLAG_MMASK 0x0003 930 #define CT2_FLAG_MODE0 0x0000 931 #define CT2_FLAG_MODE1 0x0001 932 #define CT2_FLAG_MODE2 0x0002 933 #define CT2_DATA_IN CT_DATA_IN 934 #define CT2_DATA_OUT CT_DATA_OUT 935 #define CT2_NO_DATA CT_NO_DATA 936 #define CT2_DATAMASK CT_DATA_MASK 937 #define CT2_CCINCR 0x0100 938 #define CT2_FASTPOST 0x0200 939 #define CT2_SENDSTATUS 0x8000 940 941 /* 942 * ct_status values are (mostly) the same as that for ct_entry. 943 */ 944 945 /* 946 * ct_scsi_status values- the low 8 bits are the normal SCSI status 947 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 948 * fields. 949 */ 950 #define CT2_RSPLEN_VALID 0x0100 951 #define CT2_SNSLEN_VALID 0x0200 952 #define CT2_DATA_OVER 0x0400 953 #define CT2_DATA_UNDER 0x0800 954 955 #endif /* _ISPMBOX_H */ 956
Indexes created Wed Sep 24 05:09:52 GMT 2025