ispmbox.h revision 1.18
1 /* $NetBSD: ispmbox.h,v 1.18 1999/07/05 20:31:36 mjacob Exp $ */ 2 /* release_6_5_99 */ 3 /* 4 * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 32 * <mjacob (at) nas.nasa.gov> 33 */ 34 #ifndef _ISPMBOX_H 35 #define _ISPMBOX_H 36 37 /* 38 * Mailbox Command Opcodes 39 */ 40 41 #define MBOX_NO_OP 0x0000 42 #define MBOX_LOAD_RAM 0x0001 43 #define MBOX_EXEC_FIRMWARE 0x0002 44 #define MBOX_DUMP_RAM 0x0003 45 #define MBOX_WRITE_RAM_WORD 0x0004 46 #define MBOX_READ_RAM_WORD 0x0005 47 #define MBOX_MAILBOX_REG_TEST 0x0006 48 #define MBOX_VERIFY_CHECKSUM 0x0007 49 #define MBOX_ABOUT_FIRMWARE 0x0008 50 /* 9 */ 51 /* a */ 52 /* b */ 53 /* c */ 54 /* d */ 55 #define MBOX_CHECK_FIRMWARE 0x000e 56 /* f */ 57 #define MBOX_INIT_REQ_QUEUE 0x0010 58 #define MBOX_INIT_RES_QUEUE 0x0011 59 #define MBOX_EXECUTE_IOCB 0x0012 60 #define MBOX_WAKE_UP 0x0013 61 #define MBOX_STOP_FIRMWARE 0x0014 62 #define MBOX_ABORT 0x0015 63 #define MBOX_ABORT_DEVICE 0x0016 64 #define MBOX_ABORT_TARGET 0x0017 65 #define MBOX_BUS_RESET 0x0018 66 #define MBOX_STOP_QUEUE 0x0019 67 #define MBOX_START_QUEUE 0x001a 68 #define MBOX_SINGLE_STEP_QUEUE 0x001b 69 #define MBOX_ABORT_QUEUE 0x001c 70 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 71 /* 1e */ 72 #define MBOX_GET_FIRMWARE_STATUS 0x001f 73 #define MBOX_GET_INIT_SCSI_ID 0x0020 74 #define MBOX_GET_SELECT_TIMEOUT 0x0021 75 #define MBOX_GET_RETRY_COUNT 0x0022 76 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 77 #define MBOX_GET_CLOCK_RATE 0x0024 78 #define MBOX_GET_ACT_NEG_STATE 0x0025 79 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 80 #define MBOX_GET_SBUS_PARAMS 0x0027 81 #define MBOX_GET_TARGET_PARAMS 0x0028 82 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 83 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 84 /* 2b */ 85 /* 2c */ 86 /* 2d */ 87 /* 2e */ 88 /* 2f */ 89 #define MBOX_SET_INIT_SCSI_ID 0x0030 90 #define MBOX_SET_SELECT_TIMEOUT 0x0031 91 #define MBOX_SET_RETRY_COUNT 0x0032 92 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 93 #define MBOX_SET_CLOCK_RATE 0x0034 94 #define MBOX_SET_ACT_NEG_STATE 0x0035 95 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 96 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 97 #define MBOX_SET_PCI_PARAMETERS 0x0037 98 #define MBOX_SET_TARGET_PARAMS 0x0038 99 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 100 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 101 /* 3b */ 102 /* 3c */ 103 /* 3d */ 104 /* 3e */ 105 /* 3f */ 106 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 107 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 108 #define MBOX_EXEC_BIOS_IOCB 0x0042 109 #define MBOX_SET_FW_FEATURES 0x004a 110 #define MBOX_GET_FW_FEATURES 0x004b 111 #define FW_FEATURE_LVD_NOTIFY 0x2 112 #define FW_FEATURE_FAST_POST 0x1 113 114 /* These are for the ISP2100 FC cards */ 115 #define MBOX_GET_LOOP_ID 0x20 116 #define MBOX_EXEC_COMMAND_IOCB_A64 0x54 117 #define MBOX_INIT_FIRMWARE 0x60 118 #define MBOX_GET_INIT_CONTROL_BLOCK 0x61 119 #define MBOX_INIT_LIP 0x62 120 #define MBOX_GET_FC_AL_POSITION_MAP 0x63 121 #define MBOX_GET_PORT_DB 0x64 122 #define MBOX_CLEAR_ACA 0x65 123 #define MBOX_TARGET_RESET 0x66 124 #define MBOX_CLEAR_TASK_SET 0x67 125 #define MBOX_ABORT_TASK_SET 0x68 126 #define MBOX_GET_FW_STATE 0x69 127 #define MBOX_GET_PORT_NAME 0x6a 128 #define MBOX_GET_LINK_STATUS 0x6b 129 #define MBOX_INIT_LIP_RESET 0x6c 130 #define MBOX_SEND_SNS 0x6e 131 #define MBOX_FABRIC_LOGIN 0x6f 132 #define MBOX_SEND_CHANGE_REQUEST 0x70 133 #define MBOX_FABRIC_LOGOUT 0x71 134 #define MBOX_INIT_LIP_LOGIN 0x72 135 136 #define ISP2100_SET_PCI_PARAM 0x00ff 137 138 #define MBOX_BUSY 0x04 139 140 typedef struct { 141 u_int16_t param[8]; 142 } mbreg_t; 143 144 /* 145 * Mailbox Command Complete Status Codes 146 */ 147 #define MBOX_COMMAND_COMPLETE 0x4000 148 #define MBOX_INVALID_COMMAND 0x4001 149 #define MBOX_HOST_INTERFACE_ERROR 0x4002 150 #define MBOX_TEST_FAILED 0x4003 151 #define MBOX_COMMAND_ERROR 0x4005 152 #define MBOX_COMMAND_PARAM_ERROR 0x4006 153 154 /* 155 * Asynchronous event status codes 156 */ 157 #define ASYNC_BUS_RESET 0x8001 158 #define ASYNC_SYSTEM_ERROR 0x8002 159 #define ASYNC_RQS_XFER_ERR 0x8003 160 #define ASYNC_RSP_XFER_ERR 0x8004 161 #define ASYNC_QWAKEUP 0x8005 162 #define ASYNC_TIMEOUT_RESET 0x8006 163 #define ASYNC_DEVICE_RESET 0x8007 164 #define ASYNC_EXTMSG_UNDERRUN 0x800A 165 #define ASYNC_SCAM_INT 0x800B 166 #define ASYNC_HUNG_SCSI 0x800C 167 #define ASYNC_KILLED_BUS 0x800D 168 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 169 #define ASYNC_CMD_CMPLT 0x8020 170 #define ASYNC_CTIO_DONE 0x8021 171 172 /* for ISP2100 only */ 173 #define ASYNC_LIP_OCCURRED 0x8010 174 #define ASYNC_LOOP_UP 0x8011 175 #define ASYNC_LOOP_DOWN 0x8012 176 #define ASYNC_LOOP_RESET 0x8013 177 #define ASYNC_PDB_CHANGED 0x8014 178 #define ASYNC_CHANGE_NOTIFY 0x8015 179 180 /* 181 * Command Structure Definitions 182 */ 183 184 typedef struct { 185 u_int32_t ds_base; 186 u_int32_t ds_count; 187 } ispds_t; 188 189 #define _ISP_SWAP8(a, b) { \ 190 u_int8_t tmp; \ 191 tmp = a; \ 192 a = b; \ 193 b = tmp; \ 194 } 195 196 /* 197 * These elements get swizzled around for SBus instances. 198 */ 199 typedef struct { 200 u_int8_t rqs_entry_type; 201 u_int8_t rqs_entry_count; 202 u_int8_t rqs_seqno; 203 u_int8_t rqs_flags; 204 } isphdr_t; 205 /* 206 * There are no (for all intents and purposes) non-sparc SBus machines 207 */ 208 #ifdef __sparc__ 209 #define ISP_SBUSIFY_ISPHDR(isp, hdrp) \ 210 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 211 _ISP_SWAP8((hdrp)->rqs_entry_count, (hdrp)->rqs_entry_type); \ 212 _ISP_SWAP8((hdrp)->rqs_flags, (hdrp)->rqs_seqno); \ 213 } 214 #else 215 #define ISP_SBUSIFY_ISPHDR(a, b) 216 #endif 217 218 /* RQS Flag definitions */ 219 #define RQSFLAG_CONTINUATION 0x01 220 #define RQSFLAG_FULL 0x02 221 #define RQSFLAG_BADHEADER 0x04 222 #define RQSFLAG_BADPACKET 0x08 223 224 /* RQS entry_type definitions */ 225 #define RQSTYPE_REQUEST 0x01 226 #define RQSTYPE_DATASEG 0x02 227 #define RQSTYPE_RESPONSE 0x03 228 #define RQSTYPE_MARKER 0x04 229 #define RQSTYPE_CMDONLY 0x05 230 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 231 #define RQSTYPE_CTIO0 0x07 /* Target Mode */ 232 #define RQSTYPE_SCAM 0x08 233 #define RQSTYPE_A64 0x09 234 #define RQSTYPE_A64_CONT 0x0a 235 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 236 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 237 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 238 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 239 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 240 #define RQSTYPE_STATUS_CONT 0x10 241 #define RQSTYPE_T2RQS 0x11 242 243 #define RQSTYPE_T4RQS 0x15 244 #define RQSTYPE_ATIO2 0x16 245 #define RQSTYPE_CTIO2 0x17 246 #define RQSTYPE_CSET0 0x18 247 #define RQSTYPE_T3RQS 0x19 248 249 #define RQSTYPE_CTIO3 0x1f 250 251 252 #define ISP_RQDSEG 4 253 typedef struct { 254 isphdr_t req_header; 255 u_int32_t req_handle; 256 u_int8_t req_lun_trn; 257 u_int8_t req_target; 258 u_int16_t req_cdblen; 259 #define req_modifier req_cdblen /* marker packet */ 260 u_int16_t req_flags; 261 u_int16_t req_reserved; 262 u_int16_t req_time; 263 u_int16_t req_seg_count; 264 u_int8_t req_cdb[12]; 265 ispds_t req_dataseg[ISP_RQDSEG]; 266 } ispreq_t; 267 268 /* 269 * A request packet can also be a marker packet. 270 */ 271 #define SYNC_DEVICE 0 272 #define SYNC_TARGET 1 273 #define SYNC_ALL 2 274 275 /* 276 * There are no (for all intents and purposes) non-sparc SBus machines 277 */ 278 #ifdef __sparc__ 279 #define ISP_SBUSIFY_ISPREQ(isp, rqp) \ 280 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 281 _ISP_SWAP8((rqp)->req_target, (rqp)->req_lun_trn); \ 282 } 283 #else 284 #define ISP_SBUSIFY_ISPREQ(a, b) 285 #endif 286 287 #define ISP_RQDSEG_T2 3 288 typedef struct { 289 isphdr_t req_header; 290 u_int32_t req_handle; 291 u_int8_t req_lun_trn; 292 u_int8_t req_target; 293 u_int16_t req_scclun; 294 u_int16_t req_flags; 295 u_int16_t _res2; 296 u_int16_t req_time; 297 u_int16_t req_seg_count; 298 u_int32_t req_cdb[4]; 299 u_int32_t req_totalcnt; 300 ispds_t req_dataseg[ISP_RQDSEG_T2]; 301 } ispreqt2_t; 302 303 /* req_flag values */ 304 #define REQFLAG_NODISCON 0x0001 305 #define REQFLAG_HTAG 0x0002 306 #define REQFLAG_OTAG 0x0004 307 #define REQFLAG_STAG 0x0008 308 #define REQFLAG_TARGET_RTN 0x0010 309 310 #define REQFLAG_NODATA 0x0000 311 #define REQFLAG_DATA_IN 0x0020 312 #define REQFLAG_DATA_OUT 0x0040 313 #define REQFLAG_DATA_UNKNOWN 0x0060 314 315 #define REQFLAG_DISARQ 0x0100 316 #define REQFLAG_FRC_ASYNC 0x0200 317 #define REQFLAG_FRC_SYNC 0x0400 318 #define REQFLAG_FRC_WIDE 0x0800 319 #define REQFLAG_NOPARITY 0x1000 320 #define REQFLAG_STOPQ 0x2000 321 #define REQFLAG_XTRASNS 0x4000 322 #define REQFLAG_PRIORITY 0x8000 323 324 typedef struct { 325 isphdr_t req_header; 326 u_int32_t req_handle; 327 u_int8_t req_lun_trn; 328 u_int8_t req_target; 329 u_int16_t req_cdblen; 330 u_int16_t req_flags; 331 u_int16_t _res1; 332 u_int16_t req_time; 333 u_int16_t req_seg_count; 334 u_int8_t req_cdb[44]; 335 } ispextreq_t; 336 337 #define ISP_CDSEG 7 338 typedef struct { 339 isphdr_t req_header; 340 u_int32_t _res1; 341 ispds_t req_dataseg[ISP_CDSEG]; 342 } ispcontreq_t; 343 344 typedef struct { 345 isphdr_t req_header; 346 u_int32_t req_handle; 347 u_int16_t req_scsi_status; 348 u_int16_t req_completion_status; 349 u_int16_t req_state_flags; 350 u_int16_t req_status_flags; 351 u_int16_t req_time; 352 u_int16_t req_sense_len; 353 u_int32_t req_resid; 354 u_int8_t _res1[8]; 355 u_int8_t req_sense_data[32]; 356 } ispstatusreq_t; 357 358 /* 359 * For Qlogic 2100, the high order byte of SCSI status has 360 * additional meaning. 361 */ 362 #define RQCS_RU 0x800 /* Residual Under */ 363 #define RQCS_RO 0x400 /* Residual Over */ 364 #define RQCS_SV 0x200 /* Sense Length Valid */ 365 #define RQCS_RV 0x100 /* Residual Valid */ 366 367 /* 368 * Completion Status Codes. 369 */ 370 #define RQCS_COMPLETE 0x0000 371 #define RQCS_INCOMPLETE 0x0001 372 #define RQCS_DMA_ERROR 0x0002 373 #define RQCS_TRANSPORT_ERROR 0x0003 374 #define RQCS_RESET_OCCURRED 0x0004 375 #define RQCS_ABORTED 0x0005 376 #define RQCS_TIMEOUT 0x0006 377 #define RQCS_DATA_OVERRUN 0x0007 378 #define RQCS_COMMAND_OVERRUN 0x0008 379 #define RQCS_STATUS_OVERRUN 0x0009 380 #define RQCS_BAD_MESSAGE 0x000a 381 #define RQCS_NO_MESSAGE_OUT 0x000b 382 #define RQCS_EXT_ID_FAILED 0x000c 383 #define RQCS_IDE_MSG_FAILED 0x000d 384 #define RQCS_ABORT_MSG_FAILED 0x000e 385 #define RQCS_REJECT_MSG_FAILED 0x000f 386 #define RQCS_NOP_MSG_FAILED 0x0010 387 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 388 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 389 #define RQCS_ID_MSG_FAILED 0x0013 390 #define RQCS_UNEXP_BUS_FREE 0x0014 391 #define RQCS_DATA_UNDERRUN 0x0015 392 #define RQCS_XACT_ERR1 0x0018 393 #define RQCS_XACT_ERR2 0x0019 394 #define RQCS_XACT_ERR3 0x001A 395 #define RQCS_BAD_ENTRY 0x001B 396 #define RQCS_QUEUE_FULL 0x001C 397 #define RQCS_PHASE_SKIPPED 0x001D 398 #define RQCS_ARQS_FAILED 0x001E 399 #define RQCS_WIDE_FAILED 0x001F 400 #define RQCS_SYNCXFER_FAILED 0x0020 401 #define RQCS_LVD_BUSERR 0x0021 402 403 /* 2100 Only Completion Codes */ 404 #define RQCS_PORT_UNAVAILABLE 0x0028 405 #define RQCS_PORT_LOGGED_OUT 0x0029 406 #define RQCS_PORT_CHANGED 0x002A 407 #define RQCS_PORT_BUSY 0x002B 408 409 /* 410 * State Flags (not applicable to 2100) 411 */ 412 #define RQSF_GOT_BUS 0x0100 413 #define RQSF_GOT_TARGET 0x0200 414 #define RQSF_SENT_CDB 0x0400 415 #define RQSF_XFRD_DATA 0x0800 416 #define RQSF_GOT_STATUS 0x1000 417 #define RQSF_GOT_SENSE 0x2000 418 #define RQSF_XFER_COMPLETE 0x4000 419 420 /* 421 * Status Flags (not applicable to 2100) 422 */ 423 #define RQSTF_DISCONNECT 0x0001 424 #define RQSTF_SYNCHRONOUS 0x0002 425 #define RQSTF_PARITY_ERROR 0x0004 426 #define RQSTF_BUS_RESET 0x0008 427 #define RQSTF_DEVICE_RESET 0x0010 428 #define RQSTF_ABORTED 0x0020 429 #define RQSTF_TIMEOUT 0x0040 430 #define RQSTF_NEGOTIATION 0x0080 431 432 /* 433 * FC (ISP2100) specific data structures 434 */ 435 436 /* 437 * Initialization Control Block 438 * 439 * Version One format. 440 */ 441 typedef struct { 442 u_int8_t icb_version; 443 u_int8_t _reserved0; 444 u_int16_t icb_fwoptions; 445 u_int16_t icb_maxfrmlen; 446 u_int16_t icb_maxalloc; 447 u_int16_t icb_execthrottle; 448 u_int8_t icb_retry_count; 449 u_int8_t icb_retry_delay; 450 u_int8_t icb_nodename[8]; 451 u_int16_t icb_hardaddr; 452 u_int8_t icb_iqdevtype; 453 u_int8_t _reserved1; 454 u_int8_t icb_portname[8]; 455 u_int16_t icb_rqstout; 456 u_int16_t icb_rspnsin; 457 u_int16_t icb_rqstqlen; 458 u_int16_t icb_rsltqlen; 459 u_int16_t icb_rqstaddr[4]; 460 u_int16_t icb_respaddr[4]; 461 } isp_icb_t; 462 #define ICB_VERSION1 1 463 464 #define ICBOPT_HARD_ADDRESS 0x0001 465 #define ICBOPT_FAIRNESS 0x0002 466 #define ICBOPT_FULL_DUPLEX 0x0004 467 #define ICBOPT_FAST_POST 0x0008 468 #define ICBOPT_TGT_ENABLE 0x0010 469 #define ICBOPT_INI_DISABLE 0x0020 470 #define ICBOPT_INI_ADISC 0x0040 471 #define ICBOPT_INI_TGTTYPE 0x0080 472 #define ICBOPT_PDBCHANGE_AE 0x0100 473 #define ICBOPT_NOLIP 0x0200 474 #define ICBOPT_SRCHDOWN 0x0400 475 #define ICBOPT_PREVLOOP 0x0800 476 #define ICBOPT_STOP_ON_QFULL 0x1000 477 #define ICBOPT_FULL_LOGIN 0x2000 478 #define ICBOPT_USE_PORTNAME 0x4000 479 480 481 #define ICB_MIN_FRMLEN 256 482 #define ICB_MAX_FRMLEN 2112 483 #define ICB_DFLT_FRMLEN 1024 484 #define ICB_DFLT_ALLOC 256 485 #define ICB_DFLT_THROTTLE 16 486 #define ICB_DFLT_RDELAY 5 487 #define ICB_DFLT_RCOUNT 3 488 489 490 #define RQRSP_ADDR0015 0 491 #define RQRSP_ADDR1631 1 492 #define RQRSP_ADDR3247 2 493 #define RQRSP_ADDR4863 3 494 495 496 #define ICB_NNM0 7 497 #define ICB_NNM1 6 498 #define ICB_NNM2 5 499 #define ICB_NNM3 4 500 #define ICB_NNM4 3 501 #define ICB_NNM5 2 502 #define ICB_NNM6 1 503 #define ICB_NNM7 0 504 505 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 506 array[ICB_NNM0] = (u_int8_t) ((wwn >> 0) & 0xff), \ 507 array[ICB_NNM1] = (u_int8_t) ((wwn >> 8) & 0xff), \ 508 array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \ 509 array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \ 510 array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \ 511 array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \ 512 array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \ 513 array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff) 514 515 /* 516 * Port Data Base Element 517 */ 518 519 typedef struct { 520 u_int16_t pdb_options; 521 u_int8_t pdb_mstate; 522 u_int8_t pdb_sstate; 523 #define BITS2WORD(x) (x)[0] << 16 | (x)[3] << 8 | (x)[2] 524 u_int8_t pdb_hardaddr_bits[4]; 525 u_int8_t pdb_portid_bits[4]; 526 u_int8_t pdb_nodename[8]; 527 u_int8_t pdb_portname[8]; 528 u_int16_t pdb_execthrottle; 529 u_int16_t pdb_exec_count; 530 u_int8_t pdb_retry_count; 531 u_int8_t pdb_retry_delay; 532 u_int16_t pdb_resalloc; 533 u_int16_t pdb_curalloc; 534 u_int16_t pdb_qhead; 535 u_int16_t pdb_qtail; 536 u_int16_t pdb_tl_next; 537 u_int16_t pdb_tl_last; 538 u_int16_t pdb_features; /* PLOGI, Common Service */ 539 u_int16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 540 u_int16_t pdb_roi; /* PLOGI, Common Service */ 541 u_int8_t pdb_target; 542 u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 543 u_int16_t pdb_rdsiz; /* PLOGI, Class 3 */ 544 u_int16_t pdb_ncseq; /* PLOGI, Class 3 */ 545 u_int16_t pdb_noseq; /* PLOGI, Class 3 */ 546 u_int16_t pdb_labrtflg; 547 u_int16_t pdb_lstopflg; 548 u_int16_t pdb_sqhead; 549 u_int16_t pdb_sqtail; 550 u_int16_t pdb_ptimer; 551 u_int16_t pdb_nxt_seqid; 552 u_int16_t pdb_fcount; 553 u_int16_t pdb_prli_len; 554 u_int16_t pdb_prli_svc0; 555 u_int16_t pdb_prli_svc3; 556 u_int16_t pdb_loopid; 557 u_int16_t pdb_il_ptr; 558 u_int16_t pdb_sl_ptr; 559 } isp_pdb_t; 560 561 #define PDB_OPTIONS_XMITTING (1<<11) 562 #define PDB_OPTIONS_LNKXMIT (1<<10) 563 #define PDB_OPTIONS_ABORTED (1<<9) 564 #define PDB_OPTIONS_ADISC (1<<1) 565 566 #define PDB_STATE_DISCOVERY 0 567 #define PDB_STATE_WDISC_ACK 1 568 #define PDB_STATE_PLOGI 2 569 #define PDB_STATE_PLOGI_ACK 3 570 #define PDB_STATE_PRLI 4 571 #define PDB_STATE_PRLI_ACK 5 572 #define PDB_STATE_LOGGED_IN 6 573 #define PDB_STATE_PORT_UNAVAIL 7 574 #define PDB_STATE_PRLO 8 575 #define PDB_STATE_PRLO_ACK 9 576 #define PDB_STATE_PLOGO 10 577 #define PDB_STATE_PLOG_ACK 11 578 579 #define SVC3_TGT_ROLE 0x10 580 #define SVC3_INI_ROLE 0x20 581 #define SVC3_ROLE_MASK 0x30 582 #define SVC3_ROLE_SHIFT 4 583 584 #define SNS_GAN 0x100 585 #define SNS_GP3 0x171 586 typedef struct { 587 u_int16_t snscb_rblen; /* response buffer length (words) */ 588 u_int16_t snscb_res0; 589 u_int16_t snscb_addr[4]; /* response buffer address */ 590 u_int16_t snscb_sblen; /* subcommand buffer length (words) */ 591 u_int16_t snscb_res1; 592 u_int16_t snscb_data[1]; /* variable data */ 593 } sns_screq_t; /* Subcommand Request Structure */ 594 #define SNS_GAN_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 595 #define SNS_GP3_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 596 597 typedef struct { 598 u_int8_t snscb_cthdr[16]; 599 u_int8_t snscb_port_type; 600 u_int8_t snscb_port_id[3]; 601 u_int8_t snscb_portname[8]; 602 u_int16_t snscb_data[1]; /* variable data */ 603 } sns_scrsp_t; /* Subcommand Response Structure */ 604 #define SNS_GAN_RESP_SIZE 608 /* Maximum response size (bytes) */ 605 #define SNS_GP3_RESP_SIZE 532 /* XXX: For 128 ports */ 606 607 /* 608 * Target Mode Structures 609 */ 610 #define TGTSVALID 0x80 /* scsi status & sense data valid */ 611 #define SUGGSENSELEN 18 612 613 /* 614 * Structure for Enable Lun and Modify Lun queue entries 615 */ 616 typedef struct { 617 isphdr_t le_header; 618 u_int32_t le_reserved2; 619 u_int8_t le_lun; 620 u_int8_t le_rsvd; 621 u_int8_t le_ops; /* Modify LUN only */ 622 u_int8_t le_tgt; /* Not for FC */ 623 u_int32_t le_flags; /* Not for FC */ 624 u_int8_t le_status; 625 u_int8_t le_rsvd2; 626 u_int8_t le_cmd_count; 627 u_int8_t le_in_count; 628 u_int8_t le_cdb6len; /* Not for FC */ 629 u_int8_t le_cdb7len; /* Not for FC */ 630 u_int16_t le_timeout; 631 u_int16_t le_reserved[20]; 632 } lun_entry_t; 633 634 /* 635 * le_flags values 636 */ 637 #define LUN_TQAE 0x00000001 /* Tagged Queue Action Enable */ 638 #define LUN_DSSM 0x01000000 /* Disable Sending SDP Message */ 639 #define LUN_DM 0x40000000 /* Disconnects Mandatory */ 640 641 /* 642 * le_ops values 643 */ 644 #define LUN_CCINCR 0x01 /* increment command count */ 645 #define LUN_CCDECR 0x02 /* decrement command count */ 646 #define LUN_ININCR 0x40 /* increment immed. notify count */ 647 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 648 649 /* 650 * le_status values 651 */ 652 #define LUN_ERR 0x04 /* request completed with error */ 653 #define LUN_INVAL 0x06 /* invalid request */ 654 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 655 #define LUN_ENABLED 0x3E /* LUN already enabled */ 656 657 /* 658 * Immediate Notify Entry structure 659 */ 660 #define IN_MSGLEN 8 /* 8 bytes */ 661 #define IN_RSVDLEN 8 /* 8 words */ 662 typedef struct { 663 isphdr_t in_header; 664 u_int32_t in_reserved2; 665 u_int8_t in_lun; /* lun */ 666 u_int8_t in_iid; /* initiator */ 667 u_int8_t in_rsvd; 668 u_int8_t in_tgt; /* target */ 669 u_int32_t in_flags; 670 u_int8_t in_status; 671 u_int8_t in_rsvd2; 672 u_int8_t in_tag_val; /* tag value */ 673 u_int8_t in_tag_type; /* tag type */ 674 u_int16_t in_seqid; /* sequence id */ 675 u_int8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 676 u_int16_t in_reserved[IN_RSVDLEN]; 677 u_int8_t in_sense[SUGGSENSELEN]; /* suggested sense data */ 678 } in_entry_t; 679 680 typedef struct { 681 isphdr_t in_header; 682 u_int32_t in_reserved2; 683 u_int8_t in_lun; /* lun */ 684 u_int8_t in_iid; /* initiator */ 685 u_int16_t in_rsvd; 686 u_int32_t in_rsvd2; 687 u_int16_t in_status; 688 u_int16_t in_task_flags; 689 u_int16_t in_seqid; /* sequence id */ 690 } in_fcentry_t; 691 692 /* 693 * Values for the in_status field 694 */ 695 #define IN_NO_RCAP 0x16 /* requested capability not available */ 696 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 697 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 698 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 699 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 700 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 701 702 /* 703 * Notify Acknowledge Entry structure 704 */ 705 #define NA_RSVDLEN 22 706 typedef struct { 707 isphdr_t na_header; 708 u_int32_t na_reserved2; 709 u_int8_t na_lun; /* lun */ 710 u_int8_t na_iid; /* initiator */ 711 u_int8_t na_rsvd; 712 u_int8_t na_tgt; /* target */ 713 u_int32_t na_flags; 714 u_int8_t na_status; 715 u_int8_t na_event; 716 u_int16_t na_seqid; /* sequence id */ 717 u_int16_t na_reserved[NA_RSVDLEN]; 718 } na_entry_t; 719 720 /* 721 * Value for the na_event field 722 */ 723 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 724 725 #define NA2_RSVDLEN 21 726 typedef struct { 727 isphdr_t na_header; 728 u_int32_t na_reserved2; 729 u_int8_t na_lun; /* lun */ 730 u_int8_t na_iid; /* initiator */ 731 u_int16_t na_rsvd; 732 u_int16_t na_flags; 733 u_int16_t na_rsvd2; 734 u_int16_t na_status; 735 u_int16_t na_task_flags; 736 u_int16_t na_seqid; /* sequence id */ 737 u_int16_t na_reserved[NA2_RSVDLEN]; 738 } na_fcentry_t; 739 #define NAFC_RST_CLRD 0x40 740 741 /* 742 * Value for the na_event field 743 */ 744 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 745 /* 746 * Accept Target I/O Entry structure 747 */ 748 #define ATIO_CDBLEN 26 749 750 typedef struct { 751 isphdr_t at_header; 752 u_int32_t at_reserved2; 753 u_int8_t at_lun; /* lun */ 754 u_int8_t at_iid; /* initiator */ 755 u_int8_t at_cdblen; /* cdb length */ 756 u_int8_t at_tgt; /* target */ 757 u_int32_t at_flags; 758 u_int8_t at_status; /* firmware status */ 759 u_int8_t at_scsi_status; /* scsi status */ 760 u_int8_t at_tag_val; /* tag value */ 761 u_int8_t at_tag_type; /* tag type */ 762 u_int8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 763 u_int8_t at_sense[SUGGSENSELEN]; /* suggested sense data */ 764 } at_entry_t; 765 766 /* 767 * at_flags values 768 */ 769 #define AT_NODISC 0x00008000 /* disconnect disabled */ 770 #define AT_TQAE 0x00000001 /* Tagged Queue Action enabled */ 771 772 /* 773 * at_status values 774 */ 775 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 776 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 777 #define AT_NOCAP 0x16 /* Requested capability not available */ 778 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 779 #define AT_CDB 0x3D /* CDB received */ 780 781 /* 782 * Accept Target I/O Entry structure, Type 2 783 */ 784 #define ATIO2_CDBLEN 16 785 786 typedef struct { 787 isphdr_t at_header; 788 u_int32_t at_reserved2; 789 u_int8_t at_lun; /* lun */ 790 u_int8_t at_iid; /* initiator */ 791 u_int16_t at_rxid; /* response ID */ 792 u_int16_t at_flags; 793 u_int16_t at_status; /* firmware status */ 794 u_int8_t at_reserved1; 795 u_int8_t at_taskcodes; 796 u_int8_t at_taskflags; 797 u_int8_t at_execodes; 798 u_int8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 799 u_int32_t at_datalen; /* allocated data len */ 800 u_int16_t at_scclun; 801 u_int16_t at_reserved3; 802 u_int16_t at_scsi_status; 803 u_int8_t at_sense[SUGGSENSELEN]; /* suggested sense data */ 804 } at2_entry_t; 805 806 #define ATIO2_TC_ATTR_MASK 0x7 807 #define ATIO2_TC_ATTR_SIMPLEQ 0 808 #define ATIO2_TC_ATTR_HEADOFQ 1 809 #define ATIO2_TC_ATTR_ORDERED 2 810 #define ATIO2_TC_ATTR_ACAQ 4 811 #define ATIO2_TC_ATTR_UNTAGGED 5 812 #define TC2TT(code) \ 813 (((code) == ATIO2_TC_ATTR_SIMPLEQ)? 0x20 : \ 814 (((code) == ATIO2_TC_ATTR_HEADOFQ)? 0x21 : \ 815 (((code) == ATIO2_TC_ATTR_ORDERED)? 0x22 : \ 816 (((code) == ATIO2_TC_ATTR_ACAQ)? 0x24 : 0)))) 817 818 819 /* 820 * Continue Target I/O Entry structure 821 * Request from driver. The response from the 822 * ISP firmware is the same except that the last 18 823 * bytes are overwritten by suggested sense data if 824 * the 'autosense valid' bit is set in the status byte. 825 */ 826 typedef struct { 827 isphdr_t ct_header; 828 u_int32_t ct_reserved; 829 u_int8_t ct_lun; /* lun */ 830 u_int8_t ct_iid; /* initiator id */ 831 u_int8_t ct_rsvd; 832 u_int8_t ct_tgt; /* our target id */ 833 u_int32_t ct_flags; 834 u_int8_t ct_status; /* isp status */ 835 u_int8_t ct_scsi_status; /* scsi status */ 836 u_int8_t ct_tag_val; /* tag value */ 837 u_int8_t ct_tag_type; /* tag type */ 838 u_int32_t ct_xfrlen; /* transfer length */ 839 u_int32_t ct_resid; /* residual length */ 840 u_int16_t ct_timeout; 841 u_int16_t ct_seg_count; 842 ispds_t ct_dataseg[ISP_RQDSEG]; 843 } ct_entry_t; 844 845 /* 846 * ct_flags values 847 */ 848 #define CT_TQAE 0x00000001 /* Tagged Queue Action enable */ 849 #define CT_DATA_IN 0x00000040 /* Data direction */ 850 #define CT_DATA_OUT 0x00000080 /* Data direction */ 851 #define CT_NO_DATA 0x000000C0 /* Data direction */ 852 #define CT_DATAMASK 0x000000C0 /* Data direction */ 853 #define CT_NODISC 0x00008000 /* Disconnects disabled */ 854 #define CT_DSDP 0x01000000 /* Disable Save Data Pointers */ 855 #define CT_SENDRDP 0x04000000 /* Send Restore Pointers msg */ 856 #define CT_SENDSTATUS 0x80000000 /* Send SCSI status byte */ 857 858 /* 859 * ct_status values 860 * - set by the firmware when it returns the CTIO 861 */ 862 #define CT_OK 0x01 /* completed without error */ 863 #define CT_ABORTED 0x02 /* aborted by host */ 864 #define CT_ERR 0x04 /* see sense data for error */ 865 #define CT_INVAL 0x06 /* request for disabled lun */ 866 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 867 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 868 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 869 #define CT_TIMEOUT 0x0B /* timed out */ 870 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 871 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 872 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 873 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 874 #define CT_LOGOUT 0x29 /* port logout not acknowledged yet */ 875 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 876 877 /* 878 * When the firmware returns a CTIO entry, it may overwrite the last 879 * part of the structure with sense data. This starts at offset 0x2E 880 * into the entry, which is in the middle of ct_dataseg[1]. Rather 881 * than define a new struct for this, I'm just using the sense data 882 * offset. 883 */ 884 #define CTIO_SENSE_OFFSET 0x2E 885 886 /* 887 * Entry length in u_longs. All entries are the same size so 888 * any one will do as the numerator. 889 */ 890 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(u_int32_t)) 891 892 /* 893 * QLA2100 CTIO (type 2) entry 894 */ 895 #define MAXRESPLEN 26 896 typedef struct { 897 isphdr_t ct_header; 898 u_int32_t ct_reserved; 899 u_int8_t ct_lun; /* lun */ 900 u_int8_t ct_iid; /* initiator id */ 901 u_int16_t ct_rxid; /* response ID */ 902 u_int16_t ct_flags; 903 u_int16_t ct_status; /* isp status */ 904 u_int16_t ct_timeout; 905 u_int16_t ct_seg_count; 906 u_int32_t ct_reloff; /* relative offset */ 907 u_int32_t ct_resid; /* residual length */ 908 union { 909 /* 910 * The three different modes that the target driver 911 * can set the CTIO2 up as. 912 * 913 * The first is for sending FCP_DATA_IUs as well as 914 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 915 * 916 * The second is for sending SCSI sense data in an FCP_RSP_IU. 917 * Note that no FCP_DATA_IUs will be sent. 918 * 919 * The third is for sending FCP_RSP_IUs as built specifically 920 * in system memory as located by the isp_dataseg. 921 */ 922 struct { 923 u_int32_t _reserved; 924 u_int16_t _reserved2; 925 u_int16_t ct_scsi_status; 926 u_int32_t ct_xfrlen; 927 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 928 } m0; 929 struct { 930 u_int16_t _reserved; 931 u_int16_t _reserved2; 932 u_int16_t ct_senselen; 933 u_int16_t ct_scsi_status; 934 u_int16_t ct_resplen; 935 u_int8_t ct_resp[MAXRESPLEN]; 936 } m1; 937 struct { 938 u_int32_t _reserved; 939 u_int16_t _reserved2; 940 u_int16_t _reserved3; 941 u_int32_t ct_datalen; 942 ispds_t ct_fcp_rsp_iudata; 943 } m2; 944 /* 945 * CTIO2 returned from F/W... 946 */ 947 struct { 948 u_int32_t _reserved[4]; 949 u_int16_t ct_scsi_status; 950 u_int8_t ct_sense[SUGGSENSELEN]; 951 } fw; 952 } rsp; 953 } ct2_entry_t; 954 /* 955 * ct_flags values for CTIO2 956 */ 957 #define CT2_FLAG_MMASK 0x0003 958 #define CT2_FLAG_MODE0 0x0000 959 #define CT2_FLAG_MODE1 0x0001 960 #define CT2_FLAG_MODE2 0x0002 961 #define CT2_DATA_IN CT_DATA_IN 962 #define CT2_DATA_OUT CT_DATA_OUT 963 #define CT2_NO_DATA CT_NO_DATA 964 #define CT2_DATAMASK CT_DATA_MASK 965 #define CT2_CCINCR 0x0100 966 #define CT2_FASTPOST 0x0200 967 #define CT2_SENDSTATUS 0x8000 968 969 /* 970 * ct_status values are (mostly) the same as that for ct_entry. 971 */ 972 973 /* 974 * ct_scsi_status values- the low 8 bits are the normal SCSI status 975 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 976 * fields. 977 */ 978 #define CT2_RSPLEN_VALID 0x0100 979 #define CT2_SNSLEN_VALID 0x0200 980 #define CT2_DATA_OVER 0x0400 981 #define CT2_DATA_UNDER 0x0800 982 983 #endif /* _ISPMBOX_H */ 984
Indexes created Fri Sep 26 08:10:20 GMT 2025