ispmbox.h revision 1.2
1 /* $NetBSD: ispmbox.h,v 1.2 1997/03/12 21:06:57 cgd Exp $ */ 2 3 /* 4 * Mailbox and Command Definitions for for Qlogic ISP SCSI adapters. 5 * 6 * Copyright (c) 1997 by Matthew Jacob 7 * NASA/Ames Research Center 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice immediately at the beginning of the file, without modification, 15 * this list of conditions, and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 #ifndef _ISPMBOX_H 36 #define _ISPMBOX_H 37 38 /* 39 * Mailbox Command Opcodes 40 */ 41 42 #define MBOX_NO_OP 0x0000 43 #define MBOX_LOAD_RAM 0x0001 44 #define MBOX_EXEC_FIRMWARE 0x0002 45 #define MBOX_DUMP_RAM 0x0003 46 #define MBOX_WRITE_RAM_WORD 0x0004 47 #define MBOX_READ_RAM_WORD 0x0005 48 #define MBOX_MAILBOX_REG_TEST 0x0006 49 #define MBOX_VERIFY_CHECKSUM 0x0007 50 #define MBOX_ABOUT_FIRMWARE 0x0008 51 /* 9 */ 52 /* a */ 53 /* b */ 54 /* c */ 55 /* d */ 56 #define MBOX_CHECK_FIRMWARE 0x000e 57 /* f */ 58 #define MBOX_INIT_REQ_QUEUE 0x0010 59 #define MBOX_INIT_RES_QUEUE 0x0011 60 #define MBOX_EXECUTE_IOCB 0x0012 61 #define MBOX_WAKE_UP 0x0013 62 #define MBOX_STOP_FIRMWARE 0x0014 63 #define MBOX_ABORT 0x0015 64 #define MBOX_ABORT_DEVICE 0x0016 65 #define MBOX_ABORT_TARGET 0x0017 66 #define MBOX_BUS_RESET 0x0018 67 #define MBOX_STOP_QUEUE 0x0019 68 #define MBOX_START_QUEUE 0x001a 69 #define MBOX_SINGLE_STEP_QUEUE 0x001b 70 #define MBOX_ABORT_QUEUE 0x001c 71 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 72 /* 1e */ 73 #define MBOX_GET_FIRMWARE_STATUS 0x001f 74 #define MBOX_GET_INIT_SCSI_ID 0x0020 75 #define MBOX_GET_SELECT_TIMEOUT 0x0021 76 #define MBOX_GET_RETRY_COUNT 0x0022 77 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 78 #define MBOX_GET_CLOCK_RATE 0x0024 79 #define MBOX_GET_ACT_NEG_STATE 0x0025 80 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 81 #define MBOX_GET_SBUS_PARAMS 0x0027 82 #define MBOX_GET_TARGET_PARAMS 0x0028 83 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 84 /* 2a */ 85 /* 2b */ 86 /* 2c */ 87 /* 2d */ 88 /* 2e */ 89 /* 2f */ 90 #define MBOX_SET_INIT_SCSI_ID 0x0030 91 #define MBOX_SET_SELECT_TIMEOUT 0x0031 92 #define MBOX_SET_RETRY_COUNT 0x0032 93 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 94 #define MBOX_SET_CLOCK_RATE 0x0034 95 #define MBOX_SET_ACTIVE_NEG_STATE 0x0035 96 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 97 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 98 #define MBOX_SET_TARGET_PARAMS 0x0038 99 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 100 /* 3a */ 101 /* 3b */ 102 /* 3c */ 103 /* 3d */ 104 /* 3e */ 105 /* 3f */ 106 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 107 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 108 #define MBOX_EXEC_BIOS_IOCB 0x0042 109 110 #define MBOX_BUSY 0x04 111 112 typedef struct { 113 u_int16_t param[6]; 114 } mbreg_t; 115 116 /* 117 * Command Structure Definitions 118 */ 119 120 typedef struct { 121 u_int32_t ds_base; 122 u_int32_t ds_count; 123 } ispds_t; 124 125 typedef struct { 126 #if BYTE_ORDER == BIG_ENDIAN 127 u_int8_t rqs_entry_count; 128 u_int8_t rqs_entry_type; 129 u_int8_t rqs_flags; 130 u_int8_t rqs_seqno; 131 #else 132 u_int8_t rqs_entry_type; 133 u_int8_t rqs_entry_count; 134 u_int8_t rqs_seqno; 135 u_int8_t rqs_flags; 136 #endif 137 } isphdr_t; 138 139 /* RQS Flag definitions */ 140 #define RQSFLAG_CONTINUATION 0x01 141 #define RQSFLAG_FULL 0x02 142 #define RQSFLAG_BADHEADER 0x04 143 #define RQSFLAG_BADPACKET 0x08 144 /* RQS entry_type definitions */ 145 #define RQSTYPE_REQUEST 1 146 #define RQSTYPE_DATASEG 2 147 #define RQSTYPE_RESPONSE 3 148 #define RQSTYPE_MARKER 4 149 #define RQSTYPE_CMDONLY 5 150 151 152 #define ISP_RQDSEG 4 153 typedef struct { 154 isphdr_t req_header; 155 u_int32_t req_handle; 156 #if BYTE_ORDER == BIG_ENDIAN 157 u_int8_t req_target; 158 u_int8_t req_lun_trn; 159 #else 160 u_int8_t req_lun_trn; 161 u_int8_t req_target; 162 #endif 163 u_int16_t req_cdblen; 164 #define req_modifier req_cdblen /* marker packet */ 165 u_int16_t req_flags; 166 u_int16_t _res1; 167 u_int16_t req_time; 168 u_int16_t req_seg_count; 169 u_int8_t req_cdb[12]; 170 ispds_t req_dataseg[ISP_RQDSEG]; 171 } ispreq_t; 172 173 /* req_flag values */ 174 #define REQFLAG_NODISCON 0x0001 175 #define REQFLAG_HTAG 0x0002 176 #define REQFLAG_OTAG 0x0004 177 #define REQFLAG_STAG 0x0008 178 #define REQFLAG_TARGET_RTN 0x0010 179 180 #define REQFLAG_NODATA 0x0000 181 #define REQFLAG_DATA_IN 0x0020 182 #define REQFLAG_DATA_OUT 0x0040 183 #define REQFLAG_DATA_UNKNOWN 0x0060 184 185 #define REQFLAG_DISARQ 0x0100 186 187 typedef struct { 188 isphdr_t req_header; 189 u_int32_t req_handle; 190 #if BYTE_ORDER == BIG_ENDIAN 191 u_int8_t req_target; 192 u_int8_t req_lun_trn; 193 #else 194 u_int8_t req_lun_trn; 195 u_int8_t req_target; 196 #endif 197 u_int16_t req_cdblen; 198 u_int16_t req_flags; 199 u_int16_t _res1; 200 u_int16_t req_time; 201 u_int16_t req_seg_count; 202 u_int8_t req_cdb[44]; 203 } ispextreq_t; 204 205 #define ISP_CDSEG 7 206 typedef struct { 207 isphdr_t req_header; 208 u_int32_t _res1; 209 ispds_t req_dataseg[ISP_CDSEG]; 210 } ispcontreq_t; 211 212 typedef struct { 213 isphdr_t req_header; 214 u_int32_t _res1; 215 #if BYTE_ORDER == BIG_ENDIAN 216 u_int8_t req_target; 217 u_int8_t req_lun_trn; 218 u_int8_t _res2; 219 u_int8_t req_modifier; 220 #else 221 u_int8_t req_lun_trn; 222 u_int8_t req_target; 223 u_int8_t req_modifier; 224 u_int8_t _res2; 225 #endif 226 } ipsmarkreq_t; 227 228 #define SYNC_DEVICE 0 229 #define SYNC_TARGET 1 230 #define SYNC_ALL 2 231 232 typedef struct { 233 isphdr_t req_header; 234 u_int32_t req_handle; 235 u_int16_t req_scsi_status; 236 u_int16_t req_completion_status; 237 u_int16_t req_state_flags; 238 u_int16_t req_status_flags; 239 u_int16_t req_time; 240 u_int16_t req_sense_len; 241 u_int32_t req_resid; 242 u_int8_t _res1[8]; 243 u_int8_t req_sense_data[32]; 244 } ispstatusreq_t; 245 246 #define RQCS_COMPLETE 0x0000 247 #define RQCS_INCOMPLETE 0x0001 248 #define RQCS_DMA_ERROR 0x0002 249 #define RQCS_TRANSPORT_ERROR 0x0003 250 #define RQCS_RESET_OCCURRED 0x0004 251 #define RQCS_ABORTED 0x0005 252 #define RQCS_TIMEOUT 0x0006 253 #define RQCS_DATA_OVERRUN 0x0007 254 #define RQCS_COMMAND_OVERRUN 0x0008 255 #define RQCS_STATUS_OVERRUN 0x0009 256 #define RQCS_BAD_MESSAGE 0x000a 257 #define RQCS_NO_MESSAGE_OUT 0x000b 258 #define RQCS_EXT_ID_FAILED 0x000c 259 #define RQCS_IDE_MSG_FAILED 0x000d 260 #define RQCS_ABORT_MSG_FAILED 0x000e 261 #define RQCS_REJECT_MSG_FAILED 0x000f 262 #define RQCS_NOP_MSG_FAILED 0x0010 263 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 264 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 265 #define RQCS_ID_MSG_FAILED 0x0013 266 #define RQCS_UNEXP_BUS_FREE 0x0014 267 #define RQCS_DATA_UNDERRUN 0x0015 268 269 270 #define RQSF_GOT_BUS 0x0100 271 #define RQSF_GOT_TARGET 0x0200 272 #define RQSF_SENT_CDB 0x0400 273 #define RQSF_TRANFERRED_DATA 0x0800 274 #define RQSF_GOT_STATUS 0x1000 275 #define RQSF_GOT_SENSE 0x2000 276 277 #define RQSTF_DISCONNECT 0x0001 278 #define RQSTF_SYNCHRONOUS 0x0002 279 #define RQSTF_PARITY_ERROR 0x0004 280 #define RQSTF_BUS_RESET 0x0008 281 #define RQSTF_DEVICE_RESET 0x0010 282 #define RQSTF_ABORTED 0x0020 283 #define RQSTF_TIMEOUT 0x0040 284 #define RQSTF_NEGOTIATION 0x0080 285 286 #endif /* _ISPMBOX_H */ 287
Indexes created Thu Sep 25 16:09:42 GMT 2025