ispmbox.h revision 1.20
1 /* $NetBSD: ispmbox.h,v 1.20 2000/01/06 02:59:43 mjacob Exp $ */ 2 /* 3 * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* 30 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 31 * <mjacob (at) nas.nasa.gov> 32 */ 33 #ifndef _ISPMBOX_H 34 #define _ISPMBOX_H 35 36 /* 37 * Mailbox Command Opcodes 38 */ 39 40 #define MBOX_NO_OP 0x0000 41 #define MBOX_LOAD_RAM 0x0001 42 #define MBOX_EXEC_FIRMWARE 0x0002 43 #define MBOX_DUMP_RAM 0x0003 44 #define MBOX_WRITE_RAM_WORD 0x0004 45 #define MBOX_READ_RAM_WORD 0x0005 46 #define MBOX_MAILBOX_REG_TEST 0x0006 47 #define MBOX_VERIFY_CHECKSUM 0x0007 48 #define MBOX_ABOUT_FIRMWARE 0x0008 49 /* 9 */ 50 /* a */ 51 /* b */ 52 /* c */ 53 /* d */ 54 #define MBOX_CHECK_FIRMWARE 0x000e 55 /* f */ 56 #define MBOX_INIT_REQ_QUEUE 0x0010 57 #define MBOX_INIT_RES_QUEUE 0x0011 58 #define MBOX_EXECUTE_IOCB 0x0012 59 #define MBOX_WAKE_UP 0x0013 60 #define MBOX_STOP_FIRMWARE 0x0014 61 #define MBOX_ABORT 0x0015 62 #define MBOX_ABORT_DEVICE 0x0016 63 #define MBOX_ABORT_TARGET 0x0017 64 #define MBOX_BUS_RESET 0x0018 65 #define MBOX_STOP_QUEUE 0x0019 66 #define MBOX_START_QUEUE 0x001a 67 #define MBOX_SINGLE_STEP_QUEUE 0x001b 68 #define MBOX_ABORT_QUEUE 0x001c 69 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 70 /* 1e */ 71 #define MBOX_GET_FIRMWARE_STATUS 0x001f 72 #define MBOX_GET_INIT_SCSI_ID 0x0020 73 #define MBOX_GET_SELECT_TIMEOUT 0x0021 74 #define MBOX_GET_RETRY_COUNT 0x0022 75 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 76 #define MBOX_GET_CLOCK_RATE 0x0024 77 #define MBOX_GET_ACT_NEG_STATE 0x0025 78 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 79 #define MBOX_GET_SBUS_PARAMS 0x0027 80 #define MBOX_GET_TARGET_PARAMS 0x0028 81 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 82 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 83 /* 2b */ 84 /* 2c */ 85 /* 2d */ 86 /* 2e */ 87 /* 2f */ 88 #define MBOX_SET_INIT_SCSI_ID 0x0030 89 #define MBOX_SET_SELECT_TIMEOUT 0x0031 90 #define MBOX_SET_RETRY_COUNT 0x0032 91 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 92 #define MBOX_SET_CLOCK_RATE 0x0034 93 #define MBOX_SET_ACT_NEG_STATE 0x0035 94 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 95 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 96 #define MBOX_SET_PCI_PARAMETERS 0x0037 97 #define MBOX_SET_TARGET_PARAMS 0x0038 98 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 99 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 100 /* 3b */ 101 /* 3c */ 102 /* 3d */ 103 /* 3e */ 104 /* 3f */ 105 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 106 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 107 #define MBOX_EXEC_BIOS_IOCB 0x0042 108 #define MBOX_SET_FW_FEATURES 0x004a 109 #define MBOX_GET_FW_FEATURES 0x004b 110 #define FW_FEATURE_LVD_NOTIFY 0x2 111 #define FW_FEATURE_FAST_POST 0x1 112 113 #define MBOX_ENABLE_TARGET_MODE 0x55 114 #define ENABLE_TARGET_FLAG 0x8000 115 116 /* These are for the ISP2100 FC cards */ 117 #define MBOX_GET_LOOP_ID 0x20 118 #define MBOX_EXEC_COMMAND_IOCB_A64 0x54 119 #define MBOX_INIT_FIRMWARE 0x60 120 #define MBOX_GET_INIT_CONTROL_BLOCK 0x61 121 #define MBOX_INIT_LIP 0x62 122 #define MBOX_GET_FC_AL_POSITION_MAP 0x63 123 #define MBOX_GET_PORT_DB 0x64 124 #define MBOX_CLEAR_ACA 0x65 125 #define MBOX_TARGET_RESET 0x66 126 #define MBOX_CLEAR_TASK_SET 0x67 127 #define MBOX_ABORT_TASK_SET 0x68 128 #define MBOX_GET_FW_STATE 0x69 129 #define MBOX_GET_PORT_NAME 0x6a 130 #define MBOX_GET_LINK_STATUS 0x6b 131 #define MBOX_INIT_LIP_RESET 0x6c 132 #define MBOX_SEND_SNS 0x6e 133 #define MBOX_FABRIC_LOGIN 0x6f 134 #define MBOX_SEND_CHANGE_REQUEST 0x70 135 #define MBOX_FABRIC_LOGOUT 0x71 136 #define MBOX_INIT_LIP_LOGIN 0x72 137 138 #define ISP2100_SET_PCI_PARAM 0x00ff 139 140 #define MBOX_BUSY 0x04 141 142 typedef struct { 143 u_int16_t param[8]; 144 } mbreg_t; 145 146 /* 147 * Mailbox Command Complete Status Codes 148 */ 149 #define MBOX_COMMAND_COMPLETE 0x4000 150 #define MBOX_INVALID_COMMAND 0x4001 151 #define MBOX_HOST_INTERFACE_ERROR 0x4002 152 #define MBOX_TEST_FAILED 0x4003 153 #define MBOX_COMMAND_ERROR 0x4005 154 #define MBOX_COMMAND_PARAM_ERROR 0x4006 155 156 /* 157 * Asynchronous event status codes 158 */ 159 #define ASYNC_BUS_RESET 0x8001 160 #define ASYNC_SYSTEM_ERROR 0x8002 161 #define ASYNC_RQS_XFER_ERR 0x8003 162 #define ASYNC_RSP_XFER_ERR 0x8004 163 #define ASYNC_QWAKEUP 0x8005 164 #define ASYNC_TIMEOUT_RESET 0x8006 165 #define ASYNC_DEVICE_RESET 0x8007 166 #define ASYNC_EXTMSG_UNDERRUN 0x800A 167 #define ASYNC_SCAM_INT 0x800B 168 #define ASYNC_HUNG_SCSI 0x800C 169 #define ASYNC_KILLED_BUS 0x800D 170 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 171 #define ASYNC_CMD_CMPLT 0x8020 172 #define ASYNC_CTIO_DONE 0x8021 173 174 /* for ISP2100 only */ 175 #define ASYNC_LIP_OCCURRED 0x8010 176 #define ASYNC_LOOP_UP 0x8011 177 #define ASYNC_LOOP_DOWN 0x8012 178 #define ASYNC_LOOP_RESET 0x8013 179 #define ASYNC_PDB_CHANGED 0x8014 180 #define ASYNC_CHANGE_NOTIFY 0x8015 181 182 /* 183 * Command Structure Definitions 184 */ 185 186 typedef struct { 187 u_int32_t ds_base; 188 u_int32_t ds_count; 189 } ispds_t; 190 191 #define _ISP_SWAP8(a, b) { \ 192 u_int8_t tmp; \ 193 tmp = a; \ 194 a = b; \ 195 b = tmp; \ 196 } 197 198 /* 199 * These elements get swizzled around for SBus instances. 200 */ 201 typedef struct { 202 u_int8_t rqs_entry_type; 203 u_int8_t rqs_entry_count; 204 u_int8_t rqs_seqno; 205 u_int8_t rqs_flags; 206 } isphdr_t; 207 /* 208 * There are no (for all intents and purposes) non-sparc SBus machines 209 */ 210 #ifdef __sparc__ 211 #define ISP_SBUSIFY_ISPHDR(isp, hdrp) \ 212 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 213 _ISP_SWAP8((hdrp)->rqs_entry_count, (hdrp)->rqs_entry_type); \ 214 _ISP_SWAP8((hdrp)->rqs_flags, (hdrp)->rqs_seqno); \ 215 } 216 #else 217 #define ISP_SBUSIFY_ISPHDR(a, b) 218 #endif 219 220 /* RQS Flag definitions */ 221 #define RQSFLAG_CONTINUATION 0x01 222 #define RQSFLAG_FULL 0x02 223 #define RQSFLAG_BADHEADER 0x04 224 #define RQSFLAG_BADPACKET 0x08 225 226 /* RQS entry_type definitions */ 227 #define RQSTYPE_REQUEST 0x01 228 #define RQSTYPE_DATASEG 0x02 229 #define RQSTYPE_RESPONSE 0x03 230 #define RQSTYPE_MARKER 0x04 231 #define RQSTYPE_CMDONLY 0x05 232 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 233 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 234 #define RQSTYPE_SCAM 0x08 235 #define RQSTYPE_A64 0x09 236 #define RQSTYPE_A64_CONT 0x0a 237 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 238 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 239 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 240 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 241 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 242 #define RQSTYPE_STATUS_CONT 0x10 243 #define RQSTYPE_T2RQS 0x11 244 245 #define RQSTYPE_T4RQS 0x15 246 #define RQSTYPE_ATIO2 0x16 247 #define RQSTYPE_CTIO2 0x17 248 #define RQSTYPE_CSET0 0x18 249 #define RQSTYPE_T3RQS 0x19 250 251 #define RQSTYPE_CTIO3 0x1f 252 253 254 #define ISP_RQDSEG 4 255 typedef struct { 256 isphdr_t req_header; 257 u_int32_t req_handle; 258 u_int8_t req_lun_trn; 259 u_int8_t req_target; 260 u_int16_t req_cdblen; 261 #define req_modifier req_cdblen /* marker packet */ 262 u_int16_t req_flags; 263 u_int16_t req_reserved; 264 u_int16_t req_time; 265 u_int16_t req_seg_count; 266 u_int8_t req_cdb[12]; 267 ispds_t req_dataseg[ISP_RQDSEG]; 268 } ispreq_t; 269 270 /* 271 * A request packet can also be a marker packet. 272 */ 273 #define SYNC_DEVICE 0 274 #define SYNC_TARGET 1 275 #define SYNC_ALL 2 276 277 /* 278 * There are no (for all intents and purposes) non-sparc SBus machines 279 */ 280 #ifdef __sparc__ 281 #define ISP_SBUSIFY_ISPREQ(isp, rqp) \ 282 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 283 _ISP_SWAP8((rqp)->req_target, (rqp)->req_lun_trn); \ 284 } 285 #else 286 #define ISP_SBUSIFY_ISPREQ(a, b) 287 #endif 288 289 #define ISP_RQDSEG_T2 3 290 typedef struct { 291 isphdr_t req_header; 292 u_int32_t req_handle; 293 u_int8_t req_lun_trn; 294 u_int8_t req_target; 295 u_int16_t req_scclun; 296 u_int16_t req_flags; 297 u_int16_t _res2; 298 u_int16_t req_time; 299 u_int16_t req_seg_count; 300 u_int32_t req_cdb[4]; 301 u_int32_t req_totalcnt; 302 ispds_t req_dataseg[ISP_RQDSEG_T2]; 303 } ispreqt2_t; 304 305 /* req_flag values */ 306 #define REQFLAG_NODISCON 0x0001 307 #define REQFLAG_HTAG 0x0002 308 #define REQFLAG_OTAG 0x0004 309 #define REQFLAG_STAG 0x0008 310 #define REQFLAG_TARGET_RTN 0x0010 311 312 #define REQFLAG_NODATA 0x0000 313 #define REQFLAG_DATA_IN 0x0020 314 #define REQFLAG_DATA_OUT 0x0040 315 #define REQFLAG_DATA_UNKNOWN 0x0060 316 317 #define REQFLAG_DISARQ 0x0100 318 #define REQFLAG_FRC_ASYNC 0x0200 319 #define REQFLAG_FRC_SYNC 0x0400 320 #define REQFLAG_FRC_WIDE 0x0800 321 #define REQFLAG_NOPARITY 0x1000 322 #define REQFLAG_STOPQ 0x2000 323 #define REQFLAG_XTRASNS 0x4000 324 #define REQFLAG_PRIORITY 0x8000 325 326 typedef struct { 327 isphdr_t req_header; 328 u_int32_t req_handle; 329 u_int8_t req_lun_trn; 330 u_int8_t req_target; 331 u_int16_t req_cdblen; 332 u_int16_t req_flags; 333 u_int16_t _res1; 334 u_int16_t req_time; 335 u_int16_t req_seg_count; 336 u_int8_t req_cdb[44]; 337 } ispextreq_t; 338 339 #define ISP_CDSEG 7 340 typedef struct { 341 isphdr_t req_header; 342 u_int32_t _res1; 343 ispds_t req_dataseg[ISP_CDSEG]; 344 } ispcontreq_t; 345 346 typedef struct { 347 isphdr_t req_header; 348 u_int32_t req_handle; 349 u_int16_t req_scsi_status; 350 u_int16_t req_completion_status; 351 u_int16_t req_state_flags; 352 u_int16_t req_status_flags; 353 u_int16_t req_time; 354 #define req_response_len req_time /* FC only */ 355 u_int16_t req_sense_len; 356 u_int32_t req_resid; 357 u_int8_t _res1[8]; 358 u_int8_t req_sense_data[32]; 359 } ispstatusreq_t; 360 361 /* 362 * For Qlogic 2100, the high order byte of SCSI status has 363 * additional meaning. 364 */ 365 #define RQCS_RU 0x800 /* Residual Under */ 366 #define RQCS_RO 0x400 /* Residual Over */ 367 #define RQCS_SV 0x200 /* Sense Length Valid */ 368 #define RQCS_RV 0x100 /* Residual Valid */ 369 370 /* 371 * Completion Status Codes. 372 */ 373 #define RQCS_COMPLETE 0x0000 374 #define RQCS_INCOMPLETE 0x0001 375 #define RQCS_DMA_ERROR 0x0002 376 #define RQCS_TRANSPORT_ERROR 0x0003 377 #define RQCS_RESET_OCCURRED 0x0004 378 #define RQCS_ABORTED 0x0005 379 #define RQCS_TIMEOUT 0x0006 380 #define RQCS_DATA_OVERRUN 0x0007 381 #define RQCS_COMMAND_OVERRUN 0x0008 382 #define RQCS_STATUS_OVERRUN 0x0009 383 #define RQCS_BAD_MESSAGE 0x000a 384 #define RQCS_NO_MESSAGE_OUT 0x000b 385 #define RQCS_EXT_ID_FAILED 0x000c 386 #define RQCS_IDE_MSG_FAILED 0x000d 387 #define RQCS_ABORT_MSG_FAILED 0x000e 388 #define RQCS_REJECT_MSG_FAILED 0x000f 389 #define RQCS_NOP_MSG_FAILED 0x0010 390 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 391 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 392 #define RQCS_ID_MSG_FAILED 0x0013 393 #define RQCS_UNEXP_BUS_FREE 0x0014 394 #define RQCS_DATA_UNDERRUN 0x0015 395 #define RQCS_XACT_ERR1 0x0018 396 #define RQCS_XACT_ERR2 0x0019 397 #define RQCS_XACT_ERR3 0x001A 398 #define RQCS_BAD_ENTRY 0x001B 399 #define RQCS_QUEUE_FULL 0x001C 400 #define RQCS_PHASE_SKIPPED 0x001D 401 #define RQCS_ARQS_FAILED 0x001E 402 #define RQCS_WIDE_FAILED 0x001F 403 #define RQCS_SYNCXFER_FAILED 0x0020 404 #define RQCS_LVD_BUSERR 0x0021 405 406 /* 2100 Only Completion Codes */ 407 #define RQCS_PORT_UNAVAILABLE 0x0028 408 #define RQCS_PORT_LOGGED_OUT 0x0029 409 #define RQCS_PORT_CHANGED 0x002A 410 #define RQCS_PORT_BUSY 0x002B 411 412 /* 413 * State Flags (not applicable to 2100) 414 */ 415 #define RQSF_GOT_BUS 0x0100 416 #define RQSF_GOT_TARGET 0x0200 417 #define RQSF_SENT_CDB 0x0400 418 #define RQSF_XFRD_DATA 0x0800 419 #define RQSF_GOT_STATUS 0x1000 420 #define RQSF_GOT_SENSE 0x2000 421 #define RQSF_XFER_COMPLETE 0x4000 422 423 /* 424 * Status Flags (not applicable to 2100) 425 */ 426 #define RQSTF_DISCONNECT 0x0001 427 #define RQSTF_SYNCHRONOUS 0x0002 428 #define RQSTF_PARITY_ERROR 0x0004 429 #define RQSTF_BUS_RESET 0x0008 430 #define RQSTF_DEVICE_RESET 0x0010 431 #define RQSTF_ABORTED 0x0020 432 #define RQSTF_TIMEOUT 0x0040 433 #define RQSTF_NEGOTIATION 0x0080 434 435 /* 436 * FC (ISP2100) specific data structures 437 */ 438 439 /* 440 * Initialization Control Block 441 * 442 * Version One (prime) format. 443 */ 444 typedef struct isp_icb { 445 u_int8_t icb_version; 446 u_int8_t _reserved0; 447 u_int16_t icb_fwoptions; 448 u_int16_t icb_maxfrmlen; 449 u_int16_t icb_maxalloc; 450 u_int16_t icb_execthrottle; 451 u_int8_t icb_retry_count; 452 u_int8_t icb_retry_delay; 453 u_int8_t icb_portname[8]; 454 u_int16_t icb_hardaddr; 455 u_int8_t icb_iqdevtype; 456 u_int8_t icb_logintime; 457 u_int8_t icb_nodename[8]; 458 u_int16_t icb_rqstout; 459 u_int16_t icb_rspnsin; 460 u_int16_t icb_rqstqlen; 461 u_int16_t icb_rsltqlen; 462 u_int16_t icb_rqstaddr[4]; 463 u_int16_t icb_respaddr[4]; 464 u_int16_t icb_lunenables; 465 u_int8_t icb_ccnt; 466 u_int8_t icb_icnt; 467 u_int16_t icb_lunetimeout; 468 u_int16_t _reserved1; 469 u_int16_t icb_xfwoptions; 470 u_int8_t icb_racctimer; 471 u_int8_t icb_idelaytimer; 472 u_int16_t icb_zfwoptions; 473 u_int16_t _reserved2[13]; 474 } isp_icb_t; 475 #define ICB_VERSION1 1 476 477 #define ICBOPT_HARD_ADDRESS 0x0001 478 #define ICBOPT_FAIRNESS 0x0002 479 #define ICBOPT_FULL_DUPLEX 0x0004 480 #define ICBOPT_FAST_POST 0x0008 481 #define ICBOPT_TGT_ENABLE 0x0010 482 #define ICBOPT_INI_DISABLE 0x0020 483 #define ICBOPT_INI_ADISC 0x0040 484 #define ICBOPT_INI_TGTTYPE 0x0080 485 #define ICBOPT_PDBCHANGE_AE 0x0100 486 #define ICBOPT_NOLIP 0x0200 487 #define ICBOPT_SRCHDOWN 0x0400 488 #define ICBOPT_PREVLOOP 0x0800 489 #define ICBOPT_STOP_ON_QFULL 0x1000 490 #define ICBOPT_FULL_LOGIN 0x2000 491 #define ICBOPT_USE_PORTNAME 0x4000 492 #define ICBOPT_EXTENDED 0x8000 493 494 495 #define ICB_MIN_FRMLEN 256 496 #define ICB_MAX_FRMLEN 2112 497 #define ICB_DFLT_FRMLEN 1024 498 #define ICB_DFLT_ALLOC 256 499 #define ICB_DFLT_THROTTLE 16 500 #define ICB_DFLT_RDELAY 5 501 #define ICB_DFLT_RCOUNT 3 502 503 504 #define RQRSP_ADDR0015 0 505 #define RQRSP_ADDR1631 1 506 #define RQRSP_ADDR3247 2 507 #define RQRSP_ADDR4863 3 508 509 510 #define ICB_NNM0 7 511 #define ICB_NNM1 6 512 #define ICB_NNM2 5 513 #define ICB_NNM3 4 514 #define ICB_NNM4 3 515 #define ICB_NNM5 2 516 #define ICB_NNM6 1 517 #define ICB_NNM7 0 518 519 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 520 array[ICB_NNM0] = (u_int8_t) ((wwn >> 0) & 0xff), \ 521 array[ICB_NNM1] = (u_int8_t) ((wwn >> 8) & 0xff), \ 522 array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \ 523 array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \ 524 array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \ 525 array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \ 526 array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \ 527 array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff) 528 529 /* 530 * Port Data Base Element 531 */ 532 533 typedef struct { 534 u_int16_t pdb_options; 535 u_int8_t pdb_mstate; 536 u_int8_t pdb_sstate; 537 #define BITS2WORD(x) (x)[0] << 16 | (x)[3] << 8 | (x)[2] 538 u_int8_t pdb_hardaddr_bits[4]; 539 u_int8_t pdb_portid_bits[4]; 540 u_int8_t pdb_nodename[8]; 541 u_int8_t pdb_portname[8]; 542 u_int16_t pdb_execthrottle; 543 u_int16_t pdb_exec_count; 544 u_int8_t pdb_retry_count; 545 u_int8_t pdb_retry_delay; 546 u_int16_t pdb_resalloc; 547 u_int16_t pdb_curalloc; 548 u_int16_t pdb_qhead; 549 u_int16_t pdb_qtail; 550 u_int16_t pdb_tl_next; 551 u_int16_t pdb_tl_last; 552 u_int16_t pdb_features; /* PLOGI, Common Service */ 553 u_int16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 554 u_int16_t pdb_roi; /* PLOGI, Common Service */ 555 u_int8_t pdb_target; 556 u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 557 u_int16_t pdb_rdsiz; /* PLOGI, Class 3 */ 558 u_int16_t pdb_ncseq; /* PLOGI, Class 3 */ 559 u_int16_t pdb_noseq; /* PLOGI, Class 3 */ 560 u_int16_t pdb_labrtflg; 561 u_int16_t pdb_lstopflg; 562 u_int16_t pdb_sqhead; 563 u_int16_t pdb_sqtail; 564 u_int16_t pdb_ptimer; 565 u_int16_t pdb_nxt_seqid; 566 u_int16_t pdb_fcount; 567 u_int16_t pdb_prli_len; 568 u_int16_t pdb_prli_svc0; 569 u_int16_t pdb_prli_svc3; 570 u_int16_t pdb_loopid; 571 u_int16_t pdb_il_ptr; 572 u_int16_t pdb_sl_ptr; 573 } isp_pdb_t; 574 575 #define PDB_OPTIONS_XMITTING (1<<11) 576 #define PDB_OPTIONS_LNKXMIT (1<<10) 577 #define PDB_OPTIONS_ABORTED (1<<9) 578 #define PDB_OPTIONS_ADISC (1<<1) 579 580 #define PDB_STATE_DISCOVERY 0 581 #define PDB_STATE_WDISC_ACK 1 582 #define PDB_STATE_PLOGI 2 583 #define PDB_STATE_PLOGI_ACK 3 584 #define PDB_STATE_PRLI 4 585 #define PDB_STATE_PRLI_ACK 5 586 #define PDB_STATE_LOGGED_IN 6 587 #define PDB_STATE_PORT_UNAVAIL 7 588 #define PDB_STATE_PRLO 8 589 #define PDB_STATE_PRLO_ACK 9 590 #define PDB_STATE_PLOGO 10 591 #define PDB_STATE_PLOG_ACK 11 592 593 #define SVC3_TGT_ROLE 0x10 594 #define SVC3_INI_ROLE 0x20 595 #define SVC3_ROLE_MASK 0x30 596 #define SVC3_ROLE_SHIFT 4 597 598 #define SNS_GAN 0x100 599 #define SNS_GP3 0x171 600 typedef struct { 601 u_int16_t snscb_rblen; /* response buffer length (words) */ 602 u_int16_t snscb_res0; 603 u_int16_t snscb_addr[4]; /* response buffer address */ 604 u_int16_t snscb_sblen; /* subcommand buffer length (words) */ 605 u_int16_t snscb_res1; 606 u_int16_t snscb_data[1]; /* variable data */ 607 } sns_screq_t; /* Subcommand Request Structure */ 608 #define SNS_GAN_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 609 #define SNS_GP3_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 610 611 typedef struct { 612 u_int8_t snscb_cthdr[16]; 613 u_int8_t snscb_port_type; 614 u_int8_t snscb_port_id[3]; 615 u_int8_t snscb_portname[8]; 616 u_int16_t snscb_data[1]; /* variable data */ 617 } sns_scrsp_t; /* Subcommand Response Structure */ 618 #define SNS_GAN_RESP_SIZE 608 /* Maximum response size (bytes) */ 619 #define SNS_GP3_RESP_SIZE 532 /* XXX: For 128 ports */ 620 621 #endif /* _ISPMBOX_H */ 622
Indexes created Fri Sep 26 20:09:58 GMT 2025