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ispmbox.h revision 1.27
      1 /* $NetBSD: ispmbox.h,v 1.27 2000/08/16 18:11:38 mjacob Exp $ */
      2 /*
      3  * This driver, which is contained in NetBSD in the files:
      4  *
      5  *	sys/dev/ic/isp.c
      6  *	sys/dev/ic/ic/isp.c
      7  *	sys/dev/ic/ic/isp_inline.h
      8  *	sys/dev/ic/ic/isp_netbsd.c
      9  *	sys/dev/ic/ic/isp_netbsd.h
     10  *	sys/dev/ic/ic/isp_target.c
     11  *	sys/dev/ic/ic/isp_target.h
     12  *	sys/dev/ic/ic/isp_tpublic.h
     13  *	sys/dev/ic/ic/ispmbox.h
     14  *	sys/dev/ic/ic/ispreg.h
     15  *	sys/dev/ic/ic/ispvar.h
     16  *	sys/microcode/isp/asm_sbus.h
     17  *	sys/microcode/isp/asm_1040.h
     18  *	sys/microcode/isp/asm_1080.h
     19  *	sys/microcode/isp/asm_12160.h
     20  *	sys/microcode/isp/asm_2100.h
     21  *	sys/microcode/isp/asm_2200.h
     22  *	sys/pci/isp_pci.c
     23  *	sys/sbus/isp_sbus.c
     24  *
     25  * Is being actively maintained by Matthew Jacob (mjacob (at) netbsd.org).
     26  * This driver also is shared source with FreeBSD, OpenBSD, Linux, Solaris,
     27  * Linux versions. This tends to be an interesting maintenance problem.
     28  *
     29  * Please coordinate with Matthew Jacob on changes you wish to make here.
     30  */
     31 /*
     32  * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration
     33  * All rights reserved.
     34  *
     35  * Redistribution and use in source and binary forms, with or without
     36  * modification, are permitted provided that the following conditions
     37  * are met:
     38  * 1. Redistributions of source code must retain the above copyright
     39  *    notice, this list of conditions and the following disclaimer.
     40  * 2. Redistributions in binary form must reproduce the above copyright
     41  *    notice, this list of conditions and the following disclaimer in the
     42  *    documentation and/or other materials provided with the distribution.
     43  * 3. The name of the author may not be used to endorse or promote products
     44  *    derived from this software without specific prior written permission
     45  *
     46  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     47  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     48  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     49  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     50  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     51  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     52  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     53  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     54  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     55  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     56  */
     57 
     58 /*
     59  * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
     60  * <mjacob (at) nas.nasa.gov>
     61  */
     62 #ifndef	_ISPMBOX_H
     63 #define	_ISPMBOX_H
     64 
     65 /*
     66  * Mailbox Command Opcodes
     67  */
     68 
     69 #define MBOX_NO_OP			0x0000
     70 #define MBOX_LOAD_RAM			0x0001
     71 #define MBOX_EXEC_FIRMWARE		0x0002
     72 #define MBOX_DUMP_RAM			0x0003
     73 #define MBOX_WRITE_RAM_WORD		0x0004
     74 #define MBOX_READ_RAM_WORD		0x0005
     75 #define MBOX_MAILBOX_REG_TEST		0x0006
     76 #define MBOX_VERIFY_CHECKSUM		0x0007
     77 #define MBOX_ABOUT_FIRMWARE		0x0008
     78 					/*   9 */
     79 					/*   a */
     80 					/*   b */
     81 					/*   c */
     82 					/*   d */
     83 #define MBOX_CHECK_FIRMWARE		0x000e
     84 					/*   f */
     85 #define MBOX_INIT_REQ_QUEUE		0x0010
     86 #define MBOX_INIT_RES_QUEUE		0x0011
     87 #define MBOX_EXECUTE_IOCB		0x0012
     88 #define MBOX_WAKE_UP			0x0013
     89 #define MBOX_STOP_FIRMWARE		0x0014
     90 #define MBOX_ABORT			0x0015
     91 #define MBOX_ABORT_DEVICE		0x0016
     92 #define MBOX_ABORT_TARGET		0x0017
     93 #define MBOX_BUS_RESET			0x0018
     94 #define MBOX_STOP_QUEUE			0x0019
     95 #define MBOX_START_QUEUE		0x001a
     96 #define MBOX_SINGLE_STEP_QUEUE		0x001b
     97 #define MBOX_ABORT_QUEUE		0x001c
     98 #define MBOX_GET_DEV_QUEUE_STATUS	0x001d
     99 					/*  1e */
    100 #define MBOX_GET_FIRMWARE_STATUS	0x001f
    101 #define MBOX_GET_INIT_SCSI_ID		0x0020
    102 #define MBOX_GET_SELECT_TIMEOUT		0x0021
    103 #define MBOX_GET_RETRY_COUNT		0x0022
    104 #define MBOX_GET_TAG_AGE_LIMIT		0x0023
    105 #define MBOX_GET_CLOCK_RATE		0x0024
    106 #define MBOX_GET_ACT_NEG_STATE		0x0025
    107 #define MBOX_GET_ASYNC_DATA_SETUP_TIME	0x0026
    108 #define MBOX_GET_SBUS_PARAMS		0x0027
    109 #define MBOX_GET_TARGET_PARAMS		0x0028
    110 #define MBOX_GET_DEV_QUEUE_PARAMS	0x0029
    111 #define	MBOX_GET_RESET_DELAY_PARAMS	0x002a
    112 					/*  2b */
    113 					/*  2c */
    114 					/*  2d */
    115 					/*  2e */
    116 					/*  2f */
    117 #define MBOX_SET_INIT_SCSI_ID		0x0030
    118 #define MBOX_SET_SELECT_TIMEOUT		0x0031
    119 #define MBOX_SET_RETRY_COUNT		0x0032
    120 #define MBOX_SET_TAG_AGE_LIMIT		0x0033
    121 #define MBOX_SET_CLOCK_RATE		0x0034
    122 #define MBOX_SET_ACT_NEG_STATE		0x0035
    123 #define MBOX_SET_ASYNC_DATA_SETUP_TIME	0x0036
    124 #define MBOX_SET_SBUS_CONTROL_PARAMS	0x0037
    125 #define		MBOX_SET_PCI_PARAMETERS	0x0037
    126 #define MBOX_SET_TARGET_PARAMS		0x0038
    127 #define MBOX_SET_DEV_QUEUE_PARAMS	0x0039
    128 #define	MBOX_SET_RESET_DELAY_PARAMS	0x003a
    129 					/*  3b */
    130 					/*  3c */
    131 					/*  3d */
    132 					/*  3e */
    133 					/*  3f */
    134 #define	MBOX_RETURN_BIOS_BLOCK_ADDR	0x0040
    135 #define	MBOX_WRITE_FOUR_RAM_WORDS	0x0041
    136 #define	MBOX_EXEC_BIOS_IOCB		0x0042
    137 #define	MBOX_SET_FW_FEATURES		0x004a
    138 #define	MBOX_GET_FW_FEATURES		0x004b
    139 #define		FW_FEATURE_LVD_NOTIFY	0x2
    140 #define		FW_FEATURE_FAST_POST	0x1
    141 
    142 #define	MBOX_ENABLE_TARGET_MODE		0x55
    143 #define		ENABLE_TARGET_FLAG	0x8000
    144 
    145 /* These are for the ISP2100 FC cards */
    146 #define	MBOX_GET_LOOP_ID		0x20
    147 #define	MBOX_GET_RESOURCE_COUNT		0x42
    148 #define	MBOX_EXEC_COMMAND_IOCB_A64	0x54
    149 #define	MBOX_INIT_FIRMWARE		0x60
    150 #define	MBOX_GET_INIT_CONTROL_BLOCK	0x61
    151 #define	MBOX_INIT_LIP			0x62
    152 #define	MBOX_GET_FC_AL_POSITION_MAP	0x63
    153 #define	MBOX_GET_PORT_DB		0x64
    154 #define	MBOX_CLEAR_ACA			0x65
    155 #define	MBOX_TARGET_RESET		0x66
    156 #define	MBOX_CLEAR_TASK_SET		0x67
    157 #define	MBOX_ABORT_TASK_SET		0x68
    158 #define	MBOX_GET_FW_STATE		0x69
    159 #define	MBOX_GET_PORT_NAME		0x6a
    160 #define	MBOX_GET_LINK_STATUS		0x6b
    161 #define	MBOX_INIT_LIP_RESET		0x6c
    162 #define	MBOX_SEND_SNS			0x6e
    163 #define	MBOX_FABRIC_LOGIN		0x6f
    164 #define	MBOX_SEND_CHANGE_REQUEST	0x70
    165 #define	MBOX_FABRIC_LOGOUT		0x71
    166 #define	MBOX_INIT_LIP_LOGIN		0x72
    167 
    168 #define	ISP2100_SET_PCI_PARAM		0x00ff
    169 
    170 #define	MBOX_BUSY			0x04
    171 
    172 typedef struct {
    173 	u_int16_t param[8];
    174 } mbreg_t;
    175 
    176 /*
    177  * Mailbox Command Complete Status Codes
    178  */
    179 #define	MBOX_COMMAND_COMPLETE		0x4000
    180 #define	MBOX_INVALID_COMMAND		0x4001
    181 #define	MBOX_HOST_INTERFACE_ERROR	0x4002
    182 #define	MBOX_TEST_FAILED		0x4003
    183 #define	MBOX_COMMAND_ERROR		0x4005
    184 #define	MBOX_COMMAND_PARAM_ERROR	0x4006
    185 #define	MBOX_PORT_ID_USED		0x4007
    186 #define	MBOX_LOOP_ID_USED		0x4008
    187 #define	MBOX_ALL_IDS_USED		0x4009
    188 #define	MBOX_NOT_LOGGED_IN		0x400A
    189 #define	MBLOGALL			0x000f
    190 #define	MBLOGNONE			0x0000
    191 #define	MBLOGMASK(x)			((x) & 0xf)
    192 
    193 /*
    194  * Asynchronous event status codes
    195  */
    196 #define	ASYNC_BUS_RESET			0x8001
    197 #define	ASYNC_SYSTEM_ERROR		0x8002
    198 #define	ASYNC_RQS_XFER_ERR		0x8003
    199 #define	ASYNC_RSP_XFER_ERR		0x8004
    200 #define	ASYNC_QWAKEUP			0x8005
    201 #define	ASYNC_TIMEOUT_RESET		0x8006
    202 #define	ASYNC_DEVICE_RESET		0x8007
    203 #define	ASYNC_EXTMSG_UNDERRUN		0x800A
    204 #define	ASYNC_SCAM_INT			0x800B
    205 #define	ASYNC_HUNG_SCSI			0x800C
    206 #define	ASYNC_KILLED_BUS		0x800D
    207 #define	ASYNC_BUS_TRANSIT		0x800E	/* LVD -> HVD, eg. */
    208 #define	ASYNC_CMD_CMPLT			0x8020
    209 #define	ASYNC_CTIO_DONE			0x8021
    210 
    211 /* for ISP2100 only */
    212 #define	ASYNC_LIP_OCCURRED		0x8010
    213 #define	ASYNC_LOOP_UP			0x8011
    214 #define	ASYNC_LOOP_DOWN			0x8012
    215 #define	ASYNC_LOOP_RESET		0x8013
    216 #define	ASYNC_PDB_CHANGED		0x8014
    217 #define	ASYNC_CHANGE_NOTIFY		0x8015
    218 
    219 /* for ISP2200 only */
    220 #define	ASYNC_PTPMODE			0x8030
    221 #define	ASYNC_CONNMODE			0x8036
    222 #define		ISP_CONN_LOOP		1
    223 #define		ISP_CONN_PTP		2
    224 #define		ISP_CONN_BADLIP		3
    225 #define		ISP_CONN_FATAL		4
    226 #define		ISP_CONN_LOOPBACK	5
    227 
    228 /*
    229  * Command Structure Definitions
    230  */
    231 
    232 typedef struct {
    233 	u_int32_t	ds_base;
    234 	u_int32_t	ds_count;
    235 } ispds_t;
    236 
    237 #define	_ISP_SWAP8(a, b)	{	\
    238 	u_int8_t tmp;			\
    239 	tmp = a;			\
    240 	a = b;				\
    241 	b = tmp;			\
    242 }
    243 
    244 /*
    245  * These elements get swizzled around for SBus instances.
    246  */
    247 typedef struct {
    248 	u_int8_t	rqs_entry_type;
    249 	u_int8_t	rqs_entry_count;
    250 	u_int8_t	rqs_seqno;
    251 	u_int8_t	rqs_flags;
    252 } isphdr_t;
    253 /*
    254  * There are no (for all intents and purposes) non-sparc SBus machines
    255  */
    256 #ifdef	__sparc__
    257 #define	ISP_SBUSIFY_ISPHDR(isp, hdrp)					\
    258     if ((isp)->isp_bustype == ISP_BT_SBUS) {				\
    259 	_ISP_SWAP8((hdrp)->rqs_entry_count, (hdrp)->rqs_entry_type);	\
    260 	_ISP_SWAP8((hdrp)->rqs_flags, (hdrp)->rqs_seqno);		\
    261     }
    262 #else
    263 #define	ISP_SBUSIFY_ISPHDR(a, b)
    264 #endif
    265 
    266 /* RQS Flag definitions */
    267 #define	RQSFLAG_CONTINUATION	0x01
    268 #define	RQSFLAG_FULL		0x02
    269 #define	RQSFLAG_BADHEADER	0x04
    270 #define	RQSFLAG_BADPACKET	0x08
    271 
    272 /* RQS entry_type definitions */
    273 #define	RQSTYPE_REQUEST		0x01
    274 #define	RQSTYPE_DATASEG		0x02
    275 #define	RQSTYPE_RESPONSE	0x03
    276 #define	RQSTYPE_MARKER		0x04
    277 #define	RQSTYPE_CMDONLY		0x05
    278 #define	RQSTYPE_ATIO		0x06	/* Target Mode */
    279 #define	RQSTYPE_CTIO		0x07	/* Target Mode */
    280 #define	RQSTYPE_SCAM		0x08
    281 #define	RQSTYPE_A64		0x09
    282 #define	RQSTYPE_A64_CONT	0x0a
    283 #define	RQSTYPE_ENABLE_LUN	0x0b	/* Target Mode */
    284 #define	RQSTYPE_MODIFY_LUN	0x0c	/* Target Mode */
    285 #define	RQSTYPE_NOTIFY		0x0d	/* Target Mode */
    286 #define	RQSTYPE_NOTIFY_ACK	0x0e	/* Target Mode */
    287 #define	RQSTYPE_CTIO1		0x0f	/* Target Mode */
    288 #define	RQSTYPE_STATUS_CONT	0x10
    289 #define	RQSTYPE_T2RQS		0x11
    290 
    291 #define	RQSTYPE_T4RQS		0x15
    292 #define	RQSTYPE_ATIO2		0x16
    293 #define	RQSTYPE_CTIO2		0x17
    294 #define	RQSTYPE_CSET0		0x18
    295 #define	RQSTYPE_T3RQS		0x19
    296 
    297 #define	RQSTYPE_CTIO3		0x1f
    298 
    299 
    300 #define	ISP_RQDSEG	4
    301 typedef struct {
    302 	isphdr_t	req_header;
    303 	u_int32_t	req_handle;
    304 	u_int8_t	req_lun_trn;
    305 	u_int8_t	req_target;
    306 	u_int16_t	req_cdblen;
    307 #define	req_modifier	req_cdblen	/* marker packet */
    308 	u_int16_t	req_flags;
    309 	u_int16_t	req_reserved;
    310 	u_int16_t	req_time;
    311 	u_int16_t	req_seg_count;
    312 	u_int8_t	req_cdb[12];
    313 	ispds_t		req_dataseg[ISP_RQDSEG];
    314 } ispreq_t;
    315 
    316 /*
    317  * A request packet can also be a marker packet.
    318  */
    319 #define SYNC_DEVICE	0
    320 #define SYNC_TARGET	1
    321 #define SYNC_ALL	2
    322 
    323 /*
    324  * There are no (for all intents and purposes) non-sparc SBus machines
    325  */
    326 #ifdef	__sparc__
    327 #define	ISP_SBUSIFY_ISPREQ(isp, rqp)					\
    328     if ((isp)->isp_bustype == ISP_BT_SBUS) {				\
    329 	_ISP_SWAP8((rqp)->req_target, (rqp)->req_lun_trn);		\
    330     }
    331 #else
    332 #define	ISP_SBUSIFY_ISPREQ(a, b)
    333 #endif
    334 
    335 #define	ISP_RQDSEG_T2	3
    336 typedef struct {
    337 	isphdr_t	req_header;
    338 	u_int32_t	req_handle;
    339 	u_int8_t	req_lun_trn;
    340 	u_int8_t	req_target;
    341 	u_int16_t	req_scclun;
    342 	u_int16_t	req_flags;
    343 	u_int16_t	_res2;
    344 	u_int16_t	req_time;
    345 	u_int16_t	req_seg_count;
    346 	u_int32_t	req_cdb[4];
    347 	u_int32_t	req_totalcnt;
    348 	ispds_t		req_dataseg[ISP_RQDSEG_T2];
    349 } ispreqt2_t;
    350 
    351 /* req_flag values */
    352 #define	REQFLAG_NODISCON	0x0001
    353 #define	REQFLAG_HTAG		0x0002
    354 #define	REQFLAG_OTAG		0x0004
    355 #define	REQFLAG_STAG		0x0008
    356 #define	REQFLAG_TARGET_RTN	0x0010
    357 
    358 #define	REQFLAG_NODATA		0x0000
    359 #define	REQFLAG_DATA_IN		0x0020
    360 #define	REQFLAG_DATA_OUT	0x0040
    361 #define	REQFLAG_DATA_UNKNOWN	0x0060
    362 
    363 #define	REQFLAG_DISARQ		0x0100
    364 #define	REQFLAG_FRC_ASYNC	0x0200
    365 #define	REQFLAG_FRC_SYNC	0x0400
    366 #define	REQFLAG_FRC_WIDE	0x0800
    367 #define	REQFLAG_NOPARITY	0x1000
    368 #define	REQFLAG_STOPQ		0x2000
    369 #define	REQFLAG_XTRASNS		0x4000
    370 #define	REQFLAG_PRIORITY	0x8000
    371 
    372 typedef struct {
    373 	isphdr_t	req_header;
    374 	u_int32_t	req_handle;
    375 	u_int8_t	req_lun_trn;
    376 	u_int8_t	req_target;
    377 	u_int16_t	req_cdblen;
    378 	u_int16_t	req_flags;
    379 	u_int16_t	_res1;
    380 	u_int16_t	req_time;
    381 	u_int16_t	req_seg_count;
    382 	u_int8_t	req_cdb[44];
    383 } ispextreq_t;
    384 
    385 #define	ISP_CDSEG	7
    386 typedef struct {
    387 	isphdr_t	req_header;
    388 	u_int32_t	_res1;
    389 	ispds_t		req_dataseg[ISP_CDSEG];
    390 } ispcontreq_t;
    391 
    392 typedef struct {
    393 	isphdr_t	req_header;
    394 	u_int32_t	req_handle;
    395 	u_int16_t	req_scsi_status;
    396 	u_int16_t	req_completion_status;
    397 	u_int16_t	req_state_flags;
    398 	u_int16_t	req_status_flags;
    399 	u_int16_t	req_time;
    400 #define	req_response_len	req_time	/* FC only */
    401 	u_int16_t	req_sense_len;
    402 	u_int32_t	req_resid;
    403 	u_int8_t	req_response[8];	/* FC only */
    404 	u_int8_t	req_sense_data[32];
    405 } ispstatusreq_t;
    406 
    407 /*
    408  * For Qlogic 2100, the high order byte of SCSI status has
    409  * additional meaning.
    410  */
    411 #define	RQCS_RU	0x800	/* Residual Under */
    412 #define	RQCS_RO	0x400	/* Residual Over */
    413 #define	RQCS_RESID	(RQCS_RU|RQCS_RO)
    414 #define	RQCS_SV	0x200	/* Sense Length Valid */
    415 #define	RQCS_RV	0x100	/* FCP Response Length Valid */
    416 
    417 /*
    418  * Completion Status Codes.
    419  */
    420 #define RQCS_COMPLETE			0x0000
    421 #define RQCS_DMA_ERROR			0x0002
    422 #define RQCS_RESET_OCCURRED		0x0004
    423 #define RQCS_ABORTED			0x0005
    424 #define RQCS_TIMEOUT			0x0006
    425 #define RQCS_DATA_OVERRUN		0x0007
    426 #define RQCS_DATA_UNDERRUN		0x0015
    427 #define	RQCS_QUEUE_FULL			0x001C
    428 
    429 /* 1X00 Only Completion Codes */
    430 #define RQCS_INCOMPLETE			0x0001
    431 #define RQCS_TRANSPORT_ERROR		0x0003
    432 #define RQCS_COMMAND_OVERRUN		0x0008
    433 #define RQCS_STATUS_OVERRUN		0x0009
    434 #define RQCS_BAD_MESSAGE		0x000a
    435 #define RQCS_NO_MESSAGE_OUT		0x000b
    436 #define RQCS_EXT_ID_FAILED		0x000c
    437 #define RQCS_IDE_MSG_FAILED		0x000d
    438 #define RQCS_ABORT_MSG_FAILED		0x000e
    439 #define RQCS_REJECT_MSG_FAILED		0x000f
    440 #define RQCS_NOP_MSG_FAILED		0x0010
    441 #define RQCS_PARITY_ERROR_MSG_FAILED	0x0011
    442 #define RQCS_DEVICE_RESET_MSG_FAILED	0x0012
    443 #define RQCS_ID_MSG_FAILED		0x0013
    444 #define RQCS_UNEXP_BUS_FREE		0x0014
    445 #define	RQCS_XACT_ERR1			0x0018
    446 #define	RQCS_XACT_ERR2			0x0019
    447 #define	RQCS_XACT_ERR3			0x001A
    448 #define	RQCS_BAD_ENTRY			0x001B
    449 #define	RQCS_PHASE_SKIPPED		0x001D
    450 #define	RQCS_ARQS_FAILED		0x001E
    451 #define	RQCS_WIDE_FAILED		0x001F
    452 #define	RQCS_SYNCXFER_FAILED		0x0020
    453 #define	RQCS_LVD_BUSERR			0x0021
    454 
    455 /* 2X00 Only Completion Codes */
    456 #define	RQCS_PORT_UNAVAILABLE		0x0028
    457 #define	RQCS_PORT_LOGGED_OUT		0x0029
    458 #define	RQCS_PORT_CHANGED		0x002A
    459 #define	RQCS_PORT_BUSY			0x002B
    460 
    461 /*
    462  * 1X00 specific State Flags
    463  */
    464 #define RQSF_GOT_BUS			0x0100
    465 #define RQSF_GOT_TARGET			0x0200
    466 #define RQSF_SENT_CDB			0x0400
    467 #define RQSF_XFRD_DATA			0x0800
    468 #define RQSF_GOT_STATUS			0x1000
    469 #define RQSF_GOT_SENSE			0x2000
    470 #define	RQSF_XFER_COMPLETE		0x4000
    471 
    472 /*
    473  * 1X00 Status Flags
    474  */
    475 #define RQSTF_DISCONNECT		0x0001
    476 #define RQSTF_SYNCHRONOUS		0x0002
    477 #define RQSTF_PARITY_ERROR		0x0004
    478 #define RQSTF_BUS_RESET			0x0008
    479 #define RQSTF_DEVICE_RESET		0x0010
    480 #define RQSTF_ABORTED			0x0020
    481 #define RQSTF_TIMEOUT			0x0040
    482 #define RQSTF_NEGOTIATION		0x0080
    483 
    484 /*
    485  * 2X00 specific state flags
    486  */
    487 /* RQSF_SENT_CDB	*/
    488 /* RQSF_XFRD_DATA	*/
    489 /* RQSF_GOT_STATUS	*/
    490 /* RQSF_XFER_COMPLETE	*/
    491 
    492 /*
    493  * 2X00 specific status flags
    494  */
    495 /* RQSTF_ABORTED */
    496 /* RQSTF_TIMEOUT */
    497 #define	RQSTF_DMA_ERROR			0x0080
    498 #define	RQSTF_LOGOUT			0x2000
    499 
    500 /*
    501  * Miscellaneous
    502  */
    503 #ifndef	ISP_EXEC_THROTTLE
    504 #define	ISP_EXEC_THROTTLE	16
    505 #endif
    506 
    507 /*
    508  * FC (ISP2100) specific data structures
    509  */
    510 
    511 /*
    512  * Initialization Control Block
    513  *
    514  * Version One (prime) format.
    515  */
    516 typedef struct isp_icb {
    517 	u_int8_t	icb_version;
    518 	u_int8_t	_reserved0;
    519 	u_int16_t	icb_fwoptions;
    520 	u_int16_t	icb_maxfrmlen;
    521 	u_int16_t	icb_maxalloc;
    522 	u_int16_t	icb_execthrottle;
    523 	u_int8_t	icb_retry_count;
    524 	u_int8_t	icb_retry_delay;
    525 	u_int8_t	icb_portname[8];
    526 	u_int16_t	icb_hardaddr;
    527 	u_int8_t	icb_iqdevtype;
    528 	u_int8_t	icb_logintime;
    529 	u_int8_t	icb_nodename[8];
    530 	u_int16_t	icb_rqstout;
    531 	u_int16_t	icb_rspnsin;
    532 	u_int16_t	icb_rqstqlen;
    533 	u_int16_t	icb_rsltqlen;
    534 	u_int16_t	icb_rqstaddr[4];
    535 	u_int16_t	icb_respaddr[4];
    536 	u_int16_t	icb_lunenables;
    537 	u_int8_t	icb_ccnt;
    538 	u_int8_t	icb_icnt;
    539 	u_int16_t	icb_lunetimeout;
    540 	u_int16_t	_reserved1;
    541 	u_int16_t	icb_xfwoptions;
    542 	u_int8_t	icb_racctimer;
    543 	u_int8_t	icb_idelaytimer;
    544 	u_int16_t	icb_zfwoptions;
    545 	u_int16_t	_reserved2[13];
    546 } isp_icb_t;
    547 #define	ICB_VERSION1	1
    548 
    549 #define	ICBOPT_HARD_ADDRESS	0x0001
    550 #define	ICBOPT_FAIRNESS		0x0002
    551 #define	ICBOPT_FULL_DUPLEX	0x0004
    552 #define	ICBOPT_FAST_POST	0x0008
    553 #define	ICBOPT_TGT_ENABLE	0x0010
    554 #define	ICBOPT_INI_DISABLE	0x0020
    555 #define	ICBOPT_INI_ADISC	0x0040
    556 #define	ICBOPT_INI_TGTTYPE	0x0080
    557 #define	ICBOPT_PDBCHANGE_AE	0x0100
    558 #define	ICBOPT_NOLIP		0x0200
    559 #define	ICBOPT_SRCHDOWN		0x0400
    560 #define	ICBOPT_PREVLOOP		0x0800
    561 #define	ICBOPT_STOP_ON_QFULL	0x1000
    562 #define	ICBOPT_FULL_LOGIN	0x2000
    563 #define	ICBOPT_USE_PORTNAME	0x4000
    564 #define	ICBOPT_EXTENDED		0x8000
    565 
    566 #define	ICBXOPT_CLASS2_ACK0	0x0200
    567 #define	ICBXOPT_CLASS2		0x0100
    568 #define	ICBXOPT_LOOP_ONLY	(0 << 4)
    569 #define	ICBXOPT_PTP_ONLY	(1 << 4)
    570 #define	ICBXOPT_LOOP_2_PTP	(2 << 4)
    571 #define	ICBXOPT_PTP_2_LOOP	(3 << 4)
    572 
    573 #define	ICBXOPT_RIO_OFF		0
    574 #define	ICBXOPT_RIO_16BIT	1
    575 #define	ICBXOPT_RIO_32BIT	2
    576 #define	ICBXOPT_RIO_16BIT_DELAY	3
    577 #define	ICBXOPT_RIO_32BIT_DELAY	4
    578 
    579 
    580 
    581 #define	ICB_MIN_FRMLEN		256
    582 #define	ICB_MAX_FRMLEN		2112
    583 #define	ICB_DFLT_FRMLEN		1024
    584 #define	ICB_DFLT_ALLOC		256
    585 #define	ICB_DFLT_THROTTLE	16
    586 #define	ICB_DFLT_RDELAY		5
    587 #define	ICB_DFLT_RCOUNT		3
    588 
    589 
    590 #define	RQRSP_ADDR0015	0
    591 #define	RQRSP_ADDR1631	1
    592 #define	RQRSP_ADDR3247	2
    593 #define	RQRSP_ADDR4863	3
    594 
    595 
    596 #define	ICB_NNM0	7
    597 #define	ICB_NNM1	6
    598 #define	ICB_NNM2	5
    599 #define	ICB_NNM3	4
    600 #define	ICB_NNM4	3
    601 #define	ICB_NNM5	2
    602 #define	ICB_NNM6	1
    603 #define	ICB_NNM7	0
    604 
    605 #define	MAKE_NODE_NAME_FROM_WWN(array, wwn)	\
    606 	array[ICB_NNM0] = (u_int8_t) ((wwn >>  0) & 0xff), \
    607 	array[ICB_NNM1] = (u_int8_t) ((wwn >>  8) & 0xff), \
    608 	array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \
    609 	array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \
    610 	array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \
    611 	array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \
    612 	array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \
    613 	array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff)
    614 
    615 /*
    616  * Port Data Base Element
    617  */
    618 
    619 typedef struct {
    620 	u_int16_t	pdb_options;
    621 	u_int8_t	pdb_mstate;
    622 	u_int8_t	pdb_sstate;
    623 #define	BITS2WORD(x)	((x)[0] << 16 | (x)[3] << 8 | (x)[2])
    624 	u_int8_t	pdb_hardaddr_bits[4];
    625 	u_int8_t	pdb_portid_bits[4];
    626 	u_int8_t	pdb_nodename[8];
    627 	u_int8_t	pdb_portname[8];
    628 	u_int16_t	pdb_execthrottle;
    629 	u_int16_t	pdb_exec_count;
    630 	u_int8_t	pdb_retry_count;
    631 	u_int8_t	pdb_retry_delay;
    632 	u_int16_t	pdb_resalloc;
    633 	u_int16_t	pdb_curalloc;
    634 	u_int16_t	pdb_qhead;
    635 	u_int16_t	pdb_qtail;
    636 	u_int16_t	pdb_tl_next;
    637 	u_int16_t	pdb_tl_last;
    638 	u_int16_t	pdb_features;	/* PLOGI, Common Service */
    639 	u_int16_t	pdb_pconcurrnt;	/* PLOGI, Common Service */
    640 	u_int16_t	pdb_roi;	/* PLOGI, Common Service */
    641 	u_int8_t	pdb_target;
    642 	u_int8_t	pdb_initiator;	/* PLOGI, Class 3 Control Flags */
    643 	u_int16_t	pdb_rdsiz;	/* PLOGI, Class 3 */
    644 	u_int16_t	pdb_ncseq;	/* PLOGI, Class 3 */
    645 	u_int16_t	pdb_noseq;	/* PLOGI, Class 3 */
    646 	u_int16_t	pdb_labrtflg;
    647 	u_int16_t	pdb_lstopflg;
    648 	u_int16_t	pdb_sqhead;
    649 	u_int16_t	pdb_sqtail;
    650 	u_int16_t	pdb_ptimer;
    651 	u_int16_t	pdb_nxt_seqid;
    652 	u_int16_t	pdb_fcount;
    653 	u_int16_t	pdb_prli_len;
    654 	u_int16_t	pdb_prli_svc0;
    655 	u_int16_t	pdb_prli_svc3;
    656 	u_int16_t	pdb_loopid;
    657 	u_int16_t	pdb_il_ptr;
    658 	u_int16_t	pdb_sl_ptr;
    659 } isp_pdb_t;
    660 
    661 #define	PDB_OPTIONS_XMITTING	(1<<11)
    662 #define	PDB_OPTIONS_LNKXMIT	(1<<10)
    663 #define	PDB_OPTIONS_ABORTED	(1<<9)
    664 #define	PDB_OPTIONS_ADISC	(1<<1)
    665 
    666 #define	PDB_STATE_DISCOVERY	0
    667 #define	PDB_STATE_WDISC_ACK	1
    668 #define	PDB_STATE_PLOGI		2
    669 #define	PDB_STATE_PLOGI_ACK	3
    670 #define	PDB_STATE_PRLI		4
    671 #define	PDB_STATE_PRLI_ACK	5
    672 #define	PDB_STATE_LOGGED_IN	6
    673 #define	PDB_STATE_PORT_UNAVAIL	7
    674 #define	PDB_STATE_PRLO		8
    675 #define	PDB_STATE_PRLO_ACK	9
    676 #define	PDB_STATE_PLOGO		10
    677 #define	PDB_STATE_PLOG_ACK	11
    678 
    679 #define		SVC3_TGT_ROLE		0x10
    680 #define 	SVC3_INI_ROLE		0x20
    681 #define			SVC3_ROLE_MASK	0x30
    682 #define			SVC3_ROLE_SHIFT	4
    683 
    684 #define	SNS_GAN	0x100
    685 #define	SNS_GP3	0x171
    686 typedef struct {
    687 	u_int16_t	snscb_rblen;	/* response buffer length (words) */
    688 	u_int16_t	snscb_res0;
    689 	u_int16_t	snscb_addr[4];	/* response buffer address */
    690 	u_int16_t	snscb_sblen;	/* subcommand buffer length (words) */
    691 	u_int16_t	snscb_res1;
    692 	u_int16_t	snscb_data[1];	/* variable data */
    693 } sns_screq_t;	/* Subcommand Request Structure */
    694 #define	SNS_GAN_REQ_SIZE	(sizeof (sns_screq_t)+(5*(sizeof (u_int16_t))))
    695 #define	SNS_GP3_REQ_SIZE	(sizeof (sns_screq_t)+(5*(sizeof (u_int16_t))))
    696 
    697 typedef struct {
    698 	u_int8_t	snscb_cthdr[16];
    699 	u_int8_t	snscb_port_type;
    700 	u_int8_t	snscb_port_id[3];
    701 	u_int8_t	snscb_portname[8];
    702 	u_int16_t	snscb_data[1];	/* variable data */
    703 } sns_scrsp_t;	/* Subcommand Response Structure */
    704 #define	SNS_GAN_RESP_SIZE	608	/* Maximum response size (bytes) */
    705 #define	SNS_GP3_RESP_SIZE	532	/* XXX: For 128 ports */
    706 
    707 typedef struct {
    708 	u_int8_t	snscb_cthdr[16];
    709 	u_int8_t	snscb_port_type;
    710 	u_int8_t	snscb_port_id[3];
    711 	u_int8_t	snscb_portname[8];
    712 	u_int8_t	snscb_pnlen;		/* symbolic port name length */
    713 	u_int8_t	snscb_pname[255];	/* symbolic port name */
    714 	u_int8_t	snscb_nodename[8];
    715 	u_int8_t	snscb_nnlen;		/* symbolic node name length */
    716 	u_int8_t	snscb_nname[255];	/* symbolic node name */
    717 	u_int8_t	snscb_ipassoc[8];
    718 	u_int8_t	snscb_ipaddr[16];
    719 	u_int8_t	snscb_svc_class[4];
    720 	u_int8_t	snscb_fc4_types[32];
    721 	u_int8_t	snscb_fpname[8];
    722 	u_int8_t	snscb_reserved;
    723 	u_int8_t	snscb_hardaddr[3];
    724 } sns_ganrsp_t;	/* Subcommand Response Structure */
    725 
    726 #endif	/* _ISPMBOX_H */
    727