ispmbox.h revision 1.31.2.2
1 /* $NetBSD: ispmbox.h,v 1.31.2.2 2001/08/24 00:09:28 nathanw Exp $ */ 2 /* 3 * This driver, which is contained in NetBSD in the files: 4 * 5 * sys/dev/ic/isp.c 6 * sys/dev/ic/isp_inline.h 7 * sys/dev/ic/isp_netbsd.c 8 * sys/dev/ic/isp_netbsd.h 9 * sys/dev/ic/isp_target.c 10 * sys/dev/ic/isp_target.h 11 * sys/dev/ic/isp_tpublic.h 12 * sys/dev/ic/ispmbox.h 13 * sys/dev/ic/ispreg.h 14 * sys/dev/ic/ispvar.h 15 * sys/microcode/isp/asm_sbus.h 16 * sys/microcode/isp/asm_1040.h 17 * sys/microcode/isp/asm_1080.h 18 * sys/microcode/isp/asm_12160.h 19 * sys/microcode/isp/asm_2100.h 20 * sys/microcode/isp/asm_2200.h 21 * sys/pci/isp_pci.c 22 * sys/sbus/isp_sbus.c 23 * 24 * Is being actively maintained by Matthew Jacob (mjacob (at) netbsd.org). 25 * This driver also is shared source with FreeBSD, OpenBSD, Linux, Solaris, 26 * Linux versions. This tends to be an interesting maintenance problem. 27 * 28 * Please coordinate with Matthew Jacob on changes you wish to make here. 29 */ 30 /* 31 * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration 32 * All rights reserved. 33 * 34 * Redistribution and use in source and binary forms, with or without 35 * modification, are permitted provided that the following conditions 36 * are met: 37 * 1. Redistributions of source code must retain the above copyright 38 * notice, this list of conditions and the following disclaimer. 39 * 2. Redistributions in binary form must reproduce the above copyright 40 * notice, this list of conditions and the following disclaimer in the 41 * documentation and/or other materials provided with the distribution. 42 * 3. The name of the author may not be used to endorse or promote products 43 * derived from this software without specific prior written permission 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 55 */ 56 57 /* 58 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 59 * <mjacob (at) nas.nasa.gov> 60 */ 61 #ifndef _ISPMBOX_H 62 #define _ISPMBOX_H 63 64 /* 65 * Mailbox Command Opcodes 66 */ 67 #define MBOX_NO_OP 0x0000 68 #define MBOX_LOAD_RAM 0x0001 69 #define MBOX_EXEC_FIRMWARE 0x0002 70 #define MBOX_DUMP_RAM 0x0003 71 #define MBOX_WRITE_RAM_WORD 0x0004 72 #define MBOX_READ_RAM_WORD 0x0005 73 #define MBOX_MAILBOX_REG_TEST 0x0006 74 #define MBOX_VERIFY_CHECKSUM 0x0007 75 #define MBOX_ABOUT_FIRMWARE 0x0008 76 /* 9 */ 77 /* a */ 78 /* b */ 79 /* c */ 80 /* d */ 81 #define MBOX_CHECK_FIRMWARE 0x000e 82 /* f */ 83 #define MBOX_INIT_REQ_QUEUE 0x0010 84 #define MBOX_INIT_RES_QUEUE 0x0011 85 #define MBOX_EXECUTE_IOCB 0x0012 86 #define MBOX_WAKE_UP 0x0013 87 #define MBOX_STOP_FIRMWARE 0x0014 88 #define MBOX_ABORT 0x0015 89 #define MBOX_ABORT_DEVICE 0x0016 90 #define MBOX_ABORT_TARGET 0x0017 91 #define MBOX_BUS_RESET 0x0018 92 #define MBOX_STOP_QUEUE 0x0019 93 #define MBOX_START_QUEUE 0x001a 94 #define MBOX_SINGLE_STEP_QUEUE 0x001b 95 #define MBOX_ABORT_QUEUE 0x001c 96 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 97 /* 1e */ 98 #define MBOX_GET_FIRMWARE_STATUS 0x001f 99 #define MBOX_GET_INIT_SCSI_ID 0x0020 100 #define MBOX_GET_SELECT_TIMEOUT 0x0021 101 #define MBOX_GET_RETRY_COUNT 0x0022 102 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 103 #define MBOX_GET_CLOCK_RATE 0x0024 104 #define MBOX_GET_ACT_NEG_STATE 0x0025 105 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 106 #define MBOX_GET_SBUS_PARAMS 0x0027 107 #define MBOX_GET_TARGET_PARAMS 0x0028 108 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 109 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 110 /* 2b */ 111 /* 2c */ 112 /* 2d */ 113 /* 2e */ 114 /* 2f */ 115 #define MBOX_SET_INIT_SCSI_ID 0x0030 116 #define MBOX_SET_SELECT_TIMEOUT 0x0031 117 #define MBOX_SET_RETRY_COUNT 0x0032 118 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 119 #define MBOX_SET_CLOCK_RATE 0x0034 120 #define MBOX_SET_ACT_NEG_STATE 0x0035 121 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 122 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 123 #define MBOX_SET_PCI_PARAMETERS 0x0037 124 #define MBOX_SET_TARGET_PARAMS 0x0038 125 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 126 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 127 /* 3b */ 128 /* 3c */ 129 /* 3d */ 130 /* 3e */ 131 /* 3f */ 132 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 133 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 134 #define MBOX_EXEC_BIOS_IOCB 0x0042 135 #define MBOX_SET_FW_FEATURES 0x004a 136 #define MBOX_GET_FW_FEATURES 0x004b 137 #define FW_FEATURE_LVD_NOTIFY 0x2 138 #define FW_FEATURE_FAST_POST 0x1 139 140 #define MBOX_ENABLE_TARGET_MODE 0x55 141 #define ENABLE_TARGET_FLAG 0x8000 142 #define ENABLE_TQING_FLAG 0x0004 143 #define ENABLE_MANDATORY_DISC 0x0002 144 #define MBOX_GET_TARGET_STATUS 0x56 145 146 /* These are for the ISP2100 FC cards */ 147 #define MBOX_GET_LOOP_ID 0x20 148 #define MBOX_GET_RESOURCE_COUNT 0x42 149 #define MBOX_EXEC_COMMAND_IOCB_A64 0x54 150 #define MBOX_INIT_FIRMWARE 0x60 151 #define MBOX_GET_INIT_CONTROL_BLOCK 0x61 152 #define MBOX_INIT_LIP 0x62 153 #define MBOX_GET_FC_AL_POSITION_MAP 0x63 154 #define MBOX_GET_PORT_DB 0x64 155 #define MBOX_CLEAR_ACA 0x65 156 #define MBOX_TARGET_RESET 0x66 157 #define MBOX_CLEAR_TASK_SET 0x67 158 #define MBOX_ABORT_TASK_SET 0x68 159 #define MBOX_GET_FW_STATE 0x69 160 #define MBOX_GET_PORT_NAME 0x6a 161 #define MBOX_GET_LINK_STATUS 0x6b 162 #define MBOX_INIT_LIP_RESET 0x6c 163 #define MBOX_SEND_SNS 0x6e 164 #define MBOX_FABRIC_LOGIN 0x6f 165 #define MBOX_SEND_CHANGE_REQUEST 0x70 166 #define MBOX_FABRIC_LOGOUT 0x71 167 #define MBOX_INIT_LIP_LOGIN 0x72 168 169 #define ISP2100_SET_PCI_PARAM 0x00ff 170 171 #define MBOX_BUSY 0x04 172 173 typedef struct { 174 u_int16_t param[8]; 175 } mbreg_t; 176 177 /* 178 * Mailbox Command Complete Status Codes 179 */ 180 #define MBOX_COMMAND_COMPLETE 0x4000 181 #define MBOX_INVALID_COMMAND 0x4001 182 #define MBOX_HOST_INTERFACE_ERROR 0x4002 183 #define MBOX_TEST_FAILED 0x4003 184 #define MBOX_COMMAND_ERROR 0x4005 185 #define MBOX_COMMAND_PARAM_ERROR 0x4006 186 #define MBOX_PORT_ID_USED 0x4007 187 #define MBOX_LOOP_ID_USED 0x4008 188 #define MBOX_ALL_IDS_USED 0x4009 189 #define MBOX_NOT_LOGGED_IN 0x400A 190 #define MBLOGALL 0x000f 191 #define MBLOGNONE 0x0000 192 #define MBLOGMASK(x) ((x) & 0xf) 193 194 /* 195 * Asynchronous event status codes 196 */ 197 #define ASYNC_BUS_RESET 0x8001 198 #define ASYNC_SYSTEM_ERROR 0x8002 199 #define ASYNC_RQS_XFER_ERR 0x8003 200 #define ASYNC_RSP_XFER_ERR 0x8004 201 #define ASYNC_QWAKEUP 0x8005 202 #define ASYNC_TIMEOUT_RESET 0x8006 203 #define ASYNC_DEVICE_RESET 0x8007 204 #define ASYNC_EXTMSG_UNDERRUN 0x800A 205 #define ASYNC_SCAM_INT 0x800B 206 #define ASYNC_HUNG_SCSI 0x800C 207 #define ASYNC_KILLED_BUS 0x800D 208 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 209 #define ASYNC_LIP_OCCURRED 0x8010 210 #define ASYNC_LOOP_UP 0x8011 211 #define ASYNC_LOOP_DOWN 0x8012 212 #define ASYNC_LOOP_RESET 0x8013 213 #define ASYNC_PDB_CHANGED 0x8014 214 #define ASYNC_CHANGE_NOTIFY 0x8015 215 #define ASYNC_CMD_CMPLT 0x8020 216 #define ASYNC_CTIO_DONE 0x8021 217 #define ASYNC_IP_XMIT_DONE 0x8022 218 #define ASYNC_IP_RECV_DONE 0x8023 219 #define ASYNC_IP_BROADCAST 0x8024 220 #define ASYNC_IP_RCVQ_LOW 0x8025 221 #define ASYNC_IP_RCVQ_EMPTY 0x8026 222 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 223 #define ASYNC_PTPMODE 0x8030 224 #define ASYNC_RIO1 0x8031 225 #define ASYNC_RIO2 0x8032 226 #define ASYNC_RIO3 0x8033 227 #define ASYNC_RIO4 0x8034 228 #define ASYNC_RIO5 0x8035 229 #define ASYNC_CONNMODE 0x8036 230 #define ISP_CONN_LOOP 1 231 #define ISP_CONN_PTP 2 232 #define ISP_CONN_BADLIP 3 233 #define ISP_CONN_FATAL 4 234 #define ISP_CONN_LOOPBACK 5 235 #define ASYNC_RIO_RESP 0x8040 236 #define ASYNC_RIO_COMP 0x8042 237 /* 238 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 239 * mailbox command to enable this. 240 */ 241 #define ASYNC_QFULL_SENT 0x8049 242 243 /* 244 * Mailbox Usages 245 */ 246 247 #define WRITE_REQUEST_QUEUE_IN_POINTER(isp, value) \ 248 ISP_WRITE(isp, INMAILBOX4, value) 249 250 #define READ_REQUEST_QUEUE_OUT_POINTER(isp) \ 251 ISP_READ(isp, OUTMAILBOX4) 252 253 #define WRITE_RESPONSE_QUEUE_IN_POINTER(isp, value) \ 254 ISP_WRITE(isp, INMAILBOX5, value) 255 256 #define READ_RESPONSE_QUEUE_OUT_POINTER(isp) \ 257 ISP_READ(isp, OUTMAILBOX5) 258 259 /* 260 * Command Structure Definitions 261 */ 262 263 typedef struct { 264 u_int32_t ds_base; 265 u_int32_t ds_count; 266 } ispds_t; 267 268 typedef struct { 269 u_int64_t ds_base; 270 u_int32_t ds_count; 271 } ispds64_t; 272 273 typedef struct { 274 u_int16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 275 u_int32_t ds_segment; /* unused */ 276 u_int32_t ds_base; /* 32 bit address of DSD list */ 277 } ispdslist_t; 278 279 280 /* 281 * These elements get swizzled around for SBus instances. 282 */ 283 #define _ISP_SWAP8(a, b) { \ 284 u_int8_t tmp; \ 285 tmp = a; \ 286 a = b; \ 287 b = tmp; \ 288 } 289 typedef struct { 290 u_int8_t rqs_entry_type; 291 u_int8_t rqs_entry_count; 292 u_int8_t rqs_seqno; 293 u_int8_t rqs_flags; 294 } isphdr_t; 295 /* 296 * There are no (for all intents and purposes) non-sparc SBus machines 297 */ 298 #ifdef __sparc__ 299 #define ISP_SBUSIFY_ISPHDR(isp, hdrp) \ 300 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 301 _ISP_SWAP8((hdrp)->rqs_entry_count, (hdrp)->rqs_entry_type); \ 302 _ISP_SWAP8((hdrp)->rqs_flags, (hdrp)->rqs_seqno); \ 303 } 304 #else 305 #define ISP_SBUSIFY_ISPHDR(a, b) 306 #endif 307 308 /* RQS Flag definitions */ 309 #define RQSFLAG_CONTINUATION 0x01 310 #define RQSFLAG_FULL 0x02 311 #define RQSFLAG_BADHEADER 0x04 312 #define RQSFLAG_BADPACKET 0x08 313 314 /* RQS entry_type definitions */ 315 #define RQSTYPE_REQUEST 0x01 316 #define RQSTYPE_DATASEG 0x02 317 #define RQSTYPE_RESPONSE 0x03 318 #define RQSTYPE_MARKER 0x04 319 #define RQSTYPE_CMDONLY 0x05 320 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 321 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 322 #define RQSTYPE_SCAM 0x08 323 #define RQSTYPE_A64 0x09 324 #define RQSTYPE_A64_CONT 0x0a 325 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 326 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 327 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 328 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 329 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 330 #define RQSTYPE_STATUS_CONT 0x10 331 #define RQSTYPE_T2RQS 0x11 332 #define RQSTYPE_IP_XMIT 0x13 333 #define RQSTYPE_T4RQS 0x15 334 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 335 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 336 #define RQSTYPE_CSET0 0x18 337 #define RQSTYPE_T3RQS 0x19 338 #define RQSTYPE_IP_XMIT_64 0x1b 339 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 340 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 341 #define RQSTYPE_RIO1 0x21 342 #define RQSTYPE_RIO2 0x22 343 #define RQSTYPE_IP_RECV 0x23 344 #define RQSTYPE_IP_RECV_CONT 0x24 345 346 347 #define ISP_RQDSEG 4 348 typedef struct { 349 isphdr_t req_header; 350 u_int32_t req_handle; 351 u_int8_t req_lun_trn; 352 u_int8_t req_target; 353 u_int16_t req_cdblen; 354 #define req_modifier req_cdblen /* marker packet */ 355 u_int16_t req_flags; 356 u_int16_t req_reserved; 357 u_int16_t req_time; 358 u_int16_t req_seg_count; 359 u_int8_t req_cdb[12]; 360 ispds_t req_dataseg[ISP_RQDSEG]; 361 } ispreq_t; 362 363 /* 364 * A request packet can also be a marker packet. 365 */ 366 #define SYNC_DEVICE 0 367 #define SYNC_TARGET 1 368 #define SYNC_ALL 2 369 370 /* 371 * There are no (for all intents and purposes) non-sparc SBus machines 372 */ 373 #ifdef __sparc__ 374 #define ISP_SBUSIFY_ISPREQ(isp, rqp) \ 375 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 376 _ISP_SWAP8((rqp)->req_target, (rqp)->req_lun_trn); \ 377 } 378 #else 379 #define ISP_SBUSIFY_ISPREQ(a, b) 380 #endif 381 382 #define ISP_RQDSEG_T2 3 383 typedef struct { 384 isphdr_t req_header; 385 u_int32_t req_handle; 386 u_int8_t req_lun_trn; 387 u_int8_t req_target; 388 u_int16_t req_scclun; 389 u_int16_t req_flags; 390 u_int16_t _res2; 391 u_int16_t req_time; 392 u_int16_t req_seg_count; 393 u_int32_t req_cdb[4]; 394 u_int32_t req_totalcnt; 395 ispds_t req_dataseg[ISP_RQDSEG_T2]; 396 } ispreqt2_t; 397 398 /* req_flag values */ 399 #define REQFLAG_NODISCON 0x0001 400 #define REQFLAG_HTAG 0x0002 401 #define REQFLAG_OTAG 0x0004 402 #define REQFLAG_STAG 0x0008 403 #define REQFLAG_TARGET_RTN 0x0010 404 405 #define REQFLAG_NODATA 0x0000 406 #define REQFLAG_DATA_IN 0x0020 407 #define REQFLAG_DATA_OUT 0x0040 408 #define REQFLAG_DATA_UNKNOWN 0x0060 409 410 #define REQFLAG_DISARQ 0x0100 411 #define REQFLAG_FRC_ASYNC 0x0200 412 #define REQFLAG_FRC_SYNC 0x0400 413 #define REQFLAG_FRC_WIDE 0x0800 414 #define REQFLAG_NOPARITY 0x1000 415 #define REQFLAG_STOPQ 0x2000 416 #define REQFLAG_XTRASNS 0x4000 417 #define REQFLAG_PRIORITY 0x8000 418 419 typedef struct { 420 isphdr_t req_header; 421 u_int32_t req_handle; 422 u_int8_t req_lun_trn; 423 u_int8_t req_target; 424 u_int16_t req_cdblen; 425 u_int16_t req_flags; 426 u_int16_t _res1; 427 u_int16_t req_time; 428 u_int16_t req_seg_count; 429 u_int8_t req_cdb[44]; 430 } ispextreq_t; 431 432 #define ISP_CDSEG 7 433 typedef struct { 434 isphdr_t req_header; 435 u_int32_t _res1; 436 ispds_t req_dataseg[ISP_CDSEG]; 437 } ispcontreq_t; 438 439 typedef struct { 440 isphdr_t req_header; 441 u_int32_t req_handle; 442 u_int16_t req_scsi_status; 443 u_int16_t req_completion_status; 444 u_int16_t req_state_flags; 445 u_int16_t req_status_flags; 446 u_int16_t req_time; 447 #define req_response_len req_time /* FC only */ 448 u_int16_t req_sense_len; 449 u_int32_t req_resid; 450 u_int8_t req_response[8]; /* FC only */ 451 u_int8_t req_sense_data[32]; 452 } ispstatusreq_t; 453 454 /* 455 * For Qlogic 2X00, the high order byte of SCSI status has 456 * additional meaning. 457 */ 458 #define RQCS_RU 0x800 /* Residual Under */ 459 #define RQCS_RO 0x400 /* Residual Over */ 460 #define RQCS_RESID (RQCS_RU|RQCS_RO) 461 #define RQCS_SV 0x200 /* Sense Length Valid */ 462 #define RQCS_RV 0x100 /* FCP Response Length Valid */ 463 464 /* 465 * Completion Status Codes. 466 */ 467 #define RQCS_COMPLETE 0x0000 468 #define RQCS_DMA_ERROR 0x0002 469 #define RQCS_RESET_OCCURRED 0x0004 470 #define RQCS_ABORTED 0x0005 471 #define RQCS_TIMEOUT 0x0006 472 #define RQCS_DATA_OVERRUN 0x0007 473 #define RQCS_DATA_UNDERRUN 0x0015 474 #define RQCS_QUEUE_FULL 0x001C 475 476 /* 1X00 Only Completion Codes */ 477 #define RQCS_INCOMPLETE 0x0001 478 #define RQCS_TRANSPORT_ERROR 0x0003 479 #define RQCS_COMMAND_OVERRUN 0x0008 480 #define RQCS_STATUS_OVERRUN 0x0009 481 #define RQCS_BAD_MESSAGE 0x000a 482 #define RQCS_NO_MESSAGE_OUT 0x000b 483 #define RQCS_EXT_ID_FAILED 0x000c 484 #define RQCS_IDE_MSG_FAILED 0x000d 485 #define RQCS_ABORT_MSG_FAILED 0x000e 486 #define RQCS_REJECT_MSG_FAILED 0x000f 487 #define RQCS_NOP_MSG_FAILED 0x0010 488 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 489 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 490 #define RQCS_ID_MSG_FAILED 0x0013 491 #define RQCS_UNEXP_BUS_FREE 0x0014 492 #define RQCS_XACT_ERR1 0x0018 493 #define RQCS_XACT_ERR2 0x0019 494 #define RQCS_XACT_ERR3 0x001A 495 #define RQCS_BAD_ENTRY 0x001B 496 #define RQCS_PHASE_SKIPPED 0x001D 497 #define RQCS_ARQS_FAILED 0x001E 498 #define RQCS_WIDE_FAILED 0x001F 499 #define RQCS_SYNCXFER_FAILED 0x0020 500 #define RQCS_LVD_BUSERR 0x0021 501 502 /* 2X00 Only Completion Codes */ 503 #define RQCS_PORT_UNAVAILABLE 0x0028 504 #define RQCS_PORT_LOGGED_OUT 0x0029 505 #define RQCS_PORT_CHANGED 0x002A 506 #define RQCS_PORT_BUSY 0x002B 507 508 /* 509 * 1X00 specific State Flags 510 */ 511 #define RQSF_GOT_BUS 0x0100 512 #define RQSF_GOT_TARGET 0x0200 513 #define RQSF_SENT_CDB 0x0400 514 #define RQSF_XFRD_DATA 0x0800 515 #define RQSF_GOT_STATUS 0x1000 516 #define RQSF_GOT_SENSE 0x2000 517 #define RQSF_XFER_COMPLETE 0x4000 518 519 /* 520 * 2X00 specific State Flags 521 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 522 */ 523 #define RQSF_DATA_IN 0x0020 524 #define RQSF_DATA_OUT 0x0040 525 #define RQSF_STAG 0x0008 526 #define RQSF_OTAG 0x0004 527 #define RQSF_HTAG 0x0002 528 /* 529 * 1X00 Status Flags 530 */ 531 #define RQSTF_DISCONNECT 0x0001 532 #define RQSTF_SYNCHRONOUS 0x0002 533 #define RQSTF_PARITY_ERROR 0x0004 534 #define RQSTF_BUS_RESET 0x0008 535 #define RQSTF_DEVICE_RESET 0x0010 536 #define RQSTF_ABORTED 0x0020 537 #define RQSTF_TIMEOUT 0x0040 538 #define RQSTF_NEGOTIATION 0x0080 539 540 /* 541 * 2X00 specific state flags 542 */ 543 /* RQSF_SENT_CDB */ 544 /* RQSF_XFRD_DATA */ 545 /* RQSF_GOT_STATUS */ 546 /* RQSF_XFER_COMPLETE */ 547 548 /* 549 * 2X00 specific status flags 550 */ 551 /* RQSTF_ABORTED */ 552 /* RQSTF_TIMEOUT */ 553 #define RQSTF_DMA_ERROR 0x0080 554 #define RQSTF_LOGOUT 0x2000 555 556 /* 557 * Miscellaneous 558 */ 559 #ifndef ISP_EXEC_THROTTLE 560 #define ISP_EXEC_THROTTLE 16 561 #endif 562 563 /* 564 * About Firmware returns an 'attribute' word in mailbox 6. 565 */ 566 #define ISP_FW_ATTR_TMODE 0x01 567 #define ISP_FW_ATTR_SCCLUN 0x02 568 #define ISP_FW_ATTR_FABRIC 0x04 569 #define ISP_FW_ATTR_CLASS2 0x08 570 #define ISP_FW_ATTR_FCTAPE 0x10 571 #define ISP_FW_ATTR_IP 0x20 572 573 /* 574 * Reduced Interrupt Operation Response Queue Entreis 575 */ 576 577 typedef struct { 578 isphdr_t req_header; 579 u_int32_t req_handles[15]; 580 } isp_rio1_t; 581 582 typedef struct { 583 isphdr_t req_header; 584 u_int16_t req_handles[30]; 585 } isp_rio2_t; 586 587 /* 588 * FC (ISP2100) specific data structures 589 */ 590 591 /* 592 * Initialization Control Block 593 * 594 * Version One (prime) format. 595 */ 596 typedef struct isp_icb { 597 u_int8_t icb_version; 598 u_int8_t _reserved0; 599 u_int16_t icb_fwoptions; 600 u_int16_t icb_maxfrmlen; 601 u_int16_t icb_maxalloc; 602 u_int16_t icb_execthrottle; 603 u_int8_t icb_retry_count; 604 u_int8_t icb_retry_delay; 605 u_int8_t icb_portname[8]; 606 u_int16_t icb_hardaddr; 607 u_int8_t icb_iqdevtype; 608 u_int8_t icb_logintime; 609 u_int8_t icb_nodename[8]; 610 u_int16_t icb_rqstout; 611 u_int16_t icb_rspnsin; 612 u_int16_t icb_rqstqlen; 613 u_int16_t icb_rsltqlen; 614 u_int16_t icb_rqstaddr[4]; 615 u_int16_t icb_respaddr[4]; 616 u_int16_t icb_lunenables; 617 u_int8_t icb_ccnt; 618 u_int8_t icb_icnt; 619 u_int16_t icb_lunetimeout; 620 u_int16_t _reserved1; 621 u_int16_t icb_xfwoptions; 622 u_int8_t icb_racctimer; 623 u_int8_t icb_idelaytimer; 624 u_int16_t icb_zfwoptions; 625 u_int16_t _reserved2[13]; 626 } isp_icb_t; 627 #define ICB_VERSION1 1 628 629 #define ICBOPT_HARD_ADDRESS 0x0001 630 #define ICBOPT_FAIRNESS 0x0002 631 #define ICBOPT_FULL_DUPLEX 0x0004 632 #define ICBOPT_FAST_POST 0x0008 633 #define ICBOPT_TGT_ENABLE 0x0010 634 #define ICBOPT_INI_DISABLE 0x0020 635 #define ICBOPT_INI_ADISC 0x0040 636 #define ICBOPT_INI_TGTTYPE 0x0080 637 #define ICBOPT_PDBCHANGE_AE 0x0100 638 #define ICBOPT_NOLIP 0x0200 639 #define ICBOPT_SRCHDOWN 0x0400 640 #define ICBOPT_PREVLOOP 0x0800 641 #define ICBOPT_STOP_ON_QFULL 0x1000 642 #define ICBOPT_FULL_LOGIN 0x2000 643 #define ICBOPT_BOTH_WWNS 0x4000 644 #define ICBOPT_EXTENDED 0x8000 645 646 #define ICBXOPT_CLASS2_ACK0 0x0200 647 #define ICBXOPT_CLASS2 0x0100 648 #define ICBXOPT_LOOP_ONLY (0 << 4) 649 #define ICBXOPT_PTP_ONLY (1 << 4) 650 #define ICBXOPT_LOOP_2_PTP (2 << 4) 651 #define ICBXOPT_PTP_2_LOOP (3 << 4) 652 653 #define ICBXOPT_RIO_OFF 0 654 #define ICBXOPT_RIO_16BIT 1 655 #define ICBXOPT_RIO_32BIT 2 656 #define ICBXOPT_RIO_16BIT_DELAY 3 657 #define ICBXOPT_RIO_32BIT_DELAY 4 658 659 660 661 #define ICB_MIN_FRMLEN 256 662 #define ICB_MAX_FRMLEN 2112 663 #define ICB_DFLT_FRMLEN 1024 664 #define ICB_DFLT_ALLOC 256 665 #define ICB_DFLT_THROTTLE 16 666 #define ICB_DFLT_RDELAY 5 667 #define ICB_DFLT_RCOUNT 3 668 669 670 #define RQRSP_ADDR0015 0 671 #define RQRSP_ADDR1631 1 672 #define RQRSP_ADDR3247 2 673 #define RQRSP_ADDR4863 3 674 675 676 #define ICB_NNM0 7 677 #define ICB_NNM1 6 678 #define ICB_NNM2 5 679 #define ICB_NNM3 4 680 #define ICB_NNM4 3 681 #define ICB_NNM5 2 682 #define ICB_NNM6 1 683 #define ICB_NNM7 0 684 685 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 686 array[ICB_NNM0] = (u_int8_t) ((wwn >> 0) & 0xff), \ 687 array[ICB_NNM1] = (u_int8_t) ((wwn >> 8) & 0xff), \ 688 array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \ 689 array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \ 690 array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \ 691 array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \ 692 array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \ 693 array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff) 694 695 /* 696 * FC-AL Position Map 697 * 698 * This is an at most 128 byte map that returns either 699 * the LILP or Firmware generated list of ports. 700 * 701 * We deviate a bit from the returned qlogic format to 702 * use an extra bit to say whether this was a LILP or 703 * f/w generated map. 704 */ 705 typedef struct { 706 u_int8_t fwmap : 1, 707 count : 7; 708 u_int8_t map[127]; 709 } fcpos_map_t; 710 711 /* 712 * Port Data Base Element 713 */ 714 715 typedef struct { 716 u_int16_t pdb_options; 717 u_int8_t pdb_mstate; 718 u_int8_t pdb_sstate; 719 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 720 u_int8_t pdb_hardaddr_bits[4]; 721 u_int8_t pdb_portid_bits[4]; 722 u_int8_t pdb_nodename[8]; 723 u_int8_t pdb_portname[8]; 724 u_int16_t pdb_execthrottle; 725 u_int16_t pdb_exec_count; 726 u_int8_t pdb_retry_count; 727 u_int8_t pdb_retry_delay; 728 u_int16_t pdb_resalloc; 729 u_int16_t pdb_curalloc; 730 u_int16_t pdb_qhead; 731 u_int16_t pdb_qtail; 732 u_int16_t pdb_tl_next; 733 u_int16_t pdb_tl_last; 734 u_int16_t pdb_features; /* PLOGI, Common Service */ 735 u_int16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 736 u_int16_t pdb_roi; /* PLOGI, Common Service */ 737 u_int8_t pdb_target; 738 u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 739 u_int16_t pdb_rdsiz; /* PLOGI, Class 3 */ 740 u_int16_t pdb_ncseq; /* PLOGI, Class 3 */ 741 u_int16_t pdb_noseq; /* PLOGI, Class 3 */ 742 u_int16_t pdb_labrtflg; 743 u_int16_t pdb_lstopflg; 744 u_int16_t pdb_sqhead; 745 u_int16_t pdb_sqtail; 746 u_int16_t pdb_ptimer; 747 u_int16_t pdb_nxt_seqid; 748 u_int16_t pdb_fcount; 749 u_int16_t pdb_prli_len; 750 u_int16_t pdb_prli_svc0; 751 u_int16_t pdb_prli_svc3; 752 u_int16_t pdb_loopid; 753 u_int16_t pdb_il_ptr; 754 u_int16_t pdb_sl_ptr; 755 } isp_pdb_t; 756 757 #define PDB_OPTIONS_XMITTING (1<<11) 758 #define PDB_OPTIONS_LNKXMIT (1<<10) 759 #define PDB_OPTIONS_ABORTED (1<<9) 760 #define PDB_OPTIONS_ADISC (1<<1) 761 762 #define PDB_STATE_DISCOVERY 0 763 #define PDB_STATE_WDISC_ACK 1 764 #define PDB_STATE_PLOGI 2 765 #define PDB_STATE_PLOGI_ACK 3 766 #define PDB_STATE_PRLI 4 767 #define PDB_STATE_PRLI_ACK 5 768 #define PDB_STATE_LOGGED_IN 6 769 #define PDB_STATE_PORT_UNAVAIL 7 770 #define PDB_STATE_PRLO 8 771 #define PDB_STATE_PRLO_ACK 9 772 #define PDB_STATE_PLOGO 10 773 #define PDB_STATE_PLOG_ACK 11 774 775 #define SVC3_TGT_ROLE 0x10 776 #define SVC3_INI_ROLE 0x20 777 #define SVC3_ROLE_MASK 0x30 778 #define SVC3_ROLE_SHIFT 4 779 780 #define SNS_GAN 0x100 781 #define SNS_GP3 0x171 782 #define SNS_RFT 0x217 783 typedef struct { 784 u_int16_t snscb_rblen; /* response buffer length (words) */ 785 u_int16_t snscb_res0; 786 u_int16_t snscb_addr[4]; /* response buffer address */ 787 u_int16_t snscb_sblen; /* subcommand buffer length (words) */ 788 u_int16_t snscb_res1; 789 u_int16_t snscb_data[1]; /* variable data */ 790 } sns_screq_t; /* Subcommand Request Structure */ 791 #define SNS_GAN_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 792 #define SNS_GP3_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 793 #define SNS_RFT_REQ_SIZE (sizeof (sns_screq_t)+(21*(sizeof (u_int16_t)))) 794 795 typedef struct { 796 u_int8_t snscb_cthdr[16]; 797 u_int8_t snscb_port_type; 798 u_int8_t snscb_port_id[3]; 799 u_int8_t snscb_portname[8]; 800 u_int16_t snscb_data[1]; /* variable data */ 801 } sns_scrsp_t; /* Subcommand Response Structure */ 802 #define SNS_GAN_RESP_SIZE 608 /* Maximum response size (bytes) */ 803 #define SNS_GP3_RESP_SIZE 532 /* XXX: For 128 ports */ 804 #define SNS_RFT_RESP_SIZE 16 805 806 typedef struct { 807 u_int8_t snscb_cthdr[16]; 808 u_int8_t snscb_port_type; 809 u_int8_t snscb_port_id[3]; 810 u_int8_t snscb_portname[8]; 811 u_int8_t snscb_pnlen; /* symbolic port name length */ 812 u_int8_t snscb_pname[255]; /* symbolic port name */ 813 u_int8_t snscb_nodename[8]; 814 u_int8_t snscb_nnlen; /* symbolic node name length */ 815 u_int8_t snscb_nname[255]; /* symbolic node name */ 816 u_int8_t snscb_ipassoc[8]; 817 u_int8_t snscb_ipaddr[16]; 818 u_int8_t snscb_svc_class[4]; 819 u_int8_t snscb_fc4_types[32]; 820 u_int8_t snscb_fpname[8]; 821 u_int8_t snscb_reserved; 822 u_int8_t snscb_hardaddr[3]; 823 } sns_ganrsp_t; /* Subcommand Response Structure */ 824 825 #endif /* _ISPMBOX_H */ 826
Indexes created Sat Oct 25 16:10:12 GMT 2025