ispmbox.h revision 1.34
1 /* $NetBSD: ispmbox.h,v 1.34 2001/09/01 07:12:24 mjacob Exp $ */ 2 /* 3 * This driver, which is contained in NetBSD in the files: 4 * 5 * sys/dev/ic/isp.c 6 * sys/dev/ic/isp_inline.h 7 * sys/dev/ic/isp_netbsd.c 8 * sys/dev/ic/isp_netbsd.h 9 * sys/dev/ic/isp_target.c 10 * sys/dev/ic/isp_target.h 11 * sys/dev/ic/isp_tpublic.h 12 * sys/dev/ic/ispmbox.h 13 * sys/dev/ic/ispreg.h 14 * sys/dev/ic/ispvar.h 15 * sys/microcode/isp/asm_sbus.h 16 * sys/microcode/isp/asm_1040.h 17 * sys/microcode/isp/asm_1080.h 18 * sys/microcode/isp/asm_12160.h 19 * sys/microcode/isp/asm_2100.h 20 * sys/microcode/isp/asm_2200.h 21 * sys/pci/isp_pci.c 22 * sys/sbus/isp_sbus.c 23 * 24 * Is being actively maintained by Matthew Jacob (mjacob (at) netbsd.org). 25 * This driver also is shared source with FreeBSD, OpenBSD, Linux, Solaris, 26 * Linux versions. This tends to be an interesting maintenance problem. 27 * 28 * Please coordinate with Matthew Jacob on changes you wish to make here. 29 */ 30 /* 31 * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration 32 * All rights reserved. 33 * 34 * Redistribution and use in source and binary forms, with or without 35 * modification, are permitted provided that the following conditions 36 * are met: 37 * 1. Redistributions of source code must retain the above copyright 38 * notice, this list of conditions and the following disclaimer. 39 * 2. Redistributions in binary form must reproduce the above copyright 40 * notice, this list of conditions and the following disclaimer in the 41 * documentation and/or other materials provided with the distribution. 42 * 3. The name of the author may not be used to endorse or promote products 43 * derived from this software without specific prior written permission 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 55 */ 56 57 /* 58 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 59 * <mjacob (at) nas.nasa.gov> 60 */ 61 #ifndef _ISPMBOX_H 62 #define _ISPMBOX_H 63 64 /* 65 * Mailbox Command Opcodes 66 */ 67 #define MBOX_NO_OP 0x0000 68 #define MBOX_LOAD_RAM 0x0001 69 #define MBOX_EXEC_FIRMWARE 0x0002 70 #define MBOX_DUMP_RAM 0x0003 71 #define MBOX_WRITE_RAM_WORD 0x0004 72 #define MBOX_READ_RAM_WORD 0x0005 73 #define MBOX_MAILBOX_REG_TEST 0x0006 74 #define MBOX_VERIFY_CHECKSUM 0x0007 75 #define MBOX_ABOUT_FIRMWARE 0x0008 76 /* 9 */ 77 /* a */ 78 /* b */ 79 /* c */ 80 /* d */ 81 #define MBOX_CHECK_FIRMWARE 0x000e 82 /* f */ 83 #define MBOX_INIT_REQ_QUEUE 0x0010 84 #define MBOX_INIT_RES_QUEUE 0x0011 85 #define MBOX_EXECUTE_IOCB 0x0012 86 #define MBOX_WAKE_UP 0x0013 87 #define MBOX_STOP_FIRMWARE 0x0014 88 #define MBOX_ABORT 0x0015 89 #define MBOX_ABORT_DEVICE 0x0016 90 #define MBOX_ABORT_TARGET 0x0017 91 #define MBOX_BUS_RESET 0x0018 92 #define MBOX_STOP_QUEUE 0x0019 93 #define MBOX_START_QUEUE 0x001a 94 #define MBOX_SINGLE_STEP_QUEUE 0x001b 95 #define MBOX_ABORT_QUEUE 0x001c 96 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 97 /* 1e */ 98 #define MBOX_GET_FIRMWARE_STATUS 0x001f 99 #define MBOX_GET_INIT_SCSI_ID 0x0020 100 #define MBOX_GET_SELECT_TIMEOUT 0x0021 101 #define MBOX_GET_RETRY_COUNT 0x0022 102 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 103 #define MBOX_GET_CLOCK_RATE 0x0024 104 #define MBOX_GET_ACT_NEG_STATE 0x0025 105 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 106 #define MBOX_GET_SBUS_PARAMS 0x0027 107 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 108 #define MBOX_GET_TARGET_PARAMS 0x0028 109 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 110 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 111 /* 2b */ 112 /* 2c */ 113 /* 2d */ 114 /* 2e */ 115 /* 2f */ 116 #define MBOX_SET_INIT_SCSI_ID 0x0030 117 #define MBOX_SET_SELECT_TIMEOUT 0x0031 118 #define MBOX_SET_RETRY_COUNT 0x0032 119 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 120 #define MBOX_SET_CLOCK_RATE 0x0034 121 #define MBOX_SET_ACT_NEG_STATE 0x0035 122 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 123 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 124 #define MBOX_SET_PCI_PARAMETERS 0x0037 125 #define MBOX_SET_TARGET_PARAMS 0x0038 126 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 127 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 128 /* 3b */ 129 /* 3c */ 130 /* 3d */ 131 /* 3e */ 132 /* 3f */ 133 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 134 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 135 #define MBOX_EXEC_BIOS_IOCB 0x0042 136 #define MBOX_SET_FW_FEATURES 0x004a 137 #define MBOX_GET_FW_FEATURES 0x004b 138 #define FW_FEATURE_LVD_NOTIFY 0x2 139 #define FW_FEATURE_FAST_POST 0x1 140 141 #define MBOX_ENABLE_TARGET_MODE 0x55 142 #define ENABLE_TARGET_FLAG 0x8000 143 #define ENABLE_TQING_FLAG 0x0004 144 #define ENABLE_MANDATORY_DISC 0x0002 145 #define MBOX_GET_TARGET_STATUS 0x56 146 147 /* These are for the ISP2100 FC cards */ 148 #define MBOX_GET_LOOP_ID 0x20 149 #define MBOX_GET_FIRMWARE_OPTIONS 0x28 150 #define MBOX_SET_FIRMWARE_OPTIONS 0x38 151 #define MBOX_GET_RESOURCE_COUNT 0x42 152 #define MBOX_ENHANCED_GET_PDB 0x47 153 #define MBOX_EXEC_COMMAND_IOCB_A64 0x54 154 #define MBOX_INIT_FIRMWARE 0x60 155 #define MBOX_GET_INIT_CONTROL_BLOCK 0x61 156 #define MBOX_INIT_LIP 0x62 157 #define MBOX_GET_FC_AL_POSITION_MAP 0x63 158 #define MBOX_GET_PORT_DB 0x64 159 #define MBOX_CLEAR_ACA 0x65 160 #define MBOX_TARGET_RESET 0x66 161 #define MBOX_CLEAR_TASK_SET 0x67 162 #define MBOX_ABORT_TASK_SET 0x68 163 #define MBOX_GET_FW_STATE 0x69 164 #define MBOX_GET_PORT_NAME 0x6a 165 #define MBOX_GET_LINK_STATUS 0x6b 166 #define MBOX_INIT_LIP_RESET 0x6c 167 #define MBOX_SEND_SNS 0x6e 168 #define MBOX_FABRIC_LOGIN 0x6f 169 #define MBOX_SEND_CHANGE_REQUEST 0x70 170 #define MBOX_FABRIC_LOGOUT 0x71 171 #define MBOX_INIT_LIP_LOGIN 0x72 172 173 #define ISP2100_SET_PCI_PARAM 0x00ff 174 175 #define MBOX_BUSY 0x04 176 177 typedef struct { 178 u_int16_t param[8]; 179 } mbreg_t; 180 181 /* 182 * Mailbox Command Complete Status Codes 183 */ 184 #define MBOX_COMMAND_COMPLETE 0x4000 185 #define MBOX_INVALID_COMMAND 0x4001 186 #define MBOX_HOST_INTERFACE_ERROR 0x4002 187 #define MBOX_TEST_FAILED 0x4003 188 #define MBOX_COMMAND_ERROR 0x4005 189 #define MBOX_COMMAND_PARAM_ERROR 0x4006 190 #define MBOX_PORT_ID_USED 0x4007 191 #define MBOX_LOOP_ID_USED 0x4008 192 #define MBOX_ALL_IDS_USED 0x4009 193 #define MBOX_NOT_LOGGED_IN 0x400A 194 #define MBLOGALL 0x000f 195 #define MBLOGNONE 0x0000 196 #define MBLOGMASK(x) ((x) & 0xf) 197 198 /* 199 * Asynchronous event status codes 200 */ 201 #define ASYNC_BUS_RESET 0x8001 202 #define ASYNC_SYSTEM_ERROR 0x8002 203 #define ASYNC_RQS_XFER_ERR 0x8003 204 #define ASYNC_RSP_XFER_ERR 0x8004 205 #define ASYNC_QWAKEUP 0x8005 206 #define ASYNC_TIMEOUT_RESET 0x8006 207 #define ASYNC_DEVICE_RESET 0x8007 208 #define ASYNC_EXTMSG_UNDERRUN 0x800A 209 #define ASYNC_SCAM_INT 0x800B 210 #define ASYNC_HUNG_SCSI 0x800C 211 #define ASYNC_KILLED_BUS 0x800D 212 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 213 #define ASYNC_LIP_OCCURRED 0x8010 214 #define ASYNC_LOOP_UP 0x8011 215 #define ASYNC_LOOP_DOWN 0x8012 216 #define ASYNC_LOOP_RESET 0x8013 217 #define ASYNC_PDB_CHANGED 0x8014 218 #define ASYNC_CHANGE_NOTIFY 0x8015 219 #define ASYNC_LIP_F8 0x8016 220 #define ASYNC_CMD_CMPLT 0x8020 221 #define ASYNC_CTIO_DONE 0x8021 222 #define ASYNC_IP_XMIT_DONE 0x8022 223 #define ASYNC_IP_RECV_DONE 0x8023 224 #define ASYNC_IP_BROADCAST 0x8024 225 #define ASYNC_IP_RCVQ_LOW 0x8025 226 #define ASYNC_IP_RCVQ_EMPTY 0x8026 227 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 228 #define ASYNC_PTPMODE 0x8030 229 #define ASYNC_RIO1 0x8031 230 #define ASYNC_RIO2 0x8032 231 #define ASYNC_RIO3 0x8033 232 #define ASYNC_RIO4 0x8034 233 #define ASYNC_RIO5 0x8035 234 #define ASYNC_CONNMODE 0x8036 235 #define ISP_CONN_LOOP 1 236 #define ISP_CONN_PTP 2 237 #define ISP_CONN_BADLIP 3 238 #define ISP_CONN_FATAL 4 239 #define ISP_CONN_LOOPBACK 5 240 #define ASYNC_RIO_RESP 0x8040 241 #define ASYNC_RIO_COMP 0x8042 242 /* 243 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 244 * mailbox command to enable this. 245 */ 246 #define ASYNC_QFULL_SENT 0x8049 247 248 /* 249 * Mailbox Usages 250 */ 251 252 #define WRITE_REQUEST_QUEUE_IN_POINTER(isp, value) \ 253 ISP_WRITE(isp, isp->isp_rqstinrp, value) 254 255 #define READ_REQUEST_QUEUE_OUT_POINTER(isp) \ 256 ISP_READ(isp, isp->isp_rqstoutrp) 257 258 #define READ_RESPONSE_QUEUE_IN_POINTER(isp) \ 259 ISP_READ(isp, isp->isp_respinrp) 260 261 #define WRITE_RESPONSE_QUEUE_OUT_POINTER(isp, value) \ 262 ISP_WRITE(isp, isp->isp_respoutrp, value) 263 264 /* 265 * Command Structure Definitions 266 */ 267 268 typedef struct { 269 u_int32_t ds_base; 270 u_int32_t ds_count; 271 } ispds_t; 272 273 typedef struct { 274 u_int32_t ds_base; 275 u_int32_t ds_basehi; 276 u_int32_t ds_count; 277 } ispds64_t; 278 279 typedef struct { 280 u_int16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 281 u_int32_t ds_segment; /* unused */ 282 u_int32_t ds_base; /* 32 bit address of DSD list */ 283 } ispdslist_t; 284 285 286 /* 287 * These elements get swizzled around for SBus instances. 288 */ 289 #define _ISP_SWAP8(a, b) { \ 290 u_int8_t tmp; \ 291 tmp = a; \ 292 a = b; \ 293 b = tmp; \ 294 } 295 typedef struct { 296 u_int8_t rqs_entry_type; 297 u_int8_t rqs_entry_count; 298 u_int8_t rqs_seqno; 299 u_int8_t rqs_flags; 300 } isphdr_t; 301 /* 302 * There are no (for all intents and purposes) non-sparc SBus machines 303 */ 304 #ifdef __sparc__ 305 #define ISP_SBUSIFY_ISPHDR(isp, hdrp) \ 306 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 307 _ISP_SWAP8((hdrp)->rqs_entry_count, (hdrp)->rqs_entry_type); \ 308 _ISP_SWAP8((hdrp)->rqs_flags, (hdrp)->rqs_seqno); \ 309 } 310 #else 311 #define ISP_SBUSIFY_ISPHDR(a, b) 312 #endif 313 314 /* RQS Flag definitions */ 315 #define RQSFLAG_CONTINUATION 0x01 316 #define RQSFLAG_FULL 0x02 317 #define RQSFLAG_BADHEADER 0x04 318 #define RQSFLAG_BADPACKET 0x08 319 320 /* RQS entry_type definitions */ 321 #define RQSTYPE_REQUEST 0x01 322 #define RQSTYPE_DATASEG 0x02 323 #define RQSTYPE_RESPONSE 0x03 324 #define RQSTYPE_MARKER 0x04 325 #define RQSTYPE_CMDONLY 0x05 326 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 327 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 328 #define RQSTYPE_SCAM 0x08 329 #define RQSTYPE_A64 0x09 330 #define RQSTYPE_A64_CONT 0x0a 331 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 332 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 333 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 334 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 335 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 336 #define RQSTYPE_STATUS_CONT 0x10 337 #define RQSTYPE_T2RQS 0x11 338 #define RQSTYPE_IP_XMIT 0x13 339 #define RQSTYPE_T4RQS 0x15 340 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 341 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 342 #define RQSTYPE_CSET0 0x18 343 #define RQSTYPE_T3RQS 0x19 344 #define RQSTYPE_IP_XMIT_64 0x1b 345 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 346 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 347 #define RQSTYPE_RIO1 0x21 348 #define RQSTYPE_RIO2 0x22 349 #define RQSTYPE_IP_RECV 0x23 350 #define RQSTYPE_IP_RECV_CONT 0x24 351 352 353 #define ISP_RQDSEG 4 354 typedef struct { 355 isphdr_t req_header; 356 u_int32_t req_handle; 357 u_int8_t req_lun_trn; 358 u_int8_t req_target; 359 u_int16_t req_cdblen; 360 #define req_modifier req_cdblen /* marker packet */ 361 u_int16_t req_flags; 362 u_int16_t req_reserved; 363 u_int16_t req_time; 364 u_int16_t req_seg_count; 365 u_int8_t req_cdb[12]; 366 ispds_t req_dataseg[ISP_RQDSEG]; 367 } ispreq_t; 368 369 /* 370 * A request packet can also be a marker packet. 371 */ 372 #define SYNC_DEVICE 0 373 #define SYNC_TARGET 1 374 #define SYNC_ALL 2 375 376 /* 377 * There are no (for all intents and purposes) non-sparc SBus machines 378 */ 379 #ifdef __sparc__ 380 #define ISP_SBUSIFY_ISPREQ(isp, rqp) \ 381 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 382 _ISP_SWAP8((rqp)->req_target, (rqp)->req_lun_trn); \ 383 } 384 #else 385 #define ISP_SBUSIFY_ISPREQ(a, b) 386 #endif 387 388 #define ISP_RQDSEG_T2 3 389 typedef struct { 390 isphdr_t req_header; 391 u_int32_t req_handle; 392 u_int8_t req_lun_trn; 393 u_int8_t req_target; 394 u_int16_t req_scclun; 395 u_int16_t req_flags; 396 u_int16_t _res2; 397 u_int16_t req_time; 398 u_int16_t req_seg_count; 399 u_int32_t req_cdb[4]; 400 u_int32_t req_totalcnt; 401 ispds_t req_dataseg[ISP_RQDSEG_T2]; 402 } ispreqt2_t; 403 404 #define ISP_RQDSEG_T3 2 405 typedef struct { 406 isphdr_t req_header; 407 u_int32_t req_handle; 408 u_int8_t req_lun_trn; 409 u_int8_t req_target; 410 u_int16_t req_scclun; 411 u_int16_t req_flags; 412 u_int16_t _res2; 413 u_int16_t req_time; 414 u_int16_t req_seg_count; 415 u_int32_t req_cdb[4]; 416 u_int32_t req_totalcnt; 417 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 418 } ispreqt3_t; 419 420 /* req_flag values */ 421 #define REQFLAG_NODISCON 0x0001 422 #define REQFLAG_HTAG 0x0002 423 #define REQFLAG_OTAG 0x0004 424 #define REQFLAG_STAG 0x0008 425 #define REQFLAG_TARGET_RTN 0x0010 426 427 #define REQFLAG_NODATA 0x0000 428 #define REQFLAG_DATA_IN 0x0020 429 #define REQFLAG_DATA_OUT 0x0040 430 #define REQFLAG_DATA_UNKNOWN 0x0060 431 432 #define REQFLAG_DISARQ 0x0100 433 #define REQFLAG_FRC_ASYNC 0x0200 434 #define REQFLAG_FRC_SYNC 0x0400 435 #define REQFLAG_FRC_WIDE 0x0800 436 #define REQFLAG_NOPARITY 0x1000 437 #define REQFLAG_STOPQ 0x2000 438 #define REQFLAG_XTRASNS 0x4000 439 #define REQFLAG_PRIORITY 0x8000 440 441 typedef struct { 442 isphdr_t req_header; 443 u_int32_t req_handle; 444 u_int8_t req_lun_trn; 445 u_int8_t req_target; 446 u_int16_t req_cdblen; 447 u_int16_t req_flags; 448 u_int16_t _res1; 449 u_int16_t req_time; 450 u_int16_t req_seg_count; 451 u_int8_t req_cdb[44]; 452 } ispextreq_t; 453 454 #define ISP_CDSEG 7 455 typedef struct { 456 isphdr_t req_header; 457 u_int32_t _res1; 458 ispds_t req_dataseg[ISP_CDSEG]; 459 } ispcontreq_t; 460 461 #define ISP_CDSEG64 5 462 typedef struct { 463 isphdr_t req_header; 464 ispds64_t req_dataseg[ISP_CDSEG64]; 465 } ispcontreq64_t; 466 467 typedef struct { 468 isphdr_t req_header; 469 u_int32_t req_handle; 470 u_int16_t req_scsi_status; 471 u_int16_t req_completion_status; 472 u_int16_t req_state_flags; 473 u_int16_t req_status_flags; 474 u_int16_t req_time; 475 #define req_response_len req_time /* FC only */ 476 u_int16_t req_sense_len; 477 u_int32_t req_resid; 478 u_int8_t req_response[8]; /* FC only */ 479 u_int8_t req_sense_data[32]; 480 } ispstatusreq_t; 481 482 /* 483 * For Qlogic 2X00, the high order byte of SCSI status has 484 * additional meaning. 485 */ 486 #define RQCS_RU 0x800 /* Residual Under */ 487 #define RQCS_RO 0x400 /* Residual Over */ 488 #define RQCS_RESID (RQCS_RU|RQCS_RO) 489 #define RQCS_SV 0x200 /* Sense Length Valid */ 490 #define RQCS_RV 0x100 /* FCP Response Length Valid */ 491 492 /* 493 * Completion Status Codes. 494 */ 495 #define RQCS_COMPLETE 0x0000 496 #define RQCS_DMA_ERROR 0x0002 497 #define RQCS_RESET_OCCURRED 0x0004 498 #define RQCS_ABORTED 0x0005 499 #define RQCS_TIMEOUT 0x0006 500 #define RQCS_DATA_OVERRUN 0x0007 501 #define RQCS_DATA_UNDERRUN 0x0015 502 #define RQCS_QUEUE_FULL 0x001C 503 504 /* 1X00 Only Completion Codes */ 505 #define RQCS_INCOMPLETE 0x0001 506 #define RQCS_TRANSPORT_ERROR 0x0003 507 #define RQCS_COMMAND_OVERRUN 0x0008 508 #define RQCS_STATUS_OVERRUN 0x0009 509 #define RQCS_BAD_MESSAGE 0x000a 510 #define RQCS_NO_MESSAGE_OUT 0x000b 511 #define RQCS_EXT_ID_FAILED 0x000c 512 #define RQCS_IDE_MSG_FAILED 0x000d 513 #define RQCS_ABORT_MSG_FAILED 0x000e 514 #define RQCS_REJECT_MSG_FAILED 0x000f 515 #define RQCS_NOP_MSG_FAILED 0x0010 516 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 517 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 518 #define RQCS_ID_MSG_FAILED 0x0013 519 #define RQCS_UNEXP_BUS_FREE 0x0014 520 #define RQCS_XACT_ERR1 0x0018 521 #define RQCS_XACT_ERR2 0x0019 522 #define RQCS_XACT_ERR3 0x001A 523 #define RQCS_BAD_ENTRY 0x001B 524 #define RQCS_PHASE_SKIPPED 0x001D 525 #define RQCS_ARQS_FAILED 0x001E 526 #define RQCS_WIDE_FAILED 0x001F 527 #define RQCS_SYNCXFER_FAILED 0x0020 528 #define RQCS_LVD_BUSERR 0x0021 529 530 /* 2X00 Only Completion Codes */ 531 #define RQCS_PORT_UNAVAILABLE 0x0028 532 #define RQCS_PORT_LOGGED_OUT 0x0029 533 #define RQCS_PORT_CHANGED 0x002A 534 #define RQCS_PORT_BUSY 0x002B 535 536 /* 537 * 1X00 specific State Flags 538 */ 539 #define RQSF_GOT_BUS 0x0100 540 #define RQSF_GOT_TARGET 0x0200 541 #define RQSF_SENT_CDB 0x0400 542 #define RQSF_XFRD_DATA 0x0800 543 #define RQSF_GOT_STATUS 0x1000 544 #define RQSF_GOT_SENSE 0x2000 545 #define RQSF_XFER_COMPLETE 0x4000 546 547 /* 548 * 2X00 specific State Flags 549 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 550 */ 551 #define RQSF_DATA_IN 0x0020 552 #define RQSF_DATA_OUT 0x0040 553 #define RQSF_STAG 0x0008 554 #define RQSF_OTAG 0x0004 555 #define RQSF_HTAG 0x0002 556 /* 557 * 1X00 Status Flags 558 */ 559 #define RQSTF_DISCONNECT 0x0001 560 #define RQSTF_SYNCHRONOUS 0x0002 561 #define RQSTF_PARITY_ERROR 0x0004 562 #define RQSTF_BUS_RESET 0x0008 563 #define RQSTF_DEVICE_RESET 0x0010 564 #define RQSTF_ABORTED 0x0020 565 #define RQSTF_TIMEOUT 0x0040 566 #define RQSTF_NEGOTIATION 0x0080 567 568 /* 569 * 2X00 specific state flags 570 */ 571 /* RQSF_SENT_CDB */ 572 /* RQSF_XFRD_DATA */ 573 /* RQSF_GOT_STATUS */ 574 /* RQSF_XFER_COMPLETE */ 575 576 /* 577 * 2X00 specific status flags 578 */ 579 /* RQSTF_ABORTED */ 580 /* RQSTF_TIMEOUT */ 581 #define RQSTF_DMA_ERROR 0x0080 582 #define RQSTF_LOGOUT 0x2000 583 584 /* 585 * Miscellaneous 586 */ 587 #ifndef ISP_EXEC_THROTTLE 588 #define ISP_EXEC_THROTTLE 16 589 #endif 590 591 /* 592 * About Firmware returns an 'attribute' word in mailbox 6. 593 */ 594 #define ISP_FW_ATTR_TMODE 0x01 595 #define ISP_FW_ATTR_SCCLUN 0x02 596 #define ISP_FW_ATTR_FABRIC 0x04 597 #define ISP_FW_ATTR_CLASS2 0x08 598 #define ISP_FW_ATTR_FCTAPE 0x10 599 #define ISP_FW_ATTR_IP 0x20 600 601 /* 602 * Reduced Interrupt Operation Response Queue Entreis 603 */ 604 605 typedef struct { 606 isphdr_t req_header; 607 u_int32_t req_handles[15]; 608 } isp_rio1_t; 609 610 typedef struct { 611 isphdr_t req_header; 612 u_int16_t req_handles[30]; 613 } isp_rio2_t; 614 615 /* 616 * FC (ISP2100) specific data structures 617 */ 618 619 /* 620 * Initialization Control Block 621 * 622 * Version One (prime) format. 623 */ 624 typedef struct isp_icb { 625 u_int8_t icb_version; 626 u_int8_t _reserved0; 627 u_int16_t icb_fwoptions; 628 u_int16_t icb_maxfrmlen; 629 u_int16_t icb_maxalloc; 630 u_int16_t icb_execthrottle; 631 u_int8_t icb_retry_count; 632 u_int8_t icb_retry_delay; 633 u_int8_t icb_portname[8]; 634 u_int16_t icb_hardaddr; 635 u_int8_t icb_iqdevtype; 636 u_int8_t icb_logintime; 637 u_int8_t icb_nodename[8]; 638 u_int16_t icb_rqstout; 639 u_int16_t icb_rspnsin; 640 u_int16_t icb_rqstqlen; 641 u_int16_t icb_rsltqlen; 642 u_int16_t icb_rqstaddr[4]; 643 u_int16_t icb_respaddr[4]; 644 u_int16_t icb_lunenables; 645 u_int8_t icb_ccnt; 646 u_int8_t icb_icnt; 647 u_int16_t icb_lunetimeout; 648 u_int16_t _reserved1; 649 u_int16_t icb_xfwoptions; 650 u_int8_t icb_racctimer; 651 u_int8_t icb_idelaytimer; 652 u_int16_t icb_zfwoptions; 653 u_int16_t _reserved2[13]; 654 } isp_icb_t; 655 #define ICB_VERSION1 1 656 657 #define ICBOPT_HARD_ADDRESS 0x0001 658 #define ICBOPT_FAIRNESS 0x0002 659 #define ICBOPT_FULL_DUPLEX 0x0004 660 #define ICBOPT_FAST_POST 0x0008 661 #define ICBOPT_TGT_ENABLE 0x0010 662 #define ICBOPT_INI_DISABLE 0x0020 663 #define ICBOPT_INI_ADISC 0x0040 664 #define ICBOPT_INI_TGTTYPE 0x0080 665 #define ICBOPT_PDBCHANGE_AE 0x0100 666 #define ICBOPT_NOLIP 0x0200 667 #define ICBOPT_SRCHDOWN 0x0400 668 #define ICBOPT_PREVLOOP 0x0800 669 #define ICBOPT_STOP_ON_QFULL 0x1000 670 #define ICBOPT_FULL_LOGIN 0x2000 671 #define ICBOPT_BOTH_WWNS 0x4000 672 #define ICBOPT_EXTENDED 0x8000 673 674 #define ICBXOPT_CLASS2_ACK0 0x0200 675 #define ICBXOPT_CLASS2 0x0100 676 #define ICBXOPT_LOOP_ONLY (0 << 4) 677 #define ICBXOPT_PTP_ONLY (1 << 4) 678 #define ICBXOPT_LOOP_2_PTP (2 << 4) 679 #define ICBXOPT_PTP_2_LOOP (3 << 4) 680 681 #define ICBXOPT_RIO_OFF 0 682 #define ICBXOPT_RIO_16BIT 1 683 #define ICBXOPT_RIO_32BIT 2 684 #define ICBXOPT_RIO_16BIT_DELAY 3 685 #define ICBXOPT_RIO_32BIT_DELAY 4 686 687 /* These 3 only apply to the 2300 */ 688 #define ICBXOPT_RATE_ONEGB (0 << 14) 689 #define ICBXOPT_RATE_TWOGB (1 << 14) 690 #define ICBXOPT_RATE_AUTO (2 << 14) 691 692 693 #define ICB_MIN_FRMLEN 256 694 #define ICB_MAX_FRMLEN 2112 695 #define ICB_DFLT_FRMLEN 1024 696 #define ICB_DFLT_ALLOC 256 697 #define ICB_DFLT_THROTTLE 16 698 #define ICB_DFLT_RDELAY 5 699 #define ICB_DFLT_RCOUNT 3 700 701 702 #define RQRSP_ADDR0015 0 703 #define RQRSP_ADDR1631 1 704 #define RQRSP_ADDR3247 2 705 #define RQRSP_ADDR4863 3 706 707 708 #define ICB_NNM0 7 709 #define ICB_NNM1 6 710 #define ICB_NNM2 5 711 #define ICB_NNM3 4 712 #define ICB_NNM4 3 713 #define ICB_NNM5 2 714 #define ICB_NNM6 1 715 #define ICB_NNM7 0 716 717 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 718 array[ICB_NNM0] = (u_int8_t) ((wwn >> 0) & 0xff), \ 719 array[ICB_NNM1] = (u_int8_t) ((wwn >> 8) & 0xff), \ 720 array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \ 721 array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \ 722 array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \ 723 array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \ 724 array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \ 725 array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff) 726 727 /* 728 * FC-AL Position Map 729 * 730 * This is an at most 128 byte map that returns either 731 * the LILP or Firmware generated list of ports. 732 * 733 * We deviate a bit from the returned qlogic format to 734 * use an extra bit to say whether this was a LILP or 735 * f/w generated map. 736 */ 737 typedef struct { 738 u_int8_t fwmap : 1, 739 count : 7; 740 u_int8_t map[127]; 741 } fcpos_map_t; 742 743 /* 744 * Port Data Base Element 745 */ 746 747 typedef struct { 748 u_int16_t pdb_options; 749 u_int8_t pdb_mstate; 750 u_int8_t pdb_sstate; 751 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 752 u_int8_t pdb_hardaddr_bits[4]; 753 u_int8_t pdb_portid_bits[4]; 754 u_int8_t pdb_nodename[8]; 755 u_int8_t pdb_portname[8]; 756 u_int16_t pdb_execthrottle; 757 u_int16_t pdb_exec_count; 758 u_int8_t pdb_retry_count; 759 u_int8_t pdb_retry_delay; 760 u_int16_t pdb_resalloc; 761 u_int16_t pdb_curalloc; 762 u_int16_t pdb_qhead; 763 u_int16_t pdb_qtail; 764 u_int16_t pdb_tl_next; 765 u_int16_t pdb_tl_last; 766 u_int16_t pdb_features; /* PLOGI, Common Service */ 767 u_int16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 768 u_int16_t pdb_roi; /* PLOGI, Common Service */ 769 u_int8_t pdb_target; 770 u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 771 u_int16_t pdb_rdsiz; /* PLOGI, Class 3 */ 772 u_int16_t pdb_ncseq; /* PLOGI, Class 3 */ 773 u_int16_t pdb_noseq; /* PLOGI, Class 3 */ 774 u_int16_t pdb_labrtflg; 775 u_int16_t pdb_lstopflg; 776 u_int16_t pdb_sqhead; 777 u_int16_t pdb_sqtail; 778 u_int16_t pdb_ptimer; 779 u_int16_t pdb_nxt_seqid; 780 u_int16_t pdb_fcount; 781 u_int16_t pdb_prli_len; 782 u_int16_t pdb_prli_svc0; 783 u_int16_t pdb_prli_svc3; 784 u_int16_t pdb_loopid; 785 u_int16_t pdb_il_ptr; 786 u_int16_t pdb_sl_ptr; 787 } isp_pdb_t; 788 789 #define PDB_OPTIONS_XMITTING (1<<11) 790 #define PDB_OPTIONS_LNKXMIT (1<<10) 791 #define PDB_OPTIONS_ABORTED (1<<9) 792 #define PDB_OPTIONS_ADISC (1<<1) 793 794 #define PDB_STATE_DISCOVERY 0 795 #define PDB_STATE_WDISC_ACK 1 796 #define PDB_STATE_PLOGI 2 797 #define PDB_STATE_PLOGI_ACK 3 798 #define PDB_STATE_PRLI 4 799 #define PDB_STATE_PRLI_ACK 5 800 #define PDB_STATE_LOGGED_IN 6 801 #define PDB_STATE_PORT_UNAVAIL 7 802 #define PDB_STATE_PRLO 8 803 #define PDB_STATE_PRLO_ACK 9 804 #define PDB_STATE_PLOGO 10 805 #define PDB_STATE_PLOG_ACK 11 806 807 #define SVC3_TGT_ROLE 0x10 808 #define SVC3_INI_ROLE 0x20 809 #define SVC3_ROLE_MASK 0x30 810 #define SVC3_ROLE_SHIFT 4 811 812 #define SNS_GAN 0x100 813 #define SNS_GP3 0x171 814 #define SNS_RFT 0x217 815 typedef struct { 816 u_int16_t snscb_rblen; /* response buffer length (words) */ 817 u_int16_t snscb_res0; 818 u_int16_t snscb_addr[4]; /* response buffer address */ 819 u_int16_t snscb_sblen; /* subcommand buffer length (words) */ 820 u_int16_t snscb_res1; 821 u_int16_t snscb_data[1]; /* variable data */ 822 } sns_screq_t; /* Subcommand Request Structure */ 823 #define SNS_GAN_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 824 #define SNS_GP3_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 825 #define SNS_RFT_REQ_SIZE (sizeof (sns_screq_t)+(21*(sizeof (u_int16_t)))) 826 827 typedef struct { 828 u_int8_t snscb_cthdr[16]; 829 u_int8_t snscb_port_type; 830 u_int8_t snscb_port_id[3]; 831 u_int8_t snscb_portname[8]; 832 u_int16_t snscb_data[1]; /* variable data */ 833 } sns_scrsp_t; /* Subcommand Response Structure */ 834 #define SNS_GAN_RESP_SIZE 608 /* Maximum response size (bytes) */ 835 #define SNS_GP3_RESP_SIZE 532 /* XXX: For 128 ports */ 836 #define SNS_RFT_RESP_SIZE 16 837 838 typedef struct { 839 u_int8_t snscb_cthdr[16]; 840 u_int8_t snscb_port_type; 841 u_int8_t snscb_port_id[3]; 842 u_int8_t snscb_portname[8]; 843 u_int8_t snscb_pnlen; /* symbolic port name length */ 844 u_int8_t snscb_pname[255]; /* symbolic port name */ 845 u_int8_t snscb_nodename[8]; 846 u_int8_t snscb_nnlen; /* symbolic node name length */ 847 u_int8_t snscb_nname[255]; /* symbolic node name */ 848 u_int8_t snscb_ipassoc[8]; 849 u_int8_t snscb_ipaddr[16]; 850 u_int8_t snscb_svc_class[4]; 851 u_int8_t snscb_fc4_types[32]; 852 u_int8_t snscb_fpname[8]; 853 u_int8_t snscb_reserved; 854 u_int8_t snscb_hardaddr[3]; 855 } sns_ganrsp_t; /* Subcommand Response Structure */ 856 857 #endif /* _ISPMBOX_H */ 858
Indexes created Mon Sep 29 15:09:53 GMT 2025