ispmbox.h revision 1.35
1 /* $NetBSD: ispmbox.h,v 1.35 2001/10/06 20:34:51 mjacob Exp $ */ 2 /* 3 * This driver, which is contained in NetBSD in the files: 4 * 5 * sys/dev/ic/isp.c 6 * sys/dev/ic/isp_inline.h 7 * sys/dev/ic/isp_netbsd.c 8 * sys/dev/ic/isp_netbsd.h 9 * sys/dev/ic/isp_target.c 10 * sys/dev/ic/isp_target.h 11 * sys/dev/ic/isp_tpublic.h 12 * sys/dev/ic/ispmbox.h 13 * sys/dev/ic/ispreg.h 14 * sys/dev/ic/ispvar.h 15 * sys/microcode/isp/asm_sbus.h 16 * sys/microcode/isp/asm_1040.h 17 * sys/microcode/isp/asm_1080.h 18 * sys/microcode/isp/asm_12160.h 19 * sys/microcode/isp/asm_2100.h 20 * sys/microcode/isp/asm_2200.h 21 * sys/pci/isp_pci.c 22 * sys/sbus/isp_sbus.c 23 * 24 * Is being actively maintained by Matthew Jacob (mjacob (at) netbsd.org). 25 * This driver also is shared source with FreeBSD, OpenBSD, Linux, Solaris, 26 * Linux versions. This tends to be an interesting maintenance problem. 27 * 28 * Please coordinate with Matthew Jacob on changes you wish to make here. 29 */ 30 /* 31 * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration 32 * All rights reserved. 33 * 34 * Redistribution and use in source and binary forms, with or without 35 * modification, are permitted provided that the following conditions 36 * are met: 37 * 1. Redistributions of source code must retain the above copyright 38 * notice, this list of conditions and the following disclaimer. 39 * 2. Redistributions in binary form must reproduce the above copyright 40 * notice, this list of conditions and the following disclaimer in the 41 * documentation and/or other materials provided with the distribution. 42 * 3. The name of the author may not be used to endorse or promote products 43 * derived from this software without specific prior written permission 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 55 */ 56 57 /* 58 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 59 * <mjacob (at) nas.nasa.gov> 60 */ 61 #ifndef _ISPMBOX_H 62 #define _ISPMBOX_H 63 64 /* 65 * Mailbox Command Opcodes 66 */ 67 #define MBOX_NO_OP 0x0000 68 #define MBOX_LOAD_RAM 0x0001 69 #define MBOX_EXEC_FIRMWARE 0x0002 70 #define MBOX_DUMP_RAM 0x0003 71 #define MBOX_WRITE_RAM_WORD 0x0004 72 #define MBOX_READ_RAM_WORD 0x0005 73 #define MBOX_MAILBOX_REG_TEST 0x0006 74 #define MBOX_VERIFY_CHECKSUM 0x0007 75 #define MBOX_ABOUT_FIRMWARE 0x0008 76 /* 9 */ 77 /* a */ 78 /* b */ 79 /* c */ 80 /* d */ 81 #define MBOX_CHECK_FIRMWARE 0x000e 82 /* f */ 83 #define MBOX_INIT_REQ_QUEUE 0x0010 84 #define MBOX_INIT_RES_QUEUE 0x0011 85 #define MBOX_EXECUTE_IOCB 0x0012 86 #define MBOX_WAKE_UP 0x0013 87 #define MBOX_STOP_FIRMWARE 0x0014 88 #define MBOX_ABORT 0x0015 89 #define MBOX_ABORT_DEVICE 0x0016 90 #define MBOX_ABORT_TARGET 0x0017 91 #define MBOX_BUS_RESET 0x0018 92 #define MBOX_STOP_QUEUE 0x0019 93 #define MBOX_START_QUEUE 0x001a 94 #define MBOX_SINGLE_STEP_QUEUE 0x001b 95 #define MBOX_ABORT_QUEUE 0x001c 96 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 97 /* 1e */ 98 #define MBOX_GET_FIRMWARE_STATUS 0x001f 99 #define MBOX_GET_INIT_SCSI_ID 0x0020 100 #define MBOX_GET_SELECT_TIMEOUT 0x0021 101 #define MBOX_GET_RETRY_COUNT 0x0022 102 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 103 #define MBOX_GET_CLOCK_RATE 0x0024 104 #define MBOX_GET_ACT_NEG_STATE 0x0025 105 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 106 #define MBOX_GET_SBUS_PARAMS 0x0027 107 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 108 #define MBOX_GET_TARGET_PARAMS 0x0028 109 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 110 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 111 /* 2b */ 112 /* 2c */ 113 /* 2d */ 114 /* 2e */ 115 /* 2f */ 116 #define MBOX_SET_INIT_SCSI_ID 0x0030 117 #define MBOX_SET_SELECT_TIMEOUT 0x0031 118 #define MBOX_SET_RETRY_COUNT 0x0032 119 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 120 #define MBOX_SET_CLOCK_RATE 0x0034 121 #define MBOX_SET_ACT_NEG_STATE 0x0035 122 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 123 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 124 #define MBOX_SET_PCI_PARAMETERS 0x0037 125 #define MBOX_SET_TARGET_PARAMS 0x0038 126 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 127 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 128 /* 3b */ 129 /* 3c */ 130 /* 3d */ 131 /* 3e */ 132 /* 3f */ 133 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 134 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 135 #define MBOX_EXEC_BIOS_IOCB 0x0042 136 #define MBOX_SET_FW_FEATURES 0x004a 137 #define MBOX_GET_FW_FEATURES 0x004b 138 #define FW_FEATURE_LVD_NOTIFY 0x2 139 #define FW_FEATURE_FAST_POST 0x1 140 141 #define MBOX_ENABLE_TARGET_MODE 0x0055 142 #define ENABLE_TARGET_FLAG 0x8000 143 #define ENABLE_TQING_FLAG 0x0004 144 #define ENABLE_MANDATORY_DISC 0x0002 145 #define MBOX_GET_TARGET_STATUS 0x0056 146 147 /* These are for the ISP2X00 FC cards */ 148 #define MBOX_GET_LOOP_ID 0x0020 149 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 150 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 151 #define MBOX_GET_RESOURCE_COUNT 0x0042 152 #define MBOX_ENHANCED_GET_PDB 0x0047 153 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 154 #define MBOX_INIT_FIRMWARE 0x0060 155 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 156 #define MBOX_INIT_LIP 0x0062 157 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 158 #define MBOX_GET_PORT_DB 0x0064 159 #define MBOX_CLEAR_ACA 0x0065 160 #define MBOX_TARGET_RESET 0x0066 161 #define MBOX_CLEAR_TASK_SET 0x0067 162 #define MBOX_ABORT_TASK_SET 0x0068 163 #define MBOX_GET_FW_STATE 0x0069 164 #define MBOX_GET_PORT_NAME 0x006A 165 #define MBOX_GET_LINK_STATUS 0x006B 166 #define MBOX_INIT_LIP_RESET 0x006C 167 #define MBOX_SEND_SNS 0x006E 168 #define MBOX_FABRIC_LOGIN 0x006F 169 #define MBOX_SEND_CHANGE_REQUEST 0x0070 170 #define MBOX_FABRIC_LOGOUT 0x0071 171 #define MBOX_INIT_LIP_LOGIN 0x0072 172 173 #define MBOX_GET_SET_DATA_RATE 0x005D /* 23XX only */ 174 #define MBGSD_GET_RATE 0 175 #define MBGSD_SET_RATE 1 176 #define MBGSD_ONEGB 0 177 #define MBGSD_TWOGB 1 178 #define MBGSD_AUTO 2 179 180 181 #define ISP2100_SET_PCI_PARAM 0x00ff 182 183 #define MBOX_BUSY 0x04 184 185 typedef struct { 186 u_int16_t param[8]; 187 } mbreg_t; 188 189 /* 190 * Mailbox Command Complete Status Codes 191 */ 192 #define MBOX_COMMAND_COMPLETE 0x4000 193 #define MBOX_INVALID_COMMAND 0x4001 194 #define MBOX_HOST_INTERFACE_ERROR 0x4002 195 #define MBOX_TEST_FAILED 0x4003 196 #define MBOX_COMMAND_ERROR 0x4005 197 #define MBOX_COMMAND_PARAM_ERROR 0x4006 198 #define MBOX_PORT_ID_USED 0x4007 199 #define MBOX_LOOP_ID_USED 0x4008 200 #define MBOX_ALL_IDS_USED 0x4009 201 #define MBOX_NOT_LOGGED_IN 0x400A 202 #define MBLOGALL 0x000f 203 #define MBLOGNONE 0x0000 204 #define MBLOGMASK(x) ((x) & 0xf) 205 206 /* 207 * Asynchronous event status codes 208 */ 209 #define ASYNC_BUS_RESET 0x8001 210 #define ASYNC_SYSTEM_ERROR 0x8002 211 #define ASYNC_RQS_XFER_ERR 0x8003 212 #define ASYNC_RSP_XFER_ERR 0x8004 213 #define ASYNC_QWAKEUP 0x8005 214 #define ASYNC_TIMEOUT_RESET 0x8006 215 #define ASYNC_DEVICE_RESET 0x8007 216 #define ASYNC_EXTMSG_UNDERRUN 0x800A 217 #define ASYNC_SCAM_INT 0x800B 218 #define ASYNC_HUNG_SCSI 0x800C 219 #define ASYNC_KILLED_BUS 0x800D 220 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 221 #define ASYNC_LIP_OCCURRED 0x8010 222 #define ASYNC_LOOP_UP 0x8011 223 #define ASYNC_LOOP_DOWN 0x8012 224 #define ASYNC_LOOP_RESET 0x8013 225 #define ASYNC_PDB_CHANGED 0x8014 226 #define ASYNC_CHANGE_NOTIFY 0x8015 227 #define ASYNC_LIP_F8 0x8016 228 #define ASYNC_CMD_CMPLT 0x8020 229 #define ASYNC_CTIO_DONE 0x8021 230 #define ASYNC_IP_XMIT_DONE 0x8022 231 #define ASYNC_IP_RECV_DONE 0x8023 232 #define ASYNC_IP_BROADCAST 0x8024 233 #define ASYNC_IP_RCVQ_LOW 0x8025 234 #define ASYNC_IP_RCVQ_EMPTY 0x8026 235 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 236 #define ASYNC_PTPMODE 0x8030 237 #define ASYNC_RIO1 0x8031 238 #define ASYNC_RIO2 0x8032 239 #define ASYNC_RIO3 0x8033 240 #define ASYNC_RIO4 0x8034 241 #define ASYNC_RIO5 0x8035 242 #define ASYNC_CONNMODE 0x8036 243 #define ISP_CONN_LOOP 1 244 #define ISP_CONN_PTP 2 245 #define ISP_CONN_BADLIP 3 246 #define ISP_CONN_FATAL 4 247 #define ISP_CONN_LOOPBACK 5 248 #define ASYNC_RIO_RESP 0x8040 249 #define ASYNC_RIO_COMP 0x8042 250 /* 251 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 252 * mailbox command to enable this. 253 */ 254 #define ASYNC_QFULL_SENT 0x8049 255 256 /* 257 * Mailbox Usages 258 */ 259 260 #define WRITE_REQUEST_QUEUE_IN_POINTER(isp, value) \ 261 ISP_WRITE(isp, isp->isp_rqstinrp, value) 262 263 #define READ_REQUEST_QUEUE_OUT_POINTER(isp) \ 264 ISP_READ(isp, isp->isp_rqstoutrp) 265 266 #define READ_RESPONSE_QUEUE_IN_POINTER(isp) \ 267 ISP_READ(isp, isp->isp_respinrp) 268 269 #define WRITE_RESPONSE_QUEUE_OUT_POINTER(isp, value) \ 270 ISP_WRITE(isp, isp->isp_respoutrp, value) 271 272 /* 273 * Command Structure Definitions 274 */ 275 276 typedef struct { 277 u_int32_t ds_base; 278 u_int32_t ds_count; 279 } ispds_t; 280 281 typedef struct { 282 u_int32_t ds_base; 283 u_int32_t ds_basehi; 284 u_int32_t ds_count; 285 } ispds64_t; 286 287 typedef struct { 288 u_int16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 289 u_int32_t ds_segment; /* unused */ 290 u_int32_t ds_base; /* 32 bit address of DSD list */ 291 } ispdslist_t; 292 293 294 /* 295 * These elements get swizzled around for SBus instances. 296 */ 297 #define _ISP_SWAP8(a, b) { \ 298 u_int8_t tmp; \ 299 tmp = a; \ 300 a = b; \ 301 b = tmp; \ 302 } 303 typedef struct { 304 u_int8_t rqs_entry_type; 305 u_int8_t rqs_entry_count; 306 u_int8_t rqs_seqno; 307 u_int8_t rqs_flags; 308 } isphdr_t; 309 /* 310 * There are no (for all intents and purposes) non-sparc SBus machines 311 */ 312 #ifdef __sparc__ 313 #define ISP_SBUSIFY_ISPHDR(isp, hdrp) \ 314 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 315 _ISP_SWAP8((hdrp)->rqs_entry_count, (hdrp)->rqs_entry_type); \ 316 _ISP_SWAP8((hdrp)->rqs_flags, (hdrp)->rqs_seqno); \ 317 } 318 #else 319 #define ISP_SBUSIFY_ISPHDR(a, b) 320 #endif 321 322 /* RQS Flag definitions */ 323 #define RQSFLAG_CONTINUATION 0x01 324 #define RQSFLAG_FULL 0x02 325 #define RQSFLAG_BADHEADER 0x04 326 #define RQSFLAG_BADPACKET 0x08 327 328 /* RQS entry_type definitions */ 329 #define RQSTYPE_REQUEST 0x01 330 #define RQSTYPE_DATASEG 0x02 331 #define RQSTYPE_RESPONSE 0x03 332 #define RQSTYPE_MARKER 0x04 333 #define RQSTYPE_CMDONLY 0x05 334 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 335 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 336 #define RQSTYPE_SCAM 0x08 337 #define RQSTYPE_A64 0x09 338 #define RQSTYPE_A64_CONT 0x0a 339 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 340 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 341 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 342 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 343 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 344 #define RQSTYPE_STATUS_CONT 0x10 345 #define RQSTYPE_T2RQS 0x11 346 #define RQSTYPE_IP_XMIT 0x13 347 #define RQSTYPE_T4RQS 0x15 348 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 349 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 350 #define RQSTYPE_CSET0 0x18 351 #define RQSTYPE_T3RQS 0x19 352 #define RQSTYPE_IP_XMIT_64 0x1b 353 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 354 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 355 #define RQSTYPE_RIO1 0x21 356 #define RQSTYPE_RIO2 0x22 357 #define RQSTYPE_IP_RECV 0x23 358 #define RQSTYPE_IP_RECV_CONT 0x24 359 360 361 #define ISP_RQDSEG 4 362 typedef struct { 363 isphdr_t req_header; 364 u_int32_t req_handle; 365 u_int8_t req_lun_trn; 366 u_int8_t req_target; 367 u_int16_t req_cdblen; 368 #define req_modifier req_cdblen /* marker packet */ 369 u_int16_t req_flags; 370 u_int16_t req_reserved; 371 u_int16_t req_time; 372 u_int16_t req_seg_count; 373 u_int8_t req_cdb[12]; 374 ispds_t req_dataseg[ISP_RQDSEG]; 375 } ispreq_t; 376 377 /* 378 * A request packet can also be a marker packet. 379 */ 380 #define SYNC_DEVICE 0 381 #define SYNC_TARGET 1 382 #define SYNC_ALL 2 383 384 /* 385 * There are no (for all intents and purposes) non-sparc SBus machines 386 */ 387 #ifdef __sparc__ 388 #define ISP_SBUSIFY_ISPREQ(isp, rqp) \ 389 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 390 _ISP_SWAP8((rqp)->req_target, (rqp)->req_lun_trn); \ 391 } 392 #else 393 #define ISP_SBUSIFY_ISPREQ(a, b) 394 #endif 395 396 #define ISP_RQDSEG_T2 3 397 typedef struct { 398 isphdr_t req_header; 399 u_int32_t req_handle; 400 u_int8_t req_lun_trn; 401 u_int8_t req_target; 402 u_int16_t req_scclun; 403 u_int16_t req_flags; 404 u_int16_t _res2; 405 u_int16_t req_time; 406 u_int16_t req_seg_count; 407 u_int32_t req_cdb[4]; 408 u_int32_t req_totalcnt; 409 ispds_t req_dataseg[ISP_RQDSEG_T2]; 410 } ispreqt2_t; 411 412 #define ISP_RQDSEG_T3 2 413 typedef struct { 414 isphdr_t req_header; 415 u_int32_t req_handle; 416 u_int8_t req_lun_trn; 417 u_int8_t req_target; 418 u_int16_t req_scclun; 419 u_int16_t req_flags; 420 u_int16_t _res2; 421 u_int16_t req_time; 422 u_int16_t req_seg_count; 423 u_int32_t req_cdb[4]; 424 u_int32_t req_totalcnt; 425 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 426 } ispreqt3_t; 427 428 /* req_flag values */ 429 #define REQFLAG_NODISCON 0x0001 430 #define REQFLAG_HTAG 0x0002 431 #define REQFLAG_OTAG 0x0004 432 #define REQFLAG_STAG 0x0008 433 #define REQFLAG_TARGET_RTN 0x0010 434 435 #define REQFLAG_NODATA 0x0000 436 #define REQFLAG_DATA_IN 0x0020 437 #define REQFLAG_DATA_OUT 0x0040 438 #define REQFLAG_DATA_UNKNOWN 0x0060 439 440 #define REQFLAG_DISARQ 0x0100 441 #define REQFLAG_FRC_ASYNC 0x0200 442 #define REQFLAG_FRC_SYNC 0x0400 443 #define REQFLAG_FRC_WIDE 0x0800 444 #define REQFLAG_NOPARITY 0x1000 445 #define REQFLAG_STOPQ 0x2000 446 #define REQFLAG_XTRASNS 0x4000 447 #define REQFLAG_PRIORITY 0x8000 448 449 typedef struct { 450 isphdr_t req_header; 451 u_int32_t req_handle; 452 u_int8_t req_lun_trn; 453 u_int8_t req_target; 454 u_int16_t req_cdblen; 455 u_int16_t req_flags; 456 u_int16_t _res1; 457 u_int16_t req_time; 458 u_int16_t req_seg_count; 459 u_int8_t req_cdb[44]; 460 } ispextreq_t; 461 462 #define ISP_CDSEG 7 463 typedef struct { 464 isphdr_t req_header; 465 u_int32_t _res1; 466 ispds_t req_dataseg[ISP_CDSEG]; 467 } ispcontreq_t; 468 469 #define ISP_CDSEG64 5 470 typedef struct { 471 isphdr_t req_header; 472 ispds64_t req_dataseg[ISP_CDSEG64]; 473 } ispcontreq64_t; 474 475 typedef struct { 476 isphdr_t req_header; 477 u_int32_t req_handle; 478 u_int16_t req_scsi_status; 479 u_int16_t req_completion_status; 480 u_int16_t req_state_flags; 481 u_int16_t req_status_flags; 482 u_int16_t req_time; 483 #define req_response_len req_time /* FC only */ 484 u_int16_t req_sense_len; 485 u_int32_t req_resid; 486 u_int8_t req_response[8]; /* FC only */ 487 u_int8_t req_sense_data[32]; 488 } ispstatusreq_t; 489 490 /* 491 * For Qlogic 2X00, the high order byte of SCSI status has 492 * additional meaning. 493 */ 494 #define RQCS_RU 0x800 /* Residual Under */ 495 #define RQCS_RO 0x400 /* Residual Over */ 496 #define RQCS_RESID (RQCS_RU|RQCS_RO) 497 #define RQCS_SV 0x200 /* Sense Length Valid */ 498 #define RQCS_RV 0x100 /* FCP Response Length Valid */ 499 500 /* 501 * Completion Status Codes. 502 */ 503 #define RQCS_COMPLETE 0x0000 504 #define RQCS_DMA_ERROR 0x0002 505 #define RQCS_RESET_OCCURRED 0x0004 506 #define RQCS_ABORTED 0x0005 507 #define RQCS_TIMEOUT 0x0006 508 #define RQCS_DATA_OVERRUN 0x0007 509 #define RQCS_DATA_UNDERRUN 0x0015 510 #define RQCS_QUEUE_FULL 0x001C 511 512 /* 1X00 Only Completion Codes */ 513 #define RQCS_INCOMPLETE 0x0001 514 #define RQCS_TRANSPORT_ERROR 0x0003 515 #define RQCS_COMMAND_OVERRUN 0x0008 516 #define RQCS_STATUS_OVERRUN 0x0009 517 #define RQCS_BAD_MESSAGE 0x000a 518 #define RQCS_NO_MESSAGE_OUT 0x000b 519 #define RQCS_EXT_ID_FAILED 0x000c 520 #define RQCS_IDE_MSG_FAILED 0x000d 521 #define RQCS_ABORT_MSG_FAILED 0x000e 522 #define RQCS_REJECT_MSG_FAILED 0x000f 523 #define RQCS_NOP_MSG_FAILED 0x0010 524 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 525 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 526 #define RQCS_ID_MSG_FAILED 0x0013 527 #define RQCS_UNEXP_BUS_FREE 0x0014 528 #define RQCS_XACT_ERR1 0x0018 529 #define RQCS_XACT_ERR2 0x0019 530 #define RQCS_XACT_ERR3 0x001A 531 #define RQCS_BAD_ENTRY 0x001B 532 #define RQCS_PHASE_SKIPPED 0x001D 533 #define RQCS_ARQS_FAILED 0x001E 534 #define RQCS_WIDE_FAILED 0x001F 535 #define RQCS_SYNCXFER_FAILED 0x0020 536 #define RQCS_LVD_BUSERR 0x0021 537 538 /* 2X00 Only Completion Codes */ 539 #define RQCS_PORT_UNAVAILABLE 0x0028 540 #define RQCS_PORT_LOGGED_OUT 0x0029 541 #define RQCS_PORT_CHANGED 0x002A 542 #define RQCS_PORT_BUSY 0x002B 543 544 /* 545 * 1X00 specific State Flags 546 */ 547 #define RQSF_GOT_BUS 0x0100 548 #define RQSF_GOT_TARGET 0x0200 549 #define RQSF_SENT_CDB 0x0400 550 #define RQSF_XFRD_DATA 0x0800 551 #define RQSF_GOT_STATUS 0x1000 552 #define RQSF_GOT_SENSE 0x2000 553 #define RQSF_XFER_COMPLETE 0x4000 554 555 /* 556 * 2X00 specific State Flags 557 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 558 */ 559 #define RQSF_DATA_IN 0x0020 560 #define RQSF_DATA_OUT 0x0040 561 #define RQSF_STAG 0x0008 562 #define RQSF_OTAG 0x0004 563 #define RQSF_HTAG 0x0002 564 /* 565 * 1X00 Status Flags 566 */ 567 #define RQSTF_DISCONNECT 0x0001 568 #define RQSTF_SYNCHRONOUS 0x0002 569 #define RQSTF_PARITY_ERROR 0x0004 570 #define RQSTF_BUS_RESET 0x0008 571 #define RQSTF_DEVICE_RESET 0x0010 572 #define RQSTF_ABORTED 0x0020 573 #define RQSTF_TIMEOUT 0x0040 574 #define RQSTF_NEGOTIATION 0x0080 575 576 /* 577 * 2X00 specific state flags 578 */ 579 /* RQSF_SENT_CDB */ 580 /* RQSF_XFRD_DATA */ 581 /* RQSF_GOT_STATUS */ 582 /* RQSF_XFER_COMPLETE */ 583 584 /* 585 * 2X00 specific status flags 586 */ 587 /* RQSTF_ABORTED */ 588 /* RQSTF_TIMEOUT */ 589 #define RQSTF_DMA_ERROR 0x0080 590 #define RQSTF_LOGOUT 0x2000 591 592 /* 593 * Miscellaneous 594 */ 595 #ifndef ISP_EXEC_THROTTLE 596 #define ISP_EXEC_THROTTLE 16 597 #endif 598 599 /* 600 * About Firmware returns an 'attribute' word in mailbox 6. 601 */ 602 #define ISP_FW_ATTR_TMODE 0x01 603 #define ISP_FW_ATTR_SCCLUN 0x02 604 #define ISP_FW_ATTR_FABRIC 0x04 605 #define ISP_FW_ATTR_CLASS2 0x08 606 #define ISP_FW_ATTR_FCTAPE 0x10 607 #define ISP_FW_ATTR_IP 0x20 608 609 /* 610 * Reduced Interrupt Operation Response Queue Entreis 611 */ 612 613 typedef struct { 614 isphdr_t req_header; 615 u_int32_t req_handles[15]; 616 } isp_rio1_t; 617 618 typedef struct { 619 isphdr_t req_header; 620 u_int16_t req_handles[30]; 621 } isp_rio2_t; 622 623 /* 624 * FC (ISP2100) specific data structures 625 */ 626 627 /* 628 * Initialization Control Block 629 * 630 * Version One (prime) format. 631 */ 632 typedef struct isp_icb { 633 u_int8_t icb_version; 634 u_int8_t _reserved0; 635 u_int16_t icb_fwoptions; 636 u_int16_t icb_maxfrmlen; 637 u_int16_t icb_maxalloc; 638 u_int16_t icb_execthrottle; 639 u_int8_t icb_retry_count; 640 u_int8_t icb_retry_delay; 641 u_int8_t icb_portname[8]; 642 u_int16_t icb_hardaddr; 643 u_int8_t icb_iqdevtype; 644 u_int8_t icb_logintime; 645 u_int8_t icb_nodename[8]; 646 u_int16_t icb_rqstout; 647 u_int16_t icb_rspnsin; 648 u_int16_t icb_rqstqlen; 649 u_int16_t icb_rsltqlen; 650 u_int16_t icb_rqstaddr[4]; 651 u_int16_t icb_respaddr[4]; 652 u_int16_t icb_lunenables; 653 u_int8_t icb_ccnt; 654 u_int8_t icb_icnt; 655 u_int16_t icb_lunetimeout; 656 u_int16_t _reserved1; 657 u_int16_t icb_xfwoptions; 658 u_int8_t icb_racctimer; 659 u_int8_t icb_idelaytimer; 660 u_int16_t icb_zfwoptions; 661 u_int16_t _reserved2[13]; 662 } isp_icb_t; 663 #define ICB_VERSION1 1 664 665 #define ICBOPT_HARD_ADDRESS 0x0001 666 #define ICBOPT_FAIRNESS 0x0002 667 #define ICBOPT_FULL_DUPLEX 0x0004 668 #define ICBOPT_FAST_POST 0x0008 669 #define ICBOPT_TGT_ENABLE 0x0010 670 #define ICBOPT_INI_DISABLE 0x0020 671 #define ICBOPT_INI_ADISC 0x0040 672 #define ICBOPT_INI_TGTTYPE 0x0080 673 #define ICBOPT_PDBCHANGE_AE 0x0100 674 #define ICBOPT_NOLIP 0x0200 675 #define ICBOPT_SRCHDOWN 0x0400 676 #define ICBOPT_PREVLOOP 0x0800 677 #define ICBOPT_STOP_ON_QFULL 0x1000 678 #define ICBOPT_FULL_LOGIN 0x2000 679 #define ICBOPT_BOTH_WWNS 0x4000 680 #define ICBOPT_EXTENDED 0x8000 681 682 #define ICBXOPT_CLASS2_ACK0 0x0200 683 #define ICBXOPT_CLASS2 0x0100 684 #define ICBXOPT_LOOP_ONLY (0 << 4) 685 #define ICBXOPT_PTP_ONLY (1 << 4) 686 #define ICBXOPT_LOOP_2_PTP (2 << 4) 687 #define ICBXOPT_PTP_2_LOOP (3 << 4) 688 689 #define ICBXOPT_RIO_OFF 0 690 #define ICBXOPT_RIO_16BIT 1 691 #define ICBXOPT_RIO_32BIT 2 692 #define ICBXOPT_RIO_16BIT_DELAY 3 693 #define ICBXOPT_RIO_32BIT_DELAY 4 694 695 /* These 3 only apply to the 2300 */ 696 #define ICBZOPT_RATE_ONEGB (MBGSD_ONEGB << 14) 697 #define ICBZOPT_RATE_TWOGB (MBGSD_TWOGB << 14) 698 #define ICBZOPT_RATE_AUTO (MBGSD_AUTO << 14) 699 700 701 #define ICB_MIN_FRMLEN 256 702 #define ICB_MAX_FRMLEN 2112 703 #define ICB_DFLT_FRMLEN 1024 704 #define ICB_DFLT_ALLOC 256 705 #define ICB_DFLT_THROTTLE 16 706 #define ICB_DFLT_RDELAY 5 707 #define ICB_DFLT_RCOUNT 3 708 709 710 #define RQRSP_ADDR0015 0 711 #define RQRSP_ADDR1631 1 712 #define RQRSP_ADDR3247 2 713 #define RQRSP_ADDR4863 3 714 715 716 #define ICB_NNM0 7 717 #define ICB_NNM1 6 718 #define ICB_NNM2 5 719 #define ICB_NNM3 4 720 #define ICB_NNM4 3 721 #define ICB_NNM5 2 722 #define ICB_NNM6 1 723 #define ICB_NNM7 0 724 725 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 726 array[ICB_NNM0] = (u_int8_t) ((wwn >> 0) & 0xff), \ 727 array[ICB_NNM1] = (u_int8_t) ((wwn >> 8) & 0xff), \ 728 array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \ 729 array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \ 730 array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \ 731 array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \ 732 array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \ 733 array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff) 734 735 /* 736 * FC-AL Position Map 737 * 738 * This is an at most 128 byte map that returns either 739 * the LILP or Firmware generated list of ports. 740 * 741 * We deviate a bit from the returned qlogic format to 742 * use an extra bit to say whether this was a LILP or 743 * f/w generated map. 744 */ 745 typedef struct { 746 u_int8_t fwmap : 1, 747 count : 7; 748 u_int8_t map[127]; 749 } fcpos_map_t; 750 751 /* 752 * Port Data Base Element 753 */ 754 755 typedef struct { 756 u_int16_t pdb_options; 757 u_int8_t pdb_mstate; 758 u_int8_t pdb_sstate; 759 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 760 u_int8_t pdb_hardaddr_bits[4]; 761 u_int8_t pdb_portid_bits[4]; 762 u_int8_t pdb_nodename[8]; 763 u_int8_t pdb_portname[8]; 764 u_int16_t pdb_execthrottle; 765 u_int16_t pdb_exec_count; 766 u_int8_t pdb_retry_count; 767 u_int8_t pdb_retry_delay; 768 u_int16_t pdb_resalloc; 769 u_int16_t pdb_curalloc; 770 u_int16_t pdb_qhead; 771 u_int16_t pdb_qtail; 772 u_int16_t pdb_tl_next; 773 u_int16_t pdb_tl_last; 774 u_int16_t pdb_features; /* PLOGI, Common Service */ 775 u_int16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 776 u_int16_t pdb_roi; /* PLOGI, Common Service */ 777 u_int8_t pdb_target; 778 u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 779 u_int16_t pdb_rdsiz; /* PLOGI, Class 3 */ 780 u_int16_t pdb_ncseq; /* PLOGI, Class 3 */ 781 u_int16_t pdb_noseq; /* PLOGI, Class 3 */ 782 u_int16_t pdb_labrtflg; 783 u_int16_t pdb_lstopflg; 784 u_int16_t pdb_sqhead; 785 u_int16_t pdb_sqtail; 786 u_int16_t pdb_ptimer; 787 u_int16_t pdb_nxt_seqid; 788 u_int16_t pdb_fcount; 789 u_int16_t pdb_prli_len; 790 u_int16_t pdb_prli_svc0; 791 u_int16_t pdb_prli_svc3; 792 u_int16_t pdb_loopid; 793 u_int16_t pdb_il_ptr; 794 u_int16_t pdb_sl_ptr; 795 } isp_pdb_t; 796 797 #define PDB_OPTIONS_XMITTING (1<<11) 798 #define PDB_OPTIONS_LNKXMIT (1<<10) 799 #define PDB_OPTIONS_ABORTED (1<<9) 800 #define PDB_OPTIONS_ADISC (1<<1) 801 802 #define PDB_STATE_DISCOVERY 0 803 #define PDB_STATE_WDISC_ACK 1 804 #define PDB_STATE_PLOGI 2 805 #define PDB_STATE_PLOGI_ACK 3 806 #define PDB_STATE_PRLI 4 807 #define PDB_STATE_PRLI_ACK 5 808 #define PDB_STATE_LOGGED_IN 6 809 #define PDB_STATE_PORT_UNAVAIL 7 810 #define PDB_STATE_PRLO 8 811 #define PDB_STATE_PRLO_ACK 9 812 #define PDB_STATE_PLOGO 10 813 #define PDB_STATE_PLOG_ACK 11 814 815 #define SVC3_TGT_ROLE 0x10 816 #define SVC3_INI_ROLE 0x20 817 #define SVC3_ROLE_MASK 0x30 818 #define SVC3_ROLE_SHIFT 4 819 820 #define SNS_GAN 0x100 821 #define SNS_GP3 0x171 822 #define SNS_RFT 0x217 823 typedef struct { 824 u_int16_t snscb_rblen; /* response buffer length (words) */ 825 u_int16_t snscb_res0; 826 u_int16_t snscb_addr[4]; /* response buffer address */ 827 u_int16_t snscb_sblen; /* subcommand buffer length (words) */ 828 u_int16_t snscb_res1; 829 u_int16_t snscb_data[1]; /* variable data */ 830 } sns_screq_t; /* Subcommand Request Structure */ 831 #define SNS_GAN_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 832 #define SNS_GP3_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 833 #define SNS_RFT_REQ_SIZE (sizeof (sns_screq_t)+(21*(sizeof (u_int16_t)))) 834 835 typedef struct { 836 u_int8_t snscb_cthdr[16]; 837 u_int8_t snscb_port_type; 838 u_int8_t snscb_port_id[3]; 839 u_int8_t snscb_portname[8]; 840 u_int16_t snscb_data[1]; /* variable data */ 841 } sns_scrsp_t; /* Subcommand Response Structure */ 842 #define SNS_GAN_RESP_SIZE 608 /* Maximum response size (bytes) */ 843 #define SNS_GP3_RESP_SIZE 532 /* XXX: For 128 ports */ 844 #define SNS_RFT_RESP_SIZE 16 845 846 typedef struct { 847 u_int8_t snscb_cthdr[16]; 848 u_int8_t snscb_port_type; 849 u_int8_t snscb_port_id[3]; 850 u_int8_t snscb_portname[8]; 851 u_int8_t snscb_pnlen; /* symbolic port name length */ 852 u_int8_t snscb_pname[255]; /* symbolic port name */ 853 u_int8_t snscb_nodename[8]; 854 u_int8_t snscb_nnlen; /* symbolic node name length */ 855 u_int8_t snscb_nname[255]; /* symbolic node name */ 856 u_int8_t snscb_ipassoc[8]; 857 u_int8_t snscb_ipaddr[16]; 858 u_int8_t snscb_svc_class[4]; 859 u_int8_t snscb_fc4_types[32]; 860 u_int8_t snscb_fpname[8]; 861 u_int8_t snscb_reserved; 862 u_int8_t snscb_hardaddr[3]; 863 } sns_ganrsp_t; /* Subcommand Response Structure */ 864 865 #endif /* _ISPMBOX_H */ 866
Indexes created Fri Sep 26 08:10:20 GMT 2025