ispmbox.h revision 1.36
1 /* $NetBSD: ispmbox.h,v 1.36 2001/12/14 00:13:46 mjacob Exp $ */ 2 /* 3 * This driver, which is contained in NetBSD in the files: 4 * 5 * sys/dev/ic/isp.c 6 * sys/dev/ic/isp_inline.h 7 * sys/dev/ic/isp_netbsd.c 8 * sys/dev/ic/isp_netbsd.h 9 * sys/dev/ic/isp_target.c 10 * sys/dev/ic/isp_target.h 11 * sys/dev/ic/isp_tpublic.h 12 * sys/dev/ic/ispmbox.h 13 * sys/dev/ic/ispreg.h 14 * sys/dev/ic/ispvar.h 15 * sys/microcode/isp/asm_sbus.h 16 * sys/microcode/isp/asm_1040.h 17 * sys/microcode/isp/asm_1080.h 18 * sys/microcode/isp/asm_12160.h 19 * sys/microcode/isp/asm_2100.h 20 * sys/microcode/isp/asm_2200.h 21 * sys/pci/isp_pci.c 22 * sys/sbus/isp_sbus.c 23 * 24 * Is being actively maintained by Matthew Jacob (mjacob (at) netbsd.org). 25 * This driver also is shared source with FreeBSD, OpenBSD, Linux, Solaris, 26 * Linux versions. This tends to be an interesting maintenance problem. 27 * 28 * Please coordinate with Matthew Jacob on changes you wish to make here. 29 */ 30 /* 31 * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration 32 * All rights reserved. 33 * 34 * Redistribution and use in source and binary forms, with or without 35 * modification, are permitted provided that the following conditions 36 * are met: 37 * 1. Redistributions of source code must retain the above copyright 38 * notice, this list of conditions and the following disclaimer. 39 * 2. Redistributions in binary form must reproduce the above copyright 40 * notice, this list of conditions and the following disclaimer in the 41 * documentation and/or other materials provided with the distribution. 42 * 3. The name of the author may not be used to endorse or promote products 43 * derived from this software without specific prior written permission 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 55 */ 56 57 /* 58 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 59 * <mjacob (at) nas.nasa.gov> 60 */ 61 #ifndef _ISPMBOX_H 62 #define _ISPMBOX_H 63 64 /* 65 * Mailbox Command Opcodes 66 */ 67 #define MBOX_NO_OP 0x0000 68 #define MBOX_LOAD_RAM 0x0001 69 #define MBOX_EXEC_FIRMWARE 0x0002 70 #define MBOX_DUMP_RAM 0x0003 71 #define MBOX_WRITE_RAM_WORD 0x0004 72 #define MBOX_READ_RAM_WORD 0x0005 73 #define MBOX_MAILBOX_REG_TEST 0x0006 74 #define MBOX_VERIFY_CHECKSUM 0x0007 75 #define MBOX_ABOUT_FIRMWARE 0x0008 76 /* 9 */ 77 /* a */ 78 /* b */ 79 /* c */ 80 /* d */ 81 #define MBOX_CHECK_FIRMWARE 0x000e 82 /* f */ 83 #define MBOX_INIT_REQ_QUEUE 0x0010 84 #define MBOX_INIT_RES_QUEUE 0x0011 85 #define MBOX_EXECUTE_IOCB 0x0012 86 #define MBOX_WAKE_UP 0x0013 87 #define MBOX_STOP_FIRMWARE 0x0014 88 #define MBOX_ABORT 0x0015 89 #define MBOX_ABORT_DEVICE 0x0016 90 #define MBOX_ABORT_TARGET 0x0017 91 #define MBOX_BUS_RESET 0x0018 92 #define MBOX_STOP_QUEUE 0x0019 93 #define MBOX_START_QUEUE 0x001a 94 #define MBOX_SINGLE_STEP_QUEUE 0x001b 95 #define MBOX_ABORT_QUEUE 0x001c 96 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 97 /* 1e */ 98 #define MBOX_GET_FIRMWARE_STATUS 0x001f 99 #define MBOX_GET_INIT_SCSI_ID 0x0020 100 #define MBOX_GET_SELECT_TIMEOUT 0x0021 101 #define MBOX_GET_RETRY_COUNT 0x0022 102 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 103 #define MBOX_GET_CLOCK_RATE 0x0024 104 #define MBOX_GET_ACT_NEG_STATE 0x0025 105 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 106 #define MBOX_GET_SBUS_PARAMS 0x0027 107 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 108 #define MBOX_GET_TARGET_PARAMS 0x0028 109 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 110 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 111 /* 2b */ 112 /* 2c */ 113 /* 2d */ 114 /* 2e */ 115 /* 2f */ 116 #define MBOX_SET_INIT_SCSI_ID 0x0030 117 #define MBOX_SET_SELECT_TIMEOUT 0x0031 118 #define MBOX_SET_RETRY_COUNT 0x0032 119 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 120 #define MBOX_SET_CLOCK_RATE 0x0034 121 #define MBOX_SET_ACT_NEG_STATE 0x0035 122 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 123 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 124 #define MBOX_SET_PCI_PARAMETERS 0x0037 125 #define MBOX_SET_TARGET_PARAMS 0x0038 126 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 127 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 128 /* 3b */ 129 /* 3c */ 130 /* 3d */ 131 /* 3e */ 132 /* 3f */ 133 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 134 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 135 #define MBOX_EXEC_BIOS_IOCB 0x0042 136 #define MBOX_SET_FW_FEATURES 0x004a 137 #define MBOX_GET_FW_FEATURES 0x004b 138 #define FW_FEATURE_LVD_NOTIFY 0x2 139 #define FW_FEATURE_FAST_POST 0x1 140 141 #define MBOX_ENABLE_TARGET_MODE 0x0055 142 #define ENABLE_TARGET_FLAG 0x8000 143 #define ENABLE_TQING_FLAG 0x0004 144 #define ENABLE_MANDATORY_DISC 0x0002 145 #define MBOX_GET_TARGET_STATUS 0x0056 146 147 /* These are for the ISP2X00 FC cards */ 148 #define MBOX_GET_LOOP_ID 0x0020 149 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 150 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 151 #define MBOX_GET_RESOURCE_COUNT 0x0042 152 #define MBOX_ENHANCED_GET_PDB 0x0047 153 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 154 #define MBOX_INIT_FIRMWARE 0x0060 155 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 156 #define MBOX_INIT_LIP 0x0062 157 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 158 #define MBOX_GET_PORT_DB 0x0064 159 #define MBOX_CLEAR_ACA 0x0065 160 #define MBOX_TARGET_RESET 0x0066 161 #define MBOX_CLEAR_TASK_SET 0x0067 162 #define MBOX_ABORT_TASK_SET 0x0068 163 #define MBOX_GET_FW_STATE 0x0069 164 #define MBOX_GET_PORT_NAME 0x006A 165 #define MBOX_GET_LINK_STATUS 0x006B 166 #define MBOX_INIT_LIP_RESET 0x006C 167 #define MBOX_SEND_SNS 0x006E 168 #define MBOX_FABRIC_LOGIN 0x006F 169 #define MBOX_SEND_CHANGE_REQUEST 0x0070 170 #define MBOX_FABRIC_LOGOUT 0x0071 171 #define MBOX_INIT_LIP_LOGIN 0x0072 172 173 #define MBOX_GET_SET_DATA_RATE 0x005D /* 23XX only */ 174 #define MBGSD_GET_RATE 0 175 #define MBGSD_SET_RATE 1 176 #define MBGSD_ONEGB 0 177 #define MBGSD_TWOGB 1 178 #define MBGSD_AUTO 2 179 180 181 #define ISP2100_SET_PCI_PARAM 0x00ff 182 183 #define MBOX_BUSY 0x04 184 185 typedef struct { 186 u_int16_t param[8]; 187 } mbreg_t; 188 189 /* 190 * Mailbox Command Complete Status Codes 191 */ 192 #define MBOX_COMMAND_COMPLETE 0x4000 193 #define MBOX_INVALID_COMMAND 0x4001 194 #define MBOX_HOST_INTERFACE_ERROR 0x4002 195 #define MBOX_TEST_FAILED 0x4003 196 #define MBOX_COMMAND_ERROR 0x4005 197 #define MBOX_COMMAND_PARAM_ERROR 0x4006 198 #define MBOX_PORT_ID_USED 0x4007 199 #define MBOX_LOOP_ID_USED 0x4008 200 #define MBOX_ALL_IDS_USED 0x4009 201 #define MBOX_NOT_LOGGED_IN 0x400A 202 #define MBLOGALL 0x000f 203 #define MBLOGNONE 0x0000 204 #define MBLOGMASK(x) ((x) & 0xf) 205 206 /* 207 * Asynchronous event status codes 208 */ 209 #define ASYNC_BUS_RESET 0x8001 210 #define ASYNC_SYSTEM_ERROR 0x8002 211 #define ASYNC_RQS_XFER_ERR 0x8003 212 #define ASYNC_RSP_XFER_ERR 0x8004 213 #define ASYNC_QWAKEUP 0x8005 214 #define ASYNC_TIMEOUT_RESET 0x8006 215 #define ASYNC_DEVICE_RESET 0x8007 216 #define ASYNC_EXTMSG_UNDERRUN 0x800A 217 #define ASYNC_SCAM_INT 0x800B 218 #define ASYNC_HUNG_SCSI 0x800C 219 #define ASYNC_KILLED_BUS 0x800D 220 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 221 #define ASYNC_LIP_OCCURRED 0x8010 222 #define ASYNC_LOOP_UP 0x8011 223 #define ASYNC_LOOP_DOWN 0x8012 224 #define ASYNC_LOOP_RESET 0x8013 225 #define ASYNC_PDB_CHANGED 0x8014 226 #define ASYNC_CHANGE_NOTIFY 0x8015 227 #define ASYNC_LIP_F8 0x8016 228 #define ASYNC_CMD_CMPLT 0x8020 229 #define ASYNC_CTIO_DONE 0x8021 230 #define ASYNC_IP_XMIT_DONE 0x8022 231 #define ASYNC_IP_RECV_DONE 0x8023 232 #define ASYNC_IP_BROADCAST 0x8024 233 #define ASYNC_IP_RCVQ_LOW 0x8025 234 #define ASYNC_IP_RCVQ_EMPTY 0x8026 235 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 236 #define ASYNC_PTPMODE 0x8030 237 #define ASYNC_RIO1 0x8031 238 #define ASYNC_RIO2 0x8032 239 #define ASYNC_RIO3 0x8033 240 #define ASYNC_RIO4 0x8034 241 #define ASYNC_RIO5 0x8035 242 #define ASYNC_CONNMODE 0x8036 243 #define ISP_CONN_LOOP 1 244 #define ISP_CONN_PTP 2 245 #define ISP_CONN_BADLIP 3 246 #define ISP_CONN_FATAL 4 247 #define ISP_CONN_LOOPBACK 5 248 #define ASYNC_RIO_RESP 0x8040 249 #define ASYNC_RIO_COMP 0x8042 250 /* 251 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 252 * mailbox command to enable this. 253 */ 254 #define ASYNC_QFULL_SENT 0x8049 255 256 /* 257 * Mailbox Usages 258 */ 259 260 #define WRITE_REQUEST_QUEUE_IN_POINTER(isp, value) \ 261 ISP_WRITE(isp, isp->isp_rqstinrp, value) 262 263 #define READ_REQUEST_QUEUE_OUT_POINTER(isp) \ 264 ISP_READ(isp, isp->isp_rqstoutrp) 265 266 #define READ_RESPONSE_QUEUE_IN_POINTER(isp) \ 267 ISP_READ(isp, isp->isp_respinrp) 268 269 #define WRITE_RESPONSE_QUEUE_OUT_POINTER(isp, value) \ 270 ISP_WRITE(isp, isp->isp_respoutrp, value) 271 272 /* 273 * Command Structure Definitions 274 */ 275 276 typedef struct { 277 u_int32_t ds_base; 278 u_int32_t ds_count; 279 } ispds_t; 280 281 typedef struct { 282 u_int32_t ds_base; 283 u_int32_t ds_basehi; 284 u_int32_t ds_count; 285 } ispds64_t; 286 287 #define DSTYPE_32BIT 0 288 #define DSTYPE_64BIT 1 289 typedef struct { 290 u_int16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 291 u_int32_t ds_segment; /* unused */ 292 u_int32_t ds_base; /* 32 bit address of DSD list */ 293 } ispdslist_t; 294 295 296 /* 297 * These elements get swizzled around for SBus instances. 298 */ 299 #define ISP_SWAP8(a, b) { \ 300 u_int8_t tmp; \ 301 tmp = a; \ 302 a = b; \ 303 b = tmp; \ 304 } 305 typedef struct { 306 u_int8_t rqs_entry_type; 307 u_int8_t rqs_entry_count; 308 u_int8_t rqs_seqno; 309 u_int8_t rqs_flags; 310 } isphdr_t; 311 312 /* RQS Flag definitions */ 313 #define RQSFLAG_CONTINUATION 0x01 314 #define RQSFLAG_FULL 0x02 315 #define RQSFLAG_BADHEADER 0x04 316 #define RQSFLAG_BADPACKET 0x08 317 318 /* RQS entry_type definitions */ 319 #define RQSTYPE_REQUEST 0x01 320 #define RQSTYPE_DATASEG 0x02 321 #define RQSTYPE_RESPONSE 0x03 322 #define RQSTYPE_MARKER 0x04 323 #define RQSTYPE_CMDONLY 0x05 324 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 325 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 326 #define RQSTYPE_SCAM 0x08 327 #define RQSTYPE_A64 0x09 328 #define RQSTYPE_A64_CONT 0x0a 329 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 330 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 331 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 332 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 333 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 334 #define RQSTYPE_STATUS_CONT 0x10 335 #define RQSTYPE_T2RQS 0x11 336 #define RQSTYPE_IP_XMIT 0x13 337 #define RQSTYPE_T4RQS 0x15 338 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 339 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 340 #define RQSTYPE_CSET0 0x18 341 #define RQSTYPE_T3RQS 0x19 342 #define RQSTYPE_IP_XMIT_64 0x1b 343 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 344 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 345 #define RQSTYPE_RIO1 0x21 346 #define RQSTYPE_RIO2 0x22 347 #define RQSTYPE_IP_RECV 0x23 348 #define RQSTYPE_IP_RECV_CONT 0x24 349 350 351 #define ISP_RQDSEG 4 352 typedef struct { 353 isphdr_t req_header; 354 u_int32_t req_handle; 355 u_int8_t req_lun_trn; 356 u_int8_t req_target; 357 u_int16_t req_cdblen; 358 #define req_modifier req_cdblen /* marker packet */ 359 u_int16_t req_flags; 360 u_int16_t req_reserved; 361 u_int16_t req_time; 362 u_int16_t req_seg_count; 363 u_int8_t req_cdb[12]; 364 ispds_t req_dataseg[ISP_RQDSEG]; 365 } ispreq_t; 366 367 /* 368 * A request packet can also be a marker packet. 369 */ 370 #define SYNC_DEVICE 0 371 #define SYNC_TARGET 1 372 #define SYNC_ALL 2 373 374 #define ISP_RQDSEG_T2 3 375 typedef struct { 376 isphdr_t req_header; 377 u_int32_t req_handle; 378 u_int8_t req_lun_trn; 379 u_int8_t req_target; 380 u_int16_t req_scclun; 381 u_int16_t req_flags; 382 u_int16_t _res2; 383 u_int16_t req_time; 384 u_int16_t req_seg_count; 385 u_int8_t req_cdb[16]; 386 u_int32_t req_totalcnt; 387 ispds_t req_dataseg[ISP_RQDSEG_T2]; 388 } ispreqt2_t; 389 390 #define ISP_RQDSEG_T3 2 391 typedef struct { 392 isphdr_t req_header; 393 u_int32_t req_handle; 394 u_int8_t req_lun_trn; 395 u_int8_t req_target; 396 u_int16_t req_scclun; 397 u_int16_t req_flags; 398 u_int16_t _res2; 399 u_int16_t req_time; 400 u_int16_t req_seg_count; 401 u_int8_t req_cdb[16]; 402 u_int32_t req_totalcnt; 403 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 404 } ispreqt3_t; 405 406 /* req_flag values */ 407 #define REQFLAG_NODISCON 0x0001 408 #define REQFLAG_HTAG 0x0002 409 #define REQFLAG_OTAG 0x0004 410 #define REQFLAG_STAG 0x0008 411 #define REQFLAG_TARGET_RTN 0x0010 412 413 #define REQFLAG_NODATA 0x0000 414 #define REQFLAG_DATA_IN 0x0020 415 #define REQFLAG_DATA_OUT 0x0040 416 #define REQFLAG_DATA_UNKNOWN 0x0060 417 418 #define REQFLAG_DISARQ 0x0100 419 #define REQFLAG_FRC_ASYNC 0x0200 420 #define REQFLAG_FRC_SYNC 0x0400 421 #define REQFLAG_FRC_WIDE 0x0800 422 #define REQFLAG_NOPARITY 0x1000 423 #define REQFLAG_STOPQ 0x2000 424 #define REQFLAG_XTRASNS 0x4000 425 #define REQFLAG_PRIORITY 0x8000 426 427 typedef struct { 428 isphdr_t req_header; 429 u_int32_t req_handle; 430 u_int8_t req_lun_trn; 431 u_int8_t req_target; 432 u_int16_t req_cdblen; 433 u_int16_t req_flags; 434 u_int16_t _res1; 435 u_int16_t req_time; 436 u_int16_t req_seg_count; 437 u_int8_t req_cdb[44]; 438 } ispextreq_t; 439 440 #define ISP_CDSEG 7 441 typedef struct { 442 isphdr_t req_header; 443 u_int32_t _res1; 444 ispds_t req_dataseg[ISP_CDSEG]; 445 } ispcontreq_t; 446 447 #define ISP_CDSEG64 5 448 typedef struct { 449 isphdr_t req_header; 450 ispds64_t req_dataseg[ISP_CDSEG64]; 451 } ispcontreq64_t; 452 453 typedef struct { 454 isphdr_t req_header; 455 u_int32_t req_handle; 456 u_int16_t req_scsi_status; 457 u_int16_t req_completion_status; 458 u_int16_t req_state_flags; 459 u_int16_t req_status_flags; 460 u_int16_t req_time; 461 #define req_response_len req_time /* FC only */ 462 u_int16_t req_sense_len; 463 u_int32_t req_resid; 464 u_int8_t req_response[8]; /* FC only */ 465 u_int8_t req_sense_data[32]; 466 } ispstatusreq_t; 467 468 typedef struct { 469 isphdr_t req_header; 470 u_int8_t req_sense_data[60]; 471 } ispstatus_cont_t; 472 473 /* 474 * For Qlogic 2X00, the high order byte of SCSI status has 475 * additional meaning. 476 */ 477 #define RQCS_RU 0x800 /* Residual Under */ 478 #define RQCS_RO 0x400 /* Residual Over */ 479 #define RQCS_RESID (RQCS_RU|RQCS_RO) 480 #define RQCS_SV 0x200 /* Sense Length Valid */ 481 #define RQCS_RV 0x100 /* FCP Response Length Valid */ 482 483 /* 484 * Completion Status Codes. 485 */ 486 #define RQCS_COMPLETE 0x0000 487 #define RQCS_DMA_ERROR 0x0002 488 #define RQCS_RESET_OCCURRED 0x0004 489 #define RQCS_ABORTED 0x0005 490 #define RQCS_TIMEOUT 0x0006 491 #define RQCS_DATA_OVERRUN 0x0007 492 #define RQCS_DATA_UNDERRUN 0x0015 493 #define RQCS_QUEUE_FULL 0x001C 494 495 /* 1X00 Only Completion Codes */ 496 #define RQCS_INCOMPLETE 0x0001 497 #define RQCS_TRANSPORT_ERROR 0x0003 498 #define RQCS_COMMAND_OVERRUN 0x0008 499 #define RQCS_STATUS_OVERRUN 0x0009 500 #define RQCS_BAD_MESSAGE 0x000a 501 #define RQCS_NO_MESSAGE_OUT 0x000b 502 #define RQCS_EXT_ID_FAILED 0x000c 503 #define RQCS_IDE_MSG_FAILED 0x000d 504 #define RQCS_ABORT_MSG_FAILED 0x000e 505 #define RQCS_REJECT_MSG_FAILED 0x000f 506 #define RQCS_NOP_MSG_FAILED 0x0010 507 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 508 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 509 #define RQCS_ID_MSG_FAILED 0x0013 510 #define RQCS_UNEXP_BUS_FREE 0x0014 511 #define RQCS_XACT_ERR1 0x0018 512 #define RQCS_XACT_ERR2 0x0019 513 #define RQCS_XACT_ERR3 0x001A 514 #define RQCS_BAD_ENTRY 0x001B 515 #define RQCS_PHASE_SKIPPED 0x001D 516 #define RQCS_ARQS_FAILED 0x001E 517 #define RQCS_WIDE_FAILED 0x001F 518 #define RQCS_SYNCXFER_FAILED 0x0020 519 #define RQCS_LVD_BUSERR 0x0021 520 521 /* 2X00 Only Completion Codes */ 522 #define RQCS_PORT_UNAVAILABLE 0x0028 523 #define RQCS_PORT_LOGGED_OUT 0x0029 524 #define RQCS_PORT_CHANGED 0x002A 525 #define RQCS_PORT_BUSY 0x002B 526 527 /* 528 * 1X00 specific State Flags 529 */ 530 #define RQSF_GOT_BUS 0x0100 531 #define RQSF_GOT_TARGET 0x0200 532 #define RQSF_SENT_CDB 0x0400 533 #define RQSF_XFRD_DATA 0x0800 534 #define RQSF_GOT_STATUS 0x1000 535 #define RQSF_GOT_SENSE 0x2000 536 #define RQSF_XFER_COMPLETE 0x4000 537 538 /* 539 * 2X00 specific State Flags 540 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 541 */ 542 #define RQSF_DATA_IN 0x0020 543 #define RQSF_DATA_OUT 0x0040 544 #define RQSF_STAG 0x0008 545 #define RQSF_OTAG 0x0004 546 #define RQSF_HTAG 0x0002 547 /* 548 * 1X00 Status Flags 549 */ 550 #define RQSTF_DISCONNECT 0x0001 551 #define RQSTF_SYNCHRONOUS 0x0002 552 #define RQSTF_PARITY_ERROR 0x0004 553 #define RQSTF_BUS_RESET 0x0008 554 #define RQSTF_DEVICE_RESET 0x0010 555 #define RQSTF_ABORTED 0x0020 556 #define RQSTF_TIMEOUT 0x0040 557 #define RQSTF_NEGOTIATION 0x0080 558 559 /* 560 * 2X00 specific state flags 561 */ 562 /* RQSF_SENT_CDB */ 563 /* RQSF_XFRD_DATA */ 564 /* RQSF_GOT_STATUS */ 565 /* RQSF_XFER_COMPLETE */ 566 567 /* 568 * 2X00 specific status flags 569 */ 570 /* RQSTF_ABORTED */ 571 /* RQSTF_TIMEOUT */ 572 #define RQSTF_DMA_ERROR 0x0080 573 #define RQSTF_LOGOUT 0x2000 574 575 /* 576 * Miscellaneous 577 */ 578 #ifndef ISP_EXEC_THROTTLE 579 #define ISP_EXEC_THROTTLE 16 580 #endif 581 582 /* 583 * About Firmware returns an 'attribute' word in mailbox 6. 584 */ 585 #define ISP_FW_ATTR_TMODE 0x01 586 #define ISP_FW_ATTR_SCCLUN 0x02 587 #define ISP_FW_ATTR_FABRIC 0x04 588 #define ISP_FW_ATTR_CLASS2 0x08 589 #define ISP_FW_ATTR_FCTAPE 0x10 590 #define ISP_FW_ATTR_IP 0x20 591 592 /* 593 * Reduced Interrupt Operation Response Queue Entreis 594 */ 595 596 typedef struct { 597 isphdr_t req_header; 598 u_int32_t req_handles[15]; 599 } isp_rio1_t; 600 601 typedef struct { 602 isphdr_t req_header; 603 u_int16_t req_handles[30]; 604 } isp_rio2_t; 605 606 /* 607 * FC (ISP2100) specific data structures 608 */ 609 610 /* 611 * Initialization Control Block 612 * 613 * Version One (prime) format. 614 */ 615 typedef struct isp_icb { 616 u_int8_t icb_version; 617 u_int8_t _reserved0; 618 u_int16_t icb_fwoptions; 619 u_int16_t icb_maxfrmlen; 620 u_int16_t icb_maxalloc; 621 u_int16_t icb_execthrottle; 622 u_int8_t icb_retry_count; 623 u_int8_t icb_retry_delay; 624 u_int8_t icb_portname[8]; 625 u_int16_t icb_hardaddr; 626 u_int8_t icb_iqdevtype; 627 u_int8_t icb_logintime; 628 u_int8_t icb_nodename[8]; 629 u_int16_t icb_rqstout; 630 u_int16_t icb_rspnsin; 631 u_int16_t icb_rqstqlen; 632 u_int16_t icb_rsltqlen; 633 u_int16_t icb_rqstaddr[4]; 634 u_int16_t icb_respaddr[4]; 635 u_int16_t icb_lunenables; 636 u_int8_t icb_ccnt; 637 u_int8_t icb_icnt; 638 u_int16_t icb_lunetimeout; 639 u_int16_t _reserved1; 640 u_int16_t icb_xfwoptions; 641 u_int8_t icb_racctimer; 642 u_int8_t icb_idelaytimer; 643 u_int16_t icb_zfwoptions; 644 u_int16_t _reserved2[13]; 645 } isp_icb_t; 646 #define ICB_VERSION1 1 647 648 #define ICBOPT_HARD_ADDRESS 0x0001 649 #define ICBOPT_FAIRNESS 0x0002 650 #define ICBOPT_FULL_DUPLEX 0x0004 651 #define ICBOPT_FAST_POST 0x0008 652 #define ICBOPT_TGT_ENABLE 0x0010 653 #define ICBOPT_INI_DISABLE 0x0020 654 #define ICBOPT_INI_ADISC 0x0040 655 #define ICBOPT_INI_TGTTYPE 0x0080 656 #define ICBOPT_PDBCHANGE_AE 0x0100 657 #define ICBOPT_NOLIP 0x0200 658 #define ICBOPT_SRCHDOWN 0x0400 659 #define ICBOPT_PREVLOOP 0x0800 660 #define ICBOPT_STOP_ON_QFULL 0x1000 661 #define ICBOPT_FULL_LOGIN 0x2000 662 #define ICBOPT_BOTH_WWNS 0x4000 663 #define ICBOPT_EXTENDED 0x8000 664 665 #define ICBXOPT_CLASS2_ACK0 0x0200 666 #define ICBXOPT_CLASS2 0x0100 667 #define ICBXOPT_LOOP_ONLY (0 << 4) 668 #define ICBXOPT_PTP_ONLY (1 << 4) 669 #define ICBXOPT_LOOP_2_PTP (2 << 4) 670 #define ICBXOPT_PTP_2_LOOP (3 << 4) 671 672 #define ICBXOPT_RIO_OFF 0 673 #define ICBXOPT_RIO_16BIT 1 674 #define ICBXOPT_RIO_32BIT 2 675 #define ICBXOPT_RIO_16BIT_DELAY 3 676 #define ICBXOPT_RIO_32BIT_DELAY 4 677 678 /* These 3 only apply to the 2300 */ 679 #define ICBZOPT_RATE_ONEGB (MBGSD_ONEGB << 14) 680 #define ICBZOPT_RATE_TWOGB (MBGSD_TWOGB << 14) 681 #define ICBZOPT_RATE_AUTO (MBGSD_AUTO << 14) 682 683 684 #define ICB_MIN_FRMLEN 256 685 #define ICB_MAX_FRMLEN 2112 686 #define ICB_DFLT_FRMLEN 1024 687 #define ICB_DFLT_ALLOC 256 688 #define ICB_DFLT_THROTTLE 16 689 #define ICB_DFLT_RDELAY 5 690 #define ICB_DFLT_RCOUNT 3 691 692 693 #define RQRSP_ADDR0015 0 694 #define RQRSP_ADDR1631 1 695 #define RQRSP_ADDR3247 2 696 #define RQRSP_ADDR4863 3 697 698 699 #define ICB_NNM0 7 700 #define ICB_NNM1 6 701 #define ICB_NNM2 5 702 #define ICB_NNM3 4 703 #define ICB_NNM4 3 704 #define ICB_NNM5 2 705 #define ICB_NNM6 1 706 #define ICB_NNM7 0 707 708 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 709 array[ICB_NNM0] = (u_int8_t) ((wwn >> 0) & 0xff), \ 710 array[ICB_NNM1] = (u_int8_t) ((wwn >> 8) & 0xff), \ 711 array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \ 712 array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \ 713 array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \ 714 array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \ 715 array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \ 716 array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff) 717 718 /* 719 * FC-AL Position Map 720 * 721 * This is an at most 128 byte map that returns either 722 * the LILP or Firmware generated list of ports. 723 * 724 * We deviate a bit from the returned qlogic format to 725 * use an extra bit to say whether this was a LILP or 726 * f/w generated map. 727 */ 728 typedef struct { 729 u_int8_t fwmap : 1, 730 count : 7; 731 u_int8_t map[127]; 732 } fcpos_map_t; 733 734 /* 735 * Port Data Base Element 736 */ 737 738 typedef struct { 739 u_int16_t pdb_options; 740 u_int8_t pdb_mstate; 741 u_int8_t pdb_sstate; 742 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 743 u_int8_t pdb_hardaddr_bits[4]; 744 u_int8_t pdb_portid_bits[4]; 745 u_int8_t pdb_nodename[8]; 746 u_int8_t pdb_portname[8]; 747 u_int16_t pdb_execthrottle; 748 u_int16_t pdb_exec_count; 749 u_int8_t pdb_retry_count; 750 u_int8_t pdb_retry_delay; 751 u_int16_t pdb_resalloc; 752 u_int16_t pdb_curalloc; 753 u_int16_t pdb_qhead; 754 u_int16_t pdb_qtail; 755 u_int16_t pdb_tl_next; 756 u_int16_t pdb_tl_last; 757 u_int16_t pdb_features; /* PLOGI, Common Service */ 758 u_int16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 759 u_int16_t pdb_roi; /* PLOGI, Common Service */ 760 u_int8_t pdb_target; 761 u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 762 u_int16_t pdb_rdsiz; /* PLOGI, Class 3 */ 763 u_int16_t pdb_ncseq; /* PLOGI, Class 3 */ 764 u_int16_t pdb_noseq; /* PLOGI, Class 3 */ 765 u_int16_t pdb_labrtflg; 766 u_int16_t pdb_lstopflg; 767 u_int16_t pdb_sqhead; 768 u_int16_t pdb_sqtail; 769 u_int16_t pdb_ptimer; 770 u_int16_t pdb_nxt_seqid; 771 u_int16_t pdb_fcount; 772 u_int16_t pdb_prli_len; 773 u_int16_t pdb_prli_svc0; 774 u_int16_t pdb_prli_svc3; 775 u_int16_t pdb_loopid; 776 u_int16_t pdb_il_ptr; 777 u_int16_t pdb_sl_ptr; 778 } isp_pdb_t; 779 780 #define PDB_OPTIONS_XMITTING (1<<11) 781 #define PDB_OPTIONS_LNKXMIT (1<<10) 782 #define PDB_OPTIONS_ABORTED (1<<9) 783 #define PDB_OPTIONS_ADISC (1<<1) 784 785 #define PDB_STATE_DISCOVERY 0 786 #define PDB_STATE_WDISC_ACK 1 787 #define PDB_STATE_PLOGI 2 788 #define PDB_STATE_PLOGI_ACK 3 789 #define PDB_STATE_PRLI 4 790 #define PDB_STATE_PRLI_ACK 5 791 #define PDB_STATE_LOGGED_IN 6 792 #define PDB_STATE_PORT_UNAVAIL 7 793 #define PDB_STATE_PRLO 8 794 #define PDB_STATE_PRLO_ACK 9 795 #define PDB_STATE_PLOGO 10 796 #define PDB_STATE_PLOG_ACK 11 797 798 #define SVC3_TGT_ROLE 0x10 799 #define SVC3_INI_ROLE 0x20 800 #define SVC3_ROLE_MASK 0x30 801 #define SVC3_ROLE_SHIFT 4 802 803 #define SNS_GAN 0x100 804 #define SNS_GP3 0x171 805 #define SNS_RFT 0x217 806 typedef struct { 807 u_int16_t snscb_rblen; /* response buffer length (words) */ 808 u_int16_t snscb_res0; 809 u_int16_t snscb_addr[4]; /* response buffer address */ 810 u_int16_t snscb_sblen; /* subcommand buffer length (words) */ 811 u_int16_t snscb_res1; 812 u_int16_t snscb_data[1]; /* variable data */ 813 } sns_screq_t; /* Subcommand Request Structure */ 814 #define SNS_GAN_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 815 #define SNS_GP3_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 816 #define SNS_RFT_REQ_SIZE (sizeof (sns_screq_t)+(21*(sizeof (u_int16_t)))) 817 818 typedef struct { 819 u_int8_t snscb_cthdr[16]; 820 u_int8_t snscb_port_type; 821 u_int8_t snscb_port_id[3]; 822 u_int8_t snscb_portname[8]; 823 u_int16_t snscb_data[1]; /* variable data */ 824 } sns_scrsp_t; /* Subcommand Response Structure */ 825 #define SNS_GAN_RESP_SIZE 608 /* Maximum response size (bytes) */ 826 #define SNS_GP3_RESP_SIZE 532 /* XXX: For 128 ports */ 827 #define SNS_RFT_RESP_SIZE 16 828 829 typedef struct { 830 u_int8_t snscb_cthdr[16]; 831 u_int8_t snscb_port_type; 832 u_int8_t snscb_port_id[3]; 833 u_int8_t snscb_portname[8]; 834 u_int8_t snscb_pnlen; /* symbolic port name length */ 835 u_int8_t snscb_pname[255]; /* symbolic port name */ 836 u_int8_t snscb_nodename[8]; 837 u_int8_t snscb_nnlen; /* symbolic node name length */ 838 u_int8_t snscb_nname[255]; /* symbolic node name */ 839 u_int8_t snscb_ipassoc[8]; 840 u_int8_t snscb_ipaddr[16]; 841 u_int8_t snscb_svc_class[4]; 842 u_int8_t snscb_fc4_types[32]; 843 u_int8_t snscb_fpname[8]; 844 u_int8_t snscb_reserved; 845 u_int8_t snscb_hardaddr[3]; 846 } sns_ganrsp_t; /* Subcommand Response Structure */ 847 848 #endif /* _ISPMBOX_H */ 849
Indexes created Thu Sep 25 16:09:42 GMT 2025