ispmbox.h revision 1.5 1 /* $NetBSD: ispmbox.h,v 1.5 1997/09/29 01:41:30 mjacob Exp $ */
2
3 /*
4 * Mailbox and Command Definitions for for Qlogic ISP SCSI adapters.
5 *
6 * Copyright (c) 1997 by Matthew Jacob
7 * NASA/Ames Research Center
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice immediately at the beginning of the file, without modification,
15 * this list of conditions, and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. The name of the author may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35 #ifndef _ISPMBOX_H
36 #define _ISPMBOX_H
37
38 /*
39 * Mailbox Command Opcodes
40 */
41
42 #define MBOX_NO_OP 0x0000
43 #define MBOX_LOAD_RAM 0x0001
44 #define MBOX_EXEC_FIRMWARE 0x0002
45 #define MBOX_DUMP_RAM 0x0003
46 #define MBOX_WRITE_RAM_WORD 0x0004
47 #define MBOX_READ_RAM_WORD 0x0005
48 #define MBOX_MAILBOX_REG_TEST 0x0006
49 #define MBOX_VERIFY_CHECKSUM 0x0007
50 #define MBOX_ABOUT_FIRMWARE 0x0008
51 /* 9 */
52 /* a */
53 /* b */
54 /* c */
55 /* d */
56 #define MBOX_CHECK_FIRMWARE 0x000e
57 /* f */
58 #define MBOX_INIT_REQ_QUEUE 0x0010
59 #define MBOX_INIT_RES_QUEUE 0x0011
60 #define MBOX_EXECUTE_IOCB 0x0012
61 #define MBOX_WAKE_UP 0x0013
62 #define MBOX_STOP_FIRMWARE 0x0014
63 #define MBOX_ABORT 0x0015
64 #define MBOX_ABORT_DEVICE 0x0016
65 #define MBOX_ABORT_TARGET 0x0017
66 #define MBOX_BUS_RESET 0x0018
67 #define MBOX_STOP_QUEUE 0x0019
68 #define MBOX_START_QUEUE 0x001a
69 #define MBOX_SINGLE_STEP_QUEUE 0x001b
70 #define MBOX_ABORT_QUEUE 0x001c
71 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d
72 /* 1e */
73 #define MBOX_GET_FIRMWARE_STATUS 0x001f
74 #define MBOX_GET_INIT_SCSI_ID 0x0020
75 #define MBOX_GET_SELECT_TIMEOUT 0x0021
76 #define MBOX_GET_RETRY_COUNT 0x0022
77 #define MBOX_GET_TAG_AGE_LIMIT 0x0023
78 #define MBOX_GET_CLOCK_RATE 0x0024
79 #define MBOX_GET_ACT_NEG_STATE 0x0025
80 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026
81 #define MBOX_GET_SBUS_PARAMS 0x0027
82 #define MBOX_GET_TARGET_PARAMS 0x0028
83 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029
84 /* 2a */
85 /* 2b */
86 /* 2c */
87 /* 2d */
88 /* 2e */
89 /* 2f */
90 #define MBOX_SET_INIT_SCSI_ID 0x0030
91 #define MBOX_SET_SELECT_TIMEOUT 0x0031
92 #define MBOX_SET_RETRY_COUNT 0x0032
93 #define MBOX_SET_TAG_AGE_LIMIT 0x0033
94 #define MBOX_SET_CLOCK_RATE 0x0034
95 #define MBOX_SET_ACTIVE_NEG_STATE 0x0035
96 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036
97 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037
98 #define MBOX_SET_PCI_PARAMETERS 0x0037
99 #define MBOX_SET_TARGET_PARAMS 0x0038
100 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039
101 /* 3a */
102 /* 3b */
103 /* 3c */
104 /* 3d */
105 /* 3e */
106 /* 3f */
107 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040
108 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041
109 #define MBOX_EXEC_BIOS_IOCB 0x0042
110
111 /* These are for the ISP2100 FC cards */
112 #define MBOX_GET_LOOP_ID 0x20
113 #define MBOX_EXEC_COMMAND_IOCB_A64 0x54
114 #define MBOX_INIT_FIRMWARE 0x60
115 #define MBOX_GET_INIT_CONTROL_BLOCK 0x61
116 #define MBOX_INIT_LIP 0x62
117 #define MBOX_GET_FC_AL_POSITION_MAP 0x63
118 #define MBOX_GET_PORT_DB 0x64
119 #define MBOX_CLEAR_ACA 0x65
120 #define MBOX_TARGET_RESET 0x66
121 #define MBOX_CLEAR_TASK_SET 0x67
122 #define MBOX_ABORT_TASK_SET 0x68
123 #define MBOX_GET_FW_STATE 0x69
124
125 #define ISP2100_SET_PCI_PARAM 0x00ff
126
127 #define MBOX_BUSY 0x04
128
129 typedef struct {
130 u_int16_t param[8];
131 } mbreg_t;
132
133 /*
134 * Command Structure Definitions
135 */
136
137 typedef struct {
138 u_int32_t ds_base;
139 u_int32_t ds_count;
140 } ispds_t;
141
142 typedef struct {
143 #if BYTE_ORDER == BIG_ENDIAN
144 u_int8_t rqs_entry_count;
145 u_int8_t rqs_entry_type;
146 u_int8_t rqs_flags;
147 u_int8_t rqs_seqno;
148 #else
149 u_int8_t rqs_entry_type;
150 u_int8_t rqs_entry_count;
151 u_int8_t rqs_seqno;
152 u_int8_t rqs_flags;
153 #endif
154 } isphdr_t;
155
156 /* RQS Flag definitions */
157 #define RQSFLAG_CONTINUATION 0x01
158 #define RQSFLAG_FULL 0x02
159 #define RQSFLAG_BADHEADER 0x04
160 #define RQSFLAG_BADPACKET 0x08
161
162 /* RQS entry_type definitions */
163 #define RQSTYPE_REQUEST 1
164 #define RQSTYPE_DATASEG 2
165 #define RQSTYPE_RESPONSE 3
166 #define RQSTYPE_MARKER 4
167 #define RQSTYPE_CMDONLY 5
168 #define RQSTYPE_T2RQS 17
169 #define RQSTYPE_T3RQS 25
170 #define RQSTYPE_T1DSEG 10
171
172
173 #define ISP_RQDSEG 4
174 typedef struct {
175 isphdr_t req_header;
176 u_int32_t req_handle;
177 #if BYTE_ORDER == BIG_ENDIAN
178 u_int8_t req_target;
179 u_int8_t req_lun_trn;
180 #else
181 u_int8_t req_lun_trn;
182 u_int8_t req_target;
183 #endif
184 u_int16_t req_cdblen;
185 #define req_modifier req_cdblen /* marker packet */
186 u_int16_t req_flags;
187 u_int16_t _res1;
188 u_int16_t req_time;
189 u_int16_t req_seg_count;
190 u_int8_t req_cdb[12];
191 ispds_t req_dataseg[ISP_RQDSEG];
192 } ispreq_t;
193
194 #define ISP_RQDSEG_T2 3
195 typedef struct {
196 isphdr_t req_header;
197 u_int32_t req_handle;
198 #if BYTE_ORDER == BIG_ENDIAN
199 u_int8_t req_target;
200 u_int8_t req_lun_trn;
201 #else
202 u_int8_t req_lun_trn;
203 u_int8_t req_target;
204 #endif
205 u_int16_t _res1;
206 u_int16_t req_flags;
207 u_int16_t _res2;
208 u_int16_t req_time;
209 u_int16_t req_seg_count;
210 u_int32_t req_cdb[4];
211 u_int32_t req_totalcnt;
212 ispds_t req_dataseg[ISP_RQDSEG_T2];
213 } ispreqt2_t;
214
215 /* req_flag values */
216 #define REQFLAG_NODISCON 0x0001
217 #define REQFLAG_HTAG 0x0002
218 #define REQFLAG_OTAG 0x0004
219 #define REQFLAG_STAG 0x0008
220 #define REQFLAG_TARGET_RTN 0x0010
221
222 #define REQFLAG_NODATA 0x0000
223 #define REQFLAG_DATA_IN 0x0020
224 #define REQFLAG_DATA_OUT 0x0040
225 #define REQFLAG_DATA_UNKNOWN 0x0060
226
227 #define REQFLAG_DISARQ 0x0100
228
229 typedef struct {
230 isphdr_t req_header;
231 u_int32_t req_handle;
232 #if BYTE_ORDER == BIG_ENDIAN
233 u_int8_t req_target;
234 u_int8_t req_lun_trn;
235 #else
236 u_int8_t req_lun_trn;
237 u_int8_t req_target;
238 #endif
239 u_int16_t req_cdblen;
240 u_int16_t req_flags;
241 u_int16_t _res1;
242 u_int16_t req_time;
243 u_int16_t req_seg_count;
244 u_int8_t req_cdb[44];
245 } ispextreq_t;
246
247 #define ISP_CDSEG 7
248 typedef struct {
249 isphdr_t req_header;
250 u_int32_t _res1;
251 ispds_t req_dataseg[ISP_CDSEG];
252 } ispcontreq_t;
253
254 typedef struct {
255 isphdr_t req_header;
256 u_int32_t _res1;
257 #if BYTE_ORDER == BIG_ENDIAN
258 u_int8_t req_target;
259 u_int8_t req_lun_trn;
260 u_int8_t _res2;
261 u_int8_t req_modifier;
262 #else
263 u_int8_t req_lun_trn;
264 u_int8_t req_target;
265 u_int8_t req_modifier;
266 u_int8_t _res2;
267 #endif
268 } ispmarkreq_t;
269
270 #define SYNC_DEVICE 0
271 #define SYNC_TARGET 1
272 #define SYNC_ALL 2
273
274 typedef struct {
275 isphdr_t req_header;
276 u_int32_t req_handle;
277 u_int16_t req_scsi_status;
278 u_int16_t req_completion_status;
279 u_int16_t req_state_flags;
280 u_int16_t req_status_flags;
281 u_int16_t req_time;
282 u_int16_t req_sense_len;
283 u_int32_t req_resid;
284 u_int8_t _res1[8];
285 u_int8_t req_sense_data[32];
286 } ispstatusreq_t;
287
288 /*
289 * For Qlogic 2100, the high order byte of SCSI status has
290 * additional meaning.
291 */
292 #define RQCS_RU 0x800 /* Residual Under */
293 #define RQCS_RO 0x400 /* Residual Over */
294 #define RQCS_SV 0x200 /* Sense Length Valid */
295 #define RQCS_RV 0x100 /* Residual Valid */
296
297 /*
298 * Completion Status Codes.
299 */
300 #define RQCS_COMPLETE 0x0000
301 #define RQCS_INCOMPLETE 0x0001
302 #define RQCS_DMA_ERROR 0x0002
303 #define RQCS_TRANSPORT_ERROR 0x0003
304 #define RQCS_RESET_OCCURRED 0x0004
305 #define RQCS_ABORTED 0x0005
306 #define RQCS_TIMEOUT 0x0006
307 #define RQCS_DATA_OVERRUN 0x0007
308 #define RQCS_COMMAND_OVERRUN 0x0008
309 #define RQCS_STATUS_OVERRUN 0x0009
310 #define RQCS_BAD_MESSAGE 0x000a
311 #define RQCS_NO_MESSAGE_OUT 0x000b
312 #define RQCS_EXT_ID_FAILED 0x000c
313 #define RQCS_IDE_MSG_FAILED 0x000d
314 #define RQCS_ABORT_MSG_FAILED 0x000e
315 #define RQCS_REJECT_MSG_FAILED 0x000f
316 #define RQCS_NOP_MSG_FAILED 0x0010
317 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011
318 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012
319 #define RQCS_ID_MSG_FAILED 0x0013
320 #define RQCS_UNEXP_BUS_FREE 0x0014
321 #define RQCS_DATA_UNDERRUN 0x0015
322 /* 2100 Only Completion Codes */
323 #define RQCS_PORT_UNAVAILABLE 0x0028
324 #define RQCS_PORT_LOGGED_OUT 0x0029
325 #define RQCS_PORT_CHANGED 0x002A
326 #define RQCS_PORT_BUSY 0x002B
327
328 /*
329 * State Flags (not applicable to 2100)
330 */
331 #define RQSF_GOT_BUS 0x0100
332 #define RQSF_GOT_TARGET 0x0200
333 #define RQSF_SENT_CDB 0x0400
334 #define RQSF_XFRD_DATA 0x0800
335 #define RQSF_GOT_STATUS 0x1000
336 #define RQSF_GOT_SENSE 0x2000
337 #define RQSF_XFER_COMPLETE 0x4000
338
339 /*
340 * Status Flags (not applicable to 2100)
341 */
342 #define RQSTF_DISCONNECT 0x0001
343 #define RQSTF_SYNCHRONOUS 0x0002
344 #define RQSTF_PARITY_ERROR 0x0004
345 #define RQSTF_BUS_RESET 0x0008
346 #define RQSTF_DEVICE_RESET 0x0010
347 #define RQSTF_ABORTED 0x0020
348 #define RQSTF_TIMEOUT 0x0040
349 #define RQSTF_NEGOTIATION 0x0080
350
351 /*
352 * FC (ISP2100) specific data structures
353 */
354
355 /*
356 * Initialization Control Block
357 */
358 typedef struct {
359 #if BYTE_ORDER == BIG_ENDIAN
360 u_int8_t _reserved0;
361 u_int8_t icb_version;
362 #else
363 u_int8_t icb_version;
364 u_int8_t _reserved0;
365 #endif
366 u_int16_t icb_fwoptions;
367 u_int16_t icb_maxfrmlen;
368 u_int16_t icb_maxalloc;
369 u_int16_t icb_execthrottle;
370 #if BYTE_ORDER == BIG_ENDIAN
371 u_int8_t icb_retry_delay;
372 u_int8_t icb_retry_count;
373 #else
374 u_int8_t icb_retry_count;
375 u_int8_t icb_retry_delay;
376 #endif
377 u_int16_t icb_nodename[4];
378 u_int16_t icb_hardaddr;
379 u_int16_t _reserved1[5];
380 u_int16_t icb_rqstout;
381 u_int16_t icb_rspnsin;
382 u_int16_t icb_rqstqlen;
383 u_int16_t icb_rsltqlen;
384 u_int16_t icb_rqstaddr[4];
385 u_int16_t icb_respaddr[4];
386 } isp_icb_t;
387
388 #define ICB_DFLT_FRMLEN 1024
389 #define MAKE_NODE_NAME(isp, icbp) \
390 (icbp)->icb_nodename[0] = 0, (icbp)->icb_nodename[1] = 0x5355,\
391 (icbp)->icb_nodename[2] = 0x4E57, (icbp)->icb_nodename[3] = 0
392
393 #endif /* _ISPMBOX_H */
394