ispmbox.h revision 1.50.28.2
1 /* $NetBSD: ispmbox.h,v 1.50.28.2 2008/06/02 13:23:24 mjf Exp $ */ 2 /* 3 * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration 4 * All rights reserved. 5 * 6 * Additional Copyright (C) 2000-2007 by Matthew Jacob 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /* 32 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 33 */ 34 #ifndef _ISPMBOX_H 35 #define _ISPMBOX_H 36 37 /* 38 * Mailbox Command Opcodes 39 */ 40 #define MBOX_NO_OP 0x0000 41 #define MBOX_LOAD_RAM 0x0001 42 #define MBOX_EXEC_FIRMWARE 0x0002 43 #define MBOX_DUMP_RAM 0x0003 44 #define MBOX_WRITE_RAM_WORD 0x0004 45 #define MBOX_READ_RAM_WORD 0x0005 46 #define MBOX_MAILBOX_REG_TEST 0x0006 47 #define MBOX_VERIFY_CHECKSUM 0x0007 48 #define MBOX_ABOUT_FIRMWARE 0x0008 49 #define MBOX_LOAD_RISC_RAM_2100 0x0009 50 /* a */ 51 #define MBOX_LOAD_RISC_RAM 0x000b 52 /* c */ 53 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 54 #define MBOX_CHECK_FIRMWARE 0x000e 55 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f 56 #define MBOX_INIT_REQ_QUEUE 0x0010 57 #define MBOX_INIT_RES_QUEUE 0x0011 58 #define MBOX_EXECUTE_IOCB 0x0012 59 #define MBOX_WAKE_UP 0x0013 60 #define MBOX_STOP_FIRMWARE 0x0014 61 #define MBOX_ABORT 0x0015 62 #define MBOX_ABORT_DEVICE 0x0016 63 #define MBOX_ABORT_TARGET 0x0017 64 #define MBOX_BUS_RESET 0x0018 65 #define MBOX_STOP_QUEUE 0x0019 66 #define MBOX_START_QUEUE 0x001a 67 #define MBOX_SINGLE_STEP_QUEUE 0x001b 68 #define MBOX_ABORT_QUEUE 0x001c 69 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 70 /* 1e */ 71 #define MBOX_GET_FIRMWARE_STATUS 0x001f 72 #define MBOX_GET_INIT_SCSI_ID 0x0020 73 #define MBOX_GET_SELECT_TIMEOUT 0x0021 74 #define MBOX_GET_RETRY_COUNT 0x0022 75 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 76 #define MBOX_GET_CLOCK_RATE 0x0024 77 #define MBOX_GET_ACT_NEG_STATE 0x0025 78 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 79 #define MBOX_GET_SBUS_PARAMS 0x0027 80 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 81 #define MBOX_GET_TARGET_PARAMS 0x0028 82 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 83 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 84 /* 2b */ 85 /* 2c */ 86 /* 2d */ 87 /* 2e */ 88 /* 2f */ 89 #define MBOX_SET_INIT_SCSI_ID 0x0030 90 #define MBOX_SET_SELECT_TIMEOUT 0x0031 91 #define MBOX_SET_RETRY_COUNT 0x0032 92 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 93 #define MBOX_SET_CLOCK_RATE 0x0034 94 #define MBOX_SET_ACT_NEG_STATE 0x0035 95 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 96 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 97 #define MBOX_SET_PCI_PARAMETERS 0x0037 98 #define MBOX_SET_TARGET_PARAMS 0x0038 99 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 100 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 101 /* 3b */ 102 /* 3c */ 103 /* 3d */ 104 /* 3e */ 105 /* 3f */ 106 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 107 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 108 #define MBOX_EXEC_BIOS_IOCB 0x0042 109 #define MBOX_SET_FW_FEATURES 0x004a 110 #define MBOX_GET_FW_FEATURES 0x004b 111 #define FW_FEATURE_FAST_POST 0x1 112 #define FW_FEATURE_LVD_NOTIFY 0x2 113 #define FW_FEATURE_RIO_32BIT 0x4 114 #define FW_FEATURE_RIO_16BIT 0x8 115 116 #define MBOX_INIT_REQ_QUEUE_A64 0x0052 117 #define MBOX_INIT_RES_QUEUE_A64 0x0053 118 119 #define MBOX_ENABLE_TARGET_MODE 0x0055 120 #define ENABLE_TARGET_FLAG 0x8000 121 #define ENABLE_TQING_FLAG 0x0004 122 #define ENABLE_MANDATORY_DISC 0x0002 123 #define MBOX_GET_TARGET_STATUS 0x0056 124 125 /* These are for the ISP2X00 FC cards */ 126 #define MBOX_GET_LOOP_ID 0x0020 127 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 128 #define ISP24XX_INORDER 0x0100 129 #define ISP24XX_NPIV_SAN 0x0400 130 #define ISP24XX_VSAN_SAN 0x1000 131 #define ISP24XX_FC_SP_SAN 0x2000 132 133 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 134 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 135 #define MBOX_GET_RESOURCE_COUNT 0x0042 136 #define MBOX_REQUEST_OFFLINE_MODE 0x0043 137 #define MBOX_ENHANCED_GET_PDB 0x0047 138 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 139 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 140 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 141 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 142 #define MBOX_INIT_FIRMWARE 0x0060 143 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 144 #define MBOX_INIT_LIP 0x0062 145 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 146 #define MBOX_GET_PORT_DB 0x0064 147 #define MBOX_CLEAR_ACA 0x0065 148 #define MBOX_TARGET_RESET 0x0066 149 #define MBOX_CLEAR_TASK_SET 0x0067 150 #define MBOX_ABORT_TASK_SET 0x0068 151 #define MBOX_GET_FW_STATE 0x0069 152 #define MBOX_GET_PORT_NAME 0x006A 153 #define MBOX_GET_LINK_STATUS 0x006B 154 #define MBOX_INIT_LIP_RESET 0x006C 155 #define MBOX_SEND_SNS 0x006E 156 #define MBOX_FABRIC_LOGIN 0x006F 157 #define MBOX_SEND_CHANGE_REQUEST 0x0070 158 #define MBOX_FABRIC_LOGOUT 0x0071 159 #define MBOX_INIT_LIP_LOGIN 0x0072 160 #define MBOX_LUN_RESET 0x007E 161 162 #define MBOX_DRIVER_HEARTBEAT 0x005B 163 #define MBOX_FW_HEARTBEAT 0x005C 164 165 #define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 166 #define MBGSD_GET_RATE 0 167 #define MBGSD_SET_RATE 1 168 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 169 #define MBGSD_ONEGB 0 170 #define MBGSD_TWOGB 1 171 #define MBGSD_AUTO 2 172 #define MBGSD_FOURGB 3 /* 24XX only */ 173 174 175 #define ISP2100_SET_PCI_PARAM 0x00ff 176 177 #define MBOX_BUSY 0x04 178 179 /* 180 * Mailbox Command Complete Status Codes 181 */ 182 #define MBOX_COMMAND_COMPLETE 0x4000 183 #define MBOX_INVALID_COMMAND 0x4001 184 #define MBOX_HOST_INTERFACE_ERROR 0x4002 185 #define MBOX_TEST_FAILED 0x4003 186 #define MBOX_COMMAND_ERROR 0x4005 187 #define MBOX_COMMAND_PARAM_ERROR 0x4006 188 #define MBOX_PORT_ID_USED 0x4007 189 #define MBOX_LOOP_ID_USED 0x4008 190 #define MBOX_ALL_IDS_USED 0x4009 191 #define MBOX_NOT_LOGGED_IN 0x400A 192 /* pseudo mailbox completion codes */ 193 #define MBOX_REGS_BUSY 0x6000 /* registers in use */ 194 #define MBOX_TIMEOUT 0x6001 /* command timed out */ 195 196 #define MBLOGALL 0x000f 197 #define MBLOGNONE 0x0000 198 #define MBLOGMASK(x) ((x) & 0xf) 199 200 /* 201 * Asynchronous event status codes 202 */ 203 #define ASYNC_BUS_RESET 0x8001 204 #define ASYNC_SYSTEM_ERROR 0x8002 205 #define ASYNC_RQS_XFER_ERR 0x8003 206 #define ASYNC_RSP_XFER_ERR 0x8004 207 #define ASYNC_QWAKEUP 0x8005 208 #define ASYNC_TIMEOUT_RESET 0x8006 209 #define ASYNC_DEVICE_RESET 0x8007 210 #define ASYNC_EXTMSG_UNDERRUN 0x800A 211 #define ASYNC_SCAM_INT 0x800B 212 #define ASYNC_HUNG_SCSI 0x800C 213 #define ASYNC_KILLED_BUS 0x800D 214 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 215 #define ASYNC_LIP_OCCURRED 0x8010 216 #define ASYNC_LOOP_UP 0x8011 217 #define ASYNC_LOOP_DOWN 0x8012 218 #define ASYNC_LOOP_RESET 0x8013 219 #define ASYNC_PDB_CHANGED 0x8014 220 #define ASYNC_CHANGE_NOTIFY 0x8015 221 #define ASYNC_LIP_F8 0x8016 222 #define ASYNC_LIP_ERROR 0x8017 223 #define ASYNC_SECURITY_UPDATE 0x801B 224 #define ASYNC_CMD_CMPLT 0x8020 225 #define ASYNC_CTIO_DONE 0x8021 226 #define ASYNC_IP_XMIT_DONE 0x8022 227 #define ASYNC_IP_RECV_DONE 0x8023 228 #define ASYNC_IP_BROADCAST 0x8024 229 #define ASYNC_IP_RCVQ_LOW 0x8025 230 #define ASYNC_IP_RCVQ_EMPTY 0x8026 231 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 232 #define ASYNC_PTPMODE 0x8030 233 #define ASYNC_RIO1 0x8031 234 #define ASYNC_RIO2 0x8032 235 #define ASYNC_RIO3 0x8033 236 #define ASYNC_RIO4 0x8034 237 #define ASYNC_RIO5 0x8035 238 #define ASYNC_CONNMODE 0x8036 239 #define ISP_CONN_LOOP 1 240 #define ISP_CONN_PTP 2 241 #define ISP_CONN_BADLIP 3 242 #define ISP_CONN_FATAL 4 243 #define ISP_CONN_LOOPBACK 5 244 #define ASYNC_RIO_RESP 0x8040 245 #define ASYNC_RIO_COMP 0x8042 246 #define ASYNC_RCV_ERR 0x8048 247 248 /* 249 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 250 * mailbox command to enable this. 251 */ 252 #define ASYNC_QFULL_SENT 0x8049 253 254 /* 255 * 24XX only 256 */ 257 #define ASYNC_RJT_SENT 0x8049 258 259 /* 260 * All IOCB Queue entries are this size 261 */ 262 #define QENTRY_LEN 64 263 264 /* 265 * Special Internal Handle for IOCBs 266 */ 267 #define ISP_SPCL_HANDLE 0xa5dead5a 268 269 /* 270 * Command Structure Definitions 271 */ 272 273 typedef struct { 274 uint32_t ds_base; 275 uint32_t ds_count; 276 } ispds_t; 277 278 typedef struct { 279 uint32_t ds_base; 280 uint32_t ds_basehi; 281 uint32_t ds_count; 282 } ispds64_t; 283 284 #define DSTYPE_32BIT 0 285 #define DSTYPE_64BIT 1 286 typedef struct { 287 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 288 uint32_t ds_segment; /* unused */ 289 uint32_t ds_base; /* 32 bit address of DSD list */ 290 } ispdslist_t; 291 292 293 typedef struct { 294 uint8_t rqs_entry_type; 295 uint8_t rqs_entry_count; 296 uint8_t rqs_seqno; 297 uint8_t rqs_flags; 298 } isphdr_t; 299 300 /* RQS Flag definitions */ 301 #define RQSFLAG_CONTINUATION 0x01 302 #define RQSFLAG_FULL 0x02 303 #define RQSFLAG_BADHEADER 0x04 304 #define RQSFLAG_BADPACKET 0x08 305 #define RQSFLAG_MASK 0x0f 306 307 /* RQS entry_type definitions */ 308 #define RQSTYPE_REQUEST 0x01 309 #define RQSTYPE_DATASEG 0x02 310 #define RQSTYPE_RESPONSE 0x03 311 #define RQSTYPE_MARKER 0x04 312 #define RQSTYPE_CMDONLY 0x05 313 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 314 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 315 #define RQSTYPE_SCAM 0x08 316 #define RQSTYPE_A64 0x09 317 #define RQSTYPE_A64_CONT 0x0a 318 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 319 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 320 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 321 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 322 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 323 #define RQSTYPE_STATUS_CONT 0x10 324 #define RQSTYPE_T2RQS 0x11 325 #define RQSTYPE_CTIO7 0x12 326 #define RQSTYPE_IP_XMIT 0x13 327 #define RQSTYPE_TSK_MGMT 0x14 328 #define RQSTYPE_T4RQS 0x15 329 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 330 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 331 #define RQSTYPE_T7RQS 0x18 332 #define RQSTYPE_T3RQS 0x19 333 #define RQSTYPE_IP_XMIT_64 0x1b 334 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 335 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 336 #define RQSTYPE_RIO1 0x21 337 #define RQSTYPE_RIO2 0x22 338 #define RQSTYPE_IP_RECV 0x23 339 #define RQSTYPE_IP_RECV_CONT 0x24 340 #define RQSTYPE_CT_PASSTHRU 0x29 341 #define RQSTYPE_MS_PASSTHRU 0x29 342 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 343 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 344 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 345 #define RQSTYPE_ABORT_IO 0x33 346 #define RQSTYPE_T6RQS 0x48 347 #define RQSTYPE_LOGIN 0x52 348 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 349 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 350 351 352 #define ISP_RQDSEG 4 353 typedef struct { 354 isphdr_t req_header; 355 uint32_t req_handle; 356 uint8_t req_lun_trn; 357 uint8_t req_target; 358 uint16_t req_cdblen; 359 uint16_t req_flags; 360 uint16_t req_reserved; 361 uint16_t req_time; 362 uint16_t req_seg_count; 363 uint8_t req_cdb[12]; 364 ispds_t req_dataseg[ISP_RQDSEG]; 365 } ispreq_t; 366 #define ISP_RQDSEG_A64 2 367 368 typedef struct { 369 isphdr_t mrk_header; 370 uint32_t mrk_handle; 371 uint8_t mrk_reserved0; 372 uint8_t mrk_target; 373 uint16_t mrk_modifier; 374 uint16_t mrk_flags; 375 uint16_t mrk_lun; 376 uint8_t mrk_reserved1[48]; 377 } isp_marker_t; 378 379 typedef struct { 380 isphdr_t mrk_header; 381 uint32_t mrk_handle; 382 uint16_t mrk_nphdl; 383 uint8_t mrk_modifier; 384 uint8_t mrk_reserved0; 385 uint8_t mrk_reserved1; 386 uint8_t mrk_vphdl; 387 uint16_t mrk_reserved2; 388 uint8_t mrk_lun[8]; 389 uint8_t mrk_reserved3[40]; 390 } isp_marker_24xx_t; 391 392 393 #define SYNC_DEVICE 0 394 #define SYNC_TARGET 1 395 #define SYNC_ALL 2 396 #define SYNC_LIP 3 397 398 #define ISP_RQDSEG_T2 3 399 typedef struct { 400 isphdr_t req_header; 401 uint32_t req_handle; 402 uint8_t req_lun_trn; 403 uint8_t req_target; 404 uint16_t req_scclun; 405 uint16_t req_flags; 406 uint16_t req_reserved; 407 uint16_t req_time; 408 uint16_t req_seg_count; 409 uint8_t req_cdb[16]; 410 uint32_t req_totalcnt; 411 ispds_t req_dataseg[ISP_RQDSEG_T2]; 412 } ispreqt2_t; 413 414 typedef struct { 415 isphdr_t req_header; 416 uint32_t req_handle; 417 uint16_t req_target; 418 uint16_t req_scclun; 419 uint16_t req_flags; 420 uint16_t req_reserved; 421 uint16_t req_time; 422 uint16_t req_seg_count; 423 uint8_t req_cdb[16]; 424 uint32_t req_totalcnt; 425 ispds_t req_dataseg[ISP_RQDSEG_T2]; 426 } ispreqt2e_t; 427 428 #define ISP_RQDSEG_T3 2 429 typedef struct { 430 isphdr_t req_header; 431 uint32_t req_handle; 432 uint8_t req_lun_trn; 433 uint8_t req_target; 434 uint16_t req_scclun; 435 uint16_t req_flags; 436 uint16_t req_reserved; 437 uint16_t req_time; 438 uint16_t req_seg_count; 439 uint8_t req_cdb[16]; 440 uint32_t req_totalcnt; 441 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 442 } ispreqt3_t; 443 #define ispreq64_t ispreqt3_t /* same as.... */ 444 445 typedef struct { 446 isphdr_t req_header; 447 uint32_t req_handle; 448 uint16_t req_target; 449 uint16_t req_scclun; 450 uint16_t req_flags; 451 uint16_t req_reserved; 452 uint16_t req_time; 453 uint16_t req_seg_count; 454 uint8_t req_cdb[16]; 455 uint32_t req_totalcnt; 456 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 457 } ispreqt3e_t; 458 459 /* req_flag values */ 460 #define REQFLAG_NODISCON 0x0001 461 #define REQFLAG_HTAG 0x0002 462 #define REQFLAG_OTAG 0x0004 463 #define REQFLAG_STAG 0x0008 464 #define REQFLAG_TARGET_RTN 0x0010 465 466 #define REQFLAG_NODATA 0x0000 467 #define REQFLAG_DATA_IN 0x0020 468 #define REQFLAG_DATA_OUT 0x0040 469 #define REQFLAG_DATA_UNKNOWN 0x0060 470 471 #define REQFLAG_DISARQ 0x0100 472 #define REQFLAG_FRC_ASYNC 0x0200 473 #define REQFLAG_FRC_SYNC 0x0400 474 #define REQFLAG_FRC_WIDE 0x0800 475 #define REQFLAG_NOPARITY 0x1000 476 #define REQFLAG_STOPQ 0x2000 477 #define REQFLAG_XTRASNS 0x4000 478 #define REQFLAG_PRIORITY 0x8000 479 480 typedef struct { 481 isphdr_t req_header; 482 uint32_t req_handle; 483 uint8_t req_lun_trn; 484 uint8_t req_target; 485 uint16_t req_cdblen; 486 uint16_t req_flags; 487 uint16_t req_reserved; 488 uint16_t req_time; 489 uint16_t req_seg_count; 490 uint8_t req_cdb[44]; 491 } ispextreq_t; 492 493 /* 24XX only */ 494 typedef struct { 495 uint16_t fcd_length; 496 uint16_t fcd_a1500; 497 uint16_t fcd_a3116; 498 uint16_t fcd_a4732; 499 uint16_t fcd_a6348; 500 } fcp_cmnd_ds_t; 501 502 typedef struct { 503 isphdr_t req_header; 504 uint32_t req_handle; 505 uint16_t req_nphdl; 506 uint16_t req_time; 507 uint16_t req_seg_count; 508 uint16_t req_fc_rsp_dsd_length; 509 uint8_t req_lun[8]; 510 uint16_t req_flags; 511 uint16_t req_fc_cmnd_dsd_length; 512 uint16_t req_fc_cmnd_dsd_a1500; 513 uint16_t req_fc_cmnd_dsd_a3116; 514 uint16_t req_fc_cmnd_dsd_a4732; 515 uint16_t req_fc_cmnd_dsd_a6348; 516 uint16_t req_fc_rsp_dsd_a1500; 517 uint16_t req_fc_rsp_dsd_a3116; 518 uint16_t req_fc_rsp_dsd_a4732; 519 uint16_t req_fc_rsp_dsd_a6348; 520 uint32_t req_totalcnt; 521 uint16_t req_tidlo; 522 uint8_t req_tidhi; 523 uint8_t req_vpidx; 524 ispds64_t req_dataseg; 525 } ispreqt6_t; 526 527 typedef struct { 528 isphdr_t req_header; 529 uint32_t req_handle; 530 uint16_t req_nphdl; 531 uint16_t req_time; 532 uint16_t req_seg_count; 533 uint16_t req_reserved; 534 uint8_t req_lun[8]; 535 uint8_t req_alen_datadir; 536 uint8_t req_task_management; 537 uint8_t req_task_attribute; 538 uint8_t req_crn; 539 uint8_t req_cdb[16]; 540 uint32_t req_dl; 541 uint16_t req_tidlo; 542 uint8_t req_tidhi; 543 uint8_t req_vpidx; 544 ispds64_t req_dataseg; 545 } ispreqt7_t; 546 547 /* Task Management Request Function */ 548 typedef struct { 549 isphdr_t tmf_header; 550 uint32_t tmf_handle; 551 uint16_t tmf_nphdl; 552 uint8_t tmf_reserved0[2]; 553 uint16_t tmf_delay; 554 uint16_t tmf_timeout; 555 uint8_t tmf_lun[8]; 556 uint32_t tmf_flags; 557 uint8_t tmf_reserved1[20]; 558 uint16_t tmf_tidlo; 559 uint8_t tmf_tidhi; 560 uint8_t tmf_vpidx; 561 uint8_t tmf_reserved2[12]; 562 } isp24xx_tmf_t; 563 564 #define ISP24XX_TMF_NOSEND 0x80000000 565 566 #define ISP24XX_TMF_LUN_RESET 0x00000010 567 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 568 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 569 #define ISP24XX_TMF_TARGET_RESET 0x00000002 570 #define ISP24XX_TMF_CLEAR_ACA 0x00000001 571 572 /* I/O Abort Structure */ 573 typedef struct { 574 isphdr_t abrt_header; 575 uint32_t abrt_handle; 576 uint16_t abrt_nphdl; 577 uint16_t abrt_options; 578 uint32_t abrt_cmd_handle; 579 uint8_t abrt_reserved[32]; 580 uint16_t abrt_tidlo; 581 uint8_t abrt_tidhi; 582 uint8_t abrt_vpidx; 583 uint8_t abrt_reserved1[12]; 584 } isp24xx_abrt_t; 585 586 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 587 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 588 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 589 590 #define ISP_CDSEG 7 591 typedef struct { 592 isphdr_t req_header; 593 uint32_t req_reserved; 594 ispds_t req_dataseg[ISP_CDSEG]; 595 } ispcontreq_t; 596 597 #define ISP_CDSEG64 5 598 typedef struct { 599 isphdr_t req_header; 600 ispds64_t req_dataseg[ISP_CDSEG64]; 601 } ispcontreq64_t; 602 603 typedef struct { 604 isphdr_t req_header; 605 uint32_t req_handle; 606 uint16_t req_scsi_status; 607 uint16_t req_completion_status; 608 uint16_t req_state_flags; 609 uint16_t req_status_flags; 610 uint16_t req_time; 611 #define req_response_len req_time /* FC only */ 612 uint16_t req_sense_len; 613 uint32_t req_resid; 614 uint8_t req_response[8]; /* FC only */ 615 uint8_t req_sense_data[32]; 616 } ispstatusreq_t; 617 618 /* 619 * Status Continuation 620 */ 621 typedef struct { 622 isphdr_t req_header; 623 uint8_t req_sense_data[60]; 624 } ispstatus_cont_t; 625 626 /* 627 * 24XX Type 0 status 628 */ 629 typedef struct { 630 isphdr_t req_header; 631 uint32_t req_handle; 632 uint16_t req_completion_status; 633 uint16_t req_oxid; 634 uint32_t req_resid; 635 uint16_t req_reserved0; 636 uint16_t req_state_flags; 637 uint16_t req_reserved1; 638 uint16_t req_scsi_status; 639 uint32_t req_fcp_residual; 640 uint32_t req_sense_len; 641 uint32_t req_response_len; 642 uint8_t req_rsp_sense[28]; 643 } isp24xx_statusreq_t; 644 645 /* 646 * For Qlogic 2X00, the high order byte of SCSI status has 647 * additional meaning. 648 */ 649 #define RQCS_RU 0x800 /* Residual Under */ 650 #define RQCS_RO 0x400 /* Residual Over */ 651 #define RQCS_RESID (RQCS_RU|RQCS_RO) 652 #define RQCS_SV 0x200 /* Sense Length Valid */ 653 #define RQCS_RV 0x100 /* FCP Response Length Valid */ 654 655 /* 656 * CT Passthru IOCB 657 */ 658 typedef struct { 659 isphdr_t ctp_header; 660 uint32_t ctp_handle; 661 uint16_t ctp_status; 662 uint16_t ctp_nphdl; /* n-port handle */ 663 uint16_t ctp_cmd_cnt; /* Command DSD count */ 664 uint8_t ctp_vpidx; 665 uint8_t ctp_reserved0; 666 uint16_t ctp_time; 667 uint16_t ctp_reserved1; 668 uint16_t ctp_rsp_cnt; /* Response DSD count */ 669 uint16_t ctp_reserved2[5]; 670 uint32_t ctp_rsp_bcnt; /* Response byte count */ 671 uint32_t ctp_cmd_bcnt; /* Command byte count */ 672 ispds64_t ctp_dataseg[2]; 673 } isp_ct_pt_t; 674 675 /* 676 * MS Passthru IOCB 677 */ 678 typedef struct { 679 isphdr_t ms_header; 680 uint32_t ms_handle; 681 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 682 uint16_t ms_status; 683 uint16_t ms_flags; 684 uint16_t ms_reserved1; /* low 8 bits */ 685 uint16_t ms_time; 686 uint16_t ms_cmd_cnt; /* Command DSD count */ 687 uint16_t ms_tot_cnt; /* Total DSD Count */ 688 uint8_t ms_type; /* MS type */ 689 uint8_t ms_r_ctl; /* R_CTL */ 690 uint16_t ms_rxid; /* RX_ID */ 691 uint16_t ms_reserved2; 692 uint32_t ms_handle2; 693 uint32_t ms_rsp_bcnt; /* Response byte count */ 694 uint32_t ms_cmd_bcnt; /* Command byte count */ 695 ispds64_t ms_dataseg[2]; 696 } isp_ms_t; 697 698 /* 699 * Completion Status Codes. 700 */ 701 #define RQCS_COMPLETE 0x0000 702 #define RQCS_DMA_ERROR 0x0002 703 #define RQCS_RESET_OCCURRED 0x0004 704 #define RQCS_ABORTED 0x0005 705 #define RQCS_TIMEOUT 0x0006 706 #define RQCS_DATA_OVERRUN 0x0007 707 #define RQCS_DATA_UNDERRUN 0x0015 708 #define RQCS_QUEUE_FULL 0x001C 709 710 /* 1X00 Only Completion Codes */ 711 #define RQCS_INCOMPLETE 0x0001 712 #define RQCS_TRANSPORT_ERROR 0x0003 713 #define RQCS_COMMAND_OVERRUN 0x0008 714 #define RQCS_STATUS_OVERRUN 0x0009 715 #define RQCS_BAD_MESSAGE 0x000a 716 #define RQCS_NO_MESSAGE_OUT 0x000b 717 #define RQCS_EXT_ID_FAILED 0x000c 718 #define RQCS_IDE_MSG_FAILED 0x000d 719 #define RQCS_ABORT_MSG_FAILED 0x000e 720 #define RQCS_REJECT_MSG_FAILED 0x000f 721 #define RQCS_NOP_MSG_FAILED 0x0010 722 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 723 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 724 #define RQCS_ID_MSG_FAILED 0x0013 725 #define RQCS_UNEXP_BUS_FREE 0x0014 726 #define RQCS_XACT_ERR1 0x0018 727 #define RQCS_XACT_ERR2 0x0019 728 #define RQCS_XACT_ERR3 0x001A 729 #define RQCS_BAD_ENTRY 0x001B 730 #define RQCS_PHASE_SKIPPED 0x001D 731 #define RQCS_ARQS_FAILED 0x001E 732 #define RQCS_WIDE_FAILED 0x001F 733 #define RQCS_SYNCXFER_FAILED 0x0020 734 #define RQCS_LVD_BUSERR 0x0021 735 736 /* 2X00 Only Completion Codes */ 737 #define RQCS_PORT_UNAVAILABLE 0x0028 738 #define RQCS_PORT_LOGGED_OUT 0x0029 739 #define RQCS_PORT_CHANGED 0x002A 740 #define RQCS_PORT_BUSY 0x002B 741 742 /* 24XX Only Completion Codes */ 743 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 744 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 745 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 746 #define RQCS_24XX_TMO 0x0030 /* task management overrun */ 747 748 749 /* 750 * 1X00 specific State Flags 751 */ 752 #define RQSF_GOT_BUS 0x0100 753 #define RQSF_GOT_TARGET 0x0200 754 #define RQSF_SENT_CDB 0x0400 755 #define RQSF_XFRD_DATA 0x0800 756 #define RQSF_GOT_STATUS 0x1000 757 #define RQSF_GOT_SENSE 0x2000 758 #define RQSF_XFER_COMPLETE 0x4000 759 760 /* 761 * 2X00 specific State Flags 762 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 763 */ 764 #define RQSF_DATA_IN 0x0020 765 #define RQSF_DATA_OUT 0x0040 766 #define RQSF_STAG 0x0008 767 #define RQSF_OTAG 0x0004 768 #define RQSF_HTAG 0x0002 769 /* 770 * 1X00 Status Flags 771 */ 772 #define RQSTF_DISCONNECT 0x0001 773 #define RQSTF_SYNCHRONOUS 0x0002 774 #define RQSTF_PARITY_ERROR 0x0004 775 #define RQSTF_BUS_RESET 0x0008 776 #define RQSTF_DEVICE_RESET 0x0010 777 #define RQSTF_ABORTED 0x0020 778 #define RQSTF_TIMEOUT 0x0040 779 #define RQSTF_NEGOTIATION 0x0080 780 781 /* 782 * 2X00 specific state flags 783 */ 784 /* RQSF_SENT_CDB */ 785 /* RQSF_XFRD_DATA */ 786 /* RQSF_GOT_STATUS */ 787 /* RQSF_XFER_COMPLETE */ 788 789 /* 790 * 2X00 specific status flags 791 */ 792 /* RQSTF_ABORTED */ 793 /* RQSTF_TIMEOUT */ 794 #define RQSTF_DMA_ERROR 0x0080 795 #define RQSTF_LOGOUT 0x2000 796 797 /* 798 * Miscellaneous 799 */ 800 #ifndef ISP_EXEC_THROTTLE 801 #define ISP_EXEC_THROTTLE 16 802 #endif 803 804 /* 805 * About Firmware returns an 'attribute' word in mailbox 6. 806 * These attributes are for 2200 and 2300. 807 */ 808 #define ISP_FW_ATTR_TMODE 0x0001 809 #define ISP_FW_ATTR_SCCLUN 0x0002 810 #define ISP_FW_ATTR_FABRIC 0x0004 811 #define ISP_FW_ATTR_CLASS2 0x0008 812 #define ISP_FW_ATTR_FCTAPE 0x0010 813 #define ISP_FW_ATTR_IP 0x0020 814 #define ISP_FW_ATTR_VI 0x0040 815 #define ISP_FW_ATTR_VI_SOLARIS 0x0080 816 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 817 818 /* and these are for the 2400 */ 819 #define ISP2400_FW_ATTR_CLASS2 0x0001 820 #define ISP2400_FW_ATTR_IP 0x0002 821 #define ISP2400_FW_ATTR_MULTIID 0x0004 822 #define ISP2400_FW_ATTR_SB2 0x0008 823 #define ISP2400_FW_ATTR_T10CRC 0x0010 824 #define ISP2400_FW_ATTR_VI 0x0020 825 #define ISP2400_FW_ATTR_EXPFW 0x2000 826 827 #define ISP_CAP_TMODE(isp) \ 828 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 829 #define ISP_CAP_SCCFW(isp) \ 830 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 831 #define ISP_CAP_2KLOGIN(isp) \ 832 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 833 #define ISP_CAP_MULTI_ID(isp) \ 834 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 835 836 /* 837 * Reduced Interrupt Operation Response Queue Entreis 838 */ 839 840 typedef struct { 841 isphdr_t req_header; 842 uint32_t req_handles[15]; 843 } isp_rio1_t; 844 845 typedef struct { 846 isphdr_t req_header; 847 uint16_t req_handles[30]; 848 } isp_rio2_t; 849 850 /* 851 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 852 */ 853 854 /* 855 * Initialization Control Block 856 * 857 * Version One (prime) format. 858 */ 859 typedef struct { 860 uint8_t icb_version; 861 uint8_t icb_reserved0; 862 uint16_t icb_fwoptions; 863 uint16_t icb_maxfrmlen; 864 uint16_t icb_maxalloc; 865 uint16_t icb_execthrottle; 866 uint8_t icb_retry_count; 867 uint8_t icb_retry_delay; 868 uint8_t icb_portname[8]; 869 uint16_t icb_hardaddr; 870 uint8_t icb_iqdevtype; 871 uint8_t icb_logintime; 872 uint8_t icb_nodename[8]; 873 uint16_t icb_rqstout; 874 uint16_t icb_rspnsin; 875 uint16_t icb_rqstqlen; 876 uint16_t icb_rsltqlen; 877 uint16_t icb_rqstaddr[4]; 878 uint16_t icb_respaddr[4]; 879 uint16_t icb_lunenables; 880 uint8_t icb_ccnt; 881 uint8_t icb_icnt; 882 uint16_t icb_lunetimeout; 883 uint16_t icb_reserved1; 884 uint16_t icb_xfwoptions; 885 uint8_t icb_racctimer; 886 uint8_t icb_idelaytimer; 887 uint16_t icb_zfwoptions; 888 uint16_t icb_reserved2[13]; 889 } isp_icb_t; 890 891 #define ICB_VERSION1 1 892 893 #define ICBOPT_EXTENDED 0x8000 894 #define ICBOPT_BOTH_WWNS 0x4000 895 #define ICBOPT_FULL_LOGIN 0x2000 896 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 897 #define ICBOPT_PREVLOOP 0x0800 898 #define ICBOPT_SRCHDOWN 0x0400 899 #define ICBOPT_NOLIP 0x0200 900 #define ICBOPT_PDBCHANGE_AE 0x0100 901 #define ICBOPT_INI_TGTTYPE 0x0080 902 #define ICBOPT_INI_ADISC 0x0040 903 #define ICBOPT_INI_DISABLE 0x0020 904 #define ICBOPT_TGT_ENABLE 0x0010 905 #define ICBOPT_FAST_POST 0x0008 906 #define ICBOPT_FULL_DUPLEX 0x0004 907 #define ICBOPT_FAIRNESS 0x0002 908 #define ICBOPT_HARD_ADDRESS 0x0001 909 910 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 911 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 912 #define ICBXOPT_FCTAPE_CONFIRM 0x2000 913 #define ICBXOPT_FCTAPE 0x1000 914 #define ICBXOPT_CLASS2_ACK0 0x0200 915 #define ICBXOPT_CLASS2 0x0100 916 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 917 #define ICBXOPT_TOPO_MASK 0x0070 918 #define ICBXOPT_LOOP_ONLY 0x0000 919 #define ICBXOPT_PTP_ONLY 0x0010 920 #define ICBXOPT_LOOP_2_PTP 0x0020 921 #define ICBXOPT_PTP_2_LOOP 0x0030 922 /* 923 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 924 * RIO is not defined for the 23XX cards (just 2200) 925 */ 926 #define ICBXOPT_RIO_OFF 0 927 #define ICBXOPT_RIO_16BIT 1 928 #define ICBXOPT_RIO_32BIT 2 929 #define ICBXOPT_RIO_16BIT_IOCB 3 930 #define ICBXOPT_RIO_32BIT_IOCB 4 931 #define ICBXOPT_ZIO 5 932 #define ICBXOPT_TIMER_MASK 0x7 933 934 #define ICBZOPT_RATE_MASK 0xC000 935 #define ICBZOPT_RATE_ONEGB 0x0000 936 #define ICBZOPT_RATE_AUTO 0x8000 937 #define ICBZOPT_RATE_TWOGB 0x4000 938 #define ICBZOPT_50_OHM 0x2000 939 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 940 #define ICBZOPT_RSPSZ_MASK 0x0030 941 #define ICBZOPT_RSPSZ_24 0x0000 942 #define ICBZOPT_RSPSZ_12 0x0010 943 #define ICBZOPT_RSPSZ_24A 0x0020 944 #define ICBZOPT_RSPSZ_32 0x0030 945 #define ICBZOPT_SOFTID 0x0002 946 #define ICBZOPT_ENA_RDXFR_RDY 0x0001 947 948 /* 2400 F/W options */ 949 #define ICB2400_OPT1_BOTH_WWNS 0x00004000 950 #define ICB2400_OPT1_FULL_LOGIN 0x00002000 951 #define ICB2400_OPT1_PREVLOOP 0x00000800 952 #define ICB2400_OPT1_SRCHDOWN 0x00000400 953 #define ICB2400_OPT1_NOLIP 0x00000200 954 #define ICB2400_OPT1_INI_DISABLE 0x00000020 955 #define ICB2400_OPT1_TGT_ENABLE 0x00000010 956 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004 957 #define ICB2400_OPT1_FAIRNESS 0x00000002 958 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001 959 960 #define ICB2400_OPT2_FCTAPE 0x00001000 961 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200 962 #define ICB2400_OPT2_CLASS2 0x00000100 963 #define ICB2400_OPT2_NO_PLAY 0x00000080 964 #define ICB2400_OPT2_TOPO_MASK 0x00000070 965 #define ICB2400_OPT2_LOOP_ONLY 0x00000000 966 #define ICB2400_OPT2_PTP_ONLY 0x00000010 967 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020 968 #define ICB2400_OPT2_PTP_2_LOOP 0x00000030 969 #define ICB2400_OPT2_TIMER_MASK 0x00000007 970 #define ICB2400_OPT2_ZIO 0x00000005 971 #define ICB2400_OPT2_ZIO1 0x00000006 972 973 #define ICB2400_OPT3_75_OHM 0x00010000 974 #define ICB2400_OPT3_RATE_MASK 0x0000E000 975 #define ICB2400_OPT3_RATE_ONEGB 0x00000000 976 #define ICB2400_OPT3_RATE_TWOGB 0x00002000 977 #define ICB2400_OPT3_RATE_AUTO 0x00004000 978 #define ICB2400_OPT3_RATE_FOURGB 0x00006000 979 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 980 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 981 #define ICB2400_OPT3_ENA_OOF 0x00000040 982 /* note that a response size flag of zero is reserved! */ 983 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030 984 #define ICB2400_OPT3_RSPSZ_12 0x00000010 985 #define ICB2400_OPT3_RSPSZ_24 0x00000020 986 #define ICB2400_OPT3_RSPSZ_32 0x00000030 987 #define ICB2400_OPT3_SOFTID 0x00000002 988 989 #define ICB_MIN_FRMLEN 256 990 #define ICB_MAX_FRMLEN 2112 991 #define ICB_DFLT_FRMLEN 1024 992 #define ICB_DFLT_ALLOC 256 993 #define ICB_DFLT_THROTTLE 16 994 #define ICB_DFLT_RDELAY 5 995 #define ICB_DFLT_RCOUNT 3 996 997 #define ICB_LOGIN_TOV 30 998 #define ICB_LUN_ENABLE_TOV 180 999 1000 1001 /* 1002 * And somebody at QLogic had a great idea that you could just change 1003 * the structure *and* keep the version number the same as the other cards. 1004 */ 1005 typedef struct { 1006 uint16_t icb_version; 1007 uint16_t icb_reserved0; 1008 uint16_t icb_maxfrmlen; 1009 uint16_t icb_execthrottle; 1010 uint16_t icb_xchgcnt; 1011 uint16_t icb_hardaddr; 1012 uint8_t icb_portname[8]; 1013 uint8_t icb_nodename[8]; 1014 uint16_t icb_rspnsin; 1015 uint16_t icb_rqstout; 1016 uint16_t icb_retry_count; 1017 uint16_t icb_priout; 1018 uint16_t icb_rsltqlen; 1019 uint16_t icb_rqstqlen; 1020 uint16_t icb_ldn_nols; 1021 uint16_t icb_prqstqlen; 1022 uint16_t icb_rqstaddr[4]; 1023 uint16_t icb_respaddr[4]; 1024 uint16_t icb_priaddr[4]; 1025 uint16_t icb_reserved1[4]; 1026 uint16_t icb_atio_in; 1027 uint16_t icb_atioqlen; 1028 uint16_t icb_atioqaddr[4]; 1029 uint16_t icb_idelaytimer; 1030 uint16_t icb_logintime; 1031 uint32_t icb_fwoptions1; 1032 uint32_t icb_fwoptions2; 1033 uint32_t icb_fwoptions3; 1034 uint16_t icb_reserved2[12]; 1035 } isp_icb_2400_t; 1036 1037 #define RQRSP_ADDR0015 0 1038 #define RQRSP_ADDR1631 1 1039 #define RQRSP_ADDR3247 2 1040 #define RQRSP_ADDR4863 3 1041 1042 1043 #define ICB_NNM0 7 1044 #define ICB_NNM1 6 1045 #define ICB_NNM2 5 1046 #define ICB_NNM3 4 1047 #define ICB_NNM4 3 1048 #define ICB_NNM5 2 1049 #define ICB_NNM6 1 1050 #define ICB_NNM7 0 1051 1052 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1053 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1054 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1055 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1056 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1057 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1058 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1059 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1060 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1061 1062 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1063 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1064 ((uint64_t) array[ICB_NNM1] << 8) | \ 1065 ((uint64_t) array[ICB_NNM2] << 16) | \ 1066 ((uint64_t) array[ICB_NNM3] << 24) | \ 1067 ((uint64_t) array[ICB_NNM4] << 32) | \ 1068 ((uint64_t) array[ICB_NNM5] << 40) | \ 1069 ((uint64_t) array[ICB_NNM6] << 48) | \ 1070 ((uint64_t) array[ICB_NNM7] << 56) 1071 1072 1073 /* 1074 * For MULTI_ID firmware, this describes a 1075 * virtual port entity for getting status. 1076 */ 1077 typedef struct { 1078 uint16_t vp_port_status; 1079 uint8_t vp_port_options; 1080 uint8_t vp_port_loopid; 1081 uint8_t vp_port_portname[8]; 1082 uint8_t vp_port_nodename[8]; 1083 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1084 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1085 } vp_port_info_t; 1086 1087 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* disable target mode */ 1088 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* enable initiator mode */ 1089 #define ICB2400_VPOPT_ENABLED 0x00000008 1090 #define ICB2400_VPOPT_NOPLAY 0x00000004 1091 #define ICB2400_VPOPT_PREVLOOP 0x00000002 1092 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 1093 1094 #define ICB2400_VPOPT_WRITE_SIZE 20 1095 1096 /* 1097 * For MULTI_ID firmware, we append this structure 1098 * to the isp_icb_2400_t above, followed by a list 1099 * structures that are *most* of the vp_port_info_t. 1100 */ 1101 typedef struct { 1102 uint16_t vp_count; 1103 uint16_t vp_global_options; 1104 } isp_icb_2400_vpinfo_t; 1105 1106 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1107 #define ICB2400_VPINFO_PORT_OFF(chan) \ 1108 ICB2400_VPINFO_OFF + \ 1109 sizeof (isp_icb_2400_vpinfo_t) + ((chan - 1) * ICB2400_VPOPT_WRITE_SIZE) 1110 1111 #define ICB2400_VPGOPT_MID_DISABLE 0x02 1112 1113 typedef struct { 1114 isphdr_t vp_ctrl_hdr; 1115 uint32_t vp_ctrl_handle; 1116 uint16_t vp_ctrl_index_fail; 1117 uint16_t vp_ctrl_status; 1118 uint16_t vp_ctrl_command; 1119 uint16_t vp_ctrl_vp_count; 1120 uint16_t vp_ctrl_idmap[8]; 1121 uint8_t vp_ctrl_reserved[32]; 1122 } vp_ctrl_info_t; 1123 1124 #define VP_CTRL_CMD_ENABLE_VP 0 1125 #define VP_CTRL_CMD_DISABLE_VP 8 1126 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 9 1127 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0xA 1128 1129 /* 1130 * We can use this structure for modifying either one or two VP ports after initialization 1131 */ 1132 typedef struct { 1133 isphdr_t vp_mod_hdr; 1134 uint32_t vp_mod_hdl; 1135 uint16_t vp_mod_reserved0; 1136 uint16_t vp_mod_status; 1137 uint8_t vp_mod_cmd; 1138 uint8_t vp_mod_cnt; 1139 uint8_t vp_mod_idx0; 1140 uint8_t vp_mod_idx1; 1141 struct { 1142 uint8_t options; 1143 uint8_t loopid; 1144 uint16_t reserved1; 1145 uint8_t wwpn[8]; 1146 uint8_t wwnn[8]; 1147 } vp_mod_ports[2]; 1148 uint8_t vp_mod_reserved2[8]; 1149 } vp_modify_t; 1150 1151 #define VP_STS_OK 0x00 1152 #define VP_STS_ERR 0x01 1153 #define VP_CNT_ERR 0x02 1154 #define VP_GEN_ERR 0x03 1155 #define VP_IDX_ERR 0x04 1156 #define VP_STS_BSY 0x05 1157 1158 #define VP_MODIFY_VP 0x00 1159 #define VP_MODIFY_ENA 0x01 1160 1161 /* 1162 * Port Data Base Element 1163 */ 1164 1165 typedef struct { 1166 uint16_t pdb_options; 1167 uint8_t pdb_mstate; 1168 uint8_t pdb_sstate; 1169 uint8_t pdb_hardaddr_bits[4]; 1170 uint8_t pdb_portid_bits[4]; 1171 uint8_t pdb_nodename[8]; 1172 uint8_t pdb_portname[8]; 1173 uint16_t pdb_execthrottle; 1174 uint16_t pdb_exec_count; 1175 uint8_t pdb_retry_count; 1176 uint8_t pdb_retry_delay; 1177 uint16_t pdb_resalloc; 1178 uint16_t pdb_curalloc; 1179 uint16_t pdb_qhead; 1180 uint16_t pdb_qtail; 1181 uint16_t pdb_tl_next; 1182 uint16_t pdb_tl_last; 1183 uint16_t pdb_features; /* PLOGI, Common Service */ 1184 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1185 uint16_t pdb_roi; /* PLOGI, Common Service */ 1186 uint8_t pdb_target; 1187 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1188 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1189 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1190 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1191 uint16_t pdb_labrtflg; 1192 uint16_t pdb_lstopflg; 1193 uint16_t pdb_sqhead; 1194 uint16_t pdb_sqtail; 1195 uint16_t pdb_ptimer; 1196 uint16_t pdb_nxt_seqid; 1197 uint16_t pdb_fcount; 1198 uint16_t pdb_prli_len; 1199 uint16_t pdb_prli_svc0; 1200 uint16_t pdb_prli_svc3; 1201 uint16_t pdb_loopid; 1202 uint16_t pdb_il_ptr; 1203 uint16_t pdb_sl_ptr; 1204 } isp_pdb_21xx_t; 1205 1206 #define PDB_OPTIONS_XMITTING (1<<11) 1207 #define PDB_OPTIONS_LNKXMIT (1<<10) 1208 #define PDB_OPTIONS_ABORTED (1<<9) 1209 #define PDB_OPTIONS_ADISC (1<<1) 1210 1211 #define PDB_STATE_DISCOVERY 0 1212 #define PDB_STATE_WDISC_ACK 1 1213 #define PDB_STATE_PLOGI 2 1214 #define PDB_STATE_PLOGI_ACK 3 1215 #define PDB_STATE_PRLI 4 1216 #define PDB_STATE_PRLI_ACK 5 1217 #define PDB_STATE_LOGGED_IN 6 1218 #define PDB_STATE_PORT_UNAVAIL 7 1219 #define PDB_STATE_PRLO 8 1220 #define PDB_STATE_PRLO_ACK 9 1221 #define PDB_STATE_PLOGO 10 1222 #define PDB_STATE_PLOG_ACK 11 1223 1224 #define SVC3_TGT_ROLE 0x10 1225 #define SVC3_INI_ROLE 0x20 1226 #define SVC3_ROLE_MASK 0x30 1227 #define SVC3_ROLE_SHIFT 4 1228 1229 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1230 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1231 1232 /* 1233 * Port Data Base Element- 24XX cards 1234 */ 1235 typedef struct { 1236 uint16_t pdb_flags; 1237 uint8_t pdb_curstate; 1238 uint8_t pdb_laststate; 1239 uint8_t pdb_hardaddr_bits[4]; 1240 uint8_t pdb_portid_bits[4]; 1241 #define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1242 uint16_t pdb_retry_timer; 1243 uint16_t pdb_handle; 1244 uint16_t pdb_rcv_dsize; 1245 uint16_t pdb_reserved0; 1246 uint16_t pdb_prli_svc0; 1247 uint16_t pdb_prli_svc3; 1248 uint8_t pdb_portname[8]; 1249 uint8_t pdb_nodename[8]; 1250 uint8_t pdb_reserved1[24]; 1251 } isp_pdb_24xx_t; 1252 1253 #define PDB2400_TID_SUPPORTED 0x4000 1254 #define PDB2400_FC_TAPE 0x0080 1255 #define PDB2400_CLASS2_ACK0 0x0040 1256 #define PDB2400_FCP_CONF 0x0020 1257 #define PDB2400_CLASS2 0x0010 1258 #define PDB2400_ADDR_VALID 0x0002 1259 1260 #define PDB2400_STATE_PLOGI_PEND 0x03 1261 #define PDB2400_STATE_PLOGI_DONE 0x04 1262 #define PDB2400_STATE_PRLI_PEND 0x05 1263 #define PDB2400_STATE_LOGGED_IN 0x06 1264 #define PDB2400_STATE_PORT_UNAVAIL 0x07 1265 #define PDB2400_STATE_PRLO_PEND 0x09 1266 #define PDB2400_STATE_LOGO_PEND 0x0B 1267 1268 /* 1269 * Common elements from the above two structures that are actually useful to us. 1270 */ 1271 typedef struct { 1272 uint16_t handle; 1273 uint16_t reserved; 1274 uint32_t s3_role : 8, 1275 portid : 24; 1276 uint8_t portname[8]; 1277 uint8_t nodename[8]; 1278 } isp_pdb_t; 1279 1280 /* 1281 * Port Database Changed Async Event information for 24XX cards 1282 */ 1283 #define PDB24XX_AE_OK 0x00 1284 #define PDB24XX_AE_IMPL_LOGO_1 0x01 1285 #define PDB24XX_AE_IMPL_LOGO_2 0x02 1286 #define PDB24XX_AE_IMPL_LOGO_3 0x03 1287 #define PDB24XX_AE_PLOGI_RCVD 0x04 1288 #define PDB24XX_AE_PLOGI_RJT 0x05 1289 #define PDB24XX_AE_PRLI_RCVD 0x06 1290 #define PDB24XX_AE_PRLI_RJT 0x07 1291 #define PDB24XX_AE_TPRLO 0x08 1292 #define PDB24XX_AE_TPRLO_RJT 0x09 1293 #define PDB24XX_AE_PRLO_RCVD 0x0a 1294 #define PDB24XX_AE_LOGO_RCVD 0x0b 1295 #define PDB24XX_AE_TOPO_CHG 0x0c 1296 #define PDB24XX_AE_NPORT_CHG 0x0d 1297 #define PDB24XX_AE_FLOGI_RJT 0x0e 1298 #define PDB24XX_AE_BAD_FANN 0x0f 1299 #define PDB24XX_AE_FLOGI_TIMO 0x10 1300 #define PDB24XX_AE_ABX_LOGO 0x11 1301 #define PDB24XX_AE_PLOGI_DONE 0x12 1302 #define PDB24XX_AE_PRLI_DONJE 0x13 1303 #define PDB24XX_AE_OPN_1 0x14 1304 #define PDB24XX_AE_OPN_2 0x15 1305 #define PDB24XX_AE_TXERR 0x16 1306 #define PDB24XX_AE_FORCED_LOGO 0x17 1307 #define PDB24XX_AE_DISC_TIMO 0x18 1308 1309 /* 1310 * Genericized Port Login/Logout software structure 1311 */ 1312 typedef struct { 1313 uint16_t handle; 1314 uint16_t channel; 1315 uint32_t 1316 flags : 8, 1317 portid : 24; 1318 } isp_plcmd_t; 1319 /* the flags to use are those for PLOGX_FLG_* below */ 1320 1321 /* 1322 * ISP24XX- Login/Logout Port IOCB 1323 */ 1324 typedef struct { 1325 isphdr_t plogx_header; 1326 uint32_t plogx_handle; 1327 uint16_t plogx_status; 1328 uint16_t plogx_nphdl; 1329 uint16_t plogx_flags; 1330 uint16_t plogx_vphdl; /* low 8 bits */ 1331 uint16_t plogx_portlo; /* low 16 bits */ 1332 uint16_t plogx_rspsz_porthi; 1333 struct { 1334 uint16_t lo16; 1335 uint16_t hi16; 1336 } plogx_ioparm[11]; 1337 } isp_plogx_t; 1338 1339 #define PLOGX_STATUS_OK 0x00 1340 #define PLOGX_STATUS_UNAVAIL 0x28 1341 #define PLOGX_STATUS_LOGOUT 0x29 1342 #define PLOGX_STATUS_IOCBERR 0x31 1343 1344 #define PLOGX_IOCBERR_NOLINK 0x01 1345 #define PLOGX_IOCBERR_NOIOCB 0x02 1346 #define PLOGX_IOCBERR_NOXGHG 0x03 1347 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1348 #define PLOGX_IOCBERR_NOFABRIC 0x05 1349 #define PLOGX_IOCBERR_NOTREADY 0x07 1350 #define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */ 1351 #define PLOGX_IOCBERR_NOPCB 0x0a 1352 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1353 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1354 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1355 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1356 #define PLOGX_IOCBERR_NOHANDLE 0x1c 1357 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1358 1359 #define PLOGX_FLG_CMD_MASK 0xf 1360 #define PLOGX_FLG_CMD_PLOGI 0 1361 #define PLOGX_FLG_CMD_PRLI 1 1362 #define PLOGX_FLG_CMD_PDISC 2 1363 #define PLOGX_FLG_CMD_LOGO 8 1364 #define PLOGX_FLG_CMD_PRLO 9 1365 #define PLOGX_FLG_CMD_TPRLO 10 1366 1367 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1368 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1369 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1370 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1371 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1372 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1373 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1374 1375 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1376 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1377 1378 /* 1379 * Report ID Acquisistion (24XX multi-id firmware) 1380 */ 1381 typedef struct { 1382 isphdr_t ridacq_hdr; 1383 uint32_t ridacq_handle; 1384 union { 1385 struct { 1386 uint8_t ridacq_vp_acquired; 1387 uint8_t ridacq_vp_setup; 1388 uint16_t ridacq_reserved0; 1389 } type0; /* type 0 */ 1390 struct { 1391 uint16_t ridacq_vp_count; 1392 uint8_t ridacq_vp_index; 1393 uint8_t ridacq_vp_status; 1394 } type1; /* type 1 */ 1395 } un; 1396 uint16_t ridacq_vp_port_lo; 1397 uint8_t ridacq_vp_port_hi; 1398 uint8_t ridacq_format; /* 0 or 1 */ 1399 uint16_t ridacq_map[8]; 1400 uint8_t ridacq_reserved1[32]; 1401 } isp_ridacq_t; 1402 1403 #define RIDACQ_STS_COMPLETE 0 1404 #define RIDACQ_STS_UNACQUIRED 1 1405 #define RIDACQ_STS_CHANGED 20 1406 1407 1408 /* 1409 * Simple Name Server Data Structures 1410 */ 1411 #define SNS_GA_NXT 0x100 1412 #define SNS_GPN_ID 0x112 1413 #define SNS_GNN_ID 0x113 1414 #define SNS_GFF_ID 0x11F 1415 #define SNS_GID_FT 0x171 1416 #define SNS_RFT_ID 0x217 1417 typedef struct { 1418 uint16_t snscb_rblen; /* response buffer length (words) */ 1419 uint16_t snscb_reserved0; 1420 uint16_t snscb_addr[4]; /* response buffer address */ 1421 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1422 uint16_t snscb_reserved1; 1423 uint16_t snscb_data[1]; /* variable data */ 1424 } sns_screq_t; /* Subcommand Request Structure */ 1425 1426 typedef struct { 1427 uint16_t snscb_rblen; /* response buffer length (words) */ 1428 uint16_t snscb_reserved0; 1429 uint16_t snscb_addr[4]; /* response buffer address */ 1430 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1431 uint16_t snscb_reserved1; 1432 uint16_t snscb_cmd; 1433 uint16_t snscb_reserved2; 1434 uint32_t snscb_reserved3; 1435 uint32_t snscb_port; 1436 } sns_ga_nxt_req_t; 1437 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1438 1439 typedef struct { 1440 uint16_t snscb_rblen; /* response buffer length (words) */ 1441 uint16_t snscb_reserved0; 1442 uint16_t snscb_addr[4]; /* response buffer address */ 1443 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1444 uint16_t snscb_reserved1; 1445 uint16_t snscb_cmd; 1446 uint16_t snscb_reserved2; 1447 uint32_t snscb_reserved3; 1448 uint32_t snscb_portid; 1449 } sns_gxn_id_req_t; 1450 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1451 1452 typedef struct { 1453 uint16_t snscb_rblen; /* response buffer length (words) */ 1454 uint16_t snscb_reserved0; 1455 uint16_t snscb_addr[4]; /* response buffer address */ 1456 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1457 uint16_t snscb_reserved1; 1458 uint16_t snscb_cmd; 1459 uint16_t snscb_mword_div_2; 1460 uint32_t snscb_reserved3; 1461 uint32_t snscb_fc4_type; 1462 } sns_gid_ft_req_t; 1463 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1464 1465 typedef struct { 1466 uint16_t snscb_rblen; /* response buffer length (words) */ 1467 uint16_t snscb_reserved0; 1468 uint16_t snscb_addr[4]; /* response buffer address */ 1469 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1470 uint16_t snscb_reserved1; 1471 uint16_t snscb_cmd; 1472 uint16_t snscb_reserved2; 1473 uint32_t snscb_reserved3; 1474 uint32_t snscb_port; 1475 uint32_t snscb_fc4_types[8]; 1476 } sns_rft_id_req_t; 1477 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1478 1479 typedef struct { 1480 ct_hdr_t snscb_cthdr; 1481 uint8_t snscb_port_type; 1482 uint8_t snscb_port_id[3]; 1483 uint8_t snscb_portname[8]; 1484 uint16_t snscb_data[1]; /* variable data */ 1485 } sns_scrsp_t; /* Subcommand Response Structure */ 1486 1487 typedef struct { 1488 ct_hdr_t snscb_cthdr; 1489 uint8_t snscb_port_type; 1490 uint8_t snscb_port_id[3]; 1491 uint8_t snscb_portname[8]; 1492 uint8_t snscb_pnlen; /* symbolic port name length */ 1493 uint8_t snscb_pname[255]; /* symbolic port name */ 1494 uint8_t snscb_nodename[8]; 1495 uint8_t snscb_nnlen; /* symbolic node name length */ 1496 uint8_t snscb_nname[255]; /* symbolic node name */ 1497 uint8_t snscb_ipassoc[8]; 1498 uint8_t snscb_ipaddr[16]; 1499 uint8_t snscb_svc_class[4]; 1500 uint8_t snscb_fc4_types[32]; 1501 uint8_t snscb_fpname[8]; 1502 uint8_t snscb_reserved; 1503 uint8_t snscb_hardaddr[3]; 1504 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1505 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1506 1507 typedef struct { 1508 ct_hdr_t snscb_cthdr; 1509 uint8_t snscb_wwn[8]; 1510 } sns_gxn_id_rsp_t; 1511 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1512 1513 typedef struct { 1514 ct_hdr_t snscb_cthdr; 1515 uint32_t snscb_fc4_features[32]; 1516 } sns_gff_id_rsp_t; 1517 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1518 1519 typedef struct { 1520 ct_hdr_t snscb_cthdr; 1521 struct { 1522 uint8_t control; 1523 uint8_t portid[3]; 1524 } snscb_ports[1]; 1525 } sns_gid_ft_rsp_t; 1526 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1527 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1528 1529 /* 1530 * Other Misc Structures 1531 */ 1532 1533 /* ELS Pass Through */ 1534 typedef struct { 1535 isphdr_t els_hdr; 1536 uint32_t els_handle; 1537 uint16_t els_status; 1538 uint16_t els_nphdl; 1539 uint16_t els_xmit_dsd_count; /* outgoing only */ 1540 uint8_t els_vphdl; 1541 uint8_t els_sof; 1542 uint32_t els_rxid; 1543 uint16_t els_recv_dsd_count; /* outgoing only */ 1544 uint8_t els_opcode; 1545 uint8_t els_reserved1; 1546 uint8_t els_did_lo; 1547 uint8_t els_did_mid; 1548 uint8_t els_did_hi; 1549 uint8_t els_reserved2; 1550 uint16_t els_reserved3; 1551 uint16_t els_ctl_flags; 1552 union { 1553 struct { 1554 uint32_t _els_bytecnt; 1555 uint32_t _els_subcode1; 1556 uint32_t _els_subcode2; 1557 uint8_t _els_reserved4[20]; 1558 } in; 1559 struct { 1560 uint32_t _els_recv_bytecnt; 1561 uint32_t _els_xmit_bytecnt; 1562 uint32_t _els_xmit_dsd_length; 1563 uint16_t _els_xmit_dsd_a1500; 1564 uint16_t _els_xmit_dsd_a3116; 1565 uint16_t _els_xmit_dsd_a4732; 1566 uint16_t _els_xmit_dsd_a6348; 1567 uint32_t _els_recv_dsd_length; 1568 uint16_t _els_recv_dsd_a1500; 1569 uint16_t _els_recv_dsd_a3116; 1570 uint16_t _els_recv_dsd_a4732; 1571 uint16_t _els_recv_dsd_a6348; 1572 } out; 1573 } inout; 1574 #define els_bytecnt inout.in._els_bytecnt 1575 #define els_subcode1 inout.in._els_subcode1 1576 #define els_subcode2 inout.in._els_subcode2 1577 #define els_reserved4 inout.in._els_reserved4 1578 #define els_recv_bytecnt inout.out._els_recv_bytecnt 1579 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1580 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1581 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1582 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1583 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1584 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1585 #define els_recv_dsd_length inout.out._els_recv_dsd_length 1586 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1587 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1588 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1589 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1590 } els_t; 1591 1592 /* 1593 * A handy package structure for running FC-SCSI commands internally 1594 */ 1595 typedef struct { 1596 uint16_t handle; 1597 uint16_t lun; 1598 uint32_t 1599 channel : 8, 1600 portid : 24; 1601 uint32_t timeout; 1602 union { 1603 struct { 1604 uint32_t data_length; 1605 uint32_t 1606 no_wait : 1, 1607 do_read : 1; 1608 uint8_t cdb[16]; 1609 void *data_ptr; 1610 } beg; 1611 struct { 1612 uint32_t data_residual; 1613 uint8_t status; 1614 uint8_t pad; 1615 uint16_t sense_length; 1616 uint8_t sense_data[32]; 1617 } end; 1618 } fcd; 1619 } isp_xcmd_t; 1620 #endif /* _ISPMBOX_H */ 1621
Indexes created Sun Oct 26 20:09:54 GMT 2025