ispmbox.h revision 1.53
1 /* $NetBSD: ispmbox.h,v 1.53 2009/06/25 23:44:02 mjacob Exp $ */ 2 /* 3 * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration 4 * All rights reserved. 5 * 6 * Additional Copyright (C) 2000-2007 by Matthew Jacob 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /* 32 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 33 */ 34 #ifndef _ISPMBOX_H 35 #define _ISPMBOX_H 36 37 /* 38 * Mailbox Command Opcodes 39 */ 40 #define MBOX_NO_OP 0x0000 41 #define MBOX_LOAD_RAM 0x0001 42 #define MBOX_EXEC_FIRMWARE 0x0002 43 #define MBOX_DUMP_RAM 0x0003 44 #define MBOX_WRITE_RAM_WORD 0x0004 45 #define MBOX_READ_RAM_WORD 0x0005 46 #define MBOX_MAILBOX_REG_TEST 0x0006 47 #define MBOX_VERIFY_CHECKSUM 0x0007 48 #define MBOX_ABOUT_FIRMWARE 0x0008 49 #define MBOX_LOAD_RISC_RAM_2100 0x0009 50 /* a */ 51 #define MBOX_LOAD_RISC_RAM 0x000b 52 /* c */ 53 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 54 #define MBOX_CHECK_FIRMWARE 0x000e 55 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f 56 #define MBOX_INIT_REQ_QUEUE 0x0010 57 #define MBOX_INIT_RES_QUEUE 0x0011 58 #define MBOX_EXECUTE_IOCB 0x0012 59 #define MBOX_WAKE_UP 0x0013 60 #define MBOX_STOP_FIRMWARE 0x0014 61 #define MBOX_ABORT 0x0015 62 #define MBOX_ABORT_DEVICE 0x0016 63 #define MBOX_ABORT_TARGET 0x0017 64 #define MBOX_BUS_RESET 0x0018 65 #define MBOX_STOP_QUEUE 0x0019 66 #define MBOX_START_QUEUE 0x001a 67 #define MBOX_SINGLE_STEP_QUEUE 0x001b 68 #define MBOX_ABORT_QUEUE 0x001c 69 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 70 /* 1e */ 71 #define MBOX_GET_FIRMWARE_STATUS 0x001f 72 #define MBOX_GET_INIT_SCSI_ID 0x0020 73 #define MBOX_GET_SELECT_TIMEOUT 0x0021 74 #define MBOX_GET_RETRY_COUNT 0x0022 75 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 76 #define MBOX_GET_CLOCK_RATE 0x0024 77 #define MBOX_GET_ACT_NEG_STATE 0x0025 78 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 79 #define MBOX_GET_SBUS_PARAMS 0x0027 80 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 81 #define MBOX_GET_TARGET_PARAMS 0x0028 82 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 83 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 84 /* 2b */ 85 /* 2c */ 86 /* 2d */ 87 /* 2e */ 88 /* 2f */ 89 #define MBOX_SET_INIT_SCSI_ID 0x0030 90 #define MBOX_SET_SELECT_TIMEOUT 0x0031 91 #define MBOX_SET_RETRY_COUNT 0x0032 92 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 93 #define MBOX_SET_CLOCK_RATE 0x0034 94 #define MBOX_SET_ACT_NEG_STATE 0x0035 95 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 96 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 97 #define MBOX_SET_PCI_PARAMETERS 0x0037 98 #define MBOX_SET_TARGET_PARAMS 0x0038 99 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 100 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 101 /* 3b */ 102 /* 3c */ 103 /* 3d */ 104 /* 3e */ 105 /* 3f */ 106 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 107 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 108 #define MBOX_EXEC_BIOS_IOCB 0x0042 109 #define MBOX_SET_FW_FEATURES 0x004a 110 #define MBOX_GET_FW_FEATURES 0x004b 111 #define FW_FEATURE_FAST_POST 0x1 112 #define FW_FEATURE_LVD_NOTIFY 0x2 113 #define FW_FEATURE_RIO_32BIT 0x4 114 #define FW_FEATURE_RIO_16BIT 0x8 115 116 #define MBOX_INIT_REQ_QUEUE_A64 0x0052 117 #define MBOX_INIT_RES_QUEUE_A64 0x0053 118 119 #define MBOX_ENABLE_TARGET_MODE 0x0055 120 #define ENABLE_TARGET_FLAG 0x8000 121 #define ENABLE_TQING_FLAG 0x0004 122 #define ENABLE_MANDATORY_DISC 0x0002 123 #define MBOX_GET_TARGET_STATUS 0x0056 124 125 /* These are for the ISP2X00 FC cards */ 126 #define MBOX_GET_LOOP_ID 0x0020 127 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 128 #define ISP24XX_INORDER 0x0100 129 #define ISP24XX_NPIV_SAN 0x0400 130 #define ISP24XX_VSAN_SAN 0x1000 131 #define ISP24XX_FC_SP_SAN 0x2000 132 133 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 134 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 135 #define MBOX_GET_RESOURCE_COUNT 0x0042 136 #define MBOX_REQUEST_OFFLINE_MODE 0x0043 137 #define MBOX_ENHANCED_GET_PDB 0x0047 138 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 139 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 140 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 141 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 142 #define MBOX_INIT_FIRMWARE 0x0060 143 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 144 #define MBOX_INIT_LIP 0x0062 145 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 146 #define MBOX_GET_PORT_DB 0x0064 147 #define MBOX_CLEAR_ACA 0x0065 148 #define MBOX_TARGET_RESET 0x0066 149 #define MBOX_CLEAR_TASK_SET 0x0067 150 #define MBOX_ABORT_TASK_SET 0x0068 151 #define MBOX_GET_FW_STATE 0x0069 152 #define MBOX_GET_PORT_NAME 0x006A 153 #define MBOX_GET_LINK_STATUS 0x006B 154 #define MBOX_INIT_LIP_RESET 0x006C 155 #define MBOX_SEND_SNS 0x006E 156 #define MBOX_FABRIC_LOGIN 0x006F 157 #define MBOX_SEND_CHANGE_REQUEST 0x0070 158 #define MBOX_FABRIC_LOGOUT 0x0071 159 #define MBOX_INIT_LIP_LOGIN 0x0072 160 #define MBOX_LUN_RESET 0x007E 161 162 #define MBOX_DRIVER_HEARTBEAT 0x005B 163 #define MBOX_FW_HEARTBEAT 0x005C 164 165 #define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 166 #define MBGSD_GET_RATE 0 167 #define MBGSD_SET_RATE 1 168 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 169 #define MBGSD_ONEGB 0 170 #define MBGSD_TWOGB 1 171 #define MBGSD_AUTO 2 172 #define MBGSD_FOURGB 3 /* 24XX only */ 173 #define MBGSD_EIGHTGB 4 /* 25XX only */ 174 175 176 #define ISP2100_SET_PCI_PARAM 0x00ff 177 178 #define MBOX_BUSY 0x04 179 180 /* 181 * Mailbox Command Complete Status Codes 182 */ 183 #define MBOX_COMMAND_COMPLETE 0x4000 184 #define MBOX_INVALID_COMMAND 0x4001 185 #define MBOX_HOST_INTERFACE_ERROR 0x4002 186 #define MBOX_TEST_FAILED 0x4003 187 #define MBOX_COMMAND_ERROR 0x4005 188 #define MBOX_COMMAND_PARAM_ERROR 0x4006 189 #define MBOX_PORT_ID_USED 0x4007 190 #define MBOX_LOOP_ID_USED 0x4008 191 #define MBOX_ALL_IDS_USED 0x4009 192 #define MBOX_NOT_LOGGED_IN 0x400A 193 /* pseudo mailbox completion codes */ 194 #define MBOX_REGS_BUSY 0x6000 /* registers in use */ 195 #define MBOX_TIMEOUT 0x6001 /* command timed out */ 196 197 #define MBLOGALL 0x000f 198 #define MBLOGNONE 0x0000 199 #define MBLOGMASK(x) ((x) & 0xf) 200 201 /* 202 * Asynchronous event status codes 203 */ 204 #define ASYNC_BUS_RESET 0x8001 205 #define ASYNC_SYSTEM_ERROR 0x8002 206 #define ASYNC_RQS_XFER_ERR 0x8003 207 #define ASYNC_RSP_XFER_ERR 0x8004 208 #define ASYNC_QWAKEUP 0x8005 209 #define ASYNC_TIMEOUT_RESET 0x8006 210 #define ASYNC_DEVICE_RESET 0x8007 211 #define ASYNC_EXTMSG_UNDERRUN 0x800A 212 #define ASYNC_SCAM_INT 0x800B 213 #define ASYNC_HUNG_SCSI 0x800C 214 #define ASYNC_KILLED_BUS 0x800D 215 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 216 #define ASYNC_LIP_OCCURRED 0x8010 217 #define ASYNC_LOOP_UP 0x8011 218 #define ASYNC_LOOP_DOWN 0x8012 219 #define ASYNC_LOOP_RESET 0x8013 220 #define ASYNC_PDB_CHANGED 0x8014 221 #define ASYNC_CHANGE_NOTIFY 0x8015 222 #define ASYNC_LIP_F8 0x8016 223 #define ASYNC_LIP_ERROR 0x8017 224 #define ASYNC_SECURITY_UPDATE 0x801B 225 #define ASYNC_CMD_CMPLT 0x8020 226 #define ASYNC_CTIO_DONE 0x8021 227 #define ASYNC_IP_XMIT_DONE 0x8022 228 #define ASYNC_IP_RECV_DONE 0x8023 229 #define ASYNC_IP_BROADCAST 0x8024 230 #define ASYNC_IP_RCVQ_LOW 0x8025 231 #define ASYNC_IP_RCVQ_EMPTY 0x8026 232 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 233 #define ASYNC_PTPMODE 0x8030 234 #define ASYNC_RIO1 0x8031 235 #define ASYNC_RIO2 0x8032 236 #define ASYNC_RIO3 0x8033 237 #define ASYNC_RIO4 0x8034 238 #define ASYNC_RIO5 0x8035 239 #define ASYNC_CONNMODE 0x8036 240 #define ISP_CONN_LOOP 1 241 #define ISP_CONN_PTP 2 242 #define ISP_CONN_BADLIP 3 243 #define ISP_CONN_FATAL 4 244 #define ISP_CONN_LOOPBACK 5 245 #define ASYNC_RIO_RESP 0x8040 246 #define ASYNC_RIO_COMP 0x8042 247 #define ASYNC_RCV_ERR 0x8048 248 249 /* 250 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 251 * mailbox command to enable this. 252 */ 253 #define ASYNC_QFULL_SENT 0x8049 254 255 /* 256 * 24XX only 257 */ 258 #define ASYNC_RJT_SENT 0x8049 259 260 /* 261 * All IOCB Queue entries are this size 262 */ 263 #define QENTRY_LEN 64 264 265 /* 266 * Special Internal Handle for IOCBs 267 */ 268 #define ISP_SPCL_HANDLE 0xa5dead5a 269 270 /* 271 * Command Structure Definitions 272 */ 273 274 typedef struct { 275 uint32_t ds_base; 276 uint32_t ds_count; 277 } ispds_t; 278 279 typedef struct { 280 uint32_t ds_base; 281 uint32_t ds_basehi; 282 uint32_t ds_count; 283 } ispds64_t; 284 285 #define DSTYPE_32BIT 0 286 #define DSTYPE_64BIT 1 287 typedef struct { 288 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 289 uint32_t ds_segment; /* unused */ 290 uint32_t ds_base; /* 32 bit address of DSD list */ 291 } ispdslist_t; 292 293 294 typedef struct { 295 uint8_t rqs_entry_type; 296 uint8_t rqs_entry_count; 297 uint8_t rqs_seqno; 298 uint8_t rqs_flags; 299 } isphdr_t; 300 301 /* RQS Flag definitions */ 302 #define RQSFLAG_CONTINUATION 0x01 303 #define RQSFLAG_FULL 0x02 304 #define RQSFLAG_BADHEADER 0x04 305 #define RQSFLAG_BADPACKET 0x08 306 #define RQSFLAG_BADCOUNT 0x10 307 #define RQSFLAG_BADORDER 0x20 308 #define RQSFLAG_MASK 0x3f 309 310 /* RQS entry_type definitions */ 311 #define RQSTYPE_REQUEST 0x01 312 #define RQSTYPE_DATASEG 0x02 313 #define RQSTYPE_RESPONSE 0x03 314 #define RQSTYPE_MARKER 0x04 315 #define RQSTYPE_CMDONLY 0x05 316 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 317 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 318 #define RQSTYPE_SCAM 0x08 319 #define RQSTYPE_A64 0x09 320 #define RQSTYPE_A64_CONT 0x0a 321 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 322 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 323 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 324 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 325 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 326 #define RQSTYPE_STATUS_CONT 0x10 327 #define RQSTYPE_T2RQS 0x11 328 #define RQSTYPE_CTIO7 0x12 329 #define RQSTYPE_IP_XMIT 0x13 330 #define RQSTYPE_TSK_MGMT 0x14 331 #define RQSTYPE_T4RQS 0x15 332 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 333 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 334 #define RQSTYPE_T7RQS 0x18 335 #define RQSTYPE_T3RQS 0x19 336 #define RQSTYPE_IP_XMIT_64 0x1b 337 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 338 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 339 #define RQSTYPE_RIO1 0x21 340 #define RQSTYPE_RIO2 0x22 341 #define RQSTYPE_IP_RECV 0x23 342 #define RQSTYPE_IP_RECV_CONT 0x24 343 #define RQSTYPE_CT_PASSTHRU 0x29 344 #define RQSTYPE_MS_PASSTHRU 0x29 345 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 346 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 347 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 348 #define RQSTYPE_ABORT_IO 0x33 349 #define RQSTYPE_T6RQS 0x48 350 #define RQSTYPE_LOGIN 0x52 351 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 352 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 353 354 355 #define ISP_RQDSEG 4 356 typedef struct { 357 isphdr_t req_header; 358 uint32_t req_handle; 359 uint8_t req_lun_trn; 360 uint8_t req_target; 361 uint16_t req_cdblen; 362 uint16_t req_flags; 363 uint16_t req_reserved; 364 uint16_t req_time; 365 uint16_t req_seg_count; 366 uint8_t req_cdb[12]; 367 ispds_t req_dataseg[ISP_RQDSEG]; 368 } ispreq_t; 369 #define ISP_RQDSEG_A64 2 370 371 typedef struct { 372 isphdr_t mrk_header; 373 uint32_t mrk_handle; 374 uint8_t mrk_reserved0; 375 uint8_t mrk_target; 376 uint16_t mrk_modifier; 377 uint16_t mrk_flags; 378 uint16_t mrk_lun; 379 uint8_t mrk_reserved1[48]; 380 } isp_marker_t; 381 382 typedef struct { 383 isphdr_t mrk_header; 384 uint32_t mrk_handle; 385 uint16_t mrk_nphdl; 386 uint8_t mrk_modifier; 387 uint8_t mrk_reserved0; 388 uint8_t mrk_reserved1; 389 uint8_t mrk_vphdl; 390 uint16_t mrk_reserved2; 391 uint8_t mrk_lun[8]; 392 uint8_t mrk_reserved3[40]; 393 } isp_marker_24xx_t; 394 395 396 #define SYNC_DEVICE 0 397 #define SYNC_TARGET 1 398 #define SYNC_ALL 2 399 #define SYNC_LIP 3 400 401 #define ISP_RQDSEG_T2 3 402 typedef struct { 403 isphdr_t req_header; 404 uint32_t req_handle; 405 uint8_t req_lun_trn; 406 uint8_t req_target; 407 uint16_t req_scclun; 408 uint16_t req_flags; 409 uint16_t req_reserved; 410 uint16_t req_time; 411 uint16_t req_seg_count; 412 uint8_t req_cdb[16]; 413 uint32_t req_totalcnt; 414 ispds_t req_dataseg[ISP_RQDSEG_T2]; 415 } ispreqt2_t; 416 417 typedef struct { 418 isphdr_t req_header; 419 uint32_t req_handle; 420 uint16_t req_target; 421 uint16_t req_scclun; 422 uint16_t req_flags; 423 uint16_t req_reserved; 424 uint16_t req_time; 425 uint16_t req_seg_count; 426 uint8_t req_cdb[16]; 427 uint32_t req_totalcnt; 428 ispds_t req_dataseg[ISP_RQDSEG_T2]; 429 } ispreqt2e_t; 430 431 #define ISP_RQDSEG_T3 2 432 typedef struct { 433 isphdr_t req_header; 434 uint32_t req_handle; 435 uint8_t req_lun_trn; 436 uint8_t req_target; 437 uint16_t req_scclun; 438 uint16_t req_flags; 439 uint16_t req_reserved; 440 uint16_t req_time; 441 uint16_t req_seg_count; 442 uint8_t req_cdb[16]; 443 uint32_t req_totalcnt; 444 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 445 } ispreqt3_t; 446 #define ispreq64_t ispreqt3_t /* same as.... */ 447 448 typedef struct { 449 isphdr_t req_header; 450 uint32_t req_handle; 451 uint16_t req_target; 452 uint16_t req_scclun; 453 uint16_t req_flags; 454 uint16_t req_reserved; 455 uint16_t req_time; 456 uint16_t req_seg_count; 457 uint8_t req_cdb[16]; 458 uint32_t req_totalcnt; 459 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 460 } ispreqt3e_t; 461 462 /* req_flag values */ 463 #define REQFLAG_NODISCON 0x0001 464 #define REQFLAG_HTAG 0x0002 465 #define REQFLAG_OTAG 0x0004 466 #define REQFLAG_STAG 0x0008 467 #define REQFLAG_TARGET_RTN 0x0010 468 469 #define REQFLAG_NODATA 0x0000 470 #define REQFLAG_DATA_IN 0x0020 471 #define REQFLAG_DATA_OUT 0x0040 472 #define REQFLAG_DATA_UNKNOWN 0x0060 473 474 #define REQFLAG_DISARQ 0x0100 475 #define REQFLAG_FRC_ASYNC 0x0200 476 #define REQFLAG_FRC_SYNC 0x0400 477 #define REQFLAG_FRC_WIDE 0x0800 478 #define REQFLAG_NOPARITY 0x1000 479 #define REQFLAG_STOPQ 0x2000 480 #define REQFLAG_XTRASNS 0x4000 481 #define REQFLAG_PRIORITY 0x8000 482 483 typedef struct { 484 isphdr_t req_header; 485 uint32_t req_handle; 486 uint8_t req_lun_trn; 487 uint8_t req_target; 488 uint16_t req_cdblen; 489 uint16_t req_flags; 490 uint16_t req_reserved; 491 uint16_t req_time; 492 uint16_t req_seg_count; 493 uint8_t req_cdb[44]; 494 } ispextreq_t; 495 496 /* 24XX only */ 497 typedef struct { 498 uint16_t fcd_length; 499 uint16_t fcd_a1500; 500 uint16_t fcd_a3116; 501 uint16_t fcd_a4732; 502 uint16_t fcd_a6348; 503 } fcp_cmnd_ds_t; 504 505 typedef struct { 506 isphdr_t req_header; 507 uint32_t req_handle; 508 uint16_t req_nphdl; 509 uint16_t req_time; 510 uint16_t req_seg_count; 511 uint16_t req_fc_rsp_dsd_length; 512 uint8_t req_lun[8]; 513 uint16_t req_flags; 514 uint16_t req_fc_cmnd_dsd_length; 515 uint16_t req_fc_cmnd_dsd_a1500; 516 uint16_t req_fc_cmnd_dsd_a3116; 517 uint16_t req_fc_cmnd_dsd_a4732; 518 uint16_t req_fc_cmnd_dsd_a6348; 519 uint16_t req_fc_rsp_dsd_a1500; 520 uint16_t req_fc_rsp_dsd_a3116; 521 uint16_t req_fc_rsp_dsd_a4732; 522 uint16_t req_fc_rsp_dsd_a6348; 523 uint32_t req_totalcnt; 524 uint16_t req_tidlo; 525 uint8_t req_tidhi; 526 uint8_t req_vpidx; 527 ispds64_t req_dataseg; 528 } ispreqt6_t; 529 530 typedef struct { 531 isphdr_t req_header; 532 uint32_t req_handle; 533 uint16_t req_nphdl; 534 uint16_t req_time; 535 uint16_t req_seg_count; 536 uint16_t req_reserved; 537 uint8_t req_lun[8]; 538 uint8_t req_alen_datadir; 539 uint8_t req_task_management; 540 uint8_t req_task_attribute; 541 uint8_t req_crn; 542 uint8_t req_cdb[16]; 543 uint32_t req_dl; 544 uint16_t req_tidlo; 545 uint8_t req_tidhi; 546 uint8_t req_vpidx; 547 ispds64_t req_dataseg; 548 } ispreqt7_t; 549 550 /* Task Management Request Function */ 551 typedef struct { 552 isphdr_t tmf_header; 553 uint32_t tmf_handle; 554 uint16_t tmf_nphdl; 555 uint8_t tmf_reserved0[2]; 556 uint16_t tmf_delay; 557 uint16_t tmf_timeout; 558 uint8_t tmf_lun[8]; 559 uint32_t tmf_flags; 560 uint8_t tmf_reserved1[20]; 561 uint16_t tmf_tidlo; 562 uint8_t tmf_tidhi; 563 uint8_t tmf_vpidx; 564 uint8_t tmf_reserved2[12]; 565 } isp24xx_tmf_t; 566 567 #define ISP24XX_TMF_NOSEND 0x80000000 568 569 #define ISP24XX_TMF_LUN_RESET 0x00000010 570 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 571 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 572 #define ISP24XX_TMF_TARGET_RESET 0x00000002 573 #define ISP24XX_TMF_CLEAR_ACA 0x00000001 574 575 /* I/O Abort Structure */ 576 typedef struct { 577 isphdr_t abrt_header; 578 uint32_t abrt_handle; 579 uint16_t abrt_nphdl; 580 uint16_t abrt_options; 581 uint32_t abrt_cmd_handle; 582 uint8_t abrt_reserved[32]; 583 uint16_t abrt_tidlo; 584 uint8_t abrt_tidhi; 585 uint8_t abrt_vpidx; 586 uint8_t abrt_reserved1[12]; 587 } isp24xx_abrt_t; 588 589 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 590 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 591 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 592 593 #define ISP_CDSEG 7 594 typedef struct { 595 isphdr_t req_header; 596 uint32_t req_reserved; 597 ispds_t req_dataseg[ISP_CDSEG]; 598 } ispcontreq_t; 599 600 #define ISP_CDSEG64 5 601 typedef struct { 602 isphdr_t req_header; 603 ispds64_t req_dataseg[ISP_CDSEG64]; 604 } ispcontreq64_t; 605 606 typedef struct { 607 isphdr_t req_header; 608 uint32_t req_handle; 609 uint16_t req_scsi_status; 610 uint16_t req_completion_status; 611 uint16_t req_state_flags; 612 uint16_t req_status_flags; 613 uint16_t req_time; 614 #define req_response_len req_time /* FC only */ 615 uint16_t req_sense_len; 616 uint32_t req_resid; 617 uint8_t req_response[8]; /* FC only */ 618 uint8_t req_sense_data[32]; 619 } ispstatusreq_t; 620 621 /* 622 * Status Continuation 623 */ 624 typedef struct { 625 isphdr_t req_header; 626 uint8_t req_sense_data[60]; 627 } ispstatus_cont_t; 628 629 /* 630 * 24XX Type 0 status 631 */ 632 typedef struct { 633 isphdr_t req_header; 634 uint32_t req_handle; 635 uint16_t req_completion_status; 636 uint16_t req_oxid; 637 uint32_t req_resid; 638 uint16_t req_reserved0; 639 uint16_t req_state_flags; 640 uint16_t req_reserved1; 641 uint16_t req_scsi_status; 642 uint32_t req_fcp_residual; 643 uint32_t req_sense_len; 644 uint32_t req_response_len; 645 uint8_t req_rsp_sense[28]; 646 } isp24xx_statusreq_t; 647 648 /* 649 * For Qlogic 2X00, the high order byte of SCSI status has 650 * additional meaning. 651 */ 652 #define RQCS_RU 0x800 /* Residual Under */ 653 #define RQCS_RO 0x400 /* Residual Over */ 654 #define RQCS_RESID (RQCS_RU|RQCS_RO) 655 #define RQCS_SV 0x200 /* Sense Length Valid */ 656 #define RQCS_RV 0x100 /* FCP Response Length Valid */ 657 658 /* 659 * CT Passthru IOCB 660 */ 661 typedef struct { 662 isphdr_t ctp_header; 663 uint32_t ctp_handle; 664 uint16_t ctp_status; 665 uint16_t ctp_nphdl; /* n-port handle */ 666 uint16_t ctp_cmd_cnt; /* Command DSD count */ 667 uint8_t ctp_vpidx; 668 uint8_t ctp_reserved0; 669 uint16_t ctp_time; 670 uint16_t ctp_reserved1; 671 uint16_t ctp_rsp_cnt; /* Response DSD count */ 672 uint16_t ctp_reserved2[5]; 673 uint32_t ctp_rsp_bcnt; /* Response byte count */ 674 uint32_t ctp_cmd_bcnt; /* Command byte count */ 675 ispds64_t ctp_dataseg[2]; 676 } isp_ct_pt_t; 677 678 /* 679 * MS Passthru IOCB 680 */ 681 typedef struct { 682 isphdr_t ms_header; 683 uint32_t ms_handle; 684 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 685 uint16_t ms_status; 686 uint16_t ms_flags; 687 uint16_t ms_reserved1; /* low 8 bits */ 688 uint16_t ms_time; 689 uint16_t ms_cmd_cnt; /* Command DSD count */ 690 uint16_t ms_tot_cnt; /* Total DSD Count */ 691 uint8_t ms_type; /* MS type */ 692 uint8_t ms_r_ctl; /* R_CTL */ 693 uint16_t ms_rxid; /* RX_ID */ 694 uint16_t ms_reserved2; 695 uint32_t ms_handle2; 696 uint32_t ms_rsp_bcnt; /* Response byte count */ 697 uint32_t ms_cmd_bcnt; /* Command byte count */ 698 ispds64_t ms_dataseg[2]; 699 } isp_ms_t; 700 701 /* 702 * Completion Status Codes. 703 */ 704 #define RQCS_COMPLETE 0x0000 705 #define RQCS_DMA_ERROR 0x0002 706 #define RQCS_RESET_OCCURRED 0x0004 707 #define RQCS_ABORTED 0x0005 708 #define RQCS_TIMEOUT 0x0006 709 #define RQCS_DATA_OVERRUN 0x0007 710 #define RQCS_DATA_UNDERRUN 0x0015 711 #define RQCS_QUEUE_FULL 0x001C 712 713 /* 1X00 Only Completion Codes */ 714 #define RQCS_INCOMPLETE 0x0001 715 #define RQCS_TRANSPORT_ERROR 0x0003 716 #define RQCS_COMMAND_OVERRUN 0x0008 717 #define RQCS_STATUS_OVERRUN 0x0009 718 #define RQCS_BAD_MESSAGE 0x000a 719 #define RQCS_NO_MESSAGE_OUT 0x000b 720 #define RQCS_EXT_ID_FAILED 0x000c 721 #define RQCS_IDE_MSG_FAILED 0x000d 722 #define RQCS_ABORT_MSG_FAILED 0x000e 723 #define RQCS_REJECT_MSG_FAILED 0x000f 724 #define RQCS_NOP_MSG_FAILED 0x0010 725 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 726 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 727 #define RQCS_ID_MSG_FAILED 0x0013 728 #define RQCS_UNEXP_BUS_FREE 0x0014 729 #define RQCS_XACT_ERR1 0x0018 730 #define RQCS_XACT_ERR2 0x0019 731 #define RQCS_XACT_ERR3 0x001A 732 #define RQCS_BAD_ENTRY 0x001B 733 #define RQCS_PHASE_SKIPPED 0x001D 734 #define RQCS_ARQS_FAILED 0x001E 735 #define RQCS_WIDE_FAILED 0x001F 736 #define RQCS_SYNCXFER_FAILED 0x0020 737 #define RQCS_LVD_BUSERR 0x0021 738 739 /* 2X00 Only Completion Codes */ 740 #define RQCS_PORT_UNAVAILABLE 0x0028 741 #define RQCS_PORT_LOGGED_OUT 0x0029 742 #define RQCS_PORT_CHANGED 0x002A 743 #define RQCS_PORT_BUSY 0x002B 744 745 /* 24XX Only Completion Codes */ 746 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 747 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 748 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 749 #define RQCS_24XX_TMO 0x0030 /* task management overrun */ 750 751 752 /* 753 * 1X00 specific State Flags 754 */ 755 #define RQSF_GOT_BUS 0x0100 756 #define RQSF_GOT_TARGET 0x0200 757 #define RQSF_SENT_CDB 0x0400 758 #define RQSF_XFRD_DATA 0x0800 759 #define RQSF_GOT_STATUS 0x1000 760 #define RQSF_GOT_SENSE 0x2000 761 #define RQSF_XFER_COMPLETE 0x4000 762 763 /* 764 * 2X00 specific State Flags 765 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 766 */ 767 #define RQSF_DATA_IN 0x0020 768 #define RQSF_DATA_OUT 0x0040 769 #define RQSF_STAG 0x0008 770 #define RQSF_OTAG 0x0004 771 #define RQSF_HTAG 0x0002 772 /* 773 * 1X00 Status Flags 774 */ 775 #define RQSTF_DISCONNECT 0x0001 776 #define RQSTF_SYNCHRONOUS 0x0002 777 #define RQSTF_PARITY_ERROR 0x0004 778 #define RQSTF_BUS_RESET 0x0008 779 #define RQSTF_DEVICE_RESET 0x0010 780 #define RQSTF_ABORTED 0x0020 781 #define RQSTF_TIMEOUT 0x0040 782 #define RQSTF_NEGOTIATION 0x0080 783 784 /* 785 * 2X00 specific state flags 786 */ 787 /* RQSF_SENT_CDB */ 788 /* RQSF_XFRD_DATA */ 789 /* RQSF_GOT_STATUS */ 790 /* RQSF_XFER_COMPLETE */ 791 792 /* 793 * 2X00 specific status flags 794 */ 795 /* RQSTF_ABORTED */ 796 /* RQSTF_TIMEOUT */ 797 #define RQSTF_DMA_ERROR 0x0080 798 #define RQSTF_LOGOUT 0x2000 799 800 /* 801 * Miscellaneous 802 */ 803 #ifndef ISP_EXEC_THROTTLE 804 #define ISP_EXEC_THROTTLE 16 805 #endif 806 807 /* 808 * About Firmware returns an 'attribute' word in mailbox 6. 809 * These attributes are for 2200 and 2300. 810 */ 811 #define ISP_FW_ATTR_TMODE 0x0001 812 #define ISP_FW_ATTR_SCCLUN 0x0002 813 #define ISP_FW_ATTR_FABRIC 0x0004 814 #define ISP_FW_ATTR_CLASS2 0x0008 815 #define ISP_FW_ATTR_FCTAPE 0x0010 816 #define ISP_FW_ATTR_IP 0x0020 817 #define ISP_FW_ATTR_VI 0x0040 818 #define ISP_FW_ATTR_VI_SOLARIS 0x0080 819 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 820 821 /* and these are for the 2400 */ 822 #define ISP2400_FW_ATTR_CLASS2 0x0001 823 #define ISP2400_FW_ATTR_IP 0x0002 824 #define ISP2400_FW_ATTR_MULTIID 0x0004 825 #define ISP2400_FW_ATTR_SB2 0x0008 826 #define ISP2400_FW_ATTR_T10CRC 0x0010 827 #define ISP2400_FW_ATTR_VI 0x0020 828 #define ISP2400_FW_ATTR_EXPFW 0x2000 829 830 #define ISP_CAP_TMODE(isp) \ 831 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 832 #define ISP_CAP_SCCFW(isp) \ 833 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 834 #define ISP_CAP_2KLOGIN(isp) \ 835 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 836 #define ISP_CAP_MULTI_ID(isp) \ 837 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 838 839 #define ISP_GET_VPIDX(isp, tag) \ 840 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 841 842 /* 843 * Reduced Interrupt Operation Response Queue Entreis 844 */ 845 846 typedef struct { 847 isphdr_t req_header; 848 uint32_t req_handles[15]; 849 } isp_rio1_t; 850 851 typedef struct { 852 isphdr_t req_header; 853 uint16_t req_handles[30]; 854 } isp_rio2_t; 855 856 /* 857 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 858 */ 859 860 /* 861 * Initialization Control Block 862 * 863 * Version One (prime) format. 864 */ 865 typedef struct { 866 uint8_t icb_version; 867 uint8_t icb_reserved0; 868 uint16_t icb_fwoptions; 869 uint16_t icb_maxfrmlen; 870 uint16_t icb_maxalloc; 871 uint16_t icb_execthrottle; 872 uint8_t icb_retry_count; 873 uint8_t icb_retry_delay; 874 uint8_t icb_portname[8]; 875 uint16_t icb_hardaddr; 876 uint8_t icb_iqdevtype; 877 uint8_t icb_logintime; 878 uint8_t icb_nodename[8]; 879 uint16_t icb_rqstout; 880 uint16_t icb_rspnsin; 881 uint16_t icb_rqstqlen; 882 uint16_t icb_rsltqlen; 883 uint16_t icb_rqstaddr[4]; 884 uint16_t icb_respaddr[4]; 885 uint16_t icb_lunenables; 886 uint8_t icb_ccnt; 887 uint8_t icb_icnt; 888 uint16_t icb_lunetimeout; 889 uint16_t icb_reserved1; 890 uint16_t icb_xfwoptions; 891 uint8_t icb_racctimer; 892 uint8_t icb_idelaytimer; 893 uint16_t icb_zfwoptions; 894 uint16_t icb_reserved2[13]; 895 } isp_icb_t; 896 897 #define ICB_VERSION1 1 898 899 #define ICBOPT_EXTENDED 0x8000 900 #define ICBOPT_BOTH_WWNS 0x4000 901 #define ICBOPT_FULL_LOGIN 0x2000 902 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 903 #define ICBOPT_PREVLOOP 0x0800 904 #define ICBOPT_SRCHDOWN 0x0400 905 #define ICBOPT_NOLIP 0x0200 906 #define ICBOPT_PDBCHANGE_AE 0x0100 907 #define ICBOPT_INI_TGTTYPE 0x0080 908 #define ICBOPT_INI_ADISC 0x0040 909 #define ICBOPT_INI_DISABLE 0x0020 910 #define ICBOPT_TGT_ENABLE 0x0010 911 #define ICBOPT_FAST_POST 0x0008 912 #define ICBOPT_FULL_DUPLEX 0x0004 913 #define ICBOPT_FAIRNESS 0x0002 914 #define ICBOPT_HARD_ADDRESS 0x0001 915 916 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 917 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 918 #define ICBXOPT_FCTAPE_CONFIRM 0x2000 919 #define ICBXOPT_FCTAPE 0x1000 920 #define ICBXOPT_CLASS2_ACK0 0x0200 921 #define ICBXOPT_CLASS2 0x0100 922 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 923 #define ICBXOPT_TOPO_MASK 0x0070 924 #define ICBXOPT_LOOP_ONLY 0x0000 925 #define ICBXOPT_PTP_ONLY 0x0010 926 #define ICBXOPT_LOOP_2_PTP 0x0020 927 #define ICBXOPT_PTP_2_LOOP 0x0030 928 /* 929 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 930 * RIO is not defined for the 23XX cards (just 2200) 931 */ 932 #define ICBXOPT_RIO_OFF 0 933 #define ICBXOPT_RIO_16BIT 1 934 #define ICBXOPT_RIO_32BIT 2 935 #define ICBXOPT_RIO_16BIT_IOCB 3 936 #define ICBXOPT_RIO_32BIT_IOCB 4 937 #define ICBXOPT_ZIO 5 938 #define ICBXOPT_TIMER_MASK 0x7 939 940 #define ICBZOPT_RATE_MASK 0xC000 941 #define ICBZOPT_RATE_ONEGB 0x0000 942 #define ICBZOPT_RATE_AUTO 0x8000 943 #define ICBZOPT_RATE_TWOGB 0x4000 944 #define ICBZOPT_50_OHM 0x2000 945 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 946 #define ICBZOPT_RSPSZ_MASK 0x0030 947 #define ICBZOPT_RSPSZ_24 0x0000 948 #define ICBZOPT_RSPSZ_12 0x0010 949 #define ICBZOPT_RSPSZ_24A 0x0020 950 #define ICBZOPT_RSPSZ_32 0x0030 951 #define ICBZOPT_SOFTID 0x0002 952 #define ICBZOPT_ENA_RDXFR_RDY 0x0001 953 954 /* 2400 F/W options */ 955 #define ICB2400_OPT1_BOTH_WWNS 0x00004000 956 #define ICB2400_OPT1_FULL_LOGIN 0x00002000 957 #define ICB2400_OPT1_PREVLOOP 0x00000800 958 #define ICB2400_OPT1_SRCHDOWN 0x00000400 959 #define ICB2400_OPT1_NOLIP 0x00000200 960 #define ICB2400_OPT1_INI_DISABLE 0x00000020 961 #define ICB2400_OPT1_TGT_ENABLE 0x00000010 962 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004 963 #define ICB2400_OPT1_FAIRNESS 0x00000002 964 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001 965 966 #define ICB2400_OPT2_FCTAPE 0x00001000 967 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200 968 #define ICB2400_OPT2_CLASS2 0x00000100 969 #define ICB2400_OPT2_NO_PLAY 0x00000080 970 #define ICB2400_OPT2_TOPO_MASK 0x00000070 971 #define ICB2400_OPT2_LOOP_ONLY 0x00000000 972 #define ICB2400_OPT2_PTP_ONLY 0x00000010 973 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020 974 #define ICB2400_OPT2_PTP_2_LOOP 0x00000030 975 #define ICB2400_OPT2_TIMER_MASK 0x00000007 976 #define ICB2400_OPT2_ZIO 0x00000005 977 #define ICB2400_OPT2_ZIO1 0x00000006 978 979 #define ICB2400_OPT3_75_OHM 0x00010000 980 #define ICB2400_OPT3_RATE_MASK 0x0000E000 981 #define ICB2400_OPT3_RATE_ONEGB 0x00000000 982 #define ICB2400_OPT3_RATE_TWOGB 0x00002000 983 #define ICB2400_OPT3_RATE_AUTO 0x00004000 984 #define ICB2400_OPT3_RATE_FOURGB 0x00006000 985 #define ICB2400_OPT3_RATE_EIGHTGB 0x00008000 986 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 987 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 988 #define ICB2400_OPT3_ENA_OOF 0x00000040 989 /* note that a response size flag of zero is reserved! */ 990 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030 991 #define ICB2400_OPT3_RSPSZ_12 0x00000010 992 #define ICB2400_OPT3_RSPSZ_24 0x00000020 993 #define ICB2400_OPT3_RSPSZ_32 0x00000030 994 #define ICB2400_OPT3_SOFTID 0x00000002 995 996 #define ICB_MIN_FRMLEN 256 997 #define ICB_MAX_FRMLEN 2112 998 #define ICB_DFLT_FRMLEN 1024 999 #define ICB_DFLT_ALLOC 256 1000 #define ICB_DFLT_THROTTLE 16 1001 #define ICB_DFLT_RDELAY 5 1002 #define ICB_DFLT_RCOUNT 3 1003 1004 #define ICB_LOGIN_TOV 30 1005 #define ICB_LUN_ENABLE_TOV 180 1006 1007 1008 /* 1009 * And somebody at QLogic had a great idea that you could just change 1010 * the structure *and* keep the version number the same as the other cards. 1011 */ 1012 typedef struct { 1013 uint16_t icb_version; 1014 uint16_t icb_reserved0; 1015 uint16_t icb_maxfrmlen; 1016 uint16_t icb_execthrottle; 1017 uint16_t icb_xchgcnt; 1018 uint16_t icb_hardaddr; 1019 uint8_t icb_portname[8]; 1020 uint8_t icb_nodename[8]; 1021 uint16_t icb_rspnsin; 1022 uint16_t icb_rqstout; 1023 uint16_t icb_retry_count; 1024 uint16_t icb_priout; 1025 uint16_t icb_rsltqlen; 1026 uint16_t icb_rqstqlen; 1027 uint16_t icb_ldn_nols; 1028 uint16_t icb_prqstqlen; 1029 uint16_t icb_rqstaddr[4]; 1030 uint16_t icb_respaddr[4]; 1031 uint16_t icb_priaddr[4]; 1032 uint16_t icb_reserved1[4]; 1033 uint16_t icb_atio_in; 1034 uint16_t icb_atioqlen; 1035 uint16_t icb_atioqaddr[4]; 1036 uint16_t icb_idelaytimer; 1037 uint16_t icb_logintime; 1038 uint32_t icb_fwoptions1; 1039 uint32_t icb_fwoptions2; 1040 uint32_t icb_fwoptions3; 1041 uint16_t icb_reserved2[12]; 1042 } isp_icb_2400_t; 1043 1044 #define RQRSP_ADDR0015 0 1045 #define RQRSP_ADDR1631 1 1046 #define RQRSP_ADDR3247 2 1047 #define RQRSP_ADDR4863 3 1048 1049 1050 #define ICB_NNM0 7 1051 #define ICB_NNM1 6 1052 #define ICB_NNM2 5 1053 #define ICB_NNM3 4 1054 #define ICB_NNM4 3 1055 #define ICB_NNM5 2 1056 #define ICB_NNM6 1 1057 #define ICB_NNM7 0 1058 1059 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1060 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1061 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1062 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1063 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1064 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1065 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1066 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1067 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1068 1069 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1070 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1071 ((uint64_t) array[ICB_NNM1] << 8) | \ 1072 ((uint64_t) array[ICB_NNM2] << 16) | \ 1073 ((uint64_t) array[ICB_NNM3] << 24) | \ 1074 ((uint64_t) array[ICB_NNM4] << 32) | \ 1075 ((uint64_t) array[ICB_NNM5] << 40) | \ 1076 ((uint64_t) array[ICB_NNM6] << 48) | \ 1077 ((uint64_t) array[ICB_NNM7] << 56) 1078 1079 1080 /* 1081 * For MULTI_ID firmware, this describes a 1082 * virtual port entity for getting status. 1083 */ 1084 typedef struct { 1085 uint16_t vp_port_status; 1086 uint8_t vp_port_options; 1087 uint8_t vp_port_loopid; 1088 uint8_t vp_port_portname[8]; 1089 uint8_t vp_port_nodename[8]; 1090 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1091 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1092 } vp_port_info_t; 1093 1094 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* disable target mode */ 1095 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* enable initiator mode */ 1096 #define ICB2400_VPOPT_ENABLED 0x00000008 1097 #define ICB2400_VPOPT_NOPLAY 0x00000004 1098 #define ICB2400_VPOPT_PREVLOOP 0x00000002 1099 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 1100 1101 #define ICB2400_VPOPT_WRITE_SIZE 20 1102 1103 /* 1104 * For MULTI_ID firmware, we append this structure 1105 * to the isp_icb_2400_t above, followed by a list 1106 * structures that are *most* of the vp_port_info_t. 1107 */ 1108 typedef struct { 1109 uint16_t vp_count; 1110 uint16_t vp_global_options; 1111 } isp_icb_2400_vpinfo_t; 1112 1113 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1114 #define ICB2400_VPINFO_PORT_OFF(chan) \ 1115 ICB2400_VPINFO_OFF + \ 1116 sizeof (isp_icb_2400_vpinfo_t) + ((chan - 1) * ICB2400_VPOPT_WRITE_SIZE) 1117 1118 #define ICB2400_VPGOPT_MID_DISABLE 0x02 1119 1120 typedef struct { 1121 isphdr_t vp_ctrl_hdr; 1122 uint32_t vp_ctrl_handle; 1123 uint16_t vp_ctrl_index_fail; 1124 uint16_t vp_ctrl_status; 1125 uint16_t vp_ctrl_command; 1126 uint16_t vp_ctrl_vp_count; 1127 uint16_t vp_ctrl_idmap[8]; 1128 uint8_t vp_ctrl_reserved[32]; 1129 } vp_ctrl_info_t; 1130 1131 #define VP_CTRL_CMD_ENABLE_VP 0 1132 #define VP_CTRL_CMD_DISABLE_VP 8 1133 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 9 1134 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0xA 1135 1136 /* 1137 * We can use this structure for modifying either one or two VP ports after initialization 1138 */ 1139 typedef struct { 1140 isphdr_t vp_mod_hdr; 1141 uint32_t vp_mod_hdl; 1142 uint16_t vp_mod_reserved0; 1143 uint16_t vp_mod_status; 1144 uint8_t vp_mod_cmd; 1145 uint8_t vp_mod_cnt; 1146 uint8_t vp_mod_idx0; 1147 uint8_t vp_mod_idx1; 1148 struct { 1149 uint8_t options; 1150 uint8_t loopid; 1151 uint16_t reserved1; 1152 uint8_t wwpn[8]; 1153 uint8_t wwnn[8]; 1154 } vp_mod_ports[2]; 1155 uint8_t vp_mod_reserved2[8]; 1156 } vp_modify_t; 1157 1158 #define VP_STS_OK 0x00 1159 #define VP_STS_ERR 0x01 1160 #define VP_CNT_ERR 0x02 1161 #define VP_GEN_ERR 0x03 1162 #define VP_IDX_ERR 0x04 1163 #define VP_STS_BSY 0x05 1164 1165 #define VP_MODIFY_VP 0x00 1166 #define VP_MODIFY_ENA 0x01 1167 1168 /* 1169 * Port Data Base Element 1170 */ 1171 1172 typedef struct { 1173 uint16_t pdb_options; 1174 uint8_t pdb_mstate; 1175 uint8_t pdb_sstate; 1176 uint8_t pdb_hardaddr_bits[4]; 1177 uint8_t pdb_portid_bits[4]; 1178 uint8_t pdb_nodename[8]; 1179 uint8_t pdb_portname[8]; 1180 uint16_t pdb_execthrottle; 1181 uint16_t pdb_exec_count; 1182 uint8_t pdb_retry_count; 1183 uint8_t pdb_retry_delay; 1184 uint16_t pdb_resalloc; 1185 uint16_t pdb_curalloc; 1186 uint16_t pdb_qhead; 1187 uint16_t pdb_qtail; 1188 uint16_t pdb_tl_next; 1189 uint16_t pdb_tl_last; 1190 uint16_t pdb_features; /* PLOGI, Common Service */ 1191 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1192 uint16_t pdb_roi; /* PLOGI, Common Service */ 1193 uint8_t pdb_target; 1194 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1195 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1196 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1197 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1198 uint16_t pdb_labrtflg; 1199 uint16_t pdb_lstopflg; 1200 uint16_t pdb_sqhead; 1201 uint16_t pdb_sqtail; 1202 uint16_t pdb_ptimer; 1203 uint16_t pdb_nxt_seqid; 1204 uint16_t pdb_fcount; 1205 uint16_t pdb_prli_len; 1206 uint16_t pdb_prli_svc0; 1207 uint16_t pdb_prli_svc3; 1208 uint16_t pdb_loopid; 1209 uint16_t pdb_il_ptr; 1210 uint16_t pdb_sl_ptr; 1211 } isp_pdb_21xx_t; 1212 1213 #define PDB_OPTIONS_XMITTING (1<<11) 1214 #define PDB_OPTIONS_LNKXMIT (1<<10) 1215 #define PDB_OPTIONS_ABORTED (1<<9) 1216 #define PDB_OPTIONS_ADISC (1<<1) 1217 1218 #define PDB_STATE_DISCOVERY 0 1219 #define PDB_STATE_WDISC_ACK 1 1220 #define PDB_STATE_PLOGI 2 1221 #define PDB_STATE_PLOGI_ACK 3 1222 #define PDB_STATE_PRLI 4 1223 #define PDB_STATE_PRLI_ACK 5 1224 #define PDB_STATE_LOGGED_IN 6 1225 #define PDB_STATE_PORT_UNAVAIL 7 1226 #define PDB_STATE_PRLO 8 1227 #define PDB_STATE_PRLO_ACK 9 1228 #define PDB_STATE_PLOGO 10 1229 #define PDB_STATE_PLOG_ACK 11 1230 1231 #define SVC3_TGT_ROLE 0x10 1232 #define SVC3_INI_ROLE 0x20 1233 #define SVC3_ROLE_MASK 0x30 1234 #define SVC3_ROLE_SHIFT 4 1235 1236 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1237 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1238 1239 /* 1240 * Port Data Base Element- 24XX cards 1241 */ 1242 typedef struct { 1243 uint16_t pdb_flags; 1244 uint8_t pdb_curstate; 1245 uint8_t pdb_laststate; 1246 uint8_t pdb_hardaddr_bits[4]; 1247 uint8_t pdb_portid_bits[4]; 1248 #define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1249 uint16_t pdb_retry_timer; 1250 uint16_t pdb_handle; 1251 uint16_t pdb_rcv_dsize; 1252 uint16_t pdb_reserved0; 1253 uint16_t pdb_prli_svc0; 1254 uint16_t pdb_prli_svc3; 1255 uint8_t pdb_portname[8]; 1256 uint8_t pdb_nodename[8]; 1257 uint8_t pdb_reserved1[24]; 1258 } isp_pdb_24xx_t; 1259 1260 #define PDB2400_TID_SUPPORTED 0x4000 1261 #define PDB2400_FC_TAPE 0x0080 1262 #define PDB2400_CLASS2_ACK0 0x0040 1263 #define PDB2400_FCP_CONF 0x0020 1264 #define PDB2400_CLASS2 0x0010 1265 #define PDB2400_ADDR_VALID 0x0002 1266 1267 #define PDB2400_STATE_PLOGI_PEND 0x03 1268 #define PDB2400_STATE_PLOGI_DONE 0x04 1269 #define PDB2400_STATE_PRLI_PEND 0x05 1270 #define PDB2400_STATE_LOGGED_IN 0x06 1271 #define PDB2400_STATE_PORT_UNAVAIL 0x07 1272 #define PDB2400_STATE_PRLO_PEND 0x09 1273 #define PDB2400_STATE_LOGO_PEND 0x0B 1274 1275 /* 1276 * Common elements from the above two structures that are actually useful to us. 1277 */ 1278 typedef struct { 1279 uint16_t handle; 1280 uint16_t reserved; 1281 uint32_t s3_role : 8, 1282 portid : 24; 1283 uint8_t portname[8]; 1284 uint8_t nodename[8]; 1285 } isp_pdb_t; 1286 1287 /* 1288 * Port Database Changed Async Event information for 24XX cards 1289 */ 1290 #define PDB24XX_AE_OK 0x00 1291 #define PDB24XX_AE_IMPL_LOGO_1 0x01 1292 #define PDB24XX_AE_IMPL_LOGO_2 0x02 1293 #define PDB24XX_AE_IMPL_LOGO_3 0x03 1294 #define PDB24XX_AE_PLOGI_RCVD 0x04 1295 #define PDB24XX_AE_PLOGI_RJT 0x05 1296 #define PDB24XX_AE_PRLI_RCVD 0x06 1297 #define PDB24XX_AE_PRLI_RJT 0x07 1298 #define PDB24XX_AE_TPRLO 0x08 1299 #define PDB24XX_AE_TPRLO_RJT 0x09 1300 #define PDB24XX_AE_PRLO_RCVD 0x0a 1301 #define PDB24XX_AE_LOGO_RCVD 0x0b 1302 #define PDB24XX_AE_TOPO_CHG 0x0c 1303 #define PDB24XX_AE_NPORT_CHG 0x0d 1304 #define PDB24XX_AE_FLOGI_RJT 0x0e 1305 #define PDB24XX_AE_BAD_FANN 0x0f 1306 #define PDB24XX_AE_FLOGI_TIMO 0x10 1307 #define PDB24XX_AE_ABX_LOGO 0x11 1308 #define PDB24XX_AE_PLOGI_DONE 0x12 1309 #define PDB24XX_AE_PRLI_DONJE 0x13 1310 #define PDB24XX_AE_OPN_1 0x14 1311 #define PDB24XX_AE_OPN_2 0x15 1312 #define PDB24XX_AE_TXERR 0x16 1313 #define PDB24XX_AE_FORCED_LOGO 0x17 1314 #define PDB24XX_AE_DISC_TIMO 0x18 1315 1316 /* 1317 * Genericized Port Login/Logout software structure 1318 */ 1319 typedef struct { 1320 uint16_t handle; 1321 uint16_t channel; 1322 uint32_t 1323 flags : 8, 1324 portid : 24; 1325 } isp_plcmd_t; 1326 /* the flags to use are those for PLOGX_FLG_* below */ 1327 1328 /* 1329 * ISP24XX- Login/Logout Port IOCB 1330 */ 1331 typedef struct { 1332 isphdr_t plogx_header; 1333 uint32_t plogx_handle; 1334 uint16_t plogx_status; 1335 uint16_t plogx_nphdl; 1336 uint16_t plogx_flags; 1337 uint16_t plogx_vphdl; /* low 8 bits */ 1338 uint16_t plogx_portlo; /* low 16 bits */ 1339 uint16_t plogx_rspsz_porthi; 1340 struct { 1341 uint16_t lo16; 1342 uint16_t hi16; 1343 } plogx_ioparm[11]; 1344 } isp_plogx_t; 1345 1346 #define PLOGX_STATUS_OK 0x00 1347 #define PLOGX_STATUS_UNAVAIL 0x28 1348 #define PLOGX_STATUS_LOGOUT 0x29 1349 #define PLOGX_STATUS_IOCBERR 0x31 1350 1351 #define PLOGX_IOCBERR_NOLINK 0x01 1352 #define PLOGX_IOCBERR_NOIOCB 0x02 1353 #define PLOGX_IOCBERR_NOXGHG 0x03 1354 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1355 #define PLOGX_IOCBERR_NOFABRIC 0x05 1356 #define PLOGX_IOCBERR_NOTREADY 0x07 1357 #define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */ 1358 #define PLOGX_IOCBERR_NOPCB 0x0a 1359 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1360 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1361 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1362 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1363 #define PLOGX_IOCBERR_NOHANDLE 0x1c 1364 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1365 1366 #define PLOGX_FLG_CMD_MASK 0xf 1367 #define PLOGX_FLG_CMD_PLOGI 0 1368 #define PLOGX_FLG_CMD_PRLI 1 1369 #define PLOGX_FLG_CMD_PDISC 2 1370 #define PLOGX_FLG_CMD_LOGO 8 1371 #define PLOGX_FLG_CMD_PRLO 9 1372 #define PLOGX_FLG_CMD_TPRLO 10 1373 1374 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1375 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1376 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1377 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1378 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1379 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1380 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1381 1382 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1383 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1384 1385 /* 1386 * Report ID Acquisistion (24XX multi-id firmware) 1387 */ 1388 typedef struct { 1389 isphdr_t ridacq_hdr; 1390 uint32_t ridacq_handle; 1391 union { 1392 struct { 1393 uint8_t ridacq_vp_acquired; 1394 uint8_t ridacq_vp_setup; 1395 uint16_t ridacq_reserved0; 1396 } type0; /* type 0 */ 1397 struct { 1398 uint16_t ridacq_vp_count; 1399 uint8_t ridacq_vp_index; 1400 uint8_t ridacq_vp_status; 1401 } type1; /* type 1 */ 1402 } un; 1403 uint16_t ridacq_vp_port_lo; 1404 uint8_t ridacq_vp_port_hi; 1405 uint8_t ridacq_format; /* 0 or 1 */ 1406 uint16_t ridacq_map[8]; 1407 uint8_t ridacq_reserved1[32]; 1408 } isp_ridacq_t; 1409 1410 #define RIDACQ_STS_COMPLETE 0 1411 #define RIDACQ_STS_UNACQUIRED 1 1412 #define RIDACQ_STS_CHANGED 20 1413 1414 1415 /* 1416 * Simple Name Server Data Structures 1417 */ 1418 #define SNS_GA_NXT 0x100 1419 #define SNS_GPN_ID 0x112 1420 #define SNS_GNN_ID 0x113 1421 #define SNS_GFF_ID 0x11F 1422 #define SNS_GID_FT 0x171 1423 #define SNS_RFT_ID 0x217 1424 typedef struct { 1425 uint16_t snscb_rblen; /* response buffer length (words) */ 1426 uint16_t snscb_reserved0; 1427 uint16_t snscb_addr[4]; /* response buffer address */ 1428 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1429 uint16_t snscb_reserved1; 1430 uint16_t snscb_data[1]; /* variable data */ 1431 } sns_screq_t; /* Subcommand Request Structure */ 1432 1433 typedef struct { 1434 uint16_t snscb_rblen; /* response buffer length (words) */ 1435 uint16_t snscb_reserved0; 1436 uint16_t snscb_addr[4]; /* response buffer address */ 1437 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1438 uint16_t snscb_reserved1; 1439 uint16_t snscb_cmd; 1440 uint16_t snscb_reserved2; 1441 uint32_t snscb_reserved3; 1442 uint32_t snscb_port; 1443 } sns_ga_nxt_req_t; 1444 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1445 1446 typedef struct { 1447 uint16_t snscb_rblen; /* response buffer length (words) */ 1448 uint16_t snscb_reserved0; 1449 uint16_t snscb_addr[4]; /* response buffer address */ 1450 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1451 uint16_t snscb_reserved1; 1452 uint16_t snscb_cmd; 1453 uint16_t snscb_reserved2; 1454 uint32_t snscb_reserved3; 1455 uint32_t snscb_portid; 1456 } sns_gxn_id_req_t; 1457 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1458 1459 typedef struct { 1460 uint16_t snscb_rblen; /* response buffer length (words) */ 1461 uint16_t snscb_reserved0; 1462 uint16_t snscb_addr[4]; /* response buffer address */ 1463 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1464 uint16_t snscb_reserved1; 1465 uint16_t snscb_cmd; 1466 uint16_t snscb_mword_div_2; 1467 uint32_t snscb_reserved3; 1468 uint32_t snscb_fc4_type; 1469 } sns_gid_ft_req_t; 1470 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1471 1472 typedef struct { 1473 uint16_t snscb_rblen; /* response buffer length (words) */ 1474 uint16_t snscb_reserved0; 1475 uint16_t snscb_addr[4]; /* response buffer address */ 1476 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1477 uint16_t snscb_reserved1; 1478 uint16_t snscb_cmd; 1479 uint16_t snscb_reserved2; 1480 uint32_t snscb_reserved3; 1481 uint32_t snscb_port; 1482 uint32_t snscb_fc4_types[8]; 1483 } sns_rft_id_req_t; 1484 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1485 1486 typedef struct { 1487 ct_hdr_t snscb_cthdr; 1488 uint8_t snscb_port_type; 1489 uint8_t snscb_port_id[3]; 1490 uint8_t snscb_portname[8]; 1491 uint16_t snscb_data[1]; /* variable data */ 1492 } sns_scrsp_t; /* Subcommand Response Structure */ 1493 1494 typedef struct { 1495 ct_hdr_t snscb_cthdr; 1496 uint8_t snscb_port_type; 1497 uint8_t snscb_port_id[3]; 1498 uint8_t snscb_portname[8]; 1499 uint8_t snscb_pnlen; /* symbolic port name length */ 1500 uint8_t snscb_pname[255]; /* symbolic port name */ 1501 uint8_t snscb_nodename[8]; 1502 uint8_t snscb_nnlen; /* symbolic node name length */ 1503 uint8_t snscb_nname[255]; /* symbolic node name */ 1504 uint8_t snscb_ipassoc[8]; 1505 uint8_t snscb_ipaddr[16]; 1506 uint8_t snscb_svc_class[4]; 1507 uint8_t snscb_fc4_types[32]; 1508 uint8_t snscb_fpname[8]; 1509 uint8_t snscb_reserved; 1510 uint8_t snscb_hardaddr[3]; 1511 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1512 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1513 1514 typedef struct { 1515 ct_hdr_t snscb_cthdr; 1516 uint8_t snscb_wwn[8]; 1517 } sns_gxn_id_rsp_t; 1518 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1519 1520 typedef struct { 1521 ct_hdr_t snscb_cthdr; 1522 uint32_t snscb_fc4_features[32]; 1523 } sns_gff_id_rsp_t; 1524 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1525 1526 typedef struct { 1527 ct_hdr_t snscb_cthdr; 1528 struct { 1529 uint8_t control; 1530 uint8_t portid[3]; 1531 } snscb_ports[1]; 1532 } sns_gid_ft_rsp_t; 1533 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1534 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1535 1536 /* 1537 * Other Misc Structures 1538 */ 1539 1540 /* ELS Pass Through */ 1541 typedef struct { 1542 isphdr_t els_hdr; 1543 uint32_t els_handle; 1544 uint16_t els_status; 1545 uint16_t els_nphdl; 1546 uint16_t els_xmit_dsd_count; /* outgoing only */ 1547 uint8_t els_vphdl; 1548 uint8_t els_sof; 1549 uint32_t els_rxid; 1550 uint16_t els_recv_dsd_count; /* outgoing only */ 1551 uint8_t els_opcode; 1552 uint8_t els_reserved1; 1553 uint8_t els_did_lo; 1554 uint8_t els_did_mid; 1555 uint8_t els_did_hi; 1556 uint8_t els_reserved2; 1557 uint16_t els_reserved3; 1558 uint16_t els_ctl_flags; 1559 union { 1560 struct { 1561 uint32_t _els_bytecnt; 1562 uint32_t _els_subcode1; 1563 uint32_t _els_subcode2; 1564 uint8_t _els_reserved4[20]; 1565 } in; 1566 struct { 1567 uint32_t _els_recv_bytecnt; 1568 uint32_t _els_xmit_bytecnt; 1569 uint32_t _els_xmit_dsd_length; 1570 uint16_t _els_xmit_dsd_a1500; 1571 uint16_t _els_xmit_dsd_a3116; 1572 uint16_t _els_xmit_dsd_a4732; 1573 uint16_t _els_xmit_dsd_a6348; 1574 uint32_t _els_recv_dsd_length; 1575 uint16_t _els_recv_dsd_a1500; 1576 uint16_t _els_recv_dsd_a3116; 1577 uint16_t _els_recv_dsd_a4732; 1578 uint16_t _els_recv_dsd_a6348; 1579 } out; 1580 } inout; 1581 #define els_bytecnt inout.in._els_bytecnt 1582 #define els_subcode1 inout.in._els_subcode1 1583 #define els_subcode2 inout.in._els_subcode2 1584 #define els_reserved4 inout.in._els_reserved4 1585 #define els_recv_bytecnt inout.out._els_recv_bytecnt 1586 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1587 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1588 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1589 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1590 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1591 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1592 #define els_recv_dsd_length inout.out._els_recv_dsd_length 1593 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1594 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1595 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1596 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1597 } els_t; 1598 1599 /* 1600 * A handy package structure for running FC-SCSI commands internally 1601 */ 1602 typedef struct { 1603 uint16_t handle; 1604 uint16_t lun; 1605 uint32_t 1606 channel : 8, 1607 portid : 24; 1608 uint32_t timeout; 1609 union { 1610 struct { 1611 uint32_t data_length; 1612 uint32_t 1613 no_wait : 1, 1614 do_read : 1; 1615 uint8_t cdb[16]; 1616 void *data_ptr; 1617 } beg; 1618 struct { 1619 uint32_t data_residual; 1620 uint8_t status; 1621 uint8_t pad; 1622 uint16_t sense_length; 1623 uint8_t sense_data[32]; 1624 } end; 1625 } fcd; 1626 } isp_xcmd_t; 1627 1628 /* 1629 * Target Mode related definitions 1630 */ 1631 #define QLTM_SENSELEN 18 /* non-FC cards only */ 1632 #define QLTM_SVALID 0x80 1633 1634 /* 1635 * Structure for Enable Lun and Modify Lun queue entries 1636 */ 1637 typedef struct { 1638 isphdr_t le_header; 1639 uint32_t le_reserved; 1640 uint8_t le_lun; 1641 uint8_t le_rsvd; 1642 uint8_t le_ops; /* Modify LUN only */ 1643 uint8_t le_tgt; /* Not for FC */ 1644 uint32_t le_flags; /* Not for FC */ 1645 uint8_t le_status; 1646 uint8_t le_reserved2; 1647 uint8_t le_cmd_count; 1648 uint8_t le_in_count; 1649 uint8_t le_cdb6len; /* Not for FC */ 1650 uint8_t le_cdb7len; /* Not for FC */ 1651 uint16_t le_timeout; 1652 uint16_t le_reserved3[20]; 1653 } lun_entry_t; 1654 1655 /* 1656 * le_flags values 1657 */ 1658 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1659 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1660 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1661 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1662 1663 /* 1664 * le_ops values 1665 */ 1666 #define LUN_CCINCR 0x01 /* increment command count */ 1667 #define LUN_CCDECR 0x02 /* decrement command count */ 1668 #define LUN_ININCR 0x40 /* increment immed. notify count */ 1669 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 1670 1671 /* 1672 * le_status values 1673 */ 1674 #define LUN_OK 0x01 /* we be rockin' */ 1675 #define LUN_ERR 0x04 /* request completed with error */ 1676 #define LUN_INVAL 0x06 /* invalid request */ 1677 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 1678 #define LUN_ENABLED 0x3E /* LUN already enabled */ 1679 1680 /* 1681 * Immediate Notify Entry structure 1682 */ 1683 #define IN_MSGLEN 8 /* 8 bytes */ 1684 #define IN_RSVDLEN 8 /* 8 words */ 1685 typedef struct { 1686 isphdr_t in_header; 1687 uint32_t in_reserved; 1688 uint8_t in_lun; /* lun */ 1689 uint8_t in_iid; /* initiator */ 1690 uint8_t in_reserved2; 1691 uint8_t in_tgt; /* target */ 1692 uint32_t in_flags; 1693 uint8_t in_status; 1694 uint8_t in_rsvd2; 1695 uint8_t in_tag_val; /* tag value */ 1696 uint8_t in_tag_type; /* tag type */ 1697 uint16_t in_seqid; /* sequence id */ 1698 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1699 uint16_t in_reserved3[IN_RSVDLEN]; 1700 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1701 } in_entry_t; 1702 1703 typedef struct { 1704 isphdr_t in_header; 1705 uint32_t in_reserved; 1706 uint8_t in_lun; /* lun */ 1707 uint8_t in_iid; /* initiator */ 1708 uint16_t in_scclun; 1709 uint32_t in_reserved2; 1710 uint16_t in_status; 1711 uint16_t in_task_flags; 1712 uint16_t in_seqid; /* sequence id */ 1713 } in_fcentry_t; 1714 1715 typedef struct { 1716 isphdr_t in_header; 1717 uint32_t in_reserved; 1718 uint16_t in_iid; /* initiator */ 1719 uint16_t in_scclun; 1720 uint32_t in_reserved2; 1721 uint16_t in_status; 1722 uint16_t in_task_flags; 1723 uint16_t in_seqid; /* sequence id */ 1724 } in_fcentry_e_t; 1725 1726 /* 1727 * Values for the in_status field 1728 */ 1729 #define IN_REJECT 0x0D /* Message Reject message received */ 1730 #define IN_RESET 0x0E /* Bus Reset occurred */ 1731 #define IN_NO_RCAP 0x16 /* requested capability not available */ 1732 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1733 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1734 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1735 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1736 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1737 #define IN_PORT_CHANGED 0x2A /* port changed */ 1738 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1739 #define IN_NO_NEXUS 0x3B /* Nexus not established */ 1740 1741 /* 1742 * Values for the in_task_flags field- should only get one at a time! 1743 */ 1744 #define TASK_FLAGS_RESERVED_MASK (0xe700) 1745 #define TASK_FLAGS_CLEAR_ACA (1<<14) 1746 #define TASK_FLAGS_TARGET_RESET (1<<13) 1747 #define TASK_FLAGS_LUN_RESET (1<<12) 1748 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1749 #define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1750 1751 /* 1752 * ISP24XX Immediate Notify 1753 */ 1754 typedef struct { 1755 isphdr_t in_header; 1756 uint32_t in_reserved; 1757 uint16_t in_nphdl; 1758 uint16_t in_reserved1; 1759 uint16_t in_flags; 1760 uint16_t in_srr_rxid; 1761 uint16_t in_status; 1762 uint8_t in_status_subcode; 1763 uint8_t in_reserved2; 1764 uint32_t in_rxid; 1765 uint16_t in_srr_reloff_lo; 1766 uint16_t in_srr_reloff_hi; 1767 uint16_t in_srr_iu; 1768 uint16_t in_srr_oxid; 1769 /* 1770 * If bit 2 is set in in_flags, the following 1771 * two tags are valid. If the received ELS is 1772 * a LOGO, then these tags contain the N Port ID 1773 * from the LOGO payload. If the received ELS 1774 * request is TPRLO, these tags contain the 1775 * Third Party Originator N Port ID. 1776 */ 1777 uint16_t in_nport_id_hi; 1778 uint8_t in_nport_id_lo; 1779 uint8_t in_reserved3; 1780 /* 1781 * If bit 2 is set in in_flags, the following 1782 * tag is valid. If the received ELS is a LOGO, 1783 * then this tag contains the n-port handle 1784 * from the LOGO payload. If the received ELS 1785 * request is TPRLO, this tag contain the 1786 * n-port handle for the Third Party Originator. 1787 */ 1788 uint16_t in_np_handle; 1789 uint8_t in_reserved4[12]; 1790 uint8_t in_reserved5; 1791 uint8_t in_vpidx; 1792 uint32_t in_reserved6; 1793 uint16_t in_portid_lo; 1794 uint8_t in_portid_hi; 1795 uint8_t in_reserved7; 1796 uint16_t in_reserved8; 1797 uint16_t in_oxid; 1798 } in_fcentry_24xx_t; 1799 1800 #define IN24XX_FLAG_PUREX_IOCB 0x1 1801 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1802 #define IN24XX_FLAG_NPHDL_VALID 0x4 1803 1804 #define IN24XX_LIP_RESET 0x0E 1805 #define IN24XX_LINK_RESET 0x0F 1806 #define IN24XX_PORT_LOGOUT 0x29 1807 #define IN24XX_PORT_CHANGED 0x2A 1808 #define IN24XX_LINK_FAILED 0x2E 1809 #define IN24XX_SRR_RCVD 0x45 1810 #define IN24XX_ELS_RCVD 0x46 /* 1811 * login-affectin ELS received- check 1812 * subcode for specific opcode 1813 */ 1814 1815 /* 1816 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1817 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1818 * Big Endian format. 1819 */ 1820 #define IN24XX_PLOGI_WWNN_OFF 0x20 1821 #define IN24XX_PLOGI_WWPN_OFF 0x28 1822 1823 /* 1824 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1825 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1826 */ 1827 #define IN24XX_LOGO_WWPN_OFF 0x28 1828 1829 /* 1830 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1831 */ 1832 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1833 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1834 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1835 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1836 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1837 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1838 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1839 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1840 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1841 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1842 1843 /* 1844 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1845 */ 1846 #define IN24XX_PORT_CHANGED_BADFAN 0x00 1847 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1848 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1849 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1850 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1851 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1852 1853 /* 1854 * Notify Acknowledge Entry structure 1855 */ 1856 #define NA_RSVDLEN 22 1857 typedef struct { 1858 isphdr_t na_header; 1859 uint32_t na_reserved; 1860 uint8_t na_lun; /* lun */ 1861 uint8_t na_iid; /* initiator */ 1862 uint8_t na_reserved2; 1863 uint8_t na_tgt; /* target */ 1864 uint32_t na_flags; 1865 uint8_t na_status; 1866 uint8_t na_event; 1867 uint16_t na_seqid; /* sequence id */ 1868 uint16_t na_reserved3[NA_RSVDLEN]; 1869 } na_entry_t; 1870 1871 /* 1872 * Value for the na_event field 1873 */ 1874 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 1875 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 1876 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 1877 1878 #define NA2_RSVDLEN 21 1879 typedef struct { 1880 isphdr_t na_header; 1881 uint32_t na_reserved; 1882 uint8_t na_reserved1; 1883 uint8_t na_iid; /* initiator loop id */ 1884 uint16_t na_response; 1885 uint16_t na_flags; 1886 uint16_t na_reserved2; 1887 uint16_t na_status; 1888 uint16_t na_task_flags; 1889 uint16_t na_seqid; /* sequence id */ 1890 uint16_t na_reserved3[NA2_RSVDLEN]; 1891 } na_fcentry_t; 1892 1893 typedef struct { 1894 isphdr_t na_header; 1895 uint32_t na_reserved; 1896 uint16_t na_iid; /* initiator loop id */ 1897 uint16_t na_response; /* response code */ 1898 uint16_t na_flags; 1899 uint16_t na_reserved2; 1900 uint16_t na_status; 1901 uint16_t na_task_flags; 1902 uint16_t na_seqid; /* sequence id */ 1903 uint16_t na_reserved3[NA2_RSVDLEN]; 1904 } na_fcentry_e_t; 1905 1906 #define NAFC_RCOUNT 0x80 /* increment resource count */ 1907 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 1908 #define NAFC_TVALID 0x10 /* task mangement response code is valid */ 1909 1910 /* 1911 * ISP24XX Notify Acknowledge 1912 */ 1913 1914 typedef struct { 1915 isphdr_t na_header; 1916 uint32_t na_handle; 1917 uint16_t na_nphdl; 1918 uint16_t na_reserved1; 1919 uint16_t na_flags; 1920 uint16_t na_srr_rxid; 1921 uint16_t na_status; 1922 uint8_t na_status_subcode; 1923 uint8_t na_reserved2; 1924 uint32_t na_rxid; 1925 uint16_t na_srr_reloff_lo; 1926 uint16_t na_srr_reloff_hi; 1927 uint16_t na_srr_iu; 1928 uint16_t na_srr_flags; 1929 uint8_t na_reserved3[18]; 1930 uint8_t na_reserved4; 1931 uint8_t na_vpidx; 1932 uint8_t na_srr_reject_vunique; 1933 uint8_t na_srr_reject_explanation; 1934 uint8_t na_srr_reject_code; 1935 uint8_t na_reserved5; 1936 uint8_t na_reserved6[6]; 1937 uint16_t na_oxid; 1938 } na_fcentry_24xx_t; 1939 1940 /* 1941 * Accept Target I/O Entry structure 1942 */ 1943 #define ATIO_CDBLEN 26 1944 1945 typedef struct { 1946 isphdr_t at_header; 1947 uint16_t at_reserved; 1948 uint16_t at_handle; 1949 uint8_t at_lun; /* lun */ 1950 uint8_t at_iid; /* initiator */ 1951 uint8_t at_cdblen; /* cdb length */ 1952 uint8_t at_tgt; /* target */ 1953 uint32_t at_flags; 1954 uint8_t at_status; /* firmware status */ 1955 uint8_t at_scsi_status; /* scsi status */ 1956 uint8_t at_tag_val; /* tag value */ 1957 uint8_t at_tag_type; /* tag type */ 1958 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 1959 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 1960 } at_entry_t; 1961 1962 /* 1963 * at_flags values 1964 */ 1965 #define AT_NODISC 0x00008000 /* disconnect disabled */ 1966 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 1967 1968 /* 1969 * at_status values 1970 */ 1971 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 1972 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 1973 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 1974 #define AT_NOCAP 0x16 /* Requested capability not available */ 1975 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 1976 #define AT_CDB 0x3D /* CDB received */ 1977 /* 1978 * Macros to create and fetch and test concatenated handle and tag value macros 1979 * (SPI only) 1980 */ 1981 #define AT_MAKE_TAGID(tid, aep) \ 1982 tid = aep->at_handle; \ 1983 if (aep->at_flags & AT_TQAE) { \ 1984 tid |= (aep->at_tag_val << 16); \ 1985 tid |= (1 << 24); \ 1986 } 1987 1988 #define CT_MAKE_TAGID(tid, ct) \ 1989 tid = ct->ct_fwhandle; \ 1990 if (ct->ct_flags & CT_TQAE) { \ 1991 tid |= (ct->ct_tag_val << 16); \ 1992 tid |= (1 << 24); \ 1993 } 1994 1995 #define AT_HAS_TAG(val) ((val) & (1 << 24)) 1996 #define AT_GET_TAG(val) (((val) >> 16) & 0xff) 1997 #define AT_GET_HANDLE(val) ((val) & 0xffff) 1998 1999 #define IN_MAKE_TAGID(tid, inp) \ 2000 tid = inp->in_seqid; \ 2001 tid |= (inp->in_tag_val << 16); \ 2002 tid |= (1 << 24) 2003 2004 /* 2005 * Accept Target I/O Entry structure, Type 2 2006 */ 2007 #define ATIO2_CDBLEN 16 2008 2009 typedef struct { 2010 isphdr_t at_header; 2011 uint32_t at_reserved; 2012 uint8_t at_lun; /* lun or reserved */ 2013 uint8_t at_iid; /* initiator */ 2014 uint16_t at_rxid; /* response ID */ 2015 uint16_t at_flags; 2016 uint16_t at_status; /* firmware status */ 2017 uint8_t at_crn; /* command reference number */ 2018 uint8_t at_taskcodes; 2019 uint8_t at_taskflags; 2020 uint8_t at_execodes; 2021 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2022 uint32_t at_datalen; /* allocated data len */ 2023 uint16_t at_scclun; /* SCC Lun or reserved */ 2024 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2025 uint16_t at_reserved2[6]; 2026 uint16_t at_oxid; 2027 } at2_entry_t; 2028 2029 typedef struct { 2030 isphdr_t at_header; 2031 uint32_t at_reserved; 2032 uint16_t at_iid; /* initiator */ 2033 uint16_t at_rxid; /* response ID */ 2034 uint16_t at_flags; 2035 uint16_t at_status; /* firmware status */ 2036 uint8_t at_crn; /* command reference number */ 2037 uint8_t at_taskcodes; 2038 uint8_t at_taskflags; 2039 uint8_t at_execodes; 2040 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2041 uint32_t at_datalen; /* allocated data len */ 2042 uint16_t at_scclun; /* SCC Lun or reserved */ 2043 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2044 uint16_t at_reserved2[6]; 2045 uint16_t at_oxid; 2046 } at2e_entry_t; 2047 2048 #define ATIO2_WWPN_OFFSET 0x2A 2049 #define ATIO2_OXID_OFFSET 0x3E 2050 2051 #define ATIO2_TC_ATTR_MASK 0x7 2052 #define ATIO2_TC_ATTR_SIMPLEQ 0 2053 #define ATIO2_TC_ATTR_HEADOFQ 1 2054 #define ATIO2_TC_ATTR_ORDERED 2 2055 #define ATIO2_TC_ATTR_ACAQ 4 2056 #define ATIO2_TC_ATTR_UNTAGGED 5 2057 2058 #define ATIO2_EX_WRITE 0x1 2059 #define ATIO2_EX_READ 0x2 2060 /* 2061 * Macros to create and fetch and test concatenated handle and tag value macros 2062 */ 2063 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2064 tid = aep->at_rxid; \ 2065 tid |= (((uint64_t)inst) << 32); \ 2066 tid |= (((uint64_t)bus) << 48) 2067 2068 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2069 tid = ct->ct_rxid; \ 2070 tid |= (((uint64_t)inst) << 32); \ 2071 tid |= (((uint64_t)(bus & 0xff)) << 48) 2072 2073 #define AT2_HAS_TAG(val) 1 2074 #define AT2_GET_TAG(val) ((val) & 0xffffffff) 2075 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2076 #define AT2_GET_HANDLE AT2_GET_TAG 2077 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2078 2079 #define FC_HAS_TAG AT2_HAS_TAG 2080 #define FC_GET_TAG AT2_GET_TAG 2081 #define FC_GET_INST AT2_GET_INST 2082 #define FC_GET_HANDLE AT2_GET_HANDLE 2083 2084 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2085 tid = seqid; \ 2086 tid |= (((uint64_t)inst) << 32); \ 2087 tid |= (((uint64_t)(bus & 0xff)) << 48) 2088 2089 #define FC_TAG_INSERT_INST(tid, inst) \ 2090 tid &= ~0x0000ffff00000000ull; \ 2091 tid |= (((uint64_t)inst) << 32) 2092 2093 /* 2094 * 24XX ATIO Definition 2095 * 2096 * This is *quite* different from other entry types. 2097 * First of all, it has its own queue it comes in on. 2098 * 2099 * Secondly, it doesn't have a normal header. 2100 * 2101 * Thirdly, it's just a passthru of the FCP CMND IU 2102 * which is recorded in big endian mode. 2103 */ 2104 typedef struct { 2105 uint8_t at_type; 2106 uint8_t at_count; 2107 /* 2108 * Task attribute in high four bits, 2109 * the rest is the FCP CMND IU Length. 2110 * NB: the command can extend past the 2111 * length for a single queue entry. 2112 */ 2113 uint16_t at_ta_len; 2114 uint32_t at_rxid; 2115 fc_hdr_t at_hdr; 2116 fcp_cmnd_iu_t at_cmnd; 2117 } at7_entry_t; 2118 #define AT7_NORESRC_RXID 0xffffffff 2119 2120 2121 /* 2122 * Continue Target I/O Entry structure 2123 * Request from driver. The response from the 2124 * ISP firmware is the same except that the last 18 2125 * bytes are overwritten by suggested sense data if 2126 * the 'autosense valid' bit is set in the status byte. 2127 */ 2128 typedef struct { 2129 isphdr_t ct_header; 2130 uint16_t ct_syshandle; 2131 uint16_t ct_fwhandle; /* required by f/w */ 2132 uint8_t ct_lun; /* lun */ 2133 uint8_t ct_iid; /* initiator id */ 2134 uint8_t ct_reserved2; 2135 uint8_t ct_tgt; /* our target id */ 2136 uint32_t ct_flags; 2137 uint8_t ct_status; /* isp status */ 2138 uint8_t ct_scsi_status; /* scsi status */ 2139 uint8_t ct_tag_val; /* tag value */ 2140 uint8_t ct_tag_type; /* tag type */ 2141 uint32_t ct_xfrlen; /* transfer length */ 2142 int32_t ct_resid; /* residual length */ 2143 uint16_t ct_timeout; 2144 uint16_t ct_seg_count; 2145 ispds_t ct_dataseg[ISP_RQDSEG]; 2146 } ct_entry_t; 2147 2148 /* 2149 * For some of the dual port SCSI adapters, port (bus #) is reported 2150 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2151 * 2152 * Note that this does not apply to FC adapters at all which can and 2153 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2154 * that have logged in across a SCSI fabric. 2155 */ 2156 #define GET_IID_VAL(x) (x & 0x3f) 2157 #define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2158 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2159 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2160 2161 /* 2162 * ct_flags values 2163 */ 2164 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2165 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction */ 2166 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction */ 2167 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2168 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2169 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2170 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2171 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2172 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2173 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2174 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2175 2176 /* 2177 * ct_status values 2178 * - set by the firmware when it returns the CTIO 2179 */ 2180 #define CT_OK 0x01 /* completed without error */ 2181 #define CT_ABORTED 0x02 /* aborted by host */ 2182 #define CT_ERR 0x04 /* see sense data for error */ 2183 #define CT_INVAL 0x06 /* request for disabled lun */ 2184 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 2185 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2186 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2187 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2188 #define CT_TIMEOUT 0x0B /* timed out */ 2189 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2190 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2191 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2192 #define CT_PANIC 0x13 /* Unrecoverable Error */ 2193 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2194 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2195 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2196 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2197 #define CT_PORTUNAVAIL 0x28 /* port not available */ 2198 #define CT_LOGOUT 0x29 /* port logout */ 2199 #define CT_PORTCHANGED 0x2A /* port changed */ 2200 #define CT_IDE 0x33 /* Initiator Detected Error */ 2201 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2202 #define CT_SRR 0x45 /* SRR Received */ 2203 #define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2204 2205 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2206 2207 /* 2208 * When the firmware returns a CTIO entry, it may overwrite the last 2209 * part of the structure with sense data. This starts at offset 0x2E 2210 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2211 * than define a new struct for this, I'm just using the sense data 2212 * offset. 2213 */ 2214 #define CTIO_SENSE_OFFSET 0x2E 2215 2216 /* 2217 * Entry length in u_longs. All entries are the same size so 2218 * any one will do as the numerator. 2219 */ 2220 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2221 2222 /* 2223 * QLA2100 CTIO (type 2) entry 2224 */ 2225 #define MAXRESPLEN 26 2226 typedef struct { 2227 isphdr_t ct_header; 2228 uint32_t ct_syshandle; 2229 uint8_t ct_lun; /* lun */ 2230 uint8_t ct_iid; /* initiator id */ 2231 uint16_t ct_rxid; /* response ID */ 2232 uint16_t ct_flags; 2233 uint16_t ct_status; /* isp status */ 2234 uint16_t ct_timeout; 2235 uint16_t ct_seg_count; 2236 uint32_t ct_reloff; /* relative offset */ 2237 int32_t ct_resid; /* residual length */ 2238 union { 2239 /* 2240 * The three different modes that the target driver 2241 * can set the CTIO{2,3,4} up as. 2242 * 2243 * The first is for sending FCP_DATA_IUs as well as 2244 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2245 * 2246 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2247 * Note that no FCP_DATA_IUs will be sent. 2248 * 2249 * The third is for sending FCP_RSP_IUs as built specifically 2250 * in system memory as located by the isp_dataseg. 2251 */ 2252 struct { 2253 uint32_t _reserved; 2254 uint16_t _reserved2; 2255 uint16_t ct_scsi_status; 2256 uint32_t ct_xfrlen; 2257 union { 2258 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2259 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2260 ispdslist_t ct_dslist; 2261 } u; 2262 } m0; 2263 struct { 2264 uint16_t _reserved; 2265 uint16_t _reserved2; 2266 uint16_t ct_senselen; 2267 uint16_t ct_scsi_status; 2268 uint16_t ct_resplen; 2269 uint8_t ct_resp[MAXRESPLEN]; 2270 } m1; 2271 struct { 2272 uint32_t _reserved; 2273 uint16_t _reserved2; 2274 uint16_t _reserved3; 2275 uint32_t ct_datalen; 2276 ispds_t ct_fcp_rsp_iudata; 2277 } m2; 2278 } rsp; 2279 } ct2_entry_t; 2280 2281 typedef struct { 2282 isphdr_t ct_header; 2283 uint32_t ct_syshandle; 2284 uint16_t ct_iid; /* initiator id */ 2285 uint16_t ct_rxid; /* response ID */ 2286 uint16_t ct_flags; 2287 uint16_t ct_status; /* isp status */ 2288 uint16_t ct_timeout; 2289 uint16_t ct_seg_count; 2290 uint32_t ct_reloff; /* relative offset */ 2291 int32_t ct_resid; /* residual length */ 2292 union { 2293 struct { 2294 uint32_t _reserved; 2295 uint16_t _reserved2; 2296 uint16_t ct_scsi_status; 2297 uint32_t ct_xfrlen; 2298 union { 2299 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2300 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2301 ispdslist_t ct_dslist; 2302 } u; 2303 } m0; 2304 struct { 2305 uint16_t _reserved; 2306 uint16_t _reserved2; 2307 uint16_t ct_senselen; 2308 uint16_t ct_scsi_status; 2309 uint16_t ct_resplen; 2310 uint8_t ct_resp[MAXRESPLEN]; 2311 } m1; 2312 struct { 2313 uint32_t _reserved; 2314 uint16_t _reserved2; 2315 uint16_t _reserved3; 2316 uint32_t ct_datalen; 2317 ispds_t ct_fcp_rsp_iudata; 2318 } m2; 2319 } rsp; 2320 } ct2e_entry_t; 2321 2322 /* 2323 * ct_flags values for CTIO2 2324 */ 2325 #define CT2_FLAG_MODE0 0x0000 2326 #define CT2_FLAG_MODE1 0x0001 2327 #define CT2_FLAG_MODE2 0x0002 2328 #define CT2_FLAG_MMASK 0x0003 2329 #define CT2_DATA_IN 0x0040 2330 #define CT2_DATA_OUT 0x0080 2331 #define CT2_NO_DATA 0x00C0 2332 #define CT2_DATAMASK 0x00C0 2333 #define CT2_CCINCR 0x0100 2334 #define CT2_FASTPOST 0x0200 2335 #define CT2_CONFIRM 0x2000 2336 #define CT2_TERMINATE 0x4000 2337 #define CT2_SENDSTATUS 0x8000 2338 2339 /* 2340 * ct_status values are (mostly) the same as that for ct_entry. 2341 */ 2342 2343 /* 2344 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2345 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2346 * fields. 2347 */ 2348 #define CT2_RSPLEN_VALID 0x0100 2349 #define CT2_SNSLEN_VALID 0x0200 2350 #define CT2_DATA_OVER 0x0400 2351 #define CT2_DATA_UNDER 0x0800 2352 2353 /* 2354 * ISP24XX CTIO 2355 */ 2356 #define MAXRESPLEN_24XX 24 2357 typedef struct { 2358 isphdr_t ct_header; 2359 uint32_t ct_syshandle; 2360 uint16_t ct_nphdl; /* status on returned CTIOs */ 2361 uint16_t ct_timeout; 2362 uint16_t ct_seg_count; 2363 uint8_t ct_vpidx; 2364 uint8_t ct_xflags; 2365 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2366 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2367 uint8_t ct_reserved; 2368 uint32_t ct_rxid; 2369 uint16_t ct_senselen; /* mode 1 only */ 2370 uint16_t ct_flags; 2371 int32_t ct_resid; /* residual length */ 2372 uint16_t ct_oxid; 2373 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2374 union { 2375 struct { 2376 uint32_t reloff; 2377 uint32_t reserved0; 2378 uint32_t ct_xfrlen; 2379 uint32_t reserved1; 2380 ispds64_t ds; 2381 } m0; 2382 struct { 2383 uint16_t ct_resplen; 2384 uint16_t reserved; 2385 uint8_t ct_resp[MAXRESPLEN_24XX]; 2386 } m1; 2387 struct { 2388 uint32_t reserved0; 2389 uint32_t ct_datalen; 2390 uint32_t reserved1; 2391 ispds64_t ct_fcp_rsp_iudata; 2392 } m2; 2393 } rsp; 2394 } ct7_entry_t; 2395 2396 /* 2397 * ct_flags values for CTIO7 2398 */ 2399 #define CT7_DATA_IN 0x0002 2400 #define CT7_DATA_OUT 0x0001 2401 #define CT7_NO_DATA 0x0000 2402 #define CT7_DATAMASK 0x003 2403 #define CT7_DSD_ENABLE 0x0004 2404 #define CT7_CONF_STSFD 0x0010 2405 #define CT7_EXPLCT_CONF 0x0020 2406 #define CT7_FLAG_MODE0 0x0000 2407 #define CT7_FLAG_MODE1 0x0040 2408 #define CT7_FLAG_MODE2 0x0080 2409 #define CT7_FLAG_MMASK 0x00C0 2410 #define CT7_NOACK 0x0100 2411 #define CT7_TASK_ATTR_SHIFT 9 2412 #define CT7_CONFIRM 0x2000 2413 #define CT7_TERMINATE 0x4000 2414 #define CT7_SENDSTATUS 0x8000 2415 2416 /* 2417 * Type 7 CTIO status codes 2418 */ 2419 #define CT7_OK 0x01 /* completed without error */ 2420 #define CT7_ABORTED 0x02 /* aborted by host */ 2421 #define CT7_ERR 0x04 /* see sense data for error */ 2422 #define CT7_INVAL 0x06 /* request for disabled lun */ 2423 #define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2424 #define CT7_DATA_OVER 0x09 /* Data Overrun */ 2425 #define CT7_TIMEOUT 0x0B /* timed out */ 2426 #define CT7_RESET 0x0E /* LIP Rset Received */ 2427 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2428 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2429 #define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2430 #define CT7_PORTUNAVAIL 0x28 /* port not available */ 2431 #define CT7_LOGOUT 0x29 /* port logout */ 2432 #define CT7_PORTCHANGED 0x2A /* port changed */ 2433 #define CT7_SRR 0x45 /* SRR Received */ 2434 2435 /* 2436 * Other 24XX related target IOCBs 2437 */ 2438 2439 /* 2440 * ABTS Received 2441 */ 2442 typedef struct { 2443 isphdr_t abts_header; 2444 uint8_t abts_reserved0[6]; 2445 uint16_t abts_nphdl; 2446 uint16_t abts_reserved1; 2447 uint16_t abts_sof; 2448 uint32_t abts_rxid_abts; 2449 uint16_t abts_did_lo; 2450 uint8_t abts_did_hi; 2451 uint8_t abts_r_ctl; 2452 uint16_t abts_sid_lo; 2453 uint8_t abts_sid_hi; 2454 uint8_t abts_cs_ctl; 2455 uint16_t abts_fs_ctl; 2456 uint8_t abts_f_ctl; 2457 uint8_t abts_type; 2458 uint16_t abts_seq_cnt; 2459 uint8_t abts_df_ctl; 2460 uint8_t abts_seq_id; 2461 uint16_t abts_rx_id; 2462 uint16_t abts_ox_id; 2463 uint32_t abts_param; 2464 uint8_t abts_reserved2[16]; 2465 uint32_t abts_rxid_task; 2466 } abts_t; 2467 2468 typedef struct { 2469 isphdr_t abts_rsp_header; 2470 uint32_t abts_rsp_handle; 2471 uint16_t abts_rsp_status; 2472 uint16_t abts_rsp_nphdl; 2473 uint16_t abts_rsp_ctl_flags; 2474 uint16_t abts_rsp_sof; 2475 uint32_t abts_rsp_rxid_abts; 2476 uint16_t abts_rsp_did_lo; 2477 uint8_t abts_rsp_did_hi; 2478 uint8_t abts_rsp_r_ctl; 2479 uint16_t abts_rsp_sid_lo; 2480 uint8_t abts_rsp_sid_hi; 2481 uint8_t abts_rsp_cs_ctl; 2482 uint16_t abts_rsp_f_ctl_lo; 2483 uint8_t abts_rsp_f_ctl_hi; 2484 uint8_t abts_rsp_type; 2485 uint16_t abts_rsp_seq_cnt; 2486 uint8_t abts_rsp_df_ctl; 2487 uint8_t abts_rsp_seq_id; 2488 uint16_t abts_rsp_rx_id; 2489 uint16_t abts_rsp_ox_id; 2490 uint32_t abts_rsp_param; 2491 union { 2492 struct { 2493 uint16_t reserved; 2494 uint8_t last_seq_id; 2495 uint8_t seq_id_valid; 2496 uint16_t aborted_rx_id; 2497 uint16_t aborted_ox_id; 2498 uint16_t high_seq_cnt; 2499 uint16_t low_seq_cnt; 2500 uint8_t reserved2[4]; 2501 } ba_acc; 2502 struct { 2503 uint8_t vendor_unique; 2504 uint8_t explanation; 2505 uint8_t reason; 2506 uint8_t reserved; 2507 uint8_t reserved2[12]; 2508 } ba_rjt; 2509 struct { 2510 uint8_t reserved[8]; 2511 uint32_t subcode1; 2512 uint32_t subcode2; 2513 } rsp; 2514 uint8_t reserved[16]; 2515 } abts_rsp_payload; 2516 uint32_t abts_rsp_rxid_task; 2517 } abts_rsp_t; 2518 2519 /* terminate this ABTS exchange */ 2520 #define ISP24XX_ABTS_RSP_TERMINATE 0x01 2521 2522 #define ISP24XX_ABTS_RSP_COMPLETE 0x00 2523 #define ISP24XX_ABTS_RSP_RESET 0x04 2524 #define ISP24XX_ABTS_RSP_ABORTED 0x05 2525 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2526 #define ISP24XX_ABTS_RSP_INVXID 0x08 2527 #define ISP24XX_ABTS_RSP_LOGOUT 0x29 2528 #define ISP24XX_ABTS_RSP_SUBCODE 0x31 2529 2530 #define ISP24XX_NO_TASK 0xffffffff 2531 2532 /* 2533 * Miscellaneous 2534 * 2535 * These are the limits of the number of dma segments we 2536 * can deal with based not on the size of the segment counter 2537 * (which is 16 bits), but on the size of the number of 2538 * queue entries field (which is 8 bits). We assume no 2539 * segments in the first queue entry, so we can either 2540 * have 7 dma segments per continuation entry or 5 2541 * (for 64 bit dma).. multiplying out by 254.... 2542 */ 2543 #define ISP_NSEG_MAX 1778 2544 #define ISP_NSEG64_MAX 1270 2545 2546 #endif /* _ISPMBOX_H */ 2547
Indexes created Fri Sep 26 08:10:20 GMT 2025