ispmbox.h revision 1.54
1 /* $NetBSD: ispmbox.h,v 1.54 2010/01/03 02:47:10 mjacob Exp $ */ 2 /* 3 * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration 4 * All rights reserved. 5 * 6 * Additional Copyright (C) 2000-2007 by Matthew Jacob 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /* 32 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 33 */ 34 #ifndef _ISPMBOX_H 35 #define _ISPMBOX_H 36 37 /* 38 * Mailbox Command Opcodes 39 */ 40 #define MBOX_NO_OP 0x0000 41 #define MBOX_LOAD_RAM 0x0001 42 #define MBOX_EXEC_FIRMWARE 0x0002 43 #define MBOX_DUMP_RAM 0x0003 44 #define MBOX_WRITE_RAM_WORD 0x0004 45 #define MBOX_READ_RAM_WORD 0x0005 46 #define MBOX_MAILBOX_REG_TEST 0x0006 47 #define MBOX_VERIFY_CHECKSUM 0x0007 48 #define MBOX_ABOUT_FIRMWARE 0x0008 49 #define MBOX_LOAD_RISC_RAM_2100 0x0009 50 /* a */ 51 #define MBOX_LOAD_RISC_RAM 0x000b 52 /* c */ 53 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 54 #define MBOX_CHECK_FIRMWARE 0x000e 55 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f 56 #define MBOX_INIT_REQ_QUEUE 0x0010 57 #define MBOX_INIT_RES_QUEUE 0x0011 58 #define MBOX_EXECUTE_IOCB 0x0012 59 #define MBOX_WAKE_UP 0x0013 60 #define MBOX_STOP_FIRMWARE 0x0014 61 #define MBOX_ABORT 0x0015 62 #define MBOX_ABORT_DEVICE 0x0016 63 #define MBOX_ABORT_TARGET 0x0017 64 #define MBOX_BUS_RESET 0x0018 65 #define MBOX_STOP_QUEUE 0x0019 66 #define MBOX_START_QUEUE 0x001a 67 #define MBOX_SINGLE_STEP_QUEUE 0x001b 68 #define MBOX_ABORT_QUEUE 0x001c 69 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 70 /* 1e */ 71 #define MBOX_GET_FIRMWARE_STATUS 0x001f 72 #define MBOX_GET_INIT_SCSI_ID 0x0020 73 #define MBOX_GET_SELECT_TIMEOUT 0x0021 74 #define MBOX_GET_RETRY_COUNT 0x0022 75 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 76 #define MBOX_GET_CLOCK_RATE 0x0024 77 #define MBOX_GET_ACT_NEG_STATE 0x0025 78 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 79 #define MBOX_GET_SBUS_PARAMS 0x0027 80 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 81 #define MBOX_GET_TARGET_PARAMS 0x0028 82 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 83 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 84 /* 2b */ 85 /* 2c */ 86 /* 2d */ 87 /* 2e */ 88 /* 2f */ 89 #define MBOX_SET_INIT_SCSI_ID 0x0030 90 #define MBOX_SET_SELECT_TIMEOUT 0x0031 91 #define MBOX_SET_RETRY_COUNT 0x0032 92 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 93 #define MBOX_SET_CLOCK_RATE 0x0034 94 #define MBOX_SET_ACT_NEG_STATE 0x0035 95 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 96 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 97 #define MBOX_SET_PCI_PARAMETERS 0x0037 98 #define MBOX_SET_TARGET_PARAMS 0x0038 99 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 100 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 101 /* 3b */ 102 /* 3c */ 103 /* 3d */ 104 /* 3e */ 105 /* 3f */ 106 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 107 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 108 #define MBOX_EXEC_BIOS_IOCB 0x0042 109 #define MBOX_SET_FW_FEATURES 0x004a 110 #define MBOX_GET_FW_FEATURES 0x004b 111 #define FW_FEATURE_FAST_POST 0x1 112 #define FW_FEATURE_LVD_NOTIFY 0x2 113 #define FW_FEATURE_RIO_32BIT 0x4 114 #define FW_FEATURE_RIO_16BIT 0x8 115 116 #define MBOX_INIT_REQ_QUEUE_A64 0x0052 117 #define MBOX_INIT_RES_QUEUE_A64 0x0053 118 119 #define MBOX_ENABLE_TARGET_MODE 0x0055 120 #define ENABLE_TARGET_FLAG 0x8000 121 #define ENABLE_TQING_FLAG 0x0004 122 #define ENABLE_MANDATORY_DISC 0x0002 123 #define MBOX_GET_TARGET_STATUS 0x0056 124 125 /* These are for the ISP2X00 FC cards */ 126 #define MBOX_GET_LOOP_ID 0x0020 127 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 128 #define ISP24XX_INORDER 0x0100 129 #define ISP24XX_NPIV_SAN 0x0400 130 #define ISP24XX_VSAN_SAN 0x1000 131 #define ISP24XX_FC_SP_SAN 0x2000 132 133 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 134 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 135 #define MBOX_GET_RESOURCE_COUNT 0x0042 136 #define MBOX_REQUEST_OFFLINE_MODE 0x0043 137 #define MBOX_ENHANCED_GET_PDB 0x0047 138 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 139 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 140 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 141 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 142 #define MBOX_INIT_FIRMWARE 0x0060 143 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 144 #define MBOX_INIT_LIP 0x0062 145 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 146 #define MBOX_GET_PORT_DB 0x0064 147 #define MBOX_CLEAR_ACA 0x0065 148 #define MBOX_TARGET_RESET 0x0066 149 #define MBOX_CLEAR_TASK_SET 0x0067 150 #define MBOX_ABORT_TASK_SET 0x0068 151 #define MBOX_GET_FW_STATE 0x0069 152 #define MBOX_GET_PORT_NAME 0x006A 153 #define MBOX_GET_LINK_STATUS 0x006B 154 #define MBOX_INIT_LIP_RESET 0x006C 155 #define MBOX_SEND_SNS 0x006E 156 #define MBOX_FABRIC_LOGIN 0x006F 157 #define MBOX_SEND_CHANGE_REQUEST 0x0070 158 #define MBOX_FABRIC_LOGOUT 0x0071 159 #define MBOX_INIT_LIP_LOGIN 0x0072 160 #define MBOX_LUN_RESET 0x007E 161 162 #define MBOX_DRIVER_HEARTBEAT 0x005B 163 #define MBOX_FW_HEARTBEAT 0x005C 164 165 #define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 166 #define MBGSD_GET_RATE 0 167 #define MBGSD_SET_RATE 1 168 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 169 #define MBGSD_ONEGB 0 170 #define MBGSD_TWOGB 1 171 #define MBGSD_AUTO 2 172 #define MBGSD_FOURGB 3 /* 24XX only */ 173 #define MBGSD_EIGHTGB 4 /* 25XX only */ 174 175 176 #define ISP2100_SET_PCI_PARAM 0x00ff 177 178 #define MBOX_BUSY 0x04 179 180 /* 181 * Mailbox Command Complete Status Codes 182 */ 183 #define MBOX_COMMAND_COMPLETE 0x4000 184 #define MBOX_INVALID_COMMAND 0x4001 185 #define MBOX_HOST_INTERFACE_ERROR 0x4002 186 #define MBOX_TEST_FAILED 0x4003 187 #define MBOX_COMMAND_ERROR 0x4005 188 #define MBOX_COMMAND_PARAM_ERROR 0x4006 189 #define MBOX_PORT_ID_USED 0x4007 190 #define MBOX_LOOP_ID_USED 0x4008 191 #define MBOX_ALL_IDS_USED 0x4009 192 #define MBOX_NOT_LOGGED_IN 0x400A 193 /* pseudo mailbox completion codes */ 194 #define MBOX_REGS_BUSY 0x6000 /* registers in use */ 195 #define MBOX_TIMEOUT 0x6001 /* command timed out */ 196 197 #define MBLOGALL 0x000f 198 #define MBLOGNONE 0x0000 199 #define MBLOGMASK(x) ((x) & 0xf) 200 201 /* 202 * Asynchronous event status codes 203 */ 204 #define ASYNC_BUS_RESET 0x8001 205 #define ASYNC_SYSTEM_ERROR 0x8002 206 #define ASYNC_RQS_XFER_ERR 0x8003 207 #define ASYNC_RSP_XFER_ERR 0x8004 208 #define ASYNC_QWAKEUP 0x8005 209 #define ASYNC_TIMEOUT_RESET 0x8006 210 #define ASYNC_DEVICE_RESET 0x8007 211 #define ASYNC_EXTMSG_UNDERRUN 0x800A 212 #define ASYNC_SCAM_INT 0x800B 213 #define ASYNC_HUNG_SCSI 0x800C 214 #define ASYNC_KILLED_BUS 0x800D 215 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 216 #define ASYNC_LIP_OCCURRED 0x8010 217 #define ASYNC_LOOP_UP 0x8011 218 #define ASYNC_LOOP_DOWN 0x8012 219 #define ASYNC_LOOP_RESET 0x8013 220 #define ASYNC_PDB_CHANGED 0x8014 221 #define ASYNC_CHANGE_NOTIFY 0x8015 222 #define ASYNC_LIP_F8 0x8016 223 #define ASYNC_LIP_ERROR 0x8017 224 #define ASYNC_SECURITY_UPDATE 0x801B 225 #define ASYNC_CMD_CMPLT 0x8020 226 #define ASYNC_CTIO_DONE 0x8021 227 #define ASYNC_IP_XMIT_DONE 0x8022 228 #define ASYNC_IP_RECV_DONE 0x8023 229 #define ASYNC_IP_BROADCAST 0x8024 230 #define ASYNC_IP_RCVQ_LOW 0x8025 231 #define ASYNC_IP_RCVQ_EMPTY 0x8026 232 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 233 #define ASYNC_PTPMODE 0x8030 234 #define ASYNC_RIO1 0x8031 235 #define ASYNC_RIO2 0x8032 236 #define ASYNC_RIO3 0x8033 237 #define ASYNC_RIO4 0x8034 238 #define ASYNC_RIO5 0x8035 239 #define ASYNC_CONNMODE 0x8036 240 #define ISP_CONN_LOOP 1 241 #define ISP_CONN_PTP 2 242 #define ISP_CONN_BADLIP 3 243 #define ISP_CONN_FATAL 4 244 #define ISP_CONN_LOOPBACK 5 245 #define ASYNC_RIO_RESP 0x8040 246 #define ASYNC_RIO_COMP 0x8042 247 #define ASYNC_RCV_ERR 0x8048 248 249 /* 250 * Firmware Options. There are a lot of them. 251 * 252 * IFCOPTN - ISP Fibre Channel Option Word N 253 */ 254 #define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 255 #define IFCOPT1_EAABSRCVD (1 << 12) 256 #define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 257 #define IFCOPT1_ENAPURE (1 << 10) 258 #define IFCOPT1_ENA8017 (1 << 7) 259 #define IFCOPT1_DISGPIO67 (1 << 6) 260 #define IFCOPT1_LIPLOSSIMM (1 << 5) 261 #define IFCOPT1_DISF7SWTCH (1 << 4) 262 #define IFCOPT1_CTIO_RETRY (1 << 3) 263 #define IFCOPT1_LIPASYNC (1 << 1) 264 #define IFCOPT1_LIPF8 (1 << 0) 265 266 #define IFCOPT2_LOOPBACK (1 << 1) 267 #define IFCOPT2_ATIO3_ONLY (1 << 0) 268 269 #define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 270 #define IFCOPT3_RNDASYNC (1 << 1) 271 /* 272 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 273 * mailbox command to enable this. 274 */ 275 #define ASYNC_QFULL_SENT 0x8049 276 277 /* 278 * Needs to be enabled 279 */ 280 #define ASYNC_AUTO_PLOGI_RJT 0x8018 281 /* 282 * 24XX only 283 */ 284 #define ASYNC_RJT_SENT 0x8049 285 286 /* 287 * All IOCB Queue entries are this size 288 */ 289 #define QENTRY_LEN 64 290 291 /* 292 * Special Internal Handle for IOCBs 293 */ 294 #define ISP_SPCL_HANDLE 0xa5dead5a 295 296 /* 297 * Command Structure Definitions 298 */ 299 300 typedef struct { 301 uint32_t ds_base; 302 uint32_t ds_count; 303 } ispds_t; 304 305 typedef struct { 306 uint32_t ds_base; 307 uint32_t ds_basehi; 308 uint32_t ds_count; 309 } ispds64_t; 310 311 #define DSTYPE_32BIT 0 312 #define DSTYPE_64BIT 1 313 typedef struct { 314 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 315 uint32_t ds_segment; /* unused */ 316 uint32_t ds_base; /* 32 bit address of DSD list */ 317 } ispdslist_t; 318 319 320 typedef struct { 321 uint8_t rqs_entry_type; 322 uint8_t rqs_entry_count; 323 uint8_t rqs_seqno; 324 uint8_t rqs_flags; 325 } isphdr_t; 326 327 /* RQS Flag definitions */ 328 #define RQSFLAG_CONTINUATION 0x01 329 #define RQSFLAG_FULL 0x02 330 #define RQSFLAG_BADHEADER 0x04 331 #define RQSFLAG_BADPACKET 0x08 332 #define RQSFLAG_BADCOUNT 0x10 333 #define RQSFLAG_BADORDER 0x20 334 #define RQSFLAG_MASK 0x3f 335 336 /* RQS entry_type definitions */ 337 #define RQSTYPE_REQUEST 0x01 338 #define RQSTYPE_DATASEG 0x02 339 #define RQSTYPE_RESPONSE 0x03 340 #define RQSTYPE_MARKER 0x04 341 #define RQSTYPE_CMDONLY 0x05 342 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 343 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 344 #define RQSTYPE_SCAM 0x08 345 #define RQSTYPE_A64 0x09 346 #define RQSTYPE_A64_CONT 0x0a 347 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 348 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 349 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 350 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 351 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 352 #define RQSTYPE_STATUS_CONT 0x10 353 #define RQSTYPE_T2RQS 0x11 354 #define RQSTYPE_CTIO7 0x12 355 #define RQSTYPE_IP_XMIT 0x13 356 #define RQSTYPE_TSK_MGMT 0x14 357 #define RQSTYPE_T4RQS 0x15 358 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 359 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 360 #define RQSTYPE_T7RQS 0x18 361 #define RQSTYPE_T3RQS 0x19 362 #define RQSTYPE_IP_XMIT_64 0x1b 363 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 364 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 365 #define RQSTYPE_RIO1 0x21 366 #define RQSTYPE_RIO2 0x22 367 #define RQSTYPE_IP_RECV 0x23 368 #define RQSTYPE_IP_RECV_CONT 0x24 369 #define RQSTYPE_CT_PASSTHRU 0x29 370 #define RQSTYPE_MS_PASSTHRU 0x29 371 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 372 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 373 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 374 #define RQSTYPE_ABORT_IO 0x33 375 #define RQSTYPE_T6RQS 0x48 376 #define RQSTYPE_LOGIN 0x52 377 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 378 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 379 380 381 #define ISP_RQDSEG 4 382 typedef struct { 383 isphdr_t req_header; 384 uint32_t req_handle; 385 uint8_t req_lun_trn; 386 uint8_t req_target; 387 uint16_t req_cdblen; 388 uint16_t req_flags; 389 uint16_t req_reserved; 390 uint16_t req_time; 391 uint16_t req_seg_count; 392 uint8_t req_cdb[12]; 393 ispds_t req_dataseg[ISP_RQDSEG]; 394 } ispreq_t; 395 #define ISP_RQDSEG_A64 2 396 397 typedef struct { 398 isphdr_t mrk_header; 399 uint32_t mrk_handle; 400 uint8_t mrk_reserved0; 401 uint8_t mrk_target; 402 uint16_t mrk_modifier; 403 uint16_t mrk_flags; 404 uint16_t mrk_lun; 405 uint8_t mrk_reserved1[48]; 406 } isp_marker_t; 407 408 typedef struct { 409 isphdr_t mrk_header; 410 uint32_t mrk_handle; 411 uint16_t mrk_nphdl; 412 uint8_t mrk_modifier; 413 uint8_t mrk_reserved0; 414 uint8_t mrk_reserved1; 415 uint8_t mrk_vphdl; 416 uint16_t mrk_reserved2; 417 uint8_t mrk_lun[8]; 418 uint8_t mrk_reserved3[40]; 419 } isp_marker_24xx_t; 420 421 422 #define SYNC_DEVICE 0 423 #define SYNC_TARGET 1 424 #define SYNC_ALL 2 425 #define SYNC_LIP 3 426 427 #define ISP_RQDSEG_T2 3 428 typedef struct { 429 isphdr_t req_header; 430 uint32_t req_handle; 431 uint8_t req_lun_trn; 432 uint8_t req_target; 433 uint16_t req_scclun; 434 uint16_t req_flags; 435 uint16_t req_reserved; 436 uint16_t req_time; 437 uint16_t req_seg_count; 438 uint8_t req_cdb[16]; 439 uint32_t req_totalcnt; 440 ispds_t req_dataseg[ISP_RQDSEG_T2]; 441 } ispreqt2_t; 442 443 typedef struct { 444 isphdr_t req_header; 445 uint32_t req_handle; 446 uint16_t req_target; 447 uint16_t req_scclun; 448 uint16_t req_flags; 449 uint16_t req_reserved; 450 uint16_t req_time; 451 uint16_t req_seg_count; 452 uint8_t req_cdb[16]; 453 uint32_t req_totalcnt; 454 ispds_t req_dataseg[ISP_RQDSEG_T2]; 455 } ispreqt2e_t; 456 457 #define ISP_RQDSEG_T3 2 458 typedef struct { 459 isphdr_t req_header; 460 uint32_t req_handle; 461 uint8_t req_lun_trn; 462 uint8_t req_target; 463 uint16_t req_scclun; 464 uint16_t req_flags; 465 uint16_t req_reserved; 466 uint16_t req_time; 467 uint16_t req_seg_count; 468 uint8_t req_cdb[16]; 469 uint32_t req_totalcnt; 470 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 471 } ispreqt3_t; 472 #define ispreq64_t ispreqt3_t /* same as.... */ 473 474 typedef struct { 475 isphdr_t req_header; 476 uint32_t req_handle; 477 uint16_t req_target; 478 uint16_t req_scclun; 479 uint16_t req_flags; 480 uint16_t req_reserved; 481 uint16_t req_time; 482 uint16_t req_seg_count; 483 uint8_t req_cdb[16]; 484 uint32_t req_totalcnt; 485 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 486 } ispreqt3e_t; 487 488 /* req_flag values */ 489 #define REQFLAG_NODISCON 0x0001 490 #define REQFLAG_HTAG 0x0002 491 #define REQFLAG_OTAG 0x0004 492 #define REQFLAG_STAG 0x0008 493 #define REQFLAG_TARGET_RTN 0x0010 494 495 #define REQFLAG_NODATA 0x0000 496 #define REQFLAG_DATA_IN 0x0020 497 #define REQFLAG_DATA_OUT 0x0040 498 #define REQFLAG_DATA_UNKNOWN 0x0060 499 500 #define REQFLAG_DISARQ 0x0100 501 #define REQFLAG_FRC_ASYNC 0x0200 502 #define REQFLAG_FRC_SYNC 0x0400 503 #define REQFLAG_FRC_WIDE 0x0800 504 #define REQFLAG_NOPARITY 0x1000 505 #define REQFLAG_STOPQ 0x2000 506 #define REQFLAG_XTRASNS 0x4000 507 #define REQFLAG_PRIORITY 0x8000 508 509 typedef struct { 510 isphdr_t req_header; 511 uint32_t req_handle; 512 uint8_t req_lun_trn; 513 uint8_t req_target; 514 uint16_t req_cdblen; 515 uint16_t req_flags; 516 uint16_t req_reserved; 517 uint16_t req_time; 518 uint16_t req_seg_count; 519 uint8_t req_cdb[44]; 520 } ispextreq_t; 521 522 /* 24XX only */ 523 typedef struct { 524 uint16_t fcd_length; 525 uint16_t fcd_a1500; 526 uint16_t fcd_a3116; 527 uint16_t fcd_a4732; 528 uint16_t fcd_a6348; 529 } fcp_cmnd_ds_t; 530 531 typedef struct { 532 isphdr_t req_header; 533 uint32_t req_handle; 534 uint16_t req_nphdl; 535 uint16_t req_time; 536 uint16_t req_seg_count; 537 uint16_t req_fc_rsp_dsd_length; 538 uint8_t req_lun[8]; 539 uint16_t req_flags; 540 uint16_t req_fc_cmnd_dsd_length; 541 uint16_t req_fc_cmnd_dsd_a1500; 542 uint16_t req_fc_cmnd_dsd_a3116; 543 uint16_t req_fc_cmnd_dsd_a4732; 544 uint16_t req_fc_cmnd_dsd_a6348; 545 uint16_t req_fc_rsp_dsd_a1500; 546 uint16_t req_fc_rsp_dsd_a3116; 547 uint16_t req_fc_rsp_dsd_a4732; 548 uint16_t req_fc_rsp_dsd_a6348; 549 uint32_t req_totalcnt; 550 uint16_t req_tidlo; 551 uint8_t req_tidhi; 552 uint8_t req_vpidx; 553 ispds64_t req_dataseg; 554 } ispreqt6_t; 555 556 typedef struct { 557 isphdr_t req_header; 558 uint32_t req_handle; 559 uint16_t req_nphdl; 560 uint16_t req_time; 561 uint16_t req_seg_count; 562 uint16_t req_reserved; 563 uint8_t req_lun[8]; 564 uint8_t req_alen_datadir; 565 uint8_t req_task_management; 566 uint8_t req_task_attribute; 567 uint8_t req_crn; 568 uint8_t req_cdb[16]; 569 uint32_t req_dl; 570 uint16_t req_tidlo; 571 uint8_t req_tidhi; 572 uint8_t req_vpidx; 573 ispds64_t req_dataseg; 574 } ispreqt7_t; 575 576 /* Task Management Request Function */ 577 typedef struct { 578 isphdr_t tmf_header; 579 uint32_t tmf_handle; 580 uint16_t tmf_nphdl; 581 uint8_t tmf_reserved0[2]; 582 uint16_t tmf_delay; 583 uint16_t tmf_timeout; 584 uint8_t tmf_lun[8]; 585 uint32_t tmf_flags; 586 uint8_t tmf_reserved1[20]; 587 uint16_t tmf_tidlo; 588 uint8_t tmf_tidhi; 589 uint8_t tmf_vpidx; 590 uint8_t tmf_reserved2[12]; 591 } isp24xx_tmf_t; 592 593 #define ISP24XX_TMF_NOSEND 0x80000000 594 595 #define ISP24XX_TMF_LUN_RESET 0x00000010 596 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 597 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 598 #define ISP24XX_TMF_TARGET_RESET 0x00000002 599 #define ISP24XX_TMF_CLEAR_ACA 0x00000001 600 601 /* I/O Abort Structure */ 602 typedef struct { 603 isphdr_t abrt_header; 604 uint32_t abrt_handle; 605 uint16_t abrt_nphdl; 606 uint16_t abrt_options; 607 uint32_t abrt_cmd_handle; 608 uint8_t abrt_reserved[32]; 609 uint16_t abrt_tidlo; 610 uint8_t abrt_tidhi; 611 uint8_t abrt_vpidx; 612 uint8_t abrt_reserved1[12]; 613 } isp24xx_abrt_t; 614 615 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 616 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 617 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 618 619 #define ISP_CDSEG 7 620 typedef struct { 621 isphdr_t req_header; 622 uint32_t req_reserved; 623 ispds_t req_dataseg[ISP_CDSEG]; 624 } ispcontreq_t; 625 626 #define ISP_CDSEG64 5 627 typedef struct { 628 isphdr_t req_header; 629 ispds64_t req_dataseg[ISP_CDSEG64]; 630 } ispcontreq64_t; 631 632 typedef struct { 633 isphdr_t req_header; 634 uint32_t req_handle; 635 uint16_t req_scsi_status; 636 uint16_t req_completion_status; 637 uint16_t req_state_flags; 638 uint16_t req_status_flags; 639 uint16_t req_time; 640 #define req_response_len req_time /* FC only */ 641 uint16_t req_sense_len; 642 uint32_t req_resid; 643 uint8_t req_response[8]; /* FC only */ 644 uint8_t req_sense_data[32]; 645 } ispstatusreq_t; 646 647 /* 648 * Status Continuation 649 */ 650 typedef struct { 651 isphdr_t req_header; 652 uint8_t req_sense_data[60]; 653 } ispstatus_cont_t; 654 655 /* 656 * 24XX Type 0 status 657 */ 658 typedef struct { 659 isphdr_t req_header; 660 uint32_t req_handle; 661 uint16_t req_completion_status; 662 uint16_t req_oxid; 663 uint32_t req_resid; 664 uint16_t req_reserved0; 665 uint16_t req_state_flags; 666 uint16_t req_reserved1; 667 uint16_t req_scsi_status; 668 uint32_t req_fcp_residual; 669 uint32_t req_sense_len; 670 uint32_t req_response_len; 671 uint8_t req_rsp_sense[28]; 672 } isp24xx_statusreq_t; 673 674 /* 675 * For Qlogic 2X00, the high order byte of SCSI status has 676 * additional meaning. 677 */ 678 #define RQCS_RU 0x800 /* Residual Under */ 679 #define RQCS_RO 0x400 /* Residual Over */ 680 #define RQCS_RESID (RQCS_RU|RQCS_RO) 681 #define RQCS_SV 0x200 /* Sense Length Valid */ 682 #define RQCS_RV 0x100 /* FCP Response Length Valid */ 683 684 /* 685 * CT Passthru IOCB 686 */ 687 typedef struct { 688 isphdr_t ctp_header; 689 uint32_t ctp_handle; 690 uint16_t ctp_status; 691 uint16_t ctp_nphdl; /* n-port handle */ 692 uint16_t ctp_cmd_cnt; /* Command DSD count */ 693 uint8_t ctp_vpidx; 694 uint8_t ctp_reserved0; 695 uint16_t ctp_time; 696 uint16_t ctp_reserved1; 697 uint16_t ctp_rsp_cnt; /* Response DSD count */ 698 uint16_t ctp_reserved2[5]; 699 uint32_t ctp_rsp_bcnt; /* Response byte count */ 700 uint32_t ctp_cmd_bcnt; /* Command byte count */ 701 ispds64_t ctp_dataseg[2]; 702 } isp_ct_pt_t; 703 704 /* 705 * MS Passthru IOCB 706 */ 707 typedef struct { 708 isphdr_t ms_header; 709 uint32_t ms_handle; 710 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 711 uint16_t ms_status; 712 uint16_t ms_flags; 713 uint16_t ms_reserved1; /* low 8 bits */ 714 uint16_t ms_time; 715 uint16_t ms_cmd_cnt; /* Command DSD count */ 716 uint16_t ms_tot_cnt; /* Total DSD Count */ 717 uint8_t ms_type; /* MS type */ 718 uint8_t ms_r_ctl; /* R_CTL */ 719 uint16_t ms_rxid; /* RX_ID */ 720 uint16_t ms_reserved2; 721 uint32_t ms_handle2; 722 uint32_t ms_rsp_bcnt; /* Response byte count */ 723 uint32_t ms_cmd_bcnt; /* Command byte count */ 724 ispds64_t ms_dataseg[2]; 725 } isp_ms_t; 726 727 /* 728 * Completion Status Codes. 729 */ 730 #define RQCS_COMPLETE 0x0000 731 #define RQCS_DMA_ERROR 0x0002 732 #define RQCS_RESET_OCCURRED 0x0004 733 #define RQCS_ABORTED 0x0005 734 #define RQCS_TIMEOUT 0x0006 735 #define RQCS_DATA_OVERRUN 0x0007 736 #define RQCS_DATA_UNDERRUN 0x0015 737 #define RQCS_QUEUE_FULL 0x001C 738 739 /* 1X00 Only Completion Codes */ 740 #define RQCS_INCOMPLETE 0x0001 741 #define RQCS_TRANSPORT_ERROR 0x0003 742 #define RQCS_COMMAND_OVERRUN 0x0008 743 #define RQCS_STATUS_OVERRUN 0x0009 744 #define RQCS_BAD_MESSAGE 0x000a 745 #define RQCS_NO_MESSAGE_OUT 0x000b 746 #define RQCS_EXT_ID_FAILED 0x000c 747 #define RQCS_IDE_MSG_FAILED 0x000d 748 #define RQCS_ABORT_MSG_FAILED 0x000e 749 #define RQCS_REJECT_MSG_FAILED 0x000f 750 #define RQCS_NOP_MSG_FAILED 0x0010 751 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 752 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 753 #define RQCS_ID_MSG_FAILED 0x0013 754 #define RQCS_UNEXP_BUS_FREE 0x0014 755 #define RQCS_XACT_ERR1 0x0018 756 #define RQCS_XACT_ERR2 0x0019 757 #define RQCS_XACT_ERR3 0x001A 758 #define RQCS_BAD_ENTRY 0x001B 759 #define RQCS_PHASE_SKIPPED 0x001D 760 #define RQCS_ARQS_FAILED 0x001E 761 #define RQCS_WIDE_FAILED 0x001F 762 #define RQCS_SYNCXFER_FAILED 0x0020 763 #define RQCS_LVD_BUSERR 0x0021 764 765 /* 2X00 Only Completion Codes */ 766 #define RQCS_PORT_UNAVAILABLE 0x0028 767 #define RQCS_PORT_LOGGED_OUT 0x0029 768 #define RQCS_PORT_CHANGED 0x002A 769 #define RQCS_PORT_BUSY 0x002B 770 771 /* 24XX Only Completion Codes */ 772 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 773 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 774 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 775 #define RQCS_24XX_TMO 0x0030 /* task management overrun */ 776 777 778 /* 779 * 1X00 specific State Flags 780 */ 781 #define RQSF_GOT_BUS 0x0100 782 #define RQSF_GOT_TARGET 0x0200 783 #define RQSF_SENT_CDB 0x0400 784 #define RQSF_XFRD_DATA 0x0800 785 #define RQSF_GOT_STATUS 0x1000 786 #define RQSF_GOT_SENSE 0x2000 787 #define RQSF_XFER_COMPLETE 0x4000 788 789 /* 790 * 2X00 specific State Flags 791 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 792 */ 793 #define RQSF_DATA_IN 0x0020 794 #define RQSF_DATA_OUT 0x0040 795 #define RQSF_STAG 0x0008 796 #define RQSF_OTAG 0x0004 797 #define RQSF_HTAG 0x0002 798 /* 799 * 1X00 Status Flags 800 */ 801 #define RQSTF_DISCONNECT 0x0001 802 #define RQSTF_SYNCHRONOUS 0x0002 803 #define RQSTF_PARITY_ERROR 0x0004 804 #define RQSTF_BUS_RESET 0x0008 805 #define RQSTF_DEVICE_RESET 0x0010 806 #define RQSTF_ABORTED 0x0020 807 #define RQSTF_TIMEOUT 0x0040 808 #define RQSTF_NEGOTIATION 0x0080 809 810 /* 811 * 2X00 specific state flags 812 */ 813 /* RQSF_SENT_CDB */ 814 /* RQSF_XFRD_DATA */ 815 /* RQSF_GOT_STATUS */ 816 /* RQSF_XFER_COMPLETE */ 817 818 /* 819 * 2X00 specific status flags 820 */ 821 /* RQSTF_ABORTED */ 822 /* RQSTF_TIMEOUT */ 823 #define RQSTF_DMA_ERROR 0x0080 824 #define RQSTF_LOGOUT 0x2000 825 826 /* 827 * Miscellaneous 828 */ 829 #ifndef ISP_EXEC_THROTTLE 830 #define ISP_EXEC_THROTTLE 16 831 #endif 832 833 /* 834 * About Firmware returns an 'attribute' word in mailbox 6. 835 * These attributes are for 2200 and 2300. 836 */ 837 #define ISP_FW_ATTR_TMODE 0x0001 838 #define ISP_FW_ATTR_SCCLUN 0x0002 839 #define ISP_FW_ATTR_FABRIC 0x0004 840 #define ISP_FW_ATTR_CLASS2 0x0008 841 #define ISP_FW_ATTR_FCTAPE 0x0010 842 #define ISP_FW_ATTR_IP 0x0020 843 #define ISP_FW_ATTR_VI 0x0040 844 #define ISP_FW_ATTR_VI_SOLARIS 0x0080 845 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 846 847 /* and these are for the 2400 */ 848 #define ISP2400_FW_ATTR_CLASS2 0x0001 849 #define ISP2400_FW_ATTR_IP 0x0002 850 #define ISP2400_FW_ATTR_MULTIID 0x0004 851 #define ISP2400_FW_ATTR_SB2 0x0008 852 #define ISP2400_FW_ATTR_T10CRC 0x0010 853 #define ISP2400_FW_ATTR_VI 0x0020 854 #define ISP2400_FW_ATTR_EXPFW 0x2000 855 856 #define ISP_CAP_TMODE(isp) \ 857 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 858 #define ISP_CAP_SCCFW(isp) \ 859 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 860 #define ISP_CAP_2KLOGIN(isp) \ 861 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 862 #define ISP_CAP_MULTI_ID(isp) \ 863 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 864 865 #define ISP_GET_VPIDX(isp, tag) \ 866 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 867 868 /* 869 * Reduced Interrupt Operation Response Queue Entreis 870 */ 871 872 typedef struct { 873 isphdr_t req_header; 874 uint32_t req_handles[15]; 875 } isp_rio1_t; 876 877 typedef struct { 878 isphdr_t req_header; 879 uint16_t req_handles[30]; 880 } isp_rio2_t; 881 882 /* 883 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 884 */ 885 886 /* 887 * Initialization Control Block 888 * 889 * Version One (prime) format. 890 */ 891 typedef struct { 892 uint8_t icb_version; 893 uint8_t icb_reserved0; 894 uint16_t icb_fwoptions; 895 uint16_t icb_maxfrmlen; 896 uint16_t icb_maxalloc; 897 uint16_t icb_execthrottle; 898 uint8_t icb_retry_count; 899 uint8_t icb_retry_delay; 900 uint8_t icb_portname[8]; 901 uint16_t icb_hardaddr; 902 uint8_t icb_iqdevtype; 903 uint8_t icb_logintime; 904 uint8_t icb_nodename[8]; 905 uint16_t icb_rqstout; 906 uint16_t icb_rspnsin; 907 uint16_t icb_rqstqlen; 908 uint16_t icb_rsltqlen; 909 uint16_t icb_rqstaddr[4]; 910 uint16_t icb_respaddr[4]; 911 uint16_t icb_lunenables; 912 uint8_t icb_ccnt; 913 uint8_t icb_icnt; 914 uint16_t icb_lunetimeout; 915 uint16_t icb_reserved1; 916 uint16_t icb_xfwoptions; 917 uint8_t icb_racctimer; 918 uint8_t icb_idelaytimer; 919 uint16_t icb_zfwoptions; 920 uint16_t icb_reserved2[13]; 921 } isp_icb_t; 922 923 #define ICB_VERSION1 1 924 925 #define ICBOPT_EXTENDED 0x8000 926 #define ICBOPT_BOTH_WWNS 0x4000 927 #define ICBOPT_FULL_LOGIN 0x2000 928 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 929 #define ICBOPT_PREVLOOP 0x0800 930 #define ICBOPT_SRCHDOWN 0x0400 931 #define ICBOPT_NOLIP 0x0200 932 #define ICBOPT_PDBCHANGE_AE 0x0100 933 #define ICBOPT_INI_TGTTYPE 0x0080 934 #define ICBOPT_INI_ADISC 0x0040 935 #define ICBOPT_INI_DISABLE 0x0020 936 #define ICBOPT_TGT_ENABLE 0x0010 937 #define ICBOPT_FAST_POST 0x0008 938 #define ICBOPT_FULL_DUPLEX 0x0004 939 #define ICBOPT_FAIRNESS 0x0002 940 #define ICBOPT_HARD_ADDRESS 0x0001 941 942 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 943 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 944 #define ICBXOPT_FCTAPE_CONFIRM 0x2000 945 #define ICBXOPT_FCTAPE 0x1000 946 #define ICBXOPT_CLASS2_ACK0 0x0200 947 #define ICBXOPT_CLASS2 0x0100 948 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 949 #define ICBXOPT_TOPO_MASK 0x0070 950 #define ICBXOPT_LOOP_ONLY 0x0000 951 #define ICBXOPT_PTP_ONLY 0x0010 952 #define ICBXOPT_LOOP_2_PTP 0x0020 953 #define ICBXOPT_PTP_2_LOOP 0x0030 954 /* 955 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 956 * RIO is not defined for the 23XX cards (just 2200) 957 */ 958 #define ICBXOPT_RIO_OFF 0 959 #define ICBXOPT_RIO_16BIT 1 960 #define ICBXOPT_RIO_32BIT 2 961 #define ICBXOPT_RIO_16BIT_IOCB 3 962 #define ICBXOPT_RIO_32BIT_IOCB 4 963 #define ICBXOPT_ZIO 5 964 #define ICBXOPT_TIMER_MASK 0x7 965 966 #define ICBZOPT_RATE_MASK 0xC000 967 #define ICBZOPT_RATE_ONEGB 0x0000 968 #define ICBZOPT_RATE_AUTO 0x8000 969 #define ICBZOPT_RATE_TWOGB 0x4000 970 #define ICBZOPT_50_OHM 0x2000 971 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 972 #define ICBZOPT_RSPSZ_MASK 0x0030 973 #define ICBZOPT_RSPSZ_24 0x0000 974 #define ICBZOPT_RSPSZ_12 0x0010 975 #define ICBZOPT_RSPSZ_24A 0x0020 976 #define ICBZOPT_RSPSZ_32 0x0030 977 #define ICBZOPT_SOFTID 0x0002 978 #define ICBZOPT_ENA_RDXFR_RDY 0x0001 979 980 /* 2400 F/W options */ 981 #define ICB2400_OPT1_BOTH_WWNS 0x00004000 982 #define ICB2400_OPT1_FULL_LOGIN 0x00002000 983 #define ICB2400_OPT1_PREVLOOP 0x00000800 984 #define ICB2400_OPT1_SRCHDOWN 0x00000400 985 #define ICB2400_OPT1_NOLIP 0x00000200 986 #define ICB2400_OPT1_INI_DISABLE 0x00000020 987 #define ICB2400_OPT1_TGT_ENABLE 0x00000010 988 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004 989 #define ICB2400_OPT1_FAIRNESS 0x00000002 990 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001 991 992 #define ICB2400_OPT2_FCTAPE 0x00001000 993 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200 994 #define ICB2400_OPT2_CLASS2 0x00000100 995 #define ICB2400_OPT2_NO_PLAY 0x00000080 996 #define ICB2400_OPT2_TOPO_MASK 0x00000070 997 #define ICB2400_OPT2_LOOP_ONLY 0x00000000 998 #define ICB2400_OPT2_PTP_ONLY 0x00000010 999 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020 1000 #define ICB2400_OPT2_PTP_2_LOOP 0x00000030 1001 #define ICB2400_OPT2_TIMER_MASK 0x00000007 1002 #define ICB2400_OPT2_ZIO 0x00000005 1003 #define ICB2400_OPT2_ZIO1 0x00000006 1004 1005 #define ICB2400_OPT3_75_OHM 0x00010000 1006 #define ICB2400_OPT3_RATE_MASK 0x0000E000 1007 #define ICB2400_OPT3_RATE_ONEGB 0x00000000 1008 #define ICB2400_OPT3_RATE_TWOGB 0x00002000 1009 #define ICB2400_OPT3_RATE_AUTO 0x00004000 1010 #define ICB2400_OPT3_RATE_FOURGB 0x00006000 1011 #define ICB2400_OPT3_RATE_EIGHTGB 0x00008000 1012 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1013 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1014 #define ICB2400_OPT3_ENA_OOF 0x00000040 1015 /* note that a response size flag of zero is reserved! */ 1016 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1017 #define ICB2400_OPT3_RSPSZ_12 0x00000010 1018 #define ICB2400_OPT3_RSPSZ_24 0x00000020 1019 #define ICB2400_OPT3_RSPSZ_32 0x00000030 1020 #define ICB2400_OPT3_SOFTID 0x00000002 1021 1022 #define ICB_MIN_FRMLEN 256 1023 #define ICB_MAX_FRMLEN 2112 1024 #define ICB_DFLT_FRMLEN 1024 1025 #define ICB_DFLT_ALLOC 256 1026 #define ICB_DFLT_THROTTLE 16 1027 #define ICB_DFLT_RDELAY 5 1028 #define ICB_DFLT_RCOUNT 3 1029 1030 #define ICB_LOGIN_TOV 30 1031 #define ICB_LUN_ENABLE_TOV 180 1032 1033 1034 /* 1035 * And somebody at QLogic had a great idea that you could just change 1036 * the structure *and* keep the version number the same as the other cards. 1037 */ 1038 typedef struct { 1039 uint16_t icb_version; 1040 uint16_t icb_reserved0; 1041 uint16_t icb_maxfrmlen; 1042 uint16_t icb_execthrottle; 1043 uint16_t icb_xchgcnt; 1044 uint16_t icb_hardaddr; 1045 uint8_t icb_portname[8]; 1046 uint8_t icb_nodename[8]; 1047 uint16_t icb_rspnsin; 1048 uint16_t icb_rqstout; 1049 uint16_t icb_retry_count; 1050 uint16_t icb_priout; 1051 uint16_t icb_rsltqlen; 1052 uint16_t icb_rqstqlen; 1053 uint16_t icb_ldn_nols; 1054 uint16_t icb_prqstqlen; 1055 uint16_t icb_rqstaddr[4]; 1056 uint16_t icb_respaddr[4]; 1057 uint16_t icb_priaddr[4]; 1058 uint16_t icb_reserved1[4]; 1059 uint16_t icb_atio_in; 1060 uint16_t icb_atioqlen; 1061 uint16_t icb_atioqaddr[4]; 1062 uint16_t icb_idelaytimer; 1063 uint16_t icb_logintime; 1064 uint32_t icb_fwoptions1; 1065 uint32_t icb_fwoptions2; 1066 uint32_t icb_fwoptions3; 1067 uint16_t icb_reserved2[12]; 1068 } isp_icb_2400_t; 1069 1070 #define RQRSP_ADDR0015 0 1071 #define RQRSP_ADDR1631 1 1072 #define RQRSP_ADDR3247 2 1073 #define RQRSP_ADDR4863 3 1074 1075 1076 #define ICB_NNM0 7 1077 #define ICB_NNM1 6 1078 #define ICB_NNM2 5 1079 #define ICB_NNM3 4 1080 #define ICB_NNM4 3 1081 #define ICB_NNM5 2 1082 #define ICB_NNM6 1 1083 #define ICB_NNM7 0 1084 1085 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1086 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1087 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1088 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1089 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1090 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1091 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1092 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1093 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1094 1095 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1096 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1097 ((uint64_t) array[ICB_NNM1] << 8) | \ 1098 ((uint64_t) array[ICB_NNM2] << 16) | \ 1099 ((uint64_t) array[ICB_NNM3] << 24) | \ 1100 ((uint64_t) array[ICB_NNM4] << 32) | \ 1101 ((uint64_t) array[ICB_NNM5] << 40) | \ 1102 ((uint64_t) array[ICB_NNM6] << 48) | \ 1103 ((uint64_t) array[ICB_NNM7] << 56) 1104 1105 1106 /* 1107 * For MULTI_ID firmware, this describes a 1108 * virtual port entity for getting status. 1109 */ 1110 typedef struct { 1111 uint16_t vp_port_status; 1112 uint8_t vp_port_options; 1113 uint8_t vp_port_loopid; 1114 uint8_t vp_port_portname[8]; 1115 uint8_t vp_port_nodename[8]; 1116 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1117 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1118 } vp_port_info_t; 1119 1120 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* disable target mode */ 1121 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* enable initiator mode */ 1122 #define ICB2400_VPOPT_ENABLED 0x00000008 1123 #define ICB2400_VPOPT_NOPLAY 0x00000004 1124 #define ICB2400_VPOPT_PREVLOOP 0x00000002 1125 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 1126 1127 #define ICB2400_VPOPT_WRITE_SIZE 20 1128 1129 /* 1130 * For MULTI_ID firmware, we append this structure 1131 * to the isp_icb_2400_t above, followed by a list 1132 * structures that are *most* of the vp_port_info_t. 1133 */ 1134 typedef struct { 1135 uint16_t vp_count; 1136 uint16_t vp_global_options; 1137 } isp_icb_2400_vpinfo_t; 1138 1139 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1140 #define ICB2400_VPINFO_PORT_OFF(chan) \ 1141 ICB2400_VPINFO_OFF + \ 1142 sizeof (isp_icb_2400_vpinfo_t) + ((chan - 1) * ICB2400_VPOPT_WRITE_SIZE) 1143 1144 #define ICB2400_VPGOPT_MID_DISABLE 0x02 1145 1146 typedef struct { 1147 isphdr_t vp_ctrl_hdr; 1148 uint32_t vp_ctrl_handle; 1149 uint16_t vp_ctrl_index_fail; 1150 uint16_t vp_ctrl_status; 1151 uint16_t vp_ctrl_command; 1152 uint16_t vp_ctrl_vp_count; 1153 uint16_t vp_ctrl_idmap[8]; 1154 uint8_t vp_ctrl_reserved[32]; 1155 } vp_ctrl_info_t; 1156 1157 #define VP_CTRL_CMD_ENABLE_VP 0 1158 #define VP_CTRL_CMD_DISABLE_VP 8 1159 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 9 1160 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0xA 1161 1162 /* 1163 * We can use this structure for modifying either one or two VP ports after initialization 1164 */ 1165 typedef struct { 1166 isphdr_t vp_mod_hdr; 1167 uint32_t vp_mod_hdl; 1168 uint16_t vp_mod_reserved0; 1169 uint16_t vp_mod_status; 1170 uint8_t vp_mod_cmd; 1171 uint8_t vp_mod_cnt; 1172 uint8_t vp_mod_idx0; 1173 uint8_t vp_mod_idx1; 1174 struct { 1175 uint8_t options; 1176 uint8_t loopid; 1177 uint16_t reserved1; 1178 uint8_t wwpn[8]; 1179 uint8_t wwnn[8]; 1180 } vp_mod_ports[2]; 1181 uint8_t vp_mod_reserved2[8]; 1182 } vp_modify_t; 1183 1184 #define VP_STS_OK 0x00 1185 #define VP_STS_ERR 0x01 1186 #define VP_CNT_ERR 0x02 1187 #define VP_GEN_ERR 0x03 1188 #define VP_IDX_ERR 0x04 1189 #define VP_STS_BSY 0x05 1190 1191 #define VP_MODIFY_VP 0x00 1192 #define VP_MODIFY_ENA 0x01 1193 1194 /* 1195 * Port Data Base Element 1196 */ 1197 1198 typedef struct { 1199 uint16_t pdb_options; 1200 uint8_t pdb_mstate; 1201 uint8_t pdb_sstate; 1202 uint8_t pdb_hardaddr_bits[4]; 1203 uint8_t pdb_portid_bits[4]; 1204 uint8_t pdb_nodename[8]; 1205 uint8_t pdb_portname[8]; 1206 uint16_t pdb_execthrottle; 1207 uint16_t pdb_exec_count; 1208 uint8_t pdb_retry_count; 1209 uint8_t pdb_retry_delay; 1210 uint16_t pdb_resalloc; 1211 uint16_t pdb_curalloc; 1212 uint16_t pdb_qhead; 1213 uint16_t pdb_qtail; 1214 uint16_t pdb_tl_next; 1215 uint16_t pdb_tl_last; 1216 uint16_t pdb_features; /* PLOGI, Common Service */ 1217 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1218 uint16_t pdb_roi; /* PLOGI, Common Service */ 1219 uint8_t pdb_target; 1220 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1221 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1222 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1223 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1224 uint16_t pdb_labrtflg; 1225 uint16_t pdb_lstopflg; 1226 uint16_t pdb_sqhead; 1227 uint16_t pdb_sqtail; 1228 uint16_t pdb_ptimer; 1229 uint16_t pdb_nxt_seqid; 1230 uint16_t pdb_fcount; 1231 uint16_t pdb_prli_len; 1232 uint16_t pdb_prli_svc0; 1233 uint16_t pdb_prli_svc3; 1234 uint16_t pdb_loopid; 1235 uint16_t pdb_il_ptr; 1236 uint16_t pdb_sl_ptr; 1237 } isp_pdb_21xx_t; 1238 1239 #define PDB_OPTIONS_XMITTING (1<<11) 1240 #define PDB_OPTIONS_LNKXMIT (1<<10) 1241 #define PDB_OPTIONS_ABORTED (1<<9) 1242 #define PDB_OPTIONS_ADISC (1<<1) 1243 1244 #define PDB_STATE_DISCOVERY 0 1245 #define PDB_STATE_WDISC_ACK 1 1246 #define PDB_STATE_PLOGI 2 1247 #define PDB_STATE_PLOGI_ACK 3 1248 #define PDB_STATE_PRLI 4 1249 #define PDB_STATE_PRLI_ACK 5 1250 #define PDB_STATE_LOGGED_IN 6 1251 #define PDB_STATE_PORT_UNAVAIL 7 1252 #define PDB_STATE_PRLO 8 1253 #define PDB_STATE_PRLO_ACK 9 1254 #define PDB_STATE_PLOGO 10 1255 #define PDB_STATE_PLOG_ACK 11 1256 1257 #define SVC3_TGT_ROLE 0x10 1258 #define SVC3_INI_ROLE 0x20 1259 #define SVC3_ROLE_MASK 0x30 1260 #define SVC3_ROLE_SHIFT 4 1261 1262 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1263 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1264 1265 /* 1266 * Port Data Base Element- 24XX cards 1267 */ 1268 typedef struct { 1269 uint16_t pdb_flags; 1270 uint8_t pdb_curstate; 1271 uint8_t pdb_laststate; 1272 uint8_t pdb_hardaddr_bits[4]; 1273 uint8_t pdb_portid_bits[4]; 1274 #define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1275 uint16_t pdb_retry_timer; 1276 uint16_t pdb_handle; 1277 uint16_t pdb_rcv_dsize; 1278 uint16_t pdb_reserved0; 1279 uint16_t pdb_prli_svc0; 1280 uint16_t pdb_prli_svc3; 1281 uint8_t pdb_portname[8]; 1282 uint8_t pdb_nodename[8]; 1283 uint8_t pdb_reserved1[24]; 1284 } isp_pdb_24xx_t; 1285 1286 #define PDB2400_TID_SUPPORTED 0x4000 1287 #define PDB2400_FC_TAPE 0x0080 1288 #define PDB2400_CLASS2_ACK0 0x0040 1289 #define PDB2400_FCP_CONF 0x0020 1290 #define PDB2400_CLASS2 0x0010 1291 #define PDB2400_ADDR_VALID 0x0002 1292 1293 #define PDB2400_STATE_PLOGI_PEND 0x03 1294 #define PDB2400_STATE_PLOGI_DONE 0x04 1295 #define PDB2400_STATE_PRLI_PEND 0x05 1296 #define PDB2400_STATE_LOGGED_IN 0x06 1297 #define PDB2400_STATE_PORT_UNAVAIL 0x07 1298 #define PDB2400_STATE_PRLO_PEND 0x09 1299 #define PDB2400_STATE_LOGO_PEND 0x0B 1300 1301 /* 1302 * Common elements from the above two structures that are actually useful to us. 1303 */ 1304 typedef struct { 1305 uint16_t handle; 1306 uint16_t reserved; 1307 uint32_t s3_role : 8, 1308 portid : 24; 1309 uint8_t portname[8]; 1310 uint8_t nodename[8]; 1311 } isp_pdb_t; 1312 1313 /* 1314 * Port Database Changed Async Event information for 24XX cards 1315 */ 1316 #define PDB24XX_AE_OK 0x00 1317 #define PDB24XX_AE_IMPL_LOGO_1 0x01 1318 #define PDB24XX_AE_IMPL_LOGO_2 0x02 1319 #define PDB24XX_AE_IMPL_LOGO_3 0x03 1320 #define PDB24XX_AE_PLOGI_RCVD 0x04 1321 #define PDB24XX_AE_PLOGI_RJT 0x05 1322 #define PDB24XX_AE_PRLI_RCVD 0x06 1323 #define PDB24XX_AE_PRLI_RJT 0x07 1324 #define PDB24XX_AE_TPRLO 0x08 1325 #define PDB24XX_AE_TPRLO_RJT 0x09 1326 #define PDB24XX_AE_PRLO_RCVD 0x0a 1327 #define PDB24XX_AE_LOGO_RCVD 0x0b 1328 #define PDB24XX_AE_TOPO_CHG 0x0c 1329 #define PDB24XX_AE_NPORT_CHG 0x0d 1330 #define PDB24XX_AE_FLOGI_RJT 0x0e 1331 #define PDB24XX_AE_BAD_FANN 0x0f 1332 #define PDB24XX_AE_FLOGI_TIMO 0x10 1333 #define PDB24XX_AE_ABX_LOGO 0x11 1334 #define PDB24XX_AE_PLOGI_DONE 0x12 1335 #define PDB24XX_AE_PRLI_DONJE 0x13 1336 #define PDB24XX_AE_OPN_1 0x14 1337 #define PDB24XX_AE_OPN_2 0x15 1338 #define PDB24XX_AE_TXERR 0x16 1339 #define PDB24XX_AE_FORCED_LOGO 0x17 1340 #define PDB24XX_AE_DISC_TIMO 0x18 1341 1342 /* 1343 * Genericized Port Login/Logout software structure 1344 */ 1345 typedef struct { 1346 uint16_t handle; 1347 uint16_t channel; 1348 uint32_t 1349 flags : 8, 1350 portid : 24; 1351 } isp_plcmd_t; 1352 /* the flags to use are those for PLOGX_FLG_* below */ 1353 1354 /* 1355 * ISP24XX- Login/Logout Port IOCB 1356 */ 1357 typedef struct { 1358 isphdr_t plogx_header; 1359 uint32_t plogx_handle; 1360 uint16_t plogx_status; 1361 uint16_t plogx_nphdl; 1362 uint16_t plogx_flags; 1363 uint16_t plogx_vphdl; /* low 8 bits */ 1364 uint16_t plogx_portlo; /* low 16 bits */ 1365 uint16_t plogx_rspsz_porthi; 1366 struct { 1367 uint16_t lo16; 1368 uint16_t hi16; 1369 } plogx_ioparm[11]; 1370 } isp_plogx_t; 1371 1372 #define PLOGX_STATUS_OK 0x00 1373 #define PLOGX_STATUS_UNAVAIL 0x28 1374 #define PLOGX_STATUS_LOGOUT 0x29 1375 #define PLOGX_STATUS_IOCBERR 0x31 1376 1377 #define PLOGX_IOCBERR_NOLINK 0x01 1378 #define PLOGX_IOCBERR_NOIOCB 0x02 1379 #define PLOGX_IOCBERR_NOXGHG 0x03 1380 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1381 #define PLOGX_IOCBERR_NOFABRIC 0x05 1382 #define PLOGX_IOCBERR_NOTREADY 0x07 1383 #define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */ 1384 #define PLOGX_IOCBERR_NOPCB 0x0a 1385 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1386 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1387 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1388 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1389 #define PLOGX_IOCBERR_NOHANDLE 0x1c 1390 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1391 1392 #define PLOGX_FLG_CMD_MASK 0xf 1393 #define PLOGX_FLG_CMD_PLOGI 0 1394 #define PLOGX_FLG_CMD_PRLI 1 1395 #define PLOGX_FLG_CMD_PDISC 2 1396 #define PLOGX_FLG_CMD_LOGO 8 1397 #define PLOGX_FLG_CMD_PRLO 9 1398 #define PLOGX_FLG_CMD_TPRLO 10 1399 1400 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1401 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1402 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1403 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1404 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1405 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1406 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1407 1408 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1409 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1410 1411 /* 1412 * Report ID Acquisistion (24XX multi-id firmware) 1413 */ 1414 typedef struct { 1415 isphdr_t ridacq_hdr; 1416 uint32_t ridacq_handle; 1417 union { 1418 struct { 1419 uint8_t ridacq_vp_acquired; 1420 uint8_t ridacq_vp_setup; 1421 uint16_t ridacq_reserved0; 1422 } type0; /* type 0 */ 1423 struct { 1424 uint16_t ridacq_vp_count; 1425 uint8_t ridacq_vp_index; 1426 uint8_t ridacq_vp_status; 1427 } type1; /* type 1 */ 1428 } un; 1429 uint16_t ridacq_vp_port_lo; 1430 uint8_t ridacq_vp_port_hi; 1431 uint8_t ridacq_format; /* 0 or 1 */ 1432 uint16_t ridacq_map[8]; 1433 uint8_t ridacq_reserved1[32]; 1434 } isp_ridacq_t; 1435 1436 #define RIDACQ_STS_COMPLETE 0 1437 #define RIDACQ_STS_UNACQUIRED 1 1438 #define RIDACQ_STS_CHANGED 20 1439 1440 1441 /* 1442 * Simple Name Server Data Structures 1443 */ 1444 #define SNS_GA_NXT 0x100 1445 #define SNS_GPN_ID 0x112 1446 #define SNS_GNN_ID 0x113 1447 #define SNS_GFF_ID 0x11F 1448 #define SNS_GID_FT 0x171 1449 #define SNS_RFT_ID 0x217 1450 typedef struct { 1451 uint16_t snscb_rblen; /* response buffer length (words) */ 1452 uint16_t snscb_reserved0; 1453 uint16_t snscb_addr[4]; /* response buffer address */ 1454 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1455 uint16_t snscb_reserved1; 1456 uint16_t snscb_data[1]; /* variable data */ 1457 } sns_screq_t; /* Subcommand Request Structure */ 1458 1459 typedef struct { 1460 uint16_t snscb_rblen; /* response buffer length (words) */ 1461 uint16_t snscb_reserved0; 1462 uint16_t snscb_addr[4]; /* response buffer address */ 1463 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1464 uint16_t snscb_reserved1; 1465 uint16_t snscb_cmd; 1466 uint16_t snscb_reserved2; 1467 uint32_t snscb_reserved3; 1468 uint32_t snscb_port; 1469 } sns_ga_nxt_req_t; 1470 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1471 1472 typedef struct { 1473 uint16_t snscb_rblen; /* response buffer length (words) */ 1474 uint16_t snscb_reserved0; 1475 uint16_t snscb_addr[4]; /* response buffer address */ 1476 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1477 uint16_t snscb_reserved1; 1478 uint16_t snscb_cmd; 1479 uint16_t snscb_reserved2; 1480 uint32_t snscb_reserved3; 1481 uint32_t snscb_portid; 1482 } sns_gxn_id_req_t; 1483 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1484 1485 typedef struct { 1486 uint16_t snscb_rblen; /* response buffer length (words) */ 1487 uint16_t snscb_reserved0; 1488 uint16_t snscb_addr[4]; /* response buffer address */ 1489 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1490 uint16_t snscb_reserved1; 1491 uint16_t snscb_cmd; 1492 uint16_t snscb_mword_div_2; 1493 uint32_t snscb_reserved3; 1494 uint32_t snscb_fc4_type; 1495 } sns_gid_ft_req_t; 1496 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1497 1498 typedef struct { 1499 uint16_t snscb_rblen; /* response buffer length (words) */ 1500 uint16_t snscb_reserved0; 1501 uint16_t snscb_addr[4]; /* response buffer address */ 1502 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1503 uint16_t snscb_reserved1; 1504 uint16_t snscb_cmd; 1505 uint16_t snscb_reserved2; 1506 uint32_t snscb_reserved3; 1507 uint32_t snscb_port; 1508 uint32_t snscb_fc4_types[8]; 1509 } sns_rft_id_req_t; 1510 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1511 1512 typedef struct { 1513 ct_hdr_t snscb_cthdr; 1514 uint8_t snscb_port_type; 1515 uint8_t snscb_port_id[3]; 1516 uint8_t snscb_portname[8]; 1517 uint16_t snscb_data[1]; /* variable data */ 1518 } sns_scrsp_t; /* Subcommand Response Structure */ 1519 1520 typedef struct { 1521 ct_hdr_t snscb_cthdr; 1522 uint8_t snscb_port_type; 1523 uint8_t snscb_port_id[3]; 1524 uint8_t snscb_portname[8]; 1525 uint8_t snscb_pnlen; /* symbolic port name length */ 1526 uint8_t snscb_pname[255]; /* symbolic port name */ 1527 uint8_t snscb_nodename[8]; 1528 uint8_t snscb_nnlen; /* symbolic node name length */ 1529 uint8_t snscb_nname[255]; /* symbolic node name */ 1530 uint8_t snscb_ipassoc[8]; 1531 uint8_t snscb_ipaddr[16]; 1532 uint8_t snscb_svc_class[4]; 1533 uint8_t snscb_fc4_types[32]; 1534 uint8_t snscb_fpname[8]; 1535 uint8_t snscb_reserved; 1536 uint8_t snscb_hardaddr[3]; 1537 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1538 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1539 1540 typedef struct { 1541 ct_hdr_t snscb_cthdr; 1542 uint8_t snscb_wwn[8]; 1543 } sns_gxn_id_rsp_t; 1544 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1545 1546 typedef struct { 1547 ct_hdr_t snscb_cthdr; 1548 uint32_t snscb_fc4_features[32]; 1549 } sns_gff_id_rsp_t; 1550 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1551 1552 typedef struct { 1553 ct_hdr_t snscb_cthdr; 1554 struct { 1555 uint8_t control; 1556 uint8_t portid[3]; 1557 } snscb_ports[1]; 1558 } sns_gid_ft_rsp_t; 1559 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1560 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1561 1562 /* 1563 * Other Misc Structures 1564 */ 1565 1566 /* ELS Pass Through */ 1567 typedef struct { 1568 isphdr_t els_hdr; 1569 uint32_t els_handle; 1570 uint16_t els_status; 1571 uint16_t els_nphdl; 1572 uint16_t els_xmit_dsd_count; /* outgoing only */ 1573 uint8_t els_vphdl; 1574 uint8_t els_sof; 1575 uint32_t els_rxid; 1576 uint16_t els_recv_dsd_count; /* outgoing only */ 1577 uint8_t els_opcode; 1578 uint8_t els_reserved1; 1579 uint8_t els_did_lo; 1580 uint8_t els_did_mid; 1581 uint8_t els_did_hi; 1582 uint8_t els_reserved2; 1583 uint16_t els_reserved3; 1584 uint16_t els_ctl_flags; 1585 union { 1586 struct { 1587 uint32_t _els_bytecnt; 1588 uint32_t _els_subcode1; 1589 uint32_t _els_subcode2; 1590 uint8_t _els_reserved4[20]; 1591 } in; 1592 struct { 1593 uint32_t _els_recv_bytecnt; 1594 uint32_t _els_xmit_bytecnt; 1595 uint32_t _els_xmit_dsd_length; 1596 uint16_t _els_xmit_dsd_a1500; 1597 uint16_t _els_xmit_dsd_a3116; 1598 uint16_t _els_xmit_dsd_a4732; 1599 uint16_t _els_xmit_dsd_a6348; 1600 uint32_t _els_recv_dsd_length; 1601 uint16_t _els_recv_dsd_a1500; 1602 uint16_t _els_recv_dsd_a3116; 1603 uint16_t _els_recv_dsd_a4732; 1604 uint16_t _els_recv_dsd_a6348; 1605 } out; 1606 } inout; 1607 #define els_bytecnt inout.in._els_bytecnt 1608 #define els_subcode1 inout.in._els_subcode1 1609 #define els_subcode2 inout.in._els_subcode2 1610 #define els_reserved4 inout.in._els_reserved4 1611 #define els_recv_bytecnt inout.out._els_recv_bytecnt 1612 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1613 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1614 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1615 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1616 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1617 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1618 #define els_recv_dsd_length inout.out._els_recv_dsd_length 1619 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1620 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1621 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1622 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1623 } els_t; 1624 1625 /* 1626 * A handy package structure for running FC-SCSI commands internally 1627 */ 1628 typedef struct { 1629 uint16_t handle; 1630 uint16_t lun; 1631 uint32_t 1632 channel : 8, 1633 portid : 24; 1634 uint32_t timeout; 1635 union { 1636 struct { 1637 uint32_t data_length; 1638 uint32_t 1639 no_wait : 1, 1640 do_read : 1; 1641 uint8_t cdb[16]; 1642 void *data_ptr; 1643 } beg; 1644 struct { 1645 uint32_t data_residual; 1646 uint8_t status; 1647 uint8_t pad; 1648 uint16_t sense_length; 1649 uint8_t sense_data[32]; 1650 } end; 1651 } fcd; 1652 } isp_xcmd_t; 1653 1654 /* 1655 * Target Mode related definitions 1656 */ 1657 #define QLTM_SENSELEN 18 /* non-FC cards only */ 1658 #define QLTM_SVALID 0x80 1659 1660 /* 1661 * Structure for Enable Lun and Modify Lun queue entries 1662 */ 1663 typedef struct { 1664 isphdr_t le_header; 1665 uint32_t le_reserved; 1666 uint8_t le_lun; 1667 uint8_t le_rsvd; 1668 uint8_t le_ops; /* Modify LUN only */ 1669 uint8_t le_tgt; /* Not for FC */ 1670 uint32_t le_flags; /* Not for FC */ 1671 uint8_t le_status; 1672 uint8_t le_reserved2; 1673 uint8_t le_cmd_count; 1674 uint8_t le_in_count; 1675 uint8_t le_cdb6len; /* Not for FC */ 1676 uint8_t le_cdb7len; /* Not for FC */ 1677 uint16_t le_timeout; 1678 uint16_t le_reserved3[20]; 1679 } lun_entry_t; 1680 1681 /* 1682 * le_flags values 1683 */ 1684 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1685 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1686 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1687 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1688 1689 /* 1690 * le_ops values 1691 */ 1692 #define LUN_CCINCR 0x01 /* increment command count */ 1693 #define LUN_CCDECR 0x02 /* decrement command count */ 1694 #define LUN_ININCR 0x40 /* increment immed. notify count */ 1695 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 1696 1697 /* 1698 * le_status values 1699 */ 1700 #define LUN_OK 0x01 /* we be rockin' */ 1701 #define LUN_ERR 0x04 /* request completed with error */ 1702 #define LUN_INVAL 0x06 /* invalid request */ 1703 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 1704 #define LUN_ENABLED 0x3E /* LUN already enabled */ 1705 1706 /* 1707 * Immediate Notify Entry structure 1708 */ 1709 #define IN_MSGLEN 8 /* 8 bytes */ 1710 #define IN_RSVDLEN 8 /* 8 words */ 1711 typedef struct { 1712 isphdr_t in_header; 1713 uint32_t in_reserved; 1714 uint8_t in_lun; /* lun */ 1715 uint8_t in_iid; /* initiator */ 1716 uint8_t in_reserved2; 1717 uint8_t in_tgt; /* target */ 1718 uint32_t in_flags; 1719 uint8_t in_status; 1720 uint8_t in_rsvd2; 1721 uint8_t in_tag_val; /* tag value */ 1722 uint8_t in_tag_type; /* tag type */ 1723 uint16_t in_seqid; /* sequence id */ 1724 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1725 uint16_t in_reserved3[IN_RSVDLEN]; 1726 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1727 } in_entry_t; 1728 1729 typedef struct { 1730 isphdr_t in_header; 1731 uint32_t in_reserved; 1732 uint8_t in_lun; /* lun */ 1733 uint8_t in_iid; /* initiator */ 1734 uint16_t in_scclun; 1735 uint32_t in_reserved2; 1736 uint16_t in_status; 1737 uint16_t in_task_flags; 1738 uint16_t in_seqid; /* sequence id */ 1739 } in_fcentry_t; 1740 1741 typedef struct { 1742 isphdr_t in_header; 1743 uint32_t in_reserved; 1744 uint16_t in_iid; /* initiator */ 1745 uint16_t in_scclun; 1746 uint32_t in_reserved2; 1747 uint16_t in_status; 1748 uint16_t in_task_flags; 1749 uint16_t in_seqid; /* sequence id */ 1750 } in_fcentry_e_t; 1751 1752 /* 1753 * Values for the in_status field 1754 */ 1755 #define IN_REJECT 0x0D /* Message Reject message received */ 1756 #define IN_RESET 0x0E /* Bus Reset occurred */ 1757 #define IN_NO_RCAP 0x16 /* requested capability not available */ 1758 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1759 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1760 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1761 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1762 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1763 #define IN_PORT_CHANGED 0x2A /* port changed */ 1764 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1765 #define IN_NO_NEXUS 0x3B /* Nexus not established */ 1766 1767 /* 1768 * Values for the in_task_flags field- should only get one at a time! 1769 */ 1770 #define TASK_FLAGS_RESERVED_MASK (0xe700) 1771 #define TASK_FLAGS_CLEAR_ACA (1<<14) 1772 #define TASK_FLAGS_TARGET_RESET (1<<13) 1773 #define TASK_FLAGS_LUN_RESET (1<<12) 1774 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1775 #define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1776 1777 /* 1778 * ISP24XX Immediate Notify 1779 */ 1780 typedef struct { 1781 isphdr_t in_header; 1782 uint32_t in_reserved; 1783 uint16_t in_nphdl; 1784 uint16_t in_reserved1; 1785 uint16_t in_flags; 1786 uint16_t in_srr_rxid; 1787 uint16_t in_status; 1788 uint8_t in_status_subcode; 1789 uint8_t in_reserved2; 1790 uint32_t in_rxid; 1791 uint16_t in_srr_reloff_lo; 1792 uint16_t in_srr_reloff_hi; 1793 uint16_t in_srr_iu; 1794 uint16_t in_srr_oxid; 1795 /* 1796 * If bit 2 is set in in_flags, the following 1797 * two tags are valid. If the received ELS is 1798 * a LOGO, then these tags contain the N Port ID 1799 * from the LOGO payload. If the received ELS 1800 * request is TPRLO, these tags contain the 1801 * Third Party Originator N Port ID. 1802 */ 1803 uint16_t in_nport_id_hi; 1804 uint8_t in_nport_id_lo; 1805 uint8_t in_reserved3; 1806 /* 1807 * If bit 2 is set in in_flags, the following 1808 * tag is valid. If the received ELS is a LOGO, 1809 * then this tag contains the n-port handle 1810 * from the LOGO payload. If the received ELS 1811 * request is TPRLO, this tag contain the 1812 * n-port handle for the Third Party Originator. 1813 */ 1814 uint16_t in_np_handle; 1815 uint8_t in_reserved4[12]; 1816 uint8_t in_reserved5; 1817 uint8_t in_vpidx; 1818 uint32_t in_reserved6; 1819 uint16_t in_portid_lo; 1820 uint8_t in_portid_hi; 1821 uint8_t in_reserved7; 1822 uint16_t in_reserved8; 1823 uint16_t in_oxid; 1824 } in_fcentry_24xx_t; 1825 1826 #define IN24XX_FLAG_PUREX_IOCB 0x1 1827 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1828 #define IN24XX_FLAG_NPHDL_VALID 0x4 1829 1830 #define IN24XX_LIP_RESET 0x0E 1831 #define IN24XX_LINK_RESET 0x0F 1832 #define IN24XX_PORT_LOGOUT 0x29 1833 #define IN24XX_PORT_CHANGED 0x2A 1834 #define IN24XX_LINK_FAILED 0x2E 1835 #define IN24XX_SRR_RCVD 0x45 1836 #define IN24XX_ELS_RCVD 0x46 /* 1837 * login-affectin ELS received- check 1838 * subcode for specific opcode 1839 */ 1840 1841 /* 1842 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1843 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1844 * Big Endian format. 1845 */ 1846 #define IN24XX_PLOGI_WWNN_OFF 0x20 1847 #define IN24XX_PLOGI_WWPN_OFF 0x28 1848 1849 /* 1850 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1851 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1852 */ 1853 #define IN24XX_LOGO_WWPN_OFF 0x28 1854 1855 /* 1856 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1857 */ 1858 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1859 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1860 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1861 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1862 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1863 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1864 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1865 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1866 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1867 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1868 1869 /* 1870 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1871 */ 1872 #define IN24XX_PORT_CHANGED_BADFAN 0x00 1873 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1874 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1875 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1876 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1877 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1878 1879 /* 1880 * Notify Acknowledge Entry structure 1881 */ 1882 #define NA_RSVDLEN 22 1883 typedef struct { 1884 isphdr_t na_header; 1885 uint32_t na_reserved; 1886 uint8_t na_lun; /* lun */ 1887 uint8_t na_iid; /* initiator */ 1888 uint8_t na_reserved2; 1889 uint8_t na_tgt; /* target */ 1890 uint32_t na_flags; 1891 uint8_t na_status; 1892 uint8_t na_event; 1893 uint16_t na_seqid; /* sequence id */ 1894 uint16_t na_reserved3[NA_RSVDLEN]; 1895 } na_entry_t; 1896 1897 /* 1898 * Value for the na_event field 1899 */ 1900 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 1901 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 1902 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 1903 1904 #define NA2_RSVDLEN 21 1905 typedef struct { 1906 isphdr_t na_header; 1907 uint32_t na_reserved; 1908 uint8_t na_reserved1; 1909 uint8_t na_iid; /* initiator loop id */ 1910 uint16_t na_response; 1911 uint16_t na_flags; 1912 uint16_t na_reserved2; 1913 uint16_t na_status; 1914 uint16_t na_task_flags; 1915 uint16_t na_seqid; /* sequence id */ 1916 uint16_t na_reserved3[NA2_RSVDLEN]; 1917 } na_fcentry_t; 1918 1919 typedef struct { 1920 isphdr_t na_header; 1921 uint32_t na_reserved; 1922 uint16_t na_iid; /* initiator loop id */ 1923 uint16_t na_response; /* response code */ 1924 uint16_t na_flags; 1925 uint16_t na_reserved2; 1926 uint16_t na_status; 1927 uint16_t na_task_flags; 1928 uint16_t na_seqid; /* sequence id */ 1929 uint16_t na_reserved3[NA2_RSVDLEN]; 1930 } na_fcentry_e_t; 1931 1932 #define NAFC_RCOUNT 0x80 /* increment resource count */ 1933 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 1934 #define NAFC_TVALID 0x10 /* task mangement response code is valid */ 1935 1936 /* 1937 * ISP24XX Notify Acknowledge 1938 */ 1939 1940 typedef struct { 1941 isphdr_t na_header; 1942 uint32_t na_handle; 1943 uint16_t na_nphdl; 1944 uint16_t na_reserved1; 1945 uint16_t na_flags; 1946 uint16_t na_srr_rxid; 1947 uint16_t na_status; 1948 uint8_t na_status_subcode; 1949 uint8_t na_reserved2; 1950 uint32_t na_rxid; 1951 uint16_t na_srr_reloff_lo; 1952 uint16_t na_srr_reloff_hi; 1953 uint16_t na_srr_iu; 1954 uint16_t na_srr_flags; 1955 uint8_t na_reserved3[18]; 1956 uint8_t na_reserved4; 1957 uint8_t na_vpidx; 1958 uint8_t na_srr_reject_vunique; 1959 uint8_t na_srr_reject_explanation; 1960 uint8_t na_srr_reject_code; 1961 uint8_t na_reserved5; 1962 uint8_t na_reserved6[6]; 1963 uint16_t na_oxid; 1964 } na_fcentry_24xx_t; 1965 1966 /* 1967 * Accept Target I/O Entry structure 1968 */ 1969 #define ATIO_CDBLEN 26 1970 1971 typedef struct { 1972 isphdr_t at_header; 1973 uint16_t at_reserved; 1974 uint16_t at_handle; 1975 uint8_t at_lun; /* lun */ 1976 uint8_t at_iid; /* initiator */ 1977 uint8_t at_cdblen; /* cdb length */ 1978 uint8_t at_tgt; /* target */ 1979 uint32_t at_flags; 1980 uint8_t at_status; /* firmware status */ 1981 uint8_t at_scsi_status; /* scsi status */ 1982 uint8_t at_tag_val; /* tag value */ 1983 uint8_t at_tag_type; /* tag type */ 1984 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 1985 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 1986 } at_entry_t; 1987 1988 /* 1989 * at_flags values 1990 */ 1991 #define AT_NODISC 0x00008000 /* disconnect disabled */ 1992 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 1993 1994 /* 1995 * at_status values 1996 */ 1997 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 1998 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 1999 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2000 #define AT_NOCAP 0x16 /* Requested capability not available */ 2001 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2002 #define AT_CDB 0x3D /* CDB received */ 2003 /* 2004 * Macros to create and fetch and test concatenated handle and tag value macros 2005 * (SPI only) 2006 */ 2007 #define AT_MAKE_TAGID(tid, aep) \ 2008 tid = aep->at_handle; \ 2009 if (aep->at_flags & AT_TQAE) { \ 2010 tid |= (aep->at_tag_val << 16); \ 2011 tid |= (1 << 24); \ 2012 } 2013 2014 #define CT_MAKE_TAGID(tid, ct) \ 2015 tid = ct->ct_fwhandle; \ 2016 if (ct->ct_flags & CT_TQAE) { \ 2017 tid |= (ct->ct_tag_val << 16); \ 2018 tid |= (1 << 24); \ 2019 } 2020 2021 #define AT_HAS_TAG(val) ((val) & (1 << 24)) 2022 #define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2023 #define AT_GET_HANDLE(val) ((val) & 0xffff) 2024 2025 #define IN_MAKE_TAGID(tid, inp) \ 2026 tid = inp->in_seqid; \ 2027 tid |= (inp->in_tag_val << 16); \ 2028 tid |= (1 << 24) 2029 2030 /* 2031 * Accept Target I/O Entry structure, Type 2 2032 */ 2033 #define ATIO2_CDBLEN 16 2034 2035 typedef struct { 2036 isphdr_t at_header; 2037 uint32_t at_reserved; 2038 uint8_t at_lun; /* lun or reserved */ 2039 uint8_t at_iid; /* initiator */ 2040 uint16_t at_rxid; /* response ID */ 2041 uint16_t at_flags; 2042 uint16_t at_status; /* firmware status */ 2043 uint8_t at_crn; /* command reference number */ 2044 uint8_t at_taskcodes; 2045 uint8_t at_taskflags; 2046 uint8_t at_execodes; 2047 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2048 uint32_t at_datalen; /* allocated data len */ 2049 uint16_t at_scclun; /* SCC Lun or reserved */ 2050 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2051 uint16_t at_reserved2[6]; 2052 uint16_t at_oxid; 2053 } at2_entry_t; 2054 2055 typedef struct { 2056 isphdr_t at_header; 2057 uint32_t at_reserved; 2058 uint16_t at_iid; /* initiator */ 2059 uint16_t at_rxid; /* response ID */ 2060 uint16_t at_flags; 2061 uint16_t at_status; /* firmware status */ 2062 uint8_t at_crn; /* command reference number */ 2063 uint8_t at_taskcodes; 2064 uint8_t at_taskflags; 2065 uint8_t at_execodes; 2066 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2067 uint32_t at_datalen; /* allocated data len */ 2068 uint16_t at_scclun; /* SCC Lun or reserved */ 2069 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2070 uint16_t at_reserved2[6]; 2071 uint16_t at_oxid; 2072 } at2e_entry_t; 2073 2074 #define ATIO2_WWPN_OFFSET 0x2A 2075 #define ATIO2_OXID_OFFSET 0x3E 2076 2077 #define ATIO2_TC_ATTR_MASK 0x7 2078 #define ATIO2_TC_ATTR_SIMPLEQ 0 2079 #define ATIO2_TC_ATTR_HEADOFQ 1 2080 #define ATIO2_TC_ATTR_ORDERED 2 2081 #define ATIO2_TC_ATTR_ACAQ 4 2082 #define ATIO2_TC_ATTR_UNTAGGED 5 2083 2084 #define ATIO2_EX_WRITE 0x1 2085 #define ATIO2_EX_READ 0x2 2086 /* 2087 * Macros to create and fetch and test concatenated handle and tag value macros 2088 */ 2089 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2090 tid = aep->at_rxid; \ 2091 tid |= (((uint64_t)inst) << 32); \ 2092 tid |= (((uint64_t)bus) << 48) 2093 2094 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2095 tid = ct->ct_rxid; \ 2096 tid |= (((uint64_t)inst) << 32); \ 2097 tid |= (((uint64_t)(bus & 0xff)) << 48) 2098 2099 #define AT2_HAS_TAG(val) 1 2100 #define AT2_GET_TAG(val) ((val) & 0xffffffff) 2101 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2102 #define AT2_GET_HANDLE AT2_GET_TAG 2103 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2104 2105 #define FC_HAS_TAG AT2_HAS_TAG 2106 #define FC_GET_TAG AT2_GET_TAG 2107 #define FC_GET_INST AT2_GET_INST 2108 #define FC_GET_HANDLE AT2_GET_HANDLE 2109 2110 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2111 tid = seqid; \ 2112 tid |= (((uint64_t)inst) << 32); \ 2113 tid |= (((uint64_t)(bus & 0xff)) << 48) 2114 2115 #define FC_TAG_INSERT_INST(tid, inst) \ 2116 tid &= ~0x0000ffff00000000ull; \ 2117 tid |= (((uint64_t)inst) << 32) 2118 2119 /* 2120 * 24XX ATIO Definition 2121 * 2122 * This is *quite* different from other entry types. 2123 * First of all, it has its own queue it comes in on. 2124 * 2125 * Secondly, it doesn't have a normal header. 2126 * 2127 * Thirdly, it's just a passthru of the FCP CMND IU 2128 * which is recorded in big endian mode. 2129 */ 2130 typedef struct { 2131 uint8_t at_type; 2132 uint8_t at_count; 2133 /* 2134 * Task attribute in high four bits, 2135 * the rest is the FCP CMND IU Length. 2136 * NB: the command can extend past the 2137 * length for a single queue entry. 2138 */ 2139 uint16_t at_ta_len; 2140 uint32_t at_rxid; 2141 fc_hdr_t at_hdr; 2142 fcp_cmnd_iu_t at_cmnd; 2143 } at7_entry_t; 2144 #define AT7_NORESRC_RXID 0xffffffff 2145 2146 2147 /* 2148 * Continue Target I/O Entry structure 2149 * Request from driver. The response from the 2150 * ISP firmware is the same except that the last 18 2151 * bytes are overwritten by suggested sense data if 2152 * the 'autosense valid' bit is set in the status byte. 2153 */ 2154 typedef struct { 2155 isphdr_t ct_header; 2156 uint16_t ct_syshandle; 2157 uint16_t ct_fwhandle; /* required by f/w */ 2158 uint8_t ct_lun; /* lun */ 2159 uint8_t ct_iid; /* initiator id */ 2160 uint8_t ct_reserved2; 2161 uint8_t ct_tgt; /* our target id */ 2162 uint32_t ct_flags; 2163 uint8_t ct_status; /* isp status */ 2164 uint8_t ct_scsi_status; /* scsi status */ 2165 uint8_t ct_tag_val; /* tag value */ 2166 uint8_t ct_tag_type; /* tag type */ 2167 uint32_t ct_xfrlen; /* transfer length */ 2168 int32_t ct_resid; /* residual length */ 2169 uint16_t ct_timeout; 2170 uint16_t ct_seg_count; 2171 ispds_t ct_dataseg[ISP_RQDSEG]; 2172 } ct_entry_t; 2173 2174 /* 2175 * For some of the dual port SCSI adapters, port (bus #) is reported 2176 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2177 * 2178 * Note that this does not apply to FC adapters at all which can and 2179 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2180 * that have logged in across a SCSI fabric. 2181 */ 2182 #define GET_IID_VAL(x) (x & 0x3f) 2183 #define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2184 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2185 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2186 2187 /* 2188 * ct_flags values 2189 */ 2190 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2191 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction */ 2192 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction */ 2193 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2194 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2195 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2196 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2197 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2198 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2199 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2200 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2201 2202 /* 2203 * ct_status values 2204 * - set by the firmware when it returns the CTIO 2205 */ 2206 #define CT_OK 0x01 /* completed without error */ 2207 #define CT_ABORTED 0x02 /* aborted by host */ 2208 #define CT_ERR 0x04 /* see sense data for error */ 2209 #define CT_INVAL 0x06 /* request for disabled lun */ 2210 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 2211 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2212 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2213 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2214 #define CT_TIMEOUT 0x0B /* timed out */ 2215 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2216 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2217 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2218 #define CT_PANIC 0x13 /* Unrecoverable Error */ 2219 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2220 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2221 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2222 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2223 #define CT_PORTUNAVAIL 0x28 /* port not available */ 2224 #define CT_LOGOUT 0x29 /* port logout */ 2225 #define CT_PORTCHANGED 0x2A /* port changed */ 2226 #define CT_IDE 0x33 /* Initiator Detected Error */ 2227 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2228 #define CT_SRR 0x45 /* SRR Received */ 2229 #define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2230 2231 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2232 2233 /* 2234 * When the firmware returns a CTIO entry, it may overwrite the last 2235 * part of the structure with sense data. This starts at offset 0x2E 2236 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2237 * than define a new struct for this, I'm just using the sense data 2238 * offset. 2239 */ 2240 #define CTIO_SENSE_OFFSET 0x2E 2241 2242 /* 2243 * Entry length in u_longs. All entries are the same size so 2244 * any one will do as the numerator. 2245 */ 2246 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2247 2248 /* 2249 * QLA2100 CTIO (type 2) entry 2250 */ 2251 #define MAXRESPLEN 26 2252 typedef struct { 2253 isphdr_t ct_header; 2254 uint32_t ct_syshandle; 2255 uint8_t ct_lun; /* lun */ 2256 uint8_t ct_iid; /* initiator id */ 2257 uint16_t ct_rxid; /* response ID */ 2258 uint16_t ct_flags; 2259 uint16_t ct_status; /* isp status */ 2260 uint16_t ct_timeout; 2261 uint16_t ct_seg_count; 2262 uint32_t ct_reloff; /* relative offset */ 2263 int32_t ct_resid; /* residual length */ 2264 union { 2265 /* 2266 * The three different modes that the target driver 2267 * can set the CTIO{2,3,4} up as. 2268 * 2269 * The first is for sending FCP_DATA_IUs as well as 2270 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2271 * 2272 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2273 * Note that no FCP_DATA_IUs will be sent. 2274 * 2275 * The third is for sending FCP_RSP_IUs as built specifically 2276 * in system memory as located by the isp_dataseg. 2277 */ 2278 struct { 2279 uint32_t _reserved; 2280 uint16_t _reserved2; 2281 uint16_t ct_scsi_status; 2282 uint32_t ct_xfrlen; 2283 union { 2284 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2285 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2286 ispdslist_t ct_dslist; 2287 } u; 2288 } m0; 2289 struct { 2290 uint16_t _reserved; 2291 uint16_t _reserved2; 2292 uint16_t ct_senselen; 2293 uint16_t ct_scsi_status; 2294 uint16_t ct_resplen; 2295 uint8_t ct_resp[MAXRESPLEN]; 2296 } m1; 2297 struct { 2298 uint32_t _reserved; 2299 uint16_t _reserved2; 2300 uint16_t _reserved3; 2301 uint32_t ct_datalen; 2302 ispds_t ct_fcp_rsp_iudata; 2303 } m2; 2304 } rsp; 2305 } ct2_entry_t; 2306 2307 typedef struct { 2308 isphdr_t ct_header; 2309 uint32_t ct_syshandle; 2310 uint16_t ct_iid; /* initiator id */ 2311 uint16_t ct_rxid; /* response ID */ 2312 uint16_t ct_flags; 2313 uint16_t ct_status; /* isp status */ 2314 uint16_t ct_timeout; 2315 uint16_t ct_seg_count; 2316 uint32_t ct_reloff; /* relative offset */ 2317 int32_t ct_resid; /* residual length */ 2318 union { 2319 struct { 2320 uint32_t _reserved; 2321 uint16_t _reserved2; 2322 uint16_t ct_scsi_status; 2323 uint32_t ct_xfrlen; 2324 union { 2325 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2326 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2327 ispdslist_t ct_dslist; 2328 } u; 2329 } m0; 2330 struct { 2331 uint16_t _reserved; 2332 uint16_t _reserved2; 2333 uint16_t ct_senselen; 2334 uint16_t ct_scsi_status; 2335 uint16_t ct_resplen; 2336 uint8_t ct_resp[MAXRESPLEN]; 2337 } m1; 2338 struct { 2339 uint32_t _reserved; 2340 uint16_t _reserved2; 2341 uint16_t _reserved3; 2342 uint32_t ct_datalen; 2343 ispds_t ct_fcp_rsp_iudata; 2344 } m2; 2345 } rsp; 2346 } ct2e_entry_t; 2347 2348 /* 2349 * ct_flags values for CTIO2 2350 */ 2351 #define CT2_FLAG_MODE0 0x0000 2352 #define CT2_FLAG_MODE1 0x0001 2353 #define CT2_FLAG_MODE2 0x0002 2354 #define CT2_FLAG_MMASK 0x0003 2355 #define CT2_DATA_IN 0x0040 2356 #define CT2_DATA_OUT 0x0080 2357 #define CT2_NO_DATA 0x00C0 2358 #define CT2_DATAMASK 0x00C0 2359 #define CT2_CCINCR 0x0100 2360 #define CT2_FASTPOST 0x0200 2361 #define CT2_CONFIRM 0x2000 2362 #define CT2_TERMINATE 0x4000 2363 #define CT2_SENDSTATUS 0x8000 2364 2365 /* 2366 * ct_status values are (mostly) the same as that for ct_entry. 2367 */ 2368 2369 /* 2370 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2371 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2372 * fields. 2373 */ 2374 #define CT2_RSPLEN_VALID 0x0100 2375 #define CT2_SNSLEN_VALID 0x0200 2376 #define CT2_DATA_OVER 0x0400 2377 #define CT2_DATA_UNDER 0x0800 2378 2379 /* 2380 * ISP24XX CTIO 2381 */ 2382 #define MAXRESPLEN_24XX 24 2383 typedef struct { 2384 isphdr_t ct_header; 2385 uint32_t ct_syshandle; 2386 uint16_t ct_nphdl; /* status on returned CTIOs */ 2387 uint16_t ct_timeout; 2388 uint16_t ct_seg_count; 2389 uint8_t ct_vpidx; 2390 uint8_t ct_xflags; 2391 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2392 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2393 uint8_t ct_reserved; 2394 uint32_t ct_rxid; 2395 uint16_t ct_senselen; /* mode 1 only */ 2396 uint16_t ct_flags; 2397 int32_t ct_resid; /* residual length */ 2398 uint16_t ct_oxid; 2399 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2400 union { 2401 struct { 2402 uint32_t reloff; 2403 uint32_t reserved0; 2404 uint32_t ct_xfrlen; 2405 uint32_t reserved1; 2406 ispds64_t ds; 2407 } m0; 2408 struct { 2409 uint16_t ct_resplen; 2410 uint16_t reserved; 2411 uint8_t ct_resp[MAXRESPLEN_24XX]; 2412 } m1; 2413 struct { 2414 uint32_t reserved0; 2415 uint32_t ct_datalen; 2416 uint32_t reserved1; 2417 ispds64_t ct_fcp_rsp_iudata; 2418 } m2; 2419 } rsp; 2420 } ct7_entry_t; 2421 2422 /* 2423 * ct_flags values for CTIO7 2424 */ 2425 #define CT7_DATA_IN 0x0002 2426 #define CT7_DATA_OUT 0x0001 2427 #define CT7_NO_DATA 0x0000 2428 #define CT7_DATAMASK 0x003 2429 #define CT7_DSD_ENABLE 0x0004 2430 #define CT7_CONF_STSFD 0x0010 2431 #define CT7_EXPLCT_CONF 0x0020 2432 #define CT7_FLAG_MODE0 0x0000 2433 #define CT7_FLAG_MODE1 0x0040 2434 #define CT7_FLAG_MODE2 0x0080 2435 #define CT7_FLAG_MMASK 0x00C0 2436 #define CT7_NOACK 0x0100 2437 #define CT7_TASK_ATTR_SHIFT 9 2438 #define CT7_CONFIRM 0x2000 2439 #define CT7_TERMINATE 0x4000 2440 #define CT7_SENDSTATUS 0x8000 2441 2442 /* 2443 * Type 7 CTIO status codes 2444 */ 2445 #define CT7_OK 0x01 /* completed without error */ 2446 #define CT7_ABORTED 0x02 /* aborted by host */ 2447 #define CT7_ERR 0x04 /* see sense data for error */ 2448 #define CT7_INVAL 0x06 /* request for disabled lun */ 2449 #define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2450 #define CT7_DATA_OVER 0x09 /* Data Overrun */ 2451 #define CT7_TIMEOUT 0x0B /* timed out */ 2452 #define CT7_RESET 0x0E /* LIP Rset Received */ 2453 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2454 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2455 #define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2456 #define CT7_PORTUNAVAIL 0x28 /* port not available */ 2457 #define CT7_LOGOUT 0x29 /* port logout */ 2458 #define CT7_PORTCHANGED 0x2A /* port changed */ 2459 #define CT7_SRR 0x45 /* SRR Received */ 2460 2461 /* 2462 * Other 24XX related target IOCBs 2463 */ 2464 2465 /* 2466 * ABTS Received 2467 */ 2468 typedef struct { 2469 isphdr_t abts_header; 2470 uint8_t abts_reserved0[6]; 2471 uint16_t abts_nphdl; 2472 uint16_t abts_reserved1; 2473 uint16_t abts_sof; 2474 uint32_t abts_rxid_abts; 2475 uint16_t abts_did_lo; 2476 uint8_t abts_did_hi; 2477 uint8_t abts_r_ctl; 2478 uint16_t abts_sid_lo; 2479 uint8_t abts_sid_hi; 2480 uint8_t abts_cs_ctl; 2481 uint16_t abts_fs_ctl; 2482 uint8_t abts_f_ctl; 2483 uint8_t abts_type; 2484 uint16_t abts_seq_cnt; 2485 uint8_t abts_df_ctl; 2486 uint8_t abts_seq_id; 2487 uint16_t abts_rx_id; 2488 uint16_t abts_ox_id; 2489 uint32_t abts_param; 2490 uint8_t abts_reserved2[16]; 2491 uint32_t abts_rxid_task; 2492 } abts_t; 2493 2494 typedef struct { 2495 isphdr_t abts_rsp_header; 2496 uint32_t abts_rsp_handle; 2497 uint16_t abts_rsp_status; 2498 uint16_t abts_rsp_nphdl; 2499 uint16_t abts_rsp_ctl_flags; 2500 uint16_t abts_rsp_sof; 2501 uint32_t abts_rsp_rxid_abts; 2502 uint16_t abts_rsp_did_lo; 2503 uint8_t abts_rsp_did_hi; 2504 uint8_t abts_rsp_r_ctl; 2505 uint16_t abts_rsp_sid_lo; 2506 uint8_t abts_rsp_sid_hi; 2507 uint8_t abts_rsp_cs_ctl; 2508 uint16_t abts_rsp_f_ctl_lo; 2509 uint8_t abts_rsp_f_ctl_hi; 2510 uint8_t abts_rsp_type; 2511 uint16_t abts_rsp_seq_cnt; 2512 uint8_t abts_rsp_df_ctl; 2513 uint8_t abts_rsp_seq_id; 2514 uint16_t abts_rsp_rx_id; 2515 uint16_t abts_rsp_ox_id; 2516 uint32_t abts_rsp_param; 2517 union { 2518 struct { 2519 uint16_t reserved; 2520 uint8_t last_seq_id; 2521 uint8_t seq_id_valid; 2522 uint16_t aborted_rx_id; 2523 uint16_t aborted_ox_id; 2524 uint16_t high_seq_cnt; 2525 uint16_t low_seq_cnt; 2526 uint8_t reserved2[4]; 2527 } ba_acc; 2528 struct { 2529 uint8_t vendor_unique; 2530 uint8_t explanation; 2531 uint8_t reason; 2532 uint8_t reserved; 2533 uint8_t reserved2[12]; 2534 } ba_rjt; 2535 struct { 2536 uint8_t reserved[8]; 2537 uint32_t subcode1; 2538 uint32_t subcode2; 2539 } rsp; 2540 uint8_t reserved[16]; 2541 } abts_rsp_payload; 2542 uint32_t abts_rsp_rxid_task; 2543 } abts_rsp_t; 2544 2545 /* terminate this ABTS exchange */ 2546 #define ISP24XX_ABTS_RSP_TERMINATE 0x01 2547 2548 #define ISP24XX_ABTS_RSP_COMPLETE 0x00 2549 #define ISP24XX_ABTS_RSP_RESET 0x04 2550 #define ISP24XX_ABTS_RSP_ABORTED 0x05 2551 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2552 #define ISP24XX_ABTS_RSP_INVXID 0x08 2553 #define ISP24XX_ABTS_RSP_LOGOUT 0x29 2554 #define ISP24XX_ABTS_RSP_SUBCODE 0x31 2555 2556 #define ISP24XX_NO_TASK 0xffffffff 2557 2558 /* 2559 * Miscellaneous 2560 * 2561 * These are the limits of the number of dma segments we 2562 * can deal with based not on the size of the segment counter 2563 * (which is 16 bits), but on the size of the number of 2564 * queue entries field (which is 8 bits). We assume no 2565 * segments in the first queue entry, so we can either 2566 * have 7 dma segments per continuation entry or 5 2567 * (for 64 bit dma).. multiplying out by 254.... 2568 */ 2569 #define ISP_NSEG_MAX 1778 2570 #define ISP_NSEG64_MAX 1270 2571 2572 #endif /* _ISPMBOX_H */ 2573
Indexes created Sat Sep 27 22:09:54 GMT 2025