lemac.c revision 1.14 1 /* $NetBSD: lemac.c,v 1.14 2000/05/12 16:45:42 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1994, 1995, 1997 Matt Thomas <matt (at) 3am-software.com>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. The name of the author may not be used to endorse or promote products
13 * derived from this software withough specific prior written permission
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 /*
28 * DEC EtherWORKS 3 Ethernet Controllers
29 *
30 * Written by Matt Thomas
31 * BPF support code stolen directly from if_ec.c
32 *
33 * This driver supports the LEMAC DE203/204/205 cards.
34 */
35
36 #include "opt_inet.h"
37 #include "opt_ns.h"
38 #include "rnd.h"
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/mbuf.h>
43 #include <sys/protosw.h>
44 #include <sys/socket.h>
45 #include <sys/sockio.h>
46 #include <sys/errno.h>
47 #include <sys/malloc.h>
48 #include <sys/device.h>
49 #if NRND > 0
50 #include <sys/rnd.h>
51 #endif
52
53 #include <net/if.h>
54 #include <net/if_types.h>
55 #include <net/if_dl.h>
56 #include <net/route.h>
57 #include <net/if_ether.h>
58 #include <net/if_media.h>
59
60 #ifdef INET
61 #include <netinet/in.h>
62 #include <netinet/in_systm.h>
63 #include <netinet/in_var.h>
64 #include <netinet/ip.h>
65 #include <netinet/if_inarp.h>
66 #endif
67
68 #ifdef NS
69 #include <netns/ns.h>
70 #include <netns/ns_if.h>
71 #endif
72
73 #include <machine/bus.h>
74
75 #include <dev/ic/lemacreg.h>
76 #include <dev/ic/lemacvar.h>
77 #if 0
78 #include <i386/isa/decether.h>
79 #endif
80
81 #include <vm/vm.h>
82
83 #include "bpfilter.h"
84 #if NBPFILTER > 0
85 #include <net/bpf.h>
86 #endif
87
88 static void lemac_init(lemac_softc_t *sc);
89 static void lemac_ifstart(struct ifnet *ifp);
90 static void lemac_reset(lemac_softc_t *sc);
91 static void lemac_rne_intr(lemac_softc_t *sc);
92 static void lemac_tne_intr(lemac_softc_t *sc);
93 static void lemac_txd_intr(lemac_softc_t *sc, unsigned cs_value);
94 static void lemac_rxd_intr(lemac_softc_t *sc, unsigned cs_value);
95 static int lemac_read_eeprom(lemac_softc_t *sc);
96 static void lemac_init_adapmem(lemac_softc_t *sc);
97
98 static const u_int16_t lemac_allmulti_mctbl[16] = {
99 0xFFFFU, 0xFFFFU, 0xFFFFU, 0xFFFFU,
100 0xFFFFU, 0xFFFFU, 0xFFFFU, 0xFFFFU,
101 0xFFFFU, 0xFFFFU, 0xFFFFU, 0xFFFFU,
102 0xFFFFU, 0xFFFFU, 0xFFFFU, 0xFFFFU,
103 };
104
105 /*
106 * Some tuning/monitoring variables.
107 */
108 unsigned lemac_txmax = 16;
109
110 static void
112 lemac_rxd_intr(
113 lemac_softc_t *sc,
114 unsigned cs_value)
115 {
116 /*
117 * Handle CS_RXD (Receiver disabled) here.
118 *
119 * Check Free Memory Queue Count. If not equal to zero
120 * then just turn Receiver back on. If it is equal to
121 * zero then check to see if transmitter is disabled.
122 * Process transmit TXD loop once more. If all else
123 * fails then do software init (0xC0 to EEPROM Init)
124 * and rebuild Free Memory Queue.
125 */
126
127 sc->sc_cntrs.cntr_rxd_intrs++;
128
129 /*
130 * Re-enable Receiver.
131 */
132
133 cs_value &= ~LEMAC_CS_RXD;
134 LEMAC_OUTB(sc, LEMAC_REG_CS, cs_value);
135
136 if (LEMAC_INB(sc, LEMAC_REG_FMC) > 0)
137 return;
138
139 if (cs_value & LEMAC_CS_TXD)
140 lemac_txd_intr(sc, cs_value);
141
142 if ((LEMAC_INB(sc, LEMAC_REG_CS) & LEMAC_CS_RXD) == 0)
143 return;
144
145 printf("%s: fatal RXD error, attempting recovery\n", sc->sc_if.if_xname);
146
147 lemac_reset(sc);
148 if (sc->sc_if.if_flags & IFF_UP) {
149 lemac_init(sc);
150 return;
151 }
152
153 /*
154 * Error during initializion. Mark card as disabled.
155 */
156 printf("%s: recovery failed -- board disabled\n", sc->sc_if.if_xname);
157 }
158
159 static void
161 lemac_tne_intr(
162 lemac_softc_t *sc)
163 {
164 unsigned txcount = LEMAC_INB(sc, LEMAC_REG_TDC);
165
166 sc->sc_cntrs.cntr_tne_intrs++;
167 while (txcount-- > 0) {
168 unsigned txsts = LEMAC_INB(sc, LEMAC_REG_TDQ);
169 sc->sc_if.if_opackets++; /* another one done */
170 if ((txsts & (LEMAC_TDQ_LCL|LEMAC_TDQ_NCL))
171 || (txsts & LEMAC_TDQ_COL) == LEMAC_TDQ_EXCCOL) {
172 if (txsts & LEMAC_TDQ_NCL)
173 sc->sc_flags &= ~LEMAC_LINKUP;
174 sc->sc_if.if_oerrors++;
175 } else {
176 sc->sc_flags |= LEMAC_LINKUP;
177 if ((txsts & LEMAC_TDQ_COL) != LEMAC_TDQ_NOCOL)
178 sc->sc_if.if_collisions++;
179 }
180 }
181 sc->sc_if.if_flags &= ~IFF_OACTIVE;
182 lemac_ifstart(&sc->sc_if);
183 }
184
185 static void
186 lemac_txd_intr(
187 lemac_softc_t *sc,
188 unsigned cs_value)
189 {
190 /*
191 * Read transmit status, remove transmit buffer from
192 * transmit queue and place on free memory queue,
193 * then reset transmitter.
194 * Increment appropriate counters.
195 */
196
197 sc->sc_cntrs.cntr_txd_intrs++;
198 if (sc->sc_txctl & LEMAC_TX_STP) {
199 sc->sc_if.if_oerrors++;
200 /* return page to free queue */
201 LEMAC_OUTB(sc, LEMAC_REG_FMQ, LEMAC_INB(sc, LEMAC_REG_TDQ));
202 }
203
204 /* Turn back on transmitter if disabled */
205 LEMAC_OUTB(sc, LEMAC_REG_CS, cs_value & ~LEMAC_CS_TXD);
206 sc->sc_if.if_flags &= ~IFF_OACTIVE;
207 }
208
209 static int
211 lemac_read_eeprom(
212 lemac_softc_t *sc)
213 {
214 int word_off, cksum;
215
216 u_char *ep;
217
218 cksum = 0;
219 ep = sc->sc_eeprom;
220 for (word_off = 0; word_off < LEMAC_EEP_SIZE / 2; word_off++) {
221 LEMAC_OUTB(sc, LEMAC_REG_PI1, word_off);
222 LEMAC_OUTB(sc, LEMAC_REG_IOP, LEMAC_IOP_EEREAD);
223
224 DELAY(LEMAC_EEP_DELAY);
225
226 *ep = LEMAC_INB(sc, LEMAC_REG_EE1); cksum += *ep++;
227 *ep = LEMAC_INB(sc, LEMAC_REG_EE2); cksum += *ep++;
228 }
229
230 /*
231 * Set up Transmit Control Byte for use later during transmit.
232 */
233
234 sc->sc_txctl |= LEMAC_TX_FLAGS;
235
236 if ((sc->sc_eeprom[LEMAC_EEP_SWFLAGS] & LEMAC_EEP_SW_SQE) == 0)
237 sc->sc_txctl &= ~LEMAC_TX_SQE;
238
239 if (sc->sc_eeprom[LEMAC_EEP_SWFLAGS] & LEMAC_EEP_SW_LAB)
240 sc->sc_txctl |= LEMAC_TX_LAB;
241
242 bcopy(&sc->sc_eeprom[LEMAC_EEP_PRDNM], sc->sc_prodname, LEMAC_EEP_PRDNMSZ);
243 sc->sc_prodname[LEMAC_EEP_PRDNMSZ] = '\0';
244
245 return cksum % 256;
246 }
247
248 static void
250 lemac_init_adapmem(
251 lemac_softc_t *sc)
252 {
253 int pg, conf;
254
255 conf = LEMAC_INB(sc, LEMAC_REG_CNF);
256
257 if ((sc->sc_eeprom[LEMAC_EEP_SETUP] & LEMAC_EEP_ST_DRAM) == 0) {
258 sc->sc_lastpage = 63;
259 conf &= ~LEMAC_CNF_DRAM;
260 } else {
261 sc->sc_lastpage = 127;
262 conf |= LEMAC_CNF_DRAM;
263 }
264
265 LEMAC_OUTB(sc, LEMAC_REG_CNF, conf);
266
267 for (pg = 1; pg <= sc->sc_lastpage; pg++)
268 LEMAC_OUTB(sc, LEMAC_REG_FMQ, pg);
269 }
270
271 static void
273 lemac_input(
274 lemac_softc_t *sc,
275 bus_addr_t offset,
276 size_t length)
277 {
278 struct ether_header eh;
279 struct mbuf *m;
280
281 if (length - sizeof(eh) > ETHERMTU
282 || length - sizeof(eh) < ETHERMIN) {
283 sc->sc_if.if_ierrors++;
284 return;
285 }
286 if (LEMAC_USE_PIO_MODE(sc)) {
287 LEMAC_INSB(sc, LEMAC_REG_DAT, sizeof(eh), (void *) &eh);
288 } else {
289 LEMAC_GETBUF16(sc, offset, sizeof(eh) / 2, (void *) &eh);
290 }
291
292 /*
293 * If this is single cast but not to us
294 * drop it!
295 */
296 if ((eh.ether_dhost[0] & 1) == 0
297 #if NBPFILTER > 0
298 && (sc->sc_if.if_flags & IFF_PROMISC) == 0
299 #endif
300 && !LEMAC_ADDREQUAL(eh.ether_dhost, sc->sc_enaddr))
301 return;
302
303 MGETHDR(m, M_DONTWAIT, MT_DATA);
304 if (m == NULL) {
305 sc->sc_if.if_ierrors++;
306 return;
307 }
308 if (length + 2 > MHLEN) {
309 MCLGET(m, M_DONTWAIT);
310 if ((m->m_flags & M_EXT) == 0) {
311 m_free(m);
312 sc->sc_if.if_ierrors++;
313 return;
314 }
315 }
316 m->m_data += 2;
317 bcopy((caddr_t)&eh, m->m_data, sizeof(eh));
318 if (LEMAC_USE_PIO_MODE(sc)) {
319 LEMAC_INSB(sc, LEMAC_REG_DAT, length - sizeof(eh),
320 mtod(m, caddr_t) + sizeof(eh));
321 } else {
322 LEMAC_GETBUF16(sc, offset + sizeof(eh), (length - sizeof(eh)) / 2,
323 (void *) (mtod(m, caddr_t) + sizeof(eh)));
324 if (length & 1)
325 m->m_data[length - 1] = LEMAC_GET8(sc, offset + length - 1);
326 }
327 #if NBPFILTER > 0
328 if (sc->sc_if.if_bpf != NULL) {
329 m->m_pkthdr.len = m->m_len = length;
330 bpf_mtap(sc->sc_if.if_bpf, m);
331 }
332 /*
333 * If this is single cast but not to us
334 * drop it!
335 */
336 if ((eh.ether_dhost[0] & 1) == 0
337 && !LEMAC_ADDREQUAL(eh.ether_dhost, sc->sc_enaddr)) {
338 m_freem(m);
339 return;
340 }
341 #endif
342 m->m_pkthdr.len = m->m_len = length;
343 m->m_pkthdr.rcvif = &sc->sc_if;
344 (*sc->sc_if.if_input)(&sc->sc_if, m);
345 }
346
347 static void
349 lemac_rne_intr(
350 lemac_softc_t *sc)
351 {
352 int rxcount;
353
354 sc->sc_cntrs.cntr_rne_intrs++;
355 rxcount = LEMAC_INB(sc, LEMAC_REG_RQC);
356 while (rxcount--) {
357 unsigned rxpg = LEMAC_INB(sc, LEMAC_REG_RQ);
358 u_int32_t rxlen;
359
360 sc->sc_if.if_ipackets++;
361 if (LEMAC_USE_PIO_MODE(sc)) {
362 LEMAC_OUTB(sc, LEMAC_REG_IOP, rxpg);
363 LEMAC_OUTB(sc, LEMAC_REG_PI1, 0);
364 LEMAC_OUTB(sc, LEMAC_REG_PI2, 0);
365 LEMAC_INSB(sc, LEMAC_REG_DAT, sizeof(rxlen), (void *) &rxlen);
366 } else {
367 LEMAC_OUTB(sc, LEMAC_REG_MPN, rxpg);
368 rxlen = LEMAC_GET32(sc, 0);
369 }
370 if (rxlen & LEMAC_RX_OK) {
371 sc->sc_flags |= LEMAC_LINKUP;
372 /*
373 * Get receive length - subtract out checksum.
374 */
375 rxlen = ((rxlen >> 8) & 0x7FF) - 4;
376 lemac_input(sc, sizeof(rxlen), rxlen);
377 } else {
378 sc->sc_if.if_ierrors++;
379 }
380 LEMAC_OUTB(sc, LEMAC_REG_FMQ, rxpg); /* Return this page to Free Memory Queue */
381 } /* end while (recv_count--) */
382
383 return;
384 }
385
386 /*
388 * This is the standard method of reading the DEC Address ROMS.
389 * I don't understand it but it does work.
390 */
391 static int
392 lemac_read_macaddr(
393 unsigned char *hwaddr,
394 const bus_space_tag_t iot,
395 const bus_space_handle_t ioh,
396 const bus_addr_t ioreg,
397 int skippat)
398 {
399 int cksum, rom_cksum;
400 unsigned char addrbuf[6];
401
402 if (!skippat) {
403 int idx, idx2, found, octet;
404 static u_char testpat[] = { 0xFF, 0, 0x55, 0xAA, 0xFF, 0, 0x55, 0xAA };
405 idx2 = found = 0;
406
407 for (idx = 0; idx < 32; idx++) {
408 octet = bus_space_read_1(iot, ioh, ioreg);
409
410 if (octet == testpat[idx2]) {
411 if (++idx2 == sizeof(testpat)) {
412 ++found;
413 break;
414 }
415 } else {
416 idx2 = 0;
417 }
418 }
419
420 if (!found)
421 return -1;
422 }
423
424 if (hwaddr == NULL)
425 hwaddr = addrbuf;
426
427 cksum = 0;
428 hwaddr[0] = bus_space_read_1(iot, ioh, ioreg);
429 hwaddr[1] = bus_space_read_1(iot, ioh, ioreg);
430
431 /* hardware adddress can't be multicast */
432 if (hwaddr[0] & 1)
433 return -1;
434
435 cksum = *(u_short *) &hwaddr[0];
436
437 hwaddr[2] = bus_space_read_1(iot, ioh, ioreg);
438 hwaddr[3] = bus_space_read_1(iot, ioh, ioreg);
439 cksum *= 2;
440 if (cksum > 65535) cksum -= 65535;
441 cksum += *(u_short *) &hwaddr[2];
442 if (cksum > 65535) cksum -= 65535;
443
444 hwaddr[4] = bus_space_read_1(iot, ioh, ioreg);
445 hwaddr[5] = bus_space_read_1(iot, ioh, ioreg);
446 cksum *= 2;
447 if (cksum > 65535) cksum -= 65535;
448 cksum += *(u_short *) &hwaddr[4];
449 if (cksum >= 65535) cksum -= 65535;
450
451 /* 00-00-00 is an illegal OUI */
452 if (hwaddr[0] == 0 && hwaddr[1] == 0 && hwaddr[2] == 0)
453 return -1;
454
455 rom_cksum = bus_space_read_1(iot, ioh, ioreg);
456 rom_cksum |= bus_space_read_1(iot, ioh, ioreg) << 8;
457
458 if (cksum != rom_cksum)
459 return -1;
460 return 0;
461 }
462
463 static void
465 lemac_multicast_op(
466 u_int16_t *mctbl,
467 const u_char *mca,
468 int enable)
469 {
470 u_int idx, bit, crc;
471
472 crc = ether_crc32_le(mca, ETHER_ADDR_LEN);
473
474 /*
475 * The following two lines convert the N bit index into a longword index
476 * and a longword mask.
477 */
478 #if LEMAC_MCTBL_BITS < 0
479 crc >>= (32 + LEMAC_MCTBL_BITS);
480 crc &= (1 << -LEMAC_MCTBL_BITS) - 1;
481 #else
482 crc &= (1 << LEMAC_MCTBL_BITS) - 1;
483 #endif
484 bit = 1 << (crc & 0x0F);
485 idx = crc >> 4;
486
487 /*
488 * Set or clear hash filter bit in our table.
489 */
490 if (enable) {
491 mctbl[idx] |= bit; /* Set Bit */
492 } else {
493 mctbl[idx] &= ~bit; /* Clear Bit */
494 }
495 }
496
497 static void
499 lemac_multicast_filter(
500 lemac_softc_t *sc)
501 {
502 struct ether_multistep step;
503 struct ether_multi *enm;
504
505 bzero(sc->sc_mctbl, LEMAC_MCTBL_BITS / 8);
506
507 lemac_multicast_op(sc->sc_mctbl, etherbroadcastaddr, TRUE);
508
509 ETHER_FIRST_MULTI(step, &sc->sc_ec, enm);
510 while (enm != NULL) {
511 if (!LEMAC_ADDREQUAL(enm->enm_addrlo, enm->enm_addrhi)) {
512 sc->sc_flags |= LEMAC_ALLMULTI;
513 sc->sc_if.if_flags |= IFF_ALLMULTI;
514 return;
515 }
516 lemac_multicast_op(sc->sc_mctbl, enm->enm_addrlo, TRUE);
517 ETHER_NEXT_MULTI(step, enm);
518 }
519 sc->sc_flags &= ~LEMAC_ALLMULTI;
520 sc->sc_if.if_flags &= ~IFF_ALLMULTI;
521 }
522
523 /*
525 * Do a hard reset of the board;
526 */
527 static void
528 lemac_reset(
529 lemac_softc_t * const sc)
530 {
531 unsigned data;
532
533 /*
534 * Initialize board..
535 */
536 sc->sc_flags &= ~LEMAC_LINKUP;
537 sc->sc_if.if_flags &= ~IFF_OACTIVE;
538 LEMAC_INTR_DISABLE(sc);
539
540 LEMAC_OUTB(sc, LEMAC_REG_IOP, LEMAC_IOP_EEINIT);
541 DELAY(LEMAC_EEP_DELAY);
542
543 /*
544 * Read EEPROM information. NOTE - the placement of this function
545 * is important because functions hereafter may rely on information
546 * read from the EEPROM.
547 */
548 if ((data = lemac_read_eeprom(sc)) != LEMAC_EEP_CKSUM) {
549 printf("%s: reset: EEPROM checksum failed (0x%x)\n",
550 sc->sc_if.if_xname, data);
551 return;
552 }
553
554 /*
555 * Update the control register to reflect the media choice
556 */
557 data = LEMAC_INB(sc, LEMAC_REG_CTL);
558 if ((data & (LEMAC_CTL_APD|LEMAC_CTL_PSL)) != sc->sc_ctlmode) {
559 data &= ~(LEMAC_CTL_APD|LEMAC_CTL_PSL);
560 data |= sc->sc_ctlmode;
561 LEMAC_OUTB(sc, LEMAC_REG_CTL, data);
562 }
563
564 /*
565 * Force to 2K mode if not already configured.
566 */
567
568 data = LEMAC_INB(sc, LEMAC_REG_MBR);
569 if (LEMAC_IS_2K_MODE(data)) {
570 sc->sc_flags |= LEMAC_2K_MODE;
571 } else if (LEMAC_IS_64K_MODE(data)) {
572 data = (((data * 2) & 0xF) << 4);
573 sc->sc_flags |= LEMAC_WAS_64K_MODE;
574 LEMAC_OUTB(sc, LEMAC_REG_MBR, data);
575 } else if (LEMAC_IS_32K_MODE(data)) {
576 data = ((data & 0xF) << 4);
577 sc->sc_flags |= LEMAC_WAS_32K_MODE;
578 LEMAC_OUTB(sc, LEMAC_REG_MBR, data);
579 } else {
580 sc->sc_flags |= LEMAC_PIO_MODE;
581 /* PIO mode */
582 }
583
584 /*
585 * Initialize Free Memory Queue, Init mcast table with broadcast.
586 */
587
588 lemac_init_adapmem(sc);
589 sc->sc_flags |= LEMAC_ALIVE;
590 }
591
592 static void
594 lemac_init(
595 lemac_softc_t * const sc)
596 {
597 if ((sc->sc_flags & LEMAC_ALIVE) == 0)
598 return;
599
600 /*
601 * If the interface has the up flag
602 */
603 if (sc->sc_if.if_flags & IFF_UP) {
604 int saved_cs = LEMAC_INB(sc, LEMAC_REG_CS);
605 LEMAC_OUTB(sc, LEMAC_REG_CS, saved_cs | (LEMAC_CS_TXD | LEMAC_CS_RXD));
606 LEMAC_OUTB(sc, LEMAC_REG_PA0, sc->sc_enaddr[0]);
607 LEMAC_OUTB(sc, LEMAC_REG_PA1, sc->sc_enaddr[1]);
608 LEMAC_OUTB(sc, LEMAC_REG_PA2, sc->sc_enaddr[2]);
609 LEMAC_OUTB(sc, LEMAC_REG_PA3, sc->sc_enaddr[3]);
610 LEMAC_OUTB(sc, LEMAC_REG_PA4, sc->sc_enaddr[4]);
611 LEMAC_OUTB(sc, LEMAC_REG_PA5, sc->sc_enaddr[5]);
612
613 LEMAC_OUTB(sc, LEMAC_REG_IC, LEMAC_INB(sc, LEMAC_REG_IC) | LEMAC_IC_IE);
614
615 if (sc->sc_if.if_flags & IFF_PROMISC) {
616 LEMAC_OUTB(sc, LEMAC_REG_CS, LEMAC_CS_MCE | LEMAC_CS_PME);
617 } else {
618 LEMAC_INTR_DISABLE(sc);
619 lemac_multicast_filter(sc);
620 if (sc->sc_flags & LEMAC_ALLMULTI)
621 bcopy(lemac_allmulti_mctbl, sc->sc_mctbl, sizeof(sc->sc_mctbl));
622 if (LEMAC_USE_PIO_MODE(sc)) {
623 LEMAC_OUTB(sc, LEMAC_REG_IOP, 0);
624 LEMAC_OUTB(sc, LEMAC_REG_PI1, LEMAC_MCTBL_OFF & 0xFF);
625 LEMAC_OUTB(sc, LEMAC_REG_PI2, LEMAC_MCTBL_OFF >> 8);
626 LEMAC_OUTSB(sc, LEMAC_REG_DAT, sizeof(sc->sc_mctbl), (void *) sc->sc_mctbl);
627 } else {
628 LEMAC_OUTB(sc, LEMAC_REG_MPN, 0);
629 LEMAC_PUTBUF8(sc, LEMAC_MCTBL_OFF, sizeof(sc->sc_mctbl), (void *) sc->sc_mctbl);
630 }
631
632 LEMAC_OUTB(sc, LEMAC_REG_CS, LEMAC_CS_MCE);
633 }
634
635 LEMAC_OUTB(sc, LEMAC_REG_CTL, LEMAC_INB(sc, LEMAC_REG_CTL) ^ LEMAC_CTL_LED);
636
637 LEMAC_INTR_ENABLE(sc);
638 sc->sc_if.if_flags |= IFF_RUNNING;
639 lemac_ifstart(&sc->sc_if);
640 } else {
641 LEMAC_OUTB(sc, LEMAC_REG_CS, LEMAC_CS_RXD|LEMAC_CS_TXD);
642
643 LEMAC_INTR_DISABLE(sc);
644 sc->sc_if.if_flags &= ~IFF_RUNNING;
645 }
646 }
647
648 static void
650 lemac_ifstart(
651 struct ifnet *ifp)
652 {
653 lemac_softc_t * const sc = LEMAC_IFP_TO_SOFTC(ifp);
654 struct ifqueue * const ifq = &ifp->if_snd;
655
656 if ((ifp->if_flags & IFF_RUNNING) == 0)
657 return;
658
659 LEMAC_INTR_DISABLE(sc);
660
661 while (ifq->ifq_head != NULL) {
662 struct mbuf *m;
663 struct mbuf *m0;
664 int tx_pg;
665
666 if ((sc->sc_csr.csr_tqc = LEMAC_INB(sc, LEMAC_REG_TQC)) >= lemac_txmax) {
667 sc->sc_cntrs.cntr_txfull++;
668 ifp->if_flags |= IFF_OACTIVE;
669 break;
670 }
671
672 /*
673 * get free memory page
674 */
675 tx_pg = sc->sc_csr.csr_fmq = LEMAC_INB(sc, LEMAC_REG_FMQ);
676 /*
677 * Check for good transmit page.
678 */
679 if (tx_pg == 0 || tx_pg > sc->sc_lastpage) {
680 sc->sc_cntrs.cntr_txnospc++;
681 ifp->if_flags |= IFF_OACTIVE;
682 break;
683 }
684
685 IF_DEQUEUE(ifq, m);
686
687 /*
688 * The first four bytes of each transmit buffer are for
689 * control information. The first byte is the control
690 * byte, then the length (why not word aligned??), then
691 * the offset to the buffer.
692 */
693
694 if (LEMAC_USE_PIO_MODE(sc)) {
695 LEMAC_OUTB(sc, LEMAC_REG_IOP, tx_pg); /* Shift 2K window. */
696 LEMAC_OUTB(sc, LEMAC_REG_PI1, 0);
697 LEMAC_OUTB(sc, LEMAC_REG_PI2, 0);
698 LEMAC_OUTB(sc, LEMAC_REG_DAT, sc->sc_txctl);
699 LEMAC_OUTB(sc, LEMAC_REG_DAT, (m->m_pkthdr.len >> 0) & 0xFF);
700 LEMAC_OUTB(sc, LEMAC_REG_DAT, (m->m_pkthdr.len >> 8) & 0xFF);
701 LEMAC_OUTB(sc, LEMAC_REG_DAT, LEMAC_TX_HDRSZ);
702 for (m0 = m; m0 != NULL; m0 = m0->m_next)
703 LEMAC_OUTSB(sc, LEMAC_REG_DAT, m0->m_len, m0->m_data);
704 } else {
705 bus_size_t txoff = /* (mtod(m, u_int32_t) & (sizeof(u_int32_t) - 1)) + */ LEMAC_TX_HDRSZ;
706 LEMAC_OUTB(sc, LEMAC_REG_MPN, tx_pg); /* Shift 2K window. */
707 LEMAC_PUT8(sc, 0, sc->sc_txctl);
708 LEMAC_PUT8(sc, 1, (m->m_pkthdr.len >> 0) & 0xFF);
709 LEMAC_PUT8(sc, 2, (m->m_pkthdr.len >> 8) & 0xFF);
710 LEMAC_PUT8(sc, 3, txoff);
711
712 /*
713 * Copy the packet to the board
714 */
715 for (m0 = m; m0 != NULL; m0 = m0->m_next) {
716 #if 0
717 LEMAC_PUTBUF8(sc, txoff, m0->m_len, m0->m_data);
718 txoff += m0->m_len;
719 #else
720 const u_int8_t *cp = m0->m_data;
721 int len = m0->m_len;
722 #if 0
723 if ((txoff & 3) == (((long)cp) & 3) && len >= 4) {
724 if (txoff & 3) {
725 int alen = (~txoff & 3);
726 LEMAC_PUTBUF8(sc, txoff, alen, cp);
727 cp += alen; txoff += alen; len -= alen;
728 }
729 if (len >= 4) {
730 LEMAC_PUTBUF32(sc, txoff, len / 4, cp);
731 cp += len & ~3; txoff += len & ~3; len &= 3;
732 }
733 }
734 #endif
735 if ((txoff & 1) == (((long)cp) & 1) && len >= 2) {
736 if (txoff & 1) {
737 int alen = (~txoff & 1);
738 LEMAC_PUTBUF8(sc, txoff, alen, cp);
739 cp += alen; txoff += alen; len -= alen;
740 }
741 if (len >= 2) {
742 LEMAC_PUTBUF16(sc, txoff, len / 2, (void *) cp);
743 cp += len & ~1; txoff += len & ~1; len &= 1;
744 }
745 }
746 if (len > 0) {
747 LEMAC_PUTBUF8(sc, txoff, len, cp);
748 txoff += len;
749 }
750 #endif
751 }
752 }
753
754 LEMAC_OUTB(sc, LEMAC_REG_TQ, tx_pg); /* tell chip to transmit this packet */
755 #if NBPFILTER > 0
756 if (sc->sc_if.if_bpf != NULL)
757 bpf_mtap(sc->sc_if.if_bpf, m);
758 #endif
759 m_freem(m); /* free the mbuf */
760 }
761 LEMAC_INTR_ENABLE(sc);
762 }
763
764 static int
766 lemac_ifioctl(
767 struct ifnet *ifp,
768 u_long cmd,
769 caddr_t data)
770 {
771 lemac_softc_t * const sc = LEMAC_IFP_TO_SOFTC(ifp);
772 int s;
773 int error = 0;
774
775 s = splnet();
776
777 switch (cmd) {
778 case SIOCSIFADDR: {
779 struct ifaddr *ifa = (struct ifaddr *)data;
780
781 ifp->if_flags |= IFF_UP;
782 lemac_init(sc);
783 switch (ifa->ifa_addr->sa_family) {
784 #ifdef INET
785 case AF_INET: {
786 arp_ifinit(&sc->sc_if, ifa);
787 break;
788 }
789 #endif /* INET */
790
791 #ifdef NS
792 /* This magic copied from if_is.c; I don't use XNS,
793 * so I have no way of telling if this actually
794 * works or not.
795 */
796 case AF_NS: {
797 struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr);
798 if (ns_nullhost(*ina)) {
799 ina->x_host = *(union ns_host *)sc->sc_enaddr;
800 } else {
801 bcopy((caddr_t)ina->x_host.c_host, sc->sc_enaddr,
802 ifp->if_addrlen);
803 }
804 break;
805 }
806 #endif /* NS */
807
808 default: {
809 break;
810 }
811 }
812 break;
813 }
814
815 case SIOCSIFFLAGS: {
816 lemac_init(sc);
817 break;
818 }
819
820 case SIOCADDMULTI:
821 case SIOCDELMULTI: {
822 /*
823 * Update multicast listeners
824 */
825 if (cmd == SIOCADDMULTI)
826 error = ether_addmulti((struct ifreq *)data, &sc->sc_ec);
827 else
828 error = ether_delmulti((struct ifreq *)data, &sc->sc_ec);
829
830 if (error == ENETRESET) {
831
832 /* reset multicast filtering */
833 lemac_init(sc);
834 error = 0;
835 }
836 break;
837 }
838
839 case SIOCSIFMEDIA:
840 case SIOCGIFMEDIA: {
841 error = ifmedia_ioctl(ifp, (struct ifreq *)data,
842 &sc->sc_ifmedia, cmd);
843 break;
844 }
845
846 default: {
847 error = EINVAL;
848 break;
849 }
850 }
851
852 splx(s);
853 return error;
854 }
855
856 static int
858 lemac_ifmedia_change(
859 struct ifnet * const ifp)
860 {
861 lemac_softc_t * const sc = LEMAC_IFP_TO_SOFTC(ifp);
862 unsigned new_ctl;
863
864 switch (IFM_SUBTYPE(sc->sc_ifmedia.ifm_media)) {
865 case IFM_10_T: new_ctl = LEMAC_CTL_APD; break;
866 case IFM_10_2:
867 case IFM_10_5: new_ctl = LEMAC_CTL_APD|LEMAC_CTL_PSL; break;
868 case IFM_AUTO: new_ctl = 0; break;
869 default: return EINVAL;
870 }
871 if (sc->sc_ctlmode != new_ctl) {
872 sc->sc_ctlmode = new_ctl;
873 lemac_reset(sc);
874 if (sc->sc_if.if_flags & IFF_UP)
875 lemac_init(sc);
876 }
877 return 0;
878 }
879
880 /*
881 * Media status callback
882 */
883 static void
884 lemac_ifmedia_status(
885 struct ifnet * const ifp,
886 struct ifmediareq *req)
887 {
888 lemac_softc_t *sc = LEMAC_IFP_TO_SOFTC(ifp);
889 unsigned data = LEMAC_INB(sc, LEMAC_REG_CNF);
890
891 req->ifm_status = IFM_AVALID;
892 if (sc->sc_flags & LEMAC_LINKUP)
893 req->ifm_status |= IFM_ACTIVE;
894
895 if (sc->sc_ctlmode & LEMAC_CTL_APD) {
896 if (sc->sc_ctlmode & LEMAC_CTL_PSL) {
897 req->ifm_active = IFM_10_5;
898 } else {
899 req->ifm_active = IFM_10_T;
900 }
901 } else {
902 /*
903 * The link bit of the configuration register reflects the
904 * current media choice when auto-port is enabled.
905 */
906 if (data & LEMAC_CNF_NOLINK) {
907 req->ifm_active = IFM_10_5;
908 } else {
909 req->ifm_active = IFM_10_T;
910 }
911 }
912
913 req->ifm_active |= IFM_ETHER;
914 }
915
916 int
918 lemac_port_check(
919 const bus_space_tag_t iot,
920 const bus_space_handle_t ioh)
921 {
922 unsigned char hwaddr[6];
923
924 if (lemac_read_macaddr(hwaddr, iot, ioh, LEMAC_REG_APD, 0) == 0)
925 return 1;
926 if (lemac_read_macaddr(hwaddr, iot, ioh, LEMAC_REG_APD, 1) == 0)
927 return 1;
928 return 0;
929 }
930
931 void
933 lemac_info_get(
934 const bus_space_tag_t iot,
935 const bus_space_handle_t ioh,
936 bus_addr_t *maddr_p,
937 bus_size_t *msize_p,
938 int *irq_p)
939 {
940 unsigned data;
941
942 *irq_p = LEMAC_DECODEIRQ(bus_space_read_1(iot, ioh, LEMAC_REG_IC) & LEMAC_IC_IRQMSK);
943
944 data = bus_space_read_1(iot, ioh, LEMAC_REG_MBR);
945 if (LEMAC_IS_2K_MODE(data)) {
946 *maddr_p = data * (2 * 1024) + (512 * 1024);
947 *msize_p = 2 * 1024;
948 } else if (LEMAC_IS_64K_MODE(data)) {
949 *maddr_p = data * 64 * 1024;
950 *msize_p = 64 * 1024;
951 } else if (LEMAC_IS_32K_MODE(data)) {
952 *maddr_p = data * 32 * 1024;
953 *msize_p = 32* 1024;
954 } else {
955 *maddr_p = 0;
956 *msize_p = 0;
957 }
958 }
959
960 /*
962 * What to do upon receipt of an interrupt.
963 */
964 int
965 lemac_intr(
966 void *arg)
967 {
968 lemac_softc_t * const sc = arg;
969 int cs_value;
970
971 LEMAC_INTR_DISABLE(sc); /* Mask interrupts */
972
973 /*
974 * Determine cause of interrupt. Receive events take
975 * priority over Transmit.
976 */
977
978 cs_value = LEMAC_INB(sc, LEMAC_REG_CS);
979
980 /*
981 * Check for Receive Queue not being empty.
982 * Check for Transmit Done Queue not being empty.
983 */
984
985 if (cs_value & LEMAC_CS_RNE)
986 lemac_rne_intr(sc);
987 if (cs_value & LEMAC_CS_TNE)
988 lemac_tne_intr(sc);
989
990 /*
991 * Check for Transmitter Disabled.
992 * Check for Receiver Disabled.
993 */
994
995 if (cs_value & LEMAC_CS_TXD)
996 lemac_txd_intr(sc, cs_value);
997 if (cs_value & LEMAC_CS_RXD)
998 lemac_rxd_intr(sc, cs_value);
999
1000 /*
1001 * Toggle LED and unmask interrupts.
1002 */
1003
1004 sc->sc_csr.csr_cs = LEMAC_INB(sc, LEMAC_REG_CS);
1005
1006 LEMAC_OUTB(sc, LEMAC_REG_CTL, LEMAC_INB(sc, LEMAC_REG_CTL) ^ LEMAC_CTL_LED);
1007 LEMAC_INTR_ENABLE(sc); /* Unmask interrupts */
1008
1009 #if NRND > 0
1010 if (cs_value)
1011 rnd_add_uint32(&sc->rnd_source, cs_value);
1012 #endif
1013
1014 return 1;
1015 }
1016
1017 void
1018 lemac_shutdown(
1019 void *arg)
1020 {
1021 lemac_reset((lemac_softc_t *) arg);
1022 }
1023
1024 static const char * const lemac_modes[4] = {
1026 "PIO mode (internal 2KB window)",
1027 "2KB window",
1028 "changed 32KB window to 2KB",
1029 "changed 64KB window to 2KB",
1030 };
1031
1032 void
1033 lemac_ifattach(
1034 lemac_softc_t *sc)
1035 {
1036 struct ifnet * const ifp = &sc->sc_if;
1037
1038 bcopy(sc->sc_dv.dv_xname, ifp->if_xname, IFNAMSIZ);
1039
1040 lemac_reset(sc);
1041
1042 (void) lemac_read_macaddr(sc->sc_enaddr, sc->sc_iot, sc->sc_ioh,
1043 LEMAC_REG_APD, 0);
1044
1045 printf(": %s\n", sc->sc_prodname);
1046
1047 printf("%s: address %s, %dKB RAM, %s\n",
1048 ifp->if_xname,
1049 ether_sprintf(sc->sc_enaddr),
1050 sc->sc_lastpage * 2 + 2,
1051 lemac_modes[sc->sc_flags & LEMAC_MODE_MASK]);
1052
1053 ifp->if_softc = (void *) sc;
1054 ifp->if_start = lemac_ifstart;
1055 ifp->if_ioctl = lemac_ifioctl;
1056
1057 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX
1058 #ifdef IFF_NOTRAILERS
1059 | IFF_NOTRAILERS
1060 #endif
1061 | IFF_MULTICAST;
1062
1063 if (sc->sc_flags & LEMAC_ALIVE) {
1064 int media;
1065
1066 if_attach(ifp);
1067 ether_ifattach(ifp, sc->sc_enaddr);
1068
1069 #if NBPFILTER > 0
1070 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
1071 #endif
1072
1073 #if NRND > 0
1074 rnd_attach_source(&sc->rnd_source, sc->sc_dv.dv_xname,
1075 RND_TYPE_NET, 0);
1076 #endif
1077
1078 ifmedia_init(&sc->sc_ifmedia, 0,
1079 lemac_ifmedia_change,
1080 lemac_ifmedia_status);
1081 if (sc->sc_prodname[4] == '5') /* DE205 is UTP/AUI */
1082 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_AUTO, 0, 0);
1083 if (sc->sc_prodname[4] != '3') /* DE204 & 205 have UTP */
1084 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_10_T, 0, 0);
1085 if (sc->sc_prodname[4] != '4') /* DE203 & 205 have BNC */
1086 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_10_5, 0, 0);
1087 switch (sc->sc_prodname[4]) {
1088 case '3': media = IFM_10_5; break;
1089 case '4': media = IFM_10_T; break;
1090 default: media = IFM_AUTO; break;
1091 }
1092 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER | media);
1093 } else {
1094 printf("%s: disabled due to error\n", ifp->if_xname);
1095 }
1096 }
1097