lemac.c revision 1.22 1 /* $NetBSD: lemac.c,v 1.22 2001/07/07 16:13:48 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1994, 1995, 1997 Matt Thomas <matt (at) 3am-software.com>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 /*
28 * DEC EtherWORKS 3 Ethernet Controllers
29 *
30 * Written by Matt Thomas
31 * BPF support code stolen directly from if_ec.c
32 *
33 * This driver supports the LEMAC DE203/204/205 cards.
34 */
35
36 #include "opt_inet.h"
37 #include "opt_ns.h"
38 #include "rnd.h"
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/mbuf.h>
43 #include <sys/protosw.h>
44 #include <sys/socket.h>
45 #include <sys/sockio.h>
46 #include <sys/errno.h>
47 #include <sys/malloc.h>
48 #include <sys/device.h>
49 #if NRND > 0
50 #include <sys/rnd.h>
51 #endif
52
53 #include <net/if.h>
54 #include <net/if_types.h>
55 #include <net/if_dl.h>
56 #include <net/route.h>
57 #include <net/if_ether.h>
58 #include <net/if_media.h>
59
60 #ifdef INET
61 #include <netinet/in.h>
62 #include <netinet/in_systm.h>
63 #include <netinet/in_var.h>
64 #include <netinet/ip.h>
65 #include <netinet/if_inarp.h>
66 #endif
67
68 #ifdef NS
69 #include <netns/ns.h>
70 #include <netns/ns_if.h>
71 #endif
72
73 #include <machine/bus.h>
74
75 #include <dev/ic/lemacreg.h>
76 #include <dev/ic/lemacvar.h>
77 #if 0
78 #include <i386/isa/decether.h>
79 #endif
80
81 #include <uvm/uvm_extern.h>
82
83 #include "bpfilter.h"
84 #if NBPFILTER > 0
85 #include <net/bpf.h>
86 #endif
87
88 static void lemac_init(lemac_softc_t *sc);
89 static void lemac_ifstart(struct ifnet *ifp);
90 static void lemac_reset(lemac_softc_t *sc);
91 static void lemac_rne_intr(lemac_softc_t *sc);
92 static void lemac_tne_intr(lemac_softc_t *sc);
93 static void lemac_txd_intr(lemac_softc_t *sc, unsigned cs_value);
94 static void lemac_rxd_intr(lemac_softc_t *sc, unsigned cs_value);
95 static int lemac_read_eeprom(lemac_softc_t *sc);
96 static void lemac_init_adapmem(lemac_softc_t *sc);
97
98 static const u_int16_t lemac_allmulti_mctbl[16] = {
99 0xFFFFU, 0xFFFFU, 0xFFFFU, 0xFFFFU,
100 0xFFFFU, 0xFFFFU, 0xFFFFU, 0xFFFFU,
101 0xFFFFU, 0xFFFFU, 0xFFFFU, 0xFFFFU,
102 0xFFFFU, 0xFFFFU, 0xFFFFU, 0xFFFFU,
103 };
104
105 /*
106 * Some tuning/monitoring variables.
107 */
108 unsigned lemac_txmax = 16;
109
110 static void
112 lemac_rxd_intr(
113 lemac_softc_t *sc,
114 unsigned cs_value)
115 {
116 /*
117 * Handle CS_RXD (Receiver disabled) here.
118 *
119 * Check Free Memory Queue Count. If not equal to zero
120 * then just turn Receiver back on. If it is equal to
121 * zero then check to see if transmitter is disabled.
122 * Process transmit TXD loop once more. If all else
123 * fails then do software init (0xC0 to EEPROM Init)
124 * and rebuild Free Memory Queue.
125 */
126
127 sc->sc_cntrs.cntr_rxd_intrs++;
128
129 /*
130 * Re-enable Receiver.
131 */
132
133 cs_value &= ~LEMAC_CS_RXD;
134 LEMAC_OUTB(sc, LEMAC_REG_CS, cs_value);
135
136 if (LEMAC_INB(sc, LEMAC_REG_FMC) > 0)
137 return;
138
139 if (cs_value & LEMAC_CS_TXD)
140 lemac_txd_intr(sc, cs_value);
141
142 if ((LEMAC_INB(sc, LEMAC_REG_CS) & LEMAC_CS_RXD) == 0)
143 return;
144
145 printf("%s: fatal RXD error, attempting recovery\n", sc->sc_if.if_xname);
146
147 lemac_reset(sc);
148 if (sc->sc_if.if_flags & IFF_UP) {
149 lemac_init(sc);
150 return;
151 }
152
153 /*
154 * Error during initializion. Mark card as disabled.
155 */
156 printf("%s: recovery failed -- board disabled\n", sc->sc_if.if_xname);
157 }
158
159 static void
161 lemac_tne_intr(
162 lemac_softc_t *sc)
163 {
164 unsigned txcount = LEMAC_INB(sc, LEMAC_REG_TDC);
165
166 sc->sc_cntrs.cntr_tne_intrs++;
167 while (txcount-- > 0) {
168 unsigned txsts = LEMAC_INB(sc, LEMAC_REG_TDQ);
169 sc->sc_if.if_opackets++; /* another one done */
170 if ((txsts & (LEMAC_TDQ_LCL|LEMAC_TDQ_NCL))
171 || (txsts & LEMAC_TDQ_COL) == LEMAC_TDQ_EXCCOL) {
172 if (txsts & LEMAC_TDQ_NCL)
173 sc->sc_flags &= ~LEMAC_LINKUP;
174 sc->sc_if.if_oerrors++;
175 } else {
176 sc->sc_flags |= LEMAC_LINKUP;
177 if ((txsts & LEMAC_TDQ_COL) != LEMAC_TDQ_NOCOL)
178 sc->sc_if.if_collisions++;
179 }
180 }
181 sc->sc_if.if_flags &= ~IFF_OACTIVE;
182 lemac_ifstart(&sc->sc_if);
183 }
184
185 static void
186 lemac_txd_intr(
187 lemac_softc_t *sc,
188 unsigned cs_value)
189 {
190 /*
191 * Read transmit status, remove transmit buffer from
192 * transmit queue and place on free memory queue,
193 * then reset transmitter.
194 * Increment appropriate counters.
195 */
196
197 sc->sc_cntrs.cntr_txd_intrs++;
198 if (sc->sc_txctl & LEMAC_TX_STP) {
199 sc->sc_if.if_oerrors++;
200 /* return page to free queue */
201 LEMAC_OUTB(sc, LEMAC_REG_FMQ, LEMAC_INB(sc, LEMAC_REG_TDQ));
202 }
203
204 /* Turn back on transmitter if disabled */
205 LEMAC_OUTB(sc, LEMAC_REG_CS, cs_value & ~LEMAC_CS_TXD);
206 sc->sc_if.if_flags &= ~IFF_OACTIVE;
207 }
208
209 static int
211 lemac_read_eeprom(
212 lemac_softc_t *sc)
213 {
214 int word_off, cksum;
215
216 u_char *ep;
217
218 cksum = 0;
219 ep = sc->sc_eeprom;
220 for (word_off = 0; word_off < LEMAC_EEP_SIZE / 2; word_off++) {
221 LEMAC_OUTB(sc, LEMAC_REG_PI1, word_off);
222 LEMAC_OUTB(sc, LEMAC_REG_IOP, LEMAC_IOP_EEREAD);
223
224 DELAY(LEMAC_EEP_DELAY);
225
226 *ep = LEMAC_INB(sc, LEMAC_REG_EE1); cksum += *ep++;
227 *ep = LEMAC_INB(sc, LEMAC_REG_EE2); cksum += *ep++;
228 }
229
230 /*
231 * Set up Transmit Control Byte for use later during transmit.
232 */
233
234 sc->sc_txctl |= LEMAC_TX_FLAGS;
235
236 if ((sc->sc_eeprom[LEMAC_EEP_SWFLAGS] & LEMAC_EEP_SW_SQE) == 0)
237 sc->sc_txctl &= ~LEMAC_TX_SQE;
238
239 if (sc->sc_eeprom[LEMAC_EEP_SWFLAGS] & LEMAC_EEP_SW_LAB)
240 sc->sc_txctl |= LEMAC_TX_LAB;
241
242 memcpy(sc->sc_prodname, &sc->sc_eeprom[LEMAC_EEP_PRDNM], LEMAC_EEP_PRDNMSZ);
243 sc->sc_prodname[LEMAC_EEP_PRDNMSZ] = '\0';
244
245 return cksum % 256;
246 }
247
248 static void
250 lemac_init_adapmem(
251 lemac_softc_t *sc)
252 {
253 int pg, conf;
254
255 conf = LEMAC_INB(sc, LEMAC_REG_CNF);
256
257 if ((sc->sc_eeprom[LEMAC_EEP_SETUP] & LEMAC_EEP_ST_DRAM) == 0) {
258 sc->sc_lastpage = 63;
259 conf &= ~LEMAC_CNF_DRAM;
260 } else {
261 sc->sc_lastpage = 127;
262 conf |= LEMAC_CNF_DRAM;
263 }
264
265 LEMAC_OUTB(sc, LEMAC_REG_CNF, conf);
266
267 for (pg = 1; pg <= sc->sc_lastpage; pg++)
268 LEMAC_OUTB(sc, LEMAC_REG_FMQ, pg);
269 }
270
271 static void
273 lemac_input(
274 lemac_softc_t *sc,
275 bus_addr_t offset,
276 size_t length)
277 {
278 struct ether_header eh;
279 struct mbuf *m;
280
281 if (length - sizeof(eh) > ETHERMTU
282 || length - sizeof(eh) < ETHERMIN) {
283 sc->sc_if.if_ierrors++;
284 return;
285 }
286 if (LEMAC_USE_PIO_MODE(sc)) {
287 LEMAC_INSB(sc, LEMAC_REG_DAT, sizeof(eh), (void *) &eh);
288 } else {
289 LEMAC_GETBUF16(sc, offset, sizeof(eh) / 2, (void *) &eh);
290 }
291
292 MGETHDR(m, M_DONTWAIT, MT_DATA);
293 if (m == NULL) {
294 sc->sc_if.if_ierrors++;
295 return;
296 }
297 if (length + 2 > MHLEN) {
298 MCLGET(m, M_DONTWAIT);
299 if ((m->m_flags & M_EXT) == 0) {
300 m_free(m);
301 sc->sc_if.if_ierrors++;
302 return;
303 }
304 }
305 m->m_data += 2;
306 memcpy(m->m_data, (caddr_t)&eh, sizeof(eh));
307 if (LEMAC_USE_PIO_MODE(sc)) {
308 LEMAC_INSB(sc, LEMAC_REG_DAT, length - sizeof(eh),
309 mtod(m, caddr_t) + sizeof(eh));
310 } else {
311 LEMAC_GETBUF16(sc, offset + sizeof(eh), (length - sizeof(eh)) / 2,
312 (void *) (mtod(m, caddr_t) + sizeof(eh)));
313 if (length & 1)
314 m->m_data[length - 1] = LEMAC_GET8(sc, offset + length - 1);
315 }
316 #if NBPFILTER > 0
317 if (sc->sc_if.if_bpf != NULL) {
318 m->m_pkthdr.len = m->m_len = length;
319 bpf_mtap(sc->sc_if.if_bpf, m);
320 }
321 /*
322 * If this is single cast but not to us
323 * drop it!
324 */
325 if ((eh.ether_dhost[0] & 1) == 0
326 && !LEMAC_ADDREQUAL(eh.ether_dhost, sc->sc_enaddr)) {
327 m_freem(m);
328 return;
329 }
330 #endif
331 m->m_pkthdr.len = m->m_len = length;
332 m->m_pkthdr.rcvif = &sc->sc_if;
333 (*sc->sc_if.if_input)(&sc->sc_if, m);
334 }
335
336 static void
338 lemac_rne_intr(
339 lemac_softc_t *sc)
340 {
341 int rxcount;
342
343 sc->sc_cntrs.cntr_rne_intrs++;
344 rxcount = LEMAC_INB(sc, LEMAC_REG_RQC);
345 while (rxcount--) {
346 unsigned rxpg = LEMAC_INB(sc, LEMAC_REG_RQ);
347 u_int32_t rxlen;
348
349 sc->sc_if.if_ipackets++;
350 if (LEMAC_USE_PIO_MODE(sc)) {
351 LEMAC_OUTB(sc, LEMAC_REG_IOP, rxpg);
352 LEMAC_OUTB(sc, LEMAC_REG_PI1, 0);
353 LEMAC_OUTB(sc, LEMAC_REG_PI2, 0);
354 LEMAC_INSB(sc, LEMAC_REG_DAT, sizeof(rxlen), (void *) &rxlen);
355 } else {
356 LEMAC_OUTB(sc, LEMAC_REG_MPN, rxpg);
357 rxlen = LEMAC_GET32(sc, 0);
358 }
359 if (rxlen & LEMAC_RX_OK) {
360 sc->sc_flags |= LEMAC_LINKUP;
361 /*
362 * Get receive length - subtract out checksum.
363 */
364 rxlen = ((rxlen >> 8) & 0x7FF) - 4;
365 lemac_input(sc, sizeof(rxlen), rxlen);
366 } else {
367 sc->sc_if.if_ierrors++;
368 }
369 LEMAC_OUTB(sc, LEMAC_REG_FMQ, rxpg); /* Return this page to Free Memory Queue */
370 } /* end while (recv_count--) */
371
372 return;
373 }
374
375 /*
377 * This is the standard method of reading the DEC Address ROMS.
378 * I don't understand it but it does work.
379 */
380 static int
381 lemac_read_macaddr(
382 unsigned char *hwaddr,
383 const bus_space_tag_t iot,
384 const bus_space_handle_t ioh,
385 const bus_addr_t ioreg,
386 int skippat)
387 {
388 int cksum, rom_cksum;
389 unsigned char addrbuf[6];
390
391 if (!skippat) {
392 int idx, idx2, found, octet;
393 static u_char testpat[] = { 0xFF, 0, 0x55, 0xAA, 0xFF, 0, 0x55, 0xAA };
394 idx2 = found = 0;
395
396 for (idx = 0; idx < 32; idx++) {
397 octet = bus_space_read_1(iot, ioh, ioreg);
398
399 if (octet == testpat[idx2]) {
400 if (++idx2 == sizeof(testpat)) {
401 ++found;
402 break;
403 }
404 } else {
405 idx2 = 0;
406 }
407 }
408
409 if (!found)
410 return -1;
411 }
412
413 if (hwaddr == NULL)
414 hwaddr = addrbuf;
415
416 cksum = 0;
417 hwaddr[0] = bus_space_read_1(iot, ioh, ioreg);
418 hwaddr[1] = bus_space_read_1(iot, ioh, ioreg);
419
420 /* hardware adddress can't be multicast */
421 if (hwaddr[0] & 1)
422 return -1;
423
424 cksum = *(u_short *) &hwaddr[0];
425
426 hwaddr[2] = bus_space_read_1(iot, ioh, ioreg);
427 hwaddr[3] = bus_space_read_1(iot, ioh, ioreg);
428 cksum *= 2;
429 if (cksum > 65535) cksum -= 65535;
430 cksum += *(u_short *) &hwaddr[2];
431 if (cksum > 65535) cksum -= 65535;
432
433 hwaddr[4] = bus_space_read_1(iot, ioh, ioreg);
434 hwaddr[5] = bus_space_read_1(iot, ioh, ioreg);
435 cksum *= 2;
436 if (cksum > 65535) cksum -= 65535;
437 cksum += *(u_short *) &hwaddr[4];
438 if (cksum >= 65535) cksum -= 65535;
439
440 /* 00-00-00 is an illegal OUI */
441 if (hwaddr[0] == 0 && hwaddr[1] == 0 && hwaddr[2] == 0)
442 return -1;
443
444 rom_cksum = bus_space_read_1(iot, ioh, ioreg);
445 rom_cksum |= bus_space_read_1(iot, ioh, ioreg) << 8;
446
447 if (cksum != rom_cksum)
448 return -1;
449 return 0;
450 }
451
452 static void
454 lemac_multicast_op(
455 u_int16_t *mctbl,
456 const u_char *mca,
457 int enable)
458 {
459 u_int idx, bit, crc;
460
461 crc = ether_crc32_le(mca, ETHER_ADDR_LEN);
462
463 /*
464 * The following two lines convert the N bit index into a longword index
465 * and a longword mask.
466 */
467 #if LEMAC_MCTBL_BITS < 0
468 crc >>= (32 + LEMAC_MCTBL_BITS);
469 crc &= (1 << -LEMAC_MCTBL_BITS) - 1;
470 #else
471 crc &= (1 << LEMAC_MCTBL_BITS) - 1;
472 #endif
473 bit = 1 << (crc & 0x0F);
474 idx = crc >> 4;
475
476 /*
477 * Set or clear hash filter bit in our table.
478 */
479 if (enable) {
480 mctbl[idx] |= bit; /* Set Bit */
481 } else {
482 mctbl[idx] &= ~bit; /* Clear Bit */
483 }
484 }
485
486 static void
488 lemac_multicast_filter(
489 lemac_softc_t *sc)
490 {
491 struct ether_multistep step;
492 struct ether_multi *enm;
493
494 memset(sc->sc_mctbl, 0, LEMAC_MCTBL_BITS / 8);
495
496 lemac_multicast_op(sc->sc_mctbl, etherbroadcastaddr, TRUE);
497
498 ETHER_FIRST_MULTI(step, &sc->sc_ec, enm);
499 while (enm != NULL) {
500 if (!LEMAC_ADDREQUAL(enm->enm_addrlo, enm->enm_addrhi)) {
501 sc->sc_flags |= LEMAC_ALLMULTI;
502 sc->sc_if.if_flags |= IFF_ALLMULTI;
503 return;
504 }
505 lemac_multicast_op(sc->sc_mctbl, enm->enm_addrlo, TRUE);
506 ETHER_NEXT_MULTI(step, enm);
507 }
508 sc->sc_flags &= ~LEMAC_ALLMULTI;
509 sc->sc_if.if_flags &= ~IFF_ALLMULTI;
510 }
511
512 /*
514 * Do a hard reset of the board;
515 */
516 static void
517 lemac_reset(
518 lemac_softc_t * const sc)
519 {
520 unsigned data;
521
522 /*
523 * Initialize board..
524 */
525 sc->sc_flags &= ~LEMAC_LINKUP;
526 sc->sc_if.if_flags &= ~IFF_OACTIVE;
527 LEMAC_INTR_DISABLE(sc);
528
529 LEMAC_OUTB(sc, LEMAC_REG_IOP, LEMAC_IOP_EEINIT);
530 DELAY(LEMAC_EEP_DELAY);
531
532 /*
533 * Read EEPROM information. NOTE - the placement of this function
534 * is important because functions hereafter may rely on information
535 * read from the EEPROM.
536 */
537 if ((data = lemac_read_eeprom(sc)) != LEMAC_EEP_CKSUM) {
538 printf("%s: reset: EEPROM checksum failed (0x%x)\n",
539 sc->sc_if.if_xname, data);
540 return;
541 }
542
543 /*
544 * Update the control register to reflect the media choice
545 */
546 data = LEMAC_INB(sc, LEMAC_REG_CTL);
547 if ((data & (LEMAC_CTL_APD|LEMAC_CTL_PSL)) != sc->sc_ctlmode) {
548 data &= ~(LEMAC_CTL_APD|LEMAC_CTL_PSL);
549 data |= sc->sc_ctlmode;
550 LEMAC_OUTB(sc, LEMAC_REG_CTL, data);
551 }
552
553 /*
554 * Force to 2K mode if not already configured.
555 */
556
557 data = LEMAC_INB(sc, LEMAC_REG_MBR);
558 if (LEMAC_IS_2K_MODE(data)) {
559 sc->sc_flags |= LEMAC_2K_MODE;
560 } else if (LEMAC_IS_64K_MODE(data)) {
561 data = (((data * 2) & 0xF) << 4);
562 sc->sc_flags |= LEMAC_WAS_64K_MODE;
563 LEMAC_OUTB(sc, LEMAC_REG_MBR, data);
564 } else if (LEMAC_IS_32K_MODE(data)) {
565 data = ((data & 0xF) << 4);
566 sc->sc_flags |= LEMAC_WAS_32K_MODE;
567 LEMAC_OUTB(sc, LEMAC_REG_MBR, data);
568 } else {
569 sc->sc_flags |= LEMAC_PIO_MODE;
570 /* PIO mode */
571 }
572
573 /*
574 * Initialize Free Memory Queue, Init mcast table with broadcast.
575 */
576
577 lemac_init_adapmem(sc);
578 sc->sc_flags |= LEMAC_ALIVE;
579 }
580
581 static void
583 lemac_init(
584 lemac_softc_t * const sc)
585 {
586 if ((sc->sc_flags & LEMAC_ALIVE) == 0)
587 return;
588
589 /*
590 * If the interface has the up flag
591 */
592 if (sc->sc_if.if_flags & IFF_UP) {
593 int saved_cs = LEMAC_INB(sc, LEMAC_REG_CS);
594 LEMAC_OUTB(sc, LEMAC_REG_CS, saved_cs | (LEMAC_CS_TXD | LEMAC_CS_RXD));
595 LEMAC_OUTB(sc, LEMAC_REG_PA0, sc->sc_enaddr[0]);
596 LEMAC_OUTB(sc, LEMAC_REG_PA1, sc->sc_enaddr[1]);
597 LEMAC_OUTB(sc, LEMAC_REG_PA2, sc->sc_enaddr[2]);
598 LEMAC_OUTB(sc, LEMAC_REG_PA3, sc->sc_enaddr[3]);
599 LEMAC_OUTB(sc, LEMAC_REG_PA4, sc->sc_enaddr[4]);
600 LEMAC_OUTB(sc, LEMAC_REG_PA5, sc->sc_enaddr[5]);
601
602 LEMAC_OUTB(sc, LEMAC_REG_IC, LEMAC_INB(sc, LEMAC_REG_IC) | LEMAC_IC_IE);
603
604 if (sc->sc_if.if_flags & IFF_PROMISC) {
605 LEMAC_OUTB(sc, LEMAC_REG_CS, LEMAC_CS_MCE | LEMAC_CS_PME);
606 } else {
607 LEMAC_INTR_DISABLE(sc);
608 lemac_multicast_filter(sc);
609 if (sc->sc_flags & LEMAC_ALLMULTI)
610 memcpy(sc->sc_mctbl, lemac_allmulti_mctbl,
611 sizeof(sc->sc_mctbl));
612 if (LEMAC_USE_PIO_MODE(sc)) {
613 LEMAC_OUTB(sc, LEMAC_REG_IOP, 0);
614 LEMAC_OUTB(sc, LEMAC_REG_PI1, LEMAC_MCTBL_OFF & 0xFF);
615 LEMAC_OUTB(sc, LEMAC_REG_PI2, LEMAC_MCTBL_OFF >> 8);
616 LEMAC_OUTSB(sc, LEMAC_REG_DAT, sizeof(sc->sc_mctbl), (void *) sc->sc_mctbl);
617 } else {
618 LEMAC_OUTB(sc, LEMAC_REG_MPN, 0);
619 LEMAC_PUTBUF8(sc, LEMAC_MCTBL_OFF, sizeof(sc->sc_mctbl), (void *) sc->sc_mctbl);
620 }
621
622 LEMAC_OUTB(sc, LEMAC_REG_CS, LEMAC_CS_MCE);
623 }
624
625 LEMAC_OUTB(sc, LEMAC_REG_CTL, LEMAC_INB(sc, LEMAC_REG_CTL) ^ LEMAC_CTL_LED);
626
627 LEMAC_INTR_ENABLE(sc);
628 sc->sc_if.if_flags |= IFF_RUNNING;
629 lemac_ifstart(&sc->sc_if);
630 } else {
631 LEMAC_OUTB(sc, LEMAC_REG_CS, LEMAC_CS_RXD|LEMAC_CS_TXD);
632
633 LEMAC_INTR_DISABLE(sc);
634 sc->sc_if.if_flags &= ~IFF_RUNNING;
635 }
636 }
637
638 static void
640 lemac_ifstart(
641 struct ifnet *ifp)
642 {
643 lemac_softc_t * const sc = LEMAC_IFP_TO_SOFTC(ifp);
644
645 if ((ifp->if_flags & IFF_RUNNING) == 0)
646 return;
647
648 LEMAC_INTR_DISABLE(sc);
649
650 for (;;) {
651 struct mbuf *m;
652 struct mbuf *m0;
653 int tx_pg;
654
655 IFQ_POLL(&ifp->if_snd, m);
656 if (m == NULL)
657 break;
658
659 if ((sc->sc_csr.csr_tqc = LEMAC_INB(sc, LEMAC_REG_TQC)) >= lemac_txmax) {
660 sc->sc_cntrs.cntr_txfull++;
661 ifp->if_flags |= IFF_OACTIVE;
662 break;
663 }
664
665 /*
666 * get free memory page
667 */
668 tx_pg = sc->sc_csr.csr_fmq = LEMAC_INB(sc, LEMAC_REG_FMQ);
669 /*
670 * Check for good transmit page.
671 */
672 if (tx_pg == 0 || tx_pg > sc->sc_lastpage) {
673 sc->sc_cntrs.cntr_txnospc++;
674 ifp->if_flags |= IFF_OACTIVE;
675 break;
676 }
677
678 IFQ_DEQUEUE(&ifp->if_snd, m);
679
680 /*
681 * The first four bytes of each transmit buffer are for
682 * control information. The first byte is the control
683 * byte, then the length (why not word aligned?), then
684 * the offset to the buffer.
685 */
686
687 if (LEMAC_USE_PIO_MODE(sc)) {
688 LEMAC_OUTB(sc, LEMAC_REG_IOP, tx_pg); /* Shift 2K window. */
689 LEMAC_OUTB(sc, LEMAC_REG_PI1, 0);
690 LEMAC_OUTB(sc, LEMAC_REG_PI2, 0);
691 LEMAC_OUTB(sc, LEMAC_REG_DAT, sc->sc_txctl);
692 LEMAC_OUTB(sc, LEMAC_REG_DAT, (m->m_pkthdr.len >> 0) & 0xFF);
693 LEMAC_OUTB(sc, LEMAC_REG_DAT, (m->m_pkthdr.len >> 8) & 0xFF);
694 LEMAC_OUTB(sc, LEMAC_REG_DAT, LEMAC_TX_HDRSZ);
695 for (m0 = m; m0 != NULL; m0 = m0->m_next)
696 LEMAC_OUTSB(sc, LEMAC_REG_DAT, m0->m_len, m0->m_data);
697 } else {
698 bus_size_t txoff = /* (mtod(m, u_int32_t) & (sizeof(u_int32_t) - 1)) + */ LEMAC_TX_HDRSZ;
699 LEMAC_OUTB(sc, LEMAC_REG_MPN, tx_pg); /* Shift 2K window. */
700 LEMAC_PUT8(sc, 0, sc->sc_txctl);
701 LEMAC_PUT8(sc, 1, (m->m_pkthdr.len >> 0) & 0xFF);
702 LEMAC_PUT8(sc, 2, (m->m_pkthdr.len >> 8) & 0xFF);
703 LEMAC_PUT8(sc, 3, txoff);
704
705 /*
706 * Copy the packet to the board
707 */
708 for (m0 = m; m0 != NULL; m0 = m0->m_next) {
709 #if 0
710 LEMAC_PUTBUF8(sc, txoff, m0->m_len, m0->m_data);
711 txoff += m0->m_len;
712 #else
713 const u_int8_t *cp = m0->m_data;
714 int len = m0->m_len;
715 #if 0
716 if ((txoff & 3) == (((long)cp) & 3) && len >= 4) {
717 if (txoff & 3) {
718 int alen = (~txoff & 3);
719 LEMAC_PUTBUF8(sc, txoff, alen, cp);
720 cp += alen; txoff += alen; len -= alen;
721 }
722 if (len >= 4) {
723 LEMAC_PUTBUF32(sc, txoff, len / 4, cp);
724 cp += len & ~3; txoff += len & ~3; len &= 3;
725 }
726 }
727 #endif
728 if ((txoff & 1) == (((long)cp) & 1) && len >= 2) {
729 if (txoff & 1) {
730 int alen = (~txoff & 1);
731 LEMAC_PUTBUF8(sc, txoff, alen, cp);
732 cp += alen; txoff += alen; len -= alen;
733 }
734 if (len >= 2) {
735 LEMAC_PUTBUF16(sc, txoff, len / 2, (void *) cp);
736 cp += len & ~1; txoff += len & ~1; len &= 1;
737 }
738 }
739 if (len > 0) {
740 LEMAC_PUTBUF8(sc, txoff, len, cp);
741 txoff += len;
742 }
743 #endif
744 }
745 }
746
747 LEMAC_OUTB(sc, LEMAC_REG_TQ, tx_pg); /* tell chip to transmit this packet */
748 #if NBPFILTER > 0
749 if (sc->sc_if.if_bpf != NULL)
750 bpf_mtap(sc->sc_if.if_bpf, m);
751 #endif
752 m_freem(m); /* free the mbuf */
753 }
754 LEMAC_INTR_ENABLE(sc);
755 }
756
757 static int
759 lemac_ifioctl(
760 struct ifnet *ifp,
761 u_long cmd,
762 caddr_t data)
763 {
764 lemac_softc_t * const sc = LEMAC_IFP_TO_SOFTC(ifp);
765 int s;
766 int error = 0;
767
768 s = splnet();
769
770 switch (cmd) {
771 case SIOCSIFADDR: {
772 struct ifaddr *ifa = (struct ifaddr *)data;
773
774 ifp->if_flags |= IFF_UP;
775 lemac_init(sc);
776 switch (ifa->ifa_addr->sa_family) {
777 #ifdef INET
778 case AF_INET: {
779 arp_ifinit(&sc->sc_if, ifa);
780 break;
781 }
782 #endif /* INET */
783
784 #ifdef NS
785 /* This magic copied from if_is.c; I don't use XNS,
786 * so I have no way of telling if this actually
787 * works or not.
788 */
789 case AF_NS: {
790 struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr);
791 if (ns_nullhost(*ina)) {
792 ina->x_host = *(union ns_host *)sc->sc_enaddr;
793 } else {
794 memcpy(sc->sc_enaddr, (caddr_t)ina->x_host.c_host,
795 ifp->if_addrlen);
796 }
797 break;
798 }
799 #endif /* NS */
800
801 default: {
802 break;
803 }
804 }
805 break;
806 }
807
808 case SIOCSIFFLAGS: {
809 lemac_init(sc);
810 break;
811 }
812
813 case SIOCADDMULTI:
814 case SIOCDELMULTI: {
815 /*
816 * Update multicast listeners
817 */
818 if (cmd == SIOCADDMULTI)
819 error = ether_addmulti((struct ifreq *)data, &sc->sc_ec);
820 else
821 error = ether_delmulti((struct ifreq *)data, &sc->sc_ec);
822
823 if (error == ENETRESET) {
824
825 /* reset multicast filtering */
826 lemac_init(sc);
827 error = 0;
828 }
829 break;
830 }
831
832 case SIOCSIFMEDIA:
833 case SIOCGIFMEDIA: {
834 error = ifmedia_ioctl(ifp, (struct ifreq *)data,
835 &sc->sc_ifmedia, cmd);
836 break;
837 }
838
839 default: {
840 error = EINVAL;
841 break;
842 }
843 }
844
845 splx(s);
846 return error;
847 }
848
849 static int
851 lemac_ifmedia_change(
852 struct ifnet * const ifp)
853 {
854 lemac_softc_t * const sc = LEMAC_IFP_TO_SOFTC(ifp);
855 unsigned new_ctl;
856
857 switch (IFM_SUBTYPE(sc->sc_ifmedia.ifm_media)) {
858 case IFM_10_T: new_ctl = LEMAC_CTL_APD; break;
859 case IFM_10_2:
860 case IFM_10_5: new_ctl = LEMAC_CTL_APD|LEMAC_CTL_PSL; break;
861 case IFM_AUTO: new_ctl = 0; break;
862 default: return EINVAL;
863 }
864 if (sc->sc_ctlmode != new_ctl) {
865 sc->sc_ctlmode = new_ctl;
866 lemac_reset(sc);
867 if (sc->sc_if.if_flags & IFF_UP)
868 lemac_init(sc);
869 }
870 return 0;
871 }
872
873 /*
874 * Media status callback
875 */
876 static void
877 lemac_ifmedia_status(
878 struct ifnet * const ifp,
879 struct ifmediareq *req)
880 {
881 lemac_softc_t *sc = LEMAC_IFP_TO_SOFTC(ifp);
882 unsigned data = LEMAC_INB(sc, LEMAC_REG_CNF);
883
884 req->ifm_status = IFM_AVALID;
885 if (sc->sc_flags & LEMAC_LINKUP)
886 req->ifm_status |= IFM_ACTIVE;
887
888 if (sc->sc_ctlmode & LEMAC_CTL_APD) {
889 if (sc->sc_ctlmode & LEMAC_CTL_PSL) {
890 req->ifm_active = IFM_10_5;
891 } else {
892 req->ifm_active = IFM_10_T;
893 }
894 } else {
895 /*
896 * The link bit of the configuration register reflects the
897 * current media choice when auto-port is enabled.
898 */
899 if (data & LEMAC_CNF_NOLINK) {
900 req->ifm_active = IFM_10_5;
901 } else {
902 req->ifm_active = IFM_10_T;
903 }
904 }
905
906 req->ifm_active |= IFM_ETHER;
907 }
908
909 int
911 lemac_port_check(
912 const bus_space_tag_t iot,
913 const bus_space_handle_t ioh)
914 {
915 unsigned char hwaddr[6];
916
917 if (lemac_read_macaddr(hwaddr, iot, ioh, LEMAC_REG_APD, 0) == 0)
918 return 1;
919 if (lemac_read_macaddr(hwaddr, iot, ioh, LEMAC_REG_APD, 1) == 0)
920 return 1;
921 return 0;
922 }
923
924 void
926 lemac_info_get(
927 const bus_space_tag_t iot,
928 const bus_space_handle_t ioh,
929 bus_addr_t *maddr_p,
930 bus_size_t *msize_p,
931 int *irq_p)
932 {
933 unsigned data;
934
935 *irq_p = LEMAC_DECODEIRQ(bus_space_read_1(iot, ioh, LEMAC_REG_IC) & LEMAC_IC_IRQMSK);
936
937 data = bus_space_read_1(iot, ioh, LEMAC_REG_MBR);
938 if (LEMAC_IS_2K_MODE(data)) {
939 *maddr_p = data * (2 * 1024) + (512 * 1024);
940 *msize_p = 2 * 1024;
941 } else if (LEMAC_IS_64K_MODE(data)) {
942 *maddr_p = data * 64 * 1024;
943 *msize_p = 64 * 1024;
944 } else if (LEMAC_IS_32K_MODE(data)) {
945 *maddr_p = data * 32 * 1024;
946 *msize_p = 32* 1024;
947 } else {
948 *maddr_p = 0;
949 *msize_p = 0;
950 }
951 }
952
953 /*
955 * What to do upon receipt of an interrupt.
956 */
957 int
958 lemac_intr(
959 void *arg)
960 {
961 lemac_softc_t * const sc = arg;
962 int cs_value;
963
964 LEMAC_INTR_DISABLE(sc); /* Mask interrupts */
965
966 /*
967 * Determine cause of interrupt. Receive events take
968 * priority over Transmit.
969 */
970
971 cs_value = LEMAC_INB(sc, LEMAC_REG_CS);
972
973 /*
974 * Check for Receive Queue not being empty.
975 * Check for Transmit Done Queue not being empty.
976 */
977
978 if (cs_value & LEMAC_CS_RNE)
979 lemac_rne_intr(sc);
980 if (cs_value & LEMAC_CS_TNE)
981 lemac_tne_intr(sc);
982
983 /*
984 * Check for Transmitter Disabled.
985 * Check for Receiver Disabled.
986 */
987
988 if (cs_value & LEMAC_CS_TXD)
989 lemac_txd_intr(sc, cs_value);
990 if (cs_value & LEMAC_CS_RXD)
991 lemac_rxd_intr(sc, cs_value);
992
993 /*
994 * Toggle LED and unmask interrupts.
995 */
996
997 sc->sc_csr.csr_cs = LEMAC_INB(sc, LEMAC_REG_CS);
998
999 LEMAC_OUTB(sc, LEMAC_REG_CTL, LEMAC_INB(sc, LEMAC_REG_CTL) ^ LEMAC_CTL_LED);
1000 LEMAC_INTR_ENABLE(sc); /* Unmask interrupts */
1001
1002 #if NRND > 0
1003 if (cs_value)
1004 rnd_add_uint32(&sc->rnd_source, cs_value);
1005 #endif
1006
1007 return 1;
1008 }
1009
1010 void
1011 lemac_shutdown(
1012 void *arg)
1013 {
1014 lemac_reset((lemac_softc_t *) arg);
1015 }
1016
1017 static const char * const lemac_modes[4] = {
1019 "PIO mode (internal 2KB window)",
1020 "2KB window",
1021 "changed 32KB window to 2KB",
1022 "changed 64KB window to 2KB",
1023 };
1024
1025 void
1026 lemac_ifattach(
1027 lemac_softc_t *sc)
1028 {
1029 struct ifnet * const ifp = &sc->sc_if;
1030
1031 strcpy(ifp->if_xname, sc->sc_dv.dv_xname);
1032
1033 lemac_reset(sc);
1034
1035 (void) lemac_read_macaddr(sc->sc_enaddr, sc->sc_iot, sc->sc_ioh,
1036 LEMAC_REG_APD, 0);
1037
1038 printf(": %s\n", sc->sc_prodname);
1039
1040 printf("%s: address %s, %dKB RAM, %s\n",
1041 ifp->if_xname,
1042 ether_sprintf(sc->sc_enaddr),
1043 sc->sc_lastpage * 2 + 2,
1044 lemac_modes[sc->sc_flags & LEMAC_MODE_MASK]);
1045
1046 ifp->if_softc = (void *) sc;
1047 ifp->if_start = lemac_ifstart;
1048 ifp->if_ioctl = lemac_ifioctl;
1049
1050 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX
1051 #ifdef IFF_NOTRAILERS
1052 | IFF_NOTRAILERS
1053 #endif
1054 | IFF_MULTICAST;
1055
1056 if (sc->sc_flags & LEMAC_ALIVE) {
1057 int media;
1058
1059 IFQ_SET_READY(&ifp->if_snd);
1060
1061 if_attach(ifp);
1062 ether_ifattach(ifp, sc->sc_enaddr);
1063
1064 #if NRND > 0
1065 rnd_attach_source(&sc->rnd_source, sc->sc_dv.dv_xname,
1066 RND_TYPE_NET, 0);
1067 #endif
1068
1069 ifmedia_init(&sc->sc_ifmedia, 0,
1070 lemac_ifmedia_change,
1071 lemac_ifmedia_status);
1072 if (sc->sc_prodname[4] == '5') /* DE205 is UTP/AUI */
1073 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_AUTO, 0, 0);
1074 if (sc->sc_prodname[4] != '3') /* DE204 & 205 have UTP */
1075 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_10_T, 0, 0);
1076 if (sc->sc_prodname[4] != '4') /* DE203 & 205 have BNC */
1077 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_10_5, 0, 0);
1078 switch (sc->sc_prodname[4]) {
1079 case '3': media = IFM_10_5; break;
1080 case '4': media = IFM_10_T; break;
1081 default: media = IFM_AUTO; break;
1082 }
1083 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER | media);
1084 } else {
1085 printf("%s: disabled due to error\n", ifp->if_xname);
1086 }
1087 }
1088