malo.c revision 1.1
1 /* $OpenBSD: malo.c,v 1.92 2010/08/27 17:08:00 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Claudio Jeker <claudio (at) openbsd.org> 5 * Copyright (c) 2006 Marcus Glocker <mglocker (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 #include <sys/param.h> 22 #include <sys/types.h> 23 24 #include <sys/device.h> 25 #include <sys/kernel.h> 26 #include <sys/malloc.h> 27 #include <sys/mbuf.h> 28 #include <sys/proc.h> 29 #include <sys/socket.h> 30 #include <sys/sockio.h> 31 #include <sys/systm.h> 32 #include <sys/bus.h> 33 34 #include <machine/endian.h> 35 #include <machine/intr.h> 36 37 #include <net/if.h> 38 #include <net/if_media.h> 39 #include <net/if_ether.h> 40 41 #include <net/bpf.h> 42 43 #include <netinet/in.h> 44 #include <netinet/in_systm.h> 45 46 #include <net80211/ieee80211_var.h> 47 #include <net80211/ieee80211_radiotap.h> 48 49 #include <dev/firmload.h> 50 51 #include <dev/ic/malovar.h> 52 #include <dev/ic/maloreg.h> 53 54 #ifdef MALO_DEBUG 55 int malo_d = 2; 56 #define DPRINTF(l, x...) do { if ((l) <= malo_d) printf(x); } while (0) 57 #else 58 #define DPRINTF(l, x...) 59 #endif 60 61 /* internal structures and defines */ 62 struct malo_node { 63 struct ieee80211_node ni; 64 }; 65 66 struct malo_rx_data { 67 bus_dmamap_t map; 68 struct mbuf *m; 69 }; 70 71 struct malo_tx_data { 72 bus_dmamap_t map; 73 struct mbuf *m; 74 uint32_t softstat; 75 struct ieee80211_node *ni; 76 }; 77 78 /* RX descriptor used by HW */ 79 struct malo_rx_desc { 80 uint8_t rxctrl; 81 uint8_t rssi; 82 uint8_t status; 83 uint8_t channel; 84 uint16_t len; 85 uint8_t reserved1; /* actually unused */ 86 uint8_t datarate; 87 uint32_t physdata; /* DMA address of data */ 88 uint32_t physnext; /* DMA address of next control block */ 89 uint16_t qosctrl; 90 uint16_t reserved2; 91 } __packed; 92 93 /* TX descriptor used by HW */ 94 struct malo_tx_desc { 95 uint32_t status; 96 #define MALO_TXD_STATUS_IDLE 0x00000000 97 #define MALO_TXD_STATUS_USED 0x00000001 98 #define MALO_TXD_STATUS_OK 0x00000001 99 #define MALO_TXD_STATUS_OK_RETRY 0x00000002 100 #define MALO_TXD_STATUS_OK_MORE_RETRY 0x00000004 101 #define MALO_TXD_STATUS_MULTICAST_TX 0x00000008 102 #define MALO_TXD_STATUS_BROADCAST_TX 0x00000010 103 #define MALO_TXD_STATUS_FAILED_LINK_ERROR 0x00000020 104 #define MALO_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040 105 #define MALO_TXD_STATUS_FAILED_XRETRY MALO_TXD_STATUS_FAILED_EXCEED_LIMIT 106 #define MALO_TXD_STATUS_FAILED_AGING 0x00000080 107 #define MALO_TXD_STATUS_FW_OWNED 0x80000000 108 uint8_t datarate; 109 uint8_t txpriority; 110 uint16_t qosctrl; 111 uint32_t physdata; /* DMA address of data */ 112 uint16_t len; 113 uint8_t destaddr[6]; 114 uint32_t physnext; /* DMA address of next control block */ 115 uint32_t reserved1; /* SAP packet info ??? */ 116 uint32_t reserved2; 117 } __packed; 118 119 #define MALO_RX_RING_COUNT 256 120 #define MALO_TX_RING_COUNT 256 121 #define MALO_MAX_SCATTER 8 /* XXX unknown, wild guess */ 122 #define MALO_CMD_TIMEOUT 50 /* MALO_CMD_TIMEOUT * 100us */ 123 124 /* 125 * Firmware commands 126 */ 127 #define MALO_CMD_GET_HW_SPEC 0x0003 128 #define MALO_CMD_SET_RADIO 0x001c 129 #define MALO_CMD_SET_AID 0x010d 130 #define MALO_CMD_SET_TXPOWER 0x001e 131 #define MALO_CMD_SET_ANTENNA 0x0020 132 #define MALO_CMD_SET_PRESCAN 0x0107 133 #define MALO_CMD_SET_POSTSCAN 0x0108 134 #define MALO_CMD_SET_RATE 0x0110 135 #define MALO_CMD_SET_CHANNEL 0x010a 136 #define MALO_CMD_SET_RTS 0x0113 137 #define MALO_CMD_SET_SLOT 0x0114 138 #define MALO_CMD_RESPONSE 0x8000 139 140 #define MALO_CMD_RESULT_OK 0x0000 /* everything is fine */ 141 #define MALO_CMD_RESULT_ERROR 0x0001 /* general error */ 142 #define MALO_CMD_RESULT_NOSUPPORT 0x0002 /* command not valid */ 143 #define MALO_CMD_RESULT_PENDING 0x0003 /* will be processed */ 144 #define MALO_CMD_RESULT_BUSY 0x0004 /* command ignored */ 145 #define MALO_CMD_RESULT_PARTIALDATA 0x0005 /* buffer too small */ 146 147 struct malo_cmdheader { 148 uint16_t cmd; 149 uint16_t size; /* size of the command, incl. header */ 150 uint16_t seqnum; /* seems not to matter that much */ 151 uint16_t result; /* set to 0 on request */ 152 /* following the data payload, up to 256 bytes */ 153 }; 154 155 struct malo_hw_spec { 156 uint16_t HwVersion; 157 uint16_t NumOfWCB; 158 uint16_t NumOfMCastAdr; 159 uint8_t PermanentAddress[6]; 160 uint16_t RegionCode; 161 uint16_t NumberOfAntenna; 162 uint32_t FWReleaseNumber; 163 uint32_t WcbBase0; 164 uint32_t RxPdWrPtr; 165 uint32_t RxPdRdPtr; 166 uint32_t CookiePtr; 167 uint32_t WcbBase1; 168 uint32_t WcbBase2; 169 uint32_t WcbBase3; 170 } __packed; 171 172 struct malo_cmd_radio { 173 uint16_t action; 174 uint16_t preamble_mode; 175 uint16_t enable; 176 } __packed; 177 178 struct malo_cmd_aid { 179 uint16_t associd; 180 uint8_t macaddr[6]; 181 uint32_t gprotection; 182 uint8_t aprates[14]; 183 } __packed; 184 185 struct malo_cmd_txpower { 186 uint16_t action; 187 uint16_t supportpowerlvl; 188 uint16_t currentpowerlvl; 189 uint16_t reserved; 190 uint16_t powerlvllist[8]; 191 } __packed; 192 193 struct malo_cmd_antenna { 194 uint16_t action; 195 uint16_t mode; 196 } __packed; 197 198 struct malo_cmd_postscan { 199 uint32_t isibss; 200 uint8_t bssid[6]; 201 } __packed; 202 203 struct malo_cmd_channel { 204 uint16_t action; 205 uint8_t channel; 206 } __packed; 207 208 struct malo_cmd_rate { 209 uint8_t dataratetype; 210 uint8_t rateindex; 211 uint8_t aprates[14]; 212 } __packed; 213 214 struct malo_cmd_rts { 215 uint16_t action; 216 uint32_t threshold; 217 } __packed; 218 219 struct malo_cmd_slot { 220 uint16_t action; 221 uint8_t slot; 222 } __packed; 223 224 #define malo_mem_write4(sc, off, x) \ 225 bus_space_write_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x)) 226 #define malo_mem_write2(sc, off, x) \ 227 bus_space_write_2((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x)) 228 #define malo_mem_write1(sc, off, x) \ 229 bus_space_write_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x)) 230 231 #define malo_mem_read4(sc, off) \ 232 bus_space_read_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off)) 233 #define malo_mem_read1(sc, off) \ 234 bus_space_read_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off)) 235 236 #define malo_ctl_write4(sc, off, x) \ 237 bus_space_write_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off), (x)) 238 #define malo_ctl_read4(sc, off) \ 239 bus_space_read_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off)) 240 #define malo_ctl_read1(sc, off) \ 241 bus_space_read_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off)) 242 243 #define malo_ctl_barrier(sc, t) \ 244 bus_space_barrier((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, 0x0c00, 0xff, (t)) 245 246 static int malo_init(struct ifnet *); 247 static void malo_stop(struct ifnet *, int disable); 248 static int malo_alloc_cmd(struct malo_softc *sc); 249 static void malo_free_cmd(struct malo_softc *sc); 250 static void malo_send_cmd(struct malo_softc *sc, bus_addr_t addr); 251 static int malo_send_cmd_dma(struct malo_softc *sc, bus_addr_t addr); 252 static int malo_alloc_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring, 253 int count); 254 static void malo_reset_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring); 255 static void malo_free_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring); 256 static int malo_alloc_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring, 257 int count); 258 static void malo_reset_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring); 259 static void malo_free_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring); 260 static int malo_ioctl(struct ifnet *ifp, u_long cmd, void* data); 261 static void malo_start(struct ifnet *ifp); 262 static void malo_watchdog(struct ifnet *ifp); 263 static int malo_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 264 int arg); 265 static void malo_newassoc(struct ieee80211_node *ni, int isnew); 266 static struct ieee80211_node * 267 malo_node_alloc(struct ieee80211_node_table *nt); 268 static int malo_media_change(struct ifnet *ifp); 269 static void malo_media_status(struct ifnet *ifp, struct ifmediareq *imr); 270 static int malo_chip2rate(int chip_rate); 271 static int malo_fix2rate(int fix_rate); 272 static void malo_next_scan(void *arg); 273 static void malo_tx_intr(struct malo_softc *sc); 274 static int malo_tx_data(struct malo_softc *sc, struct mbuf *m0, 275 struct ieee80211_node *ni); 276 static void malo_tx_setup_desc(struct malo_softc *sc, struct malo_tx_desc *desc, 277 int len, int rate, const bus_dma_segment_t *segs, int nsegs); 278 static void malo_rx_intr(struct malo_softc *sc); 279 static int malo_load_bootimg(struct malo_softc *sc); 280 static int malo_load_firmware(struct malo_softc *sc); 281 282 static int malo_set_slot(struct malo_softc *sc); 283 static void malo_update_slot(struct ifnet* ifp); 284 #ifdef MALO_DEBUG 285 static void malo_hexdump(void *buf, int len); 286 #endif 287 static const char *malo_cmd_string(uint16_t cmd); 288 static const char *malo_cmd_string_result(uint16_t result); 289 static int malo_cmd_get_spec(struct malo_softc *sc); 290 static int malo_cmd_set_prescan(struct malo_softc *sc); 291 static int malo_cmd_set_postscan(struct malo_softc *sc, uint8_t *macaddr, 292 uint8_t ibsson); 293 static int malo_cmd_set_channel(struct malo_softc *sc, struct ieee80211_channel *chan); 294 static int malo_cmd_set_antenna(struct malo_softc *sc, uint16_t antenna_type); 295 static int malo_cmd_set_radio(struct malo_softc *sc, uint16_t mode, 296 uint16_t preamble); 297 static int malo_cmd_set_aid(struct malo_softc *sc, uint8_t *bssid, 298 uint16_t associd); 299 static int malo_cmd_set_txpower(struct malo_softc *sc, unsigned int powerlevel); 300 static int malo_cmd_set_rts(struct malo_softc *sc, uint32_t threshold); 301 static int malo_cmd_set_slot(struct malo_softc *sc, uint8_t slot); 302 static int malo_cmd_set_rate(struct malo_softc *sc, uint8_t rate); 303 static void malo_cmd_response(struct malo_softc *sc); 304 305 int 306 malo_intr(void *arg) 307 { 308 struct malo_softc *sc = arg; 309 uint32_t status; 310 311 status = malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 312 if (status == 0xffffffff || status == 0) 313 /* not for us */ 314 return (0); 315 316 if (status & MALO_A2HRIC_BIT_TX_DONE) 317 malo_tx_intr(sc); 318 if (status & MALO_A2HRIC_BIT_RX_RDY) 319 malo_rx_intr(sc); 320 if (status & MALO_A2HRIC_BIT_OPC_DONE) { 321 /* XXX cmd done interrupt handling doesn't work yet */ 322 DPRINTF(1, "%s: got cmd done interrupt\n", device_xname(sc->sc_dev)); 323 //malo_cmd_response(sc); 324 } 325 326 if (status & ~0x7) { 327 DPRINTF(1, "%s: unknown interrupt %x\n", 328 device_xname(sc->sc_dev), status); 329 } 330 331 /* just ack the interrupt */ 332 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_CAUSE, 0); 333 334 return (1); 335 } 336 337 int 338 malo_attach(struct malo_softc *sc) 339 { 340 struct ieee80211com *ic = &sc->sc_ic; 341 struct ifnet *ifp = &sc->sc_if; 342 int i; 343 344 /* initialize channel scanning timer */ 345 callout_init(&sc->sc_scan_to, 0); 346 callout_setfunc(&sc->sc_scan_to, malo_next_scan, sc); 347 348 /* allocate DMA structures */ 349 malo_alloc_cmd(sc); 350 malo_alloc_rx_ring(sc, &sc->sc_rxring, MALO_RX_RING_COUNT); 351 malo_alloc_tx_ring(sc, &sc->sc_txring, MALO_TX_RING_COUNT); 352 353 /* setup interface */ 354 ifp->if_softc = sc; 355 ifp->if_init = malo_init; 356 ifp->if_stop = malo_stop; 357 ifp->if_ioctl = malo_ioctl; 358 ifp->if_start = malo_start; 359 ifp->if_watchdog = malo_watchdog; 360 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 361 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 362 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 363 IFQ_SET_READY(&ifp->if_snd); 364 365 /* set supported rates */ 366 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 367 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 368 sc->sc_last_txrate = -1; 369 370 /* set channels */ 371 for (i = 1; i <= 14; i++) { 372 ic->ic_channels[i].ic_freq = 373 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 374 ic->ic_channels[i].ic_flags = 375 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 376 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 377 } 378 379 /* OpenBSD supports IEEE80211_C_RSN too */ 380 /* set the rest */ 381 ic->ic_ifp = ifp; 382 ic->ic_caps = 383 IEEE80211_C_IBSS | 384 IEEE80211_C_MONITOR | 385 IEEE80211_C_SHPREAMBLE | 386 IEEE80211_C_SHSLOT | 387 IEEE80211_C_WEP | 388 IEEE80211_C_WPA; 389 ic->ic_opmode = IEEE80211_M_STA; 390 ic->ic_state = IEEE80211_S_INIT; 391 for (i = 0; i < 6; i++) 392 ic->ic_myaddr[i] = malo_ctl_read1(sc, 0xa528 + i); 393 394 /* show our mac address */ 395 aprint_normal(", address %s\n", ether_sprintf(ic->ic_myaddr)); 396 397 /* attach interface */ 398 if_attach(ifp); 399 ieee80211_ifattach(ic); 400 401 /* post attach vector functions */ 402 sc->sc_newstate = ic->ic_newstate; 403 ic->ic_newstate = malo_newstate; 404 ic->ic_newassoc = malo_newassoc; 405 ic->ic_node_alloc = malo_node_alloc; 406 ic->ic_updateslot = malo_update_slot; 407 408 ieee80211_media_init(ic, malo_media_change, malo_media_status); 409 410 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 411 sizeof(struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN, 412 &sc->sc_drvbpf); 413 414 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 415 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 416 sc->sc_rxtap.wr_ihdr.it_present = htole32(MALO_RX_RADIOTAP_PRESENT); 417 418 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 419 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 420 sc->sc_txtap.wt_ihdr.it_present = htole32(MALO_TX_RADIOTAP_PRESENT); 421 422 ieee80211_announce(ic); 423 424 return (0); 425 } 426 427 int 428 malo_detach(void *arg) 429 { 430 struct malo_softc *sc = arg; 431 struct ieee80211com *ic = &sc->sc_ic; 432 struct ifnet *ifp = &sc->sc_if; 433 434 /* remove channel scanning timer */ 435 callout_stop(&sc->sc_scan_to); 436 437 malo_stop(ifp, 1); 438 ieee80211_ifdetach(ic); 439 if_detach(ifp); 440 malo_free_cmd(sc); 441 malo_free_rx_ring(sc, &sc->sc_rxring); 442 malo_free_tx_ring(sc, &sc->sc_txring); 443 444 return (0); 445 } 446 447 static int 448 malo_alloc_cmd(struct malo_softc *sc) 449 { 450 int error, nsegs; 451 452 error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, 453 PAGE_SIZE, 0, BUS_DMA_ALLOCNOW, &sc->sc_cmd_dmam); 454 if (error != 0) { 455 aprint_error_dev(sc->sc_dev, "can not create DMA tag\n"); 456 return (-1); 457 } 458 459 error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, PAGE_SIZE, 460 0, &sc->sc_cmd_dmas, 1, &nsegs, BUS_DMA_WAITOK); 461 if (error != 0) { 462 aprint_error_dev(sc->sc_dev, "error alloc dma memory\n"); 463 return (-1); 464 } 465 466 error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cmd_dmas, nsegs, 467 PAGE_SIZE, (void **)&sc->sc_cmd_mem, BUS_DMA_WAITOK); 468 if (error != 0) { 469 aprint_error_dev(sc->sc_dev, "error map dma memory\n"); 470 return (-1); 471 } 472 473 error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmd_dmam, 474 sc->sc_cmd_mem, PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 475 if (error != 0) { 476 aprint_error_dev(sc->sc_dev, "error load dma memory\n"); 477 bus_dmamem_free(sc->sc_dmat, &sc->sc_cmd_dmas, nsegs); 478 return (-1); 479 } 480 481 sc->sc_cookie = sc->sc_cmd_mem; 482 *sc->sc_cookie = htole32(0xaa55aa55); 483 sc->sc_cmd_mem = ((char*)sc->sc_cmd_mem) + sizeof(uint32_t); 484 sc->sc_cookie_dmaaddr = sc->sc_cmd_dmam->dm_segs[0].ds_addr; 485 sc->sc_cmd_dmaaddr = sc->sc_cmd_dmam->dm_segs[0].ds_addr + 486 sizeof(uint32_t); 487 488 return (0); 489 } 490 491 static void 492 malo_free_cmd(struct malo_softc *sc) 493 { 494 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 495 BUS_DMASYNC_POSTWRITE); 496 bus_dmamap_unload(sc->sc_dmat, sc->sc_cmd_dmam); 497 bus_dmamem_unmap(sc->sc_dmat, sc->sc_cookie, PAGE_SIZE); 498 bus_dmamem_free(sc->sc_dmat, &sc->sc_cmd_dmas, 1); 499 } 500 501 static void 502 malo_send_cmd(struct malo_softc *sc, bus_addr_t addr) 503 { 504 malo_ctl_write4(sc, MALO_REG_GEN_PTR, (uint32_t)addr); 505 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 506 malo_ctl_write4(sc, MALO_REG_H2A_INTERRUPT_EVENTS, 2); /* CPU_TRANSFER_CMD */ 507 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 508 } 509 510 static int 511 malo_send_cmd_dma(struct malo_softc *sc, bus_addr_t addr) 512 { 513 int i; 514 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 515 516 malo_send_cmd(sc, addr); 517 518 for (i = 0; i < MALO_CMD_TIMEOUT; i++) { 519 delay(100); 520 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 521 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 522 if (hdr->cmd & htole16(0x8000)) 523 break; 524 } 525 if (i == MALO_CMD_TIMEOUT) { 526 aprint_error_dev(sc->sc_dev, "timeout while waiting for cmd response!\n"); 527 return (ETIMEDOUT); 528 } 529 530 malo_cmd_response(sc); 531 532 return (0); 533 } 534 535 static int 536 malo_alloc_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring, int count) 537 { 538 struct malo_rx_desc *desc; 539 struct malo_rx_data *data; 540 int i, nsegs, error; 541 542 ring->count = count; 543 ring->cur = ring->next = 0; 544 545 error = bus_dmamap_create(sc->sc_dmat, 546 count * sizeof(struct malo_rx_desc), 1, 547 count * sizeof(struct malo_rx_desc), 0, 548 BUS_DMA_NOWAIT, &ring->map); 549 if (error != 0) { 550 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 551 goto fail; 552 } 553 554 error = bus_dmamem_alloc(sc->sc_dmat, 555 count * sizeof(struct malo_rx_desc), 556 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 557 558 if (error != 0) { 559 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 560 goto fail; 561 } 562 563 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 564 count * sizeof(struct malo_rx_desc), (void **)&ring->desc, 565 BUS_DMA_NOWAIT); 566 if (error != 0) { 567 aprint_error_dev(sc->sc_dev, "can't map desc DMA memory\n"); 568 goto fail; 569 } 570 571 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 572 count * sizeof(struct malo_rx_desc), NULL, BUS_DMA_NOWAIT); 573 if (error != 0) { 574 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 575 goto fail; 576 } 577 578 ring->physaddr = ring->map->dm_segs->ds_addr; 579 580 ring->data = malloc(count * sizeof (struct malo_rx_data), M_DEVBUF, 581 M_NOWAIT); 582 if (ring->data == NULL) { 583 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 584 error = ENOMEM; 585 goto fail; 586 } 587 588 /* 589 * Pre-allocate Rx buffers and populate Rx ring. 590 */ 591 memset(ring->data, 0, count * sizeof (struct malo_rx_data)); 592 for (i = 0; i < count; i++) { 593 desc = &ring->desc[i]; 594 data = &ring->data[i]; 595 596 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 597 0, BUS_DMA_NOWAIT, &data->map); 598 if (error != 0) { 599 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 600 goto fail; 601 } 602 603 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 604 if (data->m == NULL) { 605 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf\n"); 606 error = ENOMEM; 607 goto fail; 608 } 609 610 MCLGET(data->m, M_DONTWAIT); 611 if (!(data->m->m_flags & M_EXT)) { 612 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf cluster\n"); 613 error = ENOMEM; 614 goto fail; 615 } 616 617 error = bus_dmamap_load(sc->sc_dmat, data->map, 618 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 619 if (error != 0) { 620 aprint_error_dev(sc->sc_dev, "could not load rx buf DMA map"); 621 goto fail; 622 } 623 624 desc->status = htole16(1); 625 desc->physdata = htole32(data->map->dm_segs->ds_addr); 626 desc->physnext = htole32(ring->physaddr + 627 (i + 1) % count * sizeof(struct malo_rx_desc)); 628 } 629 630 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 631 BUS_DMASYNC_PREWRITE); 632 633 return (0); 634 635 fail: malo_free_rx_ring(sc, ring); 636 return (error); 637 } 638 639 static void 640 malo_reset_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring) 641 { 642 int i; 643 644 for (i = 0; i < ring->count; i++) 645 ring->desc[i].status = 0; 646 647 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 648 BUS_DMASYNC_PREWRITE); 649 650 ring->cur = ring->next = 0; 651 } 652 653 static void 654 malo_free_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring) 655 { 656 struct malo_rx_data *data; 657 int i; 658 659 if (ring->desc != NULL) { 660 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 661 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 662 bus_dmamap_unload(sc->sc_dmat, ring->map); 663 bus_dmamem_unmap(sc->sc_dmat, ring->desc, 664 ring->count * sizeof(struct malo_rx_desc)); 665 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 666 } 667 668 if (ring->data != NULL) { 669 for (i = 0; i < ring->count; i++) { 670 data = &ring->data[i]; 671 672 if (data->m != NULL) { 673 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 674 data->map->dm_mapsize, 675 BUS_DMASYNC_POSTREAD); 676 bus_dmamap_unload(sc->sc_dmat, data->map); 677 m_freem(data->m); 678 } 679 680 if (data->map != NULL) 681 bus_dmamap_destroy(sc->sc_dmat, data->map); 682 } 683 free(ring->data, M_DEVBUF); 684 } 685 } 686 687 static int 688 malo_alloc_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring, 689 int count) 690 { 691 int i, nsegs, error; 692 693 ring->count = count; 694 ring->queued = 0; 695 ring->cur = ring->next = ring->stat = 0; 696 697 error = bus_dmamap_create(sc->sc_dmat, 698 count * sizeof(struct malo_tx_desc), 1, 699 count * sizeof(struct malo_tx_desc), 0, BUS_DMA_NOWAIT, &ring->map); 700 if (error != 0) { 701 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 702 goto fail; 703 } 704 705 error = bus_dmamem_alloc(sc->sc_dmat, 706 count * sizeof(struct malo_tx_desc), PAGE_SIZE, 0, 707 &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 708 if (error != 0) { 709 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 710 goto fail; 711 } 712 713 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 714 count * sizeof(struct malo_tx_desc), (void **)&ring->desc, 715 BUS_DMA_NOWAIT); 716 if (error != 0) { 717 aprint_error_dev(sc->sc_dev, "can't map desc DMA memory\n"); 718 goto fail; 719 } 720 721 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 722 count * sizeof(struct malo_tx_desc), NULL, BUS_DMA_NOWAIT); 723 if (error != 0) { 724 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 725 goto fail; 726 } 727 728 ring->physaddr = ring->map->dm_segs->ds_addr; 729 730 ring->data = malloc(count * sizeof(struct malo_tx_data), M_DEVBUF, 731 M_NOWAIT); 732 if (ring->data == NULL) { 733 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 734 error = ENOMEM; 735 goto fail; 736 } 737 738 memset(ring->data, 0, count * sizeof(struct malo_tx_data)); 739 for (i = 0; i < count; i++) { 740 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 741 MALO_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 742 &ring->data[i].map); 743 if (error != 0) { 744 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 745 goto fail; 746 } 747 ring->desc[i].physnext = htole32(ring->physaddr + 748 (i + 1) % count * sizeof(struct malo_tx_desc)); 749 } 750 751 return (0); 752 753 fail: malo_free_tx_ring(sc, ring); 754 return (error); 755 } 756 757 static void 758 malo_reset_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring) 759 { 760 struct malo_tx_desc *desc; 761 struct malo_tx_data *data; 762 int i; 763 764 for (i = 0; i < ring->count; i++) { 765 desc = &ring->desc[i]; 766 data = &ring->data[i]; 767 768 if (data->m != NULL) { 769 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 770 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 771 bus_dmamap_unload(sc->sc_dmat, data->map); 772 m_freem(data->m); 773 data->m = NULL; 774 } 775 776 /* 777 * The node has already been freed at that point so don't call 778 * ieee80211_release_node() here. 779 */ 780 data->ni = NULL; 781 782 desc->status = 0; 783 } 784 785 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 786 BUS_DMASYNC_PREWRITE); 787 788 ring->queued = 0; 789 ring->cur = ring->next = ring->stat = 0; 790 } 791 792 static void 793 malo_free_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring) 794 { 795 struct malo_tx_data *data; 796 int i; 797 798 if (ring->desc != NULL) { 799 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 800 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 801 bus_dmamap_unload(sc->sc_dmat, ring->map); 802 bus_dmamem_unmap(sc->sc_dmat, ring->desc, 803 ring->count * sizeof(struct malo_tx_desc)); 804 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 805 } 806 807 if (ring->data != NULL) { 808 for (i = 0; i < ring->count; i++) { 809 data = &ring->data[i]; 810 811 if (data->m != NULL) { 812 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 813 data->map->dm_mapsize, 814 BUS_DMASYNC_POSTWRITE); 815 bus_dmamap_unload(sc->sc_dmat, data->map); 816 m_freem(data->m); 817 } 818 819 /* 820 * The node has already been freed at that point so 821 * don't call ieee80211_release_node() here. 822 */ 823 data->ni = NULL; 824 825 if (data->map != NULL) 826 bus_dmamap_destroy(sc->sc_dmat, data->map); 827 } 828 free(ring->data, M_DEVBUF); 829 } 830 } 831 832 static int 833 malo_init(struct ifnet *ifp) 834 { 835 struct malo_softc *sc = ifp->if_softc; 836 struct ieee80211com *ic = &sc->sc_ic; 837 int error; 838 839 DPRINTF(1, "%s: %s\n", ifp->if_xname, __func__); 840 841 /* if interface already runs stop it first */ 842 if (ifp->if_flags & IFF_RUNNING) 843 malo_stop(ifp, 1); 844 845 /* power on cardbus socket */ 846 if (sc->sc_enable) 847 sc->sc_enable(sc); 848 849 /* disable interrupts */ 850 malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 851 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_CAUSE, 0); 852 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0); 853 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0); 854 855 /* load firmware */ 856 if ((error = malo_load_bootimg(sc))) 857 goto fail; 858 if ((error = malo_load_firmware(sc))) 859 goto fail; 860 861 /* enable interrupts */ 862 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0x1f); 863 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 864 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0x1f); 865 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 866 867 if ((error = malo_cmd_get_spec(sc))) 868 goto fail; 869 870 /* select default channel */ 871 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 872 873 /* initialize hardware */ 874 if ((error = malo_cmd_set_channel(sc, ic->ic_bss->ni_chan))) { 875 aprint_error_dev(sc->sc_dev, "setting channel failed!\n"); 876 goto fail; 877 } 878 if ((error = malo_cmd_set_antenna(sc, 1))) { 879 aprint_error_dev(sc->sc_dev, "setting RX antenna failed!\n"); 880 goto fail; 881 } 882 if ((error = malo_cmd_set_antenna(sc, 2))) { 883 aprint_error_dev(sc->sc_dev, "setting TX antenna failed!\n"); 884 goto fail; 885 } 886 if ((error = malo_cmd_set_radio(sc, 1, 5))) { 887 aprint_error_dev(sc->sc_dev, "turn radio on failed!\n"); 888 goto fail; 889 } 890 if ((error = malo_cmd_set_txpower(sc, 100))) { 891 aprint_error_dev(sc->sc_dev, "setting TX power failed!\n"); 892 goto fail; 893 } 894 if ((error = malo_cmd_set_rts(sc, IEEE80211_RTS_MAX))) { 895 aprint_error_dev(sc->sc_dev, "setting RTS failed!\n"); 896 goto fail; 897 } 898 899 ifp->if_flags |= IFF_RUNNING; 900 901 if (ic->ic_opmode != IEEE80211_M_MONITOR) 902 /* start background scanning */ 903 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 904 else 905 /* in monitor mode change directly into run state */ 906 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 907 908 return (0); 909 910 fail: 911 /* reset adapter */ 912 DPRINTF(1, "%s: malo_init failed, resetting card\n", 913 device_xname(sc->sc_dev)); 914 malo_stop(ifp, 1); 915 return (error); 916 } 917 918 static int 919 malo_ioctl(struct ifnet *ifp, u_long cmd, void* data) 920 { 921 struct malo_softc *sc = ifp->if_softc; 922 struct ieee80211com *ic = &sc->sc_ic; 923 int s, error = 0; 924 925 s = splnet(); 926 927 switch (cmd) { 928 case SIOCSIFFLAGS: 929 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 930 break; 931 if (ifp->if_flags & IFF_UP) { 932 if ((ifp->if_flags & IFF_RUNNING) == 0) 933 malo_init(ifp); 934 } else { 935 if (ifp->if_flags & IFF_RUNNING) 936 malo_stop(ifp, 1); 937 } 938 break; 939 case SIOCADDMULTI: 940 case SIOCDELMULTI: 941 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 942 /* setup multicast filter, etc */ 943 error = 0; 944 } 945 break; 946 case SIOCS80211CHANNEL: 947 /* allow fast channel switching in monitor mode */ 948 error = ieee80211_ioctl(ic, cmd, data); 949 if (error == ENETRESET && 950 ic->ic_opmode == IEEE80211_M_MONITOR) { 951 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 952 (IFF_UP | IFF_RUNNING)) { 953 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 954 malo_cmd_set_channel(sc, ic->ic_bss->ni_chan); 955 } 956 error = 0; 957 } 958 break; 959 default: 960 error = ieee80211_ioctl(ic, cmd, data); 961 break; 962 } 963 964 if (error == ENETRESET) { 965 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 966 (IFF_UP | IFF_RUNNING)) 967 malo_init(ifp); 968 error = 0; 969 } 970 971 splx(s); 972 973 return (error); 974 } 975 976 static void 977 malo_start(struct ifnet *ifp) 978 { 979 struct malo_softc *sc = ifp->if_softc; 980 struct ieee80211com *ic = &sc->sc_ic; 981 struct mbuf *m0; 982 struct ether_header *eh; 983 struct ieee80211_node *ni = NULL; 984 985 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 986 987 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 988 return; 989 990 for (;;) { 991 IF_POLL(&ic->ic_mgtq, m0); 992 if (m0 != NULL) { 993 if (sc->sc_txring.queued >= MALO_TX_RING_COUNT) { 994 ifp->if_flags |= IFF_OACTIVE; 995 break; 996 } 997 IF_DEQUEUE(&ic->ic_mgtq, m0); 998 999 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1000 m0->m_pkthdr.rcvif = NULL; 1001 1002 bpf_mtap3(ic->ic_rawbpf, m0); 1003 1004 if (malo_tx_data(sc, m0, ni) != 0) 1005 break; 1006 } else { 1007 if (ic->ic_state != IEEE80211_S_RUN) 1008 break; 1009 IFQ_POLL(&ifp->if_snd, m0); 1010 if (m0 == NULL) 1011 break; 1012 if (sc->sc_txring.queued >= MALO_TX_RING_COUNT - 1) { 1013 ifp->if_flags |= IFF_OACTIVE; 1014 break; 1015 } 1016 1017 if (m0->m_len < sizeof (*eh) && 1018 (m0 = m_pullup(m0, sizeof (*eh))) == NULL) { 1019 ifp->if_oerrors++; 1020 continue; 1021 } 1022 eh = mtod(m0, struct ether_header *); 1023 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1024 if (ni == NULL) { 1025 m_freem(m0); 1026 ifp->if_oerrors++; 1027 continue; 1028 } 1029 1030 // XXX must I call ieee_classify at this point ? 1031 1032 IFQ_DEQUEUE(&ifp->if_snd, m0); 1033 bpf_mtap(ifp, m0); 1034 1035 m0 = ieee80211_encap(ic, m0, ni); 1036 if (m0 == NULL) 1037 continue; 1038 bpf_mtap(ifp, m0); 1039 1040 if (malo_tx_data(sc, m0, ni) != 0) { 1041 ieee80211_free_node(ni); 1042 ifp->if_oerrors++; 1043 break; 1044 } 1045 } 1046 } 1047 } 1048 1049 static void 1050 malo_stop(struct ifnet* ifp, int disable) 1051 { 1052 struct malo_softc *sc = ifp->if_softc; 1053 struct ieee80211com *ic = &sc->sc_ic; 1054 1055 DPRINTF(1, "%s: %s\n", ifp->if_xname, __func__); 1056 1057 /* reset adapter */ 1058 if (ifp->if_flags & IFF_RUNNING) 1059 malo_ctl_write4(sc, MALO_REG_H2A_INTERRUPT_EVENTS, (1 << 15)); 1060 1061 /* device is not running anymore */ 1062 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1063 1064 /* change back to initial state */ 1065 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 1066 1067 /* reset RX / TX rings */ 1068 malo_reset_tx_ring(sc, &sc->sc_txring); 1069 malo_reset_rx_ring(sc, &sc->sc_rxring); 1070 1071 /* set initial rate */ 1072 sc->sc_last_txrate = -1; 1073 1074 /* power off cardbus socket */ 1075 if (sc->sc_disable) 1076 sc->sc_disable(sc); 1077 } 1078 1079 static void 1080 malo_watchdog(struct ifnet *ifp) 1081 { 1082 1083 } 1084 1085 static int 1086 malo_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 1087 { 1088 struct ifnet *ifp = ic->ic_ifp; 1089 struct malo_softc *sc = ifp->if_softc; 1090 enum ieee80211_state ostate; 1091 int rate; 1092 1093 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1094 1095 ostate = ic->ic_state; 1096 callout_stop(&sc->sc_scan_to); 1097 1098 switch (nstate) { 1099 case IEEE80211_S_INIT: 1100 DPRINTF(1, "%s: newstate INIT\n", device_xname(sc->sc_dev)); 1101 break; 1102 case IEEE80211_S_SCAN: 1103 DPRINTF(1, "%s: newstate SCAN\n", device_xname(sc->sc_dev)); 1104 if (ostate == IEEE80211_S_INIT) { 1105 if (malo_cmd_set_prescan(sc) != 0) { 1106 DPRINTF(1, "%s: can't set prescan\n", 1107 device_xname(sc->sc_dev)); 1108 } 1109 } else { 1110 malo_cmd_set_channel(sc, ic->ic_curchan); 1111 } 1112 callout_schedule(&sc->sc_scan_to, hz/2); 1113 break; 1114 case IEEE80211_S_AUTH: 1115 DPRINTF(1, "%s: newstate AUTH\n", device_xname(sc->sc_dev)); 1116 malo_cmd_set_postscan(sc, ic->ic_myaddr, 1); 1117 malo_cmd_set_channel(sc, ic->ic_curchan); 1118 break; 1119 case IEEE80211_S_ASSOC: 1120 DPRINTF(1, "%s: newstate ASSOC\n", device_xname(sc->sc_dev)); 1121 malo_cmd_set_channel(sc, ic->ic_curchan); 1122 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1123 malo_cmd_set_radio(sc, 1, 3); /* short preamble */ 1124 else 1125 malo_cmd_set_radio(sc, 1, 1); /* long preamble */ 1126 1127 malo_cmd_set_aid(sc, ic->ic_bss->ni_bssid, 1128 ic->ic_bss->ni_associd); 1129 1130 if (ic->ic_fixed_rate == -1) 1131 /* automatic rate adaption */ 1132 malo_cmd_set_rate(sc, 0); 1133 else { 1134 /* fixed rate */ 1135 rate = malo_fix2rate(ic->ic_fixed_rate); 1136 malo_cmd_set_rate(sc, rate); 1137 } 1138 1139 malo_set_slot(sc); 1140 break; 1141 case IEEE80211_S_RUN: 1142 DPRINTF(1, "%s: newstate RUN\n", device_xname(sc->sc_dev)); 1143 break; 1144 default: 1145 break; 1146 } 1147 1148 return (sc->sc_newstate(ic, nstate, arg)); 1149 } 1150 1151 static void 1152 malo_newassoc(struct ieee80211_node *ni, int isnew) 1153 { 1154 } 1155 1156 static struct ieee80211_node * 1157 malo_node_alloc(struct ieee80211_node_table *nt) 1158 { 1159 struct malo_node *wn; 1160 1161 wn = malloc(sizeof(*wn), M_DEVBUF, M_NOWAIT | M_ZERO); 1162 if (wn == NULL) 1163 return (NULL); 1164 1165 return ((struct ieee80211_node *)wn); 1166 } 1167 1168 static int 1169 malo_media_change(struct ifnet *ifp) 1170 { 1171 int error; 1172 1173 DPRINTF(1, "%s: %s\n", ifp->if_xname, __func__); 1174 1175 error = ieee80211_media_change(ifp); 1176 if (error != ENETRESET) 1177 return (error); 1178 1179 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 1180 malo_init(ifp); 1181 1182 return (0); 1183 } 1184 1185 static void 1186 malo_media_status(struct ifnet *ifp, struct ifmediareq *imr) 1187 { 1188 struct malo_softc *sc = ifp->if_softc; 1189 struct ieee80211com *ic = &sc->sc_ic; 1190 1191 imr->ifm_status = IFM_AVALID; 1192 imr->ifm_active = IFM_IEEE80211; 1193 if (ic->ic_state == IEEE80211_S_RUN) 1194 imr->ifm_status |= IFM_ACTIVE; 1195 1196 /* report last TX rate used by chip */ 1197 imr->ifm_active |= ieee80211_rate2media(ic, sc->sc_last_txrate, 1198 ic->ic_curmode); 1199 1200 switch (ic->ic_opmode) { 1201 case IEEE80211_M_STA: 1202 break; 1203 case IEEE80211_M_IBSS: 1204 imr->ifm_active |= IFM_IEEE80211_ADHOC; 1205 break; 1206 case IEEE80211_M_AHDEMO: 1207 break; 1208 case IEEE80211_M_HOSTAP: 1209 break; 1210 case IEEE80211_M_MONITOR: 1211 imr->ifm_active |= IFM_IEEE80211_MONITOR; 1212 break; 1213 default: 1214 break; 1215 } 1216 1217 switch (ic->ic_curmode) { 1218 case IEEE80211_MODE_11B: 1219 imr->ifm_active |= IFM_IEEE80211_11B; 1220 break; 1221 case IEEE80211_MODE_11G: 1222 imr->ifm_active |= IFM_IEEE80211_11G; 1223 break; 1224 } 1225 } 1226 1227 static int 1228 malo_chip2rate(int chip_rate) 1229 { 1230 switch (chip_rate) { 1231 /* CCK rates */ 1232 case 0: return (2); 1233 case 1: return (4); 1234 case 2: return (11); 1235 case 3: return (22); 1236 1237 /* OFDM rates */ 1238 case 4: return (0); /* reserved */ 1239 case 5: return (12); 1240 case 6: return (18); 1241 case 7: return (24); 1242 case 8: return (36); 1243 case 9: return (48); 1244 case 10: return (72); 1245 case 11: return (96); 1246 case 12: return (108); 1247 1248 /* no rate select yet or unknown rate */ 1249 default: return (-1); 1250 } 1251 } 1252 1253 static int 1254 malo_fix2rate(int fix_rate) 1255 { 1256 switch (fix_rate) { 1257 /* CCK rates */ 1258 case 0: return (2); 1259 case 1: return (4); 1260 case 2: return (11); 1261 case 3: return (22); 1262 1263 /* OFDM rates */ 1264 case 4: return (12); 1265 case 5: return (18); 1266 case 6: return (24); 1267 case 7: return (36); 1268 case 8: return (48); 1269 case 9: return (72); 1270 case 10: return (96); 1271 case 11: return (108); 1272 1273 /* unknown rate: should not happen */ 1274 default: return (0); 1275 } 1276 } 1277 1278 static void 1279 malo_next_scan(void *arg) 1280 { 1281 struct malo_softc *sc = arg; 1282 struct ieee80211com *ic = &sc->sc_ic; 1283 int s; 1284 1285 DPRINTF(1, "%s: %s\n", sc->sc_if.if_xname, __func__); 1286 1287 s = splnet(); 1288 1289 if (ic->ic_state == IEEE80211_S_SCAN) 1290 ieee80211_next_scan(ic); 1291 1292 splx(s); 1293 } 1294 1295 static void 1296 malo_tx_intr(struct malo_softc *sc) 1297 { 1298 struct ifnet *ifp = &sc->sc_if; 1299 struct malo_tx_desc *desc; 1300 struct malo_tx_data *data; 1301 struct malo_node *rn; 1302 int stat; 1303 1304 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1305 1306 stat = sc->sc_txring.stat; 1307 for (;;) { 1308 desc = &sc->sc_txring.desc[sc->sc_txring.stat]; 1309 data = &sc->sc_txring.data[sc->sc_txring.stat]; 1310 rn = (struct malo_node *)data->ni; 1311 1312 /* check if TX descriptor is not owned by FW anymore */ 1313 if ((le32toh(desc->status) & MALO_TXD_STATUS_FW_OWNED) || 1314 !(le32toh(data->softstat) & MALO_TXD_STATUS_FAILED_AGING)) 1315 break; 1316 1317 /* if no frame has been sent, ignore */ 1318 if (rn == NULL) 1319 goto next; 1320 1321 /* check TX state */ 1322 switch (le32toh(desc->status) & MALO_TXD_STATUS_USED) { 1323 case MALO_TXD_STATUS_OK: 1324 DPRINTF(2, "%s: data frame was sent successfully\n", 1325 device_xname(sc->sc_dev)); 1326 ifp->if_opackets++; 1327 break; 1328 default: 1329 DPRINTF(1, "%s: data frame sending error\n", 1330 device_xname(sc->sc_dev)); 1331 ifp->if_oerrors++; 1332 break; 1333 } 1334 1335 /* save last used TX rate */ 1336 sc->sc_last_txrate = malo_chip2rate(desc->datarate); 1337 1338 /* cleanup TX data and TX descriptor */ 1339 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1340 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1341 bus_dmamap_unload(sc->sc_dmat, data->map); 1342 m_freem(data->m); 1343 ieee80211_free_node(data->ni); 1344 data->m = NULL; 1345 data->ni = NULL; 1346 data->softstat &= htole32(~0x80); 1347 desc->status = 0; 1348 desc->len = 0; 1349 1350 DPRINTF(2, "%s: tx done idx=%u\n", 1351 device_xname(sc->sc_dev), sc->sc_txring.stat); 1352 1353 sc->sc_txring.queued--; 1354 next: 1355 if (++sc->sc_txring.stat >= sc->sc_txring.count) 1356 sc->sc_txring.stat = 0; 1357 if (sc->sc_txring.stat == stat) 1358 break; 1359 } 1360 1361 sc->sc_tx_timer = 0; 1362 ifp->if_flags &= ~IFF_OACTIVE; 1363 malo_start(ifp); 1364 } 1365 1366 static int 1367 malo_tx_data(struct malo_softc *sc, struct mbuf *m0, 1368 struct ieee80211_node *ni) 1369 { 1370 struct ieee80211com *ic = &sc->sc_ic; 1371 struct ifnet *ifp = &sc->sc_if; 1372 struct malo_tx_desc *desc; 1373 struct malo_tx_data *data; 1374 struct ieee80211_frame *wh; 1375 struct ieee80211_key *k; 1376 struct mbuf *mnew; 1377 int error; 1378 1379 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1380 1381 desc = &sc->sc_txring.desc[sc->sc_txring.cur]; 1382 data = &sc->sc_txring.data[sc->sc_txring.cur]; 1383 1384 if (m0->m_len < sizeof(struct ieee80211_frame)) { 1385 m0 = m_pullup(m0, sizeof(struct ieee80211_frame)); 1386 if (m0 == NULL) { 1387 ifp->if_ierrors++; 1388 return (ENOBUFS); 1389 } 1390 } 1391 wh = mtod(m0, struct ieee80211_frame *); 1392 1393 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1394 k = ieee80211_crypto_encap(ic, ni, m0); 1395 if (k == NULL) { 1396 m_freem(m0); 1397 return ENOBUFS; 1398 } 1399 1400 /* packet header may have moved, reset our local pointer */ 1401 wh = mtod(m0, struct ieee80211_frame *); 1402 } 1403 1404 if (sc->sc_drvbpf != NULL) { 1405 struct malo_tx_radiotap_hdr *tap = &sc->sc_txtap; 1406 1407 tap->wt_flags = 0; 1408 tap->wt_chan_freq = htole16(ni->ni_chan->ic_freq); 1409 tap->wt_chan_flags = htole16(ni->ni_chan->ic_flags); 1410 tap->wt_rate = sc->sc_last_txrate; 1411 if (wh->i_fc[1] & IEEE80211_FC1_WEP) 1412 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1413 1414 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1415 } 1416 1417 /* 1418 * inject FW specific fields into the 802.11 frame 1419 * 1420 * 2 bytes FW len (inject) 1421 * 24 bytes 802.11 frame header 1422 * 6 bytes addr4 (inject) 1423 * n bytes 802.11 frame body 1424 * 1425 * For now copy all into a new mcluster. 1426 */ 1427 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1428 if (mnew == NULL) 1429 return (ENOBUFS); 1430 MCLGET(mnew, M_DONTWAIT); 1431 if (!(mnew->m_flags & M_EXT)) { 1432 m_free(mnew); 1433 return (ENOBUFS); 1434 } 1435 1436 *mtod(mnew, uint16_t *) = htole16(m0->m_pkthdr.len - 24); /* FW len */ 1437 memmove(mtod(mnew, char*) + 2, wh, sizeof(*wh)); 1438 memset(mtod(mnew, char*) + 26, 0, 6); 1439 m_copydata(m0, sizeof(*wh), m0->m_pkthdr.len - sizeof(*wh), 1440 mtod(mnew, char*) + 32); 1441 mnew->m_pkthdr.len = mnew->m_len = m0->m_pkthdr.len + 8; 1442 m_freem(m0); 1443 m0 = mnew; 1444 1445 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1446 BUS_DMA_NOWAIT); 1447 if (error != 0) { 1448 aprint_error_dev(sc->sc_dev, "can't map mbuf (error %d)\n", error); 1449 m_freem(m0); 1450 return (error); 1451 } 1452 1453 data->m = m0; 1454 data->ni = ni; 1455 data->softstat |= htole32(0x80); 1456 1457 malo_tx_setup_desc(sc, desc, m0->m_pkthdr.len, 1, 1458 data->map->dm_segs, data->map->dm_nsegs); 1459 1460 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1461 BUS_DMASYNC_PREWRITE); 1462 bus_dmamap_sync(sc->sc_dmat, sc->sc_txring.map, 1463 sc->sc_txring.cur * sizeof(struct malo_tx_desc), 1464 sizeof(struct malo_tx_desc), BUS_DMASYNC_PREWRITE); 1465 1466 DPRINTF(2, "%s: sending frame, pktlen=%u, idx=%u\n", 1467 device_xname(sc->sc_dev), m0->m_pkthdr.len, sc->sc_txring.cur); 1468 1469 sc->sc_txring.queued++; 1470 sc->sc_txring.cur = (sc->sc_txring.cur + 1) % MALO_TX_RING_COUNT; 1471 1472 /* kick data TX */ 1473 malo_ctl_write4(sc, MALO_REG_H2A_INTERRUPT_EVENTS, 1); 1474 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 1475 1476 return (0); 1477 } 1478 1479 static void 1480 malo_tx_setup_desc(struct malo_softc *sc, struct malo_tx_desc *desc, 1481 int len, int rate, const bus_dma_segment_t *segs, int nsegs) 1482 { 1483 desc->len = htole16(segs[0].ds_len); 1484 desc->datarate = rate; /* 0 = mgmt frame, 1 = data frame */ 1485 desc->physdata = htole32(segs[0].ds_addr); 1486 desc->status = htole32(MALO_TXD_STATUS_OK | MALO_TXD_STATUS_FW_OWNED); 1487 } 1488 1489 static void 1490 malo_rx_intr(struct malo_softc *sc) 1491 { 1492 struct ieee80211com *ic = &sc->sc_ic; 1493 struct ifnet *ifp = &sc->sc_if; 1494 struct malo_rx_desc *desc; 1495 struct malo_rx_data *data; 1496 struct ieee80211_frame *wh; 1497 struct ieee80211_node *ni; 1498 struct mbuf *mnew, *m; 1499 uint32_t rxRdPtr, rxWrPtr; 1500 int error, i; 1501 1502 rxRdPtr = malo_mem_read4(sc, sc->sc_RxPdRdPtr); 1503 rxWrPtr = malo_mem_read4(sc, sc->sc_RxPdWrPtr); 1504 1505 for (i = 0; i < MALO_RX_RING_COUNT && rxRdPtr != rxWrPtr; i++) { 1506 desc = &sc->sc_rxring.desc[sc->sc_rxring.cur]; 1507 data = &sc->sc_rxring.data[sc->sc_rxring.cur]; 1508 1509 bus_dmamap_sync(sc->sc_dmat, sc->sc_rxring.map, 1510 sc->sc_rxring.cur * sizeof(struct malo_rx_desc), 1511 sizeof(struct malo_rx_desc), BUS_DMASYNC_POSTREAD); 1512 1513 DPRINTF(3, "%s: rx intr idx=%d, rxctrl=0x%02x, rssi=%d, " 1514 "status=0x%02x, channel=%d, len=%d, res1=%02x, rate=%d, " 1515 "physdata=0x%04x, physnext=0x%04x, qosctrl=%02x, res2=%d\n", 1516 device_xname(sc->sc_dev), 1517 sc->sc_rxring.cur, desc->rxctrl, desc->rssi, desc->status, 1518 desc->channel, le16toh(desc->len), desc->reserved1, 1519 desc->datarate, le32toh(desc->physdata), 1520 le32toh(desc->physnext), desc->qosctrl, desc->reserved2); 1521 1522 if ((desc->rxctrl & 0x80) == 0) 1523 break; 1524 1525 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1526 if (mnew == NULL) { 1527 ifp->if_ierrors++; 1528 goto skip; 1529 } 1530 1531 MCLGET(mnew, M_DONTWAIT); 1532 if (!(mnew->m_flags & M_EXT)) { 1533 m_freem(mnew); 1534 ifp->if_ierrors++; 1535 goto skip; 1536 } 1537 1538 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1539 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1540 bus_dmamap_unload(sc->sc_dmat, data->map); 1541 1542 error = bus_dmamap_load(sc->sc_dmat, data->map, 1543 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1544 if (error != 0) { 1545 m_freem(mnew); 1546 1547 error = bus_dmamap_load(sc->sc_dmat, data->map, 1548 mtod(data->m, void *), MCLBYTES, NULL, 1549 BUS_DMA_NOWAIT); 1550 if (error != 0) { 1551 panic("%s: could not load old rx mbuf", 1552 device_xname(sc->sc_dev)); 1553 } 1554 ifp->if_ierrors++; 1555 goto skip; 1556 } 1557 1558 /* 1559 * New mbuf mbuf successfully loaded 1560 */ 1561 m = data->m; 1562 data->m = mnew; 1563 desc->physdata = htole32(data->map->dm_segs->ds_addr); 1564 1565 /* finalize mbuf */ 1566 m->m_pkthdr.rcvif = ifp; 1567 m->m_pkthdr.len = m->m_len = le16toh(desc->len); 1568 1569 /* 1570 * cut out FW specific fields from the 802.11 frame 1571 * 1572 * 2 bytes FW len (cut out) 1573 * 24 bytes 802.11 frame header 1574 * 6 bytes addr4 (cut out) 1575 * n bytes 802.11 frame data 1576 */ 1577 memmove(m->m_data +6, m->m_data, 26); 1578 m_adj(m, 8); 1579 1580 if (sc->sc_drvbpf != NULL) { 1581 struct malo_rx_radiotap_hdr *tap = &sc->sc_rxtap; 1582 1583 tap->wr_flags = 0; 1584 tap->wr_chan_freq = 1585 htole16(ic->ic_bss->ni_chan->ic_freq); 1586 tap->wr_chan_flags = 1587 htole16(ic->ic_bss->ni_chan->ic_flags); 1588 1589 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 1590 } 1591 1592 wh = mtod(m, struct ieee80211_frame *); 1593 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1594 1595 /* send the frame to the 802.11 layer */ 1596 ieee80211_input(ic, m, ni, desc->rssi, 0); 1597 1598 /* node is no longer needed */ 1599 ieee80211_free_node(ni); 1600 1601 skip: 1602 desc->rxctrl = 0; 1603 rxRdPtr = le32toh(desc->physnext); 1604 1605 bus_dmamap_sync(sc->sc_dmat, sc->sc_rxring.map, 1606 sc->sc_rxring.cur * sizeof(struct malo_rx_desc), 1607 sizeof(struct malo_rx_desc), BUS_DMASYNC_PREWRITE); 1608 1609 sc->sc_rxring.cur = (sc->sc_rxring.cur + 1) % 1610 MALO_RX_RING_COUNT; 1611 } 1612 1613 malo_mem_write4(sc, sc->sc_RxPdRdPtr, rxRdPtr); 1614 } 1615 1616 static int 1617 malo_get_firmware(struct malo_softc *sc, const char *name, 1618 uint8_t** firmware_image, size_t* size) 1619 { 1620 firmware_handle_t fw; 1621 int error; 1622 1623 1624 /* load firmware image from disk */ 1625 if ((error = firmware_open("malo", name, &fw) != 0)) { 1626 aprint_error_dev(sc->sc_dev, "could not read firmware file\n"); 1627 return error; 1628 } 1629 1630 *size = firmware_get_size(fw); 1631 1632 *firmware_image = firmware_malloc(*size); 1633 if (*firmware_image == NULL) { 1634 aprint_error_dev(sc->sc_dev, "not enough memory to stock firmware\n"); 1635 error = ENOMEM; 1636 goto fail1; 1637 } 1638 1639 if ((error = firmware_read(fw, 0, *firmware_image, *size)) != 0) { 1640 aprint_error_dev(sc->sc_dev, "can't get firmware\n"); 1641 goto fail2; 1642 } 1643 1644 firmware_close(fw); 1645 1646 return 0; 1647 fail2: 1648 firmware_free(*firmware_image, *size); 1649 fail1: 1650 firmware_close(fw); 1651 return error; 1652 } 1653 1654 static int 1655 malo_load_bootimg(struct malo_softc *sc) 1656 { 1657 const char *name = "malo8335-h"; 1658 uint8_t *ucode; 1659 size_t size; 1660 int error, i; 1661 1662 /* load boot firmware */ 1663 if ((error = malo_get_firmware(sc, name, &ucode, &size)) != 0) { 1664 aprint_error_dev(sc->sc_dev, "error %d, could not read firmware %s\n", 1665 error, name); 1666 return (EIO); 1667 } 1668 1669 /* 1670 * It seems we are putting this code directly onto the stack of 1671 * the ARM cpu. I don't know why we need to instruct the DMA 1672 * engine to move the code. This is a big riddle without docu. 1673 */ 1674 DPRINTF(1, "%s: loading boot firmware\n", device_xname(sc->sc_dev)); 1675 malo_mem_write2(sc, 0xbef8, 0x001); 1676 malo_mem_write2(sc, 0xbefa, size); 1677 malo_mem_write4(sc, 0xbefc, 0); 1678 1679 bus_space_write_region_1(sc->sc_mem1_bt, sc->sc_mem1_bh, 0xbf00, 1680 ucode, size); 1681 1682 /* 1683 * we loaded the firmware into card memory now tell the CPU 1684 * to fetch the code and execute it. The memory mapped via the 1685 * first bar is internaly mapped to 0xc0000000. 1686 */ 1687 malo_send_cmd(sc, 0xc000bef8); 1688 1689 /* wait for the device to go into FW loading mode */ 1690 for (i = 0; i < 10; i++) { 1691 delay(50); 1692 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_READ); 1693 if (malo_ctl_read4(sc, 0x0c14) == 0x5) 1694 break; 1695 } 1696 if (i == 10) { 1697 aprint_error_dev(sc->sc_dev, "timeout at boot firmware load!\n"); 1698 free(ucode, M_DEVBUF); 1699 return (ETIMEDOUT); 1700 } 1701 firmware_free(ucode, size); 1702 1703 /* tell the card we're done and... */ 1704 malo_mem_write2(sc, 0xbef8, 0x001); 1705 malo_mem_write2(sc, 0xbefa, 0); 1706 malo_mem_write4(sc, 0xbefc, 0); 1707 malo_send_cmd(sc, 0xc000bef8); 1708 1709 DPRINTF(1, "%s: boot firmware loaded\n", device_xname(sc->sc_dev)); 1710 1711 return (0); 1712 } 1713 1714 1715 static int 1716 malo_load_firmware(struct malo_softc *sc) 1717 { 1718 struct malo_cmdheader *hdr; 1719 const char *name = "malo8335-m"; 1720 void *data; 1721 uint8_t *ucode; 1722 size_t size, count, bsize; 1723 int i, sn, error; 1724 1725 /* load real firmware now */ 1726 if ((error = malo_get_firmware(sc, name, &ucode, &size)) != 0) { 1727 aprint_error_dev(sc->sc_dev, "error %d, could not read firmware %s\n", 1728 error, name); 1729 return (EIO); 1730 } 1731 1732 DPRINTF(1, "%s: uploading firmware\n", device_xname(sc->sc_dev)); 1733 1734 hdr = sc->sc_cmd_mem; 1735 data = hdr + 1; 1736 sn = 1; 1737 for (count = 0; count < size; count += bsize) { 1738 bsize = MIN(256, size - count); 1739 1740 hdr->cmd = htole16(0x0001); 1741 hdr->size = htole16(bsize); 1742 hdr->seqnum = htole16(sn++); 1743 hdr->result = 0; 1744 1745 memcpy(data, ucode + count, bsize); 1746 1747 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1748 BUS_DMASYNC_PREWRITE); 1749 malo_send_cmd(sc, sc->sc_cmd_dmaaddr); 1750 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1751 BUS_DMASYNC_POSTWRITE); 1752 delay(500); 1753 } 1754 firmware_free(ucode, size); 1755 1756 DPRINTF(1, "%s: firmware upload finished\n", device_xname(sc->sc_dev)); 1757 1758 /* 1759 * send a command with size 0 to tell that the firmware has been 1760 * uploaded 1761 */ 1762 hdr->cmd = htole16(0x0001); 1763 hdr->size = 0; 1764 hdr->seqnum = htole16(sn++); 1765 hdr->result = 0; 1766 1767 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1768 BUS_DMASYNC_PREWRITE); 1769 malo_send_cmd(sc, sc->sc_cmd_dmaaddr); 1770 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1771 BUS_DMASYNC_POSTWRITE); 1772 delay(100); 1773 1774 DPRINTF(1, "%s: loading firmware\n", device_xname(sc->sc_dev)); 1775 1776 /* wait until firmware has been loaded */ 1777 for (i = 0; i < 200; i++) { 1778 malo_ctl_write4(sc, 0x0c10, 0x5a); 1779 delay(500); 1780 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE | 1781 BUS_SPACE_BARRIER_READ); 1782 if (malo_ctl_read4(sc, 0x0c14) == 0xf0f1f2f4) 1783 break; 1784 } 1785 if (i == 200) { 1786 aprint_error_dev(sc->sc_dev, "timeout at firmware load!\n"); 1787 return (ETIMEDOUT); 1788 } 1789 1790 DPRINTF(1, "%s: firmware loaded\n", device_xname(sc->sc_dev)); 1791 1792 return (0); 1793 } 1794 1795 static int 1796 malo_set_slot(struct malo_softc *sc) 1797 { 1798 struct ieee80211com *ic = &sc->sc_ic; 1799 1800 if (ic->ic_flags & IEEE80211_F_SHSLOT) { 1801 /* set short slot */ 1802 if (malo_cmd_set_slot(sc, 1)) { 1803 aprint_error_dev(sc->sc_dev, "setting short slot failed\n"); 1804 return (ENXIO); 1805 } 1806 } else { 1807 /* set long slot */ 1808 if (malo_cmd_set_slot(sc, 0)) { 1809 aprint_error_dev(sc->sc_dev, "setting long slot failed\n"); 1810 return (ENXIO); 1811 } 1812 } 1813 1814 return (0); 1815 } 1816 1817 static void 1818 malo_update_slot(struct ifnet* ifp) 1819 { 1820 struct malo_softc *sc = ifp->if_softc; 1821 struct ieee80211com *ic = &sc->sc_ic; 1822 1823 malo_set_slot(sc); 1824 1825 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 1826 /* TODO */ 1827 } 1828 } 1829 1830 #ifdef MALO_DEBUG 1831 static void 1832 malo_hexdump(void *buf, int len) 1833 { 1834 u_char b[16]; 1835 int i, j, l; 1836 1837 for (i = 0; i < len; i += l) { 1838 printf("%4i:", i); 1839 l = min(sizeof(b), len - i); 1840 memcpy(b, (char*)buf + i, l); 1841 1842 for (j = 0; j < sizeof(b); j++) { 1843 if (j % 2 == 0) 1844 printf(" "); 1845 if (j % 8 == 0) 1846 printf(" "); 1847 if (j < l) 1848 printf("%02x", (int)b[j]); 1849 else 1850 printf(" "); 1851 } 1852 printf(" |"); 1853 for (j = 0; j < l; j++) { 1854 if (b[j] >= 0x20 && b[j] <= 0x7e) 1855 printf("%c", b[j]); 1856 else 1857 printf("."); 1858 } 1859 printf("|\n"); 1860 } 1861 } 1862 #endif 1863 1864 static const char * 1865 malo_cmd_string(uint16_t cmd) 1866 { 1867 int i; 1868 static char cmd_buf[16]; 1869 static const struct { 1870 uint16_t cmd_code; 1871 const char *cmd_string; 1872 } cmds[] = { 1873 { MALO_CMD_GET_HW_SPEC, "GetHwSpecifications" }, 1874 { MALO_CMD_SET_RADIO, "SetRadio" }, 1875 { MALO_CMD_SET_AID, "SetAid" }, 1876 { MALO_CMD_SET_TXPOWER, "SetTxPower" }, 1877 { MALO_CMD_SET_ANTENNA, "SetAntenna" }, 1878 { MALO_CMD_SET_PRESCAN, "SetPrescan" }, 1879 { MALO_CMD_SET_POSTSCAN, "SetPostscan" }, 1880 { MALO_CMD_SET_RATE, "SetRate" }, 1881 { MALO_CMD_SET_CHANNEL, "SetChannel" }, 1882 { MALO_CMD_SET_RTS, "SetRTS" }, 1883 { MALO_CMD_SET_SLOT, "SetSlot" }, 1884 }; 1885 1886 for (i = 0; i < sizeof(cmds) / sizeof(cmds[0]); i++) 1887 if ((le16toh(cmd) & 0x7fff) == cmds[i].cmd_code) 1888 return (cmds[i].cmd_string); 1889 1890 snprintf(cmd_buf, sizeof(cmd_buf), "unknown %#x", cmd); 1891 return (cmd_buf); 1892 } 1893 1894 static const char * 1895 malo_cmd_string_result(uint16_t result) 1896 { 1897 int i; 1898 static const struct { 1899 uint16_t result_code; 1900 const char *result_string; 1901 } results[] = { 1902 { MALO_CMD_RESULT_OK, "OK" }, 1903 { MALO_CMD_RESULT_ERROR, "general error" }, 1904 { MALO_CMD_RESULT_NOSUPPORT, "not supported" }, 1905 { MALO_CMD_RESULT_PENDING, "pending" }, 1906 { MALO_CMD_RESULT_BUSY, "ignored" }, 1907 { MALO_CMD_RESULT_PARTIALDATA, "incomplete" }, 1908 }; 1909 1910 for (i = 0; i < sizeof(results) / sizeof(results[0]); i++) 1911 if (le16toh(result) == results[i].result_code) 1912 return (results[i].result_string); 1913 1914 return ("unknown"); 1915 } 1916 1917 static int 1918 malo_cmd_get_spec(struct malo_softc *sc) 1919 { 1920 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 1921 struct malo_hw_spec *spec; 1922 1923 hdr->cmd = htole16(MALO_CMD_GET_HW_SPEC); 1924 hdr->size = htole16(sizeof(*hdr) + sizeof(*spec)); 1925 hdr->seqnum = htole16(42); /* the one and only */ 1926 hdr->result = 0; 1927 spec = (struct malo_hw_spec *)(hdr + 1); 1928 1929 memset(spec, 0, sizeof(*spec)); 1930 memset(spec->PermanentAddress, 0xff, ETHER_ADDR_LEN); 1931 spec->CookiePtr = htole32(sc->sc_cookie_dmaaddr); 1932 1933 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1934 BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD); 1935 1936 if (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr) != 0) 1937 return (ETIMEDOUT); 1938 1939 /* get the data from the buffer */ 1940 DPRINTF(1, "%s: get_hw_spec: V%x R%x, #WCB %d, #Mcast %d, Regcode %d, " 1941 "#Ant %d\n", device_xname(sc->sc_dev), htole16(spec->HwVersion), 1942 htole32(spec->FWReleaseNumber), htole16(spec->NumOfWCB), 1943 htole16(spec->NumOfMCastAdr), htole16(spec->RegionCode), 1944 htole16(spec->NumberOfAntenna)); 1945 1946 /* tell the DMA engine where our rings are */ 1947 malo_mem_write4(sc, le32toh(spec->RxPdRdPtr) & 0xffff, 1948 sc->sc_rxring.physaddr); 1949 malo_mem_write4(sc, le32toh(spec->RxPdWrPtr) & 0xffff, 1950 sc->sc_rxring.physaddr); 1951 malo_mem_write4(sc, le32toh(spec->WcbBase0) & 0xffff, 1952 sc->sc_txring.physaddr); 1953 1954 /* save DMA RX pointers for later use */ 1955 sc->sc_RxPdRdPtr = le32toh(spec->RxPdRdPtr) & 0xffff; 1956 sc->sc_RxPdWrPtr = le32toh(spec->RxPdWrPtr) & 0xffff; 1957 1958 return (0); 1959 } 1960 1961 static int 1962 malo_cmd_set_prescan(struct malo_softc *sc) 1963 { 1964 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 1965 1966 hdr->cmd = htole16(MALO_CMD_SET_PRESCAN); 1967 hdr->size = htole16(sizeof(*hdr)); 1968 hdr->seqnum = 1; 1969 hdr->result = 0; 1970 1971 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1972 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1973 1974 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 1975 } 1976 1977 static int 1978 malo_cmd_set_postscan(struct malo_softc *sc, uint8_t *macaddr, uint8_t ibsson) 1979 { 1980 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 1981 struct malo_cmd_postscan *body; 1982 1983 hdr->cmd = htole16(MALO_CMD_SET_POSTSCAN); 1984 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 1985 hdr->seqnum = 1; 1986 hdr->result = 0; 1987 body = (struct malo_cmd_postscan *)(hdr + 1); 1988 1989 memset(body, 0, sizeof(*body)); 1990 memcpy(&body->bssid, macaddr, ETHER_ADDR_LEN); 1991 body->isibss = htole32(ibsson); 1992 1993 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1994 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1995 1996 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 1997 } 1998 1999 static int 2000 malo_cmd_set_channel(struct malo_softc *sc, struct ieee80211_channel* chan) 2001 { 2002 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2003 struct ieee80211com *ic = &sc->sc_ic; 2004 struct malo_cmd_channel *body; 2005 uint8_t channel; 2006 2007 channel = ieee80211_chan2ieee(ic, chan); 2008 2009 hdr->cmd = htole16(MALO_CMD_SET_CHANNEL); 2010 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2011 hdr->seqnum = 1; 2012 hdr->result = 0; 2013 body = (struct malo_cmd_channel *)(hdr + 1); 2014 2015 memset(body, 0, sizeof(*body)); 2016 body->action = htole16(1); 2017 body->channel = channel; 2018 2019 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2020 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2021 2022 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2023 } 2024 2025 static int 2026 malo_cmd_set_antenna(struct malo_softc *sc, uint16_t antenna) 2027 { 2028 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2029 struct malo_cmd_antenna *body; 2030 2031 hdr->cmd = htole16(MALO_CMD_SET_ANTENNA); 2032 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2033 hdr->seqnum = 1; 2034 hdr->result = 0; 2035 body = (struct malo_cmd_antenna *)(hdr + 1); 2036 2037 memset(body, 0, sizeof(*body)); 2038 body->action = htole16(antenna); 2039 if (antenna == 1) 2040 body->mode = htole16(0xffff); 2041 else 2042 body->mode = htole16(2); 2043 2044 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2045 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2046 2047 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2048 } 2049 2050 static int 2051 malo_cmd_set_radio(struct malo_softc *sc, uint16_t enable, 2052 uint16_t preamble_mode) 2053 { 2054 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2055 struct malo_cmd_radio *body; 2056 2057 hdr->cmd = htole16(MALO_CMD_SET_RADIO); 2058 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2059 hdr->seqnum = 1; 2060 hdr->result = 0; 2061 body = (struct malo_cmd_radio *)(hdr + 1); 2062 2063 memset(body, 0, sizeof(*body)); 2064 body->action = htole16(1); 2065 body->preamble_mode = htole16(preamble_mode); 2066 body->enable = htole16(enable); 2067 2068 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2069 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2070 2071 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2072 } 2073 2074 static int 2075 malo_cmd_set_aid(struct malo_softc *sc, uint8_t *bssid, uint16_t associd) 2076 { 2077 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2078 struct malo_cmd_aid *body; 2079 2080 hdr->cmd = htole16(MALO_CMD_SET_AID); 2081 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2082 hdr->seqnum = 1; 2083 hdr->result = 0; 2084 body = (struct malo_cmd_aid *)(hdr + 1); 2085 2086 memset(body, 0, sizeof(*body)); 2087 body->associd = htole16(associd); 2088 memcpy(&body->macaddr[0], bssid, IEEE80211_ADDR_LEN); 2089 2090 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2091 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2092 2093 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2094 } 2095 2096 static int 2097 malo_cmd_set_txpower(struct malo_softc *sc, unsigned int powerlevel) 2098 { 2099 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2100 struct malo_cmd_txpower *body; 2101 2102 hdr->cmd = htole16(MALO_CMD_SET_TXPOWER); 2103 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2104 hdr->seqnum = 1; 2105 hdr->result = 0; 2106 body = (struct malo_cmd_txpower *)(hdr + 1); 2107 2108 memset(body, 0, sizeof(*body)); 2109 body->action = htole16(1); 2110 if (powerlevel < 30) 2111 body->supportpowerlvl = htole16(5); /* LOW */ 2112 else if (powerlevel >= 30 && powerlevel < 60) 2113 body->supportpowerlvl = htole16(10); /* MEDIUM */ 2114 else 2115 body->supportpowerlvl = htole16(15); /* HIGH */ 2116 2117 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2118 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2119 2120 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2121 } 2122 2123 static int 2124 malo_cmd_set_rts(struct malo_softc *sc, uint32_t threshold) 2125 { 2126 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2127 struct malo_cmd_rts *body; 2128 2129 hdr->cmd = htole16(MALO_CMD_SET_RTS); 2130 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2131 hdr->seqnum = 1; 2132 hdr->result = 0; 2133 body = (struct malo_cmd_rts *)(hdr + 1); 2134 2135 memset(body, 0, sizeof(*body)); 2136 body->action = htole16(1); 2137 body->threshold = htole32(threshold); 2138 2139 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2140 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2141 2142 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2143 } 2144 2145 static int 2146 malo_cmd_set_slot(struct malo_softc *sc, uint8_t slot) 2147 { 2148 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2149 struct malo_cmd_slot *body; 2150 2151 hdr->cmd = htole16(MALO_CMD_SET_SLOT); 2152 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2153 hdr->seqnum = 1; 2154 hdr->result = 0; 2155 body = (struct malo_cmd_slot *)(hdr + 1); 2156 2157 memset(body, 0, sizeof(*body)); 2158 body->action = htole16(1); 2159 body->slot = slot; 2160 2161 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2162 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2163 2164 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2165 } 2166 2167 static int 2168 malo_cmd_set_rate(struct malo_softc *sc, uint8_t rate) 2169 { 2170 struct ieee80211com *ic = &sc->sc_ic; 2171 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2172 struct malo_cmd_rate *body; 2173 int i; 2174 2175 hdr->cmd = htole16(MALO_CMD_SET_RATE); 2176 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2177 hdr->seqnum = 1; 2178 hdr->result = 0; 2179 body = (struct malo_cmd_rate *)(hdr + 1); 2180 2181 memset(body, 0,sizeof(*body)); 2182 2183 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2184 /* TODO */ 2185 } else 2186 { 2187 body->aprates[0] = 2; 2188 body->aprates[1] = 4; 2189 body->aprates[2] = 11; 2190 body->aprates[3] = 22; 2191 if (ic->ic_curmode == IEEE80211_MODE_11G) { 2192 body->aprates[4] = 0; 2193 body->aprates[5] = 12; 2194 body->aprates[6] = 18; 2195 body->aprates[7] = 24; 2196 body->aprates[8] = 36; 2197 body->aprates[9] = 48; 2198 body->aprates[10] = 72; 2199 body->aprates[11] = 96; 2200 body->aprates[12] = 108; 2201 } 2202 } 2203 2204 if (rate != 0) { 2205 /* fixed rate */ 2206 for (i = 0; i < 13; i++) { 2207 if (body->aprates[i] == rate) { 2208 body->rateindex = i; 2209 body->dataratetype = 1; 2210 break; 2211 } 2212 } 2213 } 2214 2215 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2216 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2217 2218 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2219 } 2220 2221 static void 2222 malo_cmd_response(struct malo_softc *sc) 2223 { 2224 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2225 2226 if (le16toh(hdr->result) != MALO_CMD_RESULT_OK) { 2227 aprint_error_dev(sc->sc_dev, "firmware cmd %s failed with %s\n", 2228 malo_cmd_string(hdr->cmd), 2229 malo_cmd_string_result(hdr->result)); 2230 } 2231 2232 #ifdef MALO_DEBUG 2233 aprint_error_dev(sc->sc_dev, "cmd answer for %s=%s\n", 2234 malo_cmd_string(hdr->cmd), 2235 malo_cmd_string_result(hdr->result)); 2236 2237 if (malo_d > 2) 2238 malo_hexdump(hdr, le16toh(hdr->size)); 2239 #endif 2240 } 2241
Indexes created Wed Sep 24 05:09:52 GMT 2025