malo.c revision 1.12
1 /* $NetBSD: malo.c,v 1.12 2018/06/26 06:48:00 msaitoh Exp $ */ 2 /* $OpenBSD: malo.c,v 1.92 2010/08/27 17:08:00 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Claudio Jeker <claudio (at) openbsd.org> 6 * Copyright (c) 2006 Marcus Glocker <mglocker (at) openbsd.org> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 #include <sys/cdefs.h> 22 __KERNEL_RCSID(0, "$NetBSD: malo.c,v 1.12 2018/06/26 06:48:00 msaitoh Exp $"); 23 24 #include <sys/param.h> 25 #include <sys/types.h> 26 27 #include <sys/device.h> 28 #include <sys/kernel.h> 29 #include <sys/malloc.h> 30 #include <sys/mbuf.h> 31 #include <sys/proc.h> 32 #include <sys/socket.h> 33 #include <sys/sockio.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 37 #include <machine/endian.h> 38 #include <machine/intr.h> 39 40 #include <net/if.h> 41 #include <net/if_media.h> 42 #include <net/if_ether.h> 43 44 #include <net/bpf.h> 45 46 #include <netinet/in.h> 47 #include <netinet/in_systm.h> 48 49 #include <net80211/ieee80211_var.h> 50 #include <net80211/ieee80211_radiotap.h> 51 52 #include <dev/firmload.h> 53 54 #include <dev/ic/malovar.h> 55 #include <dev/ic/maloreg.h> 56 57 #ifdef MALO_DEBUG 58 int malo_d = 2; 59 #define DPRINTF(l, x...) do { if ((l) <= malo_d) printf(x); } while (0) 60 #else 61 #define DPRINTF(l, x...) 62 #endif 63 64 /* internal structures and defines */ 65 struct malo_node { 66 struct ieee80211_node ni; 67 }; 68 69 struct malo_rx_data { 70 bus_dmamap_t map; 71 struct mbuf *m; 72 }; 73 74 struct malo_tx_data { 75 bus_dmamap_t map; 76 struct mbuf *m; 77 uint32_t softstat; 78 struct ieee80211_node *ni; 79 }; 80 81 /* RX descriptor used by HW */ 82 struct malo_rx_desc { 83 uint8_t rxctrl; 84 uint8_t rssi; 85 uint8_t status; 86 uint8_t channel; 87 uint16_t len; 88 uint8_t reserved1; /* actually unused */ 89 uint8_t datarate; 90 uint32_t physdata; /* DMA address of data */ 91 uint32_t physnext; /* DMA address of next control block */ 92 uint16_t qosctrl; 93 uint16_t reserved2; 94 } __packed; 95 96 /* TX descriptor used by HW */ 97 struct malo_tx_desc { 98 uint32_t status; 99 #define MALO_TXD_STATUS_IDLE 0x00000000 100 #define MALO_TXD_STATUS_USED 0x00000001 101 #define MALO_TXD_STATUS_OK 0x00000001 102 #define MALO_TXD_STATUS_OK_RETRY 0x00000002 103 #define MALO_TXD_STATUS_OK_MORE_RETRY 0x00000004 104 #define MALO_TXD_STATUS_MULTICAST_TX 0x00000008 105 #define MALO_TXD_STATUS_BROADCAST_TX 0x00000010 106 #define MALO_TXD_STATUS_FAILED_LINK_ERROR 0x00000020 107 #define MALO_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040 108 #define MALO_TXD_STATUS_FAILED_XRETRY MALO_TXD_STATUS_FAILED_EXCEED_LIMIT 109 #define MALO_TXD_STATUS_FAILED_AGING 0x00000080 110 #define MALO_TXD_STATUS_FW_OWNED 0x80000000 111 uint8_t datarate; 112 uint8_t txpriority; 113 uint16_t qosctrl; 114 uint32_t physdata; /* DMA address of data */ 115 uint16_t len; 116 uint8_t destaddr[6]; 117 uint32_t physnext; /* DMA address of next control block */ 118 uint32_t reserved1; /* SAP packet info ??? */ 119 uint32_t reserved2; 120 } __packed; 121 122 #define MALO_RX_RING_COUNT 256 123 #define MALO_TX_RING_COUNT 256 124 #define MALO_MAX_SCATTER 8 /* XXX unknown, wild guess */ 125 #define MALO_CMD_TIMEOUT 50 /* MALO_CMD_TIMEOUT * 100us */ 126 127 /* 128 * Firmware commands 129 */ 130 #define MALO_CMD_GET_HW_SPEC 0x0003 131 #define MALO_CMD_SET_RADIO 0x001c 132 #define MALO_CMD_SET_AID 0x010d 133 #define MALO_CMD_SET_TXPOWER 0x001e 134 #define MALO_CMD_SET_ANTENNA 0x0020 135 #define MALO_CMD_SET_PRESCAN 0x0107 136 #define MALO_CMD_SET_POSTSCAN 0x0108 137 #define MALO_CMD_SET_RATE 0x0110 138 #define MALO_CMD_SET_CHANNEL 0x010a 139 #define MALO_CMD_SET_RTS 0x0113 140 #define MALO_CMD_SET_SLOT 0x0114 141 #define MALO_CMD_RESPONSE 0x8000 142 143 #define MALO_CMD_RESULT_OK 0x0000 /* everything is fine */ 144 #define MALO_CMD_RESULT_ERROR 0x0001 /* general error */ 145 #define MALO_CMD_RESULT_NOSUPPORT 0x0002 /* command not valid */ 146 #define MALO_CMD_RESULT_PENDING 0x0003 /* will be processed */ 147 #define MALO_CMD_RESULT_BUSY 0x0004 /* command ignored */ 148 #define MALO_CMD_RESULT_PARTIALDATA 0x0005 /* buffer too small */ 149 150 struct malo_cmdheader { 151 uint16_t cmd; 152 uint16_t size; /* size of the command, incl. header */ 153 uint16_t seqnum; /* seems not to matter that much */ 154 uint16_t result; /* set to 0 on request */ 155 /* following the data payload, up to 256 bytes */ 156 }; 157 158 struct malo_hw_spec { 159 uint16_t HwVersion; 160 uint16_t NumOfWCB; 161 uint16_t NumOfMCastAdr; 162 uint8_t PermanentAddress[6]; 163 uint16_t RegionCode; 164 uint16_t NumberOfAntenna; 165 uint32_t FWReleaseNumber; 166 uint32_t WcbBase0; 167 uint32_t RxPdWrPtr; 168 uint32_t RxPdRdPtr; 169 uint32_t CookiePtr; 170 uint32_t WcbBase1; 171 uint32_t WcbBase2; 172 uint32_t WcbBase3; 173 } __packed; 174 175 struct malo_cmd_radio { 176 uint16_t action; 177 uint16_t preamble_mode; 178 uint16_t enable; 179 } __packed; 180 181 struct malo_cmd_aid { 182 uint16_t associd; 183 uint8_t macaddr[6]; 184 uint32_t gprotection; 185 uint8_t aprates[14]; 186 } __packed; 187 188 struct malo_cmd_txpower { 189 uint16_t action; 190 uint16_t supportpowerlvl; 191 uint16_t currentpowerlvl; 192 uint16_t reserved; 193 uint16_t powerlvllist[8]; 194 } __packed; 195 196 struct malo_cmd_antenna { 197 uint16_t action; 198 uint16_t mode; 199 } __packed; 200 201 struct malo_cmd_postscan { 202 uint32_t isibss; 203 uint8_t bssid[6]; 204 } __packed; 205 206 struct malo_cmd_channel { 207 uint16_t action; 208 uint8_t channel; 209 } __packed; 210 211 struct malo_cmd_rate { 212 uint8_t dataratetype; 213 uint8_t rateindex; 214 uint8_t aprates[14]; 215 } __packed; 216 217 struct malo_cmd_rts { 218 uint16_t action; 219 uint32_t threshold; 220 } __packed; 221 222 struct malo_cmd_slot { 223 uint16_t action; 224 uint8_t slot; 225 } __packed; 226 227 #define malo_mem_write4(sc, off, x) \ 228 bus_space_write_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x)) 229 #define malo_mem_write2(sc, off, x) \ 230 bus_space_write_2((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x)) 231 #define malo_mem_write1(sc, off, x) \ 232 bus_space_write_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x)) 233 234 #define malo_mem_read4(sc, off) \ 235 bus_space_read_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off)) 236 #define malo_mem_read1(sc, off) \ 237 bus_space_read_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off)) 238 239 #define malo_ctl_write4(sc, off, x) \ 240 bus_space_write_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off), (x)) 241 #define malo_ctl_read4(sc, off) \ 242 bus_space_read_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off)) 243 #define malo_ctl_read1(sc, off) \ 244 bus_space_read_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off)) 245 246 #define malo_ctl_barrier(sc, t) \ 247 bus_space_barrier((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, 0x0c00, 0xff, (t)) 248 249 static int malo_alloc_cmd(struct malo_softc *sc); 250 static void malo_free_cmd(struct malo_softc *sc); 251 static void malo_send_cmd(struct malo_softc *sc, bus_addr_t addr); 252 static int malo_send_cmd_dma(struct malo_softc *sc, bus_addr_t addr); 253 static int malo_alloc_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring, 254 int count); 255 static void malo_reset_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring); 256 static void malo_free_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring); 257 static int malo_alloc_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring, 258 int count); 259 static void malo_reset_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring); 260 static void malo_free_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring); 261 static int malo_ioctl(struct ifnet *ifp, u_long cmd, void* data); 262 static void malo_start(struct ifnet *ifp); 263 static void malo_watchdog(struct ifnet *ifp); 264 static int malo_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 265 int arg); 266 static void malo_newassoc(struct ieee80211_node *ni, int isnew); 267 static struct ieee80211_node * 268 malo_node_alloc(struct ieee80211_node_table *nt); 269 static int malo_media_change(struct ifnet *ifp); 270 static void malo_media_status(struct ifnet *ifp, struct ifmediareq *imr); 271 static int malo_chip2rate(int chip_rate); 272 static int malo_fix2rate(int fix_rate); 273 static void malo_next_scan(void *arg); 274 static void malo_tx_intr(struct malo_softc *sc); 275 static int malo_tx_data(struct malo_softc *sc, struct mbuf *m0, 276 struct ieee80211_node *ni); 277 static void malo_tx_setup_desc(struct malo_softc *sc, struct malo_tx_desc *desc, 278 int len, int rate, const bus_dma_segment_t *segs, int nsegs); 279 static void malo_rx_intr(struct malo_softc *sc); 280 static int malo_load_bootimg(struct malo_softc *sc); 281 static int malo_load_firmware(struct malo_softc *sc); 282 283 static int malo_set_slot(struct malo_softc *sc); 284 static void malo_update_slot(struct ifnet* ifp); 285 #ifdef MALO_DEBUG 286 static void malo_hexdump(void *buf, int len); 287 #endif 288 static const char *malo_cmd_string(uint16_t cmd); 289 static const char *malo_cmd_string_result(uint16_t result); 290 static int malo_cmd_get_spec(struct malo_softc *sc); 291 static int malo_cmd_set_prescan(struct malo_softc *sc); 292 static int malo_cmd_set_postscan(struct malo_softc *sc, uint8_t *macaddr, 293 uint8_t ibsson); 294 static int malo_cmd_set_channel(struct malo_softc *sc, struct ieee80211_channel *chan); 295 static int malo_cmd_set_antenna(struct malo_softc *sc, uint16_t antenna_type); 296 static int malo_cmd_set_radio(struct malo_softc *sc, uint16_t mode, 297 uint16_t preamble); 298 static int malo_cmd_set_aid(struct malo_softc *sc, uint8_t *bssid, 299 uint16_t associd); 300 static int malo_cmd_set_txpower(struct malo_softc *sc, unsigned int powerlevel); 301 static int malo_cmd_set_rts(struct malo_softc *sc, uint32_t threshold); 302 static int malo_cmd_set_slot(struct malo_softc *sc, uint8_t slot); 303 static int malo_cmd_set_rate(struct malo_softc *sc, uint8_t rate); 304 static void malo_cmd_response(struct malo_softc *sc); 305 306 int 307 malo_intr(void *arg) 308 { 309 struct malo_softc *sc = arg; 310 uint32_t status; 311 312 status = malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 313 if (status == 0xffffffff || status == 0) 314 /* not for us */ 315 return (0); 316 317 /* disable interrupts */ 318 malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 319 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_CAUSE, 0); 320 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0); 321 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0); 322 323 softint_schedule(sc->sc_soft_ih); 324 return (1); 325 } 326 327 void 328 malo_softintr(void *arg) 329 { 330 struct malo_softc *sc = arg; 331 uint32_t status; 332 333 status = malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 334 if (status == 0xffffffff || status == 0) 335 goto out; /* not for us */ 336 337 if (status & MALO_A2HRIC_BIT_TX_DONE) 338 malo_tx_intr(sc); 339 if (status & MALO_A2HRIC_BIT_RX_RDY) 340 malo_rx_intr(sc); 341 if (status & MALO_A2HRIC_BIT_OPC_DONE) { 342 /* XXX cmd done interrupt handling doesn't work yet */ 343 DPRINTF(1, "%s: got cmd done interrupt\n", 344 device_xname(sc->sc_dev)); 345 //malo_cmd_response(sc); 346 } 347 348 if (status & ~0x7) { 349 DPRINTF(1, "%s: unknown interrupt %x\n", 350 device_xname(sc->sc_dev), status); 351 } 352 353 /* just ack the interrupt */ 354 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_CAUSE, 0); 355 356 out: 357 /* enable interrupts */ 358 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0x1f); 359 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 360 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0x1f); 361 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 362 } 363 364 int 365 malo_attach(struct malo_softc *sc) 366 { 367 struct ieee80211com *ic = &sc->sc_ic; 368 struct ifnet *ifp = &sc->sc_if; 369 int i, rv; 370 371 /* initialize channel scanning timer */ 372 callout_init(&sc->sc_scan_to, 0); 373 callout_setfunc(&sc->sc_scan_to, malo_next_scan, sc); 374 375 /* allocate DMA structures */ 376 malo_alloc_cmd(sc); 377 malo_alloc_rx_ring(sc, &sc->sc_rxring, MALO_RX_RING_COUNT); 378 malo_alloc_tx_ring(sc, &sc->sc_txring, MALO_TX_RING_COUNT); 379 380 /* setup interface */ 381 ifp->if_softc = sc; 382 ifp->if_init = malo_init; 383 ifp->if_stop = malo_stop; 384 ifp->if_ioctl = malo_ioctl; 385 ifp->if_start = malo_start; 386 ifp->if_watchdog = malo_watchdog; 387 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 388 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 389 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 390 IFQ_SET_READY(&ifp->if_snd); 391 392 /* set supported rates */ 393 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 394 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 395 sc->sc_last_txrate = -1; 396 397 /* set channels */ 398 for (i = 1; i <= 14; i++) { 399 ic->ic_channels[i].ic_freq = 400 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 401 ic->ic_channels[i].ic_flags = 402 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 403 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 404 } 405 406 /* OpenBSD supports IEEE80211_C_RSN too */ 407 /* set the rest */ 408 ic->ic_ifp = ifp; 409 ic->ic_caps = 410 IEEE80211_C_IBSS | 411 IEEE80211_C_MONITOR | 412 IEEE80211_C_SHPREAMBLE | 413 IEEE80211_C_SHSLOT | 414 IEEE80211_C_WEP | 415 IEEE80211_C_WPA; 416 ic->ic_opmode = IEEE80211_M_STA; 417 ic->ic_state = IEEE80211_S_INIT; 418 for (i = 0; i < 6; i++) 419 ic->ic_myaddr[i] = malo_ctl_read1(sc, 0xa528 + i); 420 421 /* show our mac address */ 422 aprint_normal(", address %s\n", ether_sprintf(ic->ic_myaddr)); 423 424 /* attach interface */ 425 rv = if_initialize(ifp); 426 if (rv != 0) { 427 aprint_error_dev(sc->sc_dev, "if_initialize failed(%d)\n", rv); 428 malo_free_tx_ring(sc, &sc->sc_txring); 429 malo_free_rx_ring(sc, &sc->sc_rxring); 430 malo_free_cmd(sc); 431 callout_destroy(&sc->sc_scan_to); 432 433 return rv; /* Error */ 434 } 435 ieee80211_ifattach(ic); 436 /* Use common softint-based if_input */ 437 ifp->if_percpuq = if_percpuq_create(ifp); 438 if_register(ifp); 439 440 /* post attach vector functions */ 441 sc->sc_newstate = ic->ic_newstate; 442 ic->ic_newstate = malo_newstate; 443 ic->ic_newassoc = malo_newassoc; 444 ic->ic_node_alloc = malo_node_alloc; 445 ic->ic_updateslot = malo_update_slot; 446 447 ieee80211_media_init(ic, malo_media_change, malo_media_status); 448 449 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 450 sizeof(struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN, 451 &sc->sc_drvbpf); 452 453 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 454 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 455 sc->sc_rxtap.wr_ihdr.it_present = htole32(MALO_RX_RADIOTAP_PRESENT); 456 457 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 458 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 459 sc->sc_txtap.wt_ihdr.it_present = htole32(MALO_TX_RADIOTAP_PRESENT); 460 461 ieee80211_announce(ic); 462 463 return (0); 464 } 465 466 int 467 malo_detach(void *arg) 468 { 469 struct malo_softc *sc = arg; 470 struct ieee80211com *ic = &sc->sc_ic; 471 struct ifnet *ifp = &sc->sc_if; 472 473 /* remove channel scanning timer */ 474 callout_stop(&sc->sc_scan_to); 475 476 malo_stop(ifp, 1); 477 ieee80211_ifdetach(ic); 478 if_detach(ifp); 479 malo_free_cmd(sc); 480 malo_free_rx_ring(sc, &sc->sc_rxring); 481 malo_free_tx_ring(sc, &sc->sc_txring); 482 483 return (0); 484 } 485 486 static int 487 malo_alloc_cmd(struct malo_softc *sc) 488 { 489 int error, nsegs; 490 491 error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, 492 PAGE_SIZE, 0, BUS_DMA_ALLOCNOW, &sc->sc_cmd_dmam); 493 if (error != 0) { 494 aprint_error_dev(sc->sc_dev, "can not create DMA tag\n"); 495 return (-1); 496 } 497 498 error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, PAGE_SIZE, 499 0, &sc->sc_cmd_dmas, 1, &nsegs, BUS_DMA_WAITOK); 500 if (error != 0) { 501 aprint_error_dev(sc->sc_dev, "error alloc dma memory\n"); 502 return (-1); 503 } 504 505 error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cmd_dmas, nsegs, 506 PAGE_SIZE, (void **)&sc->sc_cmd_mem, BUS_DMA_WAITOK); 507 if (error != 0) { 508 aprint_error_dev(sc->sc_dev, "error map dma memory\n"); 509 return (-1); 510 } 511 512 error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmd_dmam, 513 sc->sc_cmd_mem, PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 514 if (error != 0) { 515 aprint_error_dev(sc->sc_dev, "error load dma memory\n"); 516 bus_dmamem_free(sc->sc_dmat, &sc->sc_cmd_dmas, nsegs); 517 return (-1); 518 } 519 520 sc->sc_cookie = sc->sc_cmd_mem; 521 *sc->sc_cookie = htole32(0xaa55aa55); 522 sc->sc_cmd_mem = ((char*)sc->sc_cmd_mem) + sizeof(uint32_t); 523 sc->sc_cookie_dmaaddr = sc->sc_cmd_dmam->dm_segs[0].ds_addr; 524 sc->sc_cmd_dmaaddr = sc->sc_cmd_dmam->dm_segs[0].ds_addr + 525 sizeof(uint32_t); 526 527 return (0); 528 } 529 530 static void 531 malo_free_cmd(struct malo_softc *sc) 532 { 533 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 534 BUS_DMASYNC_POSTWRITE); 535 bus_dmamap_unload(sc->sc_dmat, sc->sc_cmd_dmam); 536 bus_dmamem_unmap(sc->sc_dmat, sc->sc_cookie, PAGE_SIZE); 537 bus_dmamem_free(sc->sc_dmat, &sc->sc_cmd_dmas, 1); 538 } 539 540 static void 541 malo_send_cmd(struct malo_softc *sc, bus_addr_t addr) 542 { 543 malo_ctl_write4(sc, MALO_REG_GEN_PTR, (uint32_t)addr); 544 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 545 malo_ctl_write4(sc, MALO_REG_H2A_INTERRUPT_EVENTS, 2); /* CPU_TRANSFER_CMD */ 546 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 547 } 548 549 static int 550 malo_send_cmd_dma(struct malo_softc *sc, bus_addr_t addr) 551 { 552 int i; 553 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 554 555 malo_send_cmd(sc, addr); 556 557 for (i = 0; i < MALO_CMD_TIMEOUT; i++) { 558 delay(100); 559 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 560 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 561 if (hdr->cmd & htole16(0x8000)) 562 break; 563 } 564 if (i == MALO_CMD_TIMEOUT) { 565 aprint_error_dev(sc->sc_dev, "timeout while waiting for cmd response!\n"); 566 return (ETIMEDOUT); 567 } 568 569 malo_cmd_response(sc); 570 571 return (0); 572 } 573 574 static int 575 malo_alloc_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring, int count) 576 { 577 struct malo_rx_desc *desc; 578 struct malo_rx_data *data; 579 int i, nsegs, error; 580 581 ring->count = count; 582 ring->cur = ring->next = 0; 583 584 error = bus_dmamap_create(sc->sc_dmat, 585 count * sizeof(struct malo_rx_desc), 1, 586 count * sizeof(struct malo_rx_desc), 0, 587 BUS_DMA_NOWAIT, &ring->map); 588 if (error != 0) { 589 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 590 goto fail; 591 } 592 593 error = bus_dmamem_alloc(sc->sc_dmat, 594 count * sizeof(struct malo_rx_desc), 595 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 596 597 if (error != 0) { 598 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 599 goto fail; 600 } 601 602 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 603 count * sizeof(struct malo_rx_desc), (void **)&ring->desc, 604 BUS_DMA_NOWAIT); 605 if (error != 0) { 606 aprint_error_dev(sc->sc_dev, "can't map desc DMA memory\n"); 607 goto fail; 608 } 609 610 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 611 count * sizeof(struct malo_rx_desc), NULL, BUS_DMA_NOWAIT); 612 if (error != 0) { 613 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 614 goto fail; 615 } 616 617 ring->physaddr = ring->map->dm_segs->ds_addr; 618 619 ring->data = malloc(count * sizeof (struct malo_rx_data), M_DEVBUF, 620 M_NOWAIT); 621 if (ring->data == NULL) { 622 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 623 error = ENOMEM; 624 goto fail; 625 } 626 627 /* 628 * Pre-allocate Rx buffers and populate Rx ring. 629 */ 630 memset(ring->data, 0, count * sizeof (struct malo_rx_data)); 631 for (i = 0; i < count; i++) { 632 desc = &ring->desc[i]; 633 data = &ring->data[i]; 634 635 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 636 0, BUS_DMA_NOWAIT, &data->map); 637 if (error != 0) { 638 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 639 goto fail; 640 } 641 642 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 643 if (data->m == NULL) { 644 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf\n"); 645 error = ENOMEM; 646 goto fail; 647 } 648 649 MCLGET(data->m, M_DONTWAIT); 650 if (!(data->m->m_flags & M_EXT)) { 651 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf cluster\n"); 652 error = ENOMEM; 653 goto fail; 654 } 655 656 error = bus_dmamap_load(sc->sc_dmat, data->map, 657 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 658 if (error != 0) { 659 aprint_error_dev(sc->sc_dev, "could not load rx buf DMA map"); 660 goto fail; 661 } 662 663 desc->status = 1; 664 desc->physdata = htole32(data->map->dm_segs->ds_addr); 665 desc->physnext = htole32(ring->physaddr + 666 (i + 1) % count * sizeof(struct malo_rx_desc)); 667 } 668 669 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 670 BUS_DMASYNC_PREWRITE); 671 672 return (0); 673 674 fail: malo_free_rx_ring(sc, ring); 675 return (error); 676 } 677 678 static void 679 malo_reset_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring) 680 { 681 int i; 682 683 for (i = 0; i < ring->count; i++) 684 ring->desc[i].status = 0; 685 686 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 687 BUS_DMASYNC_PREWRITE); 688 689 ring->cur = ring->next = 0; 690 } 691 692 static void 693 malo_free_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring) 694 { 695 struct malo_rx_data *data; 696 int i; 697 698 if (ring->desc != NULL) { 699 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 700 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 701 bus_dmamap_unload(sc->sc_dmat, ring->map); 702 bus_dmamem_unmap(sc->sc_dmat, ring->desc, 703 ring->count * sizeof(struct malo_rx_desc)); 704 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 705 } 706 707 if (ring->data != NULL) { 708 for (i = 0; i < ring->count; i++) { 709 data = &ring->data[i]; 710 711 if (data->m != NULL) { 712 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 713 data->map->dm_mapsize, 714 BUS_DMASYNC_POSTREAD); 715 bus_dmamap_unload(sc->sc_dmat, data->map); 716 m_freem(data->m); 717 } 718 719 if (data->map != NULL) 720 bus_dmamap_destroy(sc->sc_dmat, data->map); 721 } 722 free(ring->data, M_DEVBUF); 723 } 724 } 725 726 static int 727 malo_alloc_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring, 728 int count) 729 { 730 int i, nsegs, error; 731 732 ring->count = count; 733 ring->queued = 0; 734 ring->cur = ring->next = ring->stat = 0; 735 736 error = bus_dmamap_create(sc->sc_dmat, 737 count * sizeof(struct malo_tx_desc), 1, 738 count * sizeof(struct malo_tx_desc), 0, BUS_DMA_NOWAIT, &ring->map); 739 if (error != 0) { 740 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 741 goto fail; 742 } 743 744 error = bus_dmamem_alloc(sc->sc_dmat, 745 count * sizeof(struct malo_tx_desc), PAGE_SIZE, 0, 746 &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 747 if (error != 0) { 748 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 749 goto fail; 750 } 751 752 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 753 count * sizeof(struct malo_tx_desc), (void **)&ring->desc, 754 BUS_DMA_NOWAIT); 755 if (error != 0) { 756 aprint_error_dev(sc->sc_dev, "can't map desc DMA memory\n"); 757 goto fail; 758 } 759 760 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 761 count * sizeof(struct malo_tx_desc), NULL, BUS_DMA_NOWAIT); 762 if (error != 0) { 763 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 764 goto fail; 765 } 766 767 ring->physaddr = ring->map->dm_segs->ds_addr; 768 769 ring->data = malloc(count * sizeof(struct malo_tx_data), M_DEVBUF, 770 M_NOWAIT); 771 if (ring->data == NULL) { 772 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 773 error = ENOMEM; 774 goto fail; 775 } 776 777 memset(ring->data, 0, count * sizeof(struct malo_tx_data)); 778 for (i = 0; i < count; i++) { 779 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 780 MALO_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 781 &ring->data[i].map); 782 if (error != 0) { 783 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 784 goto fail; 785 } 786 ring->desc[i].physnext = htole32(ring->physaddr + 787 (i + 1) % count * sizeof(struct malo_tx_desc)); 788 } 789 790 return (0); 791 792 fail: malo_free_tx_ring(sc, ring); 793 return (error); 794 } 795 796 static void 797 malo_reset_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring) 798 { 799 struct malo_tx_desc *desc; 800 struct malo_tx_data *data; 801 int i; 802 803 for (i = 0; i < ring->count; i++) { 804 desc = &ring->desc[i]; 805 data = &ring->data[i]; 806 807 if (data->m != NULL) { 808 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 809 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 810 bus_dmamap_unload(sc->sc_dmat, data->map); 811 m_freem(data->m); 812 data->m = NULL; 813 } 814 815 /* 816 * The node has already been freed at that point so don't call 817 * ieee80211_release_node() here. 818 */ 819 data->ni = NULL; 820 821 desc->status = 0; 822 } 823 824 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 825 BUS_DMASYNC_PREWRITE); 826 827 ring->queued = 0; 828 ring->cur = ring->next = ring->stat = 0; 829 } 830 831 static void 832 malo_free_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring) 833 { 834 struct malo_tx_data *data; 835 int i; 836 837 if (ring->desc != NULL) { 838 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 839 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 840 bus_dmamap_unload(sc->sc_dmat, ring->map); 841 bus_dmamem_unmap(sc->sc_dmat, ring->desc, 842 ring->count * sizeof(struct malo_tx_desc)); 843 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 844 } 845 846 if (ring->data != NULL) { 847 for (i = 0; i < ring->count; i++) { 848 data = &ring->data[i]; 849 850 if (data->m != NULL) { 851 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 852 data->map->dm_mapsize, 853 BUS_DMASYNC_POSTWRITE); 854 bus_dmamap_unload(sc->sc_dmat, data->map); 855 m_freem(data->m); 856 } 857 858 /* 859 * The node has already been freed at that point so 860 * don't call ieee80211_release_node() here. 861 */ 862 data->ni = NULL; 863 864 if (data->map != NULL) 865 bus_dmamap_destroy(sc->sc_dmat, data->map); 866 } 867 free(ring->data, M_DEVBUF); 868 } 869 } 870 871 int 872 malo_init(struct ifnet *ifp) 873 { 874 struct malo_softc *sc = ifp->if_softc; 875 struct ieee80211com *ic = &sc->sc_ic; 876 int error; 877 878 DPRINTF(1, "%s: %s\n", ifp->if_xname, __func__); 879 880 /* if interface already runs stop it first */ 881 if (ifp->if_flags & IFF_RUNNING) 882 malo_stop(ifp, 1); 883 884 /* power on cardbus socket */ 885 if (sc->sc_enable) 886 sc->sc_enable(sc); 887 888 /* disable interrupts */ 889 malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 890 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_CAUSE, 0); 891 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0); 892 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0); 893 894 /* load firmware */ 895 if ((error = malo_load_bootimg(sc))) 896 goto fail; 897 if ((error = malo_load_firmware(sc))) 898 goto fail; 899 900 /* enable interrupts */ 901 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0x1f); 902 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 903 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0x1f); 904 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 905 906 if ((error = malo_cmd_get_spec(sc))) 907 goto fail; 908 909 /* select default channel */ 910 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 911 912 /* initialize hardware */ 913 if ((error = malo_cmd_set_channel(sc, ic->ic_bss->ni_chan))) { 914 aprint_error_dev(sc->sc_dev, "setting channel failed!\n"); 915 goto fail; 916 } 917 if ((error = malo_cmd_set_antenna(sc, 1))) { 918 aprint_error_dev(sc->sc_dev, "setting RX antenna failed!\n"); 919 goto fail; 920 } 921 if ((error = malo_cmd_set_antenna(sc, 2))) { 922 aprint_error_dev(sc->sc_dev, "setting TX antenna failed!\n"); 923 goto fail; 924 } 925 if ((error = malo_cmd_set_radio(sc, 1, 5))) { 926 aprint_error_dev(sc->sc_dev, "turn radio on failed!\n"); 927 goto fail; 928 } 929 if ((error = malo_cmd_set_txpower(sc, 100))) { 930 aprint_error_dev(sc->sc_dev, "setting TX power failed!\n"); 931 goto fail; 932 } 933 if ((error = malo_cmd_set_rts(sc, IEEE80211_RTS_MAX))) { 934 aprint_error_dev(sc->sc_dev, "setting RTS failed!\n"); 935 goto fail; 936 } 937 938 ifp->if_flags |= IFF_RUNNING; 939 940 if (ic->ic_opmode != IEEE80211_M_MONITOR) 941 /* start background scanning */ 942 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 943 else 944 /* in monitor mode change directly into run state */ 945 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 946 947 return (0); 948 949 fail: 950 /* reset adapter */ 951 DPRINTF(1, "%s: malo_init failed, resetting card\n", 952 device_xname(sc->sc_dev)); 953 malo_stop(ifp, 1); 954 return (error); 955 } 956 957 static int 958 malo_ioctl(struct ifnet *ifp, u_long cmd, void* data) 959 { 960 struct malo_softc *sc = ifp->if_softc; 961 struct ieee80211com *ic = &sc->sc_ic; 962 int s, error = 0; 963 964 s = splnet(); 965 966 switch (cmd) { 967 case SIOCSIFFLAGS: 968 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 969 break; 970 if (ifp->if_flags & IFF_UP) { 971 if ((ifp->if_flags & IFF_RUNNING) == 0) 972 malo_init(ifp); 973 } else { 974 if (ifp->if_flags & IFF_RUNNING) 975 malo_stop(ifp, 1); 976 } 977 break; 978 case SIOCADDMULTI: 979 case SIOCDELMULTI: 980 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 981 /* setup multicast filter, etc */ 982 error = 0; 983 } 984 break; 985 case SIOCS80211CHANNEL: 986 /* allow fast channel switching in monitor mode */ 987 error = ieee80211_ioctl(ic, cmd, data); 988 if (error == ENETRESET && 989 ic->ic_opmode == IEEE80211_M_MONITOR) { 990 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 991 (IFF_UP | IFF_RUNNING)) { 992 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 993 malo_cmd_set_channel(sc, ic->ic_bss->ni_chan); 994 } 995 error = 0; 996 } 997 break; 998 default: 999 error = ieee80211_ioctl(ic, cmd, data); 1000 break; 1001 } 1002 1003 if (error == ENETRESET) { 1004 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1005 (IFF_UP | IFF_RUNNING)) 1006 malo_init(ifp); 1007 error = 0; 1008 } 1009 1010 splx(s); 1011 1012 return (error); 1013 } 1014 1015 static void 1016 malo_start(struct ifnet *ifp) 1017 { 1018 struct malo_softc *sc = ifp->if_softc; 1019 struct ieee80211com *ic = &sc->sc_ic; 1020 struct mbuf *m0; 1021 struct ether_header *eh; 1022 struct ieee80211_node *ni = NULL; 1023 1024 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1025 1026 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1027 return; 1028 1029 for (;;) { 1030 IF_POLL(&ic->ic_mgtq, m0); 1031 if (m0 != NULL) { 1032 if (sc->sc_txring.queued >= MALO_TX_RING_COUNT) { 1033 ifp->if_flags |= IFF_OACTIVE; 1034 break; 1035 } 1036 IF_DEQUEUE(&ic->ic_mgtq, m0); 1037 1038 ni = M_GETCTX(m0, struct ieee80211_node *); 1039 M_CLEARCTX(m0); 1040 1041 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1042 1043 if (malo_tx_data(sc, m0, ni) != 0) 1044 break; 1045 } else { 1046 if (ic->ic_state != IEEE80211_S_RUN) 1047 break; 1048 IFQ_POLL(&ifp->if_snd, m0); 1049 if (m0 == NULL) 1050 break; 1051 if (sc->sc_txring.queued >= MALO_TX_RING_COUNT - 1) { 1052 ifp->if_flags |= IFF_OACTIVE; 1053 break; 1054 } 1055 1056 if (m0->m_len < sizeof (*eh) && 1057 (m0 = m_pullup(m0, sizeof (*eh))) == NULL) { 1058 ifp->if_oerrors++; 1059 continue; 1060 } 1061 eh = mtod(m0, struct ether_header *); 1062 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1063 if (ni == NULL) { 1064 m_freem(m0); 1065 ifp->if_oerrors++; 1066 continue; 1067 } 1068 1069 // XXX must I call ieee_classify at this point ? 1070 1071 IFQ_DEQUEUE(&ifp->if_snd, m0); 1072 bpf_mtap(ifp, m0, BPF_D_OUT); 1073 1074 m0 = ieee80211_encap(ic, m0, ni); 1075 if (m0 == NULL) 1076 continue; 1077 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1078 1079 if (malo_tx_data(sc, m0, ni) != 0) { 1080 ieee80211_free_node(ni); 1081 ifp->if_oerrors++; 1082 break; 1083 } 1084 } 1085 } 1086 } 1087 1088 void 1089 malo_stop(struct ifnet* ifp, int disable) 1090 { 1091 struct malo_softc *sc = ifp->if_softc; 1092 struct ieee80211com *ic = &sc->sc_ic; 1093 1094 DPRINTF(1, "%s: %s\n", ifp->if_xname, __func__); 1095 1096 /* reset adapter */ 1097 if (ifp->if_flags & IFF_RUNNING) 1098 malo_ctl_write4(sc, MALO_REG_H2A_INTERRUPT_EVENTS, (1 << 15)); 1099 1100 /* device is not running anymore */ 1101 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1102 1103 /* change back to initial state */ 1104 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 1105 1106 /* reset RX / TX rings */ 1107 malo_reset_tx_ring(sc, &sc->sc_txring); 1108 malo_reset_rx_ring(sc, &sc->sc_rxring); 1109 1110 /* set initial rate */ 1111 sc->sc_last_txrate = -1; 1112 1113 /* power off cardbus socket */ 1114 if (sc->sc_disable) 1115 sc->sc_disable(sc); 1116 } 1117 1118 static void 1119 malo_watchdog(struct ifnet *ifp) 1120 { 1121 1122 } 1123 1124 static int 1125 malo_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 1126 { 1127 struct ifnet *ifp = ic->ic_ifp; 1128 struct malo_softc *sc = ifp->if_softc; 1129 enum ieee80211_state ostate; 1130 int rate; 1131 1132 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1133 1134 ostate = ic->ic_state; 1135 callout_stop(&sc->sc_scan_to); 1136 1137 switch (nstate) { 1138 case IEEE80211_S_INIT: 1139 DPRINTF(1, "%s: newstate INIT\n", device_xname(sc->sc_dev)); 1140 break; 1141 case IEEE80211_S_SCAN: 1142 DPRINTF(1, "%s: newstate SCAN\n", device_xname(sc->sc_dev)); 1143 if (ostate == IEEE80211_S_INIT) { 1144 if (malo_cmd_set_prescan(sc) != 0) { 1145 DPRINTF(1, "%s: can't set prescan\n", 1146 device_xname(sc->sc_dev)); 1147 } 1148 } else { 1149 malo_cmd_set_channel(sc, ic->ic_curchan); 1150 } 1151 callout_schedule(&sc->sc_scan_to, hz/2); 1152 break; 1153 case IEEE80211_S_AUTH: 1154 DPRINTF(1, "%s: newstate AUTH\n", device_xname(sc->sc_dev)); 1155 malo_cmd_set_postscan(sc, ic->ic_myaddr, 1); 1156 malo_cmd_set_channel(sc, ic->ic_curchan); 1157 break; 1158 case IEEE80211_S_ASSOC: 1159 DPRINTF(1, "%s: newstate ASSOC\n", device_xname(sc->sc_dev)); 1160 malo_cmd_set_channel(sc, ic->ic_curchan); 1161 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1162 malo_cmd_set_radio(sc, 1, 3); /* short preamble */ 1163 else 1164 malo_cmd_set_radio(sc, 1, 1); /* long preamble */ 1165 1166 malo_cmd_set_aid(sc, ic->ic_bss->ni_bssid, 1167 ic->ic_bss->ni_associd); 1168 1169 if (ic->ic_fixed_rate == -1) 1170 /* automatic rate adaption */ 1171 malo_cmd_set_rate(sc, 0); 1172 else { 1173 /* fixed rate */ 1174 rate = malo_fix2rate(ic->ic_fixed_rate); 1175 malo_cmd_set_rate(sc, rate); 1176 } 1177 1178 malo_set_slot(sc); 1179 break; 1180 case IEEE80211_S_RUN: 1181 DPRINTF(1, "%s: newstate RUN\n", device_xname(sc->sc_dev)); 1182 break; 1183 default: 1184 break; 1185 } 1186 1187 return (sc->sc_newstate(ic, nstate, arg)); 1188 } 1189 1190 static void 1191 malo_newassoc(struct ieee80211_node *ni, int isnew) 1192 { 1193 } 1194 1195 static struct ieee80211_node * 1196 malo_node_alloc(struct ieee80211_node_table *nt) 1197 { 1198 struct malo_node *wn; 1199 1200 wn = malloc(sizeof(*wn), M_DEVBUF, M_NOWAIT | M_ZERO); 1201 if (wn == NULL) 1202 return (NULL); 1203 1204 return ((struct ieee80211_node *)wn); 1205 } 1206 1207 static int 1208 malo_media_change(struct ifnet *ifp) 1209 { 1210 int error; 1211 1212 DPRINTF(1, "%s: %s\n", ifp->if_xname, __func__); 1213 1214 error = ieee80211_media_change(ifp); 1215 if (error != ENETRESET) 1216 return (error); 1217 1218 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 1219 malo_init(ifp); 1220 1221 return (0); 1222 } 1223 1224 static void 1225 malo_media_status(struct ifnet *ifp, struct ifmediareq *imr) 1226 { 1227 struct malo_softc *sc = ifp->if_softc; 1228 struct ieee80211com *ic = &sc->sc_ic; 1229 1230 imr->ifm_status = IFM_AVALID; 1231 imr->ifm_active = IFM_IEEE80211; 1232 if (ic->ic_state == IEEE80211_S_RUN) 1233 imr->ifm_status |= IFM_ACTIVE; 1234 1235 /* report last TX rate used by chip */ 1236 imr->ifm_active |= ieee80211_rate2media(ic, sc->sc_last_txrate, 1237 ic->ic_curmode); 1238 1239 switch (ic->ic_opmode) { 1240 case IEEE80211_M_STA: 1241 break; 1242 case IEEE80211_M_IBSS: 1243 imr->ifm_active |= IFM_IEEE80211_ADHOC; 1244 break; 1245 case IEEE80211_M_AHDEMO: 1246 break; 1247 case IEEE80211_M_HOSTAP: 1248 break; 1249 case IEEE80211_M_MONITOR: 1250 imr->ifm_active |= IFM_IEEE80211_MONITOR; 1251 break; 1252 default: 1253 break; 1254 } 1255 1256 switch (ic->ic_curmode) { 1257 case IEEE80211_MODE_11B: 1258 imr->ifm_active |= IFM_IEEE80211_11B; 1259 break; 1260 case IEEE80211_MODE_11G: 1261 imr->ifm_active |= IFM_IEEE80211_11G; 1262 break; 1263 } 1264 } 1265 1266 static int 1267 malo_chip2rate(int chip_rate) 1268 { 1269 switch (chip_rate) { 1270 /* CCK rates */ 1271 case 0: return (2); 1272 case 1: return (4); 1273 case 2: return (11); 1274 case 3: return (22); 1275 1276 /* OFDM rates */ 1277 case 4: return (0); /* reserved */ 1278 case 5: return (12); 1279 case 6: return (18); 1280 case 7: return (24); 1281 case 8: return (36); 1282 case 9: return (48); 1283 case 10: return (72); 1284 case 11: return (96); 1285 case 12: return (108); 1286 1287 /* no rate select yet or unknown rate */ 1288 default: return (-1); 1289 } 1290 } 1291 1292 static int 1293 malo_fix2rate(int fix_rate) 1294 { 1295 switch (fix_rate) { 1296 /* CCK rates */ 1297 case 0: return (2); 1298 case 1: return (4); 1299 case 2: return (11); 1300 case 3: return (22); 1301 1302 /* OFDM rates */ 1303 case 4: return (12); 1304 case 5: return (18); 1305 case 6: return (24); 1306 case 7: return (36); 1307 case 8: return (48); 1308 case 9: return (72); 1309 case 10: return (96); 1310 case 11: return (108); 1311 1312 /* unknown rate: should not happen */ 1313 default: return (0); 1314 } 1315 } 1316 1317 static void 1318 malo_next_scan(void *arg) 1319 { 1320 struct malo_softc *sc = arg; 1321 struct ieee80211com *ic = &sc->sc_ic; 1322 int s; 1323 1324 DPRINTF(1, "%s: %s\n", sc->sc_if.if_xname, __func__); 1325 1326 s = splnet(); 1327 1328 if (ic->ic_state == IEEE80211_S_SCAN) 1329 ieee80211_next_scan(ic); 1330 1331 splx(s); 1332 } 1333 1334 static void 1335 malo_tx_intr(struct malo_softc *sc) 1336 { 1337 struct ifnet *ifp = &sc->sc_if; 1338 struct malo_tx_desc *desc; 1339 struct malo_tx_data *data; 1340 struct malo_node *rn; 1341 int stat, s; 1342 1343 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1344 1345 s = splnet(); 1346 1347 stat = sc->sc_txring.stat; 1348 for (;;) { 1349 desc = &sc->sc_txring.desc[sc->sc_txring.stat]; 1350 data = &sc->sc_txring.data[sc->sc_txring.stat]; 1351 rn = (struct malo_node *)data->ni; 1352 1353 /* check if TX descriptor is not owned by FW anymore */ 1354 if ((le32toh(desc->status) & MALO_TXD_STATUS_FW_OWNED) || 1355 !(le32toh(data->softstat) & MALO_TXD_STATUS_FAILED_AGING)) 1356 break; 1357 1358 /* if no frame has been sent, ignore */ 1359 if (rn == NULL) 1360 goto next; 1361 1362 /* check TX state */ 1363 switch (le32toh(desc->status) & MALO_TXD_STATUS_USED) { 1364 case MALO_TXD_STATUS_OK: 1365 DPRINTF(2, "%s: data frame was sent successfully\n", 1366 device_xname(sc->sc_dev)); 1367 ifp->if_opackets++; 1368 break; 1369 default: 1370 DPRINTF(1, "%s: data frame sending error\n", 1371 device_xname(sc->sc_dev)); 1372 ifp->if_oerrors++; 1373 break; 1374 } 1375 1376 /* save last used TX rate */ 1377 sc->sc_last_txrate = malo_chip2rate(desc->datarate); 1378 1379 /* cleanup TX data and TX descriptor */ 1380 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1381 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1382 bus_dmamap_unload(sc->sc_dmat, data->map); 1383 m_freem(data->m); 1384 ieee80211_free_node(data->ni); 1385 data->m = NULL; 1386 data->ni = NULL; 1387 data->softstat &= htole32(~0x80); 1388 desc->status = 0; 1389 desc->len = 0; 1390 1391 DPRINTF(2, "%s: tx done idx=%u\n", 1392 device_xname(sc->sc_dev), sc->sc_txring.stat); 1393 1394 sc->sc_txring.queued--; 1395 next: 1396 if (++sc->sc_txring.stat >= sc->sc_txring.count) 1397 sc->sc_txring.stat = 0; 1398 if (sc->sc_txring.stat == stat) 1399 break; 1400 } 1401 1402 sc->sc_tx_timer = 0; 1403 ifp->if_flags &= ~IFF_OACTIVE; 1404 malo_start(ifp); 1405 1406 splx(s); 1407 } 1408 1409 static int 1410 malo_tx_data(struct malo_softc *sc, struct mbuf *m0, 1411 struct ieee80211_node *ni) 1412 { 1413 struct ieee80211com *ic = &sc->sc_ic; 1414 struct ifnet *ifp = &sc->sc_if; 1415 struct malo_tx_desc *desc; 1416 struct malo_tx_data *data; 1417 struct ieee80211_frame *wh; 1418 struct ieee80211_key *k; 1419 struct mbuf *mnew; 1420 int error; 1421 1422 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1423 1424 desc = &sc->sc_txring.desc[sc->sc_txring.cur]; 1425 data = &sc->sc_txring.data[sc->sc_txring.cur]; 1426 1427 if (m0->m_len < sizeof(struct ieee80211_frame)) { 1428 m0 = m_pullup(m0, sizeof(struct ieee80211_frame)); 1429 if (m0 == NULL) { 1430 ifp->if_ierrors++; 1431 return (ENOBUFS); 1432 } 1433 } 1434 wh = mtod(m0, struct ieee80211_frame *); 1435 1436 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1437 k = ieee80211_crypto_encap(ic, ni, m0); 1438 if (k == NULL) { 1439 m_freem(m0); 1440 return ENOBUFS; 1441 } 1442 1443 /* packet header may have moved, reset our local pointer */ 1444 wh = mtod(m0, struct ieee80211_frame *); 1445 } 1446 1447 if (sc->sc_drvbpf != NULL) { 1448 struct malo_tx_radiotap_hdr *tap = &sc->sc_txtap; 1449 1450 tap->wt_flags = 0; 1451 tap->wt_chan_freq = htole16(ni->ni_chan->ic_freq); 1452 tap->wt_chan_flags = htole16(ni->ni_chan->ic_flags); 1453 tap->wt_rate = sc->sc_last_txrate; 1454 if (wh->i_fc[1] & IEEE80211_FC1_WEP) 1455 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1456 1457 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1458 } 1459 1460 /* 1461 * inject FW specific fields into the 802.11 frame 1462 * 1463 * 2 bytes FW len (inject) 1464 * 24 bytes 802.11 frame header 1465 * 6 bytes addr4 (inject) 1466 * n bytes 802.11 frame body 1467 * 1468 * For now copy all into a new mcluster. 1469 */ 1470 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1471 if (mnew == NULL) 1472 return (ENOBUFS); 1473 MCLGET(mnew, M_DONTWAIT); 1474 if (!(mnew->m_flags & M_EXT)) { 1475 m_free(mnew); 1476 return (ENOBUFS); 1477 } 1478 1479 *mtod(mnew, uint16_t *) = htole16(m0->m_pkthdr.len - 24); /* FW len */ 1480 memmove(mtod(mnew, char*) + 2, wh, sizeof(*wh)); 1481 memset(mtod(mnew, char*) + 26, 0, 6); 1482 m_copydata(m0, sizeof(*wh), m0->m_pkthdr.len - sizeof(*wh), 1483 mtod(mnew, char*) + 32); 1484 mnew->m_pkthdr.len = mnew->m_len = m0->m_pkthdr.len + 8; 1485 m_freem(m0); 1486 m0 = mnew; 1487 1488 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1489 BUS_DMA_NOWAIT); 1490 if (error != 0) { 1491 aprint_error_dev(sc->sc_dev, "can't map mbuf (error %d)\n", error); 1492 m_freem(m0); 1493 return (error); 1494 } 1495 1496 data->m = m0; 1497 data->ni = ni; 1498 data->softstat |= htole32(0x80); 1499 1500 malo_tx_setup_desc(sc, desc, m0->m_pkthdr.len, 1, 1501 data->map->dm_segs, data->map->dm_nsegs); 1502 1503 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1504 BUS_DMASYNC_PREWRITE); 1505 bus_dmamap_sync(sc->sc_dmat, sc->sc_txring.map, 1506 sc->sc_txring.cur * sizeof(struct malo_tx_desc), 1507 sizeof(struct malo_tx_desc), BUS_DMASYNC_PREWRITE); 1508 1509 DPRINTF(2, "%s: sending frame, pktlen=%u, idx=%u\n", 1510 device_xname(sc->sc_dev), m0->m_pkthdr.len, sc->sc_txring.cur); 1511 1512 sc->sc_txring.queued++; 1513 sc->sc_txring.cur = (sc->sc_txring.cur + 1) % MALO_TX_RING_COUNT; 1514 1515 /* kick data TX */ 1516 malo_ctl_write4(sc, MALO_REG_H2A_INTERRUPT_EVENTS, 1); 1517 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 1518 1519 return (0); 1520 } 1521 1522 static void 1523 malo_tx_setup_desc(struct malo_softc *sc, struct malo_tx_desc *desc, 1524 int len, int rate, const bus_dma_segment_t *segs, int nsegs) 1525 { 1526 desc->len = htole16(segs[0].ds_len); 1527 desc->datarate = rate; /* 0 = mgmt frame, 1 = data frame */ 1528 desc->physdata = htole32(segs[0].ds_addr); 1529 desc->status = htole32(MALO_TXD_STATUS_OK | MALO_TXD_STATUS_FW_OWNED); 1530 } 1531 1532 static void 1533 malo_rx_intr(struct malo_softc *sc) 1534 { 1535 struct ieee80211com *ic = &sc->sc_ic; 1536 struct ifnet *ifp = &sc->sc_if; 1537 struct malo_rx_desc *desc; 1538 struct malo_rx_data *data; 1539 struct ieee80211_frame *wh; 1540 struct ieee80211_node *ni; 1541 struct mbuf *mnew, *m; 1542 uint32_t rxRdPtr, rxWrPtr; 1543 int error, i, s; 1544 1545 rxRdPtr = malo_mem_read4(sc, sc->sc_RxPdRdPtr); 1546 rxWrPtr = malo_mem_read4(sc, sc->sc_RxPdWrPtr); 1547 1548 for (i = 0; i < MALO_RX_RING_COUNT && rxRdPtr != rxWrPtr; i++) { 1549 desc = &sc->sc_rxring.desc[sc->sc_rxring.cur]; 1550 data = &sc->sc_rxring.data[sc->sc_rxring.cur]; 1551 1552 bus_dmamap_sync(sc->sc_dmat, sc->sc_rxring.map, 1553 sc->sc_rxring.cur * sizeof(struct malo_rx_desc), 1554 sizeof(struct malo_rx_desc), BUS_DMASYNC_POSTREAD); 1555 1556 DPRINTF(3, "%s: rx intr idx=%d, rxctrl=0x%02x, rssi=%d, " 1557 "status=0x%02x, channel=%d, len=%d, res1=%02x, rate=%d, " 1558 "physdata=0x%04x, physnext=0x%04x, qosctrl=%02x, res2=%d\n", 1559 device_xname(sc->sc_dev), 1560 sc->sc_rxring.cur, desc->rxctrl, desc->rssi, desc->status, 1561 desc->channel, le16toh(desc->len), desc->reserved1, 1562 desc->datarate, le32toh(desc->physdata), 1563 le32toh(desc->physnext), desc->qosctrl, desc->reserved2); 1564 1565 if ((desc->rxctrl & 0x80) == 0) 1566 break; 1567 1568 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1569 if (mnew == NULL) { 1570 ifp->if_ierrors++; 1571 goto skip; 1572 } 1573 1574 MCLGET(mnew, M_DONTWAIT); 1575 if (!(mnew->m_flags & M_EXT)) { 1576 m_freem(mnew); 1577 ifp->if_ierrors++; 1578 goto skip; 1579 } 1580 1581 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1582 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1583 bus_dmamap_unload(sc->sc_dmat, data->map); 1584 1585 error = bus_dmamap_load(sc->sc_dmat, data->map, 1586 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1587 if (error != 0) { 1588 m_freem(mnew); 1589 1590 error = bus_dmamap_load(sc->sc_dmat, data->map, 1591 mtod(data->m, void *), MCLBYTES, NULL, 1592 BUS_DMA_NOWAIT); 1593 if (error != 0) { 1594 panic("%s: could not load old rx mbuf", 1595 device_xname(sc->sc_dev)); 1596 } 1597 ifp->if_ierrors++; 1598 goto skip; 1599 } 1600 1601 /* 1602 * New mbuf mbuf successfully loaded 1603 */ 1604 m = data->m; 1605 data->m = mnew; 1606 desc->physdata = htole32(data->map->dm_segs->ds_addr); 1607 1608 /* finalize mbuf */ 1609 m_set_rcvif(m, ifp); 1610 m->m_pkthdr.len = m->m_len = le16toh(desc->len); 1611 1612 /* 1613 * cut out FW specific fields from the 802.11 frame 1614 * 1615 * 2 bytes FW len (cut out) 1616 * 24 bytes 802.11 frame header 1617 * 6 bytes addr4 (cut out) 1618 * n bytes 802.11 frame data 1619 */ 1620 memmove(m->m_data +6, m->m_data, 26); 1621 m_adj(m, 8); 1622 1623 s = splnet(); 1624 1625 if (sc->sc_drvbpf != NULL) { 1626 struct malo_rx_radiotap_hdr *tap = &sc->sc_rxtap; 1627 1628 tap->wr_flags = 0; 1629 tap->wr_chan_freq = 1630 htole16(ic->ic_bss->ni_chan->ic_freq); 1631 tap->wr_chan_flags = 1632 htole16(ic->ic_bss->ni_chan->ic_flags); 1633 1634 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m, 1635 BPF_D_IN); 1636 } 1637 1638 wh = mtod(m, struct ieee80211_frame *); 1639 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1640 1641 /* send the frame to the 802.11 layer */ 1642 ieee80211_input(ic, m, ni, desc->rssi, 0); 1643 1644 /* node is no longer needed */ 1645 ieee80211_free_node(ni); 1646 1647 splx(s); 1648 1649 skip: 1650 desc->rxctrl = 0; 1651 rxRdPtr = le32toh(desc->physnext); 1652 1653 bus_dmamap_sync(sc->sc_dmat, sc->sc_rxring.map, 1654 sc->sc_rxring.cur * sizeof(struct malo_rx_desc), 1655 sizeof(struct malo_rx_desc), BUS_DMASYNC_PREWRITE); 1656 1657 sc->sc_rxring.cur = (sc->sc_rxring.cur + 1) % 1658 MALO_RX_RING_COUNT; 1659 } 1660 1661 malo_mem_write4(sc, sc->sc_RxPdRdPtr, rxRdPtr); 1662 } 1663 1664 static int 1665 malo_get_firmware(struct malo_softc *sc, const char *name, 1666 uint8_t** firmware_image, size_t* size) 1667 { 1668 firmware_handle_t fw; 1669 int error; 1670 1671 1672 /* load firmware image from disk */ 1673 if ((error = firmware_open("malo", name, &fw)) != 0) { 1674 aprint_error_dev(sc->sc_dev, "could not read firmware file\n"); 1675 return error; 1676 } 1677 1678 *size = firmware_get_size(fw); 1679 1680 *firmware_image = firmware_malloc(*size); 1681 if (*firmware_image == NULL) { 1682 aprint_error_dev(sc->sc_dev, "not enough memory to stock firmware\n"); 1683 error = ENOMEM; 1684 goto fail1; 1685 } 1686 1687 if ((error = firmware_read(fw, 0, *firmware_image, *size)) != 0) { 1688 aprint_error_dev(sc->sc_dev, "can't get firmware\n"); 1689 goto fail2; 1690 } 1691 1692 firmware_close(fw); 1693 1694 return 0; 1695 fail2: 1696 firmware_free(*firmware_image, *size); 1697 fail1: 1698 firmware_close(fw); 1699 return error; 1700 } 1701 1702 static int 1703 malo_load_bootimg(struct malo_softc *sc) 1704 { 1705 const char *name = "malo8335-h"; 1706 uint8_t *ucode; 1707 size_t size; 1708 int error, i; 1709 1710 /* load boot firmware */ 1711 if ((error = malo_get_firmware(sc, name, &ucode, &size)) != 0) { 1712 aprint_error_dev(sc->sc_dev, "error %d, could not read firmware %s\n", 1713 error, name); 1714 return (EIO); 1715 } 1716 1717 /* 1718 * It seems we are putting this code directly onto the stack of 1719 * the ARM cpu. I don't know why we need to instruct the DMA 1720 * engine to move the code. This is a big riddle without docu. 1721 */ 1722 DPRINTF(1, "%s: loading boot firmware\n", device_xname(sc->sc_dev)); 1723 malo_mem_write2(sc, 0xbef8, 0x001); 1724 malo_mem_write2(sc, 0xbefa, size); 1725 malo_mem_write4(sc, 0xbefc, 0); 1726 1727 bus_space_write_region_1(sc->sc_mem1_bt, sc->sc_mem1_bh, 0xbf00, 1728 ucode, size); 1729 1730 /* 1731 * we loaded the firmware into card memory now tell the CPU 1732 * to fetch the code and execute it. The memory mapped via the 1733 * first bar is internaly mapped to 0xc0000000. 1734 */ 1735 malo_send_cmd(sc, 0xc000bef8); 1736 1737 /* wait for the device to go into FW loading mode */ 1738 for (i = 0; i < 10; i++) { 1739 delay(50); 1740 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_READ); 1741 if (malo_ctl_read4(sc, 0x0c14) == 0x5) 1742 break; 1743 } 1744 if (i == 10) { 1745 aprint_error_dev(sc->sc_dev, "timeout at boot firmware load!\n"); 1746 free(ucode, M_DEVBUF); 1747 return (ETIMEDOUT); 1748 } 1749 firmware_free(ucode, size); 1750 1751 /* tell the card we're done and... */ 1752 malo_mem_write2(sc, 0xbef8, 0x001); 1753 malo_mem_write2(sc, 0xbefa, 0); 1754 malo_mem_write4(sc, 0xbefc, 0); 1755 malo_send_cmd(sc, 0xc000bef8); 1756 1757 DPRINTF(1, "%s: boot firmware loaded\n", device_xname(sc->sc_dev)); 1758 1759 return (0); 1760 } 1761 1762 1763 static int 1764 malo_load_firmware(struct malo_softc *sc) 1765 { 1766 struct malo_cmdheader *hdr; 1767 const char *name = "malo8335-m"; 1768 void *data; 1769 uint8_t *ucode; 1770 size_t size, count, bsize; 1771 int i, sn, error; 1772 1773 /* load real firmware now */ 1774 if ((error = malo_get_firmware(sc, name, &ucode, &size)) != 0) { 1775 aprint_error_dev(sc->sc_dev, "error %d, could not read firmware %s\n", 1776 error, name); 1777 return (EIO); 1778 } 1779 1780 DPRINTF(1, "%s: uploading firmware\n", device_xname(sc->sc_dev)); 1781 1782 hdr = sc->sc_cmd_mem; 1783 data = hdr + 1; 1784 sn = 1; 1785 for (count = 0; count < size; count += bsize) { 1786 bsize = MIN(256, size - count); 1787 1788 hdr->cmd = htole16(0x0001); 1789 hdr->size = htole16(bsize); 1790 hdr->seqnum = htole16(sn++); 1791 hdr->result = 0; 1792 1793 memcpy(data, ucode + count, bsize); 1794 1795 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1796 BUS_DMASYNC_PREWRITE); 1797 malo_send_cmd(sc, sc->sc_cmd_dmaaddr); 1798 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1799 BUS_DMASYNC_POSTWRITE); 1800 delay(500); 1801 } 1802 firmware_free(ucode, size); 1803 1804 DPRINTF(1, "%s: firmware upload finished\n", device_xname(sc->sc_dev)); 1805 1806 /* 1807 * send a command with size 0 to tell that the firmware has been 1808 * uploaded 1809 */ 1810 hdr->cmd = htole16(0x0001); 1811 hdr->size = 0; 1812 hdr->seqnum = htole16(sn++); 1813 hdr->result = 0; 1814 1815 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1816 BUS_DMASYNC_PREWRITE); 1817 malo_send_cmd(sc, sc->sc_cmd_dmaaddr); 1818 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1819 BUS_DMASYNC_POSTWRITE); 1820 delay(100); 1821 1822 DPRINTF(1, "%s: loading firmware\n", device_xname(sc->sc_dev)); 1823 1824 /* wait until firmware has been loaded */ 1825 for (i = 0; i < 200; i++) { 1826 malo_ctl_write4(sc, 0x0c10, 0x5a); 1827 delay(500); 1828 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE | 1829 BUS_SPACE_BARRIER_READ); 1830 if (malo_ctl_read4(sc, 0x0c14) == 0xf0f1f2f4) 1831 break; 1832 } 1833 if (i == 200) { 1834 aprint_error_dev(sc->sc_dev, "timeout at firmware load!\n"); 1835 return (ETIMEDOUT); 1836 } 1837 1838 DPRINTF(1, "%s: firmware loaded\n", device_xname(sc->sc_dev)); 1839 1840 return (0); 1841 } 1842 1843 static int 1844 malo_set_slot(struct malo_softc *sc) 1845 { 1846 struct ieee80211com *ic = &sc->sc_ic; 1847 1848 if (ic->ic_flags & IEEE80211_F_SHSLOT) { 1849 /* set short slot */ 1850 if (malo_cmd_set_slot(sc, 1)) { 1851 aprint_error_dev(sc->sc_dev, "setting short slot failed\n"); 1852 return (ENXIO); 1853 } 1854 } else { 1855 /* set long slot */ 1856 if (malo_cmd_set_slot(sc, 0)) { 1857 aprint_error_dev(sc->sc_dev, "setting long slot failed\n"); 1858 return (ENXIO); 1859 } 1860 } 1861 1862 return (0); 1863 } 1864 1865 static void 1866 malo_update_slot(struct ifnet* ifp) 1867 { 1868 struct malo_softc *sc = ifp->if_softc; 1869 struct ieee80211com *ic = &sc->sc_ic; 1870 1871 malo_set_slot(sc); 1872 1873 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 1874 /* TODO */ 1875 } 1876 } 1877 1878 #ifdef MALO_DEBUG 1879 static void 1880 malo_hexdump(void *buf, int len) 1881 { 1882 u_char b[16]; 1883 int i, j, l; 1884 1885 for (i = 0; i < len; i += l) { 1886 printf("%4i:", i); 1887 l = min(sizeof(b), len - i); 1888 memcpy(b, (char*)buf + i, l); 1889 1890 for (j = 0; j < sizeof(b); j++) { 1891 if (j % 2 == 0) 1892 printf(" "); 1893 if (j % 8 == 0) 1894 printf(" "); 1895 if (j < l) 1896 printf("%02x", (int)b[j]); 1897 else 1898 printf(" "); 1899 } 1900 printf(" |"); 1901 for (j = 0; j < l; j++) { 1902 if (b[j] >= 0x20 && b[j] <= 0x7e) 1903 printf("%c", b[j]); 1904 else 1905 printf("."); 1906 } 1907 printf("|\n"); 1908 } 1909 } 1910 #endif 1911 1912 static const char * 1913 malo_cmd_string(uint16_t cmd) 1914 { 1915 int i; 1916 static char cmd_buf[16]; 1917 static const struct { 1918 uint16_t cmd_code; 1919 const char *cmd_string; 1920 } cmds[] = { 1921 { MALO_CMD_GET_HW_SPEC, "GetHwSpecifications" }, 1922 { MALO_CMD_SET_RADIO, "SetRadio" }, 1923 { MALO_CMD_SET_AID, "SetAid" }, 1924 { MALO_CMD_SET_TXPOWER, "SetTxPower" }, 1925 { MALO_CMD_SET_ANTENNA, "SetAntenna" }, 1926 { MALO_CMD_SET_PRESCAN, "SetPrescan" }, 1927 { MALO_CMD_SET_POSTSCAN, "SetPostscan" }, 1928 { MALO_CMD_SET_RATE, "SetRate" }, 1929 { MALO_CMD_SET_CHANNEL, "SetChannel" }, 1930 { MALO_CMD_SET_RTS, "SetRTS" }, 1931 { MALO_CMD_SET_SLOT, "SetSlot" }, 1932 }; 1933 1934 for (i = 0; i < sizeof(cmds) / sizeof(cmds[0]); i++) 1935 if ((le16toh(cmd) & 0x7fff) == cmds[i].cmd_code) 1936 return (cmds[i].cmd_string); 1937 1938 snprintf(cmd_buf, sizeof(cmd_buf), "unknown %#x", cmd); 1939 return (cmd_buf); 1940 } 1941 1942 static const char * 1943 malo_cmd_string_result(uint16_t result) 1944 { 1945 int i; 1946 static const struct { 1947 uint16_t result_code; 1948 const char *result_string; 1949 } results[] = { 1950 { MALO_CMD_RESULT_OK, "OK" }, 1951 { MALO_CMD_RESULT_ERROR, "general error" }, 1952 { MALO_CMD_RESULT_NOSUPPORT, "not supported" }, 1953 { MALO_CMD_RESULT_PENDING, "pending" }, 1954 { MALO_CMD_RESULT_BUSY, "ignored" }, 1955 { MALO_CMD_RESULT_PARTIALDATA, "incomplete" }, 1956 }; 1957 1958 for (i = 0; i < sizeof(results) / sizeof(results[0]); i++) 1959 if (le16toh(result) == results[i].result_code) 1960 return (results[i].result_string); 1961 1962 return ("unknown"); 1963 } 1964 1965 static int 1966 malo_cmd_get_spec(struct malo_softc *sc) 1967 { 1968 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 1969 struct malo_hw_spec *spec; 1970 1971 hdr->cmd = htole16(MALO_CMD_GET_HW_SPEC); 1972 hdr->size = htole16(sizeof(*hdr) + sizeof(*spec)); 1973 hdr->seqnum = htole16(42); /* the one and only */ 1974 hdr->result = 0; 1975 spec = (struct malo_hw_spec *)(hdr + 1); 1976 1977 memset(spec, 0, sizeof(*spec)); 1978 memset(spec->PermanentAddress, 0xff, ETHER_ADDR_LEN); 1979 spec->CookiePtr = htole32(sc->sc_cookie_dmaaddr); 1980 1981 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1982 BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD); 1983 1984 if (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr) != 0) 1985 return (ETIMEDOUT); 1986 1987 /* get the data from the buffer */ 1988 DPRINTF(1, "%s: get_hw_spec: V%x R%x, #WCB %d, #Mcast %d, Regcode %d, " 1989 "#Ant %d\n", device_xname(sc->sc_dev), htole16(spec->HwVersion), 1990 htole32(spec->FWReleaseNumber), htole16(spec->NumOfWCB), 1991 htole16(spec->NumOfMCastAdr), htole16(spec->RegionCode), 1992 htole16(spec->NumberOfAntenna)); 1993 1994 /* tell the DMA engine where our rings are */ 1995 malo_mem_write4(sc, le32toh(spec->RxPdRdPtr) & 0xffff, 1996 sc->sc_rxring.physaddr); 1997 malo_mem_write4(sc, le32toh(spec->RxPdWrPtr) & 0xffff, 1998 sc->sc_rxring.physaddr); 1999 malo_mem_write4(sc, le32toh(spec->WcbBase0) & 0xffff, 2000 sc->sc_txring.physaddr); 2001 2002 /* save DMA RX pointers for later use */ 2003 sc->sc_RxPdRdPtr = le32toh(spec->RxPdRdPtr) & 0xffff; 2004 sc->sc_RxPdWrPtr = le32toh(spec->RxPdWrPtr) & 0xffff; 2005 2006 return (0); 2007 } 2008 2009 static int 2010 malo_cmd_set_prescan(struct malo_softc *sc) 2011 { 2012 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2013 2014 hdr->cmd = htole16(MALO_CMD_SET_PRESCAN); 2015 hdr->size = htole16(sizeof(*hdr)); 2016 hdr->seqnum = 1; 2017 hdr->result = 0; 2018 2019 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2020 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2021 2022 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2023 } 2024 2025 static int 2026 malo_cmd_set_postscan(struct malo_softc *sc, uint8_t *macaddr, uint8_t ibsson) 2027 { 2028 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2029 struct malo_cmd_postscan *body; 2030 2031 hdr->cmd = htole16(MALO_CMD_SET_POSTSCAN); 2032 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2033 hdr->seqnum = 1; 2034 hdr->result = 0; 2035 body = (struct malo_cmd_postscan *)(hdr + 1); 2036 2037 memset(body, 0, sizeof(*body)); 2038 memcpy(&body->bssid, macaddr, ETHER_ADDR_LEN); 2039 body->isibss = htole32(ibsson); 2040 2041 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2042 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2043 2044 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2045 } 2046 2047 static int 2048 malo_cmd_set_channel(struct malo_softc *sc, struct ieee80211_channel* chan) 2049 { 2050 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2051 struct ieee80211com *ic = &sc->sc_ic; 2052 struct malo_cmd_channel *body; 2053 uint8_t channel; 2054 2055 channel = ieee80211_chan2ieee(ic, chan); 2056 2057 hdr->cmd = htole16(MALO_CMD_SET_CHANNEL); 2058 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2059 hdr->seqnum = 1; 2060 hdr->result = 0; 2061 body = (struct malo_cmd_channel *)(hdr + 1); 2062 2063 memset(body, 0, sizeof(*body)); 2064 body->action = htole16(1); 2065 body->channel = channel; 2066 2067 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2068 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2069 2070 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2071 } 2072 2073 static int 2074 malo_cmd_set_antenna(struct malo_softc *sc, uint16_t antenna) 2075 { 2076 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2077 struct malo_cmd_antenna *body; 2078 2079 hdr->cmd = htole16(MALO_CMD_SET_ANTENNA); 2080 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2081 hdr->seqnum = 1; 2082 hdr->result = 0; 2083 body = (struct malo_cmd_antenna *)(hdr + 1); 2084 2085 memset(body, 0, sizeof(*body)); 2086 body->action = htole16(antenna); 2087 if (antenna == 1) 2088 body->mode = htole16(0xffff); 2089 else 2090 body->mode = htole16(2); 2091 2092 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2093 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2094 2095 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2096 } 2097 2098 static int 2099 malo_cmd_set_radio(struct malo_softc *sc, uint16_t enable, 2100 uint16_t preamble_mode) 2101 { 2102 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2103 struct malo_cmd_radio *body; 2104 2105 hdr->cmd = htole16(MALO_CMD_SET_RADIO); 2106 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2107 hdr->seqnum = 1; 2108 hdr->result = 0; 2109 body = (struct malo_cmd_radio *)(hdr + 1); 2110 2111 memset(body, 0, sizeof(*body)); 2112 body->action = htole16(1); 2113 body->preamble_mode = htole16(preamble_mode); 2114 body->enable = htole16(enable); 2115 2116 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2117 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2118 2119 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2120 } 2121 2122 static int 2123 malo_cmd_set_aid(struct malo_softc *sc, uint8_t *bssid, uint16_t associd) 2124 { 2125 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2126 struct malo_cmd_aid *body; 2127 2128 hdr->cmd = htole16(MALO_CMD_SET_AID); 2129 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2130 hdr->seqnum = 1; 2131 hdr->result = 0; 2132 body = (struct malo_cmd_aid *)(hdr + 1); 2133 2134 memset(body, 0, sizeof(*body)); 2135 body->associd = htole16(associd); 2136 memcpy(&body->macaddr[0], bssid, IEEE80211_ADDR_LEN); 2137 2138 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2139 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2140 2141 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2142 } 2143 2144 static int 2145 malo_cmd_set_txpower(struct malo_softc *sc, unsigned int powerlevel) 2146 { 2147 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2148 struct malo_cmd_txpower *body; 2149 2150 hdr->cmd = htole16(MALO_CMD_SET_TXPOWER); 2151 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2152 hdr->seqnum = 1; 2153 hdr->result = 0; 2154 body = (struct malo_cmd_txpower *)(hdr + 1); 2155 2156 memset(body, 0, sizeof(*body)); 2157 body->action = htole16(1); 2158 if (powerlevel < 30) 2159 body->supportpowerlvl = htole16(5); /* LOW */ 2160 else if (powerlevel >= 30 && powerlevel < 60) 2161 body->supportpowerlvl = htole16(10); /* MEDIUM */ 2162 else 2163 body->supportpowerlvl = htole16(15); /* HIGH */ 2164 2165 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2166 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2167 2168 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2169 } 2170 2171 static int 2172 malo_cmd_set_rts(struct malo_softc *sc, uint32_t threshold) 2173 { 2174 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2175 struct malo_cmd_rts *body; 2176 2177 hdr->cmd = htole16(MALO_CMD_SET_RTS); 2178 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2179 hdr->seqnum = 1; 2180 hdr->result = 0; 2181 body = (struct malo_cmd_rts *)(hdr + 1); 2182 2183 memset(body, 0, sizeof(*body)); 2184 body->action = htole16(1); 2185 body->threshold = htole32(threshold); 2186 2187 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2188 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2189 2190 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2191 } 2192 2193 static int 2194 malo_cmd_set_slot(struct malo_softc *sc, uint8_t slot) 2195 { 2196 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2197 struct malo_cmd_slot *body; 2198 2199 hdr->cmd = htole16(MALO_CMD_SET_SLOT); 2200 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2201 hdr->seqnum = 1; 2202 hdr->result = 0; 2203 body = (struct malo_cmd_slot *)(hdr + 1); 2204 2205 memset(body, 0, sizeof(*body)); 2206 body->action = htole16(1); 2207 body->slot = slot; 2208 2209 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2210 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2211 2212 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2213 } 2214 2215 static int 2216 malo_cmd_set_rate(struct malo_softc *sc, uint8_t rate) 2217 { 2218 struct ieee80211com *ic = &sc->sc_ic; 2219 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2220 struct malo_cmd_rate *body; 2221 int i; 2222 2223 hdr->cmd = htole16(MALO_CMD_SET_RATE); 2224 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2225 hdr->seqnum = 1; 2226 hdr->result = 0; 2227 body = (struct malo_cmd_rate *)(hdr + 1); 2228 2229 memset(body, 0,sizeof(*body)); 2230 2231 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2232 /* TODO */ 2233 } else 2234 { 2235 body->aprates[0] = 2; 2236 body->aprates[1] = 4; 2237 body->aprates[2] = 11; 2238 body->aprates[3] = 22; 2239 if (ic->ic_curmode == IEEE80211_MODE_11G) { 2240 body->aprates[4] = 0; 2241 body->aprates[5] = 12; 2242 body->aprates[6] = 18; 2243 body->aprates[7] = 24; 2244 body->aprates[8] = 36; 2245 body->aprates[9] = 48; 2246 body->aprates[10] = 72; 2247 body->aprates[11] = 96; 2248 body->aprates[12] = 108; 2249 } 2250 } 2251 2252 if (rate != 0) { 2253 /* fixed rate */ 2254 for (i = 0; i < 13; i++) { 2255 if (body->aprates[i] == rate) { 2256 body->rateindex = i; 2257 body->dataratetype = 1; 2258 break; 2259 } 2260 } 2261 } 2262 2263 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2264 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2265 2266 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2267 } 2268 2269 static void 2270 malo_cmd_response(struct malo_softc *sc) 2271 { 2272 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2273 2274 if (le16toh(hdr->result) != MALO_CMD_RESULT_OK) { 2275 aprint_error_dev(sc->sc_dev, "firmware cmd %s failed with %s\n", 2276 malo_cmd_string(hdr->cmd), 2277 malo_cmd_string_result(hdr->result)); 2278 } 2279 2280 #ifdef MALO_DEBUG 2281 aprint_error_dev(sc->sc_dev, "cmd answer for %s=%s\n", 2282 malo_cmd_string(hdr->cmd), 2283 malo_cmd_string_result(hdr->result)); 2284 2285 if (malo_d > 2) 2286 malo_hexdump(hdr, le16toh(hdr->size)); 2287 #endif 2288 } 2289
Indexes created Wed Sep 24 05:09:52 GMT 2025