malo.c revision 1.16
1 /* $NetBSD: malo.c,v 1.16 2019/09/22 09:03:07 kamil Exp $ */ 2 /* $OpenBSD: malo.c,v 1.92 2010/08/27 17:08:00 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Claudio Jeker <claudio (at) openbsd.org> 6 * Copyright (c) 2006 Marcus Glocker <mglocker (at) openbsd.org> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 #include <sys/cdefs.h> 22 __KERNEL_RCSID(0, "$NetBSD: malo.c,v 1.16 2019/09/22 09:03:07 kamil Exp $"); 23 24 #include <sys/param.h> 25 #include <sys/types.h> 26 27 #include <sys/device.h> 28 #include <sys/kernel.h> 29 #include <sys/malloc.h> 30 #include <sys/mbuf.h> 31 #include <sys/proc.h> 32 #include <sys/socket.h> 33 #include <sys/sockio.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 37 #include <machine/endian.h> 38 #include <machine/intr.h> 39 40 #include <net/if.h> 41 #include <net/if_media.h> 42 #include <net/if_ether.h> 43 44 #include <net/bpf.h> 45 46 #include <netinet/in.h> 47 #include <netinet/in_systm.h> 48 49 #include <net80211/ieee80211_var.h> 50 #include <net80211/ieee80211_radiotap.h> 51 52 #include <dev/firmload.h> 53 54 #include <dev/ic/malovar.h> 55 #include <dev/ic/maloreg.h> 56 57 #ifdef MALO_DEBUG 58 int malo_d = 2; 59 #define DPRINTF(l, x...) do { if ((l) <= malo_d) printf(x); } while (0) 60 #else 61 #define DPRINTF(l, x...) 62 #endif 63 64 /* internal structures and defines */ 65 struct malo_node { 66 struct ieee80211_node ni; 67 }; 68 69 struct malo_rx_data { 70 bus_dmamap_t map; 71 struct mbuf *m; 72 }; 73 74 struct malo_tx_data { 75 bus_dmamap_t map; 76 struct mbuf *m; 77 uint32_t softstat; 78 struct ieee80211_node *ni; 79 }; 80 81 /* RX descriptor used by HW */ 82 struct malo_rx_desc { 83 uint8_t rxctrl; 84 uint8_t rssi; 85 uint8_t status; 86 uint8_t channel; 87 uint16_t len; 88 uint8_t reserved1; /* actually unused */ 89 uint8_t datarate; 90 uint32_t physdata; /* DMA address of data */ 91 uint32_t physnext; /* DMA address of next control block */ 92 uint16_t qosctrl; 93 uint16_t reserved2; 94 } __packed; 95 96 /* TX descriptor used by HW */ 97 struct malo_tx_desc { 98 uint32_t status; 99 #define MALO_TXD_STATUS_IDLE 0x00000000 100 #define MALO_TXD_STATUS_USED 0x00000001 101 #define MALO_TXD_STATUS_OK 0x00000001 102 #define MALO_TXD_STATUS_OK_RETRY 0x00000002 103 #define MALO_TXD_STATUS_OK_MORE_RETRY 0x00000004 104 #define MALO_TXD_STATUS_MULTICAST_TX 0x00000008 105 #define MALO_TXD_STATUS_BROADCAST_TX 0x00000010 106 #define MALO_TXD_STATUS_FAILED_LINK_ERROR 0x00000020 107 #define MALO_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040 108 #define MALO_TXD_STATUS_FAILED_XRETRY MALO_TXD_STATUS_FAILED_EXCEED_LIMIT 109 #define MALO_TXD_STATUS_FAILED_AGING 0x00000080 110 #define MALO_TXD_STATUS_FW_OWNED 0x80000000 111 uint8_t datarate; 112 uint8_t txpriority; 113 uint16_t qosctrl; 114 uint32_t physdata; /* DMA address of data */ 115 uint16_t len; 116 uint8_t destaddr[6]; 117 uint32_t physnext; /* DMA address of next control block */ 118 uint32_t reserved1; /* SAP packet info ??? */ 119 uint32_t reserved2; 120 } __packed; 121 122 #define MALO_RX_RING_COUNT 256 123 #define MALO_TX_RING_COUNT 256 124 #define MALO_MAX_SCATTER 8 /* XXX unknown, wild guess */ 125 #define MALO_CMD_TIMEOUT 50 /* MALO_CMD_TIMEOUT * 100us */ 126 127 /* 128 * Firmware commands 129 */ 130 #define MALO_CMD_GET_HW_SPEC 0x0003 131 #define MALO_CMD_SET_RADIO 0x001c 132 #define MALO_CMD_SET_AID 0x010d 133 #define MALO_CMD_SET_TXPOWER 0x001e 134 #define MALO_CMD_SET_ANTENNA 0x0020 135 #define MALO_CMD_SET_PRESCAN 0x0107 136 #define MALO_CMD_SET_POSTSCAN 0x0108 137 #define MALO_CMD_SET_RATE 0x0110 138 #define MALO_CMD_SET_CHANNEL 0x010a 139 #define MALO_CMD_SET_RTS 0x0113 140 #define MALO_CMD_SET_SLOT 0x0114 141 #define MALO_CMD_RESPONSE 0x8000 142 143 #define MALO_CMD_RESULT_OK 0x0000 /* everything is fine */ 144 #define MALO_CMD_RESULT_ERROR 0x0001 /* general error */ 145 #define MALO_CMD_RESULT_NOSUPPORT 0x0002 /* command not valid */ 146 #define MALO_CMD_RESULT_PENDING 0x0003 /* will be processed */ 147 #define MALO_CMD_RESULT_BUSY 0x0004 /* command ignored */ 148 #define MALO_CMD_RESULT_PARTIALDATA 0x0005 /* buffer too small */ 149 150 struct malo_cmdheader { 151 uint16_t cmd; 152 uint16_t size; /* size of the command, incl. header */ 153 uint16_t seqnum; /* seems not to matter that much */ 154 uint16_t result; /* set to 0 on request */ 155 /* following the data payload, up to 256 bytes */ 156 }; 157 158 struct malo_hw_spec { 159 uint16_t HwVersion; 160 uint16_t NumOfWCB; 161 uint16_t NumOfMCastAdr; 162 uint8_t PermanentAddress[6]; 163 uint16_t RegionCode; 164 uint16_t NumberOfAntenna; 165 uint32_t FWReleaseNumber; 166 uint32_t WcbBase0; 167 uint32_t RxPdWrPtr; 168 uint32_t RxPdRdPtr; 169 uint32_t CookiePtr; 170 uint32_t WcbBase1; 171 uint32_t WcbBase2; 172 uint32_t WcbBase3; 173 } __packed; 174 175 struct malo_cmd_radio { 176 uint16_t action; 177 uint16_t preamble_mode; 178 uint16_t enable; 179 } __packed; 180 181 struct malo_cmd_aid { 182 uint16_t associd; 183 uint8_t macaddr[6]; 184 uint32_t gprotection; 185 uint8_t aprates[14]; 186 } __packed; 187 188 struct malo_cmd_txpower { 189 uint16_t action; 190 uint16_t supportpowerlvl; 191 uint16_t currentpowerlvl; 192 uint16_t reserved; 193 uint16_t powerlvllist[8]; 194 } __packed; 195 196 struct malo_cmd_antenna { 197 uint16_t action; 198 uint16_t mode; 199 } __packed; 200 201 struct malo_cmd_postscan { 202 uint32_t isibss; 203 uint8_t bssid[6]; 204 } __packed; 205 206 struct malo_cmd_channel { 207 uint16_t action; 208 uint8_t channel; 209 } __packed; 210 211 struct malo_cmd_rate { 212 uint8_t dataratetype; 213 uint8_t rateindex; 214 uint8_t aprates[14]; 215 } __packed; 216 217 struct malo_cmd_rts { 218 uint16_t action; 219 uint32_t threshold; 220 } __packed; 221 222 struct malo_cmd_slot { 223 uint16_t action; 224 uint8_t slot; 225 } __packed; 226 227 #define malo_mem_write4(sc, off, x) \ 228 bus_space_write_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x)) 229 #define malo_mem_write2(sc, off, x) \ 230 bus_space_write_2((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x)) 231 #define malo_mem_write1(sc, off, x) \ 232 bus_space_write_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x)) 233 234 #define malo_mem_read4(sc, off) \ 235 bus_space_read_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off)) 236 #define malo_mem_read1(sc, off) \ 237 bus_space_read_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off)) 238 239 #define malo_ctl_write4(sc, off, x) \ 240 bus_space_write_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off), (x)) 241 #define malo_ctl_read4(sc, off) \ 242 bus_space_read_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off)) 243 #define malo_ctl_read1(sc, off) \ 244 bus_space_read_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off)) 245 246 #define malo_ctl_barrier(sc, t) \ 247 bus_space_barrier((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, 0x0c00, 0xff, (t)) 248 249 static int malo_alloc_cmd(struct malo_softc *sc); 250 static void malo_free_cmd(struct malo_softc *sc); 251 static void malo_send_cmd(struct malo_softc *sc, bus_addr_t addr); 252 static int malo_send_cmd_dma(struct malo_softc *sc, bus_addr_t addr); 253 static int malo_alloc_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring, 254 int count); 255 static void malo_reset_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring); 256 static void malo_free_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring); 257 static int malo_alloc_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring, 258 int count); 259 static void malo_reset_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring); 260 static void malo_free_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring); 261 static int malo_ioctl(struct ifnet *ifp, u_long cmd, void* data); 262 static void malo_start(struct ifnet *ifp); 263 static void malo_watchdog(struct ifnet *ifp); 264 static int malo_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 265 int arg); 266 static void malo_newassoc(struct ieee80211_node *ni, int isnew); 267 static struct ieee80211_node * 268 malo_node_alloc(struct ieee80211_node_table *nt); 269 static int malo_media_change(struct ifnet *ifp); 270 static void malo_media_status(struct ifnet *ifp, struct ifmediareq *imr); 271 static int malo_chip2rate(int chip_rate); 272 static int malo_fix2rate(int fix_rate); 273 static void malo_next_scan(void *arg); 274 static void malo_tx_intr(struct malo_softc *sc); 275 static int malo_tx_data(struct malo_softc *sc, struct mbuf *m0, 276 struct ieee80211_node *ni); 277 static void malo_tx_setup_desc(struct malo_softc *sc, struct malo_tx_desc *desc, 278 int len, int rate, const bus_dma_segment_t *segs, int nsegs); 279 static void malo_rx_intr(struct malo_softc *sc); 280 static int malo_load_bootimg(struct malo_softc *sc); 281 static int malo_load_firmware(struct malo_softc *sc); 282 283 static int malo_set_slot(struct malo_softc *sc); 284 static void malo_update_slot(struct ifnet* ifp); 285 #ifdef MALO_DEBUG 286 static void malo_hexdump(void *buf, int len); 287 #endif 288 static const char *malo_cmd_string(uint16_t cmd); 289 static const char *malo_cmd_string_result(uint16_t result); 290 static int malo_cmd_get_spec(struct malo_softc *sc); 291 static int malo_cmd_set_prescan(struct malo_softc *sc); 292 static int malo_cmd_set_postscan(struct malo_softc *sc, uint8_t *macaddr, 293 uint8_t ibsson); 294 static int malo_cmd_set_channel(struct malo_softc *sc, struct ieee80211_channel *chan); 295 static int malo_cmd_set_antenna(struct malo_softc *sc, uint16_t antenna_type); 296 static int malo_cmd_set_radio(struct malo_softc *sc, uint16_t mode, 297 uint16_t preamble); 298 static int malo_cmd_set_aid(struct malo_softc *sc, uint8_t *bssid, 299 uint16_t associd); 300 static int malo_cmd_set_txpower(struct malo_softc *sc, unsigned int powerlevel); 301 static int malo_cmd_set_rts(struct malo_softc *sc, uint32_t threshold); 302 static int malo_cmd_set_slot(struct malo_softc *sc, uint8_t slot); 303 static int malo_cmd_set_rate(struct malo_softc *sc, uint8_t rate); 304 static void malo_cmd_response(struct malo_softc *sc); 305 306 int 307 malo_intr(void *arg) 308 { 309 struct malo_softc *sc = arg; 310 uint32_t status; 311 312 status = malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 313 if (status == 0xffffffff || status == 0) 314 /* not for us */ 315 return (0); 316 317 /* disable interrupts */ 318 malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 319 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_CAUSE, 0); 320 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0); 321 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0); 322 323 softint_schedule(sc->sc_soft_ih); 324 return (1); 325 } 326 327 void 328 malo_softintr(void *arg) 329 { 330 struct malo_softc *sc = arg; 331 uint32_t status; 332 333 status = malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 334 if (status == 0xffffffff || status == 0) 335 goto out; /* not for us */ 336 337 if (status & MALO_A2HRIC_BIT_TX_DONE) 338 malo_tx_intr(sc); 339 if (status & MALO_A2HRIC_BIT_RX_RDY) 340 malo_rx_intr(sc); 341 if (status & MALO_A2HRIC_BIT_OPC_DONE) { 342 /* XXX cmd done interrupt handling doesn't work yet */ 343 DPRINTF(1, "%s: got cmd done interrupt\n", 344 device_xname(sc->sc_dev)); 345 //malo_cmd_response(sc); 346 } 347 348 if (status & ~0x7) { 349 DPRINTF(1, "%s: unknown interrupt %x\n", 350 device_xname(sc->sc_dev), status); 351 } 352 353 /* just ack the interrupt */ 354 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_CAUSE, 0); 355 356 out: 357 /* enable interrupts */ 358 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0x1f); 359 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 360 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0x1f); 361 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 362 } 363 364 int 365 malo_attach(struct malo_softc *sc) 366 { 367 struct ieee80211com *ic = &sc->sc_ic; 368 struct ifnet *ifp = &sc->sc_if; 369 int i, rv; 370 371 /* initialize channel scanning timer */ 372 callout_init(&sc->sc_scan_to, 0); 373 callout_setfunc(&sc->sc_scan_to, malo_next_scan, sc); 374 375 /* allocate DMA structures */ 376 malo_alloc_cmd(sc); 377 malo_alloc_rx_ring(sc, &sc->sc_rxring, MALO_RX_RING_COUNT); 378 malo_alloc_tx_ring(sc, &sc->sc_txring, MALO_TX_RING_COUNT); 379 380 /* setup interface */ 381 ifp->if_softc = sc; 382 ifp->if_init = malo_init; 383 ifp->if_stop = malo_stop; 384 ifp->if_ioctl = malo_ioctl; 385 ifp->if_start = malo_start; 386 ifp->if_watchdog = malo_watchdog; 387 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 388 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 389 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 390 IFQ_SET_READY(&ifp->if_snd); 391 392 /* set supported rates */ 393 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 394 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 395 sc->sc_last_txrate = -1; 396 397 /* set channels */ 398 for (i = 1; i <= 14; i++) { 399 ic->ic_channels[i].ic_freq = 400 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 401 ic->ic_channels[i].ic_flags = 402 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 403 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 404 } 405 406 /* OpenBSD supports IEEE80211_C_RSN too */ 407 /* set the rest */ 408 ic->ic_ifp = ifp; 409 ic->ic_caps = 410 IEEE80211_C_IBSS | 411 IEEE80211_C_MONITOR | 412 IEEE80211_C_SHPREAMBLE | 413 IEEE80211_C_SHSLOT | 414 IEEE80211_C_WEP | 415 IEEE80211_C_WPA; 416 ic->ic_opmode = IEEE80211_M_STA; 417 ic->ic_state = IEEE80211_S_INIT; 418 for (i = 0; i < 6; i++) 419 ic->ic_myaddr[i] = malo_ctl_read1(sc, 0xa528 + i); 420 421 /* show our mac address */ 422 aprint_normal(", address %s\n", ether_sprintf(ic->ic_myaddr)); 423 424 /* attach interface */ 425 rv = if_initialize(ifp); 426 if (rv != 0) { 427 aprint_error_dev(sc->sc_dev, "if_initialize failed(%d)\n", rv); 428 malo_free_tx_ring(sc, &sc->sc_txring); 429 malo_free_rx_ring(sc, &sc->sc_rxring); 430 malo_free_cmd(sc); 431 callout_destroy(&sc->sc_scan_to); 432 433 return rv; /* Error */ 434 } 435 ieee80211_ifattach(ic); 436 /* Use common softint-based if_input */ 437 ifp->if_percpuq = if_percpuq_create(ifp); 438 if_register(ifp); 439 440 /* post attach vector functions */ 441 sc->sc_newstate = ic->ic_newstate; 442 ic->ic_newstate = malo_newstate; 443 ic->ic_newassoc = malo_newassoc; 444 ic->ic_node_alloc = malo_node_alloc; 445 ic->ic_updateslot = malo_update_slot; 446 447 ieee80211_media_init(ic, malo_media_change, malo_media_status); 448 449 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 450 sizeof(struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN, 451 &sc->sc_drvbpf); 452 453 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 454 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 455 sc->sc_rxtap.wr_ihdr.it_present = htole32(MALO_RX_RADIOTAP_PRESENT); 456 457 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 458 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 459 sc->sc_txtap.wt_ihdr.it_present = htole32(MALO_TX_RADIOTAP_PRESENT); 460 461 ieee80211_announce(ic); 462 463 return (0); 464 } 465 466 int 467 malo_detach(void *arg) 468 { 469 struct malo_softc *sc = arg; 470 struct ieee80211com *ic = &sc->sc_ic; 471 struct ifnet *ifp = &sc->sc_if; 472 473 malo_stop(ifp, 1); 474 /* remove channel scanning timer */ 475 callout_destroy(&sc->sc_scan_to); 476 ieee80211_ifdetach(ic); 477 if_detach(ifp); 478 malo_free_cmd(sc); 479 malo_free_rx_ring(sc, &sc->sc_rxring); 480 malo_free_tx_ring(sc, &sc->sc_txring); 481 482 return (0); 483 } 484 485 static int 486 malo_alloc_cmd(struct malo_softc *sc) 487 { 488 int error, nsegs; 489 490 error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, 491 PAGE_SIZE, 0, BUS_DMA_ALLOCNOW, &sc->sc_cmd_dmam); 492 if (error != 0) { 493 aprint_error_dev(sc->sc_dev, "can not create DMA tag\n"); 494 return (-1); 495 } 496 497 error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, PAGE_SIZE, 498 0, &sc->sc_cmd_dmas, 1, &nsegs, BUS_DMA_WAITOK); 499 if (error != 0) { 500 aprint_error_dev(sc->sc_dev, "error alloc dma memory\n"); 501 return (-1); 502 } 503 504 error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cmd_dmas, nsegs, 505 PAGE_SIZE, (void **)&sc->sc_cmd_mem, BUS_DMA_WAITOK); 506 if (error != 0) { 507 aprint_error_dev(sc->sc_dev, "error map dma memory\n"); 508 return (-1); 509 } 510 511 error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmd_dmam, 512 sc->sc_cmd_mem, PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 513 if (error != 0) { 514 aprint_error_dev(sc->sc_dev, "error load dma memory\n"); 515 bus_dmamem_free(sc->sc_dmat, &sc->sc_cmd_dmas, nsegs); 516 return (-1); 517 } 518 519 sc->sc_cookie = sc->sc_cmd_mem; 520 *sc->sc_cookie = htole32(0xaa55aa55); 521 sc->sc_cmd_mem = ((char*)sc->sc_cmd_mem) + sizeof(uint32_t); 522 sc->sc_cookie_dmaaddr = sc->sc_cmd_dmam->dm_segs[0].ds_addr; 523 sc->sc_cmd_dmaaddr = sc->sc_cmd_dmam->dm_segs[0].ds_addr + 524 sizeof(uint32_t); 525 526 return (0); 527 } 528 529 static void 530 malo_free_cmd(struct malo_softc *sc) 531 { 532 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 533 BUS_DMASYNC_POSTWRITE); 534 bus_dmamap_unload(sc->sc_dmat, sc->sc_cmd_dmam); 535 bus_dmamem_unmap(sc->sc_dmat, sc->sc_cookie, PAGE_SIZE); 536 bus_dmamem_free(sc->sc_dmat, &sc->sc_cmd_dmas, 1); 537 } 538 539 static void 540 malo_send_cmd(struct malo_softc *sc, bus_addr_t addr) 541 { 542 malo_ctl_write4(sc, MALO_REG_GEN_PTR, (uint32_t)addr); 543 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 544 malo_ctl_write4(sc, MALO_REG_H2A_INTERRUPT_EVENTS, 2); /* CPU_TRANSFER_CMD */ 545 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 546 } 547 548 static int 549 malo_send_cmd_dma(struct malo_softc *sc, bus_addr_t addr) 550 { 551 int i; 552 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 553 554 malo_send_cmd(sc, addr); 555 556 for (i = 0; i < MALO_CMD_TIMEOUT; i++) { 557 delay(100); 558 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 559 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 560 if (hdr->cmd & htole16(0x8000)) 561 break; 562 } 563 if (i == MALO_CMD_TIMEOUT) { 564 aprint_error_dev(sc->sc_dev, "timeout while waiting for cmd response!\n"); 565 return (ETIMEDOUT); 566 } 567 568 malo_cmd_response(sc); 569 570 return (0); 571 } 572 573 static int 574 malo_alloc_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring, int count) 575 { 576 struct malo_rx_desc *desc; 577 struct malo_rx_data *data; 578 int i, nsegs, error; 579 580 ring->count = count; 581 ring->cur = ring->next = 0; 582 583 error = bus_dmamap_create(sc->sc_dmat, 584 count * sizeof(struct malo_rx_desc), 1, 585 count * sizeof(struct malo_rx_desc), 0, 586 BUS_DMA_NOWAIT, &ring->map); 587 if (error != 0) { 588 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 589 goto fail; 590 } 591 592 error = bus_dmamem_alloc(sc->sc_dmat, 593 count * sizeof(struct malo_rx_desc), 594 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 595 596 if (error != 0) { 597 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 598 goto fail; 599 } 600 601 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 602 count * sizeof(struct malo_rx_desc), (void **)&ring->desc, 603 BUS_DMA_NOWAIT); 604 if (error != 0) { 605 aprint_error_dev(sc->sc_dev, "can't map desc DMA memory\n"); 606 goto fail; 607 } 608 609 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 610 count * sizeof(struct malo_rx_desc), NULL, BUS_DMA_NOWAIT); 611 if (error != 0) { 612 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 613 goto fail; 614 } 615 616 ring->physaddr = ring->map->dm_segs->ds_addr; 617 618 ring->data = malloc(count * sizeof (struct malo_rx_data), M_DEVBUF, 619 M_NOWAIT); 620 if (ring->data == NULL) { 621 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 622 error = ENOMEM; 623 goto fail; 624 } 625 626 /* 627 * Pre-allocate Rx buffers and populate Rx ring. 628 */ 629 memset(ring->data, 0, count * sizeof (struct malo_rx_data)); 630 for (i = 0; i < count; i++) { 631 desc = &ring->desc[i]; 632 data = &ring->data[i]; 633 634 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 635 0, BUS_DMA_NOWAIT, &data->map); 636 if (error != 0) { 637 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 638 goto fail; 639 } 640 641 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 642 if (data->m == NULL) { 643 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf\n"); 644 error = ENOMEM; 645 goto fail; 646 } 647 648 MCLGET(data->m, M_DONTWAIT); 649 if (!(data->m->m_flags & M_EXT)) { 650 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf cluster\n"); 651 error = ENOMEM; 652 goto fail; 653 } 654 655 error = bus_dmamap_load(sc->sc_dmat, data->map, 656 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 657 if (error != 0) { 658 aprint_error_dev(sc->sc_dev, "could not load rx buf DMA map"); 659 goto fail; 660 } 661 662 desc->status = 1; 663 desc->physdata = htole32(data->map->dm_segs->ds_addr); 664 desc->physnext = htole32(ring->physaddr + 665 (i + 1) % count * sizeof(struct malo_rx_desc)); 666 } 667 668 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 669 BUS_DMASYNC_PREWRITE); 670 671 return (0); 672 673 fail: malo_free_rx_ring(sc, ring); 674 return (error); 675 } 676 677 static void 678 malo_reset_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring) 679 { 680 int i; 681 682 for (i = 0; i < ring->count; i++) 683 ring->desc[i].status = 0; 684 685 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 686 BUS_DMASYNC_PREWRITE); 687 688 ring->cur = ring->next = 0; 689 } 690 691 static void 692 malo_free_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring) 693 { 694 struct malo_rx_data *data; 695 int i; 696 697 if (ring->desc != NULL) { 698 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 699 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 700 bus_dmamap_unload(sc->sc_dmat, ring->map); 701 bus_dmamem_unmap(sc->sc_dmat, ring->desc, 702 ring->count * sizeof(struct malo_rx_desc)); 703 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 704 } 705 706 if (ring->data != NULL) { 707 for (i = 0; i < ring->count; i++) { 708 data = &ring->data[i]; 709 710 if (data->m != NULL) { 711 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 712 data->map->dm_mapsize, 713 BUS_DMASYNC_POSTREAD); 714 bus_dmamap_unload(sc->sc_dmat, data->map); 715 m_freem(data->m); 716 } 717 718 if (data->map != NULL) 719 bus_dmamap_destroy(sc->sc_dmat, data->map); 720 } 721 free(ring->data, M_DEVBUF); 722 } 723 } 724 725 static int 726 malo_alloc_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring, 727 int count) 728 { 729 int i, nsegs, error; 730 731 ring->count = count; 732 ring->queued = 0; 733 ring->cur = ring->next = ring->stat = 0; 734 735 error = bus_dmamap_create(sc->sc_dmat, 736 count * sizeof(struct malo_tx_desc), 1, 737 count * sizeof(struct malo_tx_desc), 0, BUS_DMA_NOWAIT, &ring->map); 738 if (error != 0) { 739 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 740 goto fail; 741 } 742 743 error = bus_dmamem_alloc(sc->sc_dmat, 744 count * sizeof(struct malo_tx_desc), PAGE_SIZE, 0, 745 &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 746 if (error != 0) { 747 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 748 goto fail; 749 } 750 751 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 752 count * sizeof(struct malo_tx_desc), (void **)&ring->desc, 753 BUS_DMA_NOWAIT); 754 if (error != 0) { 755 aprint_error_dev(sc->sc_dev, "can't map desc DMA memory\n"); 756 goto fail; 757 } 758 759 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 760 count * sizeof(struct malo_tx_desc), NULL, BUS_DMA_NOWAIT); 761 if (error != 0) { 762 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 763 goto fail; 764 } 765 766 ring->physaddr = ring->map->dm_segs->ds_addr; 767 768 ring->data = malloc(count * sizeof(struct malo_tx_data), M_DEVBUF, 769 M_NOWAIT); 770 if (ring->data == NULL) { 771 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 772 error = ENOMEM; 773 goto fail; 774 } 775 776 memset(ring->data, 0, count * sizeof(struct malo_tx_data)); 777 for (i = 0; i < count; i++) { 778 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 779 MALO_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 780 &ring->data[i].map); 781 if (error != 0) { 782 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 783 goto fail; 784 } 785 ring->desc[i].physnext = htole32(ring->physaddr + 786 (i + 1) % count * sizeof(struct malo_tx_desc)); 787 } 788 789 return (0); 790 791 fail: malo_free_tx_ring(sc, ring); 792 return (error); 793 } 794 795 static void 796 malo_reset_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring) 797 { 798 struct malo_tx_desc *desc; 799 struct malo_tx_data *data; 800 int i; 801 802 for (i = 0; i < ring->count; i++) { 803 desc = &ring->desc[i]; 804 data = &ring->data[i]; 805 806 if (data->m != NULL) { 807 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 808 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 809 bus_dmamap_unload(sc->sc_dmat, data->map); 810 m_freem(data->m); 811 data->m = NULL; 812 } 813 814 /* 815 * The node has already been freed at that point so don't call 816 * ieee80211_release_node() here. 817 */ 818 data->ni = NULL; 819 820 desc->status = 0; 821 } 822 823 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 824 BUS_DMASYNC_PREWRITE); 825 826 ring->queued = 0; 827 ring->cur = ring->next = ring->stat = 0; 828 } 829 830 static void 831 malo_free_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring) 832 { 833 struct malo_tx_data *data; 834 int i; 835 836 if (ring->desc != NULL) { 837 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 838 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 839 bus_dmamap_unload(sc->sc_dmat, ring->map); 840 bus_dmamem_unmap(sc->sc_dmat, ring->desc, 841 ring->count * sizeof(struct malo_tx_desc)); 842 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 843 } 844 845 if (ring->data != NULL) { 846 for (i = 0; i < ring->count; i++) { 847 data = &ring->data[i]; 848 849 if (data->m != NULL) { 850 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 851 data->map->dm_mapsize, 852 BUS_DMASYNC_POSTWRITE); 853 bus_dmamap_unload(sc->sc_dmat, data->map); 854 m_freem(data->m); 855 } 856 857 /* 858 * The node has already been freed at that point so 859 * don't call ieee80211_release_node() here. 860 */ 861 data->ni = NULL; 862 863 if (data->map != NULL) 864 bus_dmamap_destroy(sc->sc_dmat, data->map); 865 } 866 free(ring->data, M_DEVBUF); 867 } 868 } 869 870 int 871 malo_init(struct ifnet *ifp) 872 { 873 struct malo_softc *sc = ifp->if_softc; 874 struct ieee80211com *ic = &sc->sc_ic; 875 int error; 876 877 DPRINTF(1, "%s: %s\n", ifp->if_xname, __func__); 878 879 /* if interface already runs stop it first */ 880 if (ifp->if_flags & IFF_RUNNING) 881 malo_stop(ifp, 1); 882 883 /* power on cardbus socket */ 884 if (sc->sc_enable) 885 sc->sc_enable(sc); 886 887 /* disable interrupts */ 888 malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 889 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_CAUSE, 0); 890 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0); 891 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0); 892 893 /* load firmware */ 894 if ((error = malo_load_bootimg(sc))) 895 goto fail; 896 if ((error = malo_load_firmware(sc))) 897 goto fail; 898 899 /* enable interrupts */ 900 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0x1f); 901 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 902 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0x1f); 903 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 904 905 if ((error = malo_cmd_get_spec(sc))) 906 goto fail; 907 908 /* select default channel */ 909 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 910 911 /* initialize hardware */ 912 if ((error = malo_cmd_set_channel(sc, ic->ic_bss->ni_chan))) { 913 aprint_error_dev(sc->sc_dev, "setting channel failed!\n"); 914 goto fail; 915 } 916 if ((error = malo_cmd_set_antenna(sc, 1))) { 917 aprint_error_dev(sc->sc_dev, "setting RX antenna failed!\n"); 918 goto fail; 919 } 920 if ((error = malo_cmd_set_antenna(sc, 2))) { 921 aprint_error_dev(sc->sc_dev, "setting TX antenna failed!\n"); 922 goto fail; 923 } 924 if ((error = malo_cmd_set_radio(sc, 1, 5))) { 925 aprint_error_dev(sc->sc_dev, "turn radio on failed!\n"); 926 goto fail; 927 } 928 if ((error = malo_cmd_set_txpower(sc, 100))) { 929 aprint_error_dev(sc->sc_dev, "setting TX power failed!\n"); 930 goto fail; 931 } 932 if ((error = malo_cmd_set_rts(sc, IEEE80211_RTS_MAX))) { 933 aprint_error_dev(sc->sc_dev, "setting RTS failed!\n"); 934 goto fail; 935 } 936 937 ifp->if_flags |= IFF_RUNNING; 938 939 if (ic->ic_opmode != IEEE80211_M_MONITOR) 940 /* start background scanning */ 941 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 942 else 943 /* in monitor mode change directly into run state */ 944 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 945 946 return (0); 947 948 fail: 949 /* reset adapter */ 950 DPRINTF(1, "%s: malo_init failed, resetting card\n", 951 device_xname(sc->sc_dev)); 952 malo_stop(ifp, 1); 953 return (error); 954 } 955 956 static int 957 malo_ioctl(struct ifnet *ifp, u_long cmd, void* data) 958 { 959 struct malo_softc *sc = ifp->if_softc; 960 struct ieee80211com *ic = &sc->sc_ic; 961 int s, error = 0; 962 963 s = splnet(); 964 965 switch (cmd) { 966 case SIOCSIFFLAGS: 967 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 968 break; 969 if (ifp->if_flags & IFF_UP) { 970 if ((ifp->if_flags & IFF_RUNNING) == 0) 971 malo_init(ifp); 972 } else { 973 if (ifp->if_flags & IFF_RUNNING) 974 malo_stop(ifp, 1); 975 } 976 break; 977 case SIOCADDMULTI: 978 case SIOCDELMULTI: 979 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 980 /* setup multicast filter, etc */ 981 error = 0; 982 } 983 break; 984 case SIOCS80211CHANNEL: 985 /* allow fast channel switching in monitor mode */ 986 error = ieee80211_ioctl(ic, cmd, data); 987 if (error == ENETRESET && 988 ic->ic_opmode == IEEE80211_M_MONITOR) { 989 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 990 (IFF_UP | IFF_RUNNING)) { 991 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 992 malo_cmd_set_channel(sc, ic->ic_bss->ni_chan); 993 } 994 error = 0; 995 } 996 break; 997 default: 998 error = ieee80211_ioctl(ic, cmd, data); 999 break; 1000 } 1001 1002 if (error == ENETRESET) { 1003 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1004 (IFF_UP | IFF_RUNNING)) 1005 malo_init(ifp); 1006 error = 0; 1007 } 1008 1009 splx(s); 1010 1011 return (error); 1012 } 1013 1014 static void 1015 malo_start(struct ifnet *ifp) 1016 { 1017 struct malo_softc *sc = ifp->if_softc; 1018 struct ieee80211com *ic = &sc->sc_ic; 1019 struct mbuf *m0; 1020 struct ether_header *eh; 1021 struct ieee80211_node *ni = NULL; 1022 1023 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1024 1025 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1026 return; 1027 1028 for (;;) { 1029 IF_POLL(&ic->ic_mgtq, m0); 1030 if (m0 != NULL) { 1031 if (sc->sc_txring.queued >= MALO_TX_RING_COUNT) { 1032 ifp->if_flags |= IFF_OACTIVE; 1033 break; 1034 } 1035 IF_DEQUEUE(&ic->ic_mgtq, m0); 1036 1037 ni = M_GETCTX(m0, struct ieee80211_node *); 1038 M_CLEARCTX(m0); 1039 1040 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1041 1042 if (malo_tx_data(sc, m0, ni) != 0) 1043 break; 1044 } else { 1045 if (ic->ic_state != IEEE80211_S_RUN) 1046 break; 1047 IFQ_POLL(&ifp->if_snd, m0); 1048 if (m0 == NULL) 1049 break; 1050 if (sc->sc_txring.queued >= MALO_TX_RING_COUNT - 1) { 1051 ifp->if_flags |= IFF_OACTIVE; 1052 break; 1053 } 1054 1055 if (m0->m_len < sizeof (*eh) && 1056 (m0 = m_pullup(m0, sizeof (*eh))) == NULL) { 1057 ifp->if_oerrors++; 1058 continue; 1059 } 1060 eh = mtod(m0, struct ether_header *); 1061 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1062 if (ni == NULL) { 1063 m_freem(m0); 1064 ifp->if_oerrors++; 1065 continue; 1066 } 1067 1068 // XXX must I call ieee_classify at this point ? 1069 1070 IFQ_DEQUEUE(&ifp->if_snd, m0); 1071 bpf_mtap(ifp, m0, BPF_D_OUT); 1072 1073 m0 = ieee80211_encap(ic, m0, ni); 1074 if (m0 == NULL) 1075 continue; 1076 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1077 1078 if (malo_tx_data(sc, m0, ni) != 0) { 1079 ieee80211_free_node(ni); 1080 ifp->if_oerrors++; 1081 break; 1082 } 1083 } 1084 } 1085 } 1086 1087 void 1088 malo_stop(struct ifnet* ifp, int disable) 1089 { 1090 struct malo_softc *sc = ifp->if_softc; 1091 struct ieee80211com *ic = &sc->sc_ic; 1092 1093 DPRINTF(1, "%s: %s\n", ifp->if_xname, __func__); 1094 1095 /* reset adapter */ 1096 if (ifp->if_flags & IFF_RUNNING) 1097 malo_ctl_write4(sc, MALO_REG_H2A_INTERRUPT_EVENTS, (1 << 15)); 1098 1099 /* device is not running anymore */ 1100 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1101 1102 /* change back to initial state */ 1103 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 1104 1105 /* reset RX / TX rings */ 1106 malo_reset_tx_ring(sc, &sc->sc_txring); 1107 malo_reset_rx_ring(sc, &sc->sc_rxring); 1108 1109 /* set initial rate */ 1110 sc->sc_last_txrate = -1; 1111 1112 /* power off cardbus socket */ 1113 if (sc->sc_disable) 1114 sc->sc_disable(sc); 1115 } 1116 1117 static void 1118 malo_watchdog(struct ifnet *ifp) 1119 { 1120 1121 } 1122 1123 static int 1124 malo_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 1125 { 1126 struct ifnet *ifp = ic->ic_ifp; 1127 struct malo_softc *sc = ifp->if_softc; 1128 enum ieee80211_state ostate; 1129 int rate; 1130 1131 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1132 1133 ostate = ic->ic_state; 1134 callout_stop(&sc->sc_scan_to); 1135 1136 switch (nstate) { 1137 case IEEE80211_S_INIT: 1138 DPRINTF(1, "%s: newstate INIT\n", device_xname(sc->sc_dev)); 1139 break; 1140 case IEEE80211_S_SCAN: 1141 DPRINTF(1, "%s: newstate SCAN\n", device_xname(sc->sc_dev)); 1142 if (ostate == IEEE80211_S_INIT) { 1143 if (malo_cmd_set_prescan(sc) != 0) { 1144 DPRINTF(1, "%s: can't set prescan\n", 1145 device_xname(sc->sc_dev)); 1146 } 1147 } else { 1148 malo_cmd_set_channel(sc, ic->ic_curchan); 1149 } 1150 callout_schedule(&sc->sc_scan_to, hz/2); 1151 break; 1152 case IEEE80211_S_AUTH: 1153 DPRINTF(1, "%s: newstate AUTH\n", device_xname(sc->sc_dev)); 1154 malo_cmd_set_postscan(sc, ic->ic_myaddr, 1); 1155 malo_cmd_set_channel(sc, ic->ic_curchan); 1156 break; 1157 case IEEE80211_S_ASSOC: 1158 DPRINTF(1, "%s: newstate ASSOC\n", device_xname(sc->sc_dev)); 1159 malo_cmd_set_channel(sc, ic->ic_curchan); 1160 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1161 malo_cmd_set_radio(sc, 1, 3); /* short preamble */ 1162 else 1163 malo_cmd_set_radio(sc, 1, 1); /* long preamble */ 1164 1165 malo_cmd_set_aid(sc, ic->ic_bss->ni_bssid, 1166 ic->ic_bss->ni_associd); 1167 1168 if (ic->ic_fixed_rate == -1) 1169 /* automatic rate adaption */ 1170 malo_cmd_set_rate(sc, 0); 1171 else { 1172 /* fixed rate */ 1173 rate = malo_fix2rate(ic->ic_fixed_rate); 1174 malo_cmd_set_rate(sc, rate); 1175 } 1176 1177 malo_set_slot(sc); 1178 break; 1179 case IEEE80211_S_RUN: 1180 DPRINTF(1, "%s: newstate RUN\n", device_xname(sc->sc_dev)); 1181 break; 1182 default: 1183 break; 1184 } 1185 1186 return (sc->sc_newstate(ic, nstate, arg)); 1187 } 1188 1189 static void 1190 malo_newassoc(struct ieee80211_node *ni, int isnew) 1191 { 1192 } 1193 1194 static struct ieee80211_node * 1195 malo_node_alloc(struct ieee80211_node_table *nt) 1196 { 1197 struct malo_node *wn; 1198 1199 wn = malloc(sizeof(*wn), M_DEVBUF, M_NOWAIT | M_ZERO); 1200 if (wn == NULL) 1201 return (NULL); 1202 1203 return ((struct ieee80211_node *)wn); 1204 } 1205 1206 static int 1207 malo_media_change(struct ifnet *ifp) 1208 { 1209 int error; 1210 1211 DPRINTF(1, "%s: %s\n", ifp->if_xname, __func__); 1212 1213 error = ieee80211_media_change(ifp); 1214 if (error != ENETRESET) 1215 return (error); 1216 1217 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 1218 malo_init(ifp); 1219 1220 return (0); 1221 } 1222 1223 static void 1224 malo_media_status(struct ifnet *ifp, struct ifmediareq *imr) 1225 { 1226 struct malo_softc *sc = ifp->if_softc; 1227 struct ieee80211com *ic = &sc->sc_ic; 1228 1229 imr->ifm_status = IFM_AVALID; 1230 imr->ifm_active = IFM_IEEE80211; 1231 if (ic->ic_state == IEEE80211_S_RUN) 1232 imr->ifm_status |= IFM_ACTIVE; 1233 1234 /* report last TX rate used by chip */ 1235 imr->ifm_active |= ieee80211_rate2media(ic, sc->sc_last_txrate, 1236 ic->ic_curmode); 1237 1238 switch (ic->ic_opmode) { 1239 case IEEE80211_M_STA: 1240 break; 1241 case IEEE80211_M_IBSS: 1242 imr->ifm_active |= IFM_IEEE80211_ADHOC; 1243 break; 1244 case IEEE80211_M_AHDEMO: 1245 break; 1246 case IEEE80211_M_HOSTAP: 1247 break; 1248 case IEEE80211_M_MONITOR: 1249 imr->ifm_active |= IFM_IEEE80211_MONITOR; 1250 break; 1251 default: 1252 break; 1253 } 1254 1255 switch (ic->ic_curmode) { 1256 case IEEE80211_MODE_11B: 1257 imr->ifm_active |= IFM_IEEE80211_11B; 1258 break; 1259 case IEEE80211_MODE_11G: 1260 imr->ifm_active |= IFM_IEEE80211_11G; 1261 break; 1262 } 1263 } 1264 1265 static int 1266 malo_chip2rate(int chip_rate) 1267 { 1268 switch (chip_rate) { 1269 /* CCK rates */ 1270 case 0: return (2); 1271 case 1: return (4); 1272 case 2: return (11); 1273 case 3: return (22); 1274 1275 /* OFDM rates */ 1276 case 4: return (0); /* reserved */ 1277 case 5: return (12); 1278 case 6: return (18); 1279 case 7: return (24); 1280 case 8: return (36); 1281 case 9: return (48); 1282 case 10: return (72); 1283 case 11: return (96); 1284 case 12: return (108); 1285 1286 /* no rate select yet or unknown rate */ 1287 default: return (-1); 1288 } 1289 } 1290 1291 static int 1292 malo_fix2rate(int fix_rate) 1293 { 1294 switch (fix_rate) { 1295 /* CCK rates */ 1296 case 0: return (2); 1297 case 1: return (4); 1298 case 2: return (11); 1299 case 3: return (22); 1300 1301 /* OFDM rates */ 1302 case 4: return (12); 1303 case 5: return (18); 1304 case 6: return (24); 1305 case 7: return (36); 1306 case 8: return (48); 1307 case 9: return (72); 1308 case 10: return (96); 1309 case 11: return (108); 1310 1311 /* unknown rate: should not happen */ 1312 default: return (0); 1313 } 1314 } 1315 1316 static void 1317 malo_next_scan(void *arg) 1318 { 1319 struct malo_softc *sc = arg; 1320 struct ieee80211com *ic = &sc->sc_ic; 1321 int s; 1322 1323 DPRINTF(1, "%s: %s\n", sc->sc_if.if_xname, __func__); 1324 1325 s = splnet(); 1326 1327 if (ic->ic_state == IEEE80211_S_SCAN) 1328 ieee80211_next_scan(ic); 1329 1330 splx(s); 1331 } 1332 1333 static void 1334 malo_tx_intr(struct malo_softc *sc) 1335 { 1336 struct ifnet *ifp = &sc->sc_if; 1337 struct malo_tx_desc *desc; 1338 struct malo_tx_data *data; 1339 struct malo_node *rn; 1340 int stat, s; 1341 1342 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1343 1344 s = splnet(); 1345 1346 stat = sc->sc_txring.stat; 1347 for (;;) { 1348 desc = &sc->sc_txring.desc[sc->sc_txring.stat]; 1349 data = &sc->sc_txring.data[sc->sc_txring.stat]; 1350 rn = (struct malo_node *)data->ni; 1351 1352 /* check if TX descriptor is not owned by FW anymore */ 1353 if ((le32toh(desc->status) & MALO_TXD_STATUS_FW_OWNED) || 1354 !(le32toh(data->softstat) & MALO_TXD_STATUS_FAILED_AGING)) 1355 break; 1356 1357 /* if no frame has been sent, ignore */ 1358 if (rn == NULL) 1359 goto next; 1360 1361 /* check TX state */ 1362 switch (le32toh(desc->status) & MALO_TXD_STATUS_USED) { 1363 case MALO_TXD_STATUS_OK: 1364 DPRINTF(2, "%s: data frame was sent successfully\n", 1365 device_xname(sc->sc_dev)); 1366 ifp->if_opackets++; 1367 break; 1368 default: 1369 DPRINTF(1, "%s: data frame sending error\n", 1370 device_xname(sc->sc_dev)); 1371 ifp->if_oerrors++; 1372 break; 1373 } 1374 1375 /* save last used TX rate */ 1376 sc->sc_last_txrate = malo_chip2rate(desc->datarate); 1377 1378 /* cleanup TX data and TX descriptor */ 1379 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1380 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1381 bus_dmamap_unload(sc->sc_dmat, data->map); 1382 m_freem(data->m); 1383 ieee80211_free_node(data->ni); 1384 data->m = NULL; 1385 data->ni = NULL; 1386 data->softstat &= htole32(~0x80); 1387 desc->status = 0; 1388 desc->len = 0; 1389 1390 DPRINTF(2, "%s: tx done idx=%u\n", 1391 device_xname(sc->sc_dev), sc->sc_txring.stat); 1392 1393 sc->sc_txring.queued--; 1394 next: 1395 if (++sc->sc_txring.stat >= sc->sc_txring.count) 1396 sc->sc_txring.stat = 0; 1397 if (sc->sc_txring.stat == stat) 1398 break; 1399 } 1400 1401 sc->sc_tx_timer = 0; 1402 ifp->if_flags &= ~IFF_OACTIVE; 1403 malo_start(ifp); 1404 1405 splx(s); 1406 } 1407 1408 static int 1409 malo_tx_data(struct malo_softc *sc, struct mbuf *m0, 1410 struct ieee80211_node *ni) 1411 { 1412 struct ieee80211com *ic = &sc->sc_ic; 1413 struct ifnet *ifp = &sc->sc_if; 1414 struct malo_tx_desc *desc; 1415 struct malo_tx_data *data; 1416 struct ieee80211_frame *wh; 1417 struct ieee80211_key *k; 1418 struct mbuf *mnew; 1419 int error; 1420 1421 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1422 1423 desc = &sc->sc_txring.desc[sc->sc_txring.cur]; 1424 data = &sc->sc_txring.data[sc->sc_txring.cur]; 1425 1426 if (m0->m_len < sizeof(struct ieee80211_frame)) { 1427 m0 = m_pullup(m0, sizeof(struct ieee80211_frame)); 1428 if (m0 == NULL) { 1429 ifp->if_ierrors++; 1430 return (ENOBUFS); 1431 } 1432 } 1433 wh = mtod(m0, struct ieee80211_frame *); 1434 1435 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1436 k = ieee80211_crypto_encap(ic, ni, m0); 1437 if (k == NULL) { 1438 m_freem(m0); 1439 return ENOBUFS; 1440 } 1441 1442 /* packet header may have moved, reset our local pointer */ 1443 wh = mtod(m0, struct ieee80211_frame *); 1444 } 1445 1446 if (sc->sc_drvbpf != NULL) { 1447 struct malo_tx_radiotap_hdr *tap = &sc->sc_txtap; 1448 1449 tap->wt_flags = 0; 1450 tap->wt_chan_freq = htole16(ni->ni_chan->ic_freq); 1451 tap->wt_chan_flags = htole16(ni->ni_chan->ic_flags); 1452 tap->wt_rate = sc->sc_last_txrate; 1453 if (wh->i_fc[1] & IEEE80211_FC1_WEP) 1454 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1455 1456 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1457 } 1458 1459 /* 1460 * inject FW specific fields into the 802.11 frame 1461 * 1462 * 2 bytes FW len (inject) 1463 * 24 bytes 802.11 frame header 1464 * 6 bytes addr4 (inject) 1465 * n bytes 802.11 frame body 1466 * 1467 * For now copy all into a new mcluster. 1468 */ 1469 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1470 if (mnew == NULL) 1471 return (ENOBUFS); 1472 MCLGET(mnew, M_DONTWAIT); 1473 if (!(mnew->m_flags & M_EXT)) { 1474 m_free(mnew); 1475 return (ENOBUFS); 1476 } 1477 1478 *mtod(mnew, uint16_t *) = htole16(m0->m_pkthdr.len - 24); /* FW len */ 1479 memmove(mtod(mnew, char*) + 2, wh, sizeof(*wh)); 1480 memset(mtod(mnew, char*) + 26, 0, 6); 1481 m_copydata(m0, sizeof(*wh), m0->m_pkthdr.len - sizeof(*wh), 1482 mtod(mnew, char*) + 32); 1483 mnew->m_pkthdr.len = mnew->m_len = m0->m_pkthdr.len + 8; 1484 m_freem(m0); 1485 m0 = mnew; 1486 1487 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1488 BUS_DMA_NOWAIT); 1489 if (error != 0) { 1490 aprint_error_dev(sc->sc_dev, "can't map mbuf (error %d)\n", error); 1491 m_freem(m0); 1492 return (error); 1493 } 1494 1495 data->m = m0; 1496 data->ni = ni; 1497 data->softstat |= htole32(0x80); 1498 1499 malo_tx_setup_desc(sc, desc, m0->m_pkthdr.len, 1, 1500 data->map->dm_segs, data->map->dm_nsegs); 1501 1502 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1503 BUS_DMASYNC_PREWRITE); 1504 bus_dmamap_sync(sc->sc_dmat, sc->sc_txring.map, 1505 sc->sc_txring.cur * sizeof(struct malo_tx_desc), 1506 sizeof(struct malo_tx_desc), BUS_DMASYNC_PREWRITE); 1507 1508 DPRINTF(2, "%s: sending frame, pktlen=%u, idx=%u\n", 1509 device_xname(sc->sc_dev), m0->m_pkthdr.len, sc->sc_txring.cur); 1510 1511 sc->sc_txring.queued++; 1512 sc->sc_txring.cur = (sc->sc_txring.cur + 1) % MALO_TX_RING_COUNT; 1513 1514 /* kick data TX */ 1515 malo_ctl_write4(sc, MALO_REG_H2A_INTERRUPT_EVENTS, 1); 1516 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 1517 1518 return (0); 1519 } 1520 1521 static void 1522 malo_tx_setup_desc(struct malo_softc *sc, struct malo_tx_desc *desc, 1523 int len, int rate, const bus_dma_segment_t *segs, int nsegs) 1524 { 1525 desc->len = htole16(segs[0].ds_len); 1526 desc->datarate = rate; /* 0 = mgmt frame, 1 = data frame */ 1527 desc->physdata = htole32(segs[0].ds_addr); 1528 desc->status = htole32(MALO_TXD_STATUS_OK | MALO_TXD_STATUS_FW_OWNED); 1529 } 1530 1531 static void 1532 malo_rx_intr(struct malo_softc *sc) 1533 { 1534 struct ieee80211com *ic = &sc->sc_ic; 1535 struct ifnet *ifp = &sc->sc_if; 1536 struct malo_rx_desc *desc; 1537 struct malo_rx_data *data; 1538 struct ieee80211_frame *wh; 1539 struct ieee80211_node *ni; 1540 struct mbuf *mnew, *m; 1541 uint32_t rxRdPtr, rxWrPtr; 1542 int error, i, s; 1543 1544 rxRdPtr = malo_mem_read4(sc, sc->sc_RxPdRdPtr); 1545 rxWrPtr = malo_mem_read4(sc, sc->sc_RxPdWrPtr); 1546 1547 for (i = 0; i < MALO_RX_RING_COUNT && rxRdPtr != rxWrPtr; i++) { 1548 desc = &sc->sc_rxring.desc[sc->sc_rxring.cur]; 1549 data = &sc->sc_rxring.data[sc->sc_rxring.cur]; 1550 1551 bus_dmamap_sync(sc->sc_dmat, sc->sc_rxring.map, 1552 sc->sc_rxring.cur * sizeof(struct malo_rx_desc), 1553 sizeof(struct malo_rx_desc), BUS_DMASYNC_POSTREAD); 1554 1555 DPRINTF(3, "%s: rx intr idx=%d, rxctrl=0x%02x, rssi=%d, " 1556 "status=0x%02x, channel=%d, len=%d, res1=%02x, rate=%d, " 1557 "physdata=0x%04x, physnext=0x%04x, qosctrl=%02x, res2=%d\n", 1558 device_xname(sc->sc_dev), 1559 sc->sc_rxring.cur, desc->rxctrl, desc->rssi, desc->status, 1560 desc->channel, le16toh(desc->len), desc->reserved1, 1561 desc->datarate, le32toh(desc->physdata), 1562 le32toh(desc->physnext), desc->qosctrl, desc->reserved2); 1563 1564 if ((desc->rxctrl & 0x80) == 0) 1565 break; 1566 1567 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1568 if (mnew == NULL) { 1569 ifp->if_ierrors++; 1570 goto skip; 1571 } 1572 1573 MCLGET(mnew, M_DONTWAIT); 1574 if (!(mnew->m_flags & M_EXT)) { 1575 m_freem(mnew); 1576 ifp->if_ierrors++; 1577 goto skip; 1578 } 1579 1580 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1581 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1582 bus_dmamap_unload(sc->sc_dmat, data->map); 1583 1584 error = bus_dmamap_load(sc->sc_dmat, data->map, 1585 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1586 if (error != 0) { 1587 m_freem(mnew); 1588 1589 error = bus_dmamap_load(sc->sc_dmat, data->map, 1590 mtod(data->m, void *), MCLBYTES, NULL, 1591 BUS_DMA_NOWAIT); 1592 if (error != 0) { 1593 panic("%s: could not load old rx mbuf", 1594 device_xname(sc->sc_dev)); 1595 } 1596 ifp->if_ierrors++; 1597 goto skip; 1598 } 1599 1600 /* 1601 * New mbuf mbuf successfully loaded 1602 */ 1603 m = data->m; 1604 data->m = mnew; 1605 desc->physdata = htole32(data->map->dm_segs->ds_addr); 1606 1607 /* finalize mbuf */ 1608 m_set_rcvif(m, ifp); 1609 m->m_pkthdr.len = m->m_len = le16toh(desc->len); 1610 1611 /* 1612 * cut out FW specific fields from the 802.11 frame 1613 * 1614 * 2 bytes FW len (cut out) 1615 * 24 bytes 802.11 frame header 1616 * 6 bytes addr4 (cut out) 1617 * n bytes 802.11 frame data 1618 */ 1619 memmove(m->m_data +6, m->m_data, 26); 1620 m_adj(m, 8); 1621 1622 s = splnet(); 1623 1624 if (sc->sc_drvbpf != NULL) { 1625 struct malo_rx_radiotap_hdr *tap = &sc->sc_rxtap; 1626 1627 tap->wr_flags = 0; 1628 tap->wr_chan_freq = 1629 htole16(ic->ic_bss->ni_chan->ic_freq); 1630 tap->wr_chan_flags = 1631 htole16(ic->ic_bss->ni_chan->ic_flags); 1632 1633 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m, 1634 BPF_D_IN); 1635 } 1636 1637 wh = mtod(m, struct ieee80211_frame *); 1638 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1639 1640 /* send the frame to the 802.11 layer */ 1641 ieee80211_input(ic, m, ni, desc->rssi, 0); 1642 1643 /* node is no longer needed */ 1644 ieee80211_free_node(ni); 1645 1646 splx(s); 1647 1648 skip: 1649 desc->rxctrl = 0; 1650 rxRdPtr = le32toh(desc->physnext); 1651 1652 bus_dmamap_sync(sc->sc_dmat, sc->sc_rxring.map, 1653 sc->sc_rxring.cur * sizeof(struct malo_rx_desc), 1654 sizeof(struct malo_rx_desc), BUS_DMASYNC_PREWRITE); 1655 1656 sc->sc_rxring.cur = (sc->sc_rxring.cur + 1) % 1657 MALO_RX_RING_COUNT; 1658 } 1659 1660 malo_mem_write4(sc, sc->sc_RxPdRdPtr, rxRdPtr); 1661 } 1662 1663 static int 1664 malo_get_firmware(struct malo_softc *sc, const char *name, 1665 uint8_t** firmware_image, size_t* size) 1666 { 1667 firmware_handle_t fw; 1668 int error; 1669 1670 1671 /* load firmware image from disk */ 1672 if ((error = firmware_open("malo", name, &fw)) != 0) { 1673 aprint_error_dev(sc->sc_dev, "could not read firmware file\n"); 1674 return error; 1675 } 1676 1677 *size = firmware_get_size(fw); 1678 1679 *firmware_image = firmware_malloc(*size); 1680 if (*firmware_image == NULL) { 1681 aprint_error_dev(sc->sc_dev, "not enough memory to stock firmware\n"); 1682 error = ENOMEM; 1683 goto fail1; 1684 } 1685 1686 if ((error = firmware_read(fw, 0, *firmware_image, *size)) != 0) { 1687 aprint_error_dev(sc->sc_dev, "can't get firmware\n"); 1688 goto fail2; 1689 } 1690 1691 firmware_close(fw); 1692 1693 return 0; 1694 fail2: 1695 firmware_free(*firmware_image, *size); 1696 fail1: 1697 firmware_close(fw); 1698 return error; 1699 } 1700 1701 static int 1702 malo_load_bootimg(struct malo_softc *sc) 1703 { 1704 const char *name = "malo8335-h"; 1705 uint8_t *ucode; 1706 size_t size; 1707 int error, i; 1708 1709 /* load boot firmware */ 1710 if ((error = malo_get_firmware(sc, name, &ucode, &size)) != 0) { 1711 aprint_error_dev(sc->sc_dev, "error %d, could not read firmware %s\n", 1712 error, name); 1713 return (EIO); 1714 } 1715 1716 /* 1717 * It seems we are putting this code directly onto the stack of 1718 * the ARM cpu. I don't know why we need to instruct the DMA 1719 * engine to move the code. This is a big riddle without docu. 1720 */ 1721 DPRINTF(1, "%s: loading boot firmware\n", device_xname(sc->sc_dev)); 1722 malo_mem_write2(sc, 0xbef8, 0x001); 1723 malo_mem_write2(sc, 0xbefa, size); 1724 malo_mem_write4(sc, 0xbefc, 0); 1725 1726 bus_space_write_region_1(sc->sc_mem1_bt, sc->sc_mem1_bh, 0xbf00, 1727 ucode, size); 1728 1729 firmware_free(ucode, size); 1730 1731 /* 1732 * we loaded the firmware into card memory now tell the CPU 1733 * to fetch the code and execute it. The memory mapped via the 1734 * first bar is internaly mapped to 0xc0000000. 1735 */ 1736 malo_send_cmd(sc, 0xc000bef8); 1737 1738 /* wait for the device to go into FW loading mode */ 1739 for (i = 0; i < 10; i++) { 1740 delay(50); 1741 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_READ); 1742 if (malo_ctl_read4(sc, 0x0c14) == 0x5) 1743 break; 1744 } 1745 if (i == 10) { 1746 aprint_error_dev(sc->sc_dev, "timeout at boot firmware load!\n"); 1747 return (ETIMEDOUT); 1748 } 1749 1750 /* tell the card we're done and... */ 1751 malo_mem_write2(sc, 0xbef8, 0x001); 1752 malo_mem_write2(sc, 0xbefa, 0); 1753 malo_mem_write4(sc, 0xbefc, 0); 1754 malo_send_cmd(sc, 0xc000bef8); 1755 1756 DPRINTF(1, "%s: boot firmware loaded\n", device_xname(sc->sc_dev)); 1757 1758 return (0); 1759 } 1760 1761 1762 static int 1763 malo_load_firmware(struct malo_softc *sc) 1764 { 1765 struct malo_cmdheader *hdr; 1766 const char *name = "malo8335-m"; 1767 void *data; 1768 uint8_t *ucode; 1769 size_t size, count, bsize; 1770 int i, sn, error; 1771 1772 /* load real firmware now */ 1773 if ((error = malo_get_firmware(sc, name, &ucode, &size)) != 0) { 1774 aprint_error_dev(sc->sc_dev, "error %d, could not read firmware %s\n", 1775 error, name); 1776 return (EIO); 1777 } 1778 1779 DPRINTF(1, "%s: uploading firmware\n", device_xname(sc->sc_dev)); 1780 1781 hdr = sc->sc_cmd_mem; 1782 data = hdr + 1; 1783 sn = 1; 1784 for (count = 0; count < size; count += bsize) { 1785 bsize = MIN(256, size - count); 1786 1787 hdr->cmd = htole16(0x0001); 1788 hdr->size = htole16(bsize); 1789 hdr->seqnum = htole16(sn++); 1790 hdr->result = 0; 1791 1792 memcpy(data, ucode + count, bsize); 1793 1794 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1795 BUS_DMASYNC_PREWRITE); 1796 malo_send_cmd(sc, sc->sc_cmd_dmaaddr); 1797 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1798 BUS_DMASYNC_POSTWRITE); 1799 delay(500); 1800 } 1801 firmware_free(ucode, size); 1802 1803 DPRINTF(1, "%s: firmware upload finished\n", device_xname(sc->sc_dev)); 1804 1805 /* 1806 * send a command with size 0 to tell that the firmware has been 1807 * uploaded 1808 */ 1809 hdr->cmd = htole16(0x0001); 1810 hdr->size = 0; 1811 hdr->seqnum = htole16(sn++); 1812 hdr->result = 0; 1813 1814 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1815 BUS_DMASYNC_PREWRITE); 1816 malo_send_cmd(sc, sc->sc_cmd_dmaaddr); 1817 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1818 BUS_DMASYNC_POSTWRITE); 1819 delay(100); 1820 1821 DPRINTF(1, "%s: loading firmware\n", device_xname(sc->sc_dev)); 1822 1823 /* wait until firmware has been loaded */ 1824 for (i = 0; i < 200; i++) { 1825 malo_ctl_write4(sc, 0x0c10, 0x5a); 1826 delay(500); 1827 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE | 1828 BUS_SPACE_BARRIER_READ); 1829 if (malo_ctl_read4(sc, 0x0c14) == 0xf0f1f2f4) 1830 break; 1831 } 1832 if (i == 200) { 1833 aprint_error_dev(sc->sc_dev, "timeout at firmware load!\n"); 1834 return (ETIMEDOUT); 1835 } 1836 1837 DPRINTF(1, "%s: firmware loaded\n", device_xname(sc->sc_dev)); 1838 1839 return (0); 1840 } 1841 1842 static int 1843 malo_set_slot(struct malo_softc *sc) 1844 { 1845 struct ieee80211com *ic = &sc->sc_ic; 1846 1847 if (ic->ic_flags & IEEE80211_F_SHSLOT) { 1848 /* set short slot */ 1849 if (malo_cmd_set_slot(sc, 1)) { 1850 aprint_error_dev(sc->sc_dev, "setting short slot failed\n"); 1851 return (ENXIO); 1852 } 1853 } else { 1854 /* set long slot */ 1855 if (malo_cmd_set_slot(sc, 0)) { 1856 aprint_error_dev(sc->sc_dev, "setting long slot failed\n"); 1857 return (ENXIO); 1858 } 1859 } 1860 1861 return (0); 1862 } 1863 1864 static void 1865 malo_update_slot(struct ifnet* ifp) 1866 { 1867 struct malo_softc *sc = ifp->if_softc; 1868 struct ieee80211com *ic = &sc->sc_ic; 1869 1870 malo_set_slot(sc); 1871 1872 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 1873 /* TODO */ 1874 } 1875 } 1876 1877 #ifdef MALO_DEBUG 1878 static void 1879 malo_hexdump(void *buf, int len) 1880 { 1881 u_char b[16]; 1882 int i, j, l; 1883 1884 for (i = 0; i < len; i += l) { 1885 printf("%4i:", i); 1886 l = uimin(sizeof(b), len - i); 1887 memcpy(b, (char*)buf + i, l); 1888 1889 for (j = 0; j < sizeof(b); j++) { 1890 if (j % 2 == 0) 1891 printf(" "); 1892 if (j % 8 == 0) 1893 printf(" "); 1894 if (j < l) 1895 printf("%02x", (int)b[j]); 1896 else 1897 printf(" "); 1898 } 1899 printf(" |"); 1900 for (j = 0; j < l; j++) { 1901 if (b[j] >= 0x20 && b[j] <= 0x7e) 1902 printf("%c", b[j]); 1903 else 1904 printf("."); 1905 } 1906 printf("|\n"); 1907 } 1908 } 1909 #endif 1910 1911 static const char * 1912 malo_cmd_string(uint16_t cmd) 1913 { 1914 int i; 1915 static char cmd_buf[16]; 1916 static const struct { 1917 uint16_t cmd_code; 1918 const char *cmd_string; 1919 } cmds[] = { 1920 { MALO_CMD_GET_HW_SPEC, "GetHwSpecifications" }, 1921 { MALO_CMD_SET_RADIO, "SetRadio" }, 1922 { MALO_CMD_SET_AID, "SetAid" }, 1923 { MALO_CMD_SET_TXPOWER, "SetTxPower" }, 1924 { MALO_CMD_SET_ANTENNA, "SetAntenna" }, 1925 { MALO_CMD_SET_PRESCAN, "SetPrescan" }, 1926 { MALO_CMD_SET_POSTSCAN, "SetPostscan" }, 1927 { MALO_CMD_SET_RATE, "SetRate" }, 1928 { MALO_CMD_SET_CHANNEL, "SetChannel" }, 1929 { MALO_CMD_SET_RTS, "SetRTS" }, 1930 { MALO_CMD_SET_SLOT, "SetSlot" }, 1931 }; 1932 1933 for (i = 0; i < sizeof(cmds) / sizeof(cmds[0]); i++) 1934 if ((le16toh(cmd) & 0x7fff) == cmds[i].cmd_code) 1935 return (cmds[i].cmd_string); 1936 1937 snprintf(cmd_buf, sizeof(cmd_buf), "unknown %#x", cmd); 1938 return (cmd_buf); 1939 } 1940 1941 static const char * 1942 malo_cmd_string_result(uint16_t result) 1943 { 1944 int i; 1945 static const struct { 1946 uint16_t result_code; 1947 const char *result_string; 1948 } results[] = { 1949 { MALO_CMD_RESULT_OK, "OK" }, 1950 { MALO_CMD_RESULT_ERROR, "general error" }, 1951 { MALO_CMD_RESULT_NOSUPPORT, "not supported" }, 1952 { MALO_CMD_RESULT_PENDING, "pending" }, 1953 { MALO_CMD_RESULT_BUSY, "ignored" }, 1954 { MALO_CMD_RESULT_PARTIALDATA, "incomplete" }, 1955 }; 1956 1957 for (i = 0; i < sizeof(results) / sizeof(results[0]); i++) 1958 if (le16toh(result) == results[i].result_code) 1959 return (results[i].result_string); 1960 1961 return ("unknown"); 1962 } 1963 1964 static int 1965 malo_cmd_get_spec(struct malo_softc *sc) 1966 { 1967 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 1968 struct malo_hw_spec *spec; 1969 1970 hdr->cmd = htole16(MALO_CMD_GET_HW_SPEC); 1971 hdr->size = htole16(sizeof(*hdr) + sizeof(*spec)); 1972 hdr->seqnum = htole16(42); /* the one and only */ 1973 hdr->result = 0; 1974 spec = (struct malo_hw_spec *)(hdr + 1); 1975 1976 memset(spec, 0, sizeof(*spec)); 1977 memset(spec->PermanentAddress, 0xff, ETHER_ADDR_LEN); 1978 spec->CookiePtr = htole32(sc->sc_cookie_dmaaddr); 1979 1980 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1981 BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD); 1982 1983 if (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr) != 0) 1984 return (ETIMEDOUT); 1985 1986 /* get the data from the buffer */ 1987 DPRINTF(1, "%s: get_hw_spec: V%x R%x, #WCB %d, #Mcast %d, Regcode %d, " 1988 "#Ant %d\n", device_xname(sc->sc_dev), htole16(spec->HwVersion), 1989 htole32(spec->FWReleaseNumber), htole16(spec->NumOfWCB), 1990 htole16(spec->NumOfMCastAdr), htole16(spec->RegionCode), 1991 htole16(spec->NumberOfAntenna)); 1992 1993 /* tell the DMA engine where our rings are */ 1994 malo_mem_write4(sc, le32toh(spec->RxPdRdPtr) & 0xffff, 1995 sc->sc_rxring.physaddr); 1996 malo_mem_write4(sc, le32toh(spec->RxPdWrPtr) & 0xffff, 1997 sc->sc_rxring.physaddr); 1998 malo_mem_write4(sc, le32toh(spec->WcbBase0) & 0xffff, 1999 sc->sc_txring.physaddr); 2000 2001 /* save DMA RX pointers for later use */ 2002 sc->sc_RxPdRdPtr = le32toh(spec->RxPdRdPtr) & 0xffff; 2003 sc->sc_RxPdWrPtr = le32toh(spec->RxPdWrPtr) & 0xffff; 2004 2005 return (0); 2006 } 2007 2008 static int 2009 malo_cmd_set_prescan(struct malo_softc *sc) 2010 { 2011 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2012 2013 hdr->cmd = htole16(MALO_CMD_SET_PRESCAN); 2014 hdr->size = htole16(sizeof(*hdr)); 2015 hdr->seqnum = 1; 2016 hdr->result = 0; 2017 2018 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2019 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2020 2021 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2022 } 2023 2024 static int 2025 malo_cmd_set_postscan(struct malo_softc *sc, uint8_t *macaddr, uint8_t ibsson) 2026 { 2027 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2028 struct malo_cmd_postscan *body; 2029 2030 hdr->cmd = htole16(MALO_CMD_SET_POSTSCAN); 2031 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2032 hdr->seqnum = 1; 2033 hdr->result = 0; 2034 body = (struct malo_cmd_postscan *)(hdr + 1); 2035 2036 memset(body, 0, sizeof(*body)); 2037 memcpy(&body->bssid, macaddr, ETHER_ADDR_LEN); 2038 body->isibss = htole32(ibsson); 2039 2040 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2041 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2042 2043 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2044 } 2045 2046 static int 2047 malo_cmd_set_channel(struct malo_softc *sc, struct ieee80211_channel* chan) 2048 { 2049 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2050 struct ieee80211com *ic = &sc->sc_ic; 2051 struct malo_cmd_channel *body; 2052 uint8_t channel; 2053 2054 channel = ieee80211_chan2ieee(ic, chan); 2055 2056 hdr->cmd = htole16(MALO_CMD_SET_CHANNEL); 2057 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2058 hdr->seqnum = 1; 2059 hdr->result = 0; 2060 body = (struct malo_cmd_channel *)(hdr + 1); 2061 2062 memset(body, 0, sizeof(*body)); 2063 body->action = htole16(1); 2064 body->channel = channel; 2065 2066 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2067 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2068 2069 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2070 } 2071 2072 static int 2073 malo_cmd_set_antenna(struct malo_softc *sc, uint16_t antenna) 2074 { 2075 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2076 struct malo_cmd_antenna *body; 2077 2078 hdr->cmd = htole16(MALO_CMD_SET_ANTENNA); 2079 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2080 hdr->seqnum = 1; 2081 hdr->result = 0; 2082 body = (struct malo_cmd_antenna *)(hdr + 1); 2083 2084 memset(body, 0, sizeof(*body)); 2085 body->action = htole16(antenna); 2086 if (antenna == 1) 2087 body->mode = htole16(0xffff); 2088 else 2089 body->mode = htole16(2); 2090 2091 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2092 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2093 2094 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2095 } 2096 2097 static int 2098 malo_cmd_set_radio(struct malo_softc *sc, uint16_t enable, 2099 uint16_t preamble_mode) 2100 { 2101 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2102 struct malo_cmd_radio *body; 2103 2104 hdr->cmd = htole16(MALO_CMD_SET_RADIO); 2105 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2106 hdr->seqnum = 1; 2107 hdr->result = 0; 2108 body = (struct malo_cmd_radio *)(hdr + 1); 2109 2110 memset(body, 0, sizeof(*body)); 2111 body->action = htole16(1); 2112 body->preamble_mode = htole16(preamble_mode); 2113 body->enable = htole16(enable); 2114 2115 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2116 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2117 2118 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2119 } 2120 2121 static int 2122 malo_cmd_set_aid(struct malo_softc *sc, uint8_t *bssid, uint16_t associd) 2123 { 2124 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2125 struct malo_cmd_aid *body; 2126 2127 hdr->cmd = htole16(MALO_CMD_SET_AID); 2128 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2129 hdr->seqnum = 1; 2130 hdr->result = 0; 2131 body = (struct malo_cmd_aid *)(hdr + 1); 2132 2133 memset(body, 0, sizeof(*body)); 2134 body->associd = htole16(associd); 2135 memcpy(&body->macaddr[0], bssid, IEEE80211_ADDR_LEN); 2136 2137 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2138 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2139 2140 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2141 } 2142 2143 static int 2144 malo_cmd_set_txpower(struct malo_softc *sc, unsigned int powerlevel) 2145 { 2146 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2147 struct malo_cmd_txpower *body; 2148 2149 hdr->cmd = htole16(MALO_CMD_SET_TXPOWER); 2150 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2151 hdr->seqnum = 1; 2152 hdr->result = 0; 2153 body = (struct malo_cmd_txpower *)(hdr + 1); 2154 2155 memset(body, 0, sizeof(*body)); 2156 body->action = htole16(1); 2157 if (powerlevel < 30) 2158 body->supportpowerlvl = htole16(5); /* LOW */ 2159 else if (powerlevel < 60) 2160 body->supportpowerlvl = htole16(10); /* MEDIUM */ 2161 else 2162 body->supportpowerlvl = htole16(15); /* HIGH */ 2163 2164 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2165 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2166 2167 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2168 } 2169 2170 static int 2171 malo_cmd_set_rts(struct malo_softc *sc, uint32_t threshold) 2172 { 2173 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2174 struct malo_cmd_rts *body; 2175 2176 hdr->cmd = htole16(MALO_CMD_SET_RTS); 2177 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2178 hdr->seqnum = 1; 2179 hdr->result = 0; 2180 body = (struct malo_cmd_rts *)(hdr + 1); 2181 2182 memset(body, 0, sizeof(*body)); 2183 body->action = htole16(1); 2184 body->threshold = htole32(threshold); 2185 2186 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2187 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2188 2189 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2190 } 2191 2192 static int 2193 malo_cmd_set_slot(struct malo_softc *sc, uint8_t slot) 2194 { 2195 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2196 struct malo_cmd_slot *body; 2197 2198 hdr->cmd = htole16(MALO_CMD_SET_SLOT); 2199 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2200 hdr->seqnum = 1; 2201 hdr->result = 0; 2202 body = (struct malo_cmd_slot *)(hdr + 1); 2203 2204 memset(body, 0, sizeof(*body)); 2205 body->action = htole16(1); 2206 body->slot = slot; 2207 2208 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2209 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2210 2211 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2212 } 2213 2214 static int 2215 malo_cmd_set_rate(struct malo_softc *sc, uint8_t rate) 2216 { 2217 struct ieee80211com *ic = &sc->sc_ic; 2218 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2219 struct malo_cmd_rate *body; 2220 int i; 2221 2222 hdr->cmd = htole16(MALO_CMD_SET_RATE); 2223 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2224 hdr->seqnum = 1; 2225 hdr->result = 0; 2226 body = (struct malo_cmd_rate *)(hdr + 1); 2227 2228 memset(body, 0,sizeof(*body)); 2229 2230 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2231 /* TODO */ 2232 } else 2233 { 2234 body->aprates[0] = 2; 2235 body->aprates[1] = 4; 2236 body->aprates[2] = 11; 2237 body->aprates[3] = 22; 2238 if (ic->ic_curmode == IEEE80211_MODE_11G) { 2239 body->aprates[4] = 0; 2240 body->aprates[5] = 12; 2241 body->aprates[6] = 18; 2242 body->aprates[7] = 24; 2243 body->aprates[8] = 36; 2244 body->aprates[9] = 48; 2245 body->aprates[10] = 72; 2246 body->aprates[11] = 96; 2247 body->aprates[12] = 108; 2248 } 2249 } 2250 2251 if (rate != 0) { 2252 /* fixed rate */ 2253 for (i = 0; i < 13; i++) { 2254 if (body->aprates[i] == rate) { 2255 body->rateindex = i; 2256 body->dataratetype = 1; 2257 break; 2258 } 2259 } 2260 } 2261 2262 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2263 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2264 2265 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2266 } 2267 2268 static void 2269 malo_cmd_response(struct malo_softc *sc) 2270 { 2271 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2272 2273 if (le16toh(hdr->result) != MALO_CMD_RESULT_OK) { 2274 aprint_error_dev(sc->sc_dev, "firmware cmd %s failed with %s\n", 2275 malo_cmd_string(hdr->cmd), 2276 malo_cmd_string_result(hdr->result)); 2277 } 2278 2279 #ifdef MALO_DEBUG 2280 aprint_error_dev(sc->sc_dev, "cmd answer for %s=%s\n", 2281 malo_cmd_string(hdr->cmd), 2282 malo_cmd_string_result(hdr->result)); 2283 2284 if (malo_d > 2) 2285 malo_hexdump(hdr, le16toh(hdr->size)); 2286 #endif 2287 } 2288
Indexes created Tue Sep 23 21:09:50 GMT 2025