malo.c revision 1.8.4.1
1 /* $NetBSD: malo.c,v 1.8.4.1 2017/04/21 16:53:46 bouyer Exp $ */ 2 /* $OpenBSD: malo.c,v 1.92 2010/08/27 17:08:00 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Claudio Jeker <claudio (at) openbsd.org> 6 * Copyright (c) 2006 Marcus Glocker <mglocker (at) openbsd.org> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 #include <sys/cdefs.h> 22 __KERNEL_RCSID(0, "$NetBSD: malo.c,v 1.8.4.1 2017/04/21 16:53:46 bouyer Exp $"); 23 24 #include <sys/param.h> 25 #include <sys/types.h> 26 27 #include <sys/device.h> 28 #include <sys/kernel.h> 29 #include <sys/malloc.h> 30 #include <sys/mbuf.h> 31 #include <sys/proc.h> 32 #include <sys/socket.h> 33 #include <sys/sockio.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 37 #include <machine/endian.h> 38 #include <machine/intr.h> 39 40 #include <net/if.h> 41 #include <net/if_media.h> 42 #include <net/if_ether.h> 43 44 #include <net/bpf.h> 45 46 #include <netinet/in.h> 47 #include <netinet/in_systm.h> 48 49 #include <net80211/ieee80211_var.h> 50 #include <net80211/ieee80211_radiotap.h> 51 52 #include <dev/firmload.h> 53 54 #include <dev/ic/malovar.h> 55 #include <dev/ic/maloreg.h> 56 57 #ifdef MALO_DEBUG 58 int malo_d = 2; 59 #define DPRINTF(l, x...) do { if ((l) <= malo_d) printf(x); } while (0) 60 #else 61 #define DPRINTF(l, x...) 62 #endif 63 64 /* internal structures and defines */ 65 struct malo_node { 66 struct ieee80211_node ni; 67 }; 68 69 struct malo_rx_data { 70 bus_dmamap_t map; 71 struct mbuf *m; 72 }; 73 74 struct malo_tx_data { 75 bus_dmamap_t map; 76 struct mbuf *m; 77 uint32_t softstat; 78 struct ieee80211_node *ni; 79 }; 80 81 /* RX descriptor used by HW */ 82 struct malo_rx_desc { 83 uint8_t rxctrl; 84 uint8_t rssi; 85 uint8_t status; 86 uint8_t channel; 87 uint16_t len; 88 uint8_t reserved1; /* actually unused */ 89 uint8_t datarate; 90 uint32_t physdata; /* DMA address of data */ 91 uint32_t physnext; /* DMA address of next control block */ 92 uint16_t qosctrl; 93 uint16_t reserved2; 94 } __packed; 95 96 /* TX descriptor used by HW */ 97 struct malo_tx_desc { 98 uint32_t status; 99 #define MALO_TXD_STATUS_IDLE 0x00000000 100 #define MALO_TXD_STATUS_USED 0x00000001 101 #define MALO_TXD_STATUS_OK 0x00000001 102 #define MALO_TXD_STATUS_OK_RETRY 0x00000002 103 #define MALO_TXD_STATUS_OK_MORE_RETRY 0x00000004 104 #define MALO_TXD_STATUS_MULTICAST_TX 0x00000008 105 #define MALO_TXD_STATUS_BROADCAST_TX 0x00000010 106 #define MALO_TXD_STATUS_FAILED_LINK_ERROR 0x00000020 107 #define MALO_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040 108 #define MALO_TXD_STATUS_FAILED_XRETRY MALO_TXD_STATUS_FAILED_EXCEED_LIMIT 109 #define MALO_TXD_STATUS_FAILED_AGING 0x00000080 110 #define MALO_TXD_STATUS_FW_OWNED 0x80000000 111 uint8_t datarate; 112 uint8_t txpriority; 113 uint16_t qosctrl; 114 uint32_t physdata; /* DMA address of data */ 115 uint16_t len; 116 uint8_t destaddr[6]; 117 uint32_t physnext; /* DMA address of next control block */ 118 uint32_t reserved1; /* SAP packet info ??? */ 119 uint32_t reserved2; 120 } __packed; 121 122 #define MALO_RX_RING_COUNT 256 123 #define MALO_TX_RING_COUNT 256 124 #define MALO_MAX_SCATTER 8 /* XXX unknown, wild guess */ 125 #define MALO_CMD_TIMEOUT 50 /* MALO_CMD_TIMEOUT * 100us */ 126 127 /* 128 * Firmware commands 129 */ 130 #define MALO_CMD_GET_HW_SPEC 0x0003 131 #define MALO_CMD_SET_RADIO 0x001c 132 #define MALO_CMD_SET_AID 0x010d 133 #define MALO_CMD_SET_TXPOWER 0x001e 134 #define MALO_CMD_SET_ANTENNA 0x0020 135 #define MALO_CMD_SET_PRESCAN 0x0107 136 #define MALO_CMD_SET_POSTSCAN 0x0108 137 #define MALO_CMD_SET_RATE 0x0110 138 #define MALO_CMD_SET_CHANNEL 0x010a 139 #define MALO_CMD_SET_RTS 0x0113 140 #define MALO_CMD_SET_SLOT 0x0114 141 #define MALO_CMD_RESPONSE 0x8000 142 143 #define MALO_CMD_RESULT_OK 0x0000 /* everything is fine */ 144 #define MALO_CMD_RESULT_ERROR 0x0001 /* general error */ 145 #define MALO_CMD_RESULT_NOSUPPORT 0x0002 /* command not valid */ 146 #define MALO_CMD_RESULT_PENDING 0x0003 /* will be processed */ 147 #define MALO_CMD_RESULT_BUSY 0x0004 /* command ignored */ 148 #define MALO_CMD_RESULT_PARTIALDATA 0x0005 /* buffer too small */ 149 150 struct malo_cmdheader { 151 uint16_t cmd; 152 uint16_t size; /* size of the command, incl. header */ 153 uint16_t seqnum; /* seems not to matter that much */ 154 uint16_t result; /* set to 0 on request */ 155 /* following the data payload, up to 256 bytes */ 156 }; 157 158 struct malo_hw_spec { 159 uint16_t HwVersion; 160 uint16_t NumOfWCB; 161 uint16_t NumOfMCastAdr; 162 uint8_t PermanentAddress[6]; 163 uint16_t RegionCode; 164 uint16_t NumberOfAntenna; 165 uint32_t FWReleaseNumber; 166 uint32_t WcbBase0; 167 uint32_t RxPdWrPtr; 168 uint32_t RxPdRdPtr; 169 uint32_t CookiePtr; 170 uint32_t WcbBase1; 171 uint32_t WcbBase2; 172 uint32_t WcbBase3; 173 } __packed; 174 175 struct malo_cmd_radio { 176 uint16_t action; 177 uint16_t preamble_mode; 178 uint16_t enable; 179 } __packed; 180 181 struct malo_cmd_aid { 182 uint16_t associd; 183 uint8_t macaddr[6]; 184 uint32_t gprotection; 185 uint8_t aprates[14]; 186 } __packed; 187 188 struct malo_cmd_txpower { 189 uint16_t action; 190 uint16_t supportpowerlvl; 191 uint16_t currentpowerlvl; 192 uint16_t reserved; 193 uint16_t powerlvllist[8]; 194 } __packed; 195 196 struct malo_cmd_antenna { 197 uint16_t action; 198 uint16_t mode; 199 } __packed; 200 201 struct malo_cmd_postscan { 202 uint32_t isibss; 203 uint8_t bssid[6]; 204 } __packed; 205 206 struct malo_cmd_channel { 207 uint16_t action; 208 uint8_t channel; 209 } __packed; 210 211 struct malo_cmd_rate { 212 uint8_t dataratetype; 213 uint8_t rateindex; 214 uint8_t aprates[14]; 215 } __packed; 216 217 struct malo_cmd_rts { 218 uint16_t action; 219 uint32_t threshold; 220 } __packed; 221 222 struct malo_cmd_slot { 223 uint16_t action; 224 uint8_t slot; 225 } __packed; 226 227 #define malo_mem_write4(sc, off, x) \ 228 bus_space_write_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x)) 229 #define malo_mem_write2(sc, off, x) \ 230 bus_space_write_2((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x)) 231 #define malo_mem_write1(sc, off, x) \ 232 bus_space_write_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x)) 233 234 #define malo_mem_read4(sc, off) \ 235 bus_space_read_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off)) 236 #define malo_mem_read1(sc, off) \ 237 bus_space_read_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off)) 238 239 #define malo_ctl_write4(sc, off, x) \ 240 bus_space_write_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off), (x)) 241 #define malo_ctl_read4(sc, off) \ 242 bus_space_read_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off)) 243 #define malo_ctl_read1(sc, off) \ 244 bus_space_read_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off)) 245 246 #define malo_ctl_barrier(sc, t) \ 247 bus_space_barrier((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, 0x0c00, 0xff, (t)) 248 249 static int malo_alloc_cmd(struct malo_softc *sc); 250 static void malo_free_cmd(struct malo_softc *sc); 251 static void malo_send_cmd(struct malo_softc *sc, bus_addr_t addr); 252 static int malo_send_cmd_dma(struct malo_softc *sc, bus_addr_t addr); 253 static int malo_alloc_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring, 254 int count); 255 static void malo_reset_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring); 256 static void malo_free_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring); 257 static int malo_alloc_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring, 258 int count); 259 static void malo_reset_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring); 260 static void malo_free_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring); 261 static int malo_ioctl(struct ifnet *ifp, u_long cmd, void* data); 262 static void malo_start(struct ifnet *ifp); 263 static void malo_watchdog(struct ifnet *ifp); 264 static int malo_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 265 int arg); 266 static void malo_newassoc(struct ieee80211_node *ni, int isnew); 267 static struct ieee80211_node * 268 malo_node_alloc(struct ieee80211_node_table *nt); 269 static int malo_media_change(struct ifnet *ifp); 270 static void malo_media_status(struct ifnet *ifp, struct ifmediareq *imr); 271 static int malo_chip2rate(int chip_rate); 272 static int malo_fix2rate(int fix_rate); 273 static void malo_next_scan(void *arg); 274 static void malo_tx_intr(struct malo_softc *sc); 275 static int malo_tx_data(struct malo_softc *sc, struct mbuf *m0, 276 struct ieee80211_node *ni); 277 static void malo_tx_setup_desc(struct malo_softc *sc, struct malo_tx_desc *desc, 278 int len, int rate, const bus_dma_segment_t *segs, int nsegs); 279 static void malo_rx_intr(struct malo_softc *sc); 280 static int malo_load_bootimg(struct malo_softc *sc); 281 static int malo_load_firmware(struct malo_softc *sc); 282 283 static int malo_set_slot(struct malo_softc *sc); 284 static void malo_update_slot(struct ifnet* ifp); 285 #ifdef MALO_DEBUG 286 static void malo_hexdump(void *buf, int len); 287 #endif 288 static const char *malo_cmd_string(uint16_t cmd); 289 static const char *malo_cmd_string_result(uint16_t result); 290 static int malo_cmd_get_spec(struct malo_softc *sc); 291 static int malo_cmd_set_prescan(struct malo_softc *sc); 292 static int malo_cmd_set_postscan(struct malo_softc *sc, uint8_t *macaddr, 293 uint8_t ibsson); 294 static int malo_cmd_set_channel(struct malo_softc *sc, struct ieee80211_channel *chan); 295 static int malo_cmd_set_antenna(struct malo_softc *sc, uint16_t antenna_type); 296 static int malo_cmd_set_radio(struct malo_softc *sc, uint16_t mode, 297 uint16_t preamble); 298 static int malo_cmd_set_aid(struct malo_softc *sc, uint8_t *bssid, 299 uint16_t associd); 300 static int malo_cmd_set_txpower(struct malo_softc *sc, unsigned int powerlevel); 301 static int malo_cmd_set_rts(struct malo_softc *sc, uint32_t threshold); 302 static int malo_cmd_set_slot(struct malo_softc *sc, uint8_t slot); 303 static int malo_cmd_set_rate(struct malo_softc *sc, uint8_t rate); 304 static void malo_cmd_response(struct malo_softc *sc); 305 306 int 307 malo_intr(void *arg) 308 { 309 struct malo_softc *sc = arg; 310 uint32_t status; 311 312 status = malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 313 if (status == 0xffffffff || status == 0) 314 /* not for us */ 315 return (0); 316 317 /* disable interrupts */ 318 malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 319 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_CAUSE, 0); 320 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0); 321 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0); 322 323 softint_schedule(sc->sc_soft_ih); 324 return (1); 325 } 326 327 void 328 malo_softintr(void *arg) 329 { 330 struct malo_softc *sc = arg; 331 uint32_t status; 332 333 status = malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 334 if (status == 0xffffffff || status == 0) 335 goto out; /* not for us */ 336 337 if (status & MALO_A2HRIC_BIT_TX_DONE) 338 malo_tx_intr(sc); 339 if (status & MALO_A2HRIC_BIT_RX_RDY) 340 malo_rx_intr(sc); 341 if (status & MALO_A2HRIC_BIT_OPC_DONE) { 342 /* XXX cmd done interrupt handling doesn't work yet */ 343 DPRINTF(1, "%s: got cmd done interrupt\n", 344 device_xname(sc->sc_dev)); 345 //malo_cmd_response(sc); 346 } 347 348 if (status & ~0x7) { 349 DPRINTF(1, "%s: unknown interrupt %x\n", 350 device_xname(sc->sc_dev), status); 351 } 352 353 /* just ack the interrupt */ 354 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_CAUSE, 0); 355 356 out: 357 /* enable interrupts */ 358 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0x1f); 359 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 360 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0x1f); 361 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 362 } 363 364 int 365 malo_attach(struct malo_softc *sc) 366 { 367 struct ieee80211com *ic = &sc->sc_ic; 368 struct ifnet *ifp = &sc->sc_if; 369 int i; 370 371 /* initialize channel scanning timer */ 372 callout_init(&sc->sc_scan_to, 0); 373 callout_setfunc(&sc->sc_scan_to, malo_next_scan, sc); 374 375 /* allocate DMA structures */ 376 malo_alloc_cmd(sc); 377 malo_alloc_rx_ring(sc, &sc->sc_rxring, MALO_RX_RING_COUNT); 378 malo_alloc_tx_ring(sc, &sc->sc_txring, MALO_TX_RING_COUNT); 379 380 /* setup interface */ 381 ifp->if_softc = sc; 382 ifp->if_init = malo_init; 383 ifp->if_stop = malo_stop; 384 ifp->if_ioctl = malo_ioctl; 385 ifp->if_start = malo_start; 386 ifp->if_watchdog = malo_watchdog; 387 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 388 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 389 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 390 IFQ_SET_READY(&ifp->if_snd); 391 392 /* set supported rates */ 393 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 394 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 395 sc->sc_last_txrate = -1; 396 397 /* set channels */ 398 for (i = 1; i <= 14; i++) { 399 ic->ic_channels[i].ic_freq = 400 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 401 ic->ic_channels[i].ic_flags = 402 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 403 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 404 } 405 406 /* OpenBSD supports IEEE80211_C_RSN too */ 407 /* set the rest */ 408 ic->ic_ifp = ifp; 409 ic->ic_caps = 410 IEEE80211_C_IBSS | 411 IEEE80211_C_MONITOR | 412 IEEE80211_C_SHPREAMBLE | 413 IEEE80211_C_SHSLOT | 414 IEEE80211_C_WEP | 415 IEEE80211_C_WPA; 416 ic->ic_opmode = IEEE80211_M_STA; 417 ic->ic_state = IEEE80211_S_INIT; 418 for (i = 0; i < 6; i++) 419 ic->ic_myaddr[i] = malo_ctl_read1(sc, 0xa528 + i); 420 421 /* show our mac address */ 422 aprint_normal(", address %s\n", ether_sprintf(ic->ic_myaddr)); 423 424 /* attach interface */ 425 if_initialize(ifp); 426 ieee80211_ifattach(ic); 427 /* Use common softint-based if_input */ 428 ifp->if_percpuq = if_percpuq_create(ifp); 429 if_register(ifp); 430 431 /* post attach vector functions */ 432 sc->sc_newstate = ic->ic_newstate; 433 ic->ic_newstate = malo_newstate; 434 ic->ic_newassoc = malo_newassoc; 435 ic->ic_node_alloc = malo_node_alloc; 436 ic->ic_updateslot = malo_update_slot; 437 438 ieee80211_media_init(ic, malo_media_change, malo_media_status); 439 440 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 441 sizeof(struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN, 442 &sc->sc_drvbpf); 443 444 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 445 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 446 sc->sc_rxtap.wr_ihdr.it_present = htole32(MALO_RX_RADIOTAP_PRESENT); 447 448 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 449 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 450 sc->sc_txtap.wt_ihdr.it_present = htole32(MALO_TX_RADIOTAP_PRESENT); 451 452 ieee80211_announce(ic); 453 454 return (0); 455 } 456 457 int 458 malo_detach(void *arg) 459 { 460 struct malo_softc *sc = arg; 461 struct ieee80211com *ic = &sc->sc_ic; 462 struct ifnet *ifp = &sc->sc_if; 463 464 /* remove channel scanning timer */ 465 callout_stop(&sc->sc_scan_to); 466 467 malo_stop(ifp, 1); 468 ieee80211_ifdetach(ic); 469 if_detach(ifp); 470 malo_free_cmd(sc); 471 malo_free_rx_ring(sc, &sc->sc_rxring); 472 malo_free_tx_ring(sc, &sc->sc_txring); 473 474 return (0); 475 } 476 477 static int 478 malo_alloc_cmd(struct malo_softc *sc) 479 { 480 int error, nsegs; 481 482 error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, 483 PAGE_SIZE, 0, BUS_DMA_ALLOCNOW, &sc->sc_cmd_dmam); 484 if (error != 0) { 485 aprint_error_dev(sc->sc_dev, "can not create DMA tag\n"); 486 return (-1); 487 } 488 489 error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, PAGE_SIZE, 490 0, &sc->sc_cmd_dmas, 1, &nsegs, BUS_DMA_WAITOK); 491 if (error != 0) { 492 aprint_error_dev(sc->sc_dev, "error alloc dma memory\n"); 493 return (-1); 494 } 495 496 error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cmd_dmas, nsegs, 497 PAGE_SIZE, (void **)&sc->sc_cmd_mem, BUS_DMA_WAITOK); 498 if (error != 0) { 499 aprint_error_dev(sc->sc_dev, "error map dma memory\n"); 500 return (-1); 501 } 502 503 error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmd_dmam, 504 sc->sc_cmd_mem, PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 505 if (error != 0) { 506 aprint_error_dev(sc->sc_dev, "error load dma memory\n"); 507 bus_dmamem_free(sc->sc_dmat, &sc->sc_cmd_dmas, nsegs); 508 return (-1); 509 } 510 511 sc->sc_cookie = sc->sc_cmd_mem; 512 *sc->sc_cookie = htole32(0xaa55aa55); 513 sc->sc_cmd_mem = ((char*)sc->sc_cmd_mem) + sizeof(uint32_t); 514 sc->sc_cookie_dmaaddr = sc->sc_cmd_dmam->dm_segs[0].ds_addr; 515 sc->sc_cmd_dmaaddr = sc->sc_cmd_dmam->dm_segs[0].ds_addr + 516 sizeof(uint32_t); 517 518 return (0); 519 } 520 521 static void 522 malo_free_cmd(struct malo_softc *sc) 523 { 524 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 525 BUS_DMASYNC_POSTWRITE); 526 bus_dmamap_unload(sc->sc_dmat, sc->sc_cmd_dmam); 527 bus_dmamem_unmap(sc->sc_dmat, sc->sc_cookie, PAGE_SIZE); 528 bus_dmamem_free(sc->sc_dmat, &sc->sc_cmd_dmas, 1); 529 } 530 531 static void 532 malo_send_cmd(struct malo_softc *sc, bus_addr_t addr) 533 { 534 malo_ctl_write4(sc, MALO_REG_GEN_PTR, (uint32_t)addr); 535 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 536 malo_ctl_write4(sc, MALO_REG_H2A_INTERRUPT_EVENTS, 2); /* CPU_TRANSFER_CMD */ 537 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 538 } 539 540 static int 541 malo_send_cmd_dma(struct malo_softc *sc, bus_addr_t addr) 542 { 543 int i; 544 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 545 546 malo_send_cmd(sc, addr); 547 548 for (i = 0; i < MALO_CMD_TIMEOUT; i++) { 549 delay(100); 550 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 551 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 552 if (hdr->cmd & htole16(0x8000)) 553 break; 554 } 555 if (i == MALO_CMD_TIMEOUT) { 556 aprint_error_dev(sc->sc_dev, "timeout while waiting for cmd response!\n"); 557 return (ETIMEDOUT); 558 } 559 560 malo_cmd_response(sc); 561 562 return (0); 563 } 564 565 static int 566 malo_alloc_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring, int count) 567 { 568 struct malo_rx_desc *desc; 569 struct malo_rx_data *data; 570 int i, nsegs, error; 571 572 ring->count = count; 573 ring->cur = ring->next = 0; 574 575 error = bus_dmamap_create(sc->sc_dmat, 576 count * sizeof(struct malo_rx_desc), 1, 577 count * sizeof(struct malo_rx_desc), 0, 578 BUS_DMA_NOWAIT, &ring->map); 579 if (error != 0) { 580 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 581 goto fail; 582 } 583 584 error = bus_dmamem_alloc(sc->sc_dmat, 585 count * sizeof(struct malo_rx_desc), 586 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 587 588 if (error != 0) { 589 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 590 goto fail; 591 } 592 593 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 594 count * sizeof(struct malo_rx_desc), (void **)&ring->desc, 595 BUS_DMA_NOWAIT); 596 if (error != 0) { 597 aprint_error_dev(sc->sc_dev, "can't map desc DMA memory\n"); 598 goto fail; 599 } 600 601 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 602 count * sizeof(struct malo_rx_desc), NULL, BUS_DMA_NOWAIT); 603 if (error != 0) { 604 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 605 goto fail; 606 } 607 608 ring->physaddr = ring->map->dm_segs->ds_addr; 609 610 ring->data = malloc(count * sizeof (struct malo_rx_data), M_DEVBUF, 611 M_NOWAIT); 612 if (ring->data == NULL) { 613 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 614 error = ENOMEM; 615 goto fail; 616 } 617 618 /* 619 * Pre-allocate Rx buffers and populate Rx ring. 620 */ 621 memset(ring->data, 0, count * sizeof (struct malo_rx_data)); 622 for (i = 0; i < count; i++) { 623 desc = &ring->desc[i]; 624 data = &ring->data[i]; 625 626 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 627 0, BUS_DMA_NOWAIT, &data->map); 628 if (error != 0) { 629 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 630 goto fail; 631 } 632 633 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 634 if (data->m == NULL) { 635 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf\n"); 636 error = ENOMEM; 637 goto fail; 638 } 639 640 MCLGET(data->m, M_DONTWAIT); 641 if (!(data->m->m_flags & M_EXT)) { 642 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf cluster\n"); 643 error = ENOMEM; 644 goto fail; 645 } 646 647 error = bus_dmamap_load(sc->sc_dmat, data->map, 648 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 649 if (error != 0) { 650 aprint_error_dev(sc->sc_dev, "could not load rx buf DMA map"); 651 goto fail; 652 } 653 654 desc->status = 1; 655 desc->physdata = htole32(data->map->dm_segs->ds_addr); 656 desc->physnext = htole32(ring->physaddr + 657 (i + 1) % count * sizeof(struct malo_rx_desc)); 658 } 659 660 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 661 BUS_DMASYNC_PREWRITE); 662 663 return (0); 664 665 fail: malo_free_rx_ring(sc, ring); 666 return (error); 667 } 668 669 static void 670 malo_reset_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring) 671 { 672 int i; 673 674 for (i = 0; i < ring->count; i++) 675 ring->desc[i].status = 0; 676 677 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 678 BUS_DMASYNC_PREWRITE); 679 680 ring->cur = ring->next = 0; 681 } 682 683 static void 684 malo_free_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring) 685 { 686 struct malo_rx_data *data; 687 int i; 688 689 if (ring->desc != NULL) { 690 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 691 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 692 bus_dmamap_unload(sc->sc_dmat, ring->map); 693 bus_dmamem_unmap(sc->sc_dmat, ring->desc, 694 ring->count * sizeof(struct malo_rx_desc)); 695 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 696 } 697 698 if (ring->data != NULL) { 699 for (i = 0; i < ring->count; i++) { 700 data = &ring->data[i]; 701 702 if (data->m != NULL) { 703 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 704 data->map->dm_mapsize, 705 BUS_DMASYNC_POSTREAD); 706 bus_dmamap_unload(sc->sc_dmat, data->map); 707 m_freem(data->m); 708 } 709 710 if (data->map != NULL) 711 bus_dmamap_destroy(sc->sc_dmat, data->map); 712 } 713 free(ring->data, M_DEVBUF); 714 } 715 } 716 717 static int 718 malo_alloc_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring, 719 int count) 720 { 721 int i, nsegs, error; 722 723 ring->count = count; 724 ring->queued = 0; 725 ring->cur = ring->next = ring->stat = 0; 726 727 error = bus_dmamap_create(sc->sc_dmat, 728 count * sizeof(struct malo_tx_desc), 1, 729 count * sizeof(struct malo_tx_desc), 0, BUS_DMA_NOWAIT, &ring->map); 730 if (error != 0) { 731 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 732 goto fail; 733 } 734 735 error = bus_dmamem_alloc(sc->sc_dmat, 736 count * sizeof(struct malo_tx_desc), PAGE_SIZE, 0, 737 &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 738 if (error != 0) { 739 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 740 goto fail; 741 } 742 743 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 744 count * sizeof(struct malo_tx_desc), (void **)&ring->desc, 745 BUS_DMA_NOWAIT); 746 if (error != 0) { 747 aprint_error_dev(sc->sc_dev, "can't map desc DMA memory\n"); 748 goto fail; 749 } 750 751 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 752 count * sizeof(struct malo_tx_desc), NULL, BUS_DMA_NOWAIT); 753 if (error != 0) { 754 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 755 goto fail; 756 } 757 758 ring->physaddr = ring->map->dm_segs->ds_addr; 759 760 ring->data = malloc(count * sizeof(struct malo_tx_data), M_DEVBUF, 761 M_NOWAIT); 762 if (ring->data == NULL) { 763 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 764 error = ENOMEM; 765 goto fail; 766 } 767 768 memset(ring->data, 0, count * sizeof(struct malo_tx_data)); 769 for (i = 0; i < count; i++) { 770 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 771 MALO_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 772 &ring->data[i].map); 773 if (error != 0) { 774 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 775 goto fail; 776 } 777 ring->desc[i].physnext = htole32(ring->physaddr + 778 (i + 1) % count * sizeof(struct malo_tx_desc)); 779 } 780 781 return (0); 782 783 fail: malo_free_tx_ring(sc, ring); 784 return (error); 785 } 786 787 static void 788 malo_reset_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring) 789 { 790 struct malo_tx_desc *desc; 791 struct malo_tx_data *data; 792 int i; 793 794 for (i = 0; i < ring->count; i++) { 795 desc = &ring->desc[i]; 796 data = &ring->data[i]; 797 798 if (data->m != NULL) { 799 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 800 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 801 bus_dmamap_unload(sc->sc_dmat, data->map); 802 m_freem(data->m); 803 data->m = NULL; 804 } 805 806 /* 807 * The node has already been freed at that point so don't call 808 * ieee80211_release_node() here. 809 */ 810 data->ni = NULL; 811 812 desc->status = 0; 813 } 814 815 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 816 BUS_DMASYNC_PREWRITE); 817 818 ring->queued = 0; 819 ring->cur = ring->next = ring->stat = 0; 820 } 821 822 static void 823 malo_free_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring) 824 { 825 struct malo_tx_data *data; 826 int i; 827 828 if (ring->desc != NULL) { 829 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 830 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 831 bus_dmamap_unload(sc->sc_dmat, ring->map); 832 bus_dmamem_unmap(sc->sc_dmat, ring->desc, 833 ring->count * sizeof(struct malo_tx_desc)); 834 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 835 } 836 837 if (ring->data != NULL) { 838 for (i = 0; i < ring->count; i++) { 839 data = &ring->data[i]; 840 841 if (data->m != NULL) { 842 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 843 data->map->dm_mapsize, 844 BUS_DMASYNC_POSTWRITE); 845 bus_dmamap_unload(sc->sc_dmat, data->map); 846 m_freem(data->m); 847 } 848 849 /* 850 * The node has already been freed at that point so 851 * don't call ieee80211_release_node() here. 852 */ 853 data->ni = NULL; 854 855 if (data->map != NULL) 856 bus_dmamap_destroy(sc->sc_dmat, data->map); 857 } 858 free(ring->data, M_DEVBUF); 859 } 860 } 861 862 int 863 malo_init(struct ifnet *ifp) 864 { 865 struct malo_softc *sc = ifp->if_softc; 866 struct ieee80211com *ic = &sc->sc_ic; 867 int error; 868 869 DPRINTF(1, "%s: %s\n", ifp->if_xname, __func__); 870 871 /* if interface already runs stop it first */ 872 if (ifp->if_flags & IFF_RUNNING) 873 malo_stop(ifp, 1); 874 875 /* power on cardbus socket */ 876 if (sc->sc_enable) 877 sc->sc_enable(sc); 878 879 /* disable interrupts */ 880 malo_ctl_read4(sc, MALO_REG_A2H_INTERRUPT_CAUSE); 881 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_CAUSE, 0); 882 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0); 883 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0); 884 885 /* load firmware */ 886 if ((error = malo_load_bootimg(sc))) 887 goto fail; 888 if ((error = malo_load_firmware(sc))) 889 goto fail; 890 891 /* enable interrupts */ 892 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_MASK, 0x1f); 893 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 894 malo_ctl_write4(sc, MALO_REG_A2H_INTERRUPT_STATUS_MASK, 0x1f); 895 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 896 897 if ((error = malo_cmd_get_spec(sc))) 898 goto fail; 899 900 /* select default channel */ 901 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 902 903 /* initialize hardware */ 904 if ((error = malo_cmd_set_channel(sc, ic->ic_bss->ni_chan))) { 905 aprint_error_dev(sc->sc_dev, "setting channel failed!\n"); 906 goto fail; 907 } 908 if ((error = malo_cmd_set_antenna(sc, 1))) { 909 aprint_error_dev(sc->sc_dev, "setting RX antenna failed!\n"); 910 goto fail; 911 } 912 if ((error = malo_cmd_set_antenna(sc, 2))) { 913 aprint_error_dev(sc->sc_dev, "setting TX antenna failed!\n"); 914 goto fail; 915 } 916 if ((error = malo_cmd_set_radio(sc, 1, 5))) { 917 aprint_error_dev(sc->sc_dev, "turn radio on failed!\n"); 918 goto fail; 919 } 920 if ((error = malo_cmd_set_txpower(sc, 100))) { 921 aprint_error_dev(sc->sc_dev, "setting TX power failed!\n"); 922 goto fail; 923 } 924 if ((error = malo_cmd_set_rts(sc, IEEE80211_RTS_MAX))) { 925 aprint_error_dev(sc->sc_dev, "setting RTS failed!\n"); 926 goto fail; 927 } 928 929 ifp->if_flags |= IFF_RUNNING; 930 931 if (ic->ic_opmode != IEEE80211_M_MONITOR) 932 /* start background scanning */ 933 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 934 else 935 /* in monitor mode change directly into run state */ 936 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 937 938 return (0); 939 940 fail: 941 /* reset adapter */ 942 DPRINTF(1, "%s: malo_init failed, resetting card\n", 943 device_xname(sc->sc_dev)); 944 malo_stop(ifp, 1); 945 return (error); 946 } 947 948 static int 949 malo_ioctl(struct ifnet *ifp, u_long cmd, void* data) 950 { 951 struct malo_softc *sc = ifp->if_softc; 952 struct ieee80211com *ic = &sc->sc_ic; 953 int s, error = 0; 954 955 s = splnet(); 956 957 switch (cmd) { 958 case SIOCSIFFLAGS: 959 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 960 break; 961 if (ifp->if_flags & IFF_UP) { 962 if ((ifp->if_flags & IFF_RUNNING) == 0) 963 malo_init(ifp); 964 } else { 965 if (ifp->if_flags & IFF_RUNNING) 966 malo_stop(ifp, 1); 967 } 968 break; 969 case SIOCADDMULTI: 970 case SIOCDELMULTI: 971 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 972 /* setup multicast filter, etc */ 973 error = 0; 974 } 975 break; 976 case SIOCS80211CHANNEL: 977 /* allow fast channel switching in monitor mode */ 978 error = ieee80211_ioctl(ic, cmd, data); 979 if (error == ENETRESET && 980 ic->ic_opmode == IEEE80211_M_MONITOR) { 981 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 982 (IFF_UP | IFF_RUNNING)) { 983 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 984 malo_cmd_set_channel(sc, ic->ic_bss->ni_chan); 985 } 986 error = 0; 987 } 988 break; 989 default: 990 error = ieee80211_ioctl(ic, cmd, data); 991 break; 992 } 993 994 if (error == ENETRESET) { 995 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 996 (IFF_UP | IFF_RUNNING)) 997 malo_init(ifp); 998 error = 0; 999 } 1000 1001 splx(s); 1002 1003 return (error); 1004 } 1005 1006 static void 1007 malo_start(struct ifnet *ifp) 1008 { 1009 struct malo_softc *sc = ifp->if_softc; 1010 struct ieee80211com *ic = &sc->sc_ic; 1011 struct mbuf *m0; 1012 struct ether_header *eh; 1013 struct ieee80211_node *ni = NULL; 1014 1015 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1016 1017 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1018 return; 1019 1020 for (;;) { 1021 IF_POLL(&ic->ic_mgtq, m0); 1022 if (m0 != NULL) { 1023 if (sc->sc_txring.queued >= MALO_TX_RING_COUNT) { 1024 ifp->if_flags |= IFF_OACTIVE; 1025 break; 1026 } 1027 IF_DEQUEUE(&ic->ic_mgtq, m0); 1028 1029 ni = M_GETCTX(m0, struct ieee80211_node *); 1030 M_CLEARCTX(m0); 1031 1032 bpf_mtap3(ic->ic_rawbpf, m0); 1033 1034 if (malo_tx_data(sc, m0, ni) != 0) 1035 break; 1036 } else { 1037 if (ic->ic_state != IEEE80211_S_RUN) 1038 break; 1039 IFQ_POLL(&ifp->if_snd, m0); 1040 if (m0 == NULL) 1041 break; 1042 if (sc->sc_txring.queued >= MALO_TX_RING_COUNT - 1) { 1043 ifp->if_flags |= IFF_OACTIVE; 1044 break; 1045 } 1046 1047 if (m0->m_len < sizeof (*eh) && 1048 (m0 = m_pullup(m0, sizeof (*eh))) == NULL) { 1049 ifp->if_oerrors++; 1050 continue; 1051 } 1052 eh = mtod(m0, struct ether_header *); 1053 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1054 if (ni == NULL) { 1055 m_freem(m0); 1056 ifp->if_oerrors++; 1057 continue; 1058 } 1059 1060 // XXX must I call ieee_classify at this point ? 1061 1062 IFQ_DEQUEUE(&ifp->if_snd, m0); 1063 bpf_mtap(ifp, m0); 1064 1065 m0 = ieee80211_encap(ic, m0, ni); 1066 if (m0 == NULL) 1067 continue; 1068 bpf_mtap(ifp, m0); 1069 1070 if (malo_tx_data(sc, m0, ni) != 0) { 1071 ieee80211_free_node(ni); 1072 ifp->if_oerrors++; 1073 break; 1074 } 1075 } 1076 } 1077 } 1078 1079 void 1080 malo_stop(struct ifnet* ifp, int disable) 1081 { 1082 struct malo_softc *sc = ifp->if_softc; 1083 struct ieee80211com *ic = &sc->sc_ic; 1084 1085 DPRINTF(1, "%s: %s\n", ifp->if_xname, __func__); 1086 1087 /* reset adapter */ 1088 if (ifp->if_flags & IFF_RUNNING) 1089 malo_ctl_write4(sc, MALO_REG_H2A_INTERRUPT_EVENTS, (1 << 15)); 1090 1091 /* device is not running anymore */ 1092 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1093 1094 /* change back to initial state */ 1095 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 1096 1097 /* reset RX / TX rings */ 1098 malo_reset_tx_ring(sc, &sc->sc_txring); 1099 malo_reset_rx_ring(sc, &sc->sc_rxring); 1100 1101 /* set initial rate */ 1102 sc->sc_last_txrate = -1; 1103 1104 /* power off cardbus socket */ 1105 if (sc->sc_disable) 1106 sc->sc_disable(sc); 1107 } 1108 1109 static void 1110 malo_watchdog(struct ifnet *ifp) 1111 { 1112 1113 } 1114 1115 static int 1116 malo_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 1117 { 1118 struct ifnet *ifp = ic->ic_ifp; 1119 struct malo_softc *sc = ifp->if_softc; 1120 enum ieee80211_state ostate; 1121 int rate; 1122 1123 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1124 1125 ostate = ic->ic_state; 1126 callout_stop(&sc->sc_scan_to); 1127 1128 switch (nstate) { 1129 case IEEE80211_S_INIT: 1130 DPRINTF(1, "%s: newstate INIT\n", device_xname(sc->sc_dev)); 1131 break; 1132 case IEEE80211_S_SCAN: 1133 DPRINTF(1, "%s: newstate SCAN\n", device_xname(sc->sc_dev)); 1134 if (ostate == IEEE80211_S_INIT) { 1135 if (malo_cmd_set_prescan(sc) != 0) { 1136 DPRINTF(1, "%s: can't set prescan\n", 1137 device_xname(sc->sc_dev)); 1138 } 1139 } else { 1140 malo_cmd_set_channel(sc, ic->ic_curchan); 1141 } 1142 callout_schedule(&sc->sc_scan_to, hz/2); 1143 break; 1144 case IEEE80211_S_AUTH: 1145 DPRINTF(1, "%s: newstate AUTH\n", device_xname(sc->sc_dev)); 1146 malo_cmd_set_postscan(sc, ic->ic_myaddr, 1); 1147 malo_cmd_set_channel(sc, ic->ic_curchan); 1148 break; 1149 case IEEE80211_S_ASSOC: 1150 DPRINTF(1, "%s: newstate ASSOC\n", device_xname(sc->sc_dev)); 1151 malo_cmd_set_channel(sc, ic->ic_curchan); 1152 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1153 malo_cmd_set_radio(sc, 1, 3); /* short preamble */ 1154 else 1155 malo_cmd_set_radio(sc, 1, 1); /* long preamble */ 1156 1157 malo_cmd_set_aid(sc, ic->ic_bss->ni_bssid, 1158 ic->ic_bss->ni_associd); 1159 1160 if (ic->ic_fixed_rate == -1) 1161 /* automatic rate adaption */ 1162 malo_cmd_set_rate(sc, 0); 1163 else { 1164 /* fixed rate */ 1165 rate = malo_fix2rate(ic->ic_fixed_rate); 1166 malo_cmd_set_rate(sc, rate); 1167 } 1168 1169 malo_set_slot(sc); 1170 break; 1171 case IEEE80211_S_RUN: 1172 DPRINTF(1, "%s: newstate RUN\n", device_xname(sc->sc_dev)); 1173 break; 1174 default: 1175 break; 1176 } 1177 1178 return (sc->sc_newstate(ic, nstate, arg)); 1179 } 1180 1181 static void 1182 malo_newassoc(struct ieee80211_node *ni, int isnew) 1183 { 1184 } 1185 1186 static struct ieee80211_node * 1187 malo_node_alloc(struct ieee80211_node_table *nt) 1188 { 1189 struct malo_node *wn; 1190 1191 wn = malloc(sizeof(*wn), M_DEVBUF, M_NOWAIT | M_ZERO); 1192 if (wn == NULL) 1193 return (NULL); 1194 1195 return ((struct ieee80211_node *)wn); 1196 } 1197 1198 static int 1199 malo_media_change(struct ifnet *ifp) 1200 { 1201 int error; 1202 1203 DPRINTF(1, "%s: %s\n", ifp->if_xname, __func__); 1204 1205 error = ieee80211_media_change(ifp); 1206 if (error != ENETRESET) 1207 return (error); 1208 1209 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 1210 malo_init(ifp); 1211 1212 return (0); 1213 } 1214 1215 static void 1216 malo_media_status(struct ifnet *ifp, struct ifmediareq *imr) 1217 { 1218 struct malo_softc *sc = ifp->if_softc; 1219 struct ieee80211com *ic = &sc->sc_ic; 1220 1221 imr->ifm_status = IFM_AVALID; 1222 imr->ifm_active = IFM_IEEE80211; 1223 if (ic->ic_state == IEEE80211_S_RUN) 1224 imr->ifm_status |= IFM_ACTIVE; 1225 1226 /* report last TX rate used by chip */ 1227 imr->ifm_active |= ieee80211_rate2media(ic, sc->sc_last_txrate, 1228 ic->ic_curmode); 1229 1230 switch (ic->ic_opmode) { 1231 case IEEE80211_M_STA: 1232 break; 1233 case IEEE80211_M_IBSS: 1234 imr->ifm_active |= IFM_IEEE80211_ADHOC; 1235 break; 1236 case IEEE80211_M_AHDEMO: 1237 break; 1238 case IEEE80211_M_HOSTAP: 1239 break; 1240 case IEEE80211_M_MONITOR: 1241 imr->ifm_active |= IFM_IEEE80211_MONITOR; 1242 break; 1243 default: 1244 break; 1245 } 1246 1247 switch (ic->ic_curmode) { 1248 case IEEE80211_MODE_11B: 1249 imr->ifm_active |= IFM_IEEE80211_11B; 1250 break; 1251 case IEEE80211_MODE_11G: 1252 imr->ifm_active |= IFM_IEEE80211_11G; 1253 break; 1254 } 1255 } 1256 1257 static int 1258 malo_chip2rate(int chip_rate) 1259 { 1260 switch (chip_rate) { 1261 /* CCK rates */ 1262 case 0: return (2); 1263 case 1: return (4); 1264 case 2: return (11); 1265 case 3: return (22); 1266 1267 /* OFDM rates */ 1268 case 4: return (0); /* reserved */ 1269 case 5: return (12); 1270 case 6: return (18); 1271 case 7: return (24); 1272 case 8: return (36); 1273 case 9: return (48); 1274 case 10: return (72); 1275 case 11: return (96); 1276 case 12: return (108); 1277 1278 /* no rate select yet or unknown rate */ 1279 default: return (-1); 1280 } 1281 } 1282 1283 static int 1284 malo_fix2rate(int fix_rate) 1285 { 1286 switch (fix_rate) { 1287 /* CCK rates */ 1288 case 0: return (2); 1289 case 1: return (4); 1290 case 2: return (11); 1291 case 3: return (22); 1292 1293 /* OFDM rates */ 1294 case 4: return (12); 1295 case 5: return (18); 1296 case 6: return (24); 1297 case 7: return (36); 1298 case 8: return (48); 1299 case 9: return (72); 1300 case 10: return (96); 1301 case 11: return (108); 1302 1303 /* unknown rate: should not happen */ 1304 default: return (0); 1305 } 1306 } 1307 1308 static void 1309 malo_next_scan(void *arg) 1310 { 1311 struct malo_softc *sc = arg; 1312 struct ieee80211com *ic = &sc->sc_ic; 1313 int s; 1314 1315 DPRINTF(1, "%s: %s\n", sc->sc_if.if_xname, __func__); 1316 1317 s = splnet(); 1318 1319 if (ic->ic_state == IEEE80211_S_SCAN) 1320 ieee80211_next_scan(ic); 1321 1322 splx(s); 1323 } 1324 1325 static void 1326 malo_tx_intr(struct malo_softc *sc) 1327 { 1328 struct ifnet *ifp = &sc->sc_if; 1329 struct malo_tx_desc *desc; 1330 struct malo_tx_data *data; 1331 struct malo_node *rn; 1332 int stat, s; 1333 1334 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1335 1336 s = splnet(); 1337 1338 stat = sc->sc_txring.stat; 1339 for (;;) { 1340 desc = &sc->sc_txring.desc[sc->sc_txring.stat]; 1341 data = &sc->sc_txring.data[sc->sc_txring.stat]; 1342 rn = (struct malo_node *)data->ni; 1343 1344 /* check if TX descriptor is not owned by FW anymore */ 1345 if ((le32toh(desc->status) & MALO_TXD_STATUS_FW_OWNED) || 1346 !(le32toh(data->softstat) & MALO_TXD_STATUS_FAILED_AGING)) 1347 break; 1348 1349 /* if no frame has been sent, ignore */ 1350 if (rn == NULL) 1351 goto next; 1352 1353 /* check TX state */ 1354 switch (le32toh(desc->status) & MALO_TXD_STATUS_USED) { 1355 case MALO_TXD_STATUS_OK: 1356 DPRINTF(2, "%s: data frame was sent successfully\n", 1357 device_xname(sc->sc_dev)); 1358 ifp->if_opackets++; 1359 break; 1360 default: 1361 DPRINTF(1, "%s: data frame sending error\n", 1362 device_xname(sc->sc_dev)); 1363 ifp->if_oerrors++; 1364 break; 1365 } 1366 1367 /* save last used TX rate */ 1368 sc->sc_last_txrate = malo_chip2rate(desc->datarate); 1369 1370 /* cleanup TX data and TX descriptor */ 1371 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1372 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1373 bus_dmamap_unload(sc->sc_dmat, data->map); 1374 m_freem(data->m); 1375 ieee80211_free_node(data->ni); 1376 data->m = NULL; 1377 data->ni = NULL; 1378 data->softstat &= htole32(~0x80); 1379 desc->status = 0; 1380 desc->len = 0; 1381 1382 DPRINTF(2, "%s: tx done idx=%u\n", 1383 device_xname(sc->sc_dev), sc->sc_txring.stat); 1384 1385 sc->sc_txring.queued--; 1386 next: 1387 if (++sc->sc_txring.stat >= sc->sc_txring.count) 1388 sc->sc_txring.stat = 0; 1389 if (sc->sc_txring.stat == stat) 1390 break; 1391 } 1392 1393 sc->sc_tx_timer = 0; 1394 ifp->if_flags &= ~IFF_OACTIVE; 1395 malo_start(ifp); 1396 1397 splx(s); 1398 } 1399 1400 static int 1401 malo_tx_data(struct malo_softc *sc, struct mbuf *m0, 1402 struct ieee80211_node *ni) 1403 { 1404 struct ieee80211com *ic = &sc->sc_ic; 1405 struct ifnet *ifp = &sc->sc_if; 1406 struct malo_tx_desc *desc; 1407 struct malo_tx_data *data; 1408 struct ieee80211_frame *wh; 1409 struct ieee80211_key *k; 1410 struct mbuf *mnew; 1411 int error; 1412 1413 DPRINTF(2, "%s: %s\n", device_xname(sc->sc_dev), __func__); 1414 1415 desc = &sc->sc_txring.desc[sc->sc_txring.cur]; 1416 data = &sc->sc_txring.data[sc->sc_txring.cur]; 1417 1418 if (m0->m_len < sizeof(struct ieee80211_frame)) { 1419 m0 = m_pullup(m0, sizeof(struct ieee80211_frame)); 1420 if (m0 == NULL) { 1421 ifp->if_ierrors++; 1422 return (ENOBUFS); 1423 } 1424 } 1425 wh = mtod(m0, struct ieee80211_frame *); 1426 1427 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1428 k = ieee80211_crypto_encap(ic, ni, m0); 1429 if (k == NULL) { 1430 m_freem(m0); 1431 return ENOBUFS; 1432 } 1433 1434 /* packet header may have moved, reset our local pointer */ 1435 wh = mtod(m0, struct ieee80211_frame *); 1436 } 1437 1438 if (sc->sc_drvbpf != NULL) { 1439 struct malo_tx_radiotap_hdr *tap = &sc->sc_txtap; 1440 1441 tap->wt_flags = 0; 1442 tap->wt_chan_freq = htole16(ni->ni_chan->ic_freq); 1443 tap->wt_chan_flags = htole16(ni->ni_chan->ic_flags); 1444 tap->wt_rate = sc->sc_last_txrate; 1445 if (wh->i_fc[1] & IEEE80211_FC1_WEP) 1446 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1447 1448 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1449 } 1450 1451 /* 1452 * inject FW specific fields into the 802.11 frame 1453 * 1454 * 2 bytes FW len (inject) 1455 * 24 bytes 802.11 frame header 1456 * 6 bytes addr4 (inject) 1457 * n bytes 802.11 frame body 1458 * 1459 * For now copy all into a new mcluster. 1460 */ 1461 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1462 if (mnew == NULL) 1463 return (ENOBUFS); 1464 MCLGET(mnew, M_DONTWAIT); 1465 if (!(mnew->m_flags & M_EXT)) { 1466 m_free(mnew); 1467 return (ENOBUFS); 1468 } 1469 1470 *mtod(mnew, uint16_t *) = htole16(m0->m_pkthdr.len - 24); /* FW len */ 1471 memmove(mtod(mnew, char*) + 2, wh, sizeof(*wh)); 1472 memset(mtod(mnew, char*) + 26, 0, 6); 1473 m_copydata(m0, sizeof(*wh), m0->m_pkthdr.len - sizeof(*wh), 1474 mtod(mnew, char*) + 32); 1475 mnew->m_pkthdr.len = mnew->m_len = m0->m_pkthdr.len + 8; 1476 m_freem(m0); 1477 m0 = mnew; 1478 1479 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1480 BUS_DMA_NOWAIT); 1481 if (error != 0) { 1482 aprint_error_dev(sc->sc_dev, "can't map mbuf (error %d)\n", error); 1483 m_freem(m0); 1484 return (error); 1485 } 1486 1487 data->m = m0; 1488 data->ni = ni; 1489 data->softstat |= htole32(0x80); 1490 1491 malo_tx_setup_desc(sc, desc, m0->m_pkthdr.len, 1, 1492 data->map->dm_segs, data->map->dm_nsegs); 1493 1494 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1495 BUS_DMASYNC_PREWRITE); 1496 bus_dmamap_sync(sc->sc_dmat, sc->sc_txring.map, 1497 sc->sc_txring.cur * sizeof(struct malo_tx_desc), 1498 sizeof(struct malo_tx_desc), BUS_DMASYNC_PREWRITE); 1499 1500 DPRINTF(2, "%s: sending frame, pktlen=%u, idx=%u\n", 1501 device_xname(sc->sc_dev), m0->m_pkthdr.len, sc->sc_txring.cur); 1502 1503 sc->sc_txring.queued++; 1504 sc->sc_txring.cur = (sc->sc_txring.cur + 1) % MALO_TX_RING_COUNT; 1505 1506 /* kick data TX */ 1507 malo_ctl_write4(sc, MALO_REG_H2A_INTERRUPT_EVENTS, 1); 1508 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE); 1509 1510 return (0); 1511 } 1512 1513 static void 1514 malo_tx_setup_desc(struct malo_softc *sc, struct malo_tx_desc *desc, 1515 int len, int rate, const bus_dma_segment_t *segs, int nsegs) 1516 { 1517 desc->len = htole16(segs[0].ds_len); 1518 desc->datarate = rate; /* 0 = mgmt frame, 1 = data frame */ 1519 desc->physdata = htole32(segs[0].ds_addr); 1520 desc->status = htole32(MALO_TXD_STATUS_OK | MALO_TXD_STATUS_FW_OWNED); 1521 } 1522 1523 static void 1524 malo_rx_intr(struct malo_softc *sc) 1525 { 1526 struct ieee80211com *ic = &sc->sc_ic; 1527 struct ifnet *ifp = &sc->sc_if; 1528 struct malo_rx_desc *desc; 1529 struct malo_rx_data *data; 1530 struct ieee80211_frame *wh; 1531 struct ieee80211_node *ni; 1532 struct mbuf *mnew, *m; 1533 uint32_t rxRdPtr, rxWrPtr; 1534 int error, i, s; 1535 1536 rxRdPtr = malo_mem_read4(sc, sc->sc_RxPdRdPtr); 1537 rxWrPtr = malo_mem_read4(sc, sc->sc_RxPdWrPtr); 1538 1539 for (i = 0; i < MALO_RX_RING_COUNT && rxRdPtr != rxWrPtr; i++) { 1540 desc = &sc->sc_rxring.desc[sc->sc_rxring.cur]; 1541 data = &sc->sc_rxring.data[sc->sc_rxring.cur]; 1542 1543 bus_dmamap_sync(sc->sc_dmat, sc->sc_rxring.map, 1544 sc->sc_rxring.cur * sizeof(struct malo_rx_desc), 1545 sizeof(struct malo_rx_desc), BUS_DMASYNC_POSTREAD); 1546 1547 DPRINTF(3, "%s: rx intr idx=%d, rxctrl=0x%02x, rssi=%d, " 1548 "status=0x%02x, channel=%d, len=%d, res1=%02x, rate=%d, " 1549 "physdata=0x%04x, physnext=0x%04x, qosctrl=%02x, res2=%d\n", 1550 device_xname(sc->sc_dev), 1551 sc->sc_rxring.cur, desc->rxctrl, desc->rssi, desc->status, 1552 desc->channel, le16toh(desc->len), desc->reserved1, 1553 desc->datarate, le32toh(desc->physdata), 1554 le32toh(desc->physnext), desc->qosctrl, desc->reserved2); 1555 1556 if ((desc->rxctrl & 0x80) == 0) 1557 break; 1558 1559 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1560 if (mnew == NULL) { 1561 ifp->if_ierrors++; 1562 goto skip; 1563 } 1564 1565 MCLGET(mnew, M_DONTWAIT); 1566 if (!(mnew->m_flags & M_EXT)) { 1567 m_freem(mnew); 1568 ifp->if_ierrors++; 1569 goto skip; 1570 } 1571 1572 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1573 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1574 bus_dmamap_unload(sc->sc_dmat, data->map); 1575 1576 error = bus_dmamap_load(sc->sc_dmat, data->map, 1577 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1578 if (error != 0) { 1579 m_freem(mnew); 1580 1581 error = bus_dmamap_load(sc->sc_dmat, data->map, 1582 mtod(data->m, void *), MCLBYTES, NULL, 1583 BUS_DMA_NOWAIT); 1584 if (error != 0) { 1585 panic("%s: could not load old rx mbuf", 1586 device_xname(sc->sc_dev)); 1587 } 1588 ifp->if_ierrors++; 1589 goto skip; 1590 } 1591 1592 /* 1593 * New mbuf mbuf successfully loaded 1594 */ 1595 m = data->m; 1596 data->m = mnew; 1597 desc->physdata = htole32(data->map->dm_segs->ds_addr); 1598 1599 /* finalize mbuf */ 1600 m_set_rcvif(m, ifp); 1601 m->m_pkthdr.len = m->m_len = le16toh(desc->len); 1602 1603 /* 1604 * cut out FW specific fields from the 802.11 frame 1605 * 1606 * 2 bytes FW len (cut out) 1607 * 24 bytes 802.11 frame header 1608 * 6 bytes addr4 (cut out) 1609 * n bytes 802.11 frame data 1610 */ 1611 memmove(m->m_data +6, m->m_data, 26); 1612 m_adj(m, 8); 1613 1614 s = splnet(); 1615 1616 if (sc->sc_drvbpf != NULL) { 1617 struct malo_rx_radiotap_hdr *tap = &sc->sc_rxtap; 1618 1619 tap->wr_flags = 0; 1620 tap->wr_chan_freq = 1621 htole16(ic->ic_bss->ni_chan->ic_freq); 1622 tap->wr_chan_flags = 1623 htole16(ic->ic_bss->ni_chan->ic_flags); 1624 1625 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 1626 } 1627 1628 wh = mtod(m, struct ieee80211_frame *); 1629 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1630 1631 /* send the frame to the 802.11 layer */ 1632 ieee80211_input(ic, m, ni, desc->rssi, 0); 1633 1634 /* node is no longer needed */ 1635 ieee80211_free_node(ni); 1636 1637 splx(s); 1638 1639 skip: 1640 desc->rxctrl = 0; 1641 rxRdPtr = le32toh(desc->physnext); 1642 1643 bus_dmamap_sync(sc->sc_dmat, sc->sc_rxring.map, 1644 sc->sc_rxring.cur * sizeof(struct malo_rx_desc), 1645 sizeof(struct malo_rx_desc), BUS_DMASYNC_PREWRITE); 1646 1647 sc->sc_rxring.cur = (sc->sc_rxring.cur + 1) % 1648 MALO_RX_RING_COUNT; 1649 } 1650 1651 malo_mem_write4(sc, sc->sc_RxPdRdPtr, rxRdPtr); 1652 } 1653 1654 static int 1655 malo_get_firmware(struct malo_softc *sc, const char *name, 1656 uint8_t** firmware_image, size_t* size) 1657 { 1658 firmware_handle_t fw; 1659 int error; 1660 1661 1662 /* load firmware image from disk */ 1663 if ((error = firmware_open("malo", name, &fw)) != 0) { 1664 aprint_error_dev(sc->sc_dev, "could not read firmware file\n"); 1665 return error; 1666 } 1667 1668 *size = firmware_get_size(fw); 1669 1670 *firmware_image = firmware_malloc(*size); 1671 if (*firmware_image == NULL) { 1672 aprint_error_dev(sc->sc_dev, "not enough memory to stock firmware\n"); 1673 error = ENOMEM; 1674 goto fail1; 1675 } 1676 1677 if ((error = firmware_read(fw, 0, *firmware_image, *size)) != 0) { 1678 aprint_error_dev(sc->sc_dev, "can't get firmware\n"); 1679 goto fail2; 1680 } 1681 1682 firmware_close(fw); 1683 1684 return 0; 1685 fail2: 1686 firmware_free(*firmware_image, *size); 1687 fail1: 1688 firmware_close(fw); 1689 return error; 1690 } 1691 1692 static int 1693 malo_load_bootimg(struct malo_softc *sc) 1694 { 1695 const char *name = "malo8335-h"; 1696 uint8_t *ucode; 1697 size_t size; 1698 int error, i; 1699 1700 /* load boot firmware */ 1701 if ((error = malo_get_firmware(sc, name, &ucode, &size)) != 0) { 1702 aprint_error_dev(sc->sc_dev, "error %d, could not read firmware %s\n", 1703 error, name); 1704 return (EIO); 1705 } 1706 1707 /* 1708 * It seems we are putting this code directly onto the stack of 1709 * the ARM cpu. I don't know why we need to instruct the DMA 1710 * engine to move the code. This is a big riddle without docu. 1711 */ 1712 DPRINTF(1, "%s: loading boot firmware\n", device_xname(sc->sc_dev)); 1713 malo_mem_write2(sc, 0xbef8, 0x001); 1714 malo_mem_write2(sc, 0xbefa, size); 1715 malo_mem_write4(sc, 0xbefc, 0); 1716 1717 bus_space_write_region_1(sc->sc_mem1_bt, sc->sc_mem1_bh, 0xbf00, 1718 ucode, size); 1719 1720 /* 1721 * we loaded the firmware into card memory now tell the CPU 1722 * to fetch the code and execute it. The memory mapped via the 1723 * first bar is internaly mapped to 0xc0000000. 1724 */ 1725 malo_send_cmd(sc, 0xc000bef8); 1726 1727 /* wait for the device to go into FW loading mode */ 1728 for (i = 0; i < 10; i++) { 1729 delay(50); 1730 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_READ); 1731 if (malo_ctl_read4(sc, 0x0c14) == 0x5) 1732 break; 1733 } 1734 if (i == 10) { 1735 aprint_error_dev(sc->sc_dev, "timeout at boot firmware load!\n"); 1736 free(ucode, M_DEVBUF); 1737 return (ETIMEDOUT); 1738 } 1739 firmware_free(ucode, size); 1740 1741 /* tell the card we're done and... */ 1742 malo_mem_write2(sc, 0xbef8, 0x001); 1743 malo_mem_write2(sc, 0xbefa, 0); 1744 malo_mem_write4(sc, 0xbefc, 0); 1745 malo_send_cmd(sc, 0xc000bef8); 1746 1747 DPRINTF(1, "%s: boot firmware loaded\n", device_xname(sc->sc_dev)); 1748 1749 return (0); 1750 } 1751 1752 1753 static int 1754 malo_load_firmware(struct malo_softc *sc) 1755 { 1756 struct malo_cmdheader *hdr; 1757 const char *name = "malo8335-m"; 1758 void *data; 1759 uint8_t *ucode; 1760 size_t size, count, bsize; 1761 int i, sn, error; 1762 1763 /* load real firmware now */ 1764 if ((error = malo_get_firmware(sc, name, &ucode, &size)) != 0) { 1765 aprint_error_dev(sc->sc_dev, "error %d, could not read firmware %s\n", 1766 error, name); 1767 return (EIO); 1768 } 1769 1770 DPRINTF(1, "%s: uploading firmware\n", device_xname(sc->sc_dev)); 1771 1772 hdr = sc->sc_cmd_mem; 1773 data = hdr + 1; 1774 sn = 1; 1775 for (count = 0; count < size; count += bsize) { 1776 bsize = MIN(256, size - count); 1777 1778 hdr->cmd = htole16(0x0001); 1779 hdr->size = htole16(bsize); 1780 hdr->seqnum = htole16(sn++); 1781 hdr->result = 0; 1782 1783 memcpy(data, ucode + count, bsize); 1784 1785 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1786 BUS_DMASYNC_PREWRITE); 1787 malo_send_cmd(sc, sc->sc_cmd_dmaaddr); 1788 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1789 BUS_DMASYNC_POSTWRITE); 1790 delay(500); 1791 } 1792 firmware_free(ucode, size); 1793 1794 DPRINTF(1, "%s: firmware upload finished\n", device_xname(sc->sc_dev)); 1795 1796 /* 1797 * send a command with size 0 to tell that the firmware has been 1798 * uploaded 1799 */ 1800 hdr->cmd = htole16(0x0001); 1801 hdr->size = 0; 1802 hdr->seqnum = htole16(sn++); 1803 hdr->result = 0; 1804 1805 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1806 BUS_DMASYNC_PREWRITE); 1807 malo_send_cmd(sc, sc->sc_cmd_dmaaddr); 1808 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1809 BUS_DMASYNC_POSTWRITE); 1810 delay(100); 1811 1812 DPRINTF(1, "%s: loading firmware\n", device_xname(sc->sc_dev)); 1813 1814 /* wait until firmware has been loaded */ 1815 for (i = 0; i < 200; i++) { 1816 malo_ctl_write4(sc, 0x0c10, 0x5a); 1817 delay(500); 1818 malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE | 1819 BUS_SPACE_BARRIER_READ); 1820 if (malo_ctl_read4(sc, 0x0c14) == 0xf0f1f2f4) 1821 break; 1822 } 1823 if (i == 200) { 1824 aprint_error_dev(sc->sc_dev, "timeout at firmware load!\n"); 1825 return (ETIMEDOUT); 1826 } 1827 1828 DPRINTF(1, "%s: firmware loaded\n", device_xname(sc->sc_dev)); 1829 1830 return (0); 1831 } 1832 1833 static int 1834 malo_set_slot(struct malo_softc *sc) 1835 { 1836 struct ieee80211com *ic = &sc->sc_ic; 1837 1838 if (ic->ic_flags & IEEE80211_F_SHSLOT) { 1839 /* set short slot */ 1840 if (malo_cmd_set_slot(sc, 1)) { 1841 aprint_error_dev(sc->sc_dev, "setting short slot failed\n"); 1842 return (ENXIO); 1843 } 1844 } else { 1845 /* set long slot */ 1846 if (malo_cmd_set_slot(sc, 0)) { 1847 aprint_error_dev(sc->sc_dev, "setting long slot failed\n"); 1848 return (ENXIO); 1849 } 1850 } 1851 1852 return (0); 1853 } 1854 1855 static void 1856 malo_update_slot(struct ifnet* ifp) 1857 { 1858 struct malo_softc *sc = ifp->if_softc; 1859 struct ieee80211com *ic = &sc->sc_ic; 1860 1861 malo_set_slot(sc); 1862 1863 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 1864 /* TODO */ 1865 } 1866 } 1867 1868 #ifdef MALO_DEBUG 1869 static void 1870 malo_hexdump(void *buf, int len) 1871 { 1872 u_char b[16]; 1873 int i, j, l; 1874 1875 for (i = 0; i < len; i += l) { 1876 printf("%4i:", i); 1877 l = min(sizeof(b), len - i); 1878 memcpy(b, (char*)buf + i, l); 1879 1880 for (j = 0; j < sizeof(b); j++) { 1881 if (j % 2 == 0) 1882 printf(" "); 1883 if (j % 8 == 0) 1884 printf(" "); 1885 if (j < l) 1886 printf("%02x", (int)b[j]); 1887 else 1888 printf(" "); 1889 } 1890 printf(" |"); 1891 for (j = 0; j < l; j++) { 1892 if (b[j] >= 0x20 && b[j] <= 0x7e) 1893 printf("%c", b[j]); 1894 else 1895 printf("."); 1896 } 1897 printf("|\n"); 1898 } 1899 } 1900 #endif 1901 1902 static const char * 1903 malo_cmd_string(uint16_t cmd) 1904 { 1905 int i; 1906 static char cmd_buf[16]; 1907 static const struct { 1908 uint16_t cmd_code; 1909 const char *cmd_string; 1910 } cmds[] = { 1911 { MALO_CMD_GET_HW_SPEC, "GetHwSpecifications" }, 1912 { MALO_CMD_SET_RADIO, "SetRadio" }, 1913 { MALO_CMD_SET_AID, "SetAid" }, 1914 { MALO_CMD_SET_TXPOWER, "SetTxPower" }, 1915 { MALO_CMD_SET_ANTENNA, "SetAntenna" }, 1916 { MALO_CMD_SET_PRESCAN, "SetPrescan" }, 1917 { MALO_CMD_SET_POSTSCAN, "SetPostscan" }, 1918 { MALO_CMD_SET_RATE, "SetRate" }, 1919 { MALO_CMD_SET_CHANNEL, "SetChannel" }, 1920 { MALO_CMD_SET_RTS, "SetRTS" }, 1921 { MALO_CMD_SET_SLOT, "SetSlot" }, 1922 }; 1923 1924 for (i = 0; i < sizeof(cmds) / sizeof(cmds[0]); i++) 1925 if ((le16toh(cmd) & 0x7fff) == cmds[i].cmd_code) 1926 return (cmds[i].cmd_string); 1927 1928 snprintf(cmd_buf, sizeof(cmd_buf), "unknown %#x", cmd); 1929 return (cmd_buf); 1930 } 1931 1932 static const char * 1933 malo_cmd_string_result(uint16_t result) 1934 { 1935 int i; 1936 static const struct { 1937 uint16_t result_code; 1938 const char *result_string; 1939 } results[] = { 1940 { MALO_CMD_RESULT_OK, "OK" }, 1941 { MALO_CMD_RESULT_ERROR, "general error" }, 1942 { MALO_CMD_RESULT_NOSUPPORT, "not supported" }, 1943 { MALO_CMD_RESULT_PENDING, "pending" }, 1944 { MALO_CMD_RESULT_BUSY, "ignored" }, 1945 { MALO_CMD_RESULT_PARTIALDATA, "incomplete" }, 1946 }; 1947 1948 for (i = 0; i < sizeof(results) / sizeof(results[0]); i++) 1949 if (le16toh(result) == results[i].result_code) 1950 return (results[i].result_string); 1951 1952 return ("unknown"); 1953 } 1954 1955 static int 1956 malo_cmd_get_spec(struct malo_softc *sc) 1957 { 1958 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 1959 struct malo_hw_spec *spec; 1960 1961 hdr->cmd = htole16(MALO_CMD_GET_HW_SPEC); 1962 hdr->size = htole16(sizeof(*hdr) + sizeof(*spec)); 1963 hdr->seqnum = htole16(42); /* the one and only */ 1964 hdr->result = 0; 1965 spec = (struct malo_hw_spec *)(hdr + 1); 1966 1967 memset(spec, 0, sizeof(*spec)); 1968 memset(spec->PermanentAddress, 0xff, ETHER_ADDR_LEN); 1969 spec->CookiePtr = htole32(sc->sc_cookie_dmaaddr); 1970 1971 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 1972 BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD); 1973 1974 if (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr) != 0) 1975 return (ETIMEDOUT); 1976 1977 /* get the data from the buffer */ 1978 DPRINTF(1, "%s: get_hw_spec: V%x R%x, #WCB %d, #Mcast %d, Regcode %d, " 1979 "#Ant %d\n", device_xname(sc->sc_dev), htole16(spec->HwVersion), 1980 htole32(spec->FWReleaseNumber), htole16(spec->NumOfWCB), 1981 htole16(spec->NumOfMCastAdr), htole16(spec->RegionCode), 1982 htole16(spec->NumberOfAntenna)); 1983 1984 /* tell the DMA engine where our rings are */ 1985 malo_mem_write4(sc, le32toh(spec->RxPdRdPtr) & 0xffff, 1986 sc->sc_rxring.physaddr); 1987 malo_mem_write4(sc, le32toh(spec->RxPdWrPtr) & 0xffff, 1988 sc->sc_rxring.physaddr); 1989 malo_mem_write4(sc, le32toh(spec->WcbBase0) & 0xffff, 1990 sc->sc_txring.physaddr); 1991 1992 /* save DMA RX pointers for later use */ 1993 sc->sc_RxPdRdPtr = le32toh(spec->RxPdRdPtr) & 0xffff; 1994 sc->sc_RxPdWrPtr = le32toh(spec->RxPdWrPtr) & 0xffff; 1995 1996 return (0); 1997 } 1998 1999 static int 2000 malo_cmd_set_prescan(struct malo_softc *sc) 2001 { 2002 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2003 2004 hdr->cmd = htole16(MALO_CMD_SET_PRESCAN); 2005 hdr->size = htole16(sizeof(*hdr)); 2006 hdr->seqnum = 1; 2007 hdr->result = 0; 2008 2009 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2010 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2011 2012 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2013 } 2014 2015 static int 2016 malo_cmd_set_postscan(struct malo_softc *sc, uint8_t *macaddr, uint8_t ibsson) 2017 { 2018 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2019 struct malo_cmd_postscan *body; 2020 2021 hdr->cmd = htole16(MALO_CMD_SET_POSTSCAN); 2022 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2023 hdr->seqnum = 1; 2024 hdr->result = 0; 2025 body = (struct malo_cmd_postscan *)(hdr + 1); 2026 2027 memset(body, 0, sizeof(*body)); 2028 memcpy(&body->bssid, macaddr, ETHER_ADDR_LEN); 2029 body->isibss = htole32(ibsson); 2030 2031 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2032 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2033 2034 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2035 } 2036 2037 static int 2038 malo_cmd_set_channel(struct malo_softc *sc, struct ieee80211_channel* chan) 2039 { 2040 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2041 struct ieee80211com *ic = &sc->sc_ic; 2042 struct malo_cmd_channel *body; 2043 uint8_t channel; 2044 2045 channel = ieee80211_chan2ieee(ic, chan); 2046 2047 hdr->cmd = htole16(MALO_CMD_SET_CHANNEL); 2048 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2049 hdr->seqnum = 1; 2050 hdr->result = 0; 2051 body = (struct malo_cmd_channel *)(hdr + 1); 2052 2053 memset(body, 0, sizeof(*body)); 2054 body->action = htole16(1); 2055 body->channel = channel; 2056 2057 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2058 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2059 2060 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2061 } 2062 2063 static int 2064 malo_cmd_set_antenna(struct malo_softc *sc, uint16_t antenna) 2065 { 2066 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2067 struct malo_cmd_antenna *body; 2068 2069 hdr->cmd = htole16(MALO_CMD_SET_ANTENNA); 2070 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2071 hdr->seqnum = 1; 2072 hdr->result = 0; 2073 body = (struct malo_cmd_antenna *)(hdr + 1); 2074 2075 memset(body, 0, sizeof(*body)); 2076 body->action = htole16(antenna); 2077 if (antenna == 1) 2078 body->mode = htole16(0xffff); 2079 else 2080 body->mode = htole16(2); 2081 2082 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2083 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2084 2085 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2086 } 2087 2088 static int 2089 malo_cmd_set_radio(struct malo_softc *sc, uint16_t enable, 2090 uint16_t preamble_mode) 2091 { 2092 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2093 struct malo_cmd_radio *body; 2094 2095 hdr->cmd = htole16(MALO_CMD_SET_RADIO); 2096 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2097 hdr->seqnum = 1; 2098 hdr->result = 0; 2099 body = (struct malo_cmd_radio *)(hdr + 1); 2100 2101 memset(body, 0, sizeof(*body)); 2102 body->action = htole16(1); 2103 body->preamble_mode = htole16(preamble_mode); 2104 body->enable = htole16(enable); 2105 2106 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2107 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2108 2109 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2110 } 2111 2112 static int 2113 malo_cmd_set_aid(struct malo_softc *sc, uint8_t *bssid, uint16_t associd) 2114 { 2115 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2116 struct malo_cmd_aid *body; 2117 2118 hdr->cmd = htole16(MALO_CMD_SET_AID); 2119 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2120 hdr->seqnum = 1; 2121 hdr->result = 0; 2122 body = (struct malo_cmd_aid *)(hdr + 1); 2123 2124 memset(body, 0, sizeof(*body)); 2125 body->associd = htole16(associd); 2126 memcpy(&body->macaddr[0], bssid, IEEE80211_ADDR_LEN); 2127 2128 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2129 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2130 2131 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2132 } 2133 2134 static int 2135 malo_cmd_set_txpower(struct malo_softc *sc, unsigned int powerlevel) 2136 { 2137 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2138 struct malo_cmd_txpower *body; 2139 2140 hdr->cmd = htole16(MALO_CMD_SET_TXPOWER); 2141 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2142 hdr->seqnum = 1; 2143 hdr->result = 0; 2144 body = (struct malo_cmd_txpower *)(hdr + 1); 2145 2146 memset(body, 0, sizeof(*body)); 2147 body->action = htole16(1); 2148 if (powerlevel < 30) 2149 body->supportpowerlvl = htole16(5); /* LOW */ 2150 else if (powerlevel >= 30 && powerlevel < 60) 2151 body->supportpowerlvl = htole16(10); /* MEDIUM */ 2152 else 2153 body->supportpowerlvl = htole16(15); /* HIGH */ 2154 2155 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2156 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2157 2158 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2159 } 2160 2161 static int 2162 malo_cmd_set_rts(struct malo_softc *sc, uint32_t threshold) 2163 { 2164 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2165 struct malo_cmd_rts *body; 2166 2167 hdr->cmd = htole16(MALO_CMD_SET_RTS); 2168 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2169 hdr->seqnum = 1; 2170 hdr->result = 0; 2171 body = (struct malo_cmd_rts *)(hdr + 1); 2172 2173 memset(body, 0, sizeof(*body)); 2174 body->action = htole16(1); 2175 body->threshold = htole32(threshold); 2176 2177 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2178 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2179 2180 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2181 } 2182 2183 static int 2184 malo_cmd_set_slot(struct malo_softc *sc, uint8_t slot) 2185 { 2186 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2187 struct malo_cmd_slot *body; 2188 2189 hdr->cmd = htole16(MALO_CMD_SET_SLOT); 2190 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2191 hdr->seqnum = 1; 2192 hdr->result = 0; 2193 body = (struct malo_cmd_slot *)(hdr + 1); 2194 2195 memset(body, 0, sizeof(*body)); 2196 body->action = htole16(1); 2197 body->slot = slot; 2198 2199 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2200 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2201 2202 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2203 } 2204 2205 static int 2206 malo_cmd_set_rate(struct malo_softc *sc, uint8_t rate) 2207 { 2208 struct ieee80211com *ic = &sc->sc_ic; 2209 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2210 struct malo_cmd_rate *body; 2211 int i; 2212 2213 hdr->cmd = htole16(MALO_CMD_SET_RATE); 2214 hdr->size = htole16(sizeof(*hdr) + sizeof(*body)); 2215 hdr->seqnum = 1; 2216 hdr->result = 0; 2217 body = (struct malo_cmd_rate *)(hdr + 1); 2218 2219 memset(body, 0,sizeof(*body)); 2220 2221 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2222 /* TODO */ 2223 } else 2224 { 2225 body->aprates[0] = 2; 2226 body->aprates[1] = 4; 2227 body->aprates[2] = 11; 2228 body->aprates[3] = 22; 2229 if (ic->ic_curmode == IEEE80211_MODE_11G) { 2230 body->aprates[4] = 0; 2231 body->aprates[5] = 12; 2232 body->aprates[6] = 18; 2233 body->aprates[7] = 24; 2234 body->aprates[8] = 36; 2235 body->aprates[9] = 48; 2236 body->aprates[10] = 72; 2237 body->aprates[11] = 96; 2238 body->aprates[12] = 108; 2239 } 2240 } 2241 2242 if (rate != 0) { 2243 /* fixed rate */ 2244 for (i = 0; i < 13; i++) { 2245 if (body->aprates[i] == rate) { 2246 body->rateindex = i; 2247 body->dataratetype = 1; 2248 break; 2249 } 2250 } 2251 } 2252 2253 bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE, 2254 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2255 2256 return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr)); 2257 } 2258 2259 static void 2260 malo_cmd_response(struct malo_softc *sc) 2261 { 2262 struct malo_cmdheader *hdr = sc->sc_cmd_mem; 2263 2264 if (le16toh(hdr->result) != MALO_CMD_RESULT_OK) { 2265 aprint_error_dev(sc->sc_dev, "firmware cmd %s failed with %s\n", 2266 malo_cmd_string(hdr->cmd), 2267 malo_cmd_string_result(hdr->result)); 2268 } 2269 2270 #ifdef MALO_DEBUG 2271 aprint_error_dev(sc->sc_dev, "cmd answer for %s=%s\n", 2272 malo_cmd_string(hdr->cmd), 2273 malo_cmd_string_result(hdr->result)); 2274 2275 if (malo_d > 2) 2276 malo_hexdump(hdr, le16toh(hdr->size)); 2277 #endif 2278 } 2279
Indexes created Wed Oct 22 06:10:02 GMT 2025