max2820reg.h revision 1.8 1 1.8 rmind /* $NetBSD: max2820reg.h,v 1.8 2009/10/19 23:19:39 rmind Exp $ */
2 1.1 dyoung
3 1.1 dyoung /*
4 1.1 dyoung * Copyright (c) 2004 David Young. All rights reserved.
5 1.1 dyoung *
6 1.1 dyoung * This code was written by David Young.
7 1.1 dyoung *
8 1.1 dyoung * Redistribution and use in source and binary forms, with or without
9 1.1 dyoung * modification, are permitted provided that the following conditions
10 1.1 dyoung * are met:
11 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
12 1.1 dyoung * notice, this list of conditions and the following disclaimer.
13 1.1 dyoung * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 dyoung * notice, this list of conditions and the following disclaimer in the
15 1.1 dyoung * documentation and/or other materials provided with the distribution.
16 1.1 dyoung *
17 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
18 1.1 dyoung * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19 1.1 dyoung * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
20 1.1 dyoung * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
21 1.1 dyoung * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 1.1 dyoung * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
23 1.1 dyoung * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 1.1 dyoung * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
25 1.1 dyoung * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 1.1 dyoung * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 1.1 dyoung * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
28 1.1 dyoung * OF SUCH DAMAGE.
29 1.1 dyoung */
30 1.1 dyoung
31 1.1 dyoung #ifndef _DEV_IC_MAX2820REG_H_
32 1.1 dyoung #define _DEV_IC_MAX2820REG_H_
33 1.1 dyoung
34 1.1 dyoung /*
35 1.1 dyoung * Serial bus format for Maxim MAX2820/MAX2820A/MAX2821/MAX2821A
36 1.1 dyoung * 2.4GHz 802.11b Zero-IF Transceivers
37 1.1 dyoung */
38 1.5 dyoung #define MAX2820_TWI_ADDR_MASK __BITS(15,12)
39 1.5 dyoung #define MAX2820_TWI_DATA_MASK __BITS(11,0)
40 1.1 dyoung
41 1.1 dyoung /*
42 1.1 dyoung * Registers for Maxim MAX2820/MAX2820A/MAX2821/MAX2821A 2.4GHz
43 1.1 dyoung * 802.11b Zero-IF Transceivers
44 1.1 dyoung */
45 1.1 dyoung #define MAX2820_TEST 0 /* Test Register */
46 1.5 dyoung #define MAX2820_TEST_DEFAULT __BITS(2,0) /* Always set to this value. */
47 1.1 dyoung
48 1.1 dyoung #define MAX2820_ENABLE 1 /* Block-Enable Register */
49 1.5 dyoung #define MAX2820_ENABLE_RSVD1 __BIT(11) /* reserved */
50 1.5 dyoung #define MAX2820_ENABLE_PAB __BIT(10) /* Transmit Baseband Filters
51 1.1 dyoung * Enable
52 1.1 dyoung * PAB_EN = SHDNB &&
53 1.1 dyoung * (MAX2820_ENABLE_PAB ||
54 1.1 dyoung * TX_ON)
55 1.1 dyoung */
56 1.5 dyoung #define MAX2820_ENABLE_TXFLT __BIT(9) /* Transmit Baseband Filters
57 1.1 dyoung * Enable
58 1.1 dyoung * TXFLT_EN = SHDNB &&
59 1.1 dyoung * (MAX2820_ENABLE_TXFLT ||
60 1.1 dyoung * TX_ON)
61 1.1 dyoung */
62 1.5 dyoung #define MAX2820_ENABLE_TXUVD __BIT(8) /* Tx Upconverter, VGA, and
63 1.1 dyoung * Driver Amp Enable
64 1.1 dyoung * TXUVD_EN = SHDNB &&
65 1.1 dyoung * (MAX2820_ENABLE_TXUVD ||
66 1.1 dyoung * TX_ON)
67 1.1 dyoung */
68 1.5 dyoung #define MAX2820_ENABLE_DET __BIT(7) /* Receive Detector Enable
69 1.1 dyoung * DET_EN = SHDNB &&
70 1.1 dyoung * (MAX2820_ENABLE_DET ||
71 1.1 dyoung * RX_ON)
72 1.1 dyoung */
73 1.5 dyoung #define MAX2820_ENABLE_RXDFA __BIT(6) /* Rx Downconverter, Filters,
74 1.1 dyoung * and AGC Amps Enable
75 1.1 dyoung * RXDFA_EN = SHDNB &&
76 1.1 dyoung * (MAX2820_ENABLE_RXDFA ||
77 1.1 dyoung * RX_ON)
78 1.1 dyoung */
79 1.5 dyoung #define MAX2820_ENABLE_RXLNA __BIT(5) /* Receive LNA Enable
80 1.1 dyoung * AT_EN = SHDNB &&
81 1.1 dyoung * (MAX2820_ENABLE_RXLNA ||
82 1.1 dyoung * RX_ON)
83 1.1 dyoung */
84 1.5 dyoung #define MAX2820_ENABLE_AT __BIT(4) /* Auto-tuner Enable
85 1.1 dyoung * AT_EN = SHDNB &&
86 1.1 dyoung * (MAX2820_ENABLE_AT ||
87 1.1 dyoung * RX_ON || TX_ON)
88 1.1 dyoung */
89 1.5 dyoung #define MAX2820_ENABLE_CP __BIT(3) /* PLL Charge-Pump Enable
90 1.1 dyoung * CP_EN = SHDNB
91 1.1 dyoung * && MAX2820_ENABLE_CP
92 1.1 dyoung */
93 1.5 dyoung #define MAX2820_ENABLE_PLL __BIT(2) /* PLL Enable
94 1.1 dyoung * PLL_EN = SHDNB
95 1.1 dyoung * && MAX2820_ENABLE_PLL
96 1.1 dyoung */
97 1.5 dyoung #define MAX2820_ENABLE_VCO __BIT(1) /* VCO Enable
98 1.1 dyoung * VCO_EN = SHDNB
99 1.1 dyoung * && MAX2820_ENABLE_VCO
100 1.1 dyoung */
101 1.5 dyoung #define MAX2820_ENABLE_RSVD0 __BIT(0) /* reserved */
102 1.1 dyoung #define MAX2820_ENABLE_DEFAULT (MAX2820_ENABLE_AT|MAX2820_ENABLE_CP|\
103 1.1 dyoung MAX2820_ENABLE_PLL|MAX2820_ENABLE_VCO)
104 1.1 dyoung
105 1.1 dyoung #define MAX2820_SYNTH 2 /* Synthesizer Register */
106 1.5 dyoung #define MAX2820_SYNTH_RSVD0 __BITS(11,7) /* reserved */
107 1.5 dyoung #define MAX2820_SYNTH_ICP __BIT(6) /* Charge-Pump Current Select
108 1.1 dyoung * 0 = +/-1mA
109 1.1 dyoung * 1 = +/-2mA
110 1.1 dyoung */
111 1.5 dyoung #define MAX2820_SYNTH_R_MASK __BITS(5,0) /* Reference Frequency Divider
112 1.1 dyoung * 0 = 22MHz
113 1.1 dyoung * 1 = 44MHz
114 1.1 dyoung */
115 1.7 dyoung #define MAX2820_SYNTH_R_22MHZ __SHIFTIN(0, MAX2820_SYNTH_R_MASK)
116 1.7 dyoung #define MAX2820_SYNTH_R_44MHZ __SHIFTIN(1, MAX2820_SYNTH_R_MASK)
117 1.1 dyoung #define MAX2820_SYNTH_ICP_DEFAULT MAX2820_SYNTH_ICP
118 1.7 dyoung #define MAX2820_SYNTH_R_DEFAULT __SHIFTIN(0, MAX2820_SYNTH_R_MASK)
119 1.1 dyoung
120 1.1 dyoung #define MAX2820_CHANNEL 3 /* Channel Frequency Register */
121 1.5 dyoung #define MAX2820_CHANNEL_RSVD __BITS(11,7) /* reserved */
122 1.5 dyoung #define MAX2820_CHANNEL_CF_MASK __BITS(6,0) /* Channel Frequency Select
123 1.1 dyoung * fLO = 2400MHz + CF * 1MHz
124 1.1 dyoung */
125 1.7 dyoung #define MAX2820_CHANNEL_RSVD_DEFAULT __SHIFTIN(0, MAX2820_CHANNEL_RSVD)
126 1.7 dyoung #define MAX2820_CHANNEL_CF_DEFAULT __SHIFTIN(37, MAX2820_CHANNEL_CF_MASK)
127 1.1 dyoung
128 1.1 dyoung #define MAX2820_RECEIVE 4 /* Receiver Settings Register
129 1.1 dyoung * MAX2820/MAX2821
130 1.1 dyoung */
131 1.5 dyoung #define MAX2820_RECEIVE_2C_MASK __BITS(11,9) /* VGA DC Offset Nulling
132 1.1 dyoung * Parameter 2
133 1.1 dyoung */
134 1.5 dyoung #define MAX2820_RECEIVE_1C_MASK __BITS(8,6) /* VGA DC Offset Nulling
135 1.1 dyoung * Parameter 1
136 1.1 dyoung */
137 1.5 dyoung #define MAX2820_RECEIVE_DL_MASK __BITS(5,4) /* Rx Level Detector Midpoint
138 1.1 dyoung * Select
139 1.1 dyoung * 11, 01 = 50.2mVp
140 1.1 dyoung * 10 = 70.9mVp
141 1.1 dyoung * 00 = 35.5mVp
142 1.1 dyoung */
143 1.5 dyoung #define MAX2820_RECEIVE_SF __BIT(3) /* Special Function Select
144 1.1 dyoung * 0 = OFF
145 1.1 dyoung * 1 = ON
146 1.1 dyoung */
147 1.5 dyoung #define MAX2820_RECEIVE_BW_MASK __BITS(2,0) /* Receive Filter -3dB Frequency
148 1.1 dyoung * Select (all frequencies are
149 1.1 dyoung * approximate)
150 1.1 dyoung */
151 1.1 dyoung /* 8.5MHz */
152 1.7 dyoung #define MAX2820_RECEIVE_BW_8_5MHZ __SHIFTIN(0, MAX2820_RECEIVE_BW_MASK)
153 1.7 dyoung #define MAX2820_RECEIVE_BW_8MHZ __SHIFTIN(1, MAX2820_RECEIVE_BW_MASK)
154 1.7 dyoung #define MAX2820_RECEIVE_BW_7_5MHZ __SHIFTIN(2, MAX2820_RECEIVE_BW_MASK)
155 1.7 dyoung #define MAX2820_RECEIVE_BW_7MHZ __SHIFTIN(3, MAX2820_RECEIVE_BW_MASK)
156 1.7 dyoung #define MAX2820_RECEIVE_BW_6_5MHZ __SHIFTIN(4, MAX2820_RECEIVE_BW_MASK)
157 1.7 dyoung #define MAX2820_RECEIVE_BW_6MHZ __SHIFTIN(5, MAX2820_RECEIVE_BW_MASK)
158 1.7 dyoung #define MAX2820_RECEIVE_2C_DEFAULT __SHIFTIN(7, MAX2820_RECEIVE_2C_MASK)
159 1.7 dyoung #define MAX2820_RECEIVE_1C_DEFAULT __SHIFTIN(7, MAX2820_RECEIVE_1C_MASK)
160 1.7 dyoung #define MAX2820_RECEIVE_DL_DEFAULT __SHIFTIN(1, MAX2820_RECEIVE_DL_MASK)
161 1.7 dyoung #define MAX2820_RECEIVE_SF_DEFAULT __SHIFTIN(0, MAX2820_RECEIVE_SF)
162 1.2 perry #define MAX2820_RECEIVE_BW_DEFAULT MAX2820_RECEIVE_BW_7_5MHZ
163 1.1 dyoung
164 1.1 dyoung #define MAX2820A_RECEIVE 4 /* Receiver Settings Register,
165 1.1 dyoung * MAX2820A/MAX2821A
166 1.1 dyoung */
167 1.1 dyoung /* VGA DC Offset Nulling Parameter 2 */
168 1.5 dyoung #define MAX2820A_RECEIVE_2C_MASK __BITS(11,9)
169 1.7 dyoung #define MAX2820A_RECEIVE_2C_DEFAULT __SHIFTIN(7, MAX2820A_RECEIVE_2C_MASK)
170 1.1 dyoung /* VGA DC Offset Nulling Parameter 1 */
171 1.5 dyoung #define MAX2820A_RECEIVE_1C_MASK __BITS(8,6)
172 1.7 dyoung #define MAX2820A_RECEIVE_1C_DEFAULT __SHIFTIN(7, MAX2820A_RECEIVE_1C_MASK)
173 1.5 dyoung #define MAX2820A_RECEIVE_RSVD0_MASK __BITS(5,3)
174 1.7 dyoung #define MAX2820A_RECEIVE_RSVD0_DEFAULT __SHIFTIN(2, MAX2820A_RECEIVE_RSVD0_MASK)
175 1.5 dyoung #define MAX2820A_RECEIVE_RSVD1_MASK __BITS(2,0)
176 1.7 dyoung #define MAX2820A_RECEIVE_RSVD1_DEFAULT __SHIFTIN(2,MAX2820_RECEIVE_RSVD1_MASK)
177 1.1 dyoung
178 1.1 dyoung #define MAX2820_TRANSMIT 5 /* Transmitter Settings Reg. */
179 1.5 dyoung #define MAX2820_TRANSMIT_RSVD_MASK __BITS(11,4) /* reserved */
180 1.5 dyoung #define MAX2820_TRANSMIT_PA_MASK __BITS(3,0) /* PA Bias Select
181 1.1 dyoung * 15 = Highest
182 1.1 dyoung * 0 = Lowest
183 1.1 dyoung */
184 1.7 dyoung #define MAX2820_TRANSMIT_PA_DEFAULT __SHIFTIN(0, MAX2820_TRANSMIT_PA_MASK)
185 1.1 dyoung
186 1.1 dyoung #endif /* _DEV_IC_MAX2820REG_H_ */
187