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mb86960.c revision 1.56.2.4
      1 /*	$NetBSD: mb86960.c,v 1.56.2.4 2004/11/02 07:51:31 skrll Exp $	*/
      2 
      3 /*
      4  * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
      5  *
      6  * This software may be used, modified, copied, distributed, and sold, in
      7  * both source and binary form provided that the above copyright, these
      8  * terms and the following disclaimer are retained.  The name of the author
      9  * and/or the contributor may not be used to endorse or promote products
     10  * derived from this software without specific prior written permission.
     11  *
     12  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
     13  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     14  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     15  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
     16  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     17  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     18  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
     19  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     20  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     21  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     22  * SUCH DAMAGE.
     23  */
     24 
     25 /*
     26  * Portions copyright (C) 1993, David Greenman.  This software may be used,
     27  * modified, copied, distributed, and sold, in both source and binary form
     28  * provided that the above copyright and these terms are retained.  Under no
     29  * circumstances is the author responsible for the proper functioning of this
     30  * software, nor does the author assume any responsibility for damages
     31  * incurred with its use.
     32  */
     33 
     34 #include <sys/cdefs.h>
     35 __KERNEL_RCSID(0, "$NetBSD: mb86960.c,v 1.56.2.4 2004/11/02 07:51:31 skrll Exp $");
     36 
     37 /*
     38  * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
     39  * Contributed by M.S. <seki (at) sysrap.cs.fujitsu.co.jp>
     40  *
     41  * This version is intended to be a generic template for various
     42  * MB86960A/MB86965A based Ethernet cards.  It currently supports
     43  * Fujitsu FMV-180 series (i.e., FMV-181 and FMV-182) and Allied-
     44  * Telesis AT1700 series and RE2000 series.  There are some
     45  * unnecessary hooks embedded, which are primarily intended to support
     46  * other types of Ethernet cards, but the author is not sure whether
     47  * they are useful.
     48  */
     49 
     50 #include "opt_inet.h"
     51 #include "opt_ns.h"
     52 #include "bpfilter.h"
     53 #include "rnd.h"
     54 
     55 #include <sys/param.h>
     56 #include <sys/systm.h>
     57 #include <sys/errno.h>
     58 #include <sys/ioctl.h>
     59 #include <sys/mbuf.h>
     60 #include <sys/socket.h>
     61 #include <sys/syslog.h>
     62 #include <sys/device.h>
     63 #if NRND > 0
     64 #include <sys/rnd.h>
     65 #endif
     66 
     67 #include <net/if.h>
     68 #include <net/if_dl.h>
     69 #include <net/if_types.h>
     70 #include <net/if_media.h>
     71 #include <net/if_ether.h>
     72 
     73 #ifdef INET
     74 #include <netinet/in.h>
     75 #include <netinet/in_systm.h>
     76 #include <netinet/in_var.h>
     77 #include <netinet/ip.h>
     78 #include <netinet/if_inarp.h>
     79 #endif
     80 
     81 #ifdef NS
     82 #include <netns/ns.h>
     83 #include <netns/ns_if.h>
     84 #endif
     85 
     86 #if NBPFILTER > 0
     87 #include <net/bpf.h>
     88 #include <net/bpfdesc.h>
     89 #endif
     90 
     91 #include <machine/bus.h>
     92 
     93 #include <dev/ic/mb86960reg.h>
     94 #include <dev/ic/mb86960var.h>
     95 
     96 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
     97 #define bus_space_write_stream_2	bus_space_write_2
     98 #define bus_space_write_multi_stream_2	bus_space_write_multi_2
     99 #define bus_space_read_multi_stream_2	bus_space_read_multi_2
    100 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
    101 
    102 /* Standard driver entry points.  These can be static. */
    103 void	mb86960_init	__P((struct mb86960_softc *));
    104 int	mb86960_ioctl	__P((struct ifnet *, u_long, caddr_t));
    105 void	mb86960_start	__P((struct ifnet *));
    106 void	mb86960_reset	__P((struct mb86960_softc *));
    107 void	mb86960_watchdog __P((struct ifnet *));
    108 
    109 /* Local functions.  Order of declaration is confused.  FIXME. */
    110 int	mb86960_get_packet __P((struct mb86960_softc *, u_int));
    111 void	mb86960_stop __P((struct mb86960_softc *));
    112 void	mb86960_tint __P((struct mb86960_softc *, u_int8_t));
    113 void	mb86960_rint __P((struct mb86960_softc *, u_int8_t));
    114 static __inline__
    115 void	mb86960_xmit __P((struct mb86960_softc *));
    116 void	mb86960_write_mbufs __P((struct mb86960_softc *, struct mbuf *));
    117 static __inline__
    118 void	mb86960_droppacket __P((struct mb86960_softc *));
    119 void	mb86960_getmcaf __P((struct ethercom *, u_int8_t *));
    120 void	mb86960_setmode __P((struct mb86960_softc *));
    121 void	mb86960_loadmar __P((struct mb86960_softc *));
    122 
    123 int	mb86960_mediachange __P((struct ifnet *));
    124 void	mb86960_mediastatus __P((struct ifnet *, struct ifmediareq *));
    125 
    126 #if FE_DEBUG >= 1
    127 void	mb86960_dump __P((int, struct mb86960_softc *));
    128 #endif
    129 
    130 void
    131 mb86960_attach(sc, myea)
    132 	struct mb86960_softc *sc;
    133 	u_int8_t *myea;
    134 {
    135 	bus_space_tag_t bst = sc->sc_bst;
    136 	bus_space_handle_t bsh = sc->sc_bsh;
    137 
    138 	/* Register values which depend on board design. */
    139 	sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
    140 	sc->proto_dlcr5 = 0;
    141 	sc->proto_dlcr7 = FE_D7_BYTSWP_LH;
    142 	if ((sc->sc_flags & FE_FLAGS_MB86960) != 0)
    143 		sc->proto_dlcr7 |= FE_D7_ED_TEST; /* XXX */
    144 	sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
    145 
    146 	/*
    147 	 * Program the 86960 as following defaults:
    148 	 *	SRAM: 32KB, 100ns, byte-wide access.
    149 	 *	Transmission buffer: 4KB x 2.
    150 	 *	System bus interface: 16 bits.
    151 	 * These values except TXBSIZE should be modified as per
    152 	 * sc_flags which is set in MD attachments, because they
    153 	 * are hard-wired on the board. Modifying TXBSIZE will affect
    154 	 * the driver performance.
    155 	 */
    156 	sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB |
    157 	    FE_D6_BBW_BYTE | FE_D6_SRAM_100ns;
    158 	if (sc->sc_flags & FE_FLAGS_SBW_BYTE)
    159 		sc->proto_dlcr6 |= FE_D6_SBW_BYTE;
    160 	if (sc->sc_flags & FE_FLAGS_SRAM_150ns)
    161 		sc->proto_dlcr6 &= ~FE_D6_SRAM_100ns;
    162 
    163 	/*
    164 	 * Minimum initialization of the hardware.
    165 	 * We write into registers; hope I/O ports have no
    166 	 * overlap with other boards.
    167 	 */
    168 
    169 	/* Initialize 86960. */
    170 	bus_space_write_1(bst, bsh, FE_DLCR6,
    171 	    sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
    172 	delay(200);
    173 
    174 #ifdef DIAGNOSTIC
    175 	if (myea == NULL) {
    176 		printf("%s: ethernet address shouldn't be NULL\n",
    177 		    sc->sc_dev.dv_xname);
    178 		panic("NULL ethernet address");
    179 	}
    180 #endif
    181 	memcpy(sc->sc_enaddr, myea, sizeof(sc->sc_enaddr));
    182 
    183 	/* Disable all interrupts. */
    184 	bus_space_write_1(bst, bsh, FE_DLCR2, 0);
    185 	bus_space_write_1(bst, bsh, FE_DLCR3, 0);
    186 }
    187 
    188 /*
    189  * Install interface into kernel networking data structures
    190  */
    191 void
    192 mb86960_config(sc, media, nmedia, defmedia)
    193 	struct mb86960_softc *sc;
    194 	int *media, nmedia, defmedia;
    195 {
    196 	struct cfdata *cf = sc->sc_dev.dv_cfdata;
    197 	struct ifnet *ifp = &sc->sc_ec.ec_if;
    198 	int i;
    199 
    200 	/* Stop the 86960. */
    201 	mb86960_stop(sc);
    202 
    203 	/* Initialize ifnet structure. */
    204 	strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
    205 	ifp->if_softc = sc;
    206 	ifp->if_start = mb86960_start;
    207 	ifp->if_ioctl = mb86960_ioctl;
    208 	ifp->if_watchdog = mb86960_watchdog;
    209 	ifp->if_flags =
    210 	    IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
    211 	IFQ_SET_READY(&ifp->if_snd);
    212 
    213 #if FE_DEBUG >= 3
    214 	log(LOG_INFO, "%s: mb86960_config()\n", sc->sc_dev.dv_xname);
    215 	mb86960_dump(LOG_INFO, sc);
    216 #endif
    217 
    218 #if FE_SINGLE_TRANSMISSION
    219 	/* Override txb config to allocate minimum. */
    220 	sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
    221 	sc->proto_dlcr6 |=  FE_D6_TXBSIZ_2x2KB;
    222 #endif
    223 
    224 	/* Modify hardware config if it is requested. */
    225 	if ((cf->cf_flags & FE_FLAGS_OVERRIDE_DLCR6) != 0)
    226 		sc->proto_dlcr6 = cf->cf_flags & FE_FLAGS_DLCR6_VALUE;
    227 
    228 	/* Find TX buffer size, based on the hardware dependent proto. */
    229 	switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
    230 	case FE_D6_TXBSIZ_2x2KB:
    231 		sc->txb_size = 2048;
    232 		break;
    233 	case FE_D6_TXBSIZ_2x4KB:
    234 		sc->txb_size = 4096;
    235 		break;
    236 	case FE_D6_TXBSIZ_2x8KB:
    237 		sc->txb_size = 8192;
    238 		break;
    239 	default:
    240 		/* Oops, we can't work with single buffer configuration. */
    241 #if FE_DEBUG >= 2
    242 		log(LOG_WARNING, "%s: strange TXBSIZ config; fixing\n",
    243 		    sc->sc_dev.dv_xname);
    244 #endif
    245 		sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
    246 		sc->proto_dlcr6 |=  FE_D6_TXBSIZ_2x2KB;
    247 		sc->txb_size = 2048;
    248 		break;
    249 	}
    250 
    251 	/* Initialize media goo. */
    252 	ifmedia_init(&sc->sc_media, 0, mb86960_mediachange,
    253 	    mb86960_mediastatus);
    254 	if (media != NULL) {
    255 		for (i = 0; i < nmedia; i++)
    256 			ifmedia_add(&sc->sc_media, media[i], 0, NULL);
    257 		ifmedia_set(&sc->sc_media, defmedia);
    258 	} else {
    259 		ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
    260 		ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
    261 	}
    262 
    263 	/* Attach the interface. */
    264 	if_attach(ifp);
    265 	ether_ifattach(ifp, sc->sc_enaddr);
    266 
    267 #if NRND > 0
    268 	rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
    269 	    RND_TYPE_NET, 0);
    270 #endif
    271 	/* Print additional info when attached. */
    272 	printf("%s: Ethernet address %s\n", sc->sc_dev.dv_xname,
    273 	    ether_sprintf(sc->sc_enaddr));
    274 
    275 #if FE_DEBUG >= 3
    276 	{
    277 		int buf, txb, bbw, sbw, ram;
    278 
    279 		buf = txb = bbw = sbw = ram = -1;
    280 		switch (sc->proto_dlcr6 & FE_D6_BUFSIZ) {
    281 		case FE_D6_BUFSIZ_8KB:
    282 			buf = 8;
    283 			break;
    284 		case FE_D6_BUFSIZ_16KB:
    285 			buf = 16;
    286 			break;
    287 		case FE_D6_BUFSIZ_32KB:
    288 			buf = 32;
    289 			break;
    290 		case FE_D6_BUFSIZ_64KB:
    291 			buf = 64;
    292 			break;
    293 		}
    294 		switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
    295 		case FE_D6_TXBSIZ_2x2KB:
    296 			txb = 2;
    297 			break;
    298 		case FE_D6_TXBSIZ_2x4KB:
    299 			txb = 4;
    300 			break;
    301 		case FE_D6_TXBSIZ_2x8KB:
    302 			txb = 8;
    303 			break;
    304 		}
    305 		switch (sc->proto_dlcr6 & FE_D6_BBW) {
    306 		case FE_D6_BBW_BYTE:
    307 			bbw = 8;
    308 			break;
    309 		case FE_D6_BBW_WORD:
    310 			bbw = 16;
    311 			break;
    312 		}
    313 		switch (sc->proto_dlcr6 & FE_D6_SBW) {
    314 		case FE_D6_SBW_BYTE:
    315 			sbw = 8;
    316 			break;
    317 		case FE_D6_SBW_WORD:
    318 			sbw = 16;
    319 			break;
    320 		}
    321 		switch (sc->proto_dlcr6 & FE_D6_SRAM) {
    322 		case FE_D6_SRAM_100ns:
    323 			ram = 100;
    324 			break;
    325 		case FE_D6_SRAM_150ns:
    326 			ram = 150;
    327 			break;
    328 		}
    329 		printf("%s: SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
    330 		    sc->sc_dev.dv_xname, buf, bbw, ram, txb, sbw);
    331 	}
    332 #endif
    333 
    334 	/* The attach is successful. */
    335 	sc->sc_stat |= FE_STAT_ATTACHED;
    336 }
    337 
    338 /*
    339  * Media change callback.
    340  */
    341 int
    342 mb86960_mediachange(ifp)
    343 	struct ifnet *ifp;
    344 {
    345 	struct mb86960_softc *sc = ifp->if_softc;
    346 
    347 	if (sc->sc_mediachange)
    348 		return ((*sc->sc_mediachange)(sc));
    349 	return (0);
    350 }
    351 
    352 /*
    353  * Media status callback.
    354  */
    355 void
    356 mb86960_mediastatus(ifp, ifmr)
    357 	struct ifnet *ifp;
    358 	struct ifmediareq *ifmr;
    359 {
    360 	struct mb86960_softc *sc = ifp->if_softc;
    361 
    362 	if ((sc->sc_stat & FE_STAT_ENABLED) == 0) {
    363 		ifmr->ifm_active = IFM_ETHER | IFM_NONE;
    364 		ifmr->ifm_status = 0;
    365 		return;
    366 	}
    367 
    368 	if (sc->sc_mediastatus)
    369 		(*sc->sc_mediastatus)(sc, ifmr);
    370 }
    371 
    372 /*
    373  * Reset interface.
    374  */
    375 void
    376 mb86960_reset(sc)
    377 	struct mb86960_softc *sc;
    378 {
    379 	int s;
    380 
    381 	s = splnet();
    382 	mb86960_stop(sc);
    383 	mb86960_init(sc);
    384 	splx(s);
    385 }
    386 
    387 /*
    388  * Stop everything on the interface.
    389  *
    390  * All buffered packets, both transmitting and receiving,
    391  * if any, will be lost by stopping the interface.
    392  */
    393 void
    394 mb86960_stop(sc)
    395 	struct mb86960_softc *sc;
    396 {
    397 	bus_space_tag_t bst = sc->sc_bst;
    398 	bus_space_handle_t bsh = sc->sc_bsh;
    399 
    400 #if FE_DEBUG >= 3
    401 	log(LOG_INFO, "%s: top of mb86960_stop()\n", sc->sc_dev.dv_xname);
    402 	mb86960_dump(LOG_INFO, sc);
    403 #endif
    404 
    405 	/* Disable interrupts. */
    406 	bus_space_write_1(bst, bsh, FE_DLCR2, 0x00);
    407 	bus_space_write_1(bst, bsh, FE_DLCR3, 0x00);
    408 
    409 	/* Stop interface hardware. */
    410 	delay(200);
    411 	bus_space_write_1(bst, bsh, FE_DLCR6,
    412 	    sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
    413 	delay(200);
    414 
    415 	/* Clear all interrupt status. */
    416 	bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF);
    417 	bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF);
    418 
    419 	/* Put the chip in stand-by mode. */
    420 	delay(200);
    421 	bus_space_write_1(bst, bsh, FE_DLCR7,
    422 	    sc->proto_dlcr7 | FE_D7_POWER_DOWN);
    423 	delay(200);
    424 
    425 	/* MAR loading can be delayed. */
    426 	sc->filter_change = 0;
    427 
    428 	/* Call a hook. */
    429 	if (sc->stop_card)
    430 		(*sc->stop_card)(sc);
    431 
    432 #if FE_DEBUG >= 3
    433 	log(LOG_INFO, "%s: end of mb86960_stop()\n", sc->sc_dev.dv_xname);
    434 	mb86960_dump(LOG_INFO, sc);
    435 #endif
    436 }
    437 
    438 /*
    439  * Device timeout/watchdog routine. Entered if the device neglects to
    440  * generate an interrupt after a transmit has been started on it.
    441  */
    442 void
    443 mb86960_watchdog(ifp)
    444 	struct ifnet *ifp;
    445 {
    446 	struct mb86960_softc *sc = ifp->if_softc;
    447 
    448 	log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
    449 #if FE_DEBUG >= 3
    450 	mb86960_dump(LOG_INFO, sc);
    451 #endif
    452 
    453 	/* Record how many packets are lost by this accident. */
    454 	sc->sc_ec.ec_if.if_oerrors += sc->txb_sched + sc->txb_count;
    455 
    456 	mb86960_reset(sc);
    457 }
    458 
    459 /*
    460  * Drop (skip) a packet from receive buffer in 86960 memory.
    461  */
    462 static __inline__ void
    463 mb86960_droppacket(sc)
    464 	struct mb86960_softc *sc;
    465 {
    466 	bus_space_tag_t bst = sc->sc_bst;
    467 	bus_space_handle_t bsh = sc->sc_bsh;
    468 
    469 	bus_space_write_1(bst, bsh, FE_BMPR14, FE_B14_FILTER | FE_B14_SKIP);
    470 }
    471 
    472 /*
    473  * Initialize device.
    474  */
    475 void
    476 mb86960_init(sc)
    477 	struct mb86960_softc *sc;
    478 {
    479 	bus_space_tag_t bst = sc->sc_bst;
    480 	bus_space_handle_t bsh = sc->sc_bsh;
    481 	struct ifnet *ifp = &sc->sc_ec.ec_if;
    482 	int i;
    483 
    484 #if FE_DEBUG >= 3
    485 	log(LOG_INFO, "%s: top of mb86960_init()\n", sc->sc_dev.dv_xname);
    486 	mb86960_dump(LOG_INFO, sc);
    487 #endif
    488 
    489 	/* Reset transmitter flags. */
    490 	ifp->if_flags &= ~IFF_OACTIVE;
    491 	ifp->if_timer = 0;
    492 
    493 	sc->txb_free = sc->txb_size;
    494 	sc->txb_count = 0;
    495 	sc->txb_sched = 0;
    496 
    497 	/* Do any card-specific initialization, if applicable. */
    498 	if (sc->init_card)
    499 		(*sc->init_card)(sc);
    500 
    501 #if FE_DEBUG >= 3
    502 	log(LOG_INFO, "%s: after init hook\n", sc->sc_dev.dv_xname);
    503 	mb86960_dump(LOG_INFO, sc);
    504 #endif
    505 
    506 	/*
    507 	 * Make sure to disable the chip, also.
    508 	 * This may also help re-programming the chip after
    509 	 * hot insertion of PCMCIAs.
    510 	 */
    511 	bus_space_write_1(bst, bsh, FE_DLCR6,
    512 	    sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
    513 	delay(200);
    514 
    515 	/* Power up the chip and select register bank for DLCRs. */
    516 	bus_space_write_1(bst, bsh, FE_DLCR7,
    517 	    sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
    518 	delay(200);
    519 
    520 	/* Feed the station address. */
    521 	bus_space_write_region_1(bst, bsh, FE_DLCR8,
    522 	    sc->sc_enaddr, ETHER_ADDR_LEN);
    523 
    524 	/* Select the BMPR bank for runtime register access. */
    525 	bus_space_write_1(bst, bsh, FE_DLCR7,
    526 	    sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
    527 
    528 	/* Initialize registers. */
    529 	bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF);	/* Clear all bits. */
    530 	bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF);	/* ditto. */
    531 	bus_space_write_1(bst, bsh, FE_DLCR2, 0x00);
    532 	bus_space_write_1(bst, bsh, FE_DLCR3, 0x00);
    533 	bus_space_write_1(bst, bsh, FE_DLCR4, sc->proto_dlcr4);
    534 	bus_space_write_1(bst, bsh, FE_DLCR5, sc->proto_dlcr5);
    535 	bus_space_write_1(bst, bsh, FE_BMPR10, 0x00);
    536 	bus_space_write_1(bst, bsh, FE_BMPR11, FE_B11_CTRL_SKIP);
    537 	bus_space_write_1(bst, bsh, FE_BMPR12, 0x00);
    538 	bus_space_write_1(bst, bsh, FE_BMPR13, sc->proto_bmpr13);
    539 	bus_space_write_1(bst, bsh, FE_BMPR14, FE_B14_FILTER);
    540 	bus_space_write_1(bst, bsh, FE_BMPR15, 0x00);
    541 
    542 #if FE_DEBUG >= 3
    543 	log(LOG_INFO, "%s: just before enabling DLC\n", sc->sc_dev.dv_xname);
    544 	mb86960_dump(LOG_INFO, sc);
    545 #endif
    546 
    547 	/* Enable interrupts. */
    548 	bus_space_write_1(bst, bsh, FE_DLCR2, FE_TMASK);
    549 	bus_space_write_1(bst, bsh, FE_DLCR3, FE_RMASK);
    550 
    551 	/* Enable transmitter and receiver. */
    552 	delay(200);
    553 	bus_space_write_1(bst, bsh, FE_DLCR6,
    554 	    sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
    555 	delay(200);
    556 
    557 #if FE_DEBUG >= 3
    558 	log(LOG_INFO, "%s: just after enabling DLC\n", sc->sc_dev.dv_xname);
    559 	mb86960_dump(LOG_INFO, sc);
    560 #endif
    561 
    562 	/*
    563 	 * Make sure to empty the receive buffer.
    564 	 *
    565 	 * This may be redundant, but *if* the receive buffer were full
    566 	 * at this point, the driver would hang.  I have experienced
    567 	 * some strange hangups just after UP.  I hope the following
    568 	 * code solve the problem.
    569 	 *
    570 	 * I have changed the order of hardware initialization.
    571 	 * I think the receive buffer cannot have any packets at this
    572 	 * point in this version.  The following code *must* be
    573 	 * redundant now.  FIXME.
    574 	 */
    575 	for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
    576 		if (bus_space_read_1(bst, bsh, FE_DLCR5) & FE_D5_BUFEMP)
    577 			break;
    578 		mb86960_droppacket(sc);
    579 	}
    580 #if FE_DEBUG >= 1
    581 	if (i >= FE_MAX_RECV_COUNT)
    582 		log(LOG_ERR, "%s: cannot empty receive buffer\n",
    583 		    sc->sc_dev.dv_xname);
    584 #endif
    585 #if FE_DEBUG >= 3
    586 	if (i < FE_MAX_RECV_COUNT)
    587 		log(LOG_INFO, "%s: receive buffer emptied (%d)\n",
    588 		    sc->sc_dev.dv_xname, i);
    589 #endif
    590 
    591 #if FE_DEBUG >= 3
    592 	log(LOG_INFO, "%s: after ERB loop\n", sc->sc_dev.dv_xname);
    593 	mb86960_dump(LOG_INFO, sc);
    594 #endif
    595 
    596 	/* Do we need this here? */
    597 	bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF);	/* Clear all bits. */
    598 	bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF);	/* ditto. */
    599 
    600 #if FE_DEBUG >= 3
    601 	log(LOG_INFO, "%s: after FIXME\n", sc->sc_dev.dv_xname);
    602 	mb86960_dump(LOG_INFO, sc);
    603 #endif
    604 
    605 	/* Set 'running' flag. */
    606 	ifp->if_flags |= IFF_RUNNING;
    607 
    608 	/*
    609 	 * At this point, the interface is runnung properly,
    610 	 * except that it receives *no* packets.  we then call
    611 	 * mb86960_setmode() to tell the chip what packets to be
    612 	 * received, based on the if_flags and multicast group
    613 	 * list.  It completes the initialization process.
    614 	 */
    615 	mb86960_setmode(sc);
    616 
    617 #if FE_DEBUG >= 3
    618 	log(LOG_INFO, "%s: after setmode\n", sc->sc_dev.dv_xname);
    619 	mb86960_dump(LOG_INFO, sc);
    620 #endif
    621 
    622 	/* ...and attempt to start output. */
    623 	mb86960_start(ifp);
    624 
    625 #if FE_DEBUG >= 3
    626 	log(LOG_INFO, "%s: end of mb86960_init()\n", sc->sc_dev.dv_xname);
    627 	mb86960_dump(LOG_INFO, sc);
    628 #endif
    629 }
    630 
    631 /*
    632  * This routine actually starts the transmission on the interface
    633  */
    634 static __inline__ void
    635 mb86960_xmit(sc)
    636 	struct mb86960_softc *sc;
    637 {
    638 	bus_space_tag_t bst = sc->sc_bst;
    639 	bus_space_handle_t bsh = sc->sc_bsh;
    640 
    641 	/*
    642 	 * Set a timer just in case we never hear from the board again.
    643 	 * We use longer timeout for multiple packet transmission.
    644 	 * I'm not sure this timer value is appropriate.  FIXME.
    645 	 */
    646 	sc->sc_ec.ec_if.if_timer = 1 + sc->txb_count;
    647 
    648 	/* Update txb variables. */
    649 	sc->txb_sched = sc->txb_count;
    650 	sc->txb_count = 0;
    651 	sc->txb_free = sc->txb_size;
    652 
    653 #if FE_DELAYED_PADDING
    654 	/* Omit the postponed padding process. */
    655 	sc->txb_padding = 0;
    656 #endif
    657 
    658 	/* Start transmitter, passing packets in TX buffer. */
    659 	bus_space_write_1(bst, bsh, FE_BMPR10, sc->txb_sched | FE_B10_START);
    660 }
    661 
    662 /*
    663  * Start output on interface.
    664  * We make two assumptions here:
    665  *  1) that the current priority is set to splnet _before_ this code
    666  *     is called *and* is returned to the appropriate priority after
    667  *     return
    668  *  2) that the IFF_OACTIVE flag is checked before this code is called
    669  *     (i.e. that the output part of the interface is idle)
    670  */
    671 void
    672 mb86960_start(ifp)
    673 	struct ifnet *ifp;
    674 {
    675 	struct mb86960_softc *sc = ifp->if_softc;
    676 	struct mbuf *m;
    677 
    678 #if FE_DEBUG >= 1
    679 	/* Just a sanity check. */
    680 	if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
    681 		/*
    682 		 * Txb_count and txb_free co-works to manage the
    683 		 * transmission buffer.  Txb_count keeps track of the
    684 		 * used potion of the buffer, while txb_free does unused
    685 		 * potion.  So, as long as the driver runs properly,
    686 		 * txb_count is zero if and only if txb_free is same
    687 		 * as txb_size (which represents whole buffer.)
    688 		 */
    689 		log(LOG_ERR, "%s: inconsistent txb variables (%d, %d)\n",
    690 		    sc->sc_dev.dv_xname, sc->txb_count, sc->txb_free);
    691 		/*
    692 		 * So, what should I do, then?
    693 		 *
    694 		 * We now know txb_count and txb_free contradicts.  We
    695 		 * cannot, however, tell which is wrong.  More
    696 		 * over, we cannot peek 86960 transmission buffer or
    697 		 * reset the transmission buffer.  (In fact, we can
    698 		 * reset the entire interface.  I don't want to do it.)
    699 		 *
    700 		 * If txb_count is incorrect, leaving it as is will cause
    701 		 * sending of gabages after next interrupt.  We have to
    702 		 * avoid it.  Hence, we reset the txb_count here.  If
    703 		 * txb_free was incorrect, resetting txb_count just loose
    704 		 * some packets.  We can live with it.
    705 		 */
    706 		sc->txb_count = 0;
    707 	}
    708 #endif
    709 
    710 #if FE_DEBUG >= 1
    711 	/*
    712 	 * First, see if there are buffered packets and an idle
    713 	 * transmitter - should never happen at this point.
    714 	 */
    715 	if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
    716 		log(LOG_ERR, "%s: transmitter idle with %d buffered packets\n",
    717 		    sc->sc_dev.dv_xname, sc->txb_count);
    718 		mb86960_xmit(sc);
    719 	}
    720 #endif
    721 
    722 	/*
    723 	 * Stop accepting more transmission packets temporarily, when
    724 	 * a filter change request is delayed.  Updating the MARs on
    725 	 * 86960 flushes the transmisstion buffer, so it is delayed
    726 	 * until all buffered transmission packets have been sent
    727 	 * out.
    728 	 */
    729 	if (sc->filter_change) {
    730 		/*
    731 		 * Filter change request is delayed only when the DLC is
    732 		 * working.  DLC soon raise an interrupt after finishing
    733 		 * the work.
    734 		 */
    735 		goto indicate_active;
    736 	}
    737 
    738 	for (;;) {
    739 		/*
    740 		 * See if there is room to put another packet in the buffer.
    741 		 * We *could* do better job by peeking the send queue to
    742 		 * know the length of the next packet.  Current version just
    743 		 * tests against the worst case (i.e., longest packet).  FIXME.
    744 		 *
    745 		 * When adding the packet-peek feature, don't forget adding a
    746 		 * test on txb_count against QUEUEING_MAX.
    747 		 * There is a little chance the packet count exceeds
    748 		 * the limit.  Assume transmission buffer is 8KB (2x8KB
    749 		 * configuration) and an application sends a bunch of small
    750 		 * (i.e., minimum packet sized) packets rapidly.  An 8KB
    751 		 * buffer can hold 130 blocks of 62 bytes long...
    752 		 */
    753 		if (sc->txb_free <
    754 		    (ETHER_MAX_LEN - ETHER_CRC_LEN) + FE_TXLEN_SIZE) {
    755 			/* No room. */
    756 			goto indicate_active;
    757 		}
    758 
    759 #if FE_SINGLE_TRANSMISSION
    760 		if (sc->txb_count > 0) {
    761 			/* Just one packet per a transmission buffer. */
    762 			goto indicate_active;
    763 		}
    764 #endif
    765 
    766 		/*
    767 		 * Get the next mbuf chain for a packet to send.
    768 		 */
    769 		IFQ_DEQUEUE(&ifp->if_snd, m);
    770 		if (m == 0) {
    771 			/* No more packets to send. */
    772 			goto indicate_inactive;
    773 		}
    774 
    775 #if NBPFILTER > 0
    776 		/* Tap off here if there is a BPF listener. */
    777 		if (ifp->if_bpf)
    778 			bpf_mtap(ifp->if_bpf, m);
    779 #endif
    780 
    781 		/*
    782 		 * Copy the mbuf chain into the transmission buffer.
    783 		 * txb_* variables are updated as necessary.
    784 		 */
    785 		mb86960_write_mbufs(sc, m);
    786 
    787 		m_freem(m);
    788 
    789 		/* Start transmitter if it's idle. */
    790 		if (sc->txb_sched == 0)
    791 			mb86960_xmit(sc);
    792 	}
    793 
    794 indicate_inactive:
    795 	/*
    796 	 * We are using the !OACTIVE flag to indicate to
    797 	 * the outside world that we can accept an
    798 	 * additional packet rather than that the
    799 	 * transmitter is _actually_ active.  Indeed, the
    800 	 * transmitter may be active, but if we haven't
    801 	 * filled all the buffers with data then we still
    802 	 * want to accept more.
    803 	 */
    804 	ifp->if_flags &= ~IFF_OACTIVE;
    805 	return;
    806 
    807 indicate_active:
    808 	/*
    809 	 * The transmitter is active, and there are no room for
    810 	 * more outgoing packets in the transmission buffer.
    811 	 */
    812 	ifp->if_flags |= IFF_OACTIVE;
    813 	return;
    814 }
    815 
    816 /*
    817  * Transmission interrupt handler
    818  * The control flow of this function looks silly.  FIXME.
    819  */
    820 void
    821 mb86960_tint(sc, tstat)
    822 	struct mb86960_softc *sc;
    823 	u_int8_t tstat;
    824 {
    825 	bus_space_tag_t bst = sc->sc_bst;
    826 	bus_space_handle_t bsh = sc->sc_bsh;
    827 	struct ifnet *ifp = &sc->sc_ec.ec_if;
    828 	int left;
    829 	int col;
    830 
    831 	/*
    832 	 * Handle "excessive collision" interrupt.
    833 	 */
    834 	if (tstat & FE_D0_COLL16) {
    835 		/*
    836 		 * Find how many packets (including this collided one)
    837 		 * are left unsent in transmission buffer.
    838 		 */
    839 		left = bus_space_read_1(bst, bsh, FE_BMPR10);
    840 
    841 #if FE_DEBUG >= 2
    842 		log(LOG_WARNING, "%s: excessive collision (%d/%d)\n",
    843 		    sc->sc_dev.dv_xname, left, sc->txb_sched);
    844 #endif
    845 #if FE_DEBUG >= 3
    846 		mb86960_dump(LOG_INFO, sc);
    847 #endif
    848 
    849 		/*
    850 		 * Update statistics.
    851 		 */
    852 		ifp->if_collisions += 16;
    853 		ifp->if_oerrors++;
    854 		ifp->if_opackets += sc->txb_sched - left;
    855 
    856 		/*
    857 		 * Collision statistics has been updated.
    858 		 * Clear the collision flag on 86960 now to avoid confusion.
    859 		 */
    860 		bus_space_write_1(bst, bsh, FE_DLCR0, FE_D0_COLLID);
    861 
    862 		/*
    863 		 * Restart transmitter, skipping the
    864 		 * collided packet.
    865 		 *
    866 		 * We *must* skip the packet to keep network running
    867 		 * properly.  Excessive collision error is an
    868 		 * indication of the network overload.  If we
    869 		 * tried sending the same packet after excessive
    870 		 * collision, the network would be filled with
    871 		 * out-of-time packets.  Packets belonging
    872 		 * to reliable transport (such as TCP) are resent
    873 		 * by some upper layer.
    874 		 */
    875 		bus_space_write_1(bst, bsh, FE_BMPR11,
    876 		    FE_B11_CTRL_SKIP | FE_B11_MODE1);
    877 		sc->txb_sched = left - 1;
    878 	}
    879 
    880 	/*
    881 	 * Handle "transmission complete" interrupt.
    882 	 */
    883 	if (tstat & FE_D0_TXDONE) {
    884 		/*
    885 		 * Add in total number of collisions on last
    886 		 * transmission.  We also clear "collision occurred" flag
    887 		 * here.
    888 		 *
    889 		 * 86960 has a design flow on collision count on multiple
    890 		 * packet transmission.  When we send two or more packets
    891 		 * with one start command (that's what we do when the
    892 		 * transmission queue is clauded), 86960 informs us number
    893 		 * of collisions occurred on the last packet on the
    894 		 * transmission only.  Number of collisions on previous
    895 		 * packets are lost.  I have told that the fact is clearly
    896 		 * stated in the Fujitsu document.
    897 		 *
    898 		 * I considered not to mind it seriously.  Collision
    899 		 * count is not so important, anyway.  Any comments?  FIXME.
    900 		 */
    901 
    902 		if (bus_space_read_1(bst, bsh, FE_DLCR0) & FE_D0_COLLID) {
    903 			/* Clear collision flag. */
    904 			bus_space_write_1(bst, bsh, FE_DLCR0, FE_D0_COLLID);
    905 
    906 			/* Extract collision count from 86960. */
    907 			col = bus_space_read_1(bst, bsh, FE_DLCR4) & FE_D4_COL;
    908 			if (col == 0) {
    909 				/*
    910 				 * Status register indicates collisions,
    911 				 * while the collision count is zero.
    912 				 * This can happen after multiple packet
    913 				 * transmission, indicating that one or more
    914 				 * previous packet(s) had been collided.
    915 				 *
    916 				 * Since the accurate number of collisions
    917 				 * has been lost, we just guess it as 1;
    918 				 * Am I too optimistic?  FIXME.
    919 				 */
    920 				col = 1;
    921 			} else
    922 				col >>= FE_D4_COL_SHIFT;
    923 			ifp->if_collisions += col;
    924 #if FE_DEBUG >= 4
    925 			log(LOG_WARNING, "%s: %d collision%s (%d)\n",
    926 			    sc->sc_dev.dv_xname, col, col == 1 ? "" : "s",
    927 			    sc->txb_sched);
    928 #endif
    929 		}
    930 
    931 		/*
    932 		 * Update total number of successfully
    933 		 * transmitted packets.
    934 		 */
    935 		ifp->if_opackets += sc->txb_sched;
    936 		sc->txb_sched = 0;
    937 	}
    938 
    939 	if (sc->txb_sched == 0) {
    940 		/*
    941 		 * The transmitter is no more active.
    942 		 * Reset output active flag and watchdog timer.
    943 		 */
    944 		ifp->if_flags &= ~IFF_OACTIVE;
    945 		ifp->if_timer = 0;
    946 
    947 		/*
    948 		 * If more data is ready to transmit in the buffer, start
    949 		 * transmitting them.  Otherwise keep transmitter idle,
    950 		 * even if more data is queued.  This gives receive
    951 		 * process a slight priority.
    952 		 */
    953 		if (sc->txb_count > 0)
    954 			mb86960_xmit(sc);
    955 	}
    956 }
    957 
    958 /*
    959  * Ethernet interface receiver interrupt.
    960  */
    961 void
    962 mb86960_rint(sc, rstat)
    963 	struct mb86960_softc *sc;
    964 	u_int8_t rstat;
    965 {
    966 	bus_space_tag_t bst = sc->sc_bst;
    967 	bus_space_handle_t bsh = sc->sc_bsh;
    968 	struct ifnet *ifp = &sc->sc_ec.ec_if;
    969 	u_int status, len;
    970 	int i;
    971 
    972 	/*
    973 	 * Update statistics if this interrupt is caused by an error.
    974 	 */
    975 	if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | FE_D1_ALGERR |
    976 	    FE_D1_SRTPKT)) {
    977 #if FE_DEBUG >= 3
    978 		char sbuf[sizeof(FE_D1_ERRBITS) + 64];
    979 
    980 		bitmask_snprintf(rstat, FE_D1_ERRBITS, sbuf, sizeof(sbuf));
    981 		log(LOG_WARNING, "%s: receive error: %s\n",
    982 		    sc->sc_dev.dv_xname, sbuf);
    983 #endif
    984 		ifp->if_ierrors++;
    985 	}
    986 
    987 	/*
    988 	 * MB86960 has a flag indicating "receive queue empty."
    989 	 * We just loop checking the flag to pull out all received
    990 	 * packets.
    991 	 *
    992 	 * We limit the number of iterrations to avoid infinite loop.
    993 	 * It can be caused by a very slow CPU (some broken
    994 	 * peripheral may insert incredible number of wait cycles)
    995 	 * or, worse, by a broken MB86960 chip.
    996 	 */
    997 	for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
    998 		/* Stop the iterration if 86960 indicates no packets. */
    999 		if (bus_space_read_1(bst, bsh, FE_DLCR5) & FE_D5_BUFEMP)
   1000 			break;
   1001 
   1002 		/*
   1003 		 * Extract receive packet status from the receive
   1004 		 * packet header.
   1005 		 */
   1006 		if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
   1007 			status = bus_space_read_1(bst, bsh, FE_BMPR8);
   1008 			(void)bus_space_read_1(bst, bsh, FE_BMPR8);
   1009 		} else
   1010 			status = bus_space_read_2(bst, bsh, FE_BMPR8);
   1011 
   1012 #if FE_DEBUG >= 4
   1013 		log(LOG_INFO, "%s: receive status = %02x\n",
   1014 		    sc->sc_dev.dv_xname, status);
   1015 #endif
   1016 
   1017 		/*
   1018 		 * If there was an error, update statistics and drop
   1019 		 * the packet, unless the interface is in promiscuous
   1020 		 * mode.
   1021 		 */
   1022 		if ((status & FE_RXSTAT_GOODPKT) == 0) {
   1023 			if ((ifp->if_flags & IFF_PROMISC) == 0) {
   1024 				ifp->if_ierrors++;
   1025 				mb86960_droppacket(sc);
   1026 				continue;
   1027 			}
   1028 		}
   1029 
   1030 		/*
   1031 		 * Extract the packet length from the receive packet header.
   1032 		 * It is a sum of a header (14 bytes) and a payload.
   1033 		 * CRC has been stripped off by the 86960.
   1034 		 */
   1035 		if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
   1036 			len  = bus_space_read_1(bst, bsh, FE_BMPR8);
   1037 			len |= bus_space_read_1(bst, bsh, FE_BMPR8) << 8;
   1038 		} else
   1039 			len = bus_space_read_2(bst, bsh, FE_BMPR8);
   1040 
   1041 		/*
   1042 		 * MB86965 checks the packet length and drop big packet
   1043 		 * before passing it to us.  There are no chance we can
   1044 		 * get [crufty] packets.  Hence, if the length exceeds
   1045 		 * the specified limit, it means some serious failure,
   1046 		 * such as out-of-sync on receive buffer management.
   1047 		 *
   1048 		 * Is this statement true?  FIXME.
   1049 		 */
   1050 		if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN) ||
   1051 		    len < ETHER_HDR_LEN) {
   1052 #if FE_DEBUG >= 2
   1053 			log(LOG_WARNING,
   1054 			    "%s: received a %s packet? (%u bytes)\n",
   1055 			    sc->sc_dev.dv_xname,
   1056 			    len < ETHER_HDR_LEN ? "partial" : "big", len);
   1057 #endif
   1058 			ifp->if_ierrors++;
   1059 			mb86960_droppacket(sc);
   1060 			continue;
   1061 		}
   1062 
   1063 		/*
   1064 		 * Check for a short (RUNT) packet.  We *do* check
   1065 		 * but do nothing other than print a message.
   1066 		 * Short packets are illegal, but does nothing bad
   1067 		 * if it carries data for upper layer.
   1068 		 */
   1069 #if FE_DEBUG >= 2
   1070 		if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) {
   1071 			log(LOG_WARNING,
   1072 			    "%s: received a short packet? (%u bytes)\n",
   1073 			    sc->sc_dev.dv_xname, len);
   1074 		}
   1075 #endif
   1076 
   1077 		/*
   1078 		 * Go get a packet.
   1079 		 */
   1080 		if (mb86960_get_packet(sc, len) == 0) {
   1081 			/* Skip a packet, updating statistics. */
   1082 #if FE_DEBUG >= 2
   1083 			log(LOG_WARNING,
   1084 			    "%s: out of mbufs; dropping packet (%u bytes)\n",
   1085 			    sc->sc_dev.dv_xname, len);
   1086 #endif
   1087 			ifp->if_ierrors++;
   1088 			mb86960_droppacket(sc);
   1089 
   1090 			/*
   1091 			 * We stop receiving packets, even if there are
   1092 			 * more in the buffer.  We hope we can get more
   1093 			 * mbufs next time.
   1094 			 */
   1095 			return;
   1096 		}
   1097 
   1098 		/* Successfully received a packet.  Update stat. */
   1099 		ifp->if_ipackets++;
   1100 	}
   1101 }
   1102 
   1103 /*
   1104  * Ethernet interface interrupt processor
   1105  */
   1106 int
   1107 mb86960_intr(arg)
   1108 	void *arg;
   1109 {
   1110 	struct mb86960_softc *sc = arg;
   1111 	bus_space_tag_t bst = sc->sc_bst;
   1112 	bus_space_handle_t bsh = sc->sc_bsh;
   1113 	struct ifnet *ifp = &sc->sc_ec.ec_if;
   1114 	u_int8_t tstat, rstat;
   1115 
   1116 	if ((sc->sc_stat & FE_STAT_ENABLED) == 0 ||
   1117 	    (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
   1118 		return (0);
   1119 
   1120 #if FE_DEBUG >= 4
   1121 	log(LOG_INFO, "%s: mb86960_intr()\n", sc->sc_dev.dv_xname);
   1122 	mb86960_dump(LOG_INFO, sc);
   1123 #endif
   1124 
   1125 	/*
   1126 	 * Get interrupt conditions, masking unneeded flags.
   1127 	 */
   1128 	tstat = bus_space_read_1(bst, bsh, FE_DLCR0) & FE_TMASK;
   1129 	rstat = bus_space_read_1(bst, bsh, FE_DLCR1) & FE_RMASK;
   1130 	if (tstat == 0 && rstat == 0)
   1131 		return (0);
   1132 
   1133 	/*
   1134 	 * Loop until there are no more new interrupt conditions.
   1135 	 */
   1136 	for (;;) {
   1137 		/*
   1138 		 * Reset the conditions we are acknowledging.
   1139 		 */
   1140 		bus_space_write_1(bst, bsh, FE_DLCR0, tstat);
   1141 		bus_space_write_1(bst, bsh, FE_DLCR1, rstat);
   1142 
   1143 		/*
   1144 		 * Handle transmitter interrupts. Handle these first because
   1145 		 * the receiver will reset the board under some conditions.
   1146 		 */
   1147 		if (tstat != 0)
   1148 			mb86960_tint(sc, tstat);
   1149 
   1150 		/*
   1151 		 * Handle receiver interrupts.
   1152 		 */
   1153 		if (rstat != 0)
   1154 			mb86960_rint(sc, rstat);
   1155 
   1156 		/*
   1157 		 * Update the multicast address filter if it is
   1158 		 * needed and possible.  We do it now, because
   1159 		 * we can make sure the transmission buffer is empty,
   1160 		 * and there is a good chance that the receive queue
   1161 		 * is empty.  It will minimize the possibility of
   1162 		 * packet lossage.
   1163 		 */
   1164 		if (sc->filter_change &&
   1165 		    sc->txb_count == 0 && sc->txb_sched == 0) {
   1166 			mb86960_loadmar(sc);
   1167 			ifp->if_flags &= ~IFF_OACTIVE;
   1168 		}
   1169 
   1170 		/*
   1171 		 * If it looks like the transmitter can take more data,
   1172 		 * attempt to start output on the interface. This is done
   1173 		 * after handling the receiver interrupt to give the
   1174 		 * receive operation priority.
   1175 		 */
   1176 		if ((ifp->if_flags & IFF_OACTIVE) == 0)
   1177 			mb86960_start(ifp);
   1178 
   1179 #if NRND > 0
   1180 		if (rstat != 0 || tstat != 0)
   1181 			rnd_add_uint32(&sc->rnd_source, rstat + tstat);
   1182 #endif
   1183 
   1184 		/*
   1185 		 * Get interrupt conditions, masking unneeded flags.
   1186 		 */
   1187 		tstat = bus_space_read_1(bst, bsh, FE_DLCR0) & FE_TMASK;
   1188 		rstat = bus_space_read_1(bst, bsh, FE_DLCR1) & FE_RMASK;
   1189 		if (tstat == 0 && rstat == 0)
   1190 			return (1);
   1191 	}
   1192 }
   1193 
   1194 /*
   1195  * Process an ioctl request.  This code needs some work - it looks pretty ugly.
   1196  */
   1197 int
   1198 mb86960_ioctl(ifp, cmd, data)
   1199 	struct ifnet *ifp;
   1200 	u_long cmd;
   1201 	caddr_t data;
   1202 {
   1203 	struct mb86960_softc *sc = ifp->if_softc;
   1204 	struct ifaddr *ifa = (struct ifaddr *)data;
   1205 	struct ifreq *ifr = (struct ifreq *)data;
   1206 	int s, error = 0;
   1207 
   1208 #if FE_DEBUG >= 3
   1209 	log(LOG_INFO, "%s: ioctl(%lx)\n", sc->sc_dev.dv_xname, cmd);
   1210 #endif
   1211 
   1212 	s = splnet();
   1213 
   1214 	switch (cmd) {
   1215 	case SIOCSIFADDR:
   1216 		if ((error = mb86960_enable(sc)) != 0)
   1217 			break;
   1218 		ifp->if_flags |= IFF_UP;
   1219 
   1220 		switch (ifa->ifa_addr->sa_family) {
   1221 #ifdef INET
   1222 		case AF_INET:
   1223 			mb86960_init(sc);
   1224 			arp_ifinit(ifp, ifa);
   1225 			break;
   1226 #endif
   1227 #ifdef NS
   1228 		case AF_NS:
   1229 		    {
   1230 			struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
   1231 
   1232 			if (ns_nullhost(*ina))
   1233 				ina->x_host =
   1234 				    *(union ns_host *)LLADDR(ifp->if_sadl);
   1235 			else {
   1236 				memcpy(LLADDR(ifp->if_sadl),
   1237 				    ina->x_host.c_host, ETHER_ADDR_LEN);
   1238 			}
   1239 			/* Set new address. */
   1240 			mb86960_init(sc);
   1241 			break;
   1242 		    }
   1243 #endif
   1244 		default:
   1245 			mb86960_init(sc);
   1246 			break;
   1247 		}
   1248 		break;
   1249 
   1250 	case SIOCSIFFLAGS:
   1251 		if ((ifp->if_flags & IFF_UP) == 0 &&
   1252 		    (ifp->if_flags & IFF_RUNNING) != 0) {
   1253 			/*
   1254 			 * If interface is marked down and it is running, then
   1255 			 * stop it.
   1256 			 */
   1257 			mb86960_stop(sc);
   1258 			ifp->if_flags &= ~IFF_RUNNING;
   1259 			mb86960_disable(sc);
   1260 		} else if ((ifp->if_flags & IFF_UP) != 0 &&
   1261 		    (ifp->if_flags & IFF_RUNNING) == 0) {
   1262 			/*
   1263 			 * If interface is marked up and it is stopped, then
   1264 			 * start it.
   1265 			 */
   1266 			if ((error = mb86960_enable(sc)) != 0)
   1267 				break;
   1268 			mb86960_init(sc);
   1269 		} else if ((ifp->if_flags & IFF_UP) != 0) {
   1270 			/*
   1271 			 * Reset the interface to pick up changes in any other
   1272 			 * flags that affect hardware registers.
   1273 			 */
   1274 			mb86960_setmode(sc);
   1275 		}
   1276 #if FE_DEBUG >= 1
   1277 		/* "ifconfig fe0 debug" to print register dump. */
   1278 		if (ifp->if_flags & IFF_DEBUG) {
   1279 			log(LOG_INFO, "%s: SIOCSIFFLAGS(DEBUG)\n",
   1280 			    sc->sc_dev.dv_xname);
   1281 			mb86960_dump(LOG_DEBUG, sc);
   1282 		}
   1283 #endif
   1284 		break;
   1285 
   1286 	case SIOCADDMULTI:
   1287 	case SIOCDELMULTI:
   1288 		if ((sc->sc_stat & FE_STAT_ENABLED) == 0) {
   1289 			error = EIO;
   1290 			break;
   1291 		}
   1292 
   1293 		/* Update our multicast list. */
   1294 		error = (cmd == SIOCADDMULTI) ?
   1295 		    ether_addmulti(ifr, &sc->sc_ec) :
   1296 		    ether_delmulti(ifr, &sc->sc_ec);
   1297 
   1298 		if (error == ENETRESET) {
   1299 			/*
   1300 			 * Multicast list has changed; set the hardware filter
   1301 			 * accordingly.
   1302 			 */
   1303 			if (ifp->if_flags & IFF_RUNNING)
   1304 				mb86960_setmode(sc);
   1305 			error = 0;
   1306 		}
   1307 		break;
   1308 
   1309 	case SIOCGIFMEDIA:
   1310 	case SIOCSIFMEDIA:
   1311 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
   1312 		break;
   1313 
   1314 	default:
   1315 		error = EINVAL;
   1316 		break;
   1317 	}
   1318 
   1319 	splx(s);
   1320 	return (error);
   1321 }
   1322 
   1323 /*
   1324  * Retrieve packet from receive buffer and send to the next level up via
   1325  * ether_input(). If there is a BPF listener, give a copy to BPF, too.
   1326  * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
   1327  */
   1328 int
   1329 mb86960_get_packet(sc, len)
   1330 	struct mb86960_softc *sc;
   1331 	u_int len;
   1332 {
   1333 	bus_space_tag_t bst = sc->sc_bst;
   1334 	bus_space_handle_t bsh = sc->sc_bsh;
   1335 	struct ifnet *ifp = &sc->sc_ec.ec_if;
   1336 	struct mbuf *m;
   1337 
   1338 	/* Allocate a header mbuf. */
   1339 	MGETHDR(m, M_DONTWAIT, MT_DATA);
   1340 	if (m == 0)
   1341 		return (0);
   1342 	m->m_pkthdr.rcvif = ifp;
   1343 	m->m_pkthdr.len = len;
   1344 
   1345 	/* The following silliness is to make NFS happy. */
   1346 #define	EROUND	((sizeof(struct ether_header) + 3) & ~3)
   1347 #define	EOFF	(EROUND - sizeof(struct ether_header))
   1348 
   1349 	/*
   1350 	 * Our strategy has one more problem.  There is a policy on
   1351 	 * mbuf cluster allocation.  It says that we must have at
   1352 	 * least MINCLSIZE (208 bytes) to allocate a cluster.  For a
   1353 	 * packet of a size between (MHLEN - 2) to (MINCLSIZE - 2),
   1354 	 * our code violates the rule...
   1355 	 * On the other hand, the current code is short, simple,
   1356 	 * and fast, however.  It does no harmful thing, just waists
   1357 	 * some memory.  Any comments?  FIXME.
   1358 	 */
   1359 
   1360 	/* Attach a cluster if this packet doesn't fit in a normal mbuf. */
   1361 	if (len > MHLEN - EOFF) {
   1362 		MCLGET(m, M_DONTWAIT);
   1363 		if ((m->m_flags & M_EXT) == 0) {
   1364 			m_freem(m);
   1365 			return (0);
   1366 		}
   1367 	}
   1368 
   1369 	/*
   1370 	 * The following assumes there is room for the ether header in the
   1371 	 * header mbuf.
   1372 	 */
   1373 	m->m_data += EOFF;
   1374 
   1375 	/* Set the length of this packet. */
   1376 	m->m_len = len;
   1377 
   1378 	/* Get a packet. */
   1379 	if (sc->sc_flags & FE_FLAGS_SBW_BYTE)
   1380 		bus_space_read_multi_1(bst, bsh, FE_BMPR8,
   1381 		    mtod(m, u_int8_t *), len);
   1382 	else
   1383 		bus_space_read_multi_stream_2(bst, bsh, FE_BMPR8,
   1384 		    mtod(m, u_int16_t *), (len + 1) >> 1);
   1385 
   1386 #if NBPFILTER > 0
   1387 	/*
   1388 	 * Check if there's a BPF listener on this interface.  If so, hand off
   1389 	 * the raw packet to bpf.
   1390 	 */
   1391 	if (ifp->if_bpf)
   1392 		bpf_mtap(ifp->if_bpf, m);
   1393 #endif
   1394 
   1395 	(*ifp->if_input)(ifp, m);
   1396 	return (1);
   1397 }
   1398 
   1399 /*
   1400  * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
   1401  * Returns number of bytes actually written, including length word.
   1402  *
   1403  * If an mbuf chain is too long for an Ethernet frame, it is not sent.
   1404  * Packets shorter than Ethernet minimum are legal, and we pad them
   1405  * before sending out.  An exception is "partial" packets which are
   1406  * shorter than mandatory Ethernet header.
   1407  *
   1408  * I wrote a code for an experimental "delayed padding" technique.
   1409  * When employed, it postpones the padding process for short packets.
   1410  * If xmit() occurred at the moment, the padding process is omitted, and
   1411  * garbages are sent as pad data.  If next packet is stored in the
   1412  * transmission buffer before xmit(), write_mbuf() pads the previous
   1413  * packet before transmitting new packet.  This *may* gain the
   1414  * system performance (slightly).
   1415  */
   1416 void
   1417 mb86960_write_mbufs(sc, m)
   1418 	struct mb86960_softc *sc;
   1419 	struct mbuf *m;
   1420 {
   1421 	bus_space_tag_t bst = sc->sc_bst;
   1422 	bus_space_handle_t bsh = sc->sc_bsh;
   1423 	int totlen, len;
   1424 #if FE_DEBUG >= 2
   1425 	struct mbuf *mp;
   1426 #endif
   1427 
   1428 #if FE_DELAYED_PADDING
   1429 	/* Do the "delayed padding." */
   1430 	if (sc->txb_padding > 0) {
   1431 		if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
   1432 			for (len = sc->txb_padding; len > 0; len--)
   1433 				bus_space_write_1(bst, bsh, FE_BMPR8, 0);
   1434 		} else {
   1435 			for (len = sc->txb_padding >> 1; len > 0; len--)
   1436 				bus_space_write_2(bst, bsh, FE_BMPR8, 0);
   1437 		}
   1438 		sc->txb_padding = 0;
   1439 	}
   1440 #endif
   1441 
   1442 	/* We need to use m->m_pkthdr.len, so require the header */
   1443 	if ((m->m_flags & M_PKTHDR) == 0)
   1444 	  	panic("mb86960_write_mbufs: no header mbuf");
   1445 
   1446 #if FE_DEBUG >= 2
   1447 	/* First, count up the total number of bytes to copy. */
   1448 	for (totlen = 0, mp = m; mp != 0; mp = mp->m_next)
   1449 		totlen += mp->m_len;
   1450 	/* Check if this matches the one in the packet header. */
   1451 	if (totlen != m->m_pkthdr.len)
   1452 		log(LOG_WARNING, "%s: packet length mismatch? (%d/%d)\n",
   1453 		    sc->sc_dev.dv_xname, totlen, m->m_pkthdr.len);
   1454 #else
   1455 	/* Just use the length value in the packet header. */
   1456 	totlen = m->m_pkthdr.len;
   1457 #endif
   1458 
   1459 #if FE_DEBUG >= 1
   1460 	/*
   1461 	 * Should never send big packets.  If such a packet is passed,
   1462 	 * it should be a bug of upper layer.  We just ignore it.
   1463 	 * ... Partial (too short) packets, neither.
   1464 	 */
   1465 	if (totlen > (ETHER_MAX_LEN - ETHER_CRC_LEN) ||
   1466 	    totlen < ETHER_HDR_LEN) {
   1467 		log(LOG_ERR, "%s: got a %s packet (%u bytes) to send\n",
   1468 		    sc->sc_dev.dv_xname,
   1469 		    totlen < ETHER_HDR_LEN ? "partial" : "big", totlen);
   1470 		sc->sc_ec.ec_if.if_oerrors++;
   1471 		return;
   1472 	}
   1473 #endif
   1474 
   1475 	/*
   1476 	 * Put the length word for this frame.
   1477 	 * Does 86960 accept odd length?  -- Yes.
   1478 	 * Do we need to pad the length to minimum size by ourselves?
   1479 	 * -- Generally yes.  But for (or will be) the last
   1480 	 * packet in the transmission buffer, we can skip the
   1481 	 * padding process.  It may gain performance slightly.  FIXME.
   1482 	 */
   1483 	len = max(totlen, (ETHER_MIN_LEN - ETHER_CRC_LEN));
   1484 	if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
   1485 		bus_space_write_1(bst, bsh, FE_BMPR8, len);
   1486 		bus_space_write_1(bst, bsh, FE_BMPR8, len >> 8);
   1487 	} else {
   1488 		bus_space_write_2(bst, bsh, FE_BMPR8, len);
   1489 		/* roundup packet length since we will use word access */
   1490 		totlen = (totlen + 1) & ~1;
   1491 	}
   1492 
   1493 	/*
   1494 	 * Update buffer status now.
   1495 	 * Truncate the length up to an even number
   1496 	 * if the chip is set in SBW_WORD mode.
   1497 	 */
   1498 	sc->txb_free -= FE_TXLEN_SIZE +
   1499 	    max(totlen, (ETHER_MIN_LEN - ETHER_CRC_LEN));
   1500 	sc->txb_count++;
   1501 
   1502 #if FE_DELAYED_PADDING
   1503 	/* Postpone the packet padding if necessary. */
   1504 	if (totlen < (ETHER_MIN_LEN - ETHER_CRC_LEN))
   1505 		sc->txb_padding = (ETHER_MIN_LEN - ETHER_CRC_LEN) - totlen;
   1506 #endif
   1507 
   1508 	/*
   1509 	 * Transfer the data from mbuf chain to the transmission buffer.
   1510 	 * If the MB86960 is configured in word mode, data needs to be
   1511 	 * transferred as words, and only words.
   1512 	 * So that we require some extra code to patch over odd-length
   1513 	 * or unaligned mbufs.
   1514 	 */
   1515 	if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
   1516 		/* It's simple in byte mode. */
   1517 		for (; m != NULL; m = m->m_next) {
   1518 			if (m->m_len) {
   1519 				bus_space_write_multi_1(bst, bsh, FE_BMPR8,
   1520 				    mtod(m, u_int8_t *), m->m_len);
   1521 			}
   1522 		}
   1523 	} else {
   1524 		/* a bit trickier in word mode. */
   1525 		u_int8_t *data, savebyte[2];
   1526 		int leftover;
   1527 
   1528 		leftover = 0;
   1529 		savebyte[0] = savebyte[1] = 0;
   1530 
   1531 		for (; m != NULL; m = m->m_next) {
   1532 			len = m->m_len;
   1533 			if (len == 0)
   1534 				continue;
   1535 			data = mtod(m, u_int8_t *);
   1536 			while (len > 0) {
   1537 				if (leftover) {
   1538 					/*
   1539 					 * Data left over (from mbuf or
   1540 					 * realignment). Buffer the next
   1541 					 * byte, and write it and the
   1542 					 * leftover data out.
   1543 					 */
   1544 					savebyte[1] = *data++;
   1545 					len--;
   1546 					bus_space_write_stream_2(bst, bsh,
   1547 					   FE_BMPR8, *(u_int16_t *)savebyte);
   1548 					leftover = 0;
   1549 				} else if (BUS_SPACE_ALIGNED_POINTER(data,
   1550 				    u_int16_t) == 0) {
   1551 					/*
   1552 					 * Unaligned data; buffer the next byte.
   1553 					 */
   1554 					savebyte[0] = *data++;
   1555 					len--;
   1556 					leftover = 1;
   1557 				} else {
   1558 					/*
   1559 					 * Aligned data; output contiguous
   1560 					 * words as much as we can, then
   1561 					 * buffer the remaining byte, if any.
   1562 					 */
   1563 					leftover = len & 1;
   1564 					len &= ~1;
   1565 					bus_space_write_multi_stream_2(bst, bsh,
   1566 					    FE_BMPR8, (u_int16_t *)data,
   1567 					    len >> 1);
   1568 					data += len;
   1569 					if (leftover)
   1570 						savebyte[0] = *data++;
   1571 					len = 0;
   1572 				}
   1573 			}
   1574 			if (len < 0)
   1575 				panic("mb86960_write_mbufs: negative len");
   1576 		}
   1577 		if (leftover) {
   1578 			savebyte[1] = 0;
   1579 			bus_space_write_stream_2(bst, bsh, FE_BMPR8,
   1580 			    *(u_int16_t *)savebyte);
   1581 		}
   1582 	}
   1583 #if FE_DELAYED_PADDING == 0
   1584 	/*
   1585 	 * Pad the packet to the minimum length if necessary.
   1586 	 */
   1587 	len = (ETHER_MIN_LEN - ETHER_CRC_LEN) - totlen;
   1588 	if (len > 0) {
   1589 		if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
   1590 			while (len-- > 0)
   1591 				bus_space_write_1(bst, bsh, FE_BMPR8, 0);
   1592 		} else {
   1593 			len >>= 1;
   1594 			while (len-- > 0)
   1595 				bus_space_write_2(bst, bsh, FE_BMPR8, 0);
   1596 		}
   1597 	}
   1598 #endif
   1599 }
   1600 
   1601 /*
   1602  * Compute the multicast address filter from the
   1603  * list of multicast addresses we need to listen to.
   1604  */
   1605 void
   1606 mb86960_getmcaf(ec, af)
   1607 	struct ethercom *ec;
   1608 	u_int8_t *af;
   1609 {
   1610 	struct ifnet *ifp = &ec->ec_if;
   1611 	struct ether_multi *enm;
   1612 	u_int32_t crc;
   1613 	struct ether_multistep step;
   1614 
   1615 	/*
   1616 	 * Set up multicast address filter by passing all multicast addresses
   1617 	 * through a crc generator, and then using the high order 6 bits as an
   1618 	 * index into the 64 bit logical address filter.  The high order bit
   1619 	 * selects the word, while the rest of the bits select the bit within
   1620 	 * the word.
   1621 	 */
   1622 
   1623 	if ((ifp->if_flags & IFF_PROMISC) != 0)
   1624 		goto allmulti;
   1625 
   1626 	memset(af, 0, FE_FILTER_LEN);
   1627 	ETHER_FIRST_MULTI(step, ec, enm);
   1628 	while (enm != NULL) {
   1629 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
   1630 		    sizeof(enm->enm_addrlo)) != 0) {
   1631 			/*
   1632 			 * We must listen to a range of multicast addresses.
   1633 			 * For now, just accept all multicasts, rather than
   1634 			 * trying to set only those filter bits needed to match
   1635 			 * the range.  (At this time, the only use of address
   1636 			 * ranges is for IP multicast routing, for which the
   1637 			 * range is big enough to require all bits set.)
   1638 			 */
   1639 			goto allmulti;
   1640 		}
   1641 
   1642 		crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
   1643 
   1644 		/* Just want the 6 most significant bits. */
   1645 		crc >>= 26;
   1646 
   1647 		/* Turn on the corresponding bit in the filter. */
   1648 		af[crc >> 3] |= 1 << (crc & 7);
   1649 
   1650 		ETHER_NEXT_MULTI(step, enm);
   1651 	}
   1652 	ifp->if_flags &= ~IFF_ALLMULTI;
   1653 	return;
   1654 
   1655 allmulti:
   1656 	ifp->if_flags |= IFF_ALLMULTI;
   1657 	memset(af, 0xff, FE_FILTER_LEN);
   1658 }
   1659 
   1660 /*
   1661  * Calculate a new "multicast packet filter" and put the 86960
   1662  * receiver in appropriate mode.
   1663  */
   1664 void
   1665 mb86960_setmode(sc)
   1666 	struct mb86960_softc *sc;
   1667 {
   1668 	bus_space_tag_t bst = sc->sc_bst;
   1669 	bus_space_handle_t bsh = sc->sc_bsh;
   1670 	int flags = sc->sc_ec.ec_if.if_flags;
   1671 
   1672 	/*
   1673 	 * If the interface is not running, we postpone the update
   1674 	 * process for receive modes and multicast address filter
   1675 	 * until the interface is restarted.  It reduces some
   1676 	 * complicated job on maintaining chip states.  (Earlier versions
   1677 	 * of this driver had a bug on that point...)
   1678 	 *
   1679 	 * To complete the trick, mb86960_init() calls mb86960_setmode() after
   1680 	 * restarting the interface.
   1681 	 */
   1682 	if ((flags & IFF_RUNNING) == 0)
   1683 		return;
   1684 
   1685 	/*
   1686 	 * Promiscuous mode is handled separately.
   1687 	 */
   1688 	if ((flags & IFF_PROMISC) != 0) {
   1689 		/*
   1690 		 * Program 86960 to receive all packets on the segment
   1691 		 * including those directed to other stations.
   1692 		 * Multicast filter stored in MARs are ignored
   1693 		 * under this setting, so we don't need to update it.
   1694 		 *
   1695 		 * Promiscuous mode is used solely by BPF, and BPF only
   1696 		 * listens to valid (no error) packets.  So, we ignore
   1697 		 * errornous ones even in this mode.
   1698 		 */
   1699 		bus_space_write_1(bst, bsh, FE_DLCR5,
   1700 		    sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
   1701 		sc->filter_change = 0;
   1702 
   1703 #if FE_DEBUG >= 3
   1704 		log(LOG_INFO, "%s: promiscuous mode\n", sc->sc_dev.dv_xname);
   1705 #endif
   1706 		return;
   1707 	}
   1708 
   1709 	/*
   1710 	 * Turn the chip to the normal (non-promiscuous) mode.
   1711 	 */
   1712 	bus_space_write_1(bst, bsh, FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
   1713 
   1714 	/*
   1715 	 * Find the new multicast filter value.
   1716 	 */
   1717 	mb86960_getmcaf(&sc->sc_ec, sc->filter);
   1718 	sc->filter_change = 1;
   1719 
   1720 #if FE_DEBUG >= 3
   1721 	log(LOG_INFO,
   1722 	    "%s: address filter: [%02x %02x %02x %02x %02x %02x %02x %02x]\n",
   1723 	    sc->sc_dev.dv_xname,
   1724 	    sc->filter[0], sc->filter[1], sc->filter[2], sc->filter[3],
   1725 	    sc->filter[4], sc->filter[5], sc->filter[6], sc->filter[7]);
   1726 #endif
   1727 
   1728 	/*
   1729 	 * We have to update the multicast filter in the 86960, A.S.A.P.
   1730 	 *
   1731 	 * Note that the DLC (Data Linc Control unit, i.e. transmitter
   1732 	 * and receiver) must be stopped when feeding the filter, and
   1733 	 * DLC trashes all packets in both transmission and receive
   1734 	 * buffers when stopped.
   1735 	 *
   1736 	 * ... Are the above sentenses correct?  I have to check the
   1737 	 *     manual of the MB86960A.  FIXME.
   1738 	 *
   1739 	 * To reduce the packet lossage, we delay the filter update
   1740 	 * process until buffers are empty.
   1741 	 */
   1742 	if (sc->txb_sched == 0 && sc->txb_count == 0 &&
   1743 	    (bus_space_read_1(bst, bsh, FE_DLCR1) & FE_D1_PKTRDY) == 0) {
   1744 		/*
   1745 		 * Buffers are (apparently) empty.  Load
   1746 		 * the new filter value into MARs now.
   1747 		 */
   1748 		mb86960_loadmar(sc);
   1749 	} else {
   1750 		/*
   1751 		 * Buffers are not empty.  Mark that we have to update
   1752 		 * the MARs.  The new filter will be loaded by mb86960_intr()
   1753 		 * later.
   1754 		 */
   1755 #if FE_DEBUG >= 4
   1756 		log(LOG_INFO, "%s: filter change delayed\n",
   1757 		    sc->sc_dev.dv_xname);
   1758 #endif
   1759 	}
   1760 }
   1761 
   1762 /*
   1763  * Load a new multicast address filter into MARs.
   1764  *
   1765  * The caller must have splnet'ed befor mb86960_loadmar.
   1766  * This function starts the DLC upon return.  So it can be called only
   1767  * when the chip is working, i.e., from the driver's point of view, when
   1768  * a device is RUNNING.  (I mistook the point in previous versions.)
   1769  */
   1770 void
   1771 mb86960_loadmar(sc)
   1772 	struct mb86960_softc *sc;
   1773 {
   1774 	bus_space_tag_t bst = sc->sc_bst;
   1775 	bus_space_handle_t bsh = sc->sc_bsh;
   1776 
   1777 	/* Stop the DLC (transmitter and receiver). */
   1778 	bus_space_write_1(bst, bsh, FE_DLCR6,
   1779 	    sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
   1780 
   1781 	/* Select register bank 1 for MARs. */
   1782 	bus_space_write_1(bst, bsh, FE_DLCR7,
   1783 	    sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
   1784 
   1785 	/* Copy filter value into the registers. */
   1786 	bus_space_write_region_1(bst, bsh, FE_MAR8, sc->filter, FE_FILTER_LEN);
   1787 
   1788 	/* Restore the bank selection for BMPRs (i.e., runtime registers). */
   1789 	bus_space_write_1(bst, bsh, FE_DLCR7,
   1790 	    sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
   1791 
   1792 	/* Restart the DLC. */
   1793 	bus_space_write_1(bst, bsh, FE_DLCR6,
   1794 	    sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
   1795 
   1796 	/* We have just updated the filter. */
   1797 	sc->filter_change = 0;
   1798 
   1799 #if FE_DEBUG >= 3
   1800 	log(LOG_INFO, "%s: address filter changed\n", sc->sc_dev.dv_xname);
   1801 #endif
   1802 }
   1803 
   1804 /*
   1805  * Enable power on the interface.
   1806  */
   1807 int
   1808 mb86960_enable(sc)
   1809 	struct mb86960_softc *sc;
   1810 {
   1811 
   1812 #if FE_DEBUG >= 3
   1813 	log(LOG_INFO, "%s: mb86960_enable()\n", sc->sc_dev.dv_xname);
   1814 #endif
   1815 
   1816 	if ((sc->sc_stat & FE_STAT_ENABLED) == 0 && sc->sc_enable != NULL) {
   1817 		if ((*sc->sc_enable)(sc) != 0) {
   1818 			printf("%s: device enable failed\n",
   1819 			    sc->sc_dev.dv_xname);
   1820 			return (EIO);
   1821 		}
   1822 	}
   1823 
   1824 	sc->sc_stat |= FE_STAT_ENABLED;
   1825 	return (0);
   1826 }
   1827 
   1828 /*
   1829  * Disable power on the interface.
   1830  */
   1831 void
   1832 mb86960_disable(sc)
   1833 	struct mb86960_softc *sc;
   1834 {
   1835 
   1836 #if FE_DEBUG >= 3
   1837 	log(LOG_INFO, "%s: mb86960_disable()\n", sc->sc_dev.dv_xname);
   1838 #endif
   1839 
   1840 	if ((sc->sc_stat & FE_STAT_ENABLED) != 0 && sc->sc_disable != NULL) {
   1841 		(*sc->sc_disable)(sc);
   1842 		sc->sc_stat &= ~FE_STAT_ENABLED;
   1843 	}
   1844 }
   1845 
   1846 /*
   1847  * mbe_activate:
   1848  *
   1849  *	Handle device activation/deactivation requests.
   1850  */
   1851 int
   1852 mb86960_activate(self, act)
   1853 	struct device *self;
   1854 	enum devact act;
   1855 {
   1856 	struct mb86960_softc *sc = (struct mb86960_softc *)self;
   1857 	int rv, s;
   1858 
   1859 	rv = 0;
   1860 	s = splnet();
   1861 	switch (act) {
   1862 	case DVACT_ACTIVATE:
   1863 		rv = EOPNOTSUPP;
   1864 		break;
   1865 
   1866 	case DVACT_DEACTIVATE:
   1867 		if_deactivate(&sc->sc_ec.ec_if);
   1868 		break;
   1869 	}
   1870 	splx(s);
   1871 	return (rv);
   1872 }
   1873 
   1874 /*
   1875  * mb86960_detach:
   1876  *
   1877  *	Detach a MB86960 interface.
   1878  */
   1879 int
   1880 mb86960_detach(sc)
   1881 	struct mb86960_softc *sc;
   1882 {
   1883 	struct ifnet *ifp = &sc->sc_ec.ec_if;
   1884 
   1885 	/* Succeed now if there's no work to do. */
   1886 	if ((sc->sc_stat & FE_STAT_ATTACHED) == 0)
   1887 		return (0);
   1888 
   1889 	/* Delete all media. */
   1890 	ifmedia_delete_instance(&sc->sc_media, IFM_INST_ANY);
   1891 
   1892 #if NRND > 0
   1893 	/* Unhook the entropy source. */
   1894 	rnd_detach_source(&sc->rnd_source);
   1895 #endif
   1896 	ether_ifdetach(ifp);
   1897 	if_detach(ifp);
   1898 
   1899 	mb86960_disable(sc);
   1900 	return (0);
   1901 }
   1902 
   1903 /*
   1904  * Routines to read all bytes from the config EEPROM (93C06) through MB86965A.
   1905  */
   1906 void
   1907 mb86965_read_eeprom(iot, ioh, data)
   1908 	bus_space_tag_t iot;
   1909 	bus_space_handle_t ioh;
   1910 	u_int8_t *data;
   1911 {
   1912 	int addr, op, bit;
   1913 	u_int16_t val;
   1914 
   1915 	/* Read bytes from EEPROM; two bytes per an iteration. */
   1916 	for (addr = 0; addr < FE_EEPROM_SIZE / 2; addr++) {
   1917 		/* Reset the EEPROM interface. */
   1918 		bus_space_write_1(iot, ioh, FE_BMPR16, 0x00);
   1919 		bus_space_write_1(iot, ioh, FE_BMPR17, 0x00);
   1920 		bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT);
   1921 
   1922 		/* Send start bit. */
   1923 		bus_space_write_1(iot, ioh, FE_BMPR17, FE_B17_DATA);
   1924 		FE_EEPROM_DELAY();
   1925 		bus_space_write_1(iot, ioh,
   1926 		    FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK);
   1927 		FE_EEPROM_DELAY();
   1928 		bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT);
   1929 
   1930 		/* Send read command and read address. */
   1931 		op = 0x80 | addr;	/* READ instruction */
   1932 		for (bit = 8; bit > 0; bit--) {
   1933 			bus_space_write_1(iot, ioh, FE_BMPR17,
   1934 			    (op & (1 << (bit - 1))) ? FE_B17_DATA : 0);
   1935 			FE_EEPROM_DELAY();
   1936 			bus_space_write_1(iot, ioh,
   1937 			    FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK);
   1938 			FE_EEPROM_DELAY();
   1939 			bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT);
   1940 		}
   1941 		bus_space_write_1(iot, ioh, FE_BMPR17, 0x00);
   1942 
   1943 		/* Read two bytes in each address */
   1944 		val = 0;
   1945 		for (bit = 16; bit > 0; bit--) {
   1946 			FE_EEPROM_DELAY();
   1947 			bus_space_write_1(iot, ioh,
   1948 			    FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK);
   1949 			FE_EEPROM_DELAY();
   1950 			if (bus_space_read_1(iot, ioh, FE_BMPR17) &
   1951 			    FE_B17_DATA)
   1952 				val |= 1 << (bit - 1);
   1953 			bus_space_write_1(iot, ioh,
   1954 			    FE_BMPR16, FE_B16_SELECT);
   1955 		}
   1956 		data[addr * 2]     = val >> 8;
   1957 		data[addr * 2 + 1] = val & 0xff;
   1958 	}
   1959 
   1960 	/* Make sure the EEPROM is turned off. */
   1961 	bus_space_write_1(iot, ioh, FE_BMPR16, 0);
   1962 	bus_space_write_1(iot, ioh, FE_BMPR17, 0);
   1963 
   1964 #if FE_DEBUG >= 3
   1965 	/* Report what we got. */
   1966 	log(LOG_INFO, "mb86965_read_eeprom: "
   1967 	    " %02x%02x%02x%02x %02x%02x%02x%02x -"
   1968 	    " %02x%02x%02x%02x %02x%02x%02x%02x -"
   1969 	    " %02x%02x%02x%02x %02x%02x%02x%02x -"
   1970 	    " %02x%02x%02x%02x %02x%02x%02x%02x\n",
   1971 	    data[ 0], data[ 1], data[ 2], data[ 3],
   1972 	    data[ 4], data[ 5], data[ 6], data[ 7],
   1973 	    data[ 8], data[ 9], data[10], data[11],
   1974 	    data[12], data[13], data[14], data[15],
   1975 	    data[16], data[17], data[18], data[19],
   1976 	    data[20], data[21], data[22], data[23],
   1977 	    data[24], data[25], data[26], data[27],
   1978 	    data[28], data[29], data[30], data[31]);
   1979 #endif
   1980 }
   1981 
   1982 #if FE_DEBUG >= 1
   1983 void
   1984 mb86960_dump(level, sc)
   1985 	int level;
   1986 	struct mb86960_softc *sc;
   1987 {
   1988 	bus_space_tag_t bst = sc->sc_bst;
   1989 	bus_space_handle_t bsh = sc->sc_bsh;
   1990 	u_int8_t save_dlcr7;
   1991 
   1992 	save_dlcr7 = bus_space_read_1(bst, bsh, FE_DLCR7);
   1993 
   1994 	log(level, "\tDLCR = %02x %02x %02x %02x %02x %02x %02x %02x\n",
   1995 	    bus_space_read_1(bst, bsh, FE_DLCR0),
   1996 	    bus_space_read_1(bst, bsh, FE_DLCR1),
   1997 	    bus_space_read_1(bst, bsh, FE_DLCR2),
   1998 	    bus_space_read_1(bst, bsh, FE_DLCR3),
   1999 	    bus_space_read_1(bst, bsh, FE_DLCR4),
   2000 	    bus_space_read_1(bst, bsh, FE_DLCR5),
   2001 	    bus_space_read_1(bst, bsh, FE_DLCR6),
   2002 	    bus_space_read_1(bst, bsh, FE_DLCR7));
   2003 
   2004 	bus_space_write_1(bst, bsh, FE_DLCR7,
   2005 	    (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_DLCR);
   2006 	log(level, "\t       %02x %02x %02x %02x %02x %02x %02x %02x\n",
   2007 	    bus_space_read_1(bst, bsh, FE_DLCR8),
   2008 	    bus_space_read_1(bst, bsh, FE_DLCR9),
   2009 	    bus_space_read_1(bst, bsh, FE_DLCR10),
   2010 	    bus_space_read_1(bst, bsh, FE_DLCR11),
   2011 	    bus_space_read_1(bst, bsh, FE_DLCR12),
   2012 	    bus_space_read_1(bst, bsh, FE_DLCR13),
   2013 	    bus_space_read_1(bst, bsh, FE_DLCR14),
   2014 	    bus_space_read_1(bst, bsh, FE_DLCR15));
   2015 
   2016 	bus_space_write_1(bst, bsh, FE_DLCR7,
   2017 	    (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_MAR);
   2018 	log(level, "\tMAR  = %02x %02x %02x %02x %02x %02x %02x %02x\n",
   2019 	    bus_space_read_1(bst, bsh, FE_MAR8),
   2020 	    bus_space_read_1(bst, bsh, FE_MAR9),
   2021 	    bus_space_read_1(bst, bsh, FE_MAR10),
   2022 	    bus_space_read_1(bst, bsh, FE_MAR11),
   2023 	    bus_space_read_1(bst, bsh, FE_MAR12),
   2024 	    bus_space_read_1(bst, bsh, FE_MAR13),
   2025 	    bus_space_read_1(bst, bsh, FE_MAR14),
   2026 	    bus_space_read_1(bst, bsh, FE_MAR15));
   2027 
   2028 	bus_space_write_1(bst, bsh, FE_DLCR7,
   2029 	    (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_BMPR);
   2030 	log(level,
   2031 	    "\tBMPR = xx xx %02x %02x %02x %02x %02x %02x %02x %02x xx %02x\n",
   2032 	    bus_space_read_1(bst, bsh, FE_BMPR10),
   2033 	    bus_space_read_1(bst, bsh, FE_BMPR11),
   2034 	    bus_space_read_1(bst, bsh, FE_BMPR12),
   2035 	    bus_space_read_1(bst, bsh, FE_BMPR13),
   2036 	    bus_space_read_1(bst, bsh, FE_BMPR14),
   2037 	    bus_space_read_1(bst, bsh, FE_BMPR15),
   2038 	    bus_space_read_1(bst, bsh, FE_BMPR16),
   2039 	    bus_space_read_1(bst, bsh, FE_BMPR17),
   2040 	    bus_space_read_1(bst, bsh, FE_BMPR19));
   2041 
   2042 	bus_space_write_1(bst, bsh, FE_DLCR7, save_dlcr7);
   2043 }
   2044 #endif
   2045 
   2046