mb86960.c revision 1.89 1 /* $NetBSD: mb86960.c,v 1.89 2019/02/05 06:17:02 msaitoh Exp $ */
2
3 /*
4 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
5 *
6 * This software may be used, modified, copied, distributed, and sold, in
7 * both source and binary form provided that the above copyright, these
8 * terms and the following disclaimer are retained. The name of the author
9 * and/or the contributor may not be used to endorse or promote products
10 * derived from this software without specific prior written permission.
11 *
12 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
13 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
14 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
15 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
16 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
17 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
18 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
19 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
20 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
21 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
22 * SUCH DAMAGE.
23 */
24
25 /*
26 * Portions copyright (C) 1993, David Greenman. This software may be used,
27 * modified, copied, distributed, and sold, in both source and binary form
28 * provided that the above copyright and these terms are retained. Under no
29 * circumstances is the author responsible for the proper functioning of this
30 * software, nor does the author assume any responsibility for damages
31 * incurred with its use.
32 */
33
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: mb86960.c,v 1.89 2019/02/05 06:17:02 msaitoh Exp $");
36
37 /*
38 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
39 * Contributed by M.S. <seki (at) sysrap.cs.fujitsu.co.jp>
40 *
41 * This version is intended to be a generic template for various
42 * MB86960A/MB86965A based Ethernet cards. It currently supports
43 * Fujitsu FMV-180 series (i.e., FMV-181 and FMV-182) and Allied-
44 * Telesis AT1700 series and RE2000 series. There are some
45 * unnecessary hooks embedded, which are primarily intended to support
46 * other types of Ethernet cards, but the author is not sure whether
47 * they are useful.
48 */
49
50 #include "opt_inet.h"
51
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/errno.h>
55 #include <sys/ioctl.h>
56 #include <sys/mbuf.h>
57 #include <sys/socket.h>
58 #include <sys/syslog.h>
59 #include <sys/device.h>
60 #include <sys/rndsource.h>
61
62 #include <net/if.h>
63 #include <net/if_dl.h>
64 #include <net/if_types.h>
65 #include <net/if_media.h>
66 #include <net/if_ether.h>
67 #include <net/bpf.h>
68
69 #ifdef INET
70 #include <netinet/in.h>
71 #include <netinet/in_systm.h>
72 #include <netinet/in_var.h>
73 #include <netinet/ip.h>
74 #include <netinet/if_inarp.h>
75 #endif
76
77 #include <sys/bus.h>
78
79 #include <dev/ic/mb86960reg.h>
80 #include <dev/ic/mb86960var.h>
81
82 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
83 #define bus_space_write_stream_2 bus_space_write_2
84 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
85 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
86 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
87
88 /* Standard driver entry points. These can be static. */
89 void mb86960_init(struct mb86960_softc *);
90 int mb86960_ioctl(struct ifnet *, u_long, void *);
91 void mb86960_start(struct ifnet *);
92 void mb86960_reset(struct mb86960_softc *);
93 void mb86960_watchdog(struct ifnet *);
94
95 /* Local functions. Order of declaration is confused. FIXME. */
96 int mb86960_get_packet(struct mb86960_softc *, u_int);
97 void mb86960_stop(struct mb86960_softc *);
98 void mb86960_tint(struct mb86960_softc *, uint8_t);
99 void mb86960_rint(struct mb86960_softc *, uint8_t);
100 static inline
101 void mb86960_xmit(struct mb86960_softc *);
102 void mb86960_write_mbufs(struct mb86960_softc *, struct mbuf *);
103 static inline
104 void mb86960_droppacket(struct mb86960_softc *);
105 void mb86960_getmcaf(struct ethercom *, uint8_t *);
106 void mb86960_setmode(struct mb86960_softc *);
107 void mb86960_loadmar(struct mb86960_softc *);
108
109 int mb86960_mediachange(struct ifnet *);
110 void mb86960_mediastatus(struct ifnet *, struct ifmediareq *);
111
112 #if FE_DEBUG >= 1
113 void mb86960_dump(int, struct mb86960_softc *);
114 #endif
115
116 void
117 mb86960_attach(struct mb86960_softc *sc, uint8_t *myea)
118 {
119 bus_space_tag_t bst = sc->sc_bst;
120 bus_space_handle_t bsh = sc->sc_bsh;
121
122 /* Register values which depend on board design. */
123 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
124 sc->proto_dlcr5 = 0;
125 sc->proto_dlcr7 = FE_D7_BYTSWP_LH;
126 if ((sc->sc_flags & FE_FLAGS_MB86960) != 0)
127 sc->proto_dlcr7 |= FE_D7_ED_TEST; /* XXX */
128 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
129
130 /*
131 * Program the 86960 as following defaults:
132 * SRAM: 32KB, 100ns, byte-wide access.
133 * Transmission buffer: 4KB x 2.
134 * System bus interface: 16 bits.
135 * These values except TXBSIZE should be modified as per
136 * sc_flags which is set in MD attachments, because they
137 * are hard-wired on the board. Modifying TXBSIZE will affect
138 * the driver performance.
139 */
140 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB |
141 FE_D6_BBW_BYTE | FE_D6_SRAM_100ns;
142 if (sc->sc_flags & FE_FLAGS_SBW_BYTE)
143 sc->proto_dlcr6 |= FE_D6_SBW_BYTE;
144 if (sc->sc_flags & FE_FLAGS_SRAM_150ns)
145 sc->proto_dlcr6 &= ~FE_D6_SRAM_100ns;
146
147 /*
148 * Minimum initialization of the hardware.
149 * We write into registers; hope I/O ports have no
150 * overlap with other boards.
151 */
152
153 /* Initialize 86960. */
154 bus_space_write_1(bst, bsh, FE_DLCR6,
155 sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
156 delay(200);
157
158 #ifdef DIAGNOSTIC
159 if (myea == NULL) {
160 aprint_error_dev(sc->sc_dev,
161 "ethernet address shouldn't be NULL\n");
162 panic("NULL ethernet address");
163 }
164 #endif
165 memcpy(sc->sc_enaddr, myea, sizeof(sc->sc_enaddr));
166
167 /* Disable all interrupts. */
168 bus_space_write_1(bst, bsh, FE_DLCR2, 0);
169 bus_space_write_1(bst, bsh, FE_DLCR3, 0);
170 }
171
172 /*
173 * Install interface into kernel networking data structures
174 */
175 void
176 mb86960_config(struct mb86960_softc *sc, int *media, int nmedia, int defmedia)
177 {
178 cfdata_t cf = device_cfdata(sc->sc_dev);
179 struct ifnet *ifp = &sc->sc_ec.ec_if;
180 int i;
181
182 /* Stop the 86960. */
183 mb86960_stop(sc);
184
185 /* Initialize ifnet structure. */
186 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
187 ifp->if_softc = sc;
188 ifp->if_start = mb86960_start;
189 ifp->if_ioctl = mb86960_ioctl;
190 ifp->if_watchdog = mb86960_watchdog;
191 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
192 IFQ_SET_READY(&ifp->if_snd);
193
194 #if FE_DEBUG >= 3
195 log(LOG_INFO, "%s: mb86960_config()\n", device_xname(sc->sc_dev));
196 mb86960_dump(LOG_INFO, sc);
197 #endif
198
199 #if FE_SINGLE_TRANSMISSION
200 /* Override txb config to allocate minimum. */
201 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
202 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
203 #endif
204
205 /* Modify hardware config if it is requested. */
206 if ((cf->cf_flags & FE_FLAGS_OVERRIDE_DLCR6) != 0)
207 sc->proto_dlcr6 = cf->cf_flags & FE_FLAGS_DLCR6_VALUE;
208
209 /* Find TX buffer size, based on the hardware dependent proto. */
210 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
211 case FE_D6_TXBSIZ_2x2KB:
212 sc->txb_size = 2048;
213 break;
214 case FE_D6_TXBSIZ_2x4KB:
215 sc->txb_size = 4096;
216 break;
217 case FE_D6_TXBSIZ_2x8KB:
218 sc->txb_size = 8192;
219 break;
220 default:
221 /* Oops, we can't work with single buffer configuration. */
222 #if FE_DEBUG >= 2
223 log(LOG_WARNING, "%s: strange TXBSIZ config; fixing\n",
224 device_xname(sc->sc_dev));
225 #endif
226 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
227 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
228 sc->txb_size = 2048;
229 break;
230 }
231
232 /* Initialize media goo. */
233 ifmedia_init(&sc->sc_media, 0, mb86960_mediachange,
234 mb86960_mediastatus);
235 if (media != NULL) {
236 for (i = 0; i < nmedia; i++)
237 ifmedia_add(&sc->sc_media, media[i], 0, NULL);
238 ifmedia_set(&sc->sc_media, defmedia);
239 } else {
240 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
241 ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
242 }
243
244 /* Attach the interface. */
245 if_attach(ifp);
246 if_deferred_start_init(ifp, NULL);
247 ether_ifattach(ifp, sc->sc_enaddr);
248
249 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev),
250 RND_TYPE_NET, RND_FLAG_DEFAULT);
251
252 /* Print additional info when attached. */
253 aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n",
254 ether_sprintf(sc->sc_enaddr));
255
256 #if FE_DEBUG >= 3
257 {
258 int buf, txb, bbw, sbw, ram;
259
260 buf = txb = bbw = sbw = ram = -1;
261 switch (sc->proto_dlcr6 & FE_D6_BUFSIZ) {
262 case FE_D6_BUFSIZ_8KB:
263 buf = 8;
264 break;
265 case FE_D6_BUFSIZ_16KB:
266 buf = 16;
267 break;
268 case FE_D6_BUFSIZ_32KB:
269 buf = 32;
270 break;
271 case FE_D6_BUFSIZ_64KB:
272 buf = 64;
273 break;
274 }
275 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
276 case FE_D6_TXBSIZ_2x2KB:
277 txb = 2;
278 break;
279 case FE_D6_TXBSIZ_2x4KB:
280 txb = 4;
281 break;
282 case FE_D6_TXBSIZ_2x8KB:
283 txb = 8;
284 break;
285 }
286 switch (sc->proto_dlcr6 & FE_D6_BBW) {
287 case FE_D6_BBW_BYTE:
288 bbw = 8;
289 break;
290 case FE_D6_BBW_WORD:
291 bbw = 16;
292 break;
293 }
294 switch (sc->proto_dlcr6 & FE_D6_SBW) {
295 case FE_D6_SBW_BYTE:
296 sbw = 8;
297 break;
298 case FE_D6_SBW_WORD:
299 sbw = 16;
300 break;
301 }
302 switch (sc->proto_dlcr6 & FE_D6_SRAM) {
303 case FE_D6_SRAM_100ns:
304 ram = 100;
305 break;
306 case FE_D6_SRAM_150ns:
307 ram = 150;
308 break;
309 }
310 aprint_debug_dev(sc->sc_dev,
311 "SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
312 buf, bbw, ram, txb, sbw);
313 }
314 #endif
315
316 /* The attach is successful. */
317 sc->sc_stat |= FE_STAT_ATTACHED;
318 }
319
320 /*
321 * Media change callback.
322 */
323 int
324 mb86960_mediachange(struct ifnet *ifp)
325 {
326 struct mb86960_softc *sc = ifp->if_softc;
327
328 if (sc->sc_mediachange)
329 return (*sc->sc_mediachange)(sc);
330 return 0;
331 }
332
333 /*
334 * Media status callback.
335 */
336 void
337 mb86960_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
338 {
339 struct mb86960_softc *sc = ifp->if_softc;
340
341 if ((sc->sc_stat & FE_STAT_ENABLED) == 0) {
342 ifmr->ifm_active = IFM_ETHER | IFM_NONE;
343 ifmr->ifm_status = 0;
344 return;
345 }
346
347 if (sc->sc_mediastatus)
348 (*sc->sc_mediastatus)(sc, ifmr);
349 }
350
351 /*
352 * Reset interface.
353 */
354 void
355 mb86960_reset(struct mb86960_softc *sc)
356 {
357 int s;
358
359 s = splnet();
360 mb86960_stop(sc);
361 mb86960_init(sc);
362 splx(s);
363 }
364
365 /*
366 * Stop everything on the interface.
367 *
368 * All buffered packets, both transmitting and receiving,
369 * if any, will be lost by stopping the interface.
370 */
371 void
372 mb86960_stop(struct mb86960_softc *sc)
373 {
374 bus_space_tag_t bst = sc->sc_bst;
375 bus_space_handle_t bsh = sc->sc_bsh;
376
377 #if FE_DEBUG >= 3
378 log(LOG_INFO, "%s: top of mb86960_stop()\n", device_xname(sc->sc_dev));
379 mb86960_dump(LOG_INFO, sc);
380 #endif
381
382 /* Disable interrupts. */
383 bus_space_write_1(bst, bsh, FE_DLCR2, 0x00);
384 bus_space_write_1(bst, bsh, FE_DLCR3, 0x00);
385
386 /* Stop interface hardware. */
387 delay(200);
388 bus_space_write_1(bst, bsh, FE_DLCR6,
389 sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
390 delay(200);
391
392 /* Clear all interrupt status. */
393 bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF);
394 bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF);
395
396 /* Put the chip in stand-by mode. */
397 delay(200);
398 bus_space_write_1(bst, bsh, FE_DLCR7,
399 sc->proto_dlcr7 | FE_D7_POWER_DOWN);
400 delay(200);
401
402 /* MAR loading can be delayed. */
403 sc->filter_change = 0;
404
405 /* Call a hook. */
406 if (sc->stop_card)
407 (*sc->stop_card)(sc);
408
409 #if FE_DEBUG >= 3
410 log(LOG_INFO, "%s: end of mb86960_stop()\n", device_xname(sc->sc_dev));
411 mb86960_dump(LOG_INFO, sc);
412 #endif
413 }
414
415 /*
416 * Device timeout/watchdog routine. Entered if the device neglects to
417 * generate an interrupt after a transmit has been started on it.
418 */
419 void
420 mb86960_watchdog(struct ifnet *ifp)
421 {
422 struct mb86960_softc *sc = ifp->if_softc;
423
424 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev));
425 #if FE_DEBUG >= 3
426 mb86960_dump(LOG_INFO, sc);
427 #endif
428
429 /* Record how many packets are lost by this accident. */
430 sc->sc_ec.ec_if.if_oerrors += sc->txb_sched + sc->txb_count;
431
432 mb86960_reset(sc);
433 }
434
435 /*
436 * Drop (skip) a packet from receive buffer in 86960 memory.
437 */
438 static inline void
439 mb86960_droppacket(struct mb86960_softc *sc)
440 {
441 bus_space_tag_t bst = sc->sc_bst;
442 bus_space_handle_t bsh = sc->sc_bsh;
443
444 bus_space_write_1(bst, bsh, FE_BMPR14, FE_B14_FILTER | FE_B14_SKIP);
445 }
446
447 /*
448 * Initialize device.
449 */
450 void
451 mb86960_init(struct mb86960_softc *sc)
452 {
453 bus_space_tag_t bst = sc->sc_bst;
454 bus_space_handle_t bsh = sc->sc_bsh;
455 struct ifnet *ifp = &sc->sc_ec.ec_if;
456 int i;
457
458 #if FE_DEBUG >= 3
459 log(LOG_INFO, "%s: top of mb86960_init()\n", device_xname(sc->sc_dev));
460 mb86960_dump(LOG_INFO, sc);
461 #endif
462
463 /* Reset transmitter flags. */
464 ifp->if_flags &= ~IFF_OACTIVE;
465 ifp->if_timer = 0;
466
467 sc->txb_free = sc->txb_size;
468 sc->txb_count = 0;
469 sc->txb_sched = 0;
470
471 /* Do any card-specific initialization, if applicable. */
472 if (sc->init_card)
473 (*sc->init_card)(sc);
474
475 #if FE_DEBUG >= 3
476 log(LOG_INFO, "%s: after init hook\n", device_xname(sc->sc_dev));
477 mb86960_dump(LOG_INFO, sc);
478 #endif
479
480 /*
481 * Make sure to disable the chip, also.
482 * This may also help re-programming the chip after
483 * hot insertion of PCMCIAs.
484 */
485 bus_space_write_1(bst, bsh, FE_DLCR6,
486 sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
487 delay(200);
488
489 /* Power up the chip and select register bank for DLCRs. */
490 bus_space_write_1(bst, bsh, FE_DLCR7,
491 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
492 delay(200);
493
494 /* Feed the station address. */
495 bus_space_write_region_1(bst, bsh, FE_DLCR8,
496 sc->sc_enaddr, ETHER_ADDR_LEN);
497
498 /* Select the BMPR bank for runtime register access. */
499 bus_space_write_1(bst, bsh, FE_DLCR7,
500 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
501
502 /* Initialize registers. */
503 bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF); /* Clear all bits. */
504 bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF); /* ditto. */
505 bus_space_write_1(bst, bsh, FE_DLCR2, 0x00);
506 bus_space_write_1(bst, bsh, FE_DLCR3, 0x00);
507 bus_space_write_1(bst, bsh, FE_DLCR4, sc->proto_dlcr4);
508 bus_space_write_1(bst, bsh, FE_DLCR5, sc->proto_dlcr5);
509 bus_space_write_1(bst, bsh, FE_BMPR10, 0x00);
510 bus_space_write_1(bst, bsh, FE_BMPR11, FE_B11_CTRL_SKIP);
511 bus_space_write_1(bst, bsh, FE_BMPR12, 0x00);
512 bus_space_write_1(bst, bsh, FE_BMPR13, sc->proto_bmpr13);
513 bus_space_write_1(bst, bsh, FE_BMPR14, FE_B14_FILTER);
514 bus_space_write_1(bst, bsh, FE_BMPR15, 0x00);
515
516 #if FE_DEBUG >= 3
517 log(LOG_INFO, "%s: just before enabling DLC\n",
518 device_xname(sc->sc_dev));
519 mb86960_dump(LOG_INFO, sc);
520 #endif
521
522 /* Enable interrupts. */
523 bus_space_write_1(bst, bsh, FE_DLCR2, FE_TMASK);
524 bus_space_write_1(bst, bsh, FE_DLCR3, FE_RMASK);
525
526 /* Enable transmitter and receiver. */
527 delay(200);
528 bus_space_write_1(bst, bsh, FE_DLCR6,
529 sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
530 delay(200);
531
532 #if FE_DEBUG >= 3
533 log(LOG_INFO, "%s: just after enabling DLC\n",
534 device_xname(sc->sc_dev));
535 mb86960_dump(LOG_INFO, sc);
536 #endif
537
538 /*
539 * Make sure to empty the receive buffer.
540 *
541 * This may be redundant, but *if* the receive buffer were full
542 * at this point, the driver would hang. I have experienced
543 * some strange hangups just after UP. I hope the following
544 * code solve the problem.
545 *
546 * I have changed the order of hardware initialization.
547 * I think the receive buffer cannot have any packets at this
548 * point in this version. The following code *must* be
549 * redundant now. FIXME.
550 */
551 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
552 if (bus_space_read_1(bst, bsh, FE_DLCR5) & FE_D5_BUFEMP)
553 break;
554 mb86960_droppacket(sc);
555 }
556 #if FE_DEBUG >= 1
557 if (i >= FE_MAX_RECV_COUNT)
558 log(LOG_ERR, "%s: cannot empty receive buffer\n",
559 device_xname(sc->sc_dev));
560 #endif
561 #if FE_DEBUG >= 3
562 if (i < FE_MAX_RECV_COUNT)
563 log(LOG_INFO, "%s: receive buffer emptied (%d)\n",
564 device_xname(sc->sc_dev), i);
565 #endif
566
567 #if FE_DEBUG >= 3
568 log(LOG_INFO, "%s: after ERB loop\n", device_xname(sc->sc_dev));
569 mb86960_dump(LOG_INFO, sc);
570 #endif
571
572 /* Do we need this here? */
573 bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF); /* Clear all bits. */
574 bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF); /* ditto. */
575
576 #if FE_DEBUG >= 3
577 log(LOG_INFO, "%s: after FIXME\n", device_xname(sc->sc_dev));
578 mb86960_dump(LOG_INFO, sc);
579 #endif
580
581 /* Set 'running' flag. */
582 ifp->if_flags |= IFF_RUNNING;
583
584 /*
585 * At this point, the interface is runnung properly,
586 * except that it receives *no* packets. we then call
587 * mb86960_setmode() to tell the chip what packets to be
588 * received, based on the if_flags and multicast group
589 * list. It completes the initialization process.
590 */
591 mb86960_setmode(sc);
592
593 #if FE_DEBUG >= 3
594 log(LOG_INFO, "%s: after setmode\n", device_xname(sc->sc_dev));
595 mb86960_dump(LOG_INFO, sc);
596 #endif
597
598 /* ...and attempt to start output. */
599 mb86960_start(ifp);
600
601 #if FE_DEBUG >= 3
602 log(LOG_INFO, "%s: end of mb86960_init()\n", device_xname(sc->sc_dev));
603 mb86960_dump(LOG_INFO, sc);
604 #endif
605 }
606
607 /*
608 * This routine actually starts the transmission on the interface
609 */
610 static inline void
611 mb86960_xmit(struct mb86960_softc *sc)
612 {
613 bus_space_tag_t bst = sc->sc_bst;
614 bus_space_handle_t bsh = sc->sc_bsh;
615
616 /*
617 * Set a timer just in case we never hear from the board again.
618 * We use longer timeout for multiple packet transmission.
619 * I'm not sure this timer value is appropriate. FIXME.
620 */
621 sc->sc_ec.ec_if.if_timer = 1 + sc->txb_count;
622
623 /* Update txb variables. */
624 sc->txb_sched = sc->txb_count;
625 sc->txb_count = 0;
626 sc->txb_free = sc->txb_size;
627
628 #if FE_DELAYED_PADDING
629 /* Omit the postponed padding process. */
630 sc->txb_padding = 0;
631 #endif
632
633 /* Start transmitter, passing packets in TX buffer. */
634 bus_space_write_1(bst, bsh, FE_BMPR10, sc->txb_sched | FE_B10_START);
635 }
636
637 /*
638 * Start output on interface.
639 * We make two assumptions here:
640 * 1) that the current priority is set to splnet _before_ this code
641 * is called *and* is returned to the appropriate priority after
642 * return
643 * 2) that the IFF_OACTIVE flag is checked before this code is called
644 * (i.e. that the output part of the interface is idle)
645 */
646 void
647 mb86960_start(struct ifnet *ifp)
648 {
649 struct mb86960_softc *sc = ifp->if_softc;
650 struct mbuf *m;
651
652 #if FE_DEBUG >= 1
653 /* Just a sanity check. */
654 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
655 /*
656 * Txb_count and txb_free co-works to manage the
657 * transmission buffer. Txb_count keeps track of the
658 * used potion of the buffer, while txb_free does unused
659 * potion. So, as long as the driver runs properly,
660 * txb_count is zero if and only if txb_free is same
661 * as txb_size (which represents whole buffer.)
662 */
663 log(LOG_ERR, "%s: inconsistent txb variables (%d, %d)\n",
664 device_xname(sc->sc_dev), sc->txb_count, sc->txb_free);
665 /*
666 * So, what should I do, then?
667 *
668 * We now know txb_count and txb_free contradicts. We
669 * cannot, however, tell which is wrong. More
670 * over, we cannot peek 86960 transmission buffer or
671 * reset the transmission buffer. (In fact, we can
672 * reset the entire interface. I don't want to do it.)
673 *
674 * If txb_count is incorrect, leaving it as is will cause
675 * sending of garbage after the next interrupt. We have to
676 * avoid it. Hence, we reset the txb_count here. If
677 * txb_free was incorrect, resetting txb_count just loose
678 * some packets. We can live with it.
679 */
680 sc->txb_count = 0;
681 }
682 #endif
683
684 #if FE_DEBUG >= 1
685 /*
686 * First, see if there are buffered packets and an idle
687 * transmitter - should never happen at this point.
688 */
689 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
690 log(LOG_ERR, "%s: transmitter idle with %d buffered packets\n",
691 device_xname(sc->sc_dev), sc->txb_count);
692 mb86960_xmit(sc);
693 }
694 #endif
695
696 /*
697 * Stop accepting more transmission packets temporarily, when
698 * a filter change request is delayed. Updating the MARs on
699 * 86960 flushes the transmisstion buffer, so it is delayed
700 * until all buffered transmission packets have been sent
701 * out.
702 */
703 if (sc->filter_change) {
704 /*
705 * Filter change request is delayed only when the DLC is
706 * working. DLC soon raise an interrupt after finishing
707 * the work.
708 */
709 goto indicate_active;
710 }
711
712 for (;;) {
713 /*
714 * See if there is room to put another packet in the buffer.
715 * We *could* do better job by peeking the send queue to
716 * know the length of the next packet. Current version just
717 * tests against the worst case (i.e., longest packet). FIXME.
718 *
719 * When adding the packet-peek feature, don't forget adding a
720 * test on txb_count against QUEUEING_MAX.
721 * There is a little chance the packet count exceeds
722 * the limit. Assume transmission buffer is 8KB (2x8KB
723 * configuration) and an application sends a bunch of small
724 * (i.e., minimum packet sized) packets rapidly. An 8KB
725 * buffer can hold 130 blocks of 62 bytes long...
726 */
727 if (sc->txb_free <
728 (ETHER_MAX_LEN - ETHER_CRC_LEN) + FE_TXLEN_SIZE) {
729 /* No room. */
730 goto indicate_active;
731 }
732
733 #if FE_SINGLE_TRANSMISSION
734 if (sc->txb_count > 0) {
735 /* Just one packet per a transmission buffer. */
736 goto indicate_active;
737 }
738 #endif
739
740 /*
741 * Get the next mbuf chain for a packet to send.
742 */
743 IFQ_DEQUEUE(&ifp->if_snd, m);
744 if (m == 0) {
745 /* No more packets to send. */
746 goto indicate_inactive;
747 }
748
749 /* Tap off here if there is a BPF listener. */
750 bpf_mtap(ifp, m, BPF_D_OUT);
751
752 /*
753 * Copy the mbuf chain into the transmission buffer.
754 * txb_* variables are updated as necessary.
755 */
756 mb86960_write_mbufs(sc, m);
757
758 m_freem(m);
759
760 /* Start transmitter if it's idle. */
761 if (sc->txb_sched == 0)
762 mb86960_xmit(sc);
763 }
764
765 indicate_inactive:
766 /*
767 * We are using the !OACTIVE flag to indicate to
768 * the outside world that we can accept an
769 * additional packet rather than that the
770 * transmitter is _actually_ active. Indeed, the
771 * transmitter may be active, but if we haven't
772 * filled all the buffers with data then we still
773 * want to accept more.
774 */
775 ifp->if_flags &= ~IFF_OACTIVE;
776 return;
777
778 indicate_active:
779 /*
780 * The transmitter is active, and there are no room for
781 * more outgoing packets in the transmission buffer.
782 */
783 ifp->if_flags |= IFF_OACTIVE;
784 return;
785 }
786
787 /*
788 * Transmission interrupt handler
789 * The control flow of this function looks silly. FIXME.
790 */
791 void
792 mb86960_tint(struct mb86960_softc *sc, uint8_t tstat)
793 {
794 bus_space_tag_t bst = sc->sc_bst;
795 bus_space_handle_t bsh = sc->sc_bsh;
796 struct ifnet *ifp = &sc->sc_ec.ec_if;
797 int left;
798 int col;
799
800 /*
801 * Handle "excessive collision" interrupt.
802 */
803 if (tstat & FE_D0_COLL16) {
804 /*
805 * Find how many packets (including this collided one)
806 * are left unsent in transmission buffer.
807 */
808 left = bus_space_read_1(bst, bsh, FE_BMPR10);
809
810 #if FE_DEBUG >= 2
811 log(LOG_WARNING, "%s: excessive collision (%d/%d)\n",
812 device_xname(sc->sc_dev), left, sc->txb_sched);
813 #endif
814 #if FE_DEBUG >= 3
815 mb86960_dump(LOG_INFO, sc);
816 #endif
817
818 /*
819 * Update statistics.
820 */
821 ifp->if_collisions += 16;
822 ifp->if_oerrors++;
823 ifp->if_opackets += sc->txb_sched - left;
824
825 /*
826 * Collision statistics has been updated.
827 * Clear the collision flag on 86960 now to avoid confusion.
828 */
829 bus_space_write_1(bst, bsh, FE_DLCR0, FE_D0_COLLID);
830
831 /*
832 * Restart transmitter, skipping the
833 * collided packet.
834 *
835 * We *must* skip the packet to keep network running
836 * properly. Excessive collision error is an
837 * indication of the network overload. If we
838 * tried sending the same packet after excessive
839 * collision, the network would be filled with
840 * out-of-time packets. Packets belonging
841 * to reliable transport (such as TCP) are resent
842 * by some upper layer.
843 */
844 bus_space_write_1(bst, bsh, FE_BMPR11,
845 FE_B11_CTRL_SKIP | FE_B11_MODE1);
846 sc->txb_sched = left - 1;
847 }
848
849 /*
850 * Handle "transmission complete" interrupt.
851 */
852 if (tstat & FE_D0_TXDONE) {
853 /*
854 * Add in total number of collisions on last
855 * transmission. We also clear "collision occurred" flag
856 * here.
857 *
858 * 86960 has a design flow on collision count on multiple
859 * packet transmission. When we send two or more packets
860 * with one start command (that's what we do when the
861 * transmission queue is clauded), 86960 informs us number
862 * of collisions occurred on the last packet on the
863 * transmission only. Number of collisions on previous
864 * packets are lost. I have told that the fact is clearly
865 * stated in the Fujitsu document.
866 *
867 * I considered not to mind it seriously. Collision
868 * count is not so important, anyway. Any comments? FIXME.
869 */
870
871 if (bus_space_read_1(bst, bsh, FE_DLCR0) & FE_D0_COLLID) {
872 /* Clear collision flag. */
873 bus_space_write_1(bst, bsh, FE_DLCR0, FE_D0_COLLID);
874
875 /* Extract collision count from 86960. */
876 col = bus_space_read_1(bst, bsh, FE_DLCR4) & FE_D4_COL;
877 if (col == 0) {
878 /*
879 * Status register indicates collisions,
880 * while the collision count is zero.
881 * This can happen after multiple packet
882 * transmission, indicating that one or more
883 * previous packet(s) had been collided.
884 *
885 * Since the accurate number of collisions
886 * has been lost, we just guess it as 1;
887 * Am I too optimistic? FIXME.
888 */
889 col = 1;
890 } else
891 col >>= FE_D4_COL_SHIFT;
892 ifp->if_collisions += col;
893 #if FE_DEBUG >= 4
894 log(LOG_WARNING, "%s: %d collision%s (%d)\n",
895 device_xname(sc->sc_dev), col, col == 1 ? "" : "s",
896 sc->txb_sched);
897 #endif
898 }
899
900 /*
901 * Update total number of successfully
902 * transmitted packets.
903 */
904 ifp->if_opackets += sc->txb_sched;
905 sc->txb_sched = 0;
906 }
907
908 if (sc->txb_sched == 0) {
909 /*
910 * The transmitter is no more active.
911 * Reset output active flag and watchdog timer.
912 */
913 ifp->if_flags &= ~IFF_OACTIVE;
914 ifp->if_timer = 0;
915
916 /*
917 * If more data is ready to transmit in the buffer, start
918 * transmitting them. Otherwise keep transmitter idle,
919 * even if more data is queued. This gives receive
920 * process a slight priority.
921 */
922 if (sc->txb_count > 0)
923 mb86960_xmit(sc);
924 }
925 }
926
927 /*
928 * Ethernet interface receiver interrupt.
929 */
930 void
931 mb86960_rint(struct mb86960_softc *sc, uint8_t rstat)
932 {
933 bus_space_tag_t bst = sc->sc_bst;
934 bus_space_handle_t bsh = sc->sc_bsh;
935 struct ifnet *ifp = &sc->sc_ec.ec_if;
936 u_int status, len;
937 int i;
938
939 /*
940 * Update statistics if this interrupt is caused by an error.
941 */
942 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | FE_D1_ALGERR |
943 FE_D1_SRTPKT)) {
944 #if FE_DEBUG >= 3
945 char sbuf[sizeof(FE_D1_ERRBITS) + 64];
946
947 snprintb(sbuf, sizeof(sbuf), FE_D1_ERRBITS, rstat);
948 log(LOG_WARNING, "%s: receive error: %s\n",
949 device_xname(sc->sc_dev), sbuf);
950 #endif
951 ifp->if_ierrors++;
952 }
953
954 /*
955 * MB86960 has a flag indicating "receive queue empty."
956 * We just loop checking the flag to pull out all received
957 * packets.
958 *
959 * We limit the number of iterrations to avoid infinite loop.
960 * It can be caused by a very slow CPU (some broken
961 * peripheral may insert incredible number of wait cycles)
962 * or, worse, by a broken MB86960 chip.
963 */
964 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
965 /* Stop the iterration if 86960 indicates no packets. */
966 if (bus_space_read_1(bst, bsh, FE_DLCR5) & FE_D5_BUFEMP)
967 break;
968
969 /*
970 * Extract receive packet status from the receive
971 * packet header.
972 */
973 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
974 status = bus_space_read_1(bst, bsh, FE_BMPR8);
975 (void)bus_space_read_1(bst, bsh, FE_BMPR8);
976 } else
977 status = bus_space_read_2(bst, bsh, FE_BMPR8);
978
979 #if FE_DEBUG >= 4
980 log(LOG_INFO, "%s: receive status = %02x\n",
981 device_xname(sc->sc_dev), status);
982 #endif
983
984 /*
985 * If there was an error, update statistics and drop
986 * the packet, unless the interface is in promiscuous
987 * mode.
988 */
989 if ((status & FE_RXSTAT_GOODPKT) == 0) {
990 if ((ifp->if_flags & IFF_PROMISC) == 0) {
991 ifp->if_ierrors++;
992 mb86960_droppacket(sc);
993 continue;
994 }
995 }
996
997 /*
998 * Extract the packet length from the receive packet header.
999 * It is a sum of a header (14 bytes) and a payload.
1000 * CRC has been stripped off by the 86960.
1001 */
1002 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
1003 len = bus_space_read_1(bst, bsh, FE_BMPR8);
1004 len |= bus_space_read_1(bst, bsh, FE_BMPR8) << 8;
1005 } else
1006 len = bus_space_read_2(bst, bsh, FE_BMPR8);
1007
1008 /*
1009 * MB86965 checks the packet length and drop big packet
1010 * before passing it to us. There are no chance we can
1011 * get [crufty] packets. Hence, if the length exceeds
1012 * the specified limit, it means some serious failure,
1013 * such as out-of-sync on receive buffer management.
1014 *
1015 * Is this statement true? FIXME.
1016 */
1017 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN) ||
1018 len < ETHER_HDR_LEN) {
1019 #if FE_DEBUG >= 2
1020 log(LOG_WARNING,
1021 "%s: received a %s packet? (%u bytes)\n",
1022 device_xname(sc->sc_dev),
1023 len < ETHER_HDR_LEN ? "partial" : "big", len);
1024 #endif
1025 ifp->if_ierrors++;
1026 mb86960_droppacket(sc);
1027 continue;
1028 }
1029
1030 /*
1031 * Check for a short (RUNT) packet. We *do* check
1032 * but do nothing other than print a message.
1033 * Short packets are illegal, but does nothing bad
1034 * if it carries data for upper layer.
1035 */
1036 #if FE_DEBUG >= 2
1037 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) {
1038 log(LOG_WARNING,
1039 "%s: received a short packet? (%u bytes)\n",
1040 device_xname(sc->sc_dev), len);
1041 }
1042 #endif
1043
1044 /*
1045 * Go get a packet.
1046 */
1047 if (mb86960_get_packet(sc, len) == 0) {
1048 /* Skip a packet, updating statistics. */
1049 #if FE_DEBUG >= 2
1050 log(LOG_WARNING,
1051 "%s: out of mbufs; dropping packet (%u bytes)\n",
1052 device_xname(sc->sc_dev), len);
1053 #endif
1054 ifp->if_ierrors++;
1055 mb86960_droppacket(sc);
1056
1057 /*
1058 * We stop receiving packets, even if there are
1059 * more in the buffer. We hope we can get more
1060 * mbufs next time.
1061 */
1062 return;
1063 }
1064 }
1065 }
1066
1067 /*
1068 * Ethernet interface interrupt processor
1069 */
1070 int
1071 mb86960_intr(void *arg)
1072 {
1073 struct mb86960_softc *sc = arg;
1074 bus_space_tag_t bst = sc->sc_bst;
1075 bus_space_handle_t bsh = sc->sc_bsh;
1076 struct ifnet *ifp = &sc->sc_ec.ec_if;
1077 uint8_t tstat, rstat;
1078
1079 if ((sc->sc_stat & FE_STAT_ENABLED) == 0 ||
1080 !device_is_active(sc->sc_dev))
1081 return 0;
1082
1083 #if FE_DEBUG >= 4
1084 log(LOG_INFO, "%s: mb86960_intr()\n", device_xname(sc->sc_dev));
1085 mb86960_dump(LOG_INFO, sc);
1086 #endif
1087
1088 /*
1089 * Get interrupt conditions, masking unneeded flags.
1090 */
1091 tstat = bus_space_read_1(bst, bsh, FE_DLCR0) & FE_TMASK;
1092 rstat = bus_space_read_1(bst, bsh, FE_DLCR1) & FE_RMASK;
1093 if (tstat == 0 && rstat == 0)
1094 return 0;
1095
1096 /*
1097 * Loop until there are no more new interrupt conditions.
1098 */
1099 for (;;) {
1100 /*
1101 * Reset the conditions we are acknowledging.
1102 */
1103 bus_space_write_1(bst, bsh, FE_DLCR0, tstat);
1104 bus_space_write_1(bst, bsh, FE_DLCR1, rstat);
1105
1106 /*
1107 * Handle transmitter interrupts. Handle these first because
1108 * the receiver will reset the board under some conditions.
1109 */
1110 if (tstat != 0)
1111 mb86960_tint(sc, tstat);
1112
1113 /*
1114 * Handle receiver interrupts.
1115 */
1116 if (rstat != 0)
1117 mb86960_rint(sc, rstat);
1118
1119 /*
1120 * Update the multicast address filter if it is
1121 * needed and possible. We do it now, because
1122 * we can make sure the transmission buffer is empty,
1123 * and there is a good chance that the receive queue
1124 * is empty. It will minimize the possibility of
1125 * packet lossage.
1126 */
1127 if (sc->filter_change &&
1128 sc->txb_count == 0 && sc->txb_sched == 0) {
1129 mb86960_loadmar(sc);
1130 ifp->if_flags &= ~IFF_OACTIVE;
1131 }
1132
1133 /*
1134 * If it looks like the transmitter can take more data,
1135 * attempt to start output on the interface. This is done
1136 * after handling the receiver interrupt to give the
1137 * receive operation priority.
1138 */
1139 if ((ifp->if_flags & IFF_OACTIVE) == 0)
1140 if_schedule_deferred_start(ifp);
1141
1142 if (rstat != 0 || tstat != 0)
1143 rnd_add_uint32(&sc->rnd_source, rstat + tstat);
1144
1145 /*
1146 * Get interrupt conditions, masking unneeded flags.
1147 */
1148 tstat = bus_space_read_1(bst, bsh, FE_DLCR0) & FE_TMASK;
1149 rstat = bus_space_read_1(bst, bsh, FE_DLCR1) & FE_RMASK;
1150 if (tstat == 0 && rstat == 0)
1151 return 1;
1152 }
1153 }
1154
1155 /*
1156 * Process an ioctl request. This code needs some work - it looks pretty ugly.
1157 */
1158 int
1159 mb86960_ioctl(struct ifnet *ifp, u_long cmd, void *data)
1160 {
1161 struct mb86960_softc *sc = ifp->if_softc;
1162 struct ifaddr *ifa = (struct ifaddr *)data;
1163 struct ifreq *ifr = (struct ifreq *)data;
1164 int s, error = 0;
1165
1166 #if FE_DEBUG >= 3
1167 log(LOG_INFO, "%s: ioctl(%lx)\n", device_xname(sc->sc_dev), cmd);
1168 #endif
1169
1170 s = splnet();
1171
1172 switch (cmd) {
1173 case SIOCINITIFADDR:
1174 if ((error = mb86960_enable(sc)) != 0)
1175 break;
1176 ifp->if_flags |= IFF_UP;
1177
1178 mb86960_init(sc);
1179 switch (ifa->ifa_addr->sa_family) {
1180 #ifdef INET
1181 case AF_INET:
1182 arp_ifinit(ifp, ifa);
1183 break;
1184 #endif
1185 default:
1186 break;
1187 }
1188 break;
1189
1190 case SIOCSIFFLAGS:
1191 if ((error = ifioctl_common(ifp, cmd, data)) != 0)
1192 break;
1193 /* XXX re-use ether_ioctl() */
1194 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) {
1195 case IFF_RUNNING:
1196 /*
1197 * If interface is marked down and it is running, then
1198 * stop it.
1199 */
1200 mb86960_stop(sc);
1201 ifp->if_flags &= ~IFF_RUNNING;
1202 mb86960_disable(sc);
1203 break;
1204 case IFF_UP:
1205 /*
1206 * If interface is marked up and it is stopped, then
1207 * start it.
1208 */
1209 if ((error = mb86960_enable(sc)) != 0)
1210 break;
1211 mb86960_init(sc);
1212 break;
1213 case IFF_UP|IFF_RUNNING:
1214 /*
1215 * Reset the interface to pick up changes in any other
1216 * flags that affect hardware registers.
1217 */
1218 mb86960_setmode(sc);
1219 break;
1220 case 0:
1221 break;
1222 }
1223 #if FE_DEBUG >= 1
1224 /* "ifconfig fe0 debug" to print register dump. */
1225 if (ifp->if_flags & IFF_DEBUG) {
1226 log(LOG_INFO, "%s: SIOCSIFFLAGS(DEBUG)\n",
1227 device_xname(sc->sc_dev));
1228 mb86960_dump(LOG_DEBUG, sc);
1229 }
1230 #endif
1231 break;
1232
1233 case SIOCADDMULTI:
1234 case SIOCDELMULTI:
1235 if ((sc->sc_stat & FE_STAT_ENABLED) == 0) {
1236 error = EIO;
1237 break;
1238 }
1239
1240 /* Update our multicast list. */
1241 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) {
1242 /*
1243 * Multicast list has changed; set the hardware filter
1244 * accordingly.
1245 */
1246 if (ifp->if_flags & IFF_RUNNING)
1247 mb86960_setmode(sc);
1248 error = 0;
1249 }
1250 break;
1251
1252 case SIOCGIFMEDIA:
1253 case SIOCSIFMEDIA:
1254 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
1255 break;
1256
1257 default:
1258 error = ether_ioctl(ifp, cmd, data);
1259 break;
1260 }
1261
1262 splx(s);
1263 return error;
1264 }
1265
1266 /*
1267 * Retrieve packet from receive buffer and send to the next level up via
1268 * ether_input(). If there is a BPF listener, give a copy to BPF, too.
1269 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
1270 */
1271 int
1272 mb86960_get_packet(struct mb86960_softc *sc, u_int len)
1273 {
1274 bus_space_tag_t bst = sc->sc_bst;
1275 bus_space_handle_t bsh = sc->sc_bsh;
1276 struct ifnet *ifp = &sc->sc_ec.ec_if;
1277 struct mbuf *m;
1278
1279 /* Allocate a header mbuf. */
1280 MGETHDR(m, M_DONTWAIT, MT_DATA);
1281 if (m == 0)
1282 return 0;
1283 m_set_rcvif(m, ifp);
1284 m->m_pkthdr.len = len;
1285
1286 /* The following silliness is to make NFS happy. */
1287 #define EROUND ((sizeof(struct ether_header) + 3) & ~3)
1288 #define EOFF (EROUND - sizeof(struct ether_header))
1289
1290 /*
1291 * Our strategy has one more problem. There is a policy on
1292 * mbuf cluster allocation. It says that we must have at
1293 * least MINCLSIZE (208 bytes) to allocate a cluster. For a
1294 * packet of a size between (MHLEN - 2) to (MINCLSIZE - 2),
1295 * our code violates the rule...
1296 * On the other hand, the current code is short, simple,
1297 * and fast, however. It does no harmful thing, just waists
1298 * some memory. Any comments? FIXME.
1299 */
1300
1301 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
1302 if (len > MHLEN - EOFF) {
1303 MCLGET(m, M_DONTWAIT);
1304 if ((m->m_flags & M_EXT) == 0) {
1305 m_freem(m);
1306 return 0;
1307 }
1308 }
1309
1310 /*
1311 * The following assumes there is room for the ether header in the
1312 * header mbuf.
1313 */
1314 m->m_data += EOFF;
1315
1316 /* Set the length of this packet. */
1317 m->m_len = len;
1318
1319 /* Get a packet. */
1320 if (sc->sc_flags & FE_FLAGS_SBW_BYTE)
1321 bus_space_read_multi_1(bst, bsh, FE_BMPR8,
1322 mtod(m, uint8_t *), len);
1323 else
1324 bus_space_read_multi_stream_2(bst, bsh, FE_BMPR8,
1325 mtod(m, uint16_t *), (len + 1) >> 1);
1326
1327 if_percpuq_enqueue(ifp->if_percpuq, m);
1328 return 1;
1329 }
1330
1331 /*
1332 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
1333 * Returns number of bytes actually written, including length word.
1334 *
1335 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
1336 * Packets shorter than Ethernet minimum are legal, and we pad them
1337 * before sending out. An exception is "partial" packets which are
1338 * shorter than mandatory Ethernet header.
1339 *
1340 * I wrote a code for an experimental "delayed padding" technique.
1341 * When employed, it postpones the padding process for short packets.
1342 * If xmit() occurred at the moment, the padding process is omitted, and
1343 * garbages are sent as pad data. If next packet is stored in the
1344 * transmission buffer before xmit(), write_mbuf() pads the previous
1345 * packet before transmitting new packet. This *may* gain the
1346 * system performance (slightly).
1347 */
1348 void
1349 mb86960_write_mbufs(struct mb86960_softc *sc, struct mbuf *m)
1350 {
1351 bus_space_tag_t bst = sc->sc_bst;
1352 bus_space_handle_t bsh = sc->sc_bsh;
1353 int totlen, len;
1354 #if FE_DEBUG >= 2
1355 struct mbuf *mp;
1356 #endif
1357
1358 #if FE_DELAYED_PADDING
1359 /* Do the "delayed padding." */
1360 if (sc->txb_padding > 0) {
1361 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
1362 for (len = sc->txb_padding; len > 0; len--)
1363 bus_space_write_1(bst, bsh, FE_BMPR8, 0);
1364 } else {
1365 for (len = sc->txb_padding >> 1; len > 0; len--)
1366 bus_space_write_2(bst, bsh, FE_BMPR8, 0);
1367 }
1368 sc->txb_padding = 0;
1369 }
1370 #endif
1371
1372 /* We need to use m->m_pkthdr.len, so require the header */
1373 if ((m->m_flags & M_PKTHDR) == 0)
1374 panic("mb86960_write_mbufs: no header mbuf");
1375
1376 #if FE_DEBUG >= 2
1377 /* First, count up the total number of bytes to copy. */
1378 for (totlen = 0, mp = m; mp != 0; mp = mp->m_next)
1379 totlen += mp->m_len;
1380 /* Check if this matches the one in the packet header. */
1381 if (totlen != m->m_pkthdr.len)
1382 log(LOG_WARNING, "%s: packet length mismatch? (%d/%d)\n",
1383 device_xname(sc->sc_dev), totlen, m->m_pkthdr.len);
1384 #else
1385 /* Just use the length value in the packet header. */
1386 totlen = m->m_pkthdr.len;
1387 #endif
1388
1389 #if FE_DEBUG >= 1
1390 /*
1391 * Should never send big packets. If such a packet is passed,
1392 * it should be a bug of upper layer. We just ignore it.
1393 * ... Partial (too short) packets, neither.
1394 */
1395 if (totlen > (ETHER_MAX_LEN - ETHER_CRC_LEN) ||
1396 totlen < ETHER_HDR_LEN) {
1397 log(LOG_ERR, "%s: got a %s packet (%u bytes) to send\n",
1398 device_xname(sc->sc_dev),
1399 totlen < ETHER_HDR_LEN ? "partial" : "big", totlen);
1400 sc->sc_ec.ec_if.if_oerrors++;
1401 return;
1402 }
1403 #endif
1404
1405 /*
1406 * Put the length word for this frame.
1407 * Does 86960 accept odd length? -- Yes.
1408 * Do we need to pad the length to minimum size by ourselves?
1409 * -- Generally yes. But for (or will be) the last
1410 * packet in the transmission buffer, we can skip the
1411 * padding process. It may gain performance slightly. FIXME.
1412 */
1413 len = uimax(totlen, (ETHER_MIN_LEN - ETHER_CRC_LEN));
1414 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
1415 bus_space_write_1(bst, bsh, FE_BMPR8, len);
1416 bus_space_write_1(bst, bsh, FE_BMPR8, len >> 8);
1417 } else {
1418 bus_space_write_2(bst, bsh, FE_BMPR8, len);
1419 /* roundup packet length since we will use word access */
1420 totlen = (totlen + 1) & ~1;
1421 }
1422
1423 /*
1424 * Update buffer status now.
1425 * Truncate the length up to an even number
1426 * if the chip is set in SBW_WORD mode.
1427 */
1428 sc->txb_free -= FE_TXLEN_SIZE +
1429 uimax(totlen, (ETHER_MIN_LEN - ETHER_CRC_LEN));
1430 sc->txb_count++;
1431
1432 #if FE_DELAYED_PADDING
1433 /* Postpone the packet padding if necessary. */
1434 if (totlen < (ETHER_MIN_LEN - ETHER_CRC_LEN))
1435 sc->txb_padding = (ETHER_MIN_LEN - ETHER_CRC_LEN) - totlen;
1436 #endif
1437
1438 /*
1439 * Transfer the data from mbuf chain to the transmission buffer.
1440 * If the MB86960 is configured in word mode, data needs to be
1441 * transferred as words, and only words.
1442 * So that we require some extra code to patch over odd-length
1443 * or unaligned mbufs.
1444 */
1445 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
1446 /* It's simple in byte mode. */
1447 for (; m != NULL; m = m->m_next) {
1448 if (m->m_len) {
1449 bus_space_write_multi_1(bst, bsh, FE_BMPR8,
1450 mtod(m, uint8_t *), m->m_len);
1451 }
1452 }
1453 } else {
1454 /* a bit trickier in word mode. */
1455 uint8_t *data, savebyte[2];
1456 int leftover;
1457
1458 leftover = 0;
1459 savebyte[0] = savebyte[1] = 0;
1460
1461 for (; m != NULL; m = m->m_next) {
1462 len = m->m_len;
1463 if (len == 0)
1464 continue;
1465 data = mtod(m, uint8_t *);
1466 while (len > 0) {
1467 if (leftover) {
1468 /*
1469 * Data left over (from mbuf or
1470 * realignment). Buffer the next
1471 * byte, and write it and the
1472 * leftover data out.
1473 */
1474 savebyte[1] = *data++;
1475 len--;
1476 bus_space_write_stream_2(bst, bsh,
1477 FE_BMPR8, *(uint16_t *)savebyte);
1478 leftover = 0;
1479 } else if (BUS_SPACE_ALIGNED_POINTER(data,
1480 uint16_t) == 0) {
1481 /*
1482 * Unaligned data; buffer the next byte.
1483 */
1484 savebyte[0] = *data++;
1485 len--;
1486 leftover = 1;
1487 } else {
1488 /*
1489 * Aligned data; output contiguous
1490 * words as much as we can, then
1491 * buffer the remaining byte, if any.
1492 */
1493 leftover = len & 1;
1494 len &= ~1;
1495 bus_space_write_multi_stream_2(bst, bsh,
1496 FE_BMPR8, (uint16_t *)data,
1497 len >> 1);
1498 data += len;
1499 if (leftover)
1500 savebyte[0] = *data++;
1501 len = 0;
1502 }
1503 }
1504 if (len < 0)
1505 panic("mb86960_write_mbufs: negative len");
1506 }
1507 if (leftover) {
1508 savebyte[1] = 0;
1509 bus_space_write_stream_2(bst, bsh, FE_BMPR8,
1510 *(uint16_t *)savebyte);
1511 }
1512 }
1513 #if FE_DELAYED_PADDING == 0
1514 /*
1515 * Pad the packet to the minimum length if necessary.
1516 */
1517 len = (ETHER_MIN_LEN - ETHER_CRC_LEN) - totlen;
1518 if (len > 0) {
1519 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
1520 while (len-- > 0)
1521 bus_space_write_1(bst, bsh, FE_BMPR8, 0);
1522 } else {
1523 len >>= 1;
1524 while (len-- > 0)
1525 bus_space_write_2(bst, bsh, FE_BMPR8, 0);
1526 }
1527 }
1528 #endif
1529 }
1530
1531 /*
1532 * Compute the multicast address filter from the
1533 * list of multicast addresses we need to listen to.
1534 */
1535 void
1536 mb86960_getmcaf(struct ethercom *ec, uint8_t *af)
1537 {
1538 struct ifnet *ifp = &ec->ec_if;
1539 struct ether_multi *enm;
1540 uint32_t crc;
1541 struct ether_multistep step;
1542
1543 /*
1544 * Set up multicast address filter by passing all multicast addresses
1545 * through a crc generator, and then using the high order 6 bits as an
1546 * index into the 64 bit logical address filter. The high order bit
1547 * selects the word, while the rest of the bits select the bit within
1548 * the word.
1549 */
1550
1551 if ((ifp->if_flags & IFF_PROMISC) != 0)
1552 goto allmulti;
1553
1554 memset(af, 0, FE_FILTER_LEN);
1555 ETHER_FIRST_MULTI(step, ec, enm);
1556 while (enm != NULL) {
1557 if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
1558 sizeof(enm->enm_addrlo)) != 0) {
1559 /*
1560 * We must listen to a range of multicast addresses.
1561 * For now, just accept all multicasts, rather than
1562 * trying to set only those filter bits needed to match
1563 * the range. (At this time, the only use of address
1564 * ranges is for IP multicast routing, for which the
1565 * range is big enough to require all bits set.)
1566 */
1567 goto allmulti;
1568 }
1569
1570 crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
1571
1572 /* Just want the 6 most significant bits. */
1573 crc >>= 26;
1574
1575 /* Turn on the corresponding bit in the filter. */
1576 af[crc >> 3] |= 1 << (crc & 7);
1577
1578 ETHER_NEXT_MULTI(step, enm);
1579 }
1580 ifp->if_flags &= ~IFF_ALLMULTI;
1581 return;
1582
1583 allmulti:
1584 ifp->if_flags |= IFF_ALLMULTI;
1585 memset(af, 0xff, FE_FILTER_LEN);
1586 }
1587
1588 /*
1589 * Calculate a new "multicast packet filter" and put the 86960
1590 * receiver in appropriate mode.
1591 */
1592 void
1593 mb86960_setmode(struct mb86960_softc *sc)
1594 {
1595 bus_space_tag_t bst = sc->sc_bst;
1596 bus_space_handle_t bsh = sc->sc_bsh;
1597 int flags = sc->sc_ec.ec_if.if_flags;
1598
1599 /*
1600 * If the interface is not running, we postpone the update
1601 * process for receive modes and multicast address filter
1602 * until the interface is restarted. It reduces some
1603 * complicated job on maintaining chip states. (Earlier versions
1604 * of this driver had a bug on that point...)
1605 *
1606 * To complete the trick, mb86960_init() calls mb86960_setmode() after
1607 * restarting the interface.
1608 */
1609 if ((flags & IFF_RUNNING) == 0)
1610 return;
1611
1612 /*
1613 * Promiscuous mode is handled separately.
1614 */
1615 if ((flags & IFF_PROMISC) != 0) {
1616 /*
1617 * Program 86960 to receive all packets on the segment
1618 * including those directed to other stations.
1619 * Multicast filter stored in MARs are ignored
1620 * under this setting, so we don't need to update it.
1621 *
1622 * Promiscuous mode is used solely by BPF, and BPF only
1623 * listens to valid (no error) packets. So, we ignore
1624 * errornous ones even in this mode.
1625 */
1626 bus_space_write_1(bst, bsh, FE_DLCR5,
1627 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
1628 sc->filter_change = 0;
1629
1630 #if FE_DEBUG >= 3
1631 log(LOG_INFO, "%s: promiscuous mode\n",
1632 device_xname(sc->sc_dev));
1633 #endif
1634 return;
1635 }
1636
1637 /*
1638 * Turn the chip to the normal (non-promiscuous) mode.
1639 */
1640 bus_space_write_1(bst, bsh, FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
1641
1642 /*
1643 * Find the new multicast filter value.
1644 */
1645 mb86960_getmcaf(&sc->sc_ec, sc->filter);
1646 sc->filter_change = 1;
1647
1648 #if FE_DEBUG >= 3
1649 log(LOG_INFO,
1650 "%s: address filter: [%02x %02x %02x %02x %02x %02x %02x %02x]\n",
1651 device_xname(sc->sc_dev),
1652 sc->filter[0], sc->filter[1], sc->filter[2], sc->filter[3],
1653 sc->filter[4], sc->filter[5], sc->filter[6], sc->filter[7]);
1654 #endif
1655
1656 /*
1657 * We have to update the multicast filter in the 86960, A.S.A.P.
1658 *
1659 * Note that the DLC (Data Linc Control unit, i.e. transmitter
1660 * and receiver) must be stopped when feeding the filter, and
1661 * DLC trashes all packets in both transmission and receive
1662 * buffers when stopped.
1663 *
1664 * ... Are the above sentenses correct? I have to check the
1665 * manual of the MB86960A. FIXME.
1666 *
1667 * To reduce the packet lossage, we delay the filter update
1668 * process until buffers are empty.
1669 */
1670 if (sc->txb_sched == 0 && sc->txb_count == 0 &&
1671 (bus_space_read_1(bst, bsh, FE_DLCR1) & FE_D1_PKTRDY) == 0) {
1672 /*
1673 * Buffers are (apparently) empty. Load
1674 * the new filter value into MARs now.
1675 */
1676 mb86960_loadmar(sc);
1677 } else {
1678 /*
1679 * Buffers are not empty. Mark that we have to update
1680 * the MARs. The new filter will be loaded by mb86960_intr()
1681 * later.
1682 */
1683 #if FE_DEBUG >= 4
1684 log(LOG_INFO, "%s: filter change delayed\n",
1685 device_xname(sc->sc_dev));
1686 #endif
1687 }
1688 }
1689
1690 /*
1691 * Load a new multicast address filter into MARs.
1692 *
1693 * The caller must have splnet'ed befor mb86960_loadmar.
1694 * This function starts the DLC upon return. So it can be called only
1695 * when the chip is working, i.e., from the driver's point of view, when
1696 * a device is RUNNING. (I mistook the point in previous versions.)
1697 */
1698 void
1699 mb86960_loadmar(struct mb86960_softc *sc)
1700 {
1701 bus_space_tag_t bst = sc->sc_bst;
1702 bus_space_handle_t bsh = sc->sc_bsh;
1703
1704 /* Stop the DLC (transmitter and receiver). */
1705 bus_space_write_1(bst, bsh, FE_DLCR6,
1706 sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1707
1708 /* Select register bank 1 for MARs. */
1709 bus_space_write_1(bst, bsh, FE_DLCR7,
1710 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
1711
1712 /* Copy filter value into the registers. */
1713 bus_space_write_region_1(bst, bsh, FE_MAR8, sc->filter, FE_FILTER_LEN);
1714
1715 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
1716 bus_space_write_1(bst, bsh, FE_DLCR7,
1717 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1718
1719 /* Restart the DLC. */
1720 bus_space_write_1(bst, bsh, FE_DLCR6,
1721 sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
1722
1723 /* We have just updated the filter. */
1724 sc->filter_change = 0;
1725
1726 #if FE_DEBUG >= 3
1727 log(LOG_INFO, "%s: address filter changed\n", device_xname(sc->sc_dev));
1728 #endif
1729 }
1730
1731 /*
1732 * Enable power on the interface.
1733 */
1734 int
1735 mb86960_enable(struct mb86960_softc *sc)
1736 {
1737
1738 #if FE_DEBUG >= 3
1739 log(LOG_INFO, "%s: mb86960_enable()\n", device_xname(sc->sc_dev));
1740 #endif
1741
1742 if ((sc->sc_stat & FE_STAT_ENABLED) == 0 && sc->sc_enable != NULL) {
1743 if ((*sc->sc_enable)(sc) != 0) {
1744 aprint_error_dev(sc->sc_dev, "device enable failed\n");
1745 return EIO;
1746 }
1747 }
1748
1749 sc->sc_stat |= FE_STAT_ENABLED;
1750 return 0;
1751 }
1752
1753 /*
1754 * Disable power on the interface.
1755 */
1756 void
1757 mb86960_disable(struct mb86960_softc *sc)
1758 {
1759
1760 #if FE_DEBUG >= 3
1761 log(LOG_INFO, "%s: mb86960_disable()\n", device_xname(sc->sc_dev));
1762 #endif
1763
1764 if ((sc->sc_stat & FE_STAT_ENABLED) != 0 && sc->sc_disable != NULL) {
1765 (*sc->sc_disable)(sc);
1766 sc->sc_stat &= ~FE_STAT_ENABLED;
1767 }
1768 }
1769
1770 /*
1771 * mbe_activate:
1772 *
1773 * Handle device activation/deactivation requests.
1774 */
1775 int
1776 mb86960_activate(device_t self, enum devact act)
1777 {
1778 struct mb86960_softc *sc = device_private(self);
1779
1780 switch (act) {
1781 case DVACT_DEACTIVATE:
1782 if_deactivate(&sc->sc_ec.ec_if);
1783 return 0;
1784 default:
1785 return EOPNOTSUPP;
1786 }
1787 }
1788
1789 /*
1790 * mb86960_detach:
1791 *
1792 * Detach a MB86960 interface.
1793 */
1794 int
1795 mb86960_detach(struct mb86960_softc *sc)
1796 {
1797 struct ifnet *ifp = &sc->sc_ec.ec_if;
1798
1799 /* Succeed now if there's no work to do. */
1800 if ((sc->sc_stat & FE_STAT_ATTACHED) == 0)
1801 return 0;
1802
1803 /* Delete all media. */
1804 ifmedia_delete_instance(&sc->sc_media, IFM_INST_ANY);
1805
1806 /* Unhook the entropy source. */
1807 rnd_detach_source(&sc->rnd_source);
1808
1809 ether_ifdetach(ifp);
1810 if_detach(ifp);
1811
1812 mb86960_disable(sc);
1813 return 0;
1814 }
1815
1816 /*
1817 * Routines to read all bytes from the config EEPROM (93C06) through MB86965A.
1818 */
1819 void
1820 mb86965_read_eeprom(bus_space_tag_t iot, bus_space_handle_t ioh, uint8_t *data)
1821 {
1822 int addr, op, bit;
1823 uint16_t val;
1824
1825 /* Read bytes from EEPROM; two bytes per an iteration. */
1826 for (addr = 0; addr < FE_EEPROM_SIZE / 2; addr++) {
1827 /* Reset the EEPROM interface. */
1828 bus_space_write_1(iot, ioh, FE_BMPR16, 0x00);
1829 bus_space_write_1(iot, ioh, FE_BMPR17, 0x00);
1830 bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT);
1831
1832 /* Send start bit. */
1833 bus_space_write_1(iot, ioh, FE_BMPR17, FE_B17_DATA);
1834 FE_EEPROM_DELAY();
1835 bus_space_write_1(iot, ioh,
1836 FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK);
1837 FE_EEPROM_DELAY();
1838 bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT);
1839
1840 /* Send read command and read address. */
1841 op = 0x80 | addr; /* READ instruction */
1842 for (bit = 8; bit > 0; bit--) {
1843 bus_space_write_1(iot, ioh, FE_BMPR17,
1844 (op & (1 << (bit - 1))) ? FE_B17_DATA : 0);
1845 FE_EEPROM_DELAY();
1846 bus_space_write_1(iot, ioh,
1847 FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK);
1848 FE_EEPROM_DELAY();
1849 bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT);
1850 }
1851 bus_space_write_1(iot, ioh, FE_BMPR17, 0x00);
1852
1853 /* Read two bytes in each address */
1854 val = 0;
1855 for (bit = 16; bit > 0; bit--) {
1856 FE_EEPROM_DELAY();
1857 bus_space_write_1(iot, ioh,
1858 FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK);
1859 FE_EEPROM_DELAY();
1860 if (bus_space_read_1(iot, ioh, FE_BMPR17) &
1861 FE_B17_DATA)
1862 val |= 1 << (bit - 1);
1863 bus_space_write_1(iot, ioh,
1864 FE_BMPR16, FE_B16_SELECT);
1865 }
1866 data[addr * 2] = val >> 8;
1867 data[addr * 2 + 1] = val & 0xff;
1868 }
1869
1870 /* Make sure the EEPROM is turned off. */
1871 bus_space_write_1(iot, ioh, FE_BMPR16, 0);
1872 bus_space_write_1(iot, ioh, FE_BMPR17, 0);
1873
1874 #if FE_DEBUG >= 3
1875 /* Report what we got. */
1876 log(LOG_INFO, "mb86965_read_eeprom: "
1877 " %02x%02x%02x%02x %02x%02x%02x%02x -"
1878 " %02x%02x%02x%02x %02x%02x%02x%02x -"
1879 " %02x%02x%02x%02x %02x%02x%02x%02x -"
1880 " %02x%02x%02x%02x %02x%02x%02x%02x\n",
1881 data[ 0], data[ 1], data[ 2], data[ 3],
1882 data[ 4], data[ 5], data[ 6], data[ 7],
1883 data[ 8], data[ 9], data[10], data[11],
1884 data[12], data[13], data[14], data[15],
1885 data[16], data[17], data[18], data[19],
1886 data[20], data[21], data[22], data[23],
1887 data[24], data[25], data[26], data[27],
1888 data[28], data[29], data[30], data[31]);
1889 #endif
1890 }
1891
1892 #if FE_DEBUG >= 1
1893 void
1894 mb86960_dump(int level, struct mb86960_softc *sc)
1895 {
1896 bus_space_tag_t bst = sc->sc_bst;
1897 bus_space_handle_t bsh = sc->sc_bsh;
1898 uint8_t save_dlcr7;
1899
1900 save_dlcr7 = bus_space_read_1(bst, bsh, FE_DLCR7);
1901
1902 log(level, "\tDLCR = %02x %02x %02x %02x %02x %02x %02x %02x\n",
1903 bus_space_read_1(bst, bsh, FE_DLCR0),
1904 bus_space_read_1(bst, bsh, FE_DLCR1),
1905 bus_space_read_1(bst, bsh, FE_DLCR2),
1906 bus_space_read_1(bst, bsh, FE_DLCR3),
1907 bus_space_read_1(bst, bsh, FE_DLCR4),
1908 bus_space_read_1(bst, bsh, FE_DLCR5),
1909 bus_space_read_1(bst, bsh, FE_DLCR6),
1910 bus_space_read_1(bst, bsh, FE_DLCR7));
1911
1912 bus_space_write_1(bst, bsh, FE_DLCR7,
1913 (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_DLCR);
1914 log(level, "\t %02x %02x %02x %02x %02x %02x %02x %02x\n",
1915 bus_space_read_1(bst, bsh, FE_DLCR8),
1916 bus_space_read_1(bst, bsh, FE_DLCR9),
1917 bus_space_read_1(bst, bsh, FE_DLCR10),
1918 bus_space_read_1(bst, bsh, FE_DLCR11),
1919 bus_space_read_1(bst, bsh, FE_DLCR12),
1920 bus_space_read_1(bst, bsh, FE_DLCR13),
1921 bus_space_read_1(bst, bsh, FE_DLCR14),
1922 bus_space_read_1(bst, bsh, FE_DLCR15));
1923
1924 bus_space_write_1(bst, bsh, FE_DLCR7,
1925 (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_MAR);
1926 log(level, "\tMAR = %02x %02x %02x %02x %02x %02x %02x %02x\n",
1927 bus_space_read_1(bst, bsh, FE_MAR8),
1928 bus_space_read_1(bst, bsh, FE_MAR9),
1929 bus_space_read_1(bst, bsh, FE_MAR10),
1930 bus_space_read_1(bst, bsh, FE_MAR11),
1931 bus_space_read_1(bst, bsh, FE_MAR12),
1932 bus_space_read_1(bst, bsh, FE_MAR13),
1933 bus_space_read_1(bst, bsh, FE_MAR14),
1934 bus_space_read_1(bst, bsh, FE_MAR15));
1935
1936 bus_space_write_1(bst, bsh, FE_DLCR7,
1937 (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_BMPR);
1938 log(level,
1939 "\tBMPR = xx xx %02x %02x %02x %02x %02x %02x %02x %02x xx %02x\n",
1940 bus_space_read_1(bst, bsh, FE_BMPR10),
1941 bus_space_read_1(bst, bsh, FE_BMPR11),
1942 bus_space_read_1(bst, bsh, FE_BMPR12),
1943 bus_space_read_1(bst, bsh, FE_BMPR13),
1944 bus_space_read_1(bst, bsh, FE_BMPR14),
1945 bus_space_read_1(bst, bsh, FE_BMPR15),
1946 bus_space_read_1(bst, bsh, FE_BMPR16),
1947 bus_space_read_1(bst, bsh, FE_BMPR17),
1948 bus_space_read_1(bst, bsh, FE_BMPR19));
1949
1950 bus_space_write_1(bst, bsh, FE_DLCR7, save_dlcr7);
1951 }
1952 #endif
1953
1954