mb86960.c revision 1.91
1 /* $NetBSD: mb86960.c,v 1.91 2019/05/23 10:57:28 msaitoh Exp $ */ 2 3 /* 4 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995 5 * 6 * This software may be used, modified, copied, distributed, and sold, in 7 * both source and binary form provided that the above copyright, these 8 * terms and the following disclaimer are retained. The name of the author 9 * and/or the contributor may not be used to endorse or promote products 10 * derived from this software without specific prior written permission. 11 * 12 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND 13 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 14 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 15 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE 16 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 17 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 18 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION. 19 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 20 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 21 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 22 * SUCH DAMAGE. 23 */ 24 25 /* 26 * Portions copyright (C) 1993, David Greenman. This software may be used, 27 * modified, copied, distributed, and sold, in both source and binary form 28 * provided that the above copyright and these terms are retained. Under no 29 * circumstances is the author responsible for the proper functioning of this 30 * software, nor does the author assume any responsibility for damages 31 * incurred with its use. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: mb86960.c,v 1.91 2019/05/23 10:57:28 msaitoh Exp $"); 36 37 /* 38 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards. 39 * Contributed by M.S. <seki (at) sysrap.cs.fujitsu.co.jp> 40 * 41 * This version is intended to be a generic template for various 42 * MB86960A/MB86965A based Ethernet cards. It currently supports 43 * Fujitsu FMV-180 series (i.e., FMV-181 and FMV-182) and Allied- 44 * Telesis AT1700 series and RE2000 series. There are some 45 * unnecessary hooks embedded, which are primarily intended to support 46 * other types of Ethernet cards, but the author is not sure whether 47 * they are useful. 48 */ 49 50 #include "opt_inet.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/errno.h> 55 #include <sys/ioctl.h> 56 #include <sys/mbuf.h> 57 #include <sys/socket.h> 58 #include <sys/syslog.h> 59 #include <sys/device.h> 60 #include <sys/rndsource.h> 61 #include <sys/bus.h> 62 63 #include <net/if.h> 64 #include <net/if_dl.h> 65 #include <net/if_types.h> 66 #include <net/if_media.h> 67 #include <net/if_ether.h> 68 #include <net/bpf.h> 69 70 #ifdef INET 71 #include <netinet/in.h> 72 #include <netinet/in_systm.h> 73 #include <netinet/in_var.h> 74 #include <netinet/ip.h> 75 #include <netinet/if_inarp.h> 76 #endif 77 78 #include <dev/ic/mb86960reg.h> 79 #include <dev/ic/mb86960var.h> 80 81 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 82 #define bus_space_write_stream_2 bus_space_write_2 83 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 84 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 85 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 86 87 /* Standard driver entry points. These can be static. */ 88 void mb86960_init(struct mb86960_softc *); 89 int mb86960_ioctl(struct ifnet *, u_long, void *); 90 void mb86960_start(struct ifnet *); 91 void mb86960_reset(struct mb86960_softc *); 92 void mb86960_watchdog(struct ifnet *); 93 94 /* Local functions. Order of declaration is confused. FIXME. */ 95 int mb86960_get_packet(struct mb86960_softc *, u_int); 96 void mb86960_stop(struct mb86960_softc *); 97 void mb86960_tint(struct mb86960_softc *, uint8_t); 98 void mb86960_rint(struct mb86960_softc *, uint8_t); 99 static inline 100 void mb86960_xmit(struct mb86960_softc *); 101 void mb86960_write_mbufs(struct mb86960_softc *, struct mbuf *); 102 static inline 103 void mb86960_droppacket(struct mb86960_softc *); 104 void mb86960_getmcaf(struct ethercom *, uint8_t *); 105 void mb86960_setmode(struct mb86960_softc *); 106 void mb86960_loadmar(struct mb86960_softc *); 107 108 int mb86960_mediachange(struct ifnet *); 109 void mb86960_mediastatus(struct ifnet *, struct ifmediareq *); 110 111 #if FE_DEBUG >= 1 112 void mb86960_dump(int, struct mb86960_softc *); 113 #endif 114 115 void 116 mb86960_attach(struct mb86960_softc *sc, uint8_t *myea) 117 { 118 bus_space_tag_t bst = sc->sc_bst; 119 bus_space_handle_t bsh = sc->sc_bsh; 120 121 /* Register values which depend on board design. */ 122 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; 123 sc->proto_dlcr5 = 0; 124 sc->proto_dlcr7 = FE_D7_BYTSWP_LH; 125 if ((sc->sc_flags & FE_FLAGS_MB86960) != 0) 126 sc->proto_dlcr7 |= FE_D7_ED_TEST; /* XXX */ 127 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO; 128 129 /* 130 * Program the 86960 as following defaults: 131 * SRAM: 32KB, 100ns, byte-wide access. 132 * Transmission buffer: 4KB x 2. 133 * System bus interface: 16 bits. 134 * These values except TXBSIZE should be modified as per 135 * sc_flags which is set in MD attachments, because they 136 * are hard-wired on the board. Modifying TXBSIZE will affect 137 * the driver performance. 138 */ 139 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB | 140 FE_D6_BBW_BYTE | FE_D6_SRAM_100ns; 141 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) 142 sc->proto_dlcr6 |= FE_D6_SBW_BYTE; 143 if (sc->sc_flags & FE_FLAGS_SRAM_150ns) 144 sc->proto_dlcr6 &= ~FE_D6_SRAM_100ns; 145 146 /* 147 * Minimum initialization of the hardware. 148 * We write into registers; hope I/O ports have no 149 * overlap with other boards. 150 */ 151 152 /* Initialize 86960. */ 153 bus_space_write_1(bst, bsh, FE_DLCR6, 154 sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 155 delay(200); 156 157 #ifdef DIAGNOSTIC 158 if (myea == NULL) { 159 aprint_error_dev(sc->sc_dev, 160 "ethernet address shouldn't be NULL\n"); 161 panic("NULL ethernet address"); 162 } 163 #endif 164 memcpy(sc->sc_enaddr, myea, sizeof(sc->sc_enaddr)); 165 166 /* Disable all interrupts. */ 167 bus_space_write_1(bst, bsh, FE_DLCR2, 0); 168 bus_space_write_1(bst, bsh, FE_DLCR3, 0); 169 } 170 171 /* 172 * Install interface into kernel networking data structures 173 */ 174 void 175 mb86960_config(struct mb86960_softc *sc, int *media, int nmedia, int defmedia) 176 { 177 cfdata_t cf = device_cfdata(sc->sc_dev); 178 struct ifnet *ifp = &sc->sc_ec.ec_if; 179 int i; 180 181 /* Stop the 86960. */ 182 mb86960_stop(sc); 183 184 /* Initialize ifnet structure. */ 185 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 186 ifp->if_softc = sc; 187 ifp->if_start = mb86960_start; 188 ifp->if_ioctl = mb86960_ioctl; 189 ifp->if_watchdog = mb86960_watchdog; 190 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 191 IFQ_SET_READY(&ifp->if_snd); 192 193 #if FE_DEBUG >= 3 194 log(LOG_INFO, "%s: mb86960_config()\n", device_xname(sc->sc_dev)); 195 mb86960_dump(LOG_INFO, sc); 196 #endif 197 198 #if FE_SINGLE_TRANSMISSION 199 /* Override txb config to allocate minimum. */ 200 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ; 201 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 202 #endif 203 204 /* Modify hardware config if it is requested. */ 205 if ((cf->cf_flags & FE_FLAGS_OVERRIDE_DLCR6) != 0) 206 sc->proto_dlcr6 = cf->cf_flags & FE_FLAGS_DLCR6_VALUE; 207 208 /* Find TX buffer size, based on the hardware dependent proto. */ 209 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) { 210 case FE_D6_TXBSIZ_2x2KB: 211 sc->txb_size = 2048; 212 break; 213 case FE_D6_TXBSIZ_2x4KB: 214 sc->txb_size = 4096; 215 break; 216 case FE_D6_TXBSIZ_2x8KB: 217 sc->txb_size = 8192; 218 break; 219 default: 220 /* Oops, we can't work with single buffer configuration. */ 221 #if FE_DEBUG >= 2 222 log(LOG_WARNING, "%s: strange TXBSIZ config; fixing\n", 223 device_xname(sc->sc_dev)); 224 #endif 225 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ; 226 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 227 sc->txb_size = 2048; 228 break; 229 } 230 231 /* Initialize media goo. */ 232 ifmedia_init(&sc->sc_media, 0, mb86960_mediachange, 233 mb86960_mediastatus); 234 if (media != NULL) { 235 for (i = 0; i < nmedia; i++) 236 ifmedia_add(&sc->sc_media, media[i], 0, NULL); 237 ifmedia_set(&sc->sc_media, defmedia); 238 } else { 239 ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_MANUAL, 0, NULL); 240 ifmedia_set(&sc->sc_media, IFM_ETHER | IFM_MANUAL); 241 } 242 243 /* Attach the interface. */ 244 if_attach(ifp); 245 if_deferred_start_init(ifp, NULL); 246 ether_ifattach(ifp, sc->sc_enaddr); 247 248 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 249 RND_TYPE_NET, RND_FLAG_DEFAULT); 250 251 /* Print additional info when attached. */ 252 aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n", 253 ether_sprintf(sc->sc_enaddr)); 254 255 #if FE_DEBUG >= 3 256 { 257 int buf, txb, bbw, sbw, ram; 258 259 buf = txb = bbw = sbw = ram = -1; 260 switch (sc->proto_dlcr6 & FE_D6_BUFSIZ) { 261 case FE_D6_BUFSIZ_8KB: 262 buf = 8; 263 break; 264 case FE_D6_BUFSIZ_16KB: 265 buf = 16; 266 break; 267 case FE_D6_BUFSIZ_32KB: 268 buf = 32; 269 break; 270 case FE_D6_BUFSIZ_64KB: 271 buf = 64; 272 break; 273 } 274 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) { 275 case FE_D6_TXBSIZ_2x2KB: 276 txb = 2; 277 break; 278 case FE_D6_TXBSIZ_2x4KB: 279 txb = 4; 280 break; 281 case FE_D6_TXBSIZ_2x8KB: 282 txb = 8; 283 break; 284 } 285 switch (sc->proto_dlcr6 & FE_D6_BBW) { 286 case FE_D6_BBW_BYTE: 287 bbw = 8; 288 break; 289 case FE_D6_BBW_WORD: 290 bbw = 16; 291 break; 292 } 293 switch (sc->proto_dlcr6 & FE_D6_SBW) { 294 case FE_D6_SBW_BYTE: 295 sbw = 8; 296 break; 297 case FE_D6_SBW_WORD: 298 sbw = 16; 299 break; 300 } 301 switch (sc->proto_dlcr6 & FE_D6_SRAM) { 302 case FE_D6_SRAM_100ns: 303 ram = 100; 304 break; 305 case FE_D6_SRAM_150ns: 306 ram = 150; 307 break; 308 } 309 aprint_debug_dev(sc->sc_dev, 310 "SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n", 311 buf, bbw, ram, txb, sbw); 312 } 313 #endif 314 315 /* The attach is successful. */ 316 sc->sc_stat |= FE_STAT_ATTACHED; 317 } 318 319 /* 320 * Media change callback. 321 */ 322 int 323 mb86960_mediachange(struct ifnet *ifp) 324 { 325 struct mb86960_softc *sc = ifp->if_softc; 326 327 if (sc->sc_mediachange) 328 return (*sc->sc_mediachange)(sc); 329 return 0; 330 } 331 332 /* 333 * Media status callback. 334 */ 335 void 336 mb86960_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) 337 { 338 struct mb86960_softc *sc = ifp->if_softc; 339 340 if ((sc->sc_stat & FE_STAT_ENABLED) == 0) { 341 ifmr->ifm_active = IFM_ETHER | IFM_NONE; 342 ifmr->ifm_status = 0; 343 return; 344 } 345 346 if (sc->sc_mediastatus) 347 (*sc->sc_mediastatus)(sc, ifmr); 348 } 349 350 /* 351 * Reset interface. 352 */ 353 void 354 mb86960_reset(struct mb86960_softc *sc) 355 { 356 int s; 357 358 s = splnet(); 359 mb86960_stop(sc); 360 mb86960_init(sc); 361 splx(s); 362 } 363 364 /* 365 * Stop everything on the interface. 366 * 367 * All buffered packets, both transmitting and receiving, 368 * if any, will be lost by stopping the interface. 369 */ 370 void 371 mb86960_stop(struct mb86960_softc *sc) 372 { 373 bus_space_tag_t bst = sc->sc_bst; 374 bus_space_handle_t bsh = sc->sc_bsh; 375 376 #if FE_DEBUG >= 3 377 log(LOG_INFO, "%s: top of mb86960_stop()\n", device_xname(sc->sc_dev)); 378 mb86960_dump(LOG_INFO, sc); 379 #endif 380 381 /* Disable interrupts. */ 382 bus_space_write_1(bst, bsh, FE_DLCR2, 0x00); 383 bus_space_write_1(bst, bsh, FE_DLCR3, 0x00); 384 385 /* Stop interface hardware. */ 386 delay(200); 387 bus_space_write_1(bst, bsh, FE_DLCR6, 388 sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 389 delay(200); 390 391 /* Clear all interrupt status. */ 392 bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF); 393 bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF); 394 395 /* Put the chip in stand-by mode. */ 396 delay(200); 397 bus_space_write_1(bst, bsh, FE_DLCR7, 398 sc->proto_dlcr7 | FE_D7_POWER_DOWN); 399 delay(200); 400 401 /* MAR loading can be delayed. */ 402 sc->filter_change = 0; 403 404 /* Call a hook. */ 405 if (sc->stop_card) 406 (*sc->stop_card)(sc); 407 408 #if FE_DEBUG >= 3 409 log(LOG_INFO, "%s: end of mb86960_stop()\n", device_xname(sc->sc_dev)); 410 mb86960_dump(LOG_INFO, sc); 411 #endif 412 } 413 414 /* 415 * Device timeout/watchdog routine. Entered if the device neglects to 416 * generate an interrupt after a transmit has been started on it. 417 */ 418 void 419 mb86960_watchdog(struct ifnet *ifp) 420 { 421 struct mb86960_softc *sc = ifp->if_softc; 422 423 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev)); 424 #if FE_DEBUG >= 3 425 mb86960_dump(LOG_INFO, sc); 426 #endif 427 428 /* Record how many packets are lost by this accident. */ 429 sc->sc_ec.ec_if.if_oerrors += sc->txb_sched + sc->txb_count; 430 431 mb86960_reset(sc); 432 } 433 434 /* 435 * Drop (skip) a packet from receive buffer in 86960 memory. 436 */ 437 static inline void 438 mb86960_droppacket(struct mb86960_softc *sc) 439 { 440 bus_space_tag_t bst = sc->sc_bst; 441 bus_space_handle_t bsh = sc->sc_bsh; 442 443 bus_space_write_1(bst, bsh, FE_BMPR14, FE_B14_FILTER | FE_B14_SKIP); 444 } 445 446 /* 447 * Initialize device. 448 */ 449 void 450 mb86960_init(struct mb86960_softc *sc) 451 { 452 bus_space_tag_t bst = sc->sc_bst; 453 bus_space_handle_t bsh = sc->sc_bsh; 454 struct ifnet *ifp = &sc->sc_ec.ec_if; 455 int i; 456 457 #if FE_DEBUG >= 3 458 log(LOG_INFO, "%s: top of mb86960_init()\n", device_xname(sc->sc_dev)); 459 mb86960_dump(LOG_INFO, sc); 460 #endif 461 462 /* Reset transmitter flags. */ 463 ifp->if_flags &= ~IFF_OACTIVE; 464 ifp->if_timer = 0; 465 466 sc->txb_free = sc->txb_size; 467 sc->txb_count = 0; 468 sc->txb_sched = 0; 469 470 /* Do any card-specific initialization, if applicable. */ 471 if (sc->init_card) 472 (*sc->init_card)(sc); 473 474 #if FE_DEBUG >= 3 475 log(LOG_INFO, "%s: after init hook\n", device_xname(sc->sc_dev)); 476 mb86960_dump(LOG_INFO, sc); 477 #endif 478 479 /* 480 * Make sure to disable the chip, also. 481 * This may also help re-programming the chip after 482 * hot insertion of PCMCIAs. 483 */ 484 bus_space_write_1(bst, bsh, FE_DLCR6, 485 sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 486 delay(200); 487 488 /* Power up the chip and select register bank for DLCRs. */ 489 bus_space_write_1(bst, bsh, FE_DLCR7, 490 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP); 491 delay(200); 492 493 /* Feed the station address. */ 494 bus_space_write_region_1(bst, bsh, FE_DLCR8, 495 sc->sc_enaddr, ETHER_ADDR_LEN); 496 497 /* Select the BMPR bank for runtime register access. */ 498 bus_space_write_1(bst, bsh, FE_DLCR7, 499 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 500 501 /* Initialize registers. */ 502 bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF); /* Clear all bits. */ 503 bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF); /* ditto. */ 504 bus_space_write_1(bst, bsh, FE_DLCR2, 0x00); 505 bus_space_write_1(bst, bsh, FE_DLCR3, 0x00); 506 bus_space_write_1(bst, bsh, FE_DLCR4, sc->proto_dlcr4); 507 bus_space_write_1(bst, bsh, FE_DLCR5, sc->proto_dlcr5); 508 bus_space_write_1(bst, bsh, FE_BMPR10, 0x00); 509 bus_space_write_1(bst, bsh, FE_BMPR11, FE_B11_CTRL_SKIP); 510 bus_space_write_1(bst, bsh, FE_BMPR12, 0x00); 511 bus_space_write_1(bst, bsh, FE_BMPR13, sc->proto_bmpr13); 512 bus_space_write_1(bst, bsh, FE_BMPR14, FE_B14_FILTER); 513 bus_space_write_1(bst, bsh, FE_BMPR15, 0x00); 514 515 #if FE_DEBUG >= 3 516 log(LOG_INFO, "%s: just before enabling DLC\n", 517 device_xname(sc->sc_dev)); 518 mb86960_dump(LOG_INFO, sc); 519 #endif 520 521 /* Enable interrupts. */ 522 bus_space_write_1(bst, bsh, FE_DLCR2, FE_TMASK); 523 bus_space_write_1(bst, bsh, FE_DLCR3, FE_RMASK); 524 525 /* Enable transmitter and receiver. */ 526 delay(200); 527 bus_space_write_1(bst, bsh, FE_DLCR6, 528 sc->proto_dlcr6 | FE_D6_DLC_ENABLE); 529 delay(200); 530 531 #if FE_DEBUG >= 3 532 log(LOG_INFO, "%s: just after enabling DLC\n", 533 device_xname(sc->sc_dev)); 534 mb86960_dump(LOG_INFO, sc); 535 #endif 536 537 /* 538 * Make sure to empty the receive buffer. 539 * 540 * This may be redundant, but *if* the receive buffer were full 541 * at this point, the driver would hang. I have experienced 542 * some strange hangups just after UP. I hope the following 543 * code solve the problem. 544 * 545 * I have changed the order of hardware initialization. 546 * I think the receive buffer cannot have any packets at this 547 * point in this version. The following code *must* be 548 * redundant now. FIXME. 549 */ 550 for (i = 0; i < FE_MAX_RECV_COUNT; i++) { 551 if (bus_space_read_1(bst, bsh, FE_DLCR5) & FE_D5_BUFEMP) 552 break; 553 mb86960_droppacket(sc); 554 } 555 #if FE_DEBUG >= 1 556 if (i >= FE_MAX_RECV_COUNT) 557 log(LOG_ERR, "%s: cannot empty receive buffer\n", 558 device_xname(sc->sc_dev)); 559 #endif 560 #if FE_DEBUG >= 3 561 if (i < FE_MAX_RECV_COUNT) 562 log(LOG_INFO, "%s: receive buffer emptied (%d)\n", 563 device_xname(sc->sc_dev), i); 564 #endif 565 566 #if FE_DEBUG >= 3 567 log(LOG_INFO, "%s: after ERB loop\n", device_xname(sc->sc_dev)); 568 mb86960_dump(LOG_INFO, sc); 569 #endif 570 571 /* Do we need this here? */ 572 bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF); /* Clear all bits. */ 573 bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF); /* ditto. */ 574 575 #if FE_DEBUG >= 3 576 log(LOG_INFO, "%s: after FIXME\n", device_xname(sc->sc_dev)); 577 mb86960_dump(LOG_INFO, sc); 578 #endif 579 580 /* Set 'running' flag. */ 581 ifp->if_flags |= IFF_RUNNING; 582 583 /* 584 * At this point, the interface is runnung properly, 585 * except that it receives *no* packets. we then call 586 * mb86960_setmode() to tell the chip what packets to be 587 * received, based on the if_flags and multicast group 588 * list. It completes the initialization process. 589 */ 590 mb86960_setmode(sc); 591 592 #if FE_DEBUG >= 3 593 log(LOG_INFO, "%s: after setmode\n", device_xname(sc->sc_dev)); 594 mb86960_dump(LOG_INFO, sc); 595 #endif 596 597 /* ...and attempt to start output. */ 598 mb86960_start(ifp); 599 600 #if FE_DEBUG >= 3 601 log(LOG_INFO, "%s: end of mb86960_init()\n", device_xname(sc->sc_dev)); 602 mb86960_dump(LOG_INFO, sc); 603 #endif 604 } 605 606 /* 607 * This routine actually starts the transmission on the interface 608 */ 609 static inline void 610 mb86960_xmit(struct mb86960_softc *sc) 611 { 612 bus_space_tag_t bst = sc->sc_bst; 613 bus_space_handle_t bsh = sc->sc_bsh; 614 615 /* 616 * Set a timer just in case we never hear from the board again. 617 * We use longer timeout for multiple packet transmission. 618 * I'm not sure this timer value is appropriate. FIXME. 619 */ 620 sc->sc_ec.ec_if.if_timer = 1 + sc->txb_count; 621 622 /* Update txb variables. */ 623 sc->txb_sched = sc->txb_count; 624 sc->txb_count = 0; 625 sc->txb_free = sc->txb_size; 626 627 #if FE_DELAYED_PADDING 628 /* Omit the postponed padding process. */ 629 sc->txb_padding = 0; 630 #endif 631 632 /* Start transmitter, passing packets in TX buffer. */ 633 bus_space_write_1(bst, bsh, FE_BMPR10, sc->txb_sched | FE_B10_START); 634 } 635 636 /* 637 * Start output on interface. 638 * We make two assumptions here: 639 * 1) that the current priority is set to splnet _before_ this code 640 * is called *and* is returned to the appropriate priority after 641 * return 642 * 2) that the IFF_OACTIVE flag is checked before this code is called 643 * (i.e. that the output part of the interface is idle) 644 */ 645 void 646 mb86960_start(struct ifnet *ifp) 647 { 648 struct mb86960_softc *sc = ifp->if_softc; 649 struct mbuf *m; 650 651 #if FE_DEBUG >= 1 652 /* Just a sanity check. */ 653 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) { 654 /* 655 * Txb_count and txb_free co-works to manage the 656 * transmission buffer. Txb_count keeps track of the 657 * used potion of the buffer, while txb_free does unused 658 * potion. So, as long as the driver runs properly, 659 * txb_count is zero if and only if txb_free is same 660 * as txb_size (which represents whole buffer.) 661 */ 662 log(LOG_ERR, "%s: inconsistent txb variables (%d, %d)\n", 663 device_xname(sc->sc_dev), sc->txb_count, sc->txb_free); 664 /* 665 * So, what should I do, then? 666 * 667 * We now know txb_count and txb_free contradicts. We 668 * cannot, however, tell which is wrong. More 669 * over, we cannot peek 86960 transmission buffer or 670 * reset the transmission buffer. (In fact, we can 671 * reset the entire interface. I don't want to do it.) 672 * 673 * If txb_count is incorrect, leaving it as is will cause 674 * sending of garbage after the next interrupt. We have to 675 * avoid it. Hence, we reset the txb_count here. If 676 * txb_free was incorrect, resetting txb_count just loose 677 * some packets. We can live with it. 678 */ 679 sc->txb_count = 0; 680 } 681 #endif 682 683 #if FE_DEBUG >= 1 684 /* 685 * First, see if there are buffered packets and an idle 686 * transmitter - should never happen at this point. 687 */ 688 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) { 689 log(LOG_ERR, "%s: transmitter idle with %d buffered packets\n", 690 device_xname(sc->sc_dev), sc->txb_count); 691 mb86960_xmit(sc); 692 } 693 #endif 694 695 /* 696 * Stop accepting more transmission packets temporarily, when 697 * a filter change request is delayed. Updating the MARs on 698 * 86960 flushes the transmisstion buffer, so it is delayed 699 * until all buffered transmission packets have been sent 700 * out. 701 */ 702 if (sc->filter_change) { 703 /* 704 * Filter change request is delayed only when the DLC is 705 * working. DLC soon raise an interrupt after finishing 706 * the work. 707 */ 708 goto indicate_active; 709 } 710 711 for (;;) { 712 /* 713 * See if there is room to put another packet in the buffer. 714 * We *could* do better job by peeking the send queue to 715 * know the length of the next packet. Current version just 716 * tests against the worst case (i.e., longest packet). FIXME. 717 * 718 * When adding the packet-peek feature, don't forget adding a 719 * test on txb_count against QUEUEING_MAX. 720 * There is a little chance the packet count exceeds 721 * the limit. Assume transmission buffer is 8KB (2x8KB 722 * configuration) and an application sends a bunch of small 723 * (i.e., minimum packet sized) packets rapidly. An 8KB 724 * buffer can hold 130 blocks of 62 bytes long... 725 */ 726 if (sc->txb_free < 727 (ETHER_MAX_LEN - ETHER_CRC_LEN) + FE_TXLEN_SIZE) { 728 /* No room. */ 729 goto indicate_active; 730 } 731 732 #if FE_SINGLE_TRANSMISSION 733 if (sc->txb_count > 0) { 734 /* Just one packet per a transmission buffer. */ 735 goto indicate_active; 736 } 737 #endif 738 739 /* 740 * Get the next mbuf chain for a packet to send. 741 */ 742 IFQ_DEQUEUE(&ifp->if_snd, m); 743 if (m == 0) { 744 /* No more packets to send. */ 745 goto indicate_inactive; 746 } 747 748 /* Tap off here if there is a BPF listener. */ 749 bpf_mtap(ifp, m, BPF_D_OUT); 750 751 /* 752 * Copy the mbuf chain into the transmission buffer. 753 * txb_* variables are updated as necessary. 754 */ 755 mb86960_write_mbufs(sc, m); 756 757 m_freem(m); 758 759 /* Start transmitter if it's idle. */ 760 if (sc->txb_sched == 0) 761 mb86960_xmit(sc); 762 } 763 764 indicate_inactive: 765 /* 766 * We are using the !OACTIVE flag to indicate to 767 * the outside world that we can accept an 768 * additional packet rather than that the 769 * transmitter is _actually_ active. Indeed, the 770 * transmitter may be active, but if we haven't 771 * filled all the buffers with data then we still 772 * want to accept more. 773 */ 774 ifp->if_flags &= ~IFF_OACTIVE; 775 return; 776 777 indicate_active: 778 /* 779 * The transmitter is active, and there are no room for 780 * more outgoing packets in the transmission buffer. 781 */ 782 ifp->if_flags |= IFF_OACTIVE; 783 return; 784 } 785 786 /* 787 * Transmission interrupt handler 788 * The control flow of this function looks silly. FIXME. 789 */ 790 void 791 mb86960_tint(struct mb86960_softc *sc, uint8_t tstat) 792 { 793 bus_space_tag_t bst = sc->sc_bst; 794 bus_space_handle_t bsh = sc->sc_bsh; 795 struct ifnet *ifp = &sc->sc_ec.ec_if; 796 int left; 797 int col; 798 799 /* 800 * Handle "excessive collision" interrupt. 801 */ 802 if (tstat & FE_D0_COLL16) { 803 /* 804 * Find how many packets (including this collided one) 805 * are left unsent in transmission buffer. 806 */ 807 left = bus_space_read_1(bst, bsh, FE_BMPR10); 808 809 #if FE_DEBUG >= 2 810 log(LOG_WARNING, "%s: excessive collision (%d/%d)\n", 811 device_xname(sc->sc_dev), left, sc->txb_sched); 812 #endif 813 #if FE_DEBUG >= 3 814 mb86960_dump(LOG_INFO, sc); 815 #endif 816 817 /* 818 * Update statistics. 819 */ 820 ifp->if_collisions += 16; 821 ifp->if_oerrors++; 822 ifp->if_opackets += sc->txb_sched - left; 823 824 /* 825 * Collision statistics has been updated. 826 * Clear the collision flag on 86960 now to avoid confusion. 827 */ 828 bus_space_write_1(bst, bsh, FE_DLCR0, FE_D0_COLLID); 829 830 /* 831 * Restart transmitter, skipping the 832 * collided packet. 833 * 834 * We *must* skip the packet to keep network running 835 * properly. Excessive collision error is an 836 * indication of the network overload. If we 837 * tried sending the same packet after excessive 838 * collision, the network would be filled with 839 * out-of-time packets. Packets belonging 840 * to reliable transport (such as TCP) are resent 841 * by some upper layer. 842 */ 843 bus_space_write_1(bst, bsh, FE_BMPR11, 844 FE_B11_CTRL_SKIP | FE_B11_MODE1); 845 sc->txb_sched = left - 1; 846 } 847 848 /* 849 * Handle "transmission complete" interrupt. 850 */ 851 if (tstat & FE_D0_TXDONE) { 852 /* 853 * Add in total number of collisions on last 854 * transmission. We also clear "collision occurred" flag 855 * here. 856 * 857 * 86960 has a design flow on collision count on multiple 858 * packet transmission. When we send two or more packets 859 * with one start command (that's what we do when the 860 * transmission queue is clauded), 86960 informs us number 861 * of collisions occurred on the last packet on the 862 * transmission only. Number of collisions on previous 863 * packets are lost. I have told that the fact is clearly 864 * stated in the Fujitsu document. 865 * 866 * I considered not to mind it seriously. Collision 867 * count is not so important, anyway. Any comments? FIXME. 868 */ 869 870 if (bus_space_read_1(bst, bsh, FE_DLCR0) & FE_D0_COLLID) { 871 /* Clear collision flag. */ 872 bus_space_write_1(bst, bsh, FE_DLCR0, FE_D0_COLLID); 873 874 /* Extract collision count from 86960. */ 875 col = bus_space_read_1(bst, bsh, FE_DLCR4) & FE_D4_COL; 876 if (col == 0) { 877 /* 878 * Status register indicates collisions, 879 * while the collision count is zero. 880 * This can happen after multiple packet 881 * transmission, indicating that one or more 882 * previous packet(s) had been collided. 883 * 884 * Since the accurate number of collisions 885 * has been lost, we just guess it as 1; 886 * Am I too optimistic? FIXME. 887 */ 888 col = 1; 889 } else 890 col >>= FE_D4_COL_SHIFT; 891 ifp->if_collisions += col; 892 #if FE_DEBUG >= 4 893 log(LOG_WARNING, "%s: %d collision%s (%d)\n", 894 device_xname(sc->sc_dev), col, col == 1 ? "" : "s", 895 sc->txb_sched); 896 #endif 897 } 898 899 /* 900 * Update total number of successfully 901 * transmitted packets. 902 */ 903 ifp->if_opackets += sc->txb_sched; 904 sc->txb_sched = 0; 905 } 906 907 if (sc->txb_sched == 0) { 908 /* 909 * The transmitter is no more active. 910 * Reset output active flag and watchdog timer. 911 */ 912 ifp->if_flags &= ~IFF_OACTIVE; 913 ifp->if_timer = 0; 914 915 /* 916 * If more data is ready to transmit in the buffer, start 917 * transmitting them. Otherwise keep transmitter idle, 918 * even if more data is queued. This gives receive 919 * process a slight priority. 920 */ 921 if (sc->txb_count > 0) 922 mb86960_xmit(sc); 923 } 924 } 925 926 /* 927 * Ethernet interface receiver interrupt. 928 */ 929 void 930 mb86960_rint(struct mb86960_softc *sc, uint8_t rstat) 931 { 932 bus_space_tag_t bst = sc->sc_bst; 933 bus_space_handle_t bsh = sc->sc_bsh; 934 struct ifnet *ifp = &sc->sc_ec.ec_if; 935 u_int status, len; 936 int i; 937 938 /* 939 * Update statistics if this interrupt is caused by an error. 940 */ 941 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | FE_D1_ALGERR | 942 FE_D1_SRTPKT)) { 943 #if FE_DEBUG >= 3 944 char sbuf[sizeof(FE_D1_ERRBITS) + 64]; 945 946 snprintb(sbuf, sizeof(sbuf), FE_D1_ERRBITS, rstat); 947 log(LOG_WARNING, "%s: receive error: %s\n", 948 device_xname(sc->sc_dev), sbuf); 949 #endif 950 ifp->if_ierrors++; 951 } 952 953 /* 954 * MB86960 has a flag indicating "receive queue empty." 955 * We just loop checking the flag to pull out all received 956 * packets. 957 * 958 * We limit the number of iterrations to avoid infinite loop. 959 * It can be caused by a very slow CPU (some broken 960 * peripheral may insert incredible number of wait cycles) 961 * or, worse, by a broken MB86960 chip. 962 */ 963 for (i = 0; i < FE_MAX_RECV_COUNT; i++) { 964 /* Stop the iterration if 86960 indicates no packets. */ 965 if (bus_space_read_1(bst, bsh, FE_DLCR5) & FE_D5_BUFEMP) 966 break; 967 968 /* 969 * Extract receive packet status from the receive 970 * packet header. 971 */ 972 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) { 973 status = bus_space_read_1(bst, bsh, FE_BMPR8); 974 (void)bus_space_read_1(bst, bsh, FE_BMPR8); 975 } else 976 status = bus_space_read_2(bst, bsh, FE_BMPR8); 977 978 #if FE_DEBUG >= 4 979 log(LOG_INFO, "%s: receive status = %02x\n", 980 device_xname(sc->sc_dev), status); 981 #endif 982 983 /* 984 * If there was an error, update statistics and drop 985 * the packet, unless the interface is in promiscuous 986 * mode. 987 */ 988 if ((status & FE_RXSTAT_GOODPKT) == 0) { 989 if ((ifp->if_flags & IFF_PROMISC) == 0) { 990 ifp->if_ierrors++; 991 mb86960_droppacket(sc); 992 continue; 993 } 994 } 995 996 /* 997 * Extract the packet length from the receive packet header. 998 * It is a sum of a header (14 bytes) and a payload. 999 * CRC has been stripped off by the 86960. 1000 */ 1001 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) { 1002 len = bus_space_read_1(bst, bsh, FE_BMPR8); 1003 len |= bus_space_read_1(bst, bsh, FE_BMPR8) << 8; 1004 } else 1005 len = bus_space_read_2(bst, bsh, FE_BMPR8); 1006 1007 /* 1008 * MB86965 checks the packet length and drop big packet 1009 * before passing it to us. There are no chance we can 1010 * get [crufty] packets. Hence, if the length exceeds 1011 * the specified limit, it means some serious failure, 1012 * such as out-of-sync on receive buffer management. 1013 * 1014 * Is this statement true? FIXME. 1015 */ 1016 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN) || 1017 len < ETHER_HDR_LEN) { 1018 #if FE_DEBUG >= 2 1019 log(LOG_WARNING, 1020 "%s: received a %s packet? (%u bytes)\n", 1021 device_xname(sc->sc_dev), 1022 len < ETHER_HDR_LEN ? "partial" : "big", len); 1023 #endif 1024 ifp->if_ierrors++; 1025 mb86960_droppacket(sc); 1026 continue; 1027 } 1028 1029 /* 1030 * Check for a short (RUNT) packet. We *do* check 1031 * but do nothing other than print a message. 1032 * Short packets are illegal, but does nothing bad 1033 * if it carries data for upper layer. 1034 */ 1035 #if FE_DEBUG >= 2 1036 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 1037 log(LOG_WARNING, 1038 "%s: received a short packet? (%u bytes)\n", 1039 device_xname(sc->sc_dev), len); 1040 } 1041 #endif 1042 1043 /* 1044 * Go get a packet. 1045 */ 1046 if (mb86960_get_packet(sc, len) == 0) { 1047 /* Skip a packet, updating statistics. */ 1048 #if FE_DEBUG >= 2 1049 log(LOG_WARNING, 1050 "%s: out of mbufs; dropping packet (%u bytes)\n", 1051 device_xname(sc->sc_dev), len); 1052 #endif 1053 ifp->if_ierrors++; 1054 mb86960_droppacket(sc); 1055 1056 /* 1057 * We stop receiving packets, even if there are 1058 * more in the buffer. We hope we can get more 1059 * mbufs next time. 1060 */ 1061 return; 1062 } 1063 } 1064 } 1065 1066 /* 1067 * Ethernet interface interrupt processor 1068 */ 1069 int 1070 mb86960_intr(void *arg) 1071 { 1072 struct mb86960_softc *sc = arg; 1073 bus_space_tag_t bst = sc->sc_bst; 1074 bus_space_handle_t bsh = sc->sc_bsh; 1075 struct ifnet *ifp = &sc->sc_ec.ec_if; 1076 uint8_t tstat, rstat; 1077 1078 if ((sc->sc_stat & FE_STAT_ENABLED) == 0 || 1079 !device_is_active(sc->sc_dev)) 1080 return 0; 1081 1082 #if FE_DEBUG >= 4 1083 log(LOG_INFO, "%s: mb86960_intr()\n", device_xname(sc->sc_dev)); 1084 mb86960_dump(LOG_INFO, sc); 1085 #endif 1086 1087 /* 1088 * Get interrupt conditions, masking unneeded flags. 1089 */ 1090 tstat = bus_space_read_1(bst, bsh, FE_DLCR0) & FE_TMASK; 1091 rstat = bus_space_read_1(bst, bsh, FE_DLCR1) & FE_RMASK; 1092 if (tstat == 0 && rstat == 0) 1093 return 0; 1094 1095 /* 1096 * Loop until there are no more new interrupt conditions. 1097 */ 1098 for (;;) { 1099 /* 1100 * Reset the conditions we are acknowledging. 1101 */ 1102 bus_space_write_1(bst, bsh, FE_DLCR0, tstat); 1103 bus_space_write_1(bst, bsh, FE_DLCR1, rstat); 1104 1105 /* 1106 * Handle transmitter interrupts. Handle these first because 1107 * the receiver will reset the board under some conditions. 1108 */ 1109 if (tstat != 0) 1110 mb86960_tint(sc, tstat); 1111 1112 /* 1113 * Handle receiver interrupts. 1114 */ 1115 if (rstat != 0) 1116 mb86960_rint(sc, rstat); 1117 1118 /* 1119 * Update the multicast address filter if it is 1120 * needed and possible. We do it now, because 1121 * we can make sure the transmission buffer is empty, 1122 * and there is a good chance that the receive queue 1123 * is empty. It will minimize the possibility of 1124 * packet lossage. 1125 */ 1126 if (sc->filter_change && 1127 sc->txb_count == 0 && sc->txb_sched == 0) { 1128 mb86960_loadmar(sc); 1129 ifp->if_flags &= ~IFF_OACTIVE; 1130 } 1131 1132 /* 1133 * If it looks like the transmitter can take more data, 1134 * attempt to start output on the interface. This is done 1135 * after handling the receiver interrupt to give the 1136 * receive operation priority. 1137 */ 1138 if ((ifp->if_flags & IFF_OACTIVE) == 0) 1139 if_schedule_deferred_start(ifp); 1140 1141 if (rstat != 0 || tstat != 0) 1142 rnd_add_uint32(&sc->rnd_source, rstat + tstat); 1143 1144 /* 1145 * Get interrupt conditions, masking unneeded flags. 1146 */ 1147 tstat = bus_space_read_1(bst, bsh, FE_DLCR0) & FE_TMASK; 1148 rstat = bus_space_read_1(bst, bsh, FE_DLCR1) & FE_RMASK; 1149 if (tstat == 0 && rstat == 0) 1150 return 1; 1151 } 1152 } 1153 1154 /* 1155 * Process an ioctl request. This code needs some work - it looks pretty ugly. 1156 */ 1157 int 1158 mb86960_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1159 { 1160 struct mb86960_softc *sc = ifp->if_softc; 1161 struct ifaddr *ifa = (struct ifaddr *)data; 1162 struct ifreq *ifr = (struct ifreq *)data; 1163 int s, error = 0; 1164 1165 #if FE_DEBUG >= 3 1166 log(LOG_INFO, "%s: ioctl(%lx)\n", device_xname(sc->sc_dev), cmd); 1167 #endif 1168 1169 s = splnet(); 1170 1171 switch (cmd) { 1172 case SIOCINITIFADDR: 1173 if ((error = mb86960_enable(sc)) != 0) 1174 break; 1175 ifp->if_flags |= IFF_UP; 1176 1177 mb86960_init(sc); 1178 switch (ifa->ifa_addr->sa_family) { 1179 #ifdef INET 1180 case AF_INET: 1181 arp_ifinit(ifp, ifa); 1182 break; 1183 #endif 1184 default: 1185 break; 1186 } 1187 break; 1188 1189 case SIOCSIFFLAGS: 1190 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1191 break; 1192 /* XXX re-use ether_ioctl() */ 1193 switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { 1194 case IFF_RUNNING: 1195 /* 1196 * If interface is marked down and it is running, then 1197 * stop it. 1198 */ 1199 mb86960_stop(sc); 1200 ifp->if_flags &= ~IFF_RUNNING; 1201 mb86960_disable(sc); 1202 break; 1203 case IFF_UP: 1204 /* 1205 * If interface is marked up and it is stopped, then 1206 * start it. 1207 */ 1208 if ((error = mb86960_enable(sc)) != 0) 1209 break; 1210 mb86960_init(sc); 1211 break; 1212 case IFF_UP | IFF_RUNNING: 1213 /* 1214 * Reset the interface to pick up changes in any other 1215 * flags that affect hardware registers. 1216 */ 1217 mb86960_setmode(sc); 1218 break; 1219 case 0: 1220 break; 1221 } 1222 #if FE_DEBUG >= 1 1223 /* "ifconfig fe0 debug" to print register dump. */ 1224 if (ifp->if_flags & IFF_DEBUG) { 1225 log(LOG_INFO, "%s: SIOCSIFFLAGS(DEBUG)\n", 1226 device_xname(sc->sc_dev)); 1227 mb86960_dump(LOG_DEBUG, sc); 1228 } 1229 #endif 1230 break; 1231 1232 case SIOCADDMULTI: 1233 case SIOCDELMULTI: 1234 if ((sc->sc_stat & FE_STAT_ENABLED) == 0) { 1235 error = EIO; 1236 break; 1237 } 1238 1239 /* Update our multicast list. */ 1240 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1241 /* 1242 * Multicast list has changed; set the hardware filter 1243 * accordingly. 1244 */ 1245 if (ifp->if_flags & IFF_RUNNING) 1246 mb86960_setmode(sc); 1247 error = 0; 1248 } 1249 break; 1250 1251 case SIOCGIFMEDIA: 1252 case SIOCSIFMEDIA: 1253 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd); 1254 break; 1255 1256 default: 1257 error = ether_ioctl(ifp, cmd, data); 1258 break; 1259 } 1260 1261 splx(s); 1262 return error; 1263 } 1264 1265 /* 1266 * Retrieve packet from receive buffer and send to the next level up via 1267 * ether_input(). If there is a BPF listener, give a copy to BPF, too. 1268 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure). 1269 */ 1270 int 1271 mb86960_get_packet(struct mb86960_softc *sc, u_int len) 1272 { 1273 bus_space_tag_t bst = sc->sc_bst; 1274 bus_space_handle_t bsh = sc->sc_bsh; 1275 struct ifnet *ifp = &sc->sc_ec.ec_if; 1276 struct mbuf *m; 1277 1278 /* Allocate a header mbuf. */ 1279 MGETHDR(m, M_DONTWAIT, MT_DATA); 1280 if (m == 0) 1281 return 0; 1282 m_set_rcvif(m, ifp); 1283 m->m_pkthdr.len = len; 1284 1285 /* The following silliness is to make NFS happy. */ 1286 #define EROUND ((sizeof(struct ether_header) + 3) & ~3) 1287 #define EOFF (EROUND - sizeof(struct ether_header)) 1288 1289 /* 1290 * Our strategy has one more problem. There is a policy on 1291 * mbuf cluster allocation. It says that we must have at 1292 * least MINCLSIZE (208 bytes) to allocate a cluster. For a 1293 * packet of a size between (MHLEN - 2) to (MINCLSIZE - 2), 1294 * our code violates the rule... 1295 * On the other hand, the current code is short, simple, 1296 * and fast, however. It does no harmful thing, just waists 1297 * some memory. Any comments? FIXME. 1298 */ 1299 1300 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */ 1301 if (len > MHLEN - EOFF) { 1302 MCLGET(m, M_DONTWAIT); 1303 if ((m->m_flags & M_EXT) == 0) { 1304 m_freem(m); 1305 return 0; 1306 } 1307 } 1308 1309 /* 1310 * The following assumes there is room for the ether header in the 1311 * header mbuf. 1312 */ 1313 m->m_data += EOFF; 1314 1315 /* Set the length of this packet. */ 1316 m->m_len = len; 1317 1318 /* Get a packet. */ 1319 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) 1320 bus_space_read_multi_1(bst, bsh, FE_BMPR8, 1321 mtod(m, uint8_t *), len); 1322 else 1323 bus_space_read_multi_stream_2(bst, bsh, FE_BMPR8, 1324 mtod(m, uint16_t *), (len + 1) >> 1); 1325 1326 if_percpuq_enqueue(ifp->if_percpuq, m); 1327 return 1; 1328 } 1329 1330 /* 1331 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO. 1332 * Returns number of bytes actually written, including length word. 1333 * 1334 * If an mbuf chain is too long for an Ethernet frame, it is not sent. 1335 * Packets shorter than Ethernet minimum are legal, and we pad them 1336 * before sending out. An exception is "partial" packets which are 1337 * shorter than mandatory Ethernet header. 1338 * 1339 * I wrote a code for an experimental "delayed padding" technique. 1340 * When employed, it postpones the padding process for short packets. 1341 * If xmit() occurred at the moment, the padding process is omitted, and 1342 * garbages are sent as pad data. If next packet is stored in the 1343 * transmission buffer before xmit(), write_mbuf() pads the previous 1344 * packet before transmitting new packet. This *may* gain the 1345 * system performance (slightly). 1346 */ 1347 void 1348 mb86960_write_mbufs(struct mb86960_softc *sc, struct mbuf *m) 1349 { 1350 bus_space_tag_t bst = sc->sc_bst; 1351 bus_space_handle_t bsh = sc->sc_bsh; 1352 int totlen, len; 1353 #if FE_DEBUG >= 2 1354 struct mbuf *mp; 1355 #endif 1356 1357 #if FE_DELAYED_PADDING 1358 /* Do the "delayed padding." */ 1359 if (sc->txb_padding > 0) { 1360 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) { 1361 for (len = sc->txb_padding; len > 0; len--) 1362 bus_space_write_1(bst, bsh, FE_BMPR8, 0); 1363 } else { 1364 for (len = sc->txb_padding >> 1; len > 0; len--) 1365 bus_space_write_2(bst, bsh, FE_BMPR8, 0); 1366 } 1367 sc->txb_padding = 0; 1368 } 1369 #endif 1370 1371 /* We need to use m->m_pkthdr.len, so require the header */ 1372 if ((m->m_flags & M_PKTHDR) == 0) 1373 panic("mb86960_write_mbufs: no header mbuf"); 1374 1375 #if FE_DEBUG >= 2 1376 /* First, count up the total number of bytes to copy. */ 1377 for (totlen = 0, mp = m; mp != 0; mp = mp->m_next) 1378 totlen += mp->m_len; 1379 /* Check if this matches the one in the packet header. */ 1380 if (totlen != m->m_pkthdr.len) 1381 log(LOG_WARNING, "%s: packet length mismatch? (%d/%d)\n", 1382 device_xname(sc->sc_dev), totlen, m->m_pkthdr.len); 1383 #else 1384 /* Just use the length value in the packet header. */ 1385 totlen = m->m_pkthdr.len; 1386 #endif 1387 1388 #if FE_DEBUG >= 1 1389 /* 1390 * Should never send big packets. If such a packet is passed, 1391 * it should be a bug of upper layer. We just ignore it. 1392 * ... Partial (too short) packets, neither. 1393 */ 1394 if (totlen > (ETHER_MAX_LEN - ETHER_CRC_LEN) || 1395 totlen < ETHER_HDR_LEN) { 1396 log(LOG_ERR, "%s: got a %s packet (%u bytes) to send\n", 1397 device_xname(sc->sc_dev), 1398 totlen < ETHER_HDR_LEN ? "partial" : "big", totlen); 1399 sc->sc_ec.ec_if.if_oerrors++; 1400 return; 1401 } 1402 #endif 1403 1404 /* 1405 * Put the length word for this frame. 1406 * Does 86960 accept odd length? -- Yes. 1407 * Do we need to pad the length to minimum size by ourselves? 1408 * -- Generally yes. But for (or will be) the last 1409 * packet in the transmission buffer, we can skip the 1410 * padding process. It may gain performance slightly. FIXME. 1411 */ 1412 len = uimax(totlen, (ETHER_MIN_LEN - ETHER_CRC_LEN)); 1413 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) { 1414 bus_space_write_1(bst, bsh, FE_BMPR8, len); 1415 bus_space_write_1(bst, bsh, FE_BMPR8, len >> 8); 1416 } else { 1417 bus_space_write_2(bst, bsh, FE_BMPR8, len); 1418 /* roundup packet length since we will use word access */ 1419 totlen = (totlen + 1) & ~1; 1420 } 1421 1422 /* 1423 * Update buffer status now. 1424 * Truncate the length up to an even number 1425 * if the chip is set in SBW_WORD mode. 1426 */ 1427 sc->txb_free -= FE_TXLEN_SIZE + 1428 uimax(totlen, (ETHER_MIN_LEN - ETHER_CRC_LEN)); 1429 sc->txb_count++; 1430 1431 #if FE_DELAYED_PADDING 1432 /* Postpone the packet padding if necessary. */ 1433 if (totlen < (ETHER_MIN_LEN - ETHER_CRC_LEN)) 1434 sc->txb_padding = (ETHER_MIN_LEN - ETHER_CRC_LEN) - totlen; 1435 #endif 1436 1437 /* 1438 * Transfer the data from mbuf chain to the transmission buffer. 1439 * If the MB86960 is configured in word mode, data needs to be 1440 * transferred as words, and only words. 1441 * So that we require some extra code to patch over odd-length 1442 * or unaligned mbufs. 1443 */ 1444 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) { 1445 /* It's simple in byte mode. */ 1446 for (; m != NULL; m = m->m_next) { 1447 if (m->m_len) { 1448 bus_space_write_multi_1(bst, bsh, FE_BMPR8, 1449 mtod(m, uint8_t *), m->m_len); 1450 } 1451 } 1452 } else { 1453 /* a bit trickier in word mode. */ 1454 uint8_t *data, savebyte[2]; 1455 int leftover; 1456 1457 leftover = 0; 1458 savebyte[0] = savebyte[1] = 0; 1459 1460 for (; m != NULL; m = m->m_next) { 1461 len = m->m_len; 1462 if (len == 0) 1463 continue; 1464 data = mtod(m, uint8_t *); 1465 while (len > 0) { 1466 if (leftover) { 1467 /* 1468 * Data left over (from mbuf or 1469 * realignment). Buffer the next 1470 * byte, and write it and the 1471 * leftover data out. 1472 */ 1473 savebyte[1] = *data++; 1474 len--; 1475 bus_space_write_stream_2(bst, bsh, 1476 FE_BMPR8, *(uint16_t *)savebyte); 1477 leftover = 0; 1478 } else if (BUS_SPACE_ALIGNED_POINTER(data, 1479 uint16_t) == 0) { 1480 /* 1481 * Unaligned data; buffer the next byte. 1482 */ 1483 savebyte[0] = *data++; 1484 len--; 1485 leftover = 1; 1486 } else { 1487 /* 1488 * Aligned data; output contiguous 1489 * words as much as we can, then 1490 * buffer the remaining byte, if any. 1491 */ 1492 leftover = len & 1; 1493 len &= ~1; 1494 bus_space_write_multi_stream_2(bst, 1495 bsh, FE_BMPR8, (uint16_t *)data, 1496 len >> 1); 1497 data += len; 1498 if (leftover) 1499 savebyte[0] = *data++; 1500 len = 0; 1501 } 1502 } 1503 if (len < 0) 1504 panic("mb86960_write_mbufs: negative len"); 1505 } 1506 if (leftover) { 1507 savebyte[1] = 0; 1508 bus_space_write_stream_2(bst, bsh, FE_BMPR8, 1509 *(uint16_t *)savebyte); 1510 } 1511 } 1512 #if FE_DELAYED_PADDING == 0 1513 /* 1514 * Pad the packet to the minimum length if necessary. 1515 */ 1516 len = (ETHER_MIN_LEN - ETHER_CRC_LEN) - totlen; 1517 if (len > 0) { 1518 if (sc->sc_flags & FE_FLAGS_SBW_BYTE) { 1519 while (len-- > 0) 1520 bus_space_write_1(bst, bsh, FE_BMPR8, 0); 1521 } else { 1522 len >>= 1; 1523 while (len-- > 0) 1524 bus_space_write_2(bst, bsh, FE_BMPR8, 0); 1525 } 1526 } 1527 #endif 1528 } 1529 1530 /* 1531 * Compute the multicast address filter from the 1532 * list of multicast addresses we need to listen to. 1533 */ 1534 void 1535 mb86960_getmcaf(struct ethercom *ec, uint8_t *af) 1536 { 1537 struct ifnet *ifp = &ec->ec_if; 1538 struct ether_multi *enm; 1539 uint32_t crc; 1540 struct ether_multistep step; 1541 1542 /* 1543 * Set up multicast address filter by passing all multicast addresses 1544 * through a crc generator, and then using the high order 6 bits as an 1545 * index into the 64 bit logical address filter. The high order bit 1546 * selects the word, while the rest of the bits select the bit within 1547 * the word. 1548 */ 1549 1550 if ((ifp->if_flags & IFF_PROMISC) != 0) 1551 goto allmulti; 1552 1553 memset(af, 0, FE_FILTER_LEN); 1554 ETHER_FIRST_MULTI(step, ec, enm); 1555 while (enm != NULL) { 1556 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 1557 sizeof(enm->enm_addrlo)) != 0) { 1558 /* 1559 * We must listen to a range of multicast addresses. 1560 * For now, just accept all multicasts, rather than 1561 * trying to set only those filter bits needed to match 1562 * the range. (At this time, the only use of address 1563 * ranges is for IP multicast routing, for which the 1564 * range is big enough to require all bits set.) 1565 */ 1566 goto allmulti; 1567 } 1568 1569 crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN); 1570 1571 /* Just want the 6 most significant bits. */ 1572 crc >>= 26; 1573 1574 /* Turn on the corresponding bit in the filter. */ 1575 af[crc >> 3] |= 1 << (crc & 7); 1576 1577 ETHER_NEXT_MULTI(step, enm); 1578 } 1579 ifp->if_flags &= ~IFF_ALLMULTI; 1580 return; 1581 1582 allmulti: 1583 ifp->if_flags |= IFF_ALLMULTI; 1584 memset(af, 0xff, FE_FILTER_LEN); 1585 } 1586 1587 /* 1588 * Calculate a new "multicast packet filter" and put the 86960 1589 * receiver in appropriate mode. 1590 */ 1591 void 1592 mb86960_setmode(struct mb86960_softc *sc) 1593 { 1594 bus_space_tag_t bst = sc->sc_bst; 1595 bus_space_handle_t bsh = sc->sc_bsh; 1596 int flags = sc->sc_ec.ec_if.if_flags; 1597 1598 /* 1599 * If the interface is not running, we postpone the update 1600 * process for receive modes and multicast address filter 1601 * until the interface is restarted. It reduces some 1602 * complicated job on maintaining chip states. (Earlier versions 1603 * of this driver had a bug on that point...) 1604 * 1605 * To complete the trick, mb86960_init() calls mb86960_setmode() after 1606 * restarting the interface. 1607 */ 1608 if ((flags & IFF_RUNNING) == 0) 1609 return; 1610 1611 /* 1612 * Promiscuous mode is handled separately. 1613 */ 1614 if ((flags & IFF_PROMISC) != 0) { 1615 /* 1616 * Program 86960 to receive all packets on the segment 1617 * including those directed to other stations. 1618 * Multicast filter stored in MARs are ignored 1619 * under this setting, so we don't need to update it. 1620 * 1621 * Promiscuous mode is used solely by BPF, and BPF only 1622 * listens to valid (no error) packets. So, we ignore 1623 * errornous ones even in this mode. 1624 */ 1625 bus_space_write_1(bst, bsh, FE_DLCR5, 1626 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1); 1627 sc->filter_change = 0; 1628 1629 #if FE_DEBUG >= 3 1630 log(LOG_INFO, "%s: promiscuous mode\n", 1631 device_xname(sc->sc_dev)); 1632 #endif 1633 return; 1634 } 1635 1636 /* 1637 * Turn the chip to the normal (non-promiscuous) mode. 1638 */ 1639 bus_space_write_1(bst, bsh, FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1); 1640 1641 /* 1642 * Find the new multicast filter value. 1643 */ 1644 mb86960_getmcaf(&sc->sc_ec, sc->filter); 1645 sc->filter_change = 1; 1646 1647 #if FE_DEBUG >= 3 1648 log(LOG_INFO, 1649 "%s: address filter: [%02x %02x %02x %02x %02x %02x %02x %02x]\n", 1650 device_xname(sc->sc_dev), 1651 sc->filter[0], sc->filter[1], sc->filter[2], sc->filter[3], 1652 sc->filter[4], sc->filter[5], sc->filter[6], sc->filter[7]); 1653 #endif 1654 1655 /* 1656 * We have to update the multicast filter in the 86960, A.S.A.P. 1657 * 1658 * Note that the DLC (Data Linc Control unit, i.e. transmitter 1659 * and receiver) must be stopped when feeding the filter, and 1660 * DLC trashes all packets in both transmission and receive 1661 * buffers when stopped. 1662 * 1663 * ... Are the above sentenses correct? I have to check the 1664 * manual of the MB86960A. FIXME. 1665 * 1666 * To reduce the packet lossage, we delay the filter update 1667 * process until buffers are empty. 1668 */ 1669 if (sc->txb_sched == 0 && sc->txb_count == 0 && 1670 (bus_space_read_1(bst, bsh, FE_DLCR1) & FE_D1_PKTRDY) == 0) { 1671 /* 1672 * Buffers are (apparently) empty. Load 1673 * the new filter value into MARs now. 1674 */ 1675 mb86960_loadmar(sc); 1676 } else { 1677 /* 1678 * Buffers are not empty. Mark that we have to update 1679 * the MARs. The new filter will be loaded by mb86960_intr() 1680 * later. 1681 */ 1682 #if FE_DEBUG >= 4 1683 log(LOG_INFO, "%s: filter change delayed\n", 1684 device_xname(sc->sc_dev)); 1685 #endif 1686 } 1687 } 1688 1689 /* 1690 * Load a new multicast address filter into MARs. 1691 * 1692 * The caller must have splnet'ed befor mb86960_loadmar. 1693 * This function starts the DLC upon return. So it can be called only 1694 * when the chip is working, i.e., from the driver's point of view, when 1695 * a device is RUNNING. (I mistook the point in previous versions.) 1696 */ 1697 void 1698 mb86960_loadmar(struct mb86960_softc *sc) 1699 { 1700 bus_space_tag_t bst = sc->sc_bst; 1701 bus_space_handle_t bsh = sc->sc_bsh; 1702 1703 /* Stop the DLC (transmitter and receiver). */ 1704 bus_space_write_1(bst, bsh, FE_DLCR6, 1705 sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 1706 1707 /* Select register bank 1 for MARs. */ 1708 bus_space_write_1(bst, bsh, FE_DLCR7, 1709 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP); 1710 1711 /* Copy filter value into the registers. */ 1712 bus_space_write_region_1(bst, bsh, FE_MAR8, sc->filter, FE_FILTER_LEN); 1713 1714 /* Restore the bank selection for BMPRs (i.e., runtime registers). */ 1715 bus_space_write_1(bst, bsh, FE_DLCR7, 1716 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 1717 1718 /* Restart the DLC. */ 1719 bus_space_write_1(bst, bsh, FE_DLCR6, 1720 sc->proto_dlcr6 | FE_D6_DLC_ENABLE); 1721 1722 /* We have just updated the filter. */ 1723 sc->filter_change = 0; 1724 1725 #if FE_DEBUG >= 3 1726 log(LOG_INFO, "%s: address filter changed\n", device_xname(sc->sc_dev)); 1727 #endif 1728 } 1729 1730 /* 1731 * Enable power on the interface. 1732 */ 1733 int 1734 mb86960_enable(struct mb86960_softc *sc) 1735 { 1736 1737 #if FE_DEBUG >= 3 1738 log(LOG_INFO, "%s: mb86960_enable()\n", device_xname(sc->sc_dev)); 1739 #endif 1740 1741 if ((sc->sc_stat & FE_STAT_ENABLED) == 0 && sc->sc_enable != NULL) { 1742 if ((*sc->sc_enable)(sc) != 0) { 1743 aprint_error_dev(sc->sc_dev, "device enable failed\n"); 1744 return EIO; 1745 } 1746 } 1747 1748 sc->sc_stat |= FE_STAT_ENABLED; 1749 return 0; 1750 } 1751 1752 /* 1753 * Disable power on the interface. 1754 */ 1755 void 1756 mb86960_disable(struct mb86960_softc *sc) 1757 { 1758 1759 #if FE_DEBUG >= 3 1760 log(LOG_INFO, "%s: mb86960_disable()\n", device_xname(sc->sc_dev)); 1761 #endif 1762 1763 if ((sc->sc_stat & FE_STAT_ENABLED) != 0 && sc->sc_disable != NULL) { 1764 (*sc->sc_disable)(sc); 1765 sc->sc_stat &= ~FE_STAT_ENABLED; 1766 } 1767 } 1768 1769 /* 1770 * mbe_activate: 1771 * 1772 * Handle device activation/deactivation requests. 1773 */ 1774 int 1775 mb86960_activate(device_t self, enum devact act) 1776 { 1777 struct mb86960_softc *sc = device_private(self); 1778 1779 switch (act) { 1780 case DVACT_DEACTIVATE: 1781 if_deactivate(&sc->sc_ec.ec_if); 1782 return 0; 1783 default: 1784 return EOPNOTSUPP; 1785 } 1786 } 1787 1788 /* 1789 * mb86960_detach: 1790 * 1791 * Detach a MB86960 interface. 1792 */ 1793 int 1794 mb86960_detach(struct mb86960_softc *sc) 1795 { 1796 struct ifnet *ifp = &sc->sc_ec.ec_if; 1797 1798 /* Succeed now if there's no work to do. */ 1799 if ((sc->sc_stat & FE_STAT_ATTACHED) == 0) 1800 return 0; 1801 1802 /* Delete all media. */ 1803 ifmedia_delete_instance(&sc->sc_media, IFM_INST_ANY); 1804 1805 /* Unhook the entropy source. */ 1806 rnd_detach_source(&sc->rnd_source); 1807 1808 ether_ifdetach(ifp); 1809 if_detach(ifp); 1810 1811 mb86960_disable(sc); 1812 return 0; 1813 } 1814 1815 /* 1816 * Routines to read all bytes from the config EEPROM (93C06) through MB86965A. 1817 */ 1818 void 1819 mb86965_read_eeprom(bus_space_tag_t iot, bus_space_handle_t ioh, uint8_t *data) 1820 { 1821 int addr, op, bit; 1822 uint16_t val; 1823 1824 /* Read bytes from EEPROM; two bytes per an iteration. */ 1825 for (addr = 0; addr < FE_EEPROM_SIZE / 2; addr++) { 1826 /* Reset the EEPROM interface. */ 1827 bus_space_write_1(iot, ioh, FE_BMPR16, 0x00); 1828 bus_space_write_1(iot, ioh, FE_BMPR17, 0x00); 1829 bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT); 1830 1831 /* Send start bit. */ 1832 bus_space_write_1(iot, ioh, FE_BMPR17, FE_B17_DATA); 1833 FE_EEPROM_DELAY(); 1834 bus_space_write_1(iot, ioh, 1835 FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK); 1836 FE_EEPROM_DELAY(); 1837 bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT); 1838 1839 /* Send read command and read address. */ 1840 op = 0x80 | addr; /* READ instruction */ 1841 for (bit = 8; bit > 0; bit--) { 1842 bus_space_write_1(iot, ioh, FE_BMPR17, 1843 (op & (1 << (bit - 1))) ? FE_B17_DATA : 0); 1844 FE_EEPROM_DELAY(); 1845 bus_space_write_1(iot, ioh, 1846 FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK); 1847 FE_EEPROM_DELAY(); 1848 bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT); 1849 } 1850 bus_space_write_1(iot, ioh, FE_BMPR17, 0x00); 1851 1852 /* Read two bytes in each address */ 1853 val = 0; 1854 for (bit = 16; bit > 0; bit--) { 1855 FE_EEPROM_DELAY(); 1856 bus_space_write_1(iot, ioh, 1857 FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK); 1858 FE_EEPROM_DELAY(); 1859 if (bus_space_read_1(iot, ioh, FE_BMPR17) & 1860 FE_B17_DATA) 1861 val |= 1 << (bit - 1); 1862 bus_space_write_1(iot, ioh, 1863 FE_BMPR16, FE_B16_SELECT); 1864 } 1865 data[addr * 2] = val >> 8; 1866 data[addr * 2 + 1] = val & 0xff; 1867 } 1868 1869 /* Make sure the EEPROM is turned off. */ 1870 bus_space_write_1(iot, ioh, FE_BMPR16, 0); 1871 bus_space_write_1(iot, ioh, FE_BMPR17, 0); 1872 1873 #if FE_DEBUG >= 3 1874 /* Report what we got. */ 1875 log(LOG_INFO, "mb86965_read_eeprom: " 1876 " %02x%02x%02x%02x %02x%02x%02x%02x -" 1877 " %02x%02x%02x%02x %02x%02x%02x%02x -" 1878 " %02x%02x%02x%02x %02x%02x%02x%02x -" 1879 " %02x%02x%02x%02x %02x%02x%02x%02x\n", 1880 data[ 0], data[ 1], data[ 2], data[ 3], 1881 data[ 4], data[ 5], data[ 6], data[ 7], 1882 data[ 8], data[ 9], data[10], data[11], 1883 data[12], data[13], data[14], data[15], 1884 data[16], data[17], data[18], data[19], 1885 data[20], data[21], data[22], data[23], 1886 data[24], data[25], data[26], data[27], 1887 data[28], data[29], data[30], data[31]); 1888 #endif 1889 } 1890 1891 #if FE_DEBUG >= 1 1892 void 1893 mb86960_dump(int level, struct mb86960_softc *sc) 1894 { 1895 bus_space_tag_t bst = sc->sc_bst; 1896 bus_space_handle_t bsh = sc->sc_bsh; 1897 uint8_t save_dlcr7; 1898 1899 save_dlcr7 = bus_space_read_1(bst, bsh, FE_DLCR7); 1900 1901 log(level, "\tDLCR = %02x %02x %02x %02x %02x %02x %02x %02x\n", 1902 bus_space_read_1(bst, bsh, FE_DLCR0), 1903 bus_space_read_1(bst, bsh, FE_DLCR1), 1904 bus_space_read_1(bst, bsh, FE_DLCR2), 1905 bus_space_read_1(bst, bsh, FE_DLCR3), 1906 bus_space_read_1(bst, bsh, FE_DLCR4), 1907 bus_space_read_1(bst, bsh, FE_DLCR5), 1908 bus_space_read_1(bst, bsh, FE_DLCR6), 1909 bus_space_read_1(bst, bsh, FE_DLCR7)); 1910 1911 bus_space_write_1(bst, bsh, FE_DLCR7, 1912 (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_DLCR); 1913 log(level, "\t %02x %02x %02x %02x %02x %02x %02x %02x\n", 1914 bus_space_read_1(bst, bsh, FE_DLCR8), 1915 bus_space_read_1(bst, bsh, FE_DLCR9), 1916 bus_space_read_1(bst, bsh, FE_DLCR10), 1917 bus_space_read_1(bst, bsh, FE_DLCR11), 1918 bus_space_read_1(bst, bsh, FE_DLCR12), 1919 bus_space_read_1(bst, bsh, FE_DLCR13), 1920 bus_space_read_1(bst, bsh, FE_DLCR14), 1921 bus_space_read_1(bst, bsh, FE_DLCR15)); 1922 1923 bus_space_write_1(bst, bsh, FE_DLCR7, 1924 (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_MAR); 1925 log(level, "\tMAR = %02x %02x %02x %02x %02x %02x %02x %02x\n", 1926 bus_space_read_1(bst, bsh, FE_MAR8), 1927 bus_space_read_1(bst, bsh, FE_MAR9), 1928 bus_space_read_1(bst, bsh, FE_MAR10), 1929 bus_space_read_1(bst, bsh, FE_MAR11), 1930 bus_space_read_1(bst, bsh, FE_MAR12), 1931 bus_space_read_1(bst, bsh, FE_MAR13), 1932 bus_space_read_1(bst, bsh, FE_MAR14), 1933 bus_space_read_1(bst, bsh, FE_MAR15)); 1934 1935 bus_space_write_1(bst, bsh, FE_DLCR7, 1936 (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_BMPR); 1937 log(level, 1938 "\tBMPR = xx xx %02x %02x %02x %02x %02x %02x %02x %02x xx %02x\n", 1939 bus_space_read_1(bst, bsh, FE_BMPR10), 1940 bus_space_read_1(bst, bsh, FE_BMPR11), 1941 bus_space_read_1(bst, bsh, FE_BMPR12), 1942 bus_space_read_1(bst, bsh, FE_BMPR13), 1943 bus_space_read_1(bst, bsh, FE_BMPR14), 1944 bus_space_read_1(bst, bsh, FE_BMPR15), 1945 bus_space_read_1(bst, bsh, FE_BMPR16), 1946 bus_space_read_1(bst, bsh, FE_BMPR17), 1947 bus_space_read_1(bst, bsh, FE_BMPR19)); 1948 1949 bus_space_write_1(bst, bsh, FE_DLCR7, save_dlcr7); 1950 } 1951 #endif 1952
Indexes created Sun Oct 26 20:09:54 GMT 2025