mb86960var.h revision 1.18 1 /*
2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
3 *
4 * This software may be used, modified, copied, distributed, and sold, in
5 * both source and binary form provided that the above copyright, these
6 * terms and the following disclaimer are retained. The name of the author
7 * and/or the contributor may not be used to endorse or promote products
8 * derived from this software without specific prior written permission.
9 *
10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
20 * SUCH DAMAGE.
21 */
22
23 /*
24 * Portions copyright (C) 1993, David Greenman. This software may be used,
25 * modified, copied, distributed, and sold, in both source and binary form
26 * provided that the above copyright and these terms are retained. Under no
27 * circumstances is the author responsible for the proper functioning of this
28 * software, nor does the author assume any responsibility for damages
29 * incurred with its use.
30 */
31
32 #define FE_VERSION "if_fe.c ver. 0.8"
33
34 /*
35 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
36 * Contributed by M.S. <seki (at) sysrap.cs.fujitsu.co.jp>
37 *
38 * This version is intended to be a generic template for various
39 * MB86960A/MB86965A based Ethernet cards. It currently supports
40 * Fujitsu FMV-180 series (i.e., FMV-181 and FMV-182) and Allied-
41 * Telesis AT1700 series and RE2000 series. There are some
42 * unnecessary hooks embedded, which are primarily intended to support
43 * other types of Ethernet cards, but the author is not sure whether
44 * they are useful.
45 */
46
47 #include "bpfilter.h"
48 #include "rnd.h"
49
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/errno.h>
53 #include <sys/ioctl.h>
54 #include <sys/mbuf.h>
55 #include <sys/socket.h>
56 #include <sys/syslog.h>
57 #include <sys/device.h>
58 #if NRND > 0
59 #include <sys/rnd.h>
60 #endif
61
62 #include <net/if.h>
63 #include <net/if_dl.h>
64 #include <net/if_types.h>
65
66 #include <net/if_ether.h>
67
68 #ifdef INET
69 #include <netinet/in.h>
70 #include <netinet/in_systm.h>
71 #include <netinet/in_var.h>
72 #include <netinet/ip.h>
73 #include <netinet/if_inarp.h>
74 #endif
75
76 #ifdef NS
77 #include <netns/ns.h>
78 #include <netns/ns_if.h>
79 #endif
80
81 #if NBPFILTER > 0
82 #include <net/bpf.h>
83 #include <net/bpfdesc.h>
84 #endif
85
86 #include <machine/cpu.h>
87 #include <machine/intr.h>
88 #include <machine/pio.h>
89
90 #include <dev/isa/isareg.h>
91 #include <dev/isa/isavar.h>
92 #include <dev/ic/mb86960reg.h>
93 #include <dev/isa/if_fereg.h>
94
95 /*
96 * Default settings for fe driver specific options.
97 * They can be set in config file by "options" statements.
98 */
99
100 /*
101 * Debug control.
102 * 0: No debug at all. All debug specific codes are stripped off.
103 * 1: Silent. No debug messages are logged except emergent ones.
104 * 2: Brief. Lair events and/or important information are logged.
105 * 3: Detailed. Logs all information which *may* be useful for debugging.
106 * 4: Trace. All actions in the driver is logged. Super verbose.
107 */
108 #ifndef FE_DEBUG
109 #define FE_DEBUG 1
110 #endif
111
112 /*
113 * Delay padding of short transmission packets to minimum Ethernet size.
114 * This may or may not gain performance. An EXPERIMENTAL option.
115 */
116 #ifndef FE_DELAYED_PADDING
117 #define FE_DELAYED_PADDING 0
118 #endif
119
120 /*
121 * Transmit just one packet per a "send" command to 86960.
122 * This option is intended for performance test. An EXPERIMENTAL option.
123 */
124 #ifndef FE_SINGLE_TRANSMISSION
125 #define FE_SINGLE_TRANSMISSION 0
126 #endif
127
128 /*
129 * Device configuration flags.
130 */
131
132 /* DLCR6 settings. */
133 #define FE_FLAGS_DLCR6_VALUE 0x007F
134
135 /* Force DLCR6 override. */
136 #define FE_FLAGS_OVERRIDE_DLCR6 0x0080
137
138 /* A cludge for PCMCIA support. */
139 #define FE_FLAGS_PCMCIA 0x8000
140
141 /* Identification of the driver version. */
142 static char const fe_version[] = FE_VERSION " / " FE_REG_VERSION;
143
144 /*
145 * Supported hardware (Ethernet card) types
146 * This information is currently used only for debugging
147 */
148 enum fe_type {
149 /* For cards which are successfully probed but not identified. */
150 FE_TYPE_UNKNOWN,
151
152 /* Fujitsu FMV-180 series. */
153 FE_TYPE_FMV181,
154 FE_TYPE_FMV182,
155
156 /* Allied-Telesis AT1700 series and RE2000 series. */
157 FE_TYPE_AT1700T,
158 FE_TYPE_AT1700BT,
159 FE_TYPE_AT1700FT,
160 FE_TYPE_AT1700AT,
161 FE_TYPE_RE2000,
162
163 /* PCMCIA by Fujitsu. */
164 FE_TYPE_MBH10302,
165 FE_TYPE_MBH10304,
166 };
167
168 /*
169 * fe_softc: per line info and status
170 */
171 struct fe_softc {
172 struct device sc_dev;
173 void *sc_ih;
174
175 struct ethercom sc_ethercom; /* ethernet common */
176
177 /* Set by probe() and not modified in later phases. */
178 enum fe_type type; /* interface type code */
179 char *typestr; /* printable name of the interface. */
180 int sc_iobase; /* MB86960A I/O base address */
181
182 u_char proto_dlcr4; /* DLCR4 prototype. */
183 u_char proto_dlcr5; /* DLCR5 prototype. */
184 u_char proto_dlcr6; /* DLCR6 prototype. */
185 u_char proto_dlcr7; /* DLCR7 prototype. */
186 u_char proto_bmpr13; /* BMPR13 prototype. */
187
188 /* Vendor specific hooks. */
189 void (*init) __P((struct fe_softc *)); /* Just before fe_init(). */
190 void (*stop) __P((struct fe_softc *)); /* Just after fe_stop(). */
191
192 /* Transmission buffer management. */
193 u_short txb_size; /* total bytes in TX buffer */
194 u_short txb_free; /* free bytes in TX buffer */
195 u_char txb_count; /* number of packets in TX buffer */
196 u_char txb_sched; /* number of scheduled packets */
197 u_char txb_padding; /* number of delayed padding bytes */
198
199 /* Multicast address filter management. */
200 u_char filter_change; /* MARs must be changed ASAP. */
201 u_char filter[FE_FILTER_LEN]; /* new filter value. */
202
203 u_int8_t sc_enaddr[ETHER_ADDR_LEN];
204
205 #if NRND > 0
206 rndsource_element_t rnd_source;
207 #endif
208 };
209
210 /* Standard driver entry points. These can be static. */
211 int feprobe __P((struct device *, void *, void *));
212 void feattach __P((struct device *, struct device *, void *));
213 int feintr __P((void *));
214 void fe_init __P((struct fe_softc *));
215 int fe_ioctl __P((struct ifnet *, u_long, caddr_t));
216 void fe_start __P((struct ifnet *));
217 void fe_reset __P((struct fe_softc *));
218 void fe_watchdog __P((struct ifnet *));
219
220 /* Local functions. Order of declaration is confused. FIXME. */
221 int fe_probe_fmv __P((struct fe_softc *, struct isa_attach_args *));
222 int fe_probe_ati __P((struct fe_softc *, struct isa_attach_args *));
223 int fe_probe_mbh __P((struct fe_softc *, struct isa_attach_args *));
224 void fe_read_eeprom __P((struct fe_softc *, u_char *));
225 void fe_init_mbh __P((struct fe_softc *));
226 int fe_get_packet __P((struct fe_softc *, int));
227 void fe_stop __P((struct fe_softc *));
228 void fe_tint __P((struct fe_softc *, u_char));
229 void fe_rint __P((struct fe_softc *, u_char));
230 static inline
231 void fe_xmit __P((struct fe_softc *));
232 void fe_write_mbufs __P((struct fe_softc *, struct mbuf *));
233 static inline
234 void fe_droppacket __P((struct fe_softc *));
235 void fe_getmcaf __P((struct ethercom *, u_char *));
236 void fe_setmode __P((struct fe_softc *));
237 void fe_loadmar __P((struct fe_softc *));
238 #if FE_DEBUG >= 1
239 void fe_dump __P((int, struct fe_softc *));
240 #endif
241
242 struct cfattach fe_ca = {
243 sizeof(struct fe_softc), feprobe, feattach
244 };
245
246 struct cfdriver fe_cd = {
247 NULL, "fe", DV_IFNET
248 };
249
250 /* Ethernet constants. To be defined in if_ehter.h? FIXME. */
251 #define ETHER_MIN_LEN 60 /* with header, without CRC. */
252 #define ETHER_MAX_LEN 1514 /* with header, without CRC. */
253 #define ETHER_ADDR_LEN 6 /* number of bytes in an address. */
254 #define ETHER_HDR_SIZE 14 /* src addr, dst addr, and data type. */
255
256 /*
257 * Fe driver specific constants which relate to 86960/86965.
258 */
259
260 /* Interrupt masks. */
261 #define FE_TMASK (FE_D2_COLL16 | FE_D2_TXDONE)
262 #define FE_RMASK (FE_D3_OVRFLO | FE_D3_CRCERR | \
263 FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY)
264
265 /* Maximum number of iterrations for a receive interrupt. */
266 #define FE_MAX_RECV_COUNT ((65536 - 2048 * 2) / 64)
267 /* Maximum size of SRAM is 65536,
268 * minimum size of transmission buffer in fe is 2x2KB,
269 * and minimum amount of received packet including headers
270 * added by the chip is 64 bytes.
271 * Hence FE_MAX_RECV_COUNT is the upper limit for number
272 * of packets in the receive buffer. */
273
274 /*
275 * Convenient routines to access contiguous I/O ports.
276 */
277
278 static inline void
279 inblk (int addr, u_char * mem, int len)
280 {
281 while (--len >= 0) {
282 *mem++ = inb(addr++);
283 }
284 }
285
286 static inline void
287 outblk (int addr, u_char const * mem, int len)
288 {
289 while (--len >= 0) {
290 outb(addr++, *mem++);
291 }
292 }
293
294 /*
295 * Hardware probe routines.
296 */
297
298 /*
299 * Determine if the device is present.
300 */
301 int
302 feprobe(parent, match, aux)
303 struct device *parent;
304 void *match, *aux;
305 {
306 struct fe_softc *sc = match;
307 struct isa_attach_args *ia = aux;
308
309 #if FE_DEBUG >= 2
310 log(LOG_INFO, "%s: %s\n", sc->sc_dev.dv_xname, fe_version);
311 #endif
312
313 /* Probe an address. */
314 sc->sc_iobase = ia->ia_iobase;
315
316 if (fe_probe_fmv(sc, ia))
317 return (1);
318 if (fe_probe_ati(sc, ia))
319 return (1);
320 if (fe_probe_mbh(sc, ia))
321 return (1);
322 return (0);
323 }
324
325 /*
326 * Check for specific bits in specific registers have specific values.
327 */
328 struct fe_simple_probe_struct {
329 u_char port; /* Offset from the base I/O address. */
330 u_char mask; /* Bits to be checked. */
331 u_char bits; /* Values to be compared against. */
332 };
333
334 static inline int
335 fe_simple_probe (int addr, struct fe_simple_probe_struct const * sp)
336 {
337 struct fe_simple_probe_struct const * p;
338
339 for (p = sp; p->mask != 0; p++) {
340 if ((inb(addr + p->port) & p->mask) != p->bits) {
341 return (0);
342 }
343 }
344 return (1);
345 }
346
347 /*
348 * Routines to read all bytes from the config EEPROM through MB86965A.
349 * I'm not sure what exactly I'm doing here... I was told just to follow
350 * the steps, and it worked. Could someone tell me why the following
351 * code works? (Or, why all similar codes I tried previously doesn't
352 * work.) FIXME.
353 */
354
355 static inline void
356 strobe (int bmpr16)
357 {
358 /*
359 * Output same value twice. To speed-down execution?
360 */
361 outb(bmpr16, FE_B16_SELECT);
362 outb(bmpr16, FE_B16_SELECT);
363 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
364 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
365 outb(bmpr16, FE_B16_SELECT);
366 outb(bmpr16, FE_B16_SELECT);
367 }
368
369 void
370 fe_read_eeprom(sc, data)
371 struct fe_softc *sc;
372 u_char *data;
373 {
374 int iobase = sc->sc_iobase;
375 int bmpr16 = iobase + FE_BMPR16;
376 int bmpr17 = iobase + FE_BMPR17;
377 u_char n, val, bit;
378
379 /* Read bytes from EEPROM; two bytes per an iterration. */
380 for (n = 0; n < FE_EEPROM_SIZE / 2; n++) {
381 /* Reset the EEPROM interface. */
382 outb(bmpr16, 0x00);
383 outb(bmpr17, 0x00);
384 outb(bmpr16, FE_B16_SELECT);
385
386 /* Start EEPROM access. */
387 outb(bmpr17, FE_B17_DATA);
388 strobe(bmpr16);
389
390 /* Pass the iterration count to the chip. */
391 val = 0x80 | n;
392 for (bit = 0x80; bit != 0x00; bit >>= 1) {
393 outb(bmpr17, (val & bit) ? FE_B17_DATA : 0);
394 strobe(bmpr16);
395 }
396 outb(bmpr17, 0x00);
397
398 /* Read a byte. */
399 val = 0;
400 for (bit = 0x80; bit != 0x00; bit >>= 1) {
401 strobe(bmpr16);
402 if (inb(bmpr17) & FE_B17_DATA)
403 val |= bit;
404 }
405 *data++ = val;
406
407 /* Read one more byte. */
408 val = 0;
409 for (bit = 0x80; bit != 0x00; bit >>= 1) {
410 strobe(bmpr16);
411 if (inb(bmpr17) & FE_B17_DATA)
412 val |= bit;
413 }
414 *data++ = val;
415 }
416
417 #if FE_DEBUG >= 3
418 /* Report what we got. */
419 data -= FE_EEPROM_SIZE;
420 log(LOG_INFO, "%s: EEPROM at %04x:"
421 " %02x%02x%02x%02x %02x%02x%02x%02x -"
422 " %02x%02x%02x%02x %02x%02x%02x%02x -"
423 " %02x%02x%02x%02x %02x%02x%02x%02x -"
424 " %02x%02x%02x%02x %02x%02x%02x%02x\n",
425 sc->sc_dev.dv_xname, iobase,
426 data[ 0], data[ 1], data[ 2], data[ 3],
427 data[ 4], data[ 5], data[ 6], data[ 7],
428 data[ 8], data[ 9], data[10], data[11],
429 data[12], data[13], data[14], data[15],
430 data[16], data[17], data[18], data[19],
431 data[20], data[21], data[22], data[23],
432 data[24], data[25], data[26], data[27],
433 data[28], data[29], data[30], data[31]);
434 #endif
435 }
436
437 /*
438 * Hardware (vendor) specific probe routines.
439 */
440
441 /*
442 * Probe and initialization for Fujitsu FMV-180 series boards
443 */
444 int
445 fe_probe_fmv(sc, ia)
446 struct fe_softc *sc;
447 struct isa_attach_args *ia;
448 {
449 int i, n;
450 int iobase = sc->sc_iobase;
451 int irq;
452
453 static int const iomap[8] =
454 { 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x300, 0x340 };
455 static int const irqmap[4] =
456 { 3, 7, 10, 15 };
457
458 static struct fe_simple_probe_struct const probe_table[] = {
459 { FE_DLCR2, 0x70, 0x00 },
460 { FE_DLCR4, 0x08, 0x00 },
461 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */
462
463 { FE_FMV0, FE_FMV0_MAGIC_MASK, FE_FMV0_MAGIC_VALUE },
464 { FE_FMV1, FE_FMV1_CARDID_MASK, FE_FMV1_CARDID_ID },
465 { FE_FMV3, FE_FMV3_EXTRA_MASK, FE_FMV3_EXTRA_VALUE },
466 #if 1
467 /*
468 * Test *vendor* part of the station address for Fujitsu.
469 * The test will gain reliability of probe process, but
470 * it rejects FMV-180 clone boards manufactured by other vendors.
471 * We have to turn the test off when such cards are made available.
472 */
473 { FE_FMV4, 0xFF, 0x00 },
474 { FE_FMV5, 0xFF, 0x00 },
475 { FE_FMV6, 0xFF, 0x0E },
476 #else
477 /*
478 * We can always verify the *first* 2 bits (in Ehternet
479 * bit order) are "no multicast" and "no local" even for
480 * unknown vendors.
481 */
482 { FE_FMV4, 0x03, 0x00 },
483 #endif
484 { 0 }
485 };
486
487 #if 0
488 /*
489 * Dont probe at all if the config says we are PCMCIA...
490 */
491 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0)
492 return (0);
493 #endif
494
495 /*
496 * See if the sepcified address is possible for FMV-180 series.
497 */
498 for (i = 0; i < 8; i++) {
499 if (iomap[i] == iobase)
500 break;
501 }
502 if (i == 8)
503 return (0);
504
505 /* Simple probe. */
506 if (!fe_simple_probe(iobase, probe_table))
507 return (0);
508
509 /* Check if our I/O address matches config info on EEPROM. */
510 n = (inb(iobase + FE_FMV2) & FE_FMV2_ADDR) >> FE_FMV2_ADDR_SHIFT;
511 if (iomap[n] != iobase)
512 return (0);
513
514 /* Determine the card type. */
515 switch (inb(iobase + FE_FMV0) & FE_FMV0_MODEL) {
516 case FE_FMV0_MODEL_FMV181:
517 sc->type = FE_TYPE_FMV181;
518 sc->typestr = "FMV-181";
519 break;
520 case FE_FMV0_MODEL_FMV182:
521 sc->type = FE_TYPE_FMV182;
522 sc->typestr = "FMV-182";
523 break;
524 default:
525 /* Unknown card type: maybe a new model, but... */
526 return (0);
527 }
528
529 /*
530 * An FMV-180 has successfully been proved.
531 * Determine which IRQ to be used.
532 *
533 * In this version, we always get an IRQ assignment from the
534 * FMV-180's configuration EEPROM, ignoring that specified in
535 * config file.
536 */
537 n = (inb(iobase + FE_FMV2) & FE_FMV2_IRQ) >> FE_FMV2_IRQ_SHIFT;
538 irq = irqmap[n];
539
540 if (ia->ia_irq != IRQUNK) {
541 if (ia->ia_irq != irq) {
542 printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
543 sc->sc_dev.dv_xname, ia->ia_irq, irq);
544 return (0);
545 }
546 } else
547 ia->ia_irq = irq;
548
549 /*
550 * Initialize constants in the per-line structure.
551 */
552
553 /* Get our station address from EEPROM. */
554 inblk(iobase + FE_FMV4, sc->sc_enaddr, ETHER_ADDR_LEN);
555
556 /* Make sure we got a valid station address. */
557 if ((sc->sc_enaddr[0] & 0x03) != 0x00
558 || (sc->sc_enaddr[0] == 0x00
559 && sc->sc_enaddr[1] == 0x00
560 && sc->sc_enaddr[2] == 0x00))
561 return (0);
562
563 /* Register values which depend on board design. */
564 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
565 sc->proto_dlcr5 = 0;
566 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC;
567 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
568
569 /*
570 * Program the 86960 as follows:
571 * SRAM: 32KB, 100ns, byte-wide access.
572 * Transmission buffer: 4KB x 2.
573 * System bus interface: 16 bits.
574 * We cannot change these values but TXBSIZE, because they
575 * are hard-wired on the board. Modifying TXBSIZE will affect
576 * the driver performance.
577 */
578 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
579 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
580
581 /*
582 * Minimum initialization of the hardware.
583 * We write into registers; hope I/O ports have no
584 * overlap with other boards.
585 */
586
587 /* Initialize ASIC. */
588 outb(iobase + FE_FMV3, 0);
589 outb(iobase + FE_FMV10, 0);
590
591 /* Wait for a while. I'm not sure this is necessary. FIXME. */
592 delay(200);
593
594 /* Initialize 86960. */
595 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
596 delay(200);
597
598 /* Disable all interrupts. */
599 outb(iobase + FE_DLCR2, 0);
600 outb(iobase + FE_DLCR3, 0);
601
602 /* Turn the "master interrupt control" flag of ASIC on. */
603 outb(iobase + FE_FMV3, FE_FMV3_ENABLE_FLAG);
604
605 /*
606 * That's all. FMV-180 occupies 32 I/O addresses, by the way.
607 */
608 ia->ia_iosize = 32;
609 ia->ia_msize = 0;
610 return (1);
611 }
612
613 /*
614 * Probe and initialization for Allied-Telesis AT1700/RE2000 series.
615 */
616 int
617 fe_probe_ati(sc, ia)
618 struct fe_softc *sc;
619 struct isa_attach_args *ia;
620 {
621 int i, n;
622 int iobase = sc->sc_iobase;
623 u_char eeprom[FE_EEPROM_SIZE];
624 u_char save16, save17;
625 int irq;
626
627 static int const iomap[8] =
628 { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300 };
629 static int const irqmap[4][4] = {
630 { 3, 4, 5, 9 },
631 { 10, 11, 12, 15 },
632 { 3, 11, 5, 15 },
633 { 10, 11, 14, 15 },
634 };
635 static struct fe_simple_probe_struct const probe_table[] = {
636 { FE_DLCR2, 0x70, 0x00 },
637 { FE_DLCR4, 0x08, 0x00 },
638 { FE_DLCR5, 0x80, 0x00 },
639 #if 0
640 { FE_BMPR16, 0x1B, 0x00 },
641 { FE_BMPR17, 0x7F, 0x00 },
642 #endif
643 { 0 }
644 };
645
646 #if 0
647 /*
648 * Don't probe at all if the config says we are PCMCIA...
649 */
650 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0)
651 return (0);
652 #endif
653
654 #if FE_DEBUG >= 4
655 log(LOG_INFO, "%s: probe (0x%x) for ATI\n", sc->sc_dev.dv_xname, iobase);
656 fe_dump(LOG_INFO, sc);
657 #endif
658
659 /*
660 * See if the sepcified address is possible for MB86965A JLI mode.
661 */
662 for (i = 0; i < 8; i++) {
663 if (iomap[i] == iobase)
664 break;
665 }
666 if (i == 8)
667 return (0);
668
669 /*
670 * We should test if MB86965A is on the base address now.
671 * Unfortunately, it is very hard to probe it reliably, since
672 * we have no way to reset the chip under software control.
673 * On cold boot, we could check the "signature" bit patterns
674 * described in the Fujitsu document. On warm boot, however,
675 * we can predict almost nothing about register values.
676 */
677 if (!fe_simple_probe(iobase, probe_table))
678 return (0);
679
680 /* Save old values of the registers. */
681 save16 = inb(iobase + FE_BMPR16);
682 save17 = inb(iobase + FE_BMPR17);
683
684 /* Check if our I/O address matches config info on 86965. */
685 n = (inb(iobase + FE_BMPR19) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT;
686 if (iomap[n] != iobase)
687 goto fail;
688
689 /*
690 * We are now almost sure we have an AT1700 at the given
691 * address. So, read EEPROM through 86965. We have to write
692 * into LSI registers to read from EEPROM. I want to avoid it
693 * at this stage, but I cannot test the presense of the chip
694 * any further without reading EEPROM. FIXME.
695 */
696 fe_read_eeprom(sc, eeprom);
697
698 /* Make sure the EEPROM is turned off. */
699 outb(iobase + FE_BMPR16, 0);
700 outb(iobase + FE_BMPR17, 0);
701
702 /* Make sure that config info in EEPROM and 86965 agree. */
703 if (eeprom[FE_EEPROM_CONF] != inb(iobase + FE_BMPR19))
704 goto fail;
705
706 /*
707 * Determine the card type.
708 */
709 switch (eeprom[FE_ATI_EEP_MODEL]) {
710 case FE_ATI_MODEL_AT1700T:
711 sc->type = FE_TYPE_AT1700T;
712 sc->typestr = "AT-1700T";
713 break;
714 case FE_ATI_MODEL_AT1700BT:
715 sc->type = FE_TYPE_AT1700BT;
716 sc->typestr = "AT-1700BT";
717 break;
718 case FE_ATI_MODEL_AT1700FT:
719 sc->type = FE_TYPE_AT1700FT;
720 sc->typestr = "AT-1700FT";
721 break;
722 case FE_ATI_MODEL_AT1700AT:
723 sc->type = FE_TYPE_AT1700AT;
724 sc->typestr = "AT-1700AT";
725 break;
726 default:
727 sc->type = FE_TYPE_RE2000;
728 sc->typestr = "unknown (RE-2000?)";
729 break;
730 }
731
732 /*
733 * Try to determine IRQ settings.
734 * Different models use different ranges of IRQs.
735 */
736 n = (inb(iobase + FE_BMPR19) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT;
737 switch (eeprom[FE_ATI_EEP_REVISION] & 0xf0) {
738 case 0x30:
739 irq = irqmap[3][n];
740 break;
741 case 0x10:
742 case 0x50:
743 irq = irqmap[2][n];
744 break;
745 case 0x40:
746 case 0x60:
747 if (eeprom[FE_ATI_EEP_MAGIC] & 0x04) {
748 irq = irqmap[1][n];
749 break;
750 }
751 default:
752 irq = irqmap[0][n];
753 break;
754 }
755
756 if (ia->ia_irq != IRQUNK) {
757 if (ia->ia_irq != irq) {
758 printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
759 sc->sc_dev.dv_xname, ia->ia_irq, irq);
760 return (0);
761 }
762 } else
763 ia->ia_irq = irq;
764
765 /*
766 * Initialize constants in the per-line structure.
767 */
768
769 /* Get our station address from EEPROM. */
770 bcopy(eeprom + FE_ATI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN);
771
772 /* Make sure we got a valid station address. */
773 if ((sc->sc_enaddr[0] & 0x03) != 0x00
774 || (sc->sc_enaddr[0] == 0x00
775 && sc->sc_enaddr[1] == 0x00
776 && sc->sc_enaddr[2] == 0x00))
777 goto fail;
778
779 /* Should find all register prototypes here. FIXME. */
780 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; /* FIXME */
781 sc->proto_dlcr5 = 0;
782 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC;
783 #if 0 /* XXXX Should we use this? */
784 sc->proto_bmpr13 = eeprom[FE_ATI_EEP_MEDIA];
785 #else
786 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
787 #endif
788
789 /*
790 * Program the 86965 as follows:
791 * SRAM: 32KB, 100ns, byte-wide access.
792 * Transmission buffer: 4KB x 2.
793 * System bus interface: 16 bits.
794 * We cannot change these values but TXBSIZE, because they
795 * are hard-wired on the board. Modifying TXBSIZE will affect
796 * the driver performance.
797 */
798 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
799 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
800
801 #if FE_DEBUG >= 3
802 log(LOG_INFO, "%s: ATI found\n", sc->sc_dev.dv_xname);
803 fe_dump(LOG_INFO, sc);
804 #endif
805
806 /* Initialize 86965. */
807 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
808 delay(200);
809
810 /* Disable all interrupts. */
811 outb(iobase + FE_DLCR2, 0);
812 outb(iobase + FE_DLCR3, 0);
813
814 #if FE_DEBUG >= 3
815 log(LOG_INFO, "%s: end of fe_probe_ati()\n", sc->sc_dev.dv_xname);
816 fe_dump(LOG_INFO, sc);
817 #endif
818
819 /*
820 * That's all. AT1700 occupies 32 I/O addresses, by the way.
821 */
822 ia->ia_iosize = 32;
823 ia->ia_msize = 0;
824 return (1);
825
826 fail:
827 /* Restore register values, in the case we had no 86965. */
828 outb(iobase + FE_BMPR16, save16);
829 outb(iobase + FE_BMPR17, save17);
830 return (0);
831 }
832
833 /*
834 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface.
835 */
836 int
837 fe_probe_mbh(sc, ia)
838 struct fe_softc *sc;
839 struct isa_attach_args *ia;
840 {
841 int iobase = sc->sc_iobase;
842
843 static struct fe_simple_probe_struct probe_table[] = {
844 { FE_DLCR2, 0x70, 0x00 },
845 { FE_DLCR4, 0x08, 0x00 },
846 /* { FE_DLCR5, 0x80, 0x00 }, Does not work well. */
847 #if 0
848 /*
849 * Test *vendor* part of the address for Fujitsu.
850 * The test will gain reliability of probe process, but
851 * it rejects clones by other vendors, or OEM product
852 * supplied by resalers other than Fujitsu.
853 */
854 { FE_MBH10, 0xFF, 0x00 },
855 { FE_MBH11, 0xFF, 0x00 },
856 { FE_MBH12, 0xFF, 0x0E },
857 #else
858 /*
859 * We can always verify the *first* 2 bits (in Ehternet
860 * bit order) are "global" and "unicast" even for
861 * unknown vendors.
862 */
863 { FE_MBH10, 0x03, 0x00 },
864 #endif
865 /* Just a gap? Seems reliable, anyway. */
866 { 0x12, 0xFF, 0x00 },
867 { 0x13, 0xFF, 0x00 },
868 { 0x14, 0xFF, 0x00 },
869 { 0x15, 0xFF, 0x00 },
870 { 0x16, 0xFF, 0x00 },
871 { 0x17, 0xFF, 0x00 },
872 { 0x18, 0xFF, 0xFF },
873 { 0x19, 0xFF, 0xFF },
874
875 { 0 }
876 };
877
878 #if 0
879 /*
880 * We need a PCMCIA flag.
881 */
882 if ((cf->cf_flags & FE_FLAGS_PCMCIA) == 0)
883 return (0);
884 #endif
885
886 /*
887 * We need explicit IRQ and supported address.
888 */
889 if (ia->ia_irq == IRQUNK || (iobase & ~0x3E0) != 0)
890 return (0);
891
892 #if FE_DEBUG >= 3
893 log(LOG_INFO, "%s: top of fe_probe_mbh()\n", sc->sc_dev.dv_xname);
894 fe_dump(LOG_INFO, sc);
895 #endif
896
897 /*
898 * See if MBH10302 is on its address.
899 * I'm not sure the following probe code works. FIXME.
900 */
901 if (!fe_simple_probe(iobase, probe_table))
902 return (0);
903
904 /* Determine the card type. */
905 sc->type = FE_TYPE_MBH10302;
906 sc->typestr = "MBH10302 (PCMCIA)";
907
908 /*
909 * Initialize constants in the per-line structure.
910 */
911
912 /* Get our station address from EEPROM. */
913 inblk(iobase + FE_MBH10, sc->sc_enaddr, ETHER_ADDR_LEN);
914
915 /* Make sure we got a valid station address. */
916 if ((sc->sc_enaddr[0] & 0x03) != 0x00
917 || (sc->sc_enaddr[0] == 0x00
918 && sc->sc_enaddr[1] == 0x00
919 && sc->sc_enaddr[2] == 0x00))
920 return (0);
921
922 /* Should find all register prototypes here. FIXME. */
923 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
924 sc->proto_dlcr5 = 0;
925 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
926 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
927
928 /*
929 * Program the 86960 as follows:
930 * SRAM: 32KB, 100ns, byte-wide access.
931 * Transmission buffer: 4KB x 2.
932 * System bus interface: 16 bits.
933 * We cannot change these values but TXBSIZE, because they
934 * are hard-wired on the board. Modifying TXBSIZE will affect
935 * the driver performance.
936 */
937 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
938 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
939
940 /* Setup hooks. We need a special initialization procedure. */
941 sc->init = fe_init_mbh;
942
943 /*
944 * Minimum initialization.
945 */
946
947 /* Wait for a while. I'm not sure this is necessary. FIXME. */
948 delay(200);
949
950 /* Minimul initialization of 86960. */
951 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
952 delay(200);
953
954 /* Disable all interrupts. */
955 outb(iobase + FE_DLCR2, 0);
956 outb(iobase + FE_DLCR3, 0);
957
958 #if 1 /* FIXME. */
959 /* Initialize system bus interface and encoder/decoder operation. */
960 outb(iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_DISABLE);
961 #endif
962
963 /*
964 * That's all. MBH10302 occupies 32 I/O addresses, by the way.
965 */
966 ia->ia_iosize = 32;
967 ia->ia_msize = 0;
968 return (1);
969 }
970
971 /* MBH specific initialization routine. */
972 void
973 fe_init_mbh(sc)
974 struct fe_softc *sc;
975 {
976
977 /* Probably required after hot-insertion... */
978
979 /* Wait for a while. I'm not sure this is necessary. FIXME. */
980 delay(200);
981
982 /* Minimul initialization of 86960. */
983 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
984 delay(200);
985
986 /* Disable all interrupts. */
987 outb(sc->sc_iobase + FE_DLCR2, 0);
988 outb(sc->sc_iobase + FE_DLCR3, 0);
989
990 /* Enable master interrupt flag. */
991 outb(sc->sc_iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE);
992 }
993
994 /*
995 * Install interface into kernel networking data structures
996 */
997 void
998 feattach(parent, self, aux)
999 struct device *parent, *self;
1000 void *aux;
1001 {
1002 struct fe_softc *sc = (void *)self;
1003 struct isa_attach_args *ia = aux;
1004 struct cfdata *cf = sc->sc_dev.dv_cfdata;
1005 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1006
1007 /* Stop the 86960. */
1008 fe_stop(sc);
1009
1010 /* Initialize ifnet structure. */
1011 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
1012 ifp->if_softc = sc;
1013 ifp->if_start = fe_start;
1014 ifp->if_ioctl = fe_ioctl;
1015 ifp->if_watchdog = fe_watchdog;
1016 ifp->if_flags =
1017 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
1018
1019 /*
1020 * Set maximum size of output queue, if it has not been set.
1021 * It is done here as this driver may be started after the
1022 * system intialization (i.e., the interface is PCMCIA.)
1023 *
1024 * I'm not sure this is really necessary, but, even if it is,
1025 * it should be done somewhere else, e.g., in if_attach(),
1026 * since it must be a common workaround for all network drivers.
1027 * FIXME.
1028 */
1029 if (ifp->if_snd.ifq_maxlen == 0) {
1030 extern int ifqmaxlen; /* Don't be so shocked... */
1031 ifp->if_snd.ifq_maxlen = ifqmaxlen;
1032 }
1033
1034 #if FE_DEBUG >= 3
1035 log(LOG_INFO, "%s: feattach()\n", sc->sc_dev.dv_xname);
1036 fe_dump(LOG_INFO, sc);
1037 #endif
1038
1039 #if FE_SINGLE_TRANSMISSION
1040 /* Override txb config to allocate minimum. */
1041 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
1042 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
1043 #endif
1044
1045 /* Modify hardware config if it is requested. */
1046 if ((cf->cf_flags & FE_FLAGS_OVERRIDE_DLCR6) != 0)
1047 sc->proto_dlcr6 = cf->cf_flags & FE_FLAGS_DLCR6_VALUE;
1048
1049 /* Find TX buffer size, based on the hardware dependent proto. */
1050 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
1051 case FE_D6_TXBSIZ_2x2KB:
1052 sc->txb_size = 2048;
1053 break;
1054 case FE_D6_TXBSIZ_2x4KB:
1055 sc->txb_size = 4096;
1056 break;
1057 case FE_D6_TXBSIZ_2x8KB:
1058 sc->txb_size = 8192;
1059 break;
1060 default:
1061 /* Oops, we can't work with single buffer configuration. */
1062 #if FE_DEBUG >= 2
1063 log(LOG_WARNING, "%s: strange TXBSIZ config; fixing\n",
1064 sc->sc_dev.dv_xname);
1065 #endif
1066 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
1067 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
1068 sc->txb_size = 2048;
1069 break;
1070 }
1071
1072 /* Attach the interface. */
1073 if_attach(ifp);
1074 ether_ifattach(ifp, sc->sc_enaddr);
1075
1076 /* Print additional info when attached. */
1077 printf(": address %s, type %s\n",
1078 ether_sprintf(sc->sc_enaddr), sc->typestr);
1079 #if FE_DEBUG >= 3
1080 {
1081 int buf, txb, bbw, sbw, ram;
1082
1083 buf = txb = bbw = sbw = ram = -1;
1084 switch (sc->proto_dlcr6 & FE_D6_BUFSIZ) {
1085 case FE_D6_BUFSIZ_8KB:
1086 buf = 8;
1087 break;
1088 case FE_D6_BUFSIZ_16KB:
1089 buf = 16;
1090 break;
1091 case FE_D6_BUFSIZ_32KB:
1092 buf = 32;
1093 break;
1094 case FE_D6_BUFSIZ_64KB:
1095 buf = 64;
1096 break;
1097 }
1098 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
1099 case FE_D6_TXBSIZ_2x2KB:
1100 txb = 2;
1101 break;
1102 case FE_D6_TXBSIZ_2x4KB:
1103 txb = 4;
1104 break;
1105 case FE_D6_TXBSIZ_2x8KB:
1106 txb = 8;
1107 break;
1108 }
1109 switch (sc->proto_dlcr6 & FE_D6_BBW) {
1110 case FE_D6_BBW_BYTE:
1111 bbw = 8;
1112 break;
1113 case FE_D6_BBW_WORD:
1114 bbw = 16;
1115 break;
1116 }
1117 switch (sc->proto_dlcr6 & FE_D6_SBW) {
1118 case FE_D6_SBW_BYTE:
1119 sbw = 8;
1120 break;
1121 case FE_D6_SBW_WORD:
1122 sbw = 16;
1123 break;
1124 }
1125 switch (sc->proto_dlcr6 & FE_D6_SRAM) {
1126 case FE_D6_SRAM_100ns:
1127 ram = 100;
1128 break;
1129 case FE_D6_SRAM_150ns:
1130 ram = 150;
1131 break;
1132 }
1133 printf("%s: SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
1134 sc->sc_dev.dv_xname, buf, bbw, ram, txb, sbw);
1135 }
1136 #endif
1137
1138 #if NBPFILTER > 0
1139 /* If BPF is in the kernel, call the attach for it. */
1140 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
1141 #endif
1142
1143 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
1144 IPL_NET, feintr, sc);
1145
1146 #if NRND > 0
1147 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
1148 RND_TYPE_NET);
1149 #endif
1150 }
1151
1152 /*
1153 * Reset interface.
1154 */
1155 void
1156 fe_reset(sc)
1157 struct fe_softc *sc;
1158 {
1159 int s;
1160
1161 s = splnet();
1162 fe_stop(sc);
1163 fe_init(sc);
1164 splx(s);
1165 }
1166
1167 /*
1168 * Stop everything on the interface.
1169 *
1170 * All buffered packets, both transmitting and receiving,
1171 * if any, will be lost by stopping the interface.
1172 */
1173 void
1174 fe_stop(sc)
1175 struct fe_softc *sc;
1176 {
1177
1178 #if FE_DEBUG >= 3
1179 log(LOG_INFO, "%s: top of fe_stop()\n", sc->sc_dev.dv_xname);
1180 fe_dump(LOG_INFO, sc);
1181 #endif
1182
1183 /* Disable interrupts. */
1184 outb(sc->sc_iobase + FE_DLCR2, 0x00);
1185 outb(sc->sc_iobase + FE_DLCR3, 0x00);
1186
1187 /* Stop interface hardware. */
1188 delay(200);
1189 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1190 delay(200);
1191
1192 /* Clear all interrupt status. */
1193 outb(sc->sc_iobase + FE_DLCR0, 0xFF);
1194 outb(sc->sc_iobase + FE_DLCR1, 0xFF);
1195
1196 /* Put the chip in stand-by mode. */
1197 delay(200);
1198 outb(sc->sc_iobase + FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN);
1199 delay(200);
1200
1201 /* MAR loading can be delayed. */
1202 sc->filter_change = 0;
1203
1204 /* Call a hook. */
1205 if (sc->stop)
1206 sc->stop(sc);
1207
1208 #if DEBUG >= 3
1209 log(LOG_INFO, "%s: end of fe_stop()\n", sc->sc_dev.dv_xname);
1210 fe_dump(LOG_INFO, sc);
1211 #endif
1212 }
1213
1214 /*
1215 * Device timeout/watchdog routine. Entered if the device neglects to
1216 * generate an interrupt after a transmit has been started on it.
1217 */
1218 void
1219 fe_watchdog(ifp)
1220 struct ifnet *ifp;
1221 {
1222 struct fe_softc *sc = ifp->if_softc;
1223
1224 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1225 #if FE_DEBUG >= 3
1226 fe_dump(LOG_INFO, sc);
1227 #endif
1228
1229 /* Record how many packets are lost by this accident. */
1230 sc->sc_ethercom.ec_if.if_oerrors += sc->txb_sched + sc->txb_count;
1231
1232 fe_reset(sc);
1233 }
1234
1235 /*
1236 * Drop (skip) a packet from receive buffer in 86960 memory.
1237 */
1238 static inline void
1239 fe_droppacket(sc)
1240 struct fe_softc *sc;
1241 {
1242
1243 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER | FE_B14_SKIP);
1244 }
1245
1246 /*
1247 * Initialize device.
1248 */
1249 void
1250 fe_init(sc)
1251 struct fe_softc *sc;
1252 {
1253 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1254 int i;
1255
1256 #if FE_DEBUG >= 3
1257 log(LOG_INFO, "%s: top of fe_init()\n", sc->sc_dev.dv_xname);
1258 fe_dump(LOG_INFO, sc);
1259 #endif
1260
1261 /* Reset transmitter flags. */
1262 ifp->if_flags &= ~IFF_OACTIVE;
1263 ifp->if_timer = 0;
1264
1265 sc->txb_free = sc->txb_size;
1266 sc->txb_count = 0;
1267 sc->txb_sched = 0;
1268
1269 /* Call a hook. */
1270 if (sc->init)
1271 sc->init(sc);
1272
1273 #if FE_DEBUG >= 3
1274 log(LOG_INFO, "%s: after init hook\n", sc->sc_dev.dv_xname);
1275 fe_dump(LOG_INFO, sc);
1276 #endif
1277
1278 /*
1279 * Make sure to disable the chip, also.
1280 * This may also help re-programming the chip after
1281 * hot insertion of PCMCIAs.
1282 */
1283 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1284
1285 /* Power up the chip and select register bank for DLCRs. */
1286 delay(200);
1287 outb(sc->sc_iobase + FE_DLCR7,
1288 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
1289 delay(200);
1290
1291 /* Feed the station address. */
1292 outblk(sc->sc_iobase + FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN);
1293
1294 /* Select the BMPR bank for runtime register access. */
1295 outb(sc->sc_iobase + FE_DLCR7,
1296 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1297
1298 /* Initialize registers. */
1299 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */
1300 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */
1301 outb(sc->sc_iobase + FE_DLCR2, 0x00);
1302 outb(sc->sc_iobase + FE_DLCR3, 0x00);
1303 outb(sc->sc_iobase + FE_DLCR4, sc->proto_dlcr4);
1304 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5);
1305 outb(sc->sc_iobase + FE_BMPR10, 0x00);
1306 outb(sc->sc_iobase + FE_BMPR11, FE_B11_CTRL_SKIP);
1307 outb(sc->sc_iobase + FE_BMPR12, 0x00);
1308 outb(sc->sc_iobase + FE_BMPR13, sc->proto_bmpr13);
1309 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER);
1310 outb(sc->sc_iobase + FE_BMPR15, 0x00);
1311
1312 #if FE_DEBUG >= 3
1313 log(LOG_INFO, "%s: just before enabling DLC\n", sc->sc_dev.dv_xname);
1314 fe_dump(LOG_INFO, sc);
1315 #endif
1316
1317 /* Enable interrupts. */
1318 outb(sc->sc_iobase + FE_DLCR2, FE_TMASK);
1319 outb(sc->sc_iobase + FE_DLCR3, FE_RMASK);
1320
1321 /* Enable transmitter and receiver. */
1322 delay(200);
1323 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
1324 delay(200);
1325
1326 #if FE_DEBUG >= 3
1327 log(LOG_INFO, "%s: just after enabling DLC\n", sc->sc_dev.dv_xname);
1328 fe_dump(LOG_INFO, sc);
1329 #endif
1330
1331 /*
1332 * Make sure to empty the receive buffer.
1333 *
1334 * This may be redundant, but *if* the receive buffer were full
1335 * at this point, the driver would hang. I have experienced
1336 * some strange hangups just after UP. I hope the following
1337 * code solve the problem.
1338 *
1339 * I have changed the order of hardware initialization.
1340 * I think the receive buffer cannot have any packets at this
1341 * point in this version. The following code *must* be
1342 * redundant now. FIXME.
1343 */
1344 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
1345 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP)
1346 break;
1347 fe_droppacket(sc);
1348 }
1349 #if FE_DEBUG >= 1
1350 if (i >= FE_MAX_RECV_COUNT) {
1351 log(LOG_ERR, "%s: cannot empty receive buffer\n",
1352 sc->sc_dev.dv_xname);
1353 }
1354 #endif
1355 #if FE_DEBUG >= 3
1356 if (i < FE_MAX_RECV_COUNT) {
1357 log(LOG_INFO, "%s: receive buffer emptied (%d)\n",
1358 sc->sc_dev.dv_xname, i);
1359 }
1360 #endif
1361
1362 #if FE_DEBUG >= 3
1363 log(LOG_INFO, "%s: after ERB loop\n", sc->sc_dev.dv_xname);
1364 fe_dump(LOG_INFO, sc);
1365 #endif
1366
1367 /* Do we need this here? */
1368 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */
1369 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */
1370
1371 #if FE_DEBUG >= 3
1372 log(LOG_INFO, "%s: after FIXME\n", sc->sc_dev.dv_xname);
1373 fe_dump(LOG_INFO, sc);
1374 #endif
1375
1376 /* Set 'running' flag. */
1377 ifp->if_flags |= IFF_RUNNING;
1378
1379 /*
1380 * At this point, the interface is runnung properly,
1381 * except that it receives *no* packets. we then call
1382 * fe_setmode() to tell the chip what packets to be
1383 * received, based on the if_flags and multicast group
1384 * list. It completes the initialization process.
1385 */
1386 fe_setmode(sc);
1387
1388 #if FE_DEBUG >= 3
1389 log(LOG_INFO, "%s: after setmode\n", sc->sc_dev.dv_xname);
1390 fe_dump(LOG_INFO, sc);
1391 #endif
1392
1393 /* ...and attempt to start output. */
1394 fe_start(ifp);
1395
1396 #if FE_DEBUG >= 3
1397 log(LOG_INFO, "%s: end of fe_init()\n", sc->sc_dev.dv_xname);
1398 fe_dump(LOG_INFO, sc);
1399 #endif
1400 }
1401
1402 /*
1403 * This routine actually starts the transmission on the interface
1404 */
1405 static inline void
1406 fe_xmit(sc)
1407 struct fe_softc *sc;
1408 {
1409
1410 /*
1411 * Set a timer just in case we never hear from the board again.
1412 * We use longer timeout for multiple packet transmission.
1413 * I'm not sure this timer value is appropriate. FIXME.
1414 */
1415 sc->sc_ethercom.ec_if.if_timer = 1 + sc->txb_count;
1416
1417 /* Update txb variables. */
1418 sc->txb_sched = sc->txb_count;
1419 sc->txb_count = 0;
1420 sc->txb_free = sc->txb_size;
1421
1422 #if FE_DELAYED_PADDING
1423 /* Omit the postponed padding process. */
1424 sc->txb_padding = 0;
1425 #endif
1426
1427 /* Start transmitter, passing packets in TX buffer. */
1428 outb(sc->sc_iobase + FE_BMPR10, sc->txb_sched | FE_B10_START);
1429 }
1430
1431 /*
1432 * Start output on interface.
1433 * We make two assumptions here:
1434 * 1) that the current priority is set to splnet _before_ this code
1435 * is called *and* is returned to the appropriate priority after
1436 * return
1437 * 2) that the IFF_OACTIVE flag is checked before this code is called
1438 * (i.e. that the output part of the interface is idle)
1439 */
1440 void
1441 fe_start(ifp)
1442 struct ifnet *ifp;
1443 {
1444 struct fe_softc *sc = ifp->if_softc;
1445 struct mbuf *m;
1446
1447 #if FE_DEBUG >= 1
1448 /* Just a sanity check. */
1449 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
1450 /*
1451 * Txb_count and txb_free co-works to manage the
1452 * transmission buffer. Txb_count keeps track of the
1453 * used potion of the buffer, while txb_free does unused
1454 * potion. So, as long as the driver runs properly,
1455 * txb_count is zero if and only if txb_free is same
1456 * as txb_size (which represents whole buffer.)
1457 */
1458 log(LOG_ERR, "%s: inconsistent txb variables (%d, %d)\n",
1459 sc->sc_dev.dv_xname, sc->txb_count, sc->txb_free);
1460 /*
1461 * So, what should I do, then?
1462 *
1463 * We now know txb_count and txb_free contradicts. We
1464 * cannot, however, tell which is wrong. More
1465 * over, we cannot peek 86960 transmission buffer or
1466 * reset the transmission buffer. (In fact, we can
1467 * reset the entire interface. I don't want to do it.)
1468 *
1469 * If txb_count is incorrect, leaving it as is will cause
1470 * sending of gabages after next interrupt. We have to
1471 * avoid it. Hence, we reset the txb_count here. If
1472 * txb_free was incorrect, resetting txb_count just loose
1473 * some packets. We can live with it.
1474 */
1475 sc->txb_count = 0;
1476 }
1477 #endif
1478
1479 #if FE_DEBUG >= 1
1480 /*
1481 * First, see if there are buffered packets and an idle
1482 * transmitter - should never happen at this point.
1483 */
1484 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
1485 log(LOG_ERR, "%s: transmitter idle with %d buffered packets\n",
1486 sc->sc_dev.dv_xname, sc->txb_count);
1487 fe_xmit(sc);
1488 }
1489 #endif
1490
1491 /*
1492 * Stop accepting more transmission packets temporarily, when
1493 * a filter change request is delayed. Updating the MARs on
1494 * 86960 flushes the transmisstion buffer, so it is delayed
1495 * until all buffered transmission packets have been sent
1496 * out.
1497 */
1498 if (sc->filter_change) {
1499 /*
1500 * Filter change requst is delayed only when the DLC is
1501 * working. DLC soon raise an interrupt after finishing
1502 * the work.
1503 */
1504 goto indicate_active;
1505 }
1506
1507 for (;;) {
1508 /*
1509 * See if there is room to put another packet in the buffer.
1510 * We *could* do better job by peeking the send queue to
1511 * know the length of the next packet. Current version just
1512 * tests against the worst case (i.e., longest packet). FIXME.
1513 *
1514 * When adding the packet-peek feature, don't forget adding a
1515 * test on txb_count against QUEUEING_MAX.
1516 * There is a little chance the packet count exceeds
1517 * the limit. Assume transmission buffer is 8KB (2x8KB
1518 * configuration) and an application sends a bunch of small
1519 * (i.e., minimum packet sized) packets rapidly. An 8KB
1520 * buffer can hold 130 blocks of 62 bytes long...
1521 */
1522 if (sc->txb_free < ETHER_MAX_LEN + FE_DATA_LEN_LEN) {
1523 /* No room. */
1524 goto indicate_active;
1525 }
1526
1527 #if FE_SINGLE_TRANSMISSION
1528 if (sc->txb_count > 0) {
1529 /* Just one packet per a transmission buffer. */
1530 goto indicate_active;
1531 }
1532 #endif
1533
1534 /*
1535 * Get the next mbuf chain for a packet to send.
1536 */
1537 IF_DEQUEUE(&ifp->if_snd, m);
1538 if (m == 0) {
1539 /* No more packets to send. */
1540 goto indicate_inactive;
1541 }
1542
1543 #if NBPFILTER > 0
1544 /* Tap off here if there is a BPF listener. */
1545 if (ifp->if_bpf)
1546 bpf_mtap(ifp->if_bpf, m);
1547 #endif
1548
1549 /*
1550 * Copy the mbuf chain into the transmission buffer.
1551 * txb_* variables are updated as necessary.
1552 */
1553 fe_write_mbufs(sc, m);
1554
1555 m_freem(m);
1556
1557 /* Start transmitter if it's idle. */
1558 if (sc->txb_sched == 0)
1559 fe_xmit(sc);
1560 }
1561
1562 indicate_inactive:
1563 /*
1564 * We are using the !OACTIVE flag to indicate to
1565 * the outside world that we can accept an
1566 * additional packet rather than that the
1567 * transmitter is _actually_ active. Indeed, the
1568 * transmitter may be active, but if we haven't
1569 * filled all the buffers with data then we still
1570 * want to accept more.
1571 */
1572 ifp->if_flags &= ~IFF_OACTIVE;
1573 return;
1574
1575 indicate_active:
1576 /*
1577 * The transmitter is active, and there are no room for
1578 * more outgoing packets in the transmission buffer.
1579 */
1580 ifp->if_flags |= IFF_OACTIVE;
1581 return;
1582 }
1583
1584 /*
1585 * Transmission interrupt handler
1586 * The control flow of this function looks silly. FIXME.
1587 */
1588 void
1589 fe_tint(sc, tstat)
1590 struct fe_softc *sc;
1591 u_char tstat;
1592 {
1593 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1594 int left;
1595 int col;
1596
1597 /*
1598 * Handle "excessive collision" interrupt.
1599 */
1600 if (tstat & FE_D0_COLL16) {
1601 /*
1602 * Find how many packets (including this collided one)
1603 * are left unsent in transmission buffer.
1604 */
1605 left = inb(sc->sc_iobase + FE_BMPR10);
1606
1607 #if FE_DEBUG >= 2
1608 log(LOG_WARNING, "%s: excessive collision (%d/%d)\n",
1609 sc->sc_dev.dv_xname, left, sc->txb_sched);
1610 #endif
1611 #if FE_DEBUG >= 3
1612 fe_dump(LOG_INFO, sc);
1613 #endif
1614
1615 /*
1616 * Update statistics.
1617 */
1618 ifp->if_collisions += 16;
1619 ifp->if_oerrors++;
1620 ifp->if_opackets += sc->txb_sched - left;
1621
1622 /*
1623 * Collision statistics has been updated.
1624 * Clear the collision flag on 86960 now to avoid confusion.
1625 */
1626 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID);
1627
1628 /*
1629 * Restart transmitter, skipping the
1630 * collided packet.
1631 *
1632 * We *must* skip the packet to keep network running
1633 * properly. Excessive collision error is an
1634 * indication of the network overload. If we
1635 * tried sending the same packet after excessive
1636 * collision, the network would be filled with
1637 * out-of-time packets. Packets belonging
1638 * to reliable transport (such as TCP) are resent
1639 * by some upper layer.
1640 */
1641 outb(sc->sc_iobase + FE_BMPR11,
1642 FE_B11_CTRL_SKIP | FE_B11_MODE1);
1643 sc->txb_sched = left - 1;
1644 }
1645
1646 /*
1647 * Handle "transmission complete" interrupt.
1648 */
1649 if (tstat & FE_D0_TXDONE) {
1650 /*
1651 * Add in total number of collisions on last
1652 * transmission. We also clear "collision occurred" flag
1653 * here.
1654 *
1655 * 86960 has a design flow on collision count on multiple
1656 * packet transmission. When we send two or more packets
1657 * with one start command (that's what we do when the
1658 * transmission queue is clauded), 86960 informs us number
1659 * of collisions occured on the last packet on the
1660 * transmission only. Number of collisions on previous
1661 * packets are lost. I have told that the fact is clearly
1662 * stated in the Fujitsu document.
1663 *
1664 * I considered not to mind it seriously. Collision
1665 * count is not so important, anyway. Any comments? FIXME.
1666 */
1667
1668 if (inb(sc->sc_iobase + FE_DLCR0) & FE_D0_COLLID) {
1669 /* Clear collision flag. */
1670 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID);
1671
1672 /* Extract collision count from 86960. */
1673 col = inb(sc->sc_iobase + FE_DLCR4) & FE_D4_COL;
1674 if (col == 0) {
1675 /*
1676 * Status register indicates collisions,
1677 * while the collision count is zero.
1678 * This can happen after multiple packet
1679 * transmission, indicating that one or more
1680 * previous packet(s) had been collided.
1681 *
1682 * Since the accurate number of collisions
1683 * has been lost, we just guess it as 1;
1684 * Am I too optimistic? FIXME.
1685 */
1686 col = 1;
1687 } else
1688 col >>= FE_D4_COL_SHIFT;
1689 ifp->if_collisions += col;
1690 #if FE_DEBUG >= 4
1691 log(LOG_WARNING, "%s: %d collision%s (%d)\n",
1692 sc->sc_dev.dv_xname, col, col == 1 ? "" : "s",
1693 sc->txb_sched);
1694 #endif
1695 }
1696
1697 /*
1698 * Update total number of successfully
1699 * transmitted packets.
1700 */
1701 ifp->if_opackets += sc->txb_sched;
1702 sc->txb_sched = 0;
1703 }
1704
1705 if (sc->txb_sched == 0) {
1706 /*
1707 * The transmitter is no more active.
1708 * Reset output active flag and watchdog timer.
1709 */
1710 ifp->if_flags &= ~IFF_OACTIVE;
1711 ifp->if_timer = 0;
1712
1713 /*
1714 * If more data is ready to transmit in the buffer, start
1715 * transmitting them. Otherwise keep transmitter idle,
1716 * even if more data is queued. This gives receive
1717 * process a slight priority.
1718 */
1719 if (sc->txb_count > 0)
1720 fe_xmit(sc);
1721 }
1722 }
1723
1724 /*
1725 * Ethernet interface receiver interrupt.
1726 */
1727 void
1728 fe_rint(sc, rstat)
1729 struct fe_softc *sc;
1730 u_char rstat;
1731 {
1732 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1733 int len;
1734 u_char status;
1735 int i;
1736
1737 /*
1738 * Update statistics if this interrupt is caused by an error.
1739 */
1740 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR |
1741 FE_D1_ALGERR | FE_D1_SRTPKT)) {
1742 #if FE_DEBUG >= 3
1743 log(LOG_WARNING, "%s: receive error: %b\n",
1744 sc->sc_dev.dv_xname, rstat, FE_D1_ERRBITS);
1745 #endif
1746 ifp->if_ierrors++;
1747 }
1748
1749 /*
1750 * MB86960 has a flag indicating "receive queue empty."
1751 * We just loop cheking the flag to pull out all received
1752 * packets.
1753 *
1754 * We limit the number of iterrations to avoid infinite loop.
1755 * It can be caused by a very slow CPU (some broken
1756 * peripheral may insert incredible number of wait cycles)
1757 * or, worse, by a broken MB86960 chip.
1758 */
1759 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
1760 /* Stop the iterration if 86960 indicates no packets. */
1761 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP)
1762 break;
1763
1764 /*
1765 * Extract A receive status byte.
1766 * As our 86960 is in 16 bit bus access mode, we have to
1767 * use inw() to get the status byte. The significant
1768 * value is returned in lower 8 bits.
1769 */
1770 status = (u_char)inw(sc->sc_iobase + FE_BMPR8);
1771 #if FE_DEBUG >= 4
1772 log(LOG_INFO, "%s: receive status = %02x\n",
1773 sc->sc_dev.dv_xname, status);
1774 #endif
1775
1776 /*
1777 * If there was an error, update statistics and drop
1778 * the packet, unless the interface is in promiscuous
1779 * mode.
1780 */
1781 if ((status & 0xF0) != 0x20) { /* XXXX ? */
1782 if ((ifp->if_flags & IFF_PROMISC) == 0) {
1783 ifp->if_ierrors++;
1784 fe_droppacket(sc);
1785 continue;
1786 }
1787 }
1788
1789 /*
1790 * Extract the packet length.
1791 * It is a sum of a header (14 bytes) and a payload.
1792 * CRC has been stripped off by the 86960.
1793 */
1794 len = inw(sc->sc_iobase + FE_BMPR8);
1795
1796 /*
1797 * MB86965 checks the packet length and drop big packet
1798 * before passing it to us. There are no chance we can
1799 * get [crufty] packets. Hence, if the length exceeds
1800 * the specified limit, it means some serious failure,
1801 * such as out-of-sync on receive buffer management.
1802 *
1803 * Is this statement true? FIXME.
1804 */
1805 if (len > ETHER_MAX_LEN || len < ETHER_HDR_SIZE) {
1806 #if FE_DEBUG >= 2
1807 log(LOG_WARNING,
1808 "%s: received a %s packet? (%u bytes)\n",
1809 sc->sc_dev.dv_xname,
1810 len < ETHER_HDR_SIZE ? "partial" : "big", len);
1811 #endif
1812 ifp->if_ierrors++;
1813 fe_droppacket(sc);
1814 continue;
1815 }
1816
1817 /*
1818 * Check for a short (RUNT) packet. We *do* check
1819 * but do nothing other than print a message.
1820 * Short packets are illegal, but does nothing bad
1821 * if it carries data for upper layer.
1822 */
1823 #if FE_DEBUG >= 2
1824 if (len < ETHER_MIN_LEN) {
1825 log(LOG_WARNING,
1826 "%s: received a short packet? (%u bytes)\n",
1827 sc->sc_dev.dv_xname, len);
1828 }
1829 #endif
1830
1831 /*
1832 * Go get a packet.
1833 */
1834 if (!fe_get_packet(sc, len)) {
1835 /* Skip a packet, updating statistics. */
1836 #if FE_DEBUG >= 2
1837 log(LOG_WARNING,
1838 "%s: out of mbufs; dropping packet (%u bytes)\n",
1839 sc->sc_dev.dv_xname, len);
1840 #endif
1841 ifp->if_ierrors++;
1842 fe_droppacket(sc);
1843
1844 /*
1845 * We stop receiving packets, even if there are
1846 * more in the buffer. We hope we can get more
1847 * mbufs next time.
1848 */
1849 return;
1850 }
1851
1852 /* Successfully received a packet. Update stat. */
1853 ifp->if_ipackets++;
1854 }
1855 }
1856
1857 /*
1858 * Ethernet interface interrupt processor
1859 */
1860 int
1861 feintr(arg)
1862 void *arg;
1863 {
1864 struct fe_softc *sc = arg;
1865 u_char tstat, rstat;
1866
1867 #if FE_DEBUG >= 4
1868 log(LOG_INFO, "%s: feintr()\n", sc->sc_dev.dv_xname);
1869 fe_dump(LOG_INFO, sc);
1870 #endif
1871
1872 /*
1873 * Get interrupt conditions, masking unneeded flags.
1874 */
1875 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK;
1876 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK;
1877 if (tstat == 0 && rstat == 0)
1878 return (0);
1879
1880 /*
1881 * Loop until there are no more new interrupt conditions.
1882 */
1883 for (;;) {
1884 /*
1885 * Reset the conditions we are acknowledging.
1886 */
1887 outb(sc->sc_iobase + FE_DLCR0, tstat);
1888 outb(sc->sc_iobase + FE_DLCR1, rstat);
1889
1890 /*
1891 * Handle transmitter interrupts. Handle these first because
1892 * the receiver will reset the board under some conditions.
1893 */
1894 if (tstat != 0)
1895 fe_tint(sc, tstat);
1896
1897 /*
1898 * Handle receiver interrupts.
1899 */
1900 if (rstat != 0)
1901 fe_rint(sc, rstat);
1902
1903 /*
1904 * Update the multicast address filter if it is
1905 * needed and possible. We do it now, because
1906 * we can make sure the transmission buffer is empty,
1907 * and there is a good chance that the receive queue
1908 * is empty. It will minimize the possibility of
1909 * packet lossage.
1910 */
1911 if (sc->filter_change &&
1912 sc->txb_count == 0 && sc->txb_sched == 0) {
1913 fe_loadmar(sc);
1914 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
1915 }
1916
1917 /*
1918 * If it looks like the transmitter can take more data,
1919 * attempt to start output on the interface. This is done
1920 * after handling the receiver interrupt to give the
1921 * receive operation priority.
1922 */
1923 if ((sc->sc_ethercom.ec_if.if_flags & IFF_OACTIVE) == 0)
1924 fe_start(&sc->sc_ethercom.ec_if);
1925
1926 #if NRND > 0
1927 if (rstat != 0 || tstat != 0)
1928 rnd_add_uint32(&sc->rnd_source, rstat + tstat);
1929 #endif
1930
1931 /*
1932 * Get interrupt conditions, masking unneeded flags.
1933 */
1934 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK;
1935 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK;
1936 if (tstat == 0 && rstat == 0)
1937 return (1);
1938 }
1939 }
1940
1941 /*
1942 * Process an ioctl request. This code needs some work - it looks pretty ugly.
1943 */
1944 int
1945 fe_ioctl(ifp, command, data)
1946 register struct ifnet *ifp;
1947 u_long command;
1948 caddr_t data;
1949 {
1950 struct fe_softc *sc = ifp->if_softc;
1951 register struct ifaddr *ifa = (struct ifaddr *)data;
1952 struct ifreq *ifr = (struct ifreq *)data;
1953 int s, error = 0;
1954
1955 #if FE_DEBUG >= 3
1956 log(LOG_INFO, "%s: ioctl(%x)\n", sc->sc_dev.dv_xname, command);
1957 #endif
1958
1959 s = splnet();
1960
1961 switch (command) {
1962
1963 case SIOCSIFADDR:
1964 ifp->if_flags |= IFF_UP;
1965
1966 switch (ifa->ifa_addr->sa_family) {
1967 #ifdef INET
1968 case AF_INET:
1969 fe_init(sc);
1970 arp_ifinit(ifp, ifa);
1971 break;
1972 #endif
1973 #ifdef NS
1974 case AF_NS:
1975 {
1976 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1977
1978 if (ns_nullhost(*ina))
1979 ina->x_host =
1980 *(union ns_host *)(sc->sc_enaddr);
1981 else {
1982 bcopy(ina->x_host.c_host, sc->sc_enaddr,
1983 ETHER_ADDR_LEN);
1984 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
1985 ETHER_ADDR_LEN);
1986 }
1987 /* Set new address. */
1988 fe_init(sc);
1989 break;
1990 }
1991 #endif
1992 default:
1993 fe_init(sc);
1994 break;
1995 }
1996 break;
1997
1998 case SIOCSIFFLAGS:
1999 if ((ifp->if_flags & IFF_UP) == 0 &&
2000 (ifp->if_flags & IFF_RUNNING) != 0) {
2001 /*
2002 * If interface is marked down and it is running, then
2003 * stop it.
2004 */
2005 fe_stop(sc);
2006 ifp->if_flags &= ~IFF_RUNNING;
2007 } else if ((ifp->if_flags & IFF_UP) != 0 &&
2008 (ifp->if_flags & IFF_RUNNING) == 0) {
2009 /*
2010 * If interface is marked up and it is stopped, then
2011 * start it.
2012 */
2013 fe_init(sc);
2014 } else {
2015 /*
2016 * Reset the interface to pick up changes in any other
2017 * flags that affect hardware registers.
2018 */
2019 fe_setmode(sc);
2020 }
2021 #if DEBUG >= 1
2022 /* "ifconfig fe0 debug" to print register dump. */
2023 if (ifp->if_flags & IFF_DEBUG) {
2024 log(LOG_INFO, "%s: SIOCSIFFLAGS(DEBUG)\n", sc->sc_dev.dv_xname);
2025 fe_dump(LOG_DEBUG, sc);
2026 }
2027 #endif
2028 break;
2029
2030 case SIOCADDMULTI:
2031 case SIOCDELMULTI:
2032 /* Update our multicast list. */
2033 error = (command == SIOCADDMULTI) ?
2034 ether_addmulti(ifr, &sc->sc_ethercom) :
2035 ether_delmulti(ifr, &sc->sc_ethercom);
2036
2037 if (error == ENETRESET) {
2038 /*
2039 * Multicast list has changed; set the hardware filter
2040 * accordingly.
2041 */
2042 fe_setmode(sc);
2043 error = 0;
2044 }
2045 break;
2046
2047 default:
2048 error = EINVAL;
2049 }
2050
2051 splx(s);
2052 return (error);
2053 }
2054
2055 /*
2056 * Retreive packet from receive buffer and send to the next level up via
2057 * ether_input(). If there is a BPF listener, give a copy to BPF, too.
2058 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
2059 */
2060 int
2061 fe_get_packet(sc, len)
2062 struct fe_softc *sc;
2063 int len;
2064 {
2065 struct ether_header *eh;
2066 struct mbuf *m;
2067 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2068
2069 /* Allocate a header mbuf. */
2070 MGETHDR(m, M_DONTWAIT, MT_DATA);
2071 if (m == 0)
2072 return (0);
2073 m->m_pkthdr.rcvif = ifp;
2074 m->m_pkthdr.len = len;
2075
2076 /* The following silliness is to make NFS happy. */
2077 #define EROUND ((sizeof(struct ether_header) + 3) & ~3)
2078 #define EOFF (EROUND - sizeof(struct ether_header))
2079
2080 /*
2081 * Our strategy has one more problem. There is a policy on
2082 * mbuf cluster allocation. It says that we must have at
2083 * least MINCLSIZE (208 bytes) to allocate a cluster. For a
2084 * packet of a size between (MHLEN - 2) to (MINCLSIZE - 2),
2085 * our code violates the rule...
2086 * On the other hand, the current code is short, simle,
2087 * and fast, however. It does no harmful thing, just waists
2088 * some memory. Any comments? FIXME.
2089 */
2090
2091 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
2092 if (len > MHLEN - EOFF) {
2093 MCLGET(m, M_DONTWAIT);
2094 if ((m->m_flags & M_EXT) == 0) {
2095 m_freem(m);
2096 return (0);
2097 }
2098 }
2099
2100 /*
2101 * The following assumes there is room for the ether header in the
2102 * header mbuf.
2103 */
2104 m->m_data += EOFF;
2105 eh = mtod(m, struct ether_header *);
2106
2107 /* Set the length of this packet. */
2108 m->m_len = len;
2109
2110 /* Get a packet. */
2111 insw(sc->sc_iobase + FE_BMPR8, m->m_data, (len + 1) >> 1);
2112
2113 #if NBPFILTER > 0
2114 /*
2115 * Check if there's a BPF listener on this interface. If so, hand off
2116 * the raw packet to bpf.
2117 */
2118 if (ifp->if_bpf) {
2119 bpf_mtap(ifp->if_bpf, m);
2120
2121 /*
2122 * Note that the interface cannot be in promiscuous mode if
2123 * there are no BPF listeners. And if we are in promiscuous
2124 * mode, we have to check if this packet is really ours.
2125 */
2126 if ((ifp->if_flags & IFF_PROMISC) != 0 &&
2127 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
2128 bcmp(eh->ether_dhost, sc->sc_enaddr,
2129 sizeof(eh->ether_dhost)) != 0) {
2130 m_freem(m);
2131 return (1);
2132 }
2133 }
2134 #endif
2135
2136 /* Fix up data start offset in mbuf to point past ether header. */
2137 m_adj(m, sizeof(struct ether_header));
2138 ether_input(ifp, eh, m);
2139 return (1);
2140 }
2141
2142 /*
2143 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
2144 * Returns number of bytes actually written, including length word.
2145 *
2146 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
2147 * Packets shorter than Ethernet minimum are legal, and we pad them
2148 * before sending out. An exception is "partial" packets which are
2149 * shorter than mandatory Ethernet header.
2150 *
2151 * I wrote a code for an experimental "delayed padding" technique.
2152 * When employed, it postpones the padding process for short packets.
2153 * If xmit() occured at the moment, the padding process is omitted, and
2154 * garbages are sent as pad data. If next packet is stored in the
2155 * transmission buffer before xmit(), write_mbuf() pads the previous
2156 * packet before transmitting new packet. This *may* gain the
2157 * system performance (slightly).
2158 */
2159 void
2160 fe_write_mbufs(sc, m)
2161 struct fe_softc *sc;
2162 struct mbuf *m;
2163 {
2164 int bmpr8 = sc->sc_iobase + FE_BMPR8;
2165 u_char *data;
2166 u_short savebyte; /* WARNING: Architecture dependent! */
2167 int totlen, len, wantbyte;
2168
2169 /* XXX thorpej 960116 - quiet bogus compiler warning. */
2170 savebyte = 0;
2171
2172 #if FE_DELAYED_PADDING
2173 /* Do the "delayed padding." */
2174 len = sc->txb_padding >> 1;
2175 if (len > 0) {
2176 while (--len >= 0)
2177 outw(bmpr8, 0);
2178 sc->txb_padding = 0;
2179 }
2180 #endif
2181
2182 /* We need to use m->m_pkthdr.len, so require the header */
2183 if ((m->m_flags & M_PKTHDR) == 0)
2184 panic("fe_write_mbufs: no header mbuf");
2185
2186 #if FE_DEBUG >= 2
2187 /* First, count up the total number of bytes to copy. */
2188 for (totlen = 0, mp = m; mp != 0; mp = mp->m_next)
2189 totlen += mp->m_len;
2190 /* Check if this matches the one in the packet header. */
2191 if (totlen != m->m_pkthdr.len)
2192 log(LOG_WARNING, "%s: packet length mismatch? (%d/%d)\n",
2193 sc->sc_dev.dv_xname, totlen, m->m_pkthdr.len);
2194 #else
2195 /* Just use the length value in the packet header. */
2196 totlen = m->m_pkthdr.len;
2197 #endif
2198
2199 #if FE_DEBUG >= 1
2200 /*
2201 * Should never send big packets. If such a packet is passed,
2202 * it should be a bug of upper layer. We just ignore it.
2203 * ... Partial (too short) packets, neither.
2204 */
2205 if (totlen > ETHER_MAX_LEN || totlen < ETHER_HDR_SIZE) {
2206 log(LOG_ERR, "%s: got a %s packet (%u bytes) to send\n",
2207 sc->sc_dev.dv_xname,
2208 totlen < ETHER_HDR_SIZE ? "partial" : "big", totlen);
2209 sc->sc_ethercom.ec_if.if_oerrors++;
2210 return;
2211 }
2212 #endif
2213
2214 /*
2215 * Put the length word for this frame.
2216 * Does 86960 accept odd length? -- Yes.
2217 * Do we need to pad the length to minimum size by ourselves?
2218 * -- Generally yes. But for (or will be) the last
2219 * packet in the transmission buffer, we can skip the
2220 * padding process. It may gain performance slightly. FIXME.
2221 */
2222 outw(bmpr8, max(totlen, ETHER_MIN_LEN));
2223
2224 /*
2225 * Update buffer status now.
2226 * Truncate the length up to an even number, since we use outw().
2227 */
2228 totlen = (totlen + 1) & ~1;
2229 sc->txb_free -= FE_DATA_LEN_LEN + max(totlen, ETHER_MIN_LEN);
2230 sc->txb_count++;
2231
2232 #if FE_DELAYED_PADDING
2233 /* Postpone the packet padding if necessary. */
2234 if (totlen < ETHER_MIN_LEN)
2235 sc->txb_padding = ETHER_MIN_LEN - totlen;
2236 #endif
2237
2238 /*
2239 * Transfer the data from mbuf chain to the transmission buffer.
2240 * MB86960 seems to require that data be transferred as words, and
2241 * only words. So that we require some extra code to patch
2242 * over odd-length mbufs.
2243 */
2244 wantbyte = 0;
2245 for (; m != 0; m = m->m_next) {
2246 /* Ignore empty mbuf. */
2247 len = m->m_len;
2248 if (len == 0)
2249 continue;
2250
2251 /* Find the actual data to send. */
2252 data = mtod(m, caddr_t);
2253
2254 /* Finish the last byte. */
2255 if (wantbyte) {
2256 outw(bmpr8, savebyte | (*data << 8));
2257 data++;
2258 len--;
2259 wantbyte = 0;
2260 }
2261
2262 /* Output contiguous words. */
2263 if (len > 1)
2264 outsw(bmpr8, data, len >> 1);
2265
2266 /* Save remaining byte, if there is one. */
2267 if (len & 1) {
2268 data += len & ~1;
2269 savebyte = *data;
2270 wantbyte = 1;
2271 }
2272 }
2273
2274 /* Spit the last byte, if the length is odd. */
2275 if (wantbyte)
2276 outw(bmpr8, savebyte);
2277
2278 #if ! FE_DELAYED_PADDING
2279 /*
2280 * Pad the packet to the minimum length if necessary.
2281 */
2282 len = (ETHER_MIN_LEN >> 1) - (totlen >> 1);
2283 while (--len >= 0)
2284 outw(bmpr8, 0);
2285 #endif
2286 }
2287
2288 /*
2289 * Compute the multicast address filter from the
2290 * list of multicast addresses we need to listen to.
2291 */
2292 void
2293 fe_getmcaf(ec, af)
2294 struct ethercom *ec;
2295 u_char *af;
2296 {
2297 struct ifnet *ifp = &ec->ec_if;
2298 struct ether_multi *enm;
2299 register u_char *cp, c;
2300 register u_long crc;
2301 register int i, len;
2302 struct ether_multistep step;
2303
2304 /*
2305 * Set up multicast address filter by passing all multicast addresses
2306 * through a crc generator, and then using the high order 6 bits as an
2307 * index into the 64 bit logical address filter. The high order bit
2308 * selects the word, while the rest of the bits select the bit within
2309 * the word.
2310 */
2311
2312 if ((ifp->if_flags & IFF_PROMISC) != 0)
2313 goto allmulti;
2314
2315 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0x00;
2316 ETHER_FIRST_MULTI(step, ec, enm);
2317 while (enm != NULL) {
2318 if (bcmp(enm->enm_addrlo, enm->enm_addrhi,
2319 sizeof(enm->enm_addrlo)) != 0) {
2320 /*
2321 * We must listen to a range of multicast addresses.
2322 * For now, just accept all multicasts, rather than
2323 * trying to set only those filter bits needed to match
2324 * the range. (At this time, the only use of address
2325 * ranges is for IP multicast routing, for which the
2326 * range is big enough to require all bits set.)
2327 */
2328 goto allmulti;
2329 }
2330
2331 cp = enm->enm_addrlo;
2332 crc = 0xffffffff;
2333 for (len = sizeof(enm->enm_addrlo); --len >= 0;) {
2334 c = *cp++;
2335 for (i = 8; --i >= 0;) {
2336 if ((crc & 0x01) ^ (c & 0x01)) {
2337 crc >>= 1;
2338 crc ^= 0xedb88320;
2339 } else
2340 crc >>= 1;
2341 c >>= 1;
2342 }
2343 }
2344 /* Just want the 6 most significant bits. */
2345 crc >>= 26;
2346
2347 /* Turn on the corresponding bit in the filter. */
2348 af[crc >> 3] |= 1 << (crc & 7);
2349
2350 ETHER_NEXT_MULTI(step, enm);
2351 }
2352 ifp->if_flags &= ~IFF_ALLMULTI;
2353 return;
2354
2355 allmulti:
2356 ifp->if_flags |= IFF_ALLMULTI;
2357 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0xff;
2358 }
2359
2360 /*
2361 * Calculate a new "multicast packet filter" and put the 86960
2362 * receiver in appropriate mode.
2363 */
2364 void
2365 fe_setmode(sc)
2366 struct fe_softc *sc;
2367 {
2368 int flags = sc->sc_ethercom.ec_if.if_flags;
2369
2370 /*
2371 * If the interface is not running, we postpone the update
2372 * process for receive modes and multicast address filter
2373 * until the interface is restarted. It reduces some
2374 * complicated job on maintaining chip states. (Earlier versions
2375 * of this driver had a bug on that point...)
2376 *
2377 * To complete the trick, fe_init() calls fe_setmode() after
2378 * restarting the interface.
2379 */
2380 if ((flags & IFF_RUNNING) == 0)
2381 return;
2382
2383 /*
2384 * Promiscuous mode is handled separately.
2385 */
2386 if ((flags & IFF_PROMISC) != 0) {
2387 /*
2388 * Program 86960 to receive all packets on the segment
2389 * including those directed to other stations.
2390 * Multicast filter stored in MARs are ignored
2391 * under this setting, so we don't need to update it.
2392 *
2393 * Promiscuous mode is used solely by BPF, and BPF only
2394 * listens to valid (no error) packets. So, we ignore
2395 * errornous ones even in this mode.
2396 */
2397 outb(sc->sc_iobase + FE_DLCR5,
2398 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
2399 sc->filter_change = 0;
2400
2401 #if FE_DEBUG >= 3
2402 log(LOG_INFO, "%s: promiscuous mode\n", sc->sc_dev.dv_xname);
2403 #endif
2404 return;
2405 }
2406
2407 /*
2408 * Turn the chip to the normal (non-promiscuous) mode.
2409 */
2410 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
2411
2412 /*
2413 * Find the new multicast filter value.
2414 */
2415 fe_getmcaf(&sc->sc_ethercom, sc->filter);
2416 sc->filter_change = 1;
2417
2418 #if FE_DEBUG >= 3
2419 log(LOG_INFO,
2420 "%s: address filter: [%02x %02x %02x %02x %02x %02x %02x %02x]\n",
2421 sc->sc_dev.dv_xname,
2422 sc->filter[0], sc->filter[1], sc->filter[2], sc->filter[3],
2423 sc->filter[4], sc->filter[5], sc->filter[6], sc->filter[7]);
2424 #endif
2425
2426 /*
2427 * We have to update the multicast filter in the 86960, A.S.A.P.
2428 *
2429 * Note that the DLC (Data Linc Control unit, i.e. transmitter
2430 * and receiver) must be stopped when feeding the filter, and
2431 * DLC trushes all packets in both transmission and receive
2432 * buffers when stopped.
2433 *
2434 * ... Are the above sentenses correct? I have to check the
2435 * manual of the MB86960A. FIXME.
2436 *
2437 * To reduce the packet lossage, we delay the filter update
2438 * process until buffers are empty.
2439 */
2440 if (sc->txb_sched == 0 && sc->txb_count == 0 &&
2441 (inb(sc->sc_iobase + FE_DLCR1) & FE_D1_PKTRDY) == 0) {
2442 /*
2443 * Buffers are (apparently) empty. Load
2444 * the new filter value into MARs now.
2445 */
2446 fe_loadmar(sc);
2447 } else {
2448 /*
2449 * Buffers are not empty. Mark that we have to update
2450 * the MARs. The new filter will be loaded by feintr()
2451 * later.
2452 */
2453 #if FE_DEBUG >= 4
2454 log(LOG_INFO, "%s: filter change delayed\n", sc->sc_dev.dv_xname);
2455 #endif
2456 }
2457 }
2458
2459 /*
2460 * Load a new multicast address filter into MARs.
2461 *
2462 * The caller must have splnet'ed befor fe_loadmar.
2463 * This function starts the DLC upon return. So it can be called only
2464 * when the chip is working, i.e., from the driver's point of view, when
2465 * a device is RUNNING. (I mistook the point in previous versions.)
2466 */
2467 void
2468 fe_loadmar(sc)
2469 struct fe_softc *sc;
2470 {
2471
2472 /* Stop the DLC (transmitter and receiver). */
2473 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
2474
2475 /* Select register bank 1 for MARs. */
2476 outb(sc->sc_iobase + FE_DLCR7,
2477 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
2478
2479 /* Copy filter value into the registers. */
2480 outblk(sc->sc_iobase + FE_MAR8, sc->filter, FE_FILTER_LEN);
2481
2482 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
2483 outb(sc->sc_iobase + FE_DLCR7,
2484 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
2485
2486 /* Restart the DLC. */
2487 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
2488
2489 /* We have just updated the filter. */
2490 sc->filter_change = 0;
2491
2492 #if FE_DEBUG >= 3
2493 log(LOG_INFO, "%s: address filter changed\n", sc->sc_dev.dv_xname);
2494 #endif
2495 }
2496
2497 #if FE_DEBUG >= 1
2498 void
2499 fe_dump(level, sc)
2500 int level;
2501 struct fe_softc *sc;
2502 {
2503 int iobase = sc->sc_iobase;
2504 u_char save_dlcr7;
2505
2506 save_dlcr7 = inb(iobase + FE_DLCR7);
2507
2508 log(level, "\tDLCR = %02x %02x %02x %02x %02x %02x %02x %02x",
2509 inb(iobase + FE_DLCR0), inb(iobase + FE_DLCR1),
2510 inb(iobase + FE_DLCR2), inb(iobase + FE_DLCR3),
2511 inb(iobase + FE_DLCR4), inb(iobase + FE_DLCR5),
2512 inb(iobase + FE_DLCR6), inb(iobase + FE_DLCR7));
2513
2514 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_DLCR);
2515 log(level, "\t %02x %02x %02x %02x %02x %02x %02x %02x,",
2516 inb(iobase + FE_DLCR8), inb(iobase + FE_DLCR9),
2517 inb(iobase + FE_DLCR10), inb(iobase + FE_DLCR11),
2518 inb(iobase + FE_DLCR12), inb(iobase + FE_DLCR13),
2519 inb(iobase + FE_DLCR14), inb(iobase + FE_DLCR15));
2520
2521 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_MAR);
2522 log(level, "\tMAR = %02x %02x %02x %02x %02x %02x %02x %02x,",
2523 inb(iobase + FE_MAR8), inb(iobase + FE_MAR9),
2524 inb(iobase + FE_MAR10), inb(iobase + FE_MAR11),
2525 inb(iobase + FE_MAR12), inb(iobase + FE_MAR13),
2526 inb(iobase + FE_MAR14), inb(iobase + FE_MAR15));
2527
2528 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_BMPR);
2529 log(level, "\tBMPR = xx xx %02x %02x %02x %02x %02x %02x %02x %02x xx %02x.",
2530 inb(iobase + FE_BMPR10), inb(iobase + FE_BMPR11),
2531 inb(iobase + FE_BMPR12), inb(iobase + FE_BMPR13),
2532 inb(iobase + FE_BMPR14), inb(iobase + FE_BMPR15),
2533 inb(iobase + FE_BMPR16), inb(iobase + FE_BMPR17),
2534 inb(iobase + FE_BMPR19));
2535
2536 outb(iobase + FE_DLCR7, save_dlcr7);
2537 }
2538 #endif
2539