mb86960var.h revision 1.19 1 /* $NetBSD: mb86960var.h,v 1.19 1998/01/05 07:31:08 perry Exp $ */
2
3 /*
4 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
5 *
6 * This software may be used, modified, copied, distributed, and sold, in
7 * both source and binary form provided that the above copyright, these
8 * terms and the following disclaimer are retained. The name of the author
9 * and/or the contributor may not be used to endorse or promote products
10 * derived from this software without specific prior written permission.
11 *
12 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
13 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
14 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
15 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
16 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
17 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
18 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
19 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
20 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
21 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
22 * SUCH DAMAGE.
23 */
24
25 /*
26 * Portions copyright (C) 1993, David Greenman. This software may be used,
27 * modified, copied, distributed, and sold, in both source and binary form
28 * provided that the above copyright and these terms are retained. Under no
29 * circumstances is the author responsible for the proper functioning of this
30 * software, nor does the author assume any responsibility for damages
31 * incurred with its use.
32 */
33
34 #define FE_VERSION "if_fe.c ver. 0.8"
35
36 /*
37 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
38 * Contributed by M.S. <seki (at) sysrap.cs.fujitsu.co.jp>
39 *
40 * This version is intended to be a generic template for various
41 * MB86960A/MB86965A based Ethernet cards. It currently supports
42 * Fujitsu FMV-180 series (i.e., FMV-181 and FMV-182) and Allied-
43 * Telesis AT1700 series and RE2000 series. There are some
44 * unnecessary hooks embedded, which are primarily intended to support
45 * other types of Ethernet cards, but the author is not sure whether
46 * they are useful.
47 */
48
49 #include "bpfilter.h"
50 #include "rnd.h"
51
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/errno.h>
55 #include <sys/ioctl.h>
56 #include <sys/mbuf.h>
57 #include <sys/socket.h>
58 #include <sys/syslog.h>
59 #include <sys/device.h>
60 #if NRND > 0
61 #include <sys/rnd.h>
62 #endif
63
64 #include <net/if.h>
65 #include <net/if_dl.h>
66 #include <net/if_types.h>
67
68 #include <net/if_ether.h>
69
70 #ifdef INET
71 #include <netinet/in.h>
72 #include <netinet/in_systm.h>
73 #include <netinet/in_var.h>
74 #include <netinet/ip.h>
75 #include <netinet/if_inarp.h>
76 #endif
77
78 #ifdef NS
79 #include <netns/ns.h>
80 #include <netns/ns_if.h>
81 #endif
82
83 #if NBPFILTER > 0
84 #include <net/bpf.h>
85 #include <net/bpfdesc.h>
86 #endif
87
88 #include <machine/cpu.h>
89 #include <machine/intr.h>
90 #include <machine/pio.h>
91
92 #include <dev/isa/isareg.h>
93 #include <dev/isa/isavar.h>
94 #include <dev/ic/mb86960reg.h>
95 #include <dev/isa/if_fereg.h>
96
97 /*
98 * Default settings for fe driver specific options.
99 * They can be set in config file by "options" statements.
100 */
101
102 /*
103 * Debug control.
104 * 0: No debug at all. All debug specific codes are stripped off.
105 * 1: Silent. No debug messages are logged except emergent ones.
106 * 2: Brief. Lair events and/or important information are logged.
107 * 3: Detailed. Logs all information which *may* be useful for debugging.
108 * 4: Trace. All actions in the driver is logged. Super verbose.
109 */
110 #ifndef FE_DEBUG
111 #define FE_DEBUG 1
112 #endif
113
114 /*
115 * Delay padding of short transmission packets to minimum Ethernet size.
116 * This may or may not gain performance. An EXPERIMENTAL option.
117 */
118 #ifndef FE_DELAYED_PADDING
119 #define FE_DELAYED_PADDING 0
120 #endif
121
122 /*
123 * Transmit just one packet per a "send" command to 86960.
124 * This option is intended for performance test. An EXPERIMENTAL option.
125 */
126 #ifndef FE_SINGLE_TRANSMISSION
127 #define FE_SINGLE_TRANSMISSION 0
128 #endif
129
130 /*
131 * Device configuration flags.
132 */
133
134 /* DLCR6 settings. */
135 #define FE_FLAGS_DLCR6_VALUE 0x007F
136
137 /* Force DLCR6 override. */
138 #define FE_FLAGS_OVERRIDE_DLCR6 0x0080
139
140 /* A cludge for PCMCIA support. */
141 #define FE_FLAGS_PCMCIA 0x8000
142
143 /* Identification of the driver version. */
144 static char const fe_version[] = FE_VERSION " / " FE_REG_VERSION;
145
146 /*
147 * Supported hardware (Ethernet card) types
148 * This information is currently used only for debugging
149 */
150 enum fe_type {
151 /* For cards which are successfully probed but not identified. */
152 FE_TYPE_UNKNOWN,
153
154 /* Fujitsu FMV-180 series. */
155 FE_TYPE_FMV181,
156 FE_TYPE_FMV182,
157
158 /* Allied-Telesis AT1700 series and RE2000 series. */
159 FE_TYPE_AT1700T,
160 FE_TYPE_AT1700BT,
161 FE_TYPE_AT1700FT,
162 FE_TYPE_AT1700AT,
163 FE_TYPE_RE2000,
164
165 /* PCMCIA by Fujitsu. */
166 FE_TYPE_MBH10302,
167 FE_TYPE_MBH10304,
168 };
169
170 /*
171 * fe_softc: per line info and status
172 */
173 struct fe_softc {
174 struct device sc_dev;
175 void *sc_ih;
176
177 struct ethercom sc_ethercom; /* ethernet common */
178
179 /* Set by probe() and not modified in later phases. */
180 enum fe_type type; /* interface type code */
181 char *typestr; /* printable name of the interface. */
182 int sc_iobase; /* MB86960A I/O base address */
183
184 u_char proto_dlcr4; /* DLCR4 prototype. */
185 u_char proto_dlcr5; /* DLCR5 prototype. */
186 u_char proto_dlcr6; /* DLCR6 prototype. */
187 u_char proto_dlcr7; /* DLCR7 prototype. */
188 u_char proto_bmpr13; /* BMPR13 prototype. */
189
190 /* Vendor specific hooks. */
191 void (*init) __P((struct fe_softc *)); /* Just before fe_init(). */
192 void (*stop) __P((struct fe_softc *)); /* Just after fe_stop(). */
193
194 /* Transmission buffer management. */
195 u_short txb_size; /* total bytes in TX buffer */
196 u_short txb_free; /* free bytes in TX buffer */
197 u_char txb_count; /* number of packets in TX buffer */
198 u_char txb_sched; /* number of scheduled packets */
199 u_char txb_padding; /* number of delayed padding bytes */
200
201 /* Multicast address filter management. */
202 u_char filter_change; /* MARs must be changed ASAP. */
203 u_char filter[FE_FILTER_LEN]; /* new filter value. */
204
205 u_int8_t sc_enaddr[ETHER_ADDR_LEN];
206
207 #if NRND > 0
208 rndsource_element_t rnd_source;
209 #endif
210 };
211
212 /* Standard driver entry points. These can be static. */
213 int feprobe __P((struct device *, void *, void *));
214 void feattach __P((struct device *, struct device *, void *));
215 int feintr __P((void *));
216 void fe_init __P((struct fe_softc *));
217 int fe_ioctl __P((struct ifnet *, u_long, caddr_t));
218 void fe_start __P((struct ifnet *));
219 void fe_reset __P((struct fe_softc *));
220 void fe_watchdog __P((struct ifnet *));
221
222 /* Local functions. Order of declaration is confused. FIXME. */
223 int fe_probe_fmv __P((struct fe_softc *, struct isa_attach_args *));
224 int fe_probe_ati __P((struct fe_softc *, struct isa_attach_args *));
225 int fe_probe_mbh __P((struct fe_softc *, struct isa_attach_args *));
226 void fe_read_eeprom __P((struct fe_softc *, u_char *));
227 void fe_init_mbh __P((struct fe_softc *));
228 int fe_get_packet __P((struct fe_softc *, int));
229 void fe_stop __P((struct fe_softc *));
230 void fe_tint __P((struct fe_softc *, u_char));
231 void fe_rint __P((struct fe_softc *, u_char));
232 static inline
233 void fe_xmit __P((struct fe_softc *));
234 void fe_write_mbufs __P((struct fe_softc *, struct mbuf *));
235 static inline
236 void fe_droppacket __P((struct fe_softc *));
237 void fe_getmcaf __P((struct ethercom *, u_char *));
238 void fe_setmode __P((struct fe_softc *));
239 void fe_loadmar __P((struct fe_softc *));
240 #if FE_DEBUG >= 1
241 void fe_dump __P((int, struct fe_softc *));
242 #endif
243
244 struct cfattach fe_ca = {
245 sizeof(struct fe_softc), feprobe, feattach
246 };
247
248 struct cfdriver fe_cd = {
249 NULL, "fe", DV_IFNET
250 };
251
252 /* Ethernet constants. To be defined in if_ehter.h? FIXME. */
253 #define ETHER_MIN_LEN 60 /* with header, without CRC. */
254 #define ETHER_MAX_LEN 1514 /* with header, without CRC. */
255 #define ETHER_ADDR_LEN 6 /* number of bytes in an address. */
256 #define ETHER_HDR_SIZE 14 /* src addr, dst addr, and data type. */
257
258 /*
259 * Fe driver specific constants which relate to 86960/86965.
260 */
261
262 /* Interrupt masks. */
263 #define FE_TMASK (FE_D2_COLL16 | FE_D2_TXDONE)
264 #define FE_RMASK (FE_D3_OVRFLO | FE_D3_CRCERR | \
265 FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY)
266
267 /* Maximum number of iterrations for a receive interrupt. */
268 #define FE_MAX_RECV_COUNT ((65536 - 2048 * 2) / 64)
269 /* Maximum size of SRAM is 65536,
270 * minimum size of transmission buffer in fe is 2x2KB,
271 * and minimum amount of received packet including headers
272 * added by the chip is 64 bytes.
273 * Hence FE_MAX_RECV_COUNT is the upper limit for number
274 * of packets in the receive buffer. */
275
276 /*
277 * Convenient routines to access contiguous I/O ports.
278 */
279
280 static inline void
281 inblk (int addr, u_char * mem, int len)
282 {
283 while (--len >= 0) {
284 *mem++ = inb(addr++);
285 }
286 }
287
288 static inline void
289 outblk (int addr, u_char const * mem, int len)
290 {
291 while (--len >= 0) {
292 outb(addr++, *mem++);
293 }
294 }
295
296 /*
297 * Hardware probe routines.
298 */
299
300 /*
301 * Determine if the device is present.
302 */
303 int
304 feprobe(parent, match, aux)
305 struct device *parent;
306 void *match, *aux;
307 {
308 struct fe_softc *sc = match;
309 struct isa_attach_args *ia = aux;
310
311 #if FE_DEBUG >= 2
312 log(LOG_INFO, "%s: %s\n", sc->sc_dev.dv_xname, fe_version);
313 #endif
314
315 /* Probe an address. */
316 sc->sc_iobase = ia->ia_iobase;
317
318 if (fe_probe_fmv(sc, ia))
319 return (1);
320 if (fe_probe_ati(sc, ia))
321 return (1);
322 if (fe_probe_mbh(sc, ia))
323 return (1);
324 return (0);
325 }
326
327 /*
328 * Check for specific bits in specific registers have specific values.
329 */
330 struct fe_simple_probe_struct {
331 u_char port; /* Offset from the base I/O address. */
332 u_char mask; /* Bits to be checked. */
333 u_char bits; /* Values to be compared against. */
334 };
335
336 static inline int
337 fe_simple_probe (int addr, struct fe_simple_probe_struct const * sp)
338 {
339 struct fe_simple_probe_struct const * p;
340
341 for (p = sp; p->mask != 0; p++) {
342 if ((inb(addr + p->port) & p->mask) != p->bits) {
343 return (0);
344 }
345 }
346 return (1);
347 }
348
349 /*
350 * Routines to read all bytes from the config EEPROM through MB86965A.
351 * I'm not sure what exactly I'm doing here... I was told just to follow
352 * the steps, and it worked. Could someone tell me why the following
353 * code works? (Or, why all similar codes I tried previously doesn't
354 * work.) FIXME.
355 */
356
357 static inline void
358 strobe (int bmpr16)
359 {
360 /*
361 * Output same value twice. To speed-down execution?
362 */
363 outb(bmpr16, FE_B16_SELECT);
364 outb(bmpr16, FE_B16_SELECT);
365 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
366 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
367 outb(bmpr16, FE_B16_SELECT);
368 outb(bmpr16, FE_B16_SELECT);
369 }
370
371 void
372 fe_read_eeprom(sc, data)
373 struct fe_softc *sc;
374 u_char *data;
375 {
376 int iobase = sc->sc_iobase;
377 int bmpr16 = iobase + FE_BMPR16;
378 int bmpr17 = iobase + FE_BMPR17;
379 u_char n, val, bit;
380
381 /* Read bytes from EEPROM; two bytes per an iterration. */
382 for (n = 0; n < FE_EEPROM_SIZE / 2; n++) {
383 /* Reset the EEPROM interface. */
384 outb(bmpr16, 0x00);
385 outb(bmpr17, 0x00);
386 outb(bmpr16, FE_B16_SELECT);
387
388 /* Start EEPROM access. */
389 outb(bmpr17, FE_B17_DATA);
390 strobe(bmpr16);
391
392 /* Pass the iterration count to the chip. */
393 val = 0x80 | n;
394 for (bit = 0x80; bit != 0x00; bit >>= 1) {
395 outb(bmpr17, (val & bit) ? FE_B17_DATA : 0);
396 strobe(bmpr16);
397 }
398 outb(bmpr17, 0x00);
399
400 /* Read a byte. */
401 val = 0;
402 for (bit = 0x80; bit != 0x00; bit >>= 1) {
403 strobe(bmpr16);
404 if (inb(bmpr17) & FE_B17_DATA)
405 val |= bit;
406 }
407 *data++ = val;
408
409 /* Read one more byte. */
410 val = 0;
411 for (bit = 0x80; bit != 0x00; bit >>= 1) {
412 strobe(bmpr16);
413 if (inb(bmpr17) & FE_B17_DATA)
414 val |= bit;
415 }
416 *data++ = val;
417 }
418
419 #if FE_DEBUG >= 3
420 /* Report what we got. */
421 data -= FE_EEPROM_SIZE;
422 log(LOG_INFO, "%s: EEPROM at %04x:"
423 " %02x%02x%02x%02x %02x%02x%02x%02x -"
424 " %02x%02x%02x%02x %02x%02x%02x%02x -"
425 " %02x%02x%02x%02x %02x%02x%02x%02x -"
426 " %02x%02x%02x%02x %02x%02x%02x%02x\n",
427 sc->sc_dev.dv_xname, iobase,
428 data[ 0], data[ 1], data[ 2], data[ 3],
429 data[ 4], data[ 5], data[ 6], data[ 7],
430 data[ 8], data[ 9], data[10], data[11],
431 data[12], data[13], data[14], data[15],
432 data[16], data[17], data[18], data[19],
433 data[20], data[21], data[22], data[23],
434 data[24], data[25], data[26], data[27],
435 data[28], data[29], data[30], data[31]);
436 #endif
437 }
438
439 /*
440 * Hardware (vendor) specific probe routines.
441 */
442
443 /*
444 * Probe and initialization for Fujitsu FMV-180 series boards
445 */
446 int
447 fe_probe_fmv(sc, ia)
448 struct fe_softc *sc;
449 struct isa_attach_args *ia;
450 {
451 int i, n;
452 int iobase = sc->sc_iobase;
453 int irq;
454
455 static int const iomap[8] =
456 { 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x300, 0x340 };
457 static int const irqmap[4] =
458 { 3, 7, 10, 15 };
459
460 static struct fe_simple_probe_struct const probe_table[] = {
461 { FE_DLCR2, 0x70, 0x00 },
462 { FE_DLCR4, 0x08, 0x00 },
463 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */
464
465 { FE_FMV0, FE_FMV0_MAGIC_MASK, FE_FMV0_MAGIC_VALUE },
466 { FE_FMV1, FE_FMV1_CARDID_MASK, FE_FMV1_CARDID_ID },
467 { FE_FMV3, FE_FMV3_EXTRA_MASK, FE_FMV3_EXTRA_VALUE },
468 #if 1
469 /*
470 * Test *vendor* part of the station address for Fujitsu.
471 * The test will gain reliability of probe process, but
472 * it rejects FMV-180 clone boards manufactured by other vendors.
473 * We have to turn the test off when such cards are made available.
474 */
475 { FE_FMV4, 0xFF, 0x00 },
476 { FE_FMV5, 0xFF, 0x00 },
477 { FE_FMV6, 0xFF, 0x0E },
478 #else
479 /*
480 * We can always verify the *first* 2 bits (in Ehternet
481 * bit order) are "no multicast" and "no local" even for
482 * unknown vendors.
483 */
484 { FE_FMV4, 0x03, 0x00 },
485 #endif
486 { 0 }
487 };
488
489 #if 0
490 /*
491 * Dont probe at all if the config says we are PCMCIA...
492 */
493 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0)
494 return (0);
495 #endif
496
497 /*
498 * See if the sepcified address is possible for FMV-180 series.
499 */
500 for (i = 0; i < 8; i++) {
501 if (iomap[i] == iobase)
502 break;
503 }
504 if (i == 8)
505 return (0);
506
507 /* Simple probe. */
508 if (!fe_simple_probe(iobase, probe_table))
509 return (0);
510
511 /* Check if our I/O address matches config info on EEPROM. */
512 n = (inb(iobase + FE_FMV2) & FE_FMV2_ADDR) >> FE_FMV2_ADDR_SHIFT;
513 if (iomap[n] != iobase)
514 return (0);
515
516 /* Determine the card type. */
517 switch (inb(iobase + FE_FMV0) & FE_FMV0_MODEL) {
518 case FE_FMV0_MODEL_FMV181:
519 sc->type = FE_TYPE_FMV181;
520 sc->typestr = "FMV-181";
521 break;
522 case FE_FMV0_MODEL_FMV182:
523 sc->type = FE_TYPE_FMV182;
524 sc->typestr = "FMV-182";
525 break;
526 default:
527 /* Unknown card type: maybe a new model, but... */
528 return (0);
529 }
530
531 /*
532 * An FMV-180 has successfully been proved.
533 * Determine which IRQ to be used.
534 *
535 * In this version, we always get an IRQ assignment from the
536 * FMV-180's configuration EEPROM, ignoring that specified in
537 * config file.
538 */
539 n = (inb(iobase + FE_FMV2) & FE_FMV2_IRQ) >> FE_FMV2_IRQ_SHIFT;
540 irq = irqmap[n];
541
542 if (ia->ia_irq != IRQUNK) {
543 if (ia->ia_irq != irq) {
544 printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
545 sc->sc_dev.dv_xname, ia->ia_irq, irq);
546 return (0);
547 }
548 } else
549 ia->ia_irq = irq;
550
551 /*
552 * Initialize constants in the per-line structure.
553 */
554
555 /* Get our station address from EEPROM. */
556 inblk(iobase + FE_FMV4, sc->sc_enaddr, ETHER_ADDR_LEN);
557
558 /* Make sure we got a valid station address. */
559 if ((sc->sc_enaddr[0] & 0x03) != 0x00
560 || (sc->sc_enaddr[0] == 0x00
561 && sc->sc_enaddr[1] == 0x00
562 && sc->sc_enaddr[2] == 0x00))
563 return (0);
564
565 /* Register values which depend on board design. */
566 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
567 sc->proto_dlcr5 = 0;
568 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC;
569 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
570
571 /*
572 * Program the 86960 as follows:
573 * SRAM: 32KB, 100ns, byte-wide access.
574 * Transmission buffer: 4KB x 2.
575 * System bus interface: 16 bits.
576 * We cannot change these values but TXBSIZE, because they
577 * are hard-wired on the board. Modifying TXBSIZE will affect
578 * the driver performance.
579 */
580 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
581 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
582
583 /*
584 * Minimum initialization of the hardware.
585 * We write into registers; hope I/O ports have no
586 * overlap with other boards.
587 */
588
589 /* Initialize ASIC. */
590 outb(iobase + FE_FMV3, 0);
591 outb(iobase + FE_FMV10, 0);
592
593 /* Wait for a while. I'm not sure this is necessary. FIXME. */
594 delay(200);
595
596 /* Initialize 86960. */
597 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
598 delay(200);
599
600 /* Disable all interrupts. */
601 outb(iobase + FE_DLCR2, 0);
602 outb(iobase + FE_DLCR3, 0);
603
604 /* Turn the "master interrupt control" flag of ASIC on. */
605 outb(iobase + FE_FMV3, FE_FMV3_ENABLE_FLAG);
606
607 /*
608 * That's all. FMV-180 occupies 32 I/O addresses, by the way.
609 */
610 ia->ia_iosize = 32;
611 ia->ia_msize = 0;
612 return (1);
613 }
614
615 /*
616 * Probe and initialization for Allied-Telesis AT1700/RE2000 series.
617 */
618 int
619 fe_probe_ati(sc, ia)
620 struct fe_softc *sc;
621 struct isa_attach_args *ia;
622 {
623 int i, n;
624 int iobase = sc->sc_iobase;
625 u_char eeprom[FE_EEPROM_SIZE];
626 u_char save16, save17;
627 int irq;
628
629 static int const iomap[8] =
630 { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300 };
631 static int const irqmap[4][4] = {
632 { 3, 4, 5, 9 },
633 { 10, 11, 12, 15 },
634 { 3, 11, 5, 15 },
635 { 10, 11, 14, 15 },
636 };
637 static struct fe_simple_probe_struct const probe_table[] = {
638 { FE_DLCR2, 0x70, 0x00 },
639 { FE_DLCR4, 0x08, 0x00 },
640 { FE_DLCR5, 0x80, 0x00 },
641 #if 0
642 { FE_BMPR16, 0x1B, 0x00 },
643 { FE_BMPR17, 0x7F, 0x00 },
644 #endif
645 { 0 }
646 };
647
648 #if 0
649 /*
650 * Don't probe at all if the config says we are PCMCIA...
651 */
652 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0)
653 return (0);
654 #endif
655
656 #if FE_DEBUG >= 4
657 log(LOG_INFO, "%s: probe (0x%x) for ATI\n", sc->sc_dev.dv_xname, iobase);
658 fe_dump(LOG_INFO, sc);
659 #endif
660
661 /*
662 * See if the sepcified address is possible for MB86965A JLI mode.
663 */
664 for (i = 0; i < 8; i++) {
665 if (iomap[i] == iobase)
666 break;
667 }
668 if (i == 8)
669 return (0);
670
671 /*
672 * We should test if MB86965A is on the base address now.
673 * Unfortunately, it is very hard to probe it reliably, since
674 * we have no way to reset the chip under software control.
675 * On cold boot, we could check the "signature" bit patterns
676 * described in the Fujitsu document. On warm boot, however,
677 * we can predict almost nothing about register values.
678 */
679 if (!fe_simple_probe(iobase, probe_table))
680 return (0);
681
682 /* Save old values of the registers. */
683 save16 = inb(iobase + FE_BMPR16);
684 save17 = inb(iobase + FE_BMPR17);
685
686 /* Check if our I/O address matches config info on 86965. */
687 n = (inb(iobase + FE_BMPR19) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT;
688 if (iomap[n] != iobase)
689 goto fail;
690
691 /*
692 * We are now almost sure we have an AT1700 at the given
693 * address. So, read EEPROM through 86965. We have to write
694 * into LSI registers to read from EEPROM. I want to avoid it
695 * at this stage, but I cannot test the presense of the chip
696 * any further without reading EEPROM. FIXME.
697 */
698 fe_read_eeprom(sc, eeprom);
699
700 /* Make sure the EEPROM is turned off. */
701 outb(iobase + FE_BMPR16, 0);
702 outb(iobase + FE_BMPR17, 0);
703
704 /* Make sure that config info in EEPROM and 86965 agree. */
705 if (eeprom[FE_EEPROM_CONF] != inb(iobase + FE_BMPR19))
706 goto fail;
707
708 /*
709 * Determine the card type.
710 */
711 switch (eeprom[FE_ATI_EEP_MODEL]) {
712 case FE_ATI_MODEL_AT1700T:
713 sc->type = FE_TYPE_AT1700T;
714 sc->typestr = "AT-1700T";
715 break;
716 case FE_ATI_MODEL_AT1700BT:
717 sc->type = FE_TYPE_AT1700BT;
718 sc->typestr = "AT-1700BT";
719 break;
720 case FE_ATI_MODEL_AT1700FT:
721 sc->type = FE_TYPE_AT1700FT;
722 sc->typestr = "AT-1700FT";
723 break;
724 case FE_ATI_MODEL_AT1700AT:
725 sc->type = FE_TYPE_AT1700AT;
726 sc->typestr = "AT-1700AT";
727 break;
728 default:
729 sc->type = FE_TYPE_RE2000;
730 sc->typestr = "unknown (RE-2000?)";
731 break;
732 }
733
734 /*
735 * Try to determine IRQ settings.
736 * Different models use different ranges of IRQs.
737 */
738 n = (inb(iobase + FE_BMPR19) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT;
739 switch (eeprom[FE_ATI_EEP_REVISION] & 0xf0) {
740 case 0x30:
741 irq = irqmap[3][n];
742 break;
743 case 0x10:
744 case 0x50:
745 irq = irqmap[2][n];
746 break;
747 case 0x40:
748 case 0x60:
749 if (eeprom[FE_ATI_EEP_MAGIC] & 0x04) {
750 irq = irqmap[1][n];
751 break;
752 }
753 default:
754 irq = irqmap[0][n];
755 break;
756 }
757
758 if (ia->ia_irq != IRQUNK) {
759 if (ia->ia_irq != irq) {
760 printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
761 sc->sc_dev.dv_xname, ia->ia_irq, irq);
762 return (0);
763 }
764 } else
765 ia->ia_irq = irq;
766
767 /*
768 * Initialize constants in the per-line structure.
769 */
770
771 /* Get our station address from EEPROM. */
772 bcopy(eeprom + FE_ATI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN);
773
774 /* Make sure we got a valid station address. */
775 if ((sc->sc_enaddr[0] & 0x03) != 0x00
776 || (sc->sc_enaddr[0] == 0x00
777 && sc->sc_enaddr[1] == 0x00
778 && sc->sc_enaddr[2] == 0x00))
779 goto fail;
780
781 /* Should find all register prototypes here. FIXME. */
782 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; /* FIXME */
783 sc->proto_dlcr5 = 0;
784 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC;
785 #if 0 /* XXXX Should we use this? */
786 sc->proto_bmpr13 = eeprom[FE_ATI_EEP_MEDIA];
787 #else
788 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
789 #endif
790
791 /*
792 * Program the 86965 as follows:
793 * SRAM: 32KB, 100ns, byte-wide access.
794 * Transmission buffer: 4KB x 2.
795 * System bus interface: 16 bits.
796 * We cannot change these values but TXBSIZE, because they
797 * are hard-wired on the board. Modifying TXBSIZE will affect
798 * the driver performance.
799 */
800 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
801 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
802
803 #if FE_DEBUG >= 3
804 log(LOG_INFO, "%s: ATI found\n", sc->sc_dev.dv_xname);
805 fe_dump(LOG_INFO, sc);
806 #endif
807
808 /* Initialize 86965. */
809 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
810 delay(200);
811
812 /* Disable all interrupts. */
813 outb(iobase + FE_DLCR2, 0);
814 outb(iobase + FE_DLCR3, 0);
815
816 #if FE_DEBUG >= 3
817 log(LOG_INFO, "%s: end of fe_probe_ati()\n", sc->sc_dev.dv_xname);
818 fe_dump(LOG_INFO, sc);
819 #endif
820
821 /*
822 * That's all. AT1700 occupies 32 I/O addresses, by the way.
823 */
824 ia->ia_iosize = 32;
825 ia->ia_msize = 0;
826 return (1);
827
828 fail:
829 /* Restore register values, in the case we had no 86965. */
830 outb(iobase + FE_BMPR16, save16);
831 outb(iobase + FE_BMPR17, save17);
832 return (0);
833 }
834
835 /*
836 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface.
837 */
838 int
839 fe_probe_mbh(sc, ia)
840 struct fe_softc *sc;
841 struct isa_attach_args *ia;
842 {
843 int iobase = sc->sc_iobase;
844
845 static struct fe_simple_probe_struct probe_table[] = {
846 { FE_DLCR2, 0x70, 0x00 },
847 { FE_DLCR4, 0x08, 0x00 },
848 /* { FE_DLCR5, 0x80, 0x00 }, Does not work well. */
849 #if 0
850 /*
851 * Test *vendor* part of the address for Fujitsu.
852 * The test will gain reliability of probe process, but
853 * it rejects clones by other vendors, or OEM product
854 * supplied by resalers other than Fujitsu.
855 */
856 { FE_MBH10, 0xFF, 0x00 },
857 { FE_MBH11, 0xFF, 0x00 },
858 { FE_MBH12, 0xFF, 0x0E },
859 #else
860 /*
861 * We can always verify the *first* 2 bits (in Ehternet
862 * bit order) are "global" and "unicast" even for
863 * unknown vendors.
864 */
865 { FE_MBH10, 0x03, 0x00 },
866 #endif
867 /* Just a gap? Seems reliable, anyway. */
868 { 0x12, 0xFF, 0x00 },
869 { 0x13, 0xFF, 0x00 },
870 { 0x14, 0xFF, 0x00 },
871 { 0x15, 0xFF, 0x00 },
872 { 0x16, 0xFF, 0x00 },
873 { 0x17, 0xFF, 0x00 },
874 { 0x18, 0xFF, 0xFF },
875 { 0x19, 0xFF, 0xFF },
876
877 { 0 }
878 };
879
880 #if 0
881 /*
882 * We need a PCMCIA flag.
883 */
884 if ((cf->cf_flags & FE_FLAGS_PCMCIA) == 0)
885 return (0);
886 #endif
887
888 /*
889 * We need explicit IRQ and supported address.
890 */
891 if (ia->ia_irq == IRQUNK || (iobase & ~0x3E0) != 0)
892 return (0);
893
894 #if FE_DEBUG >= 3
895 log(LOG_INFO, "%s: top of fe_probe_mbh()\n", sc->sc_dev.dv_xname);
896 fe_dump(LOG_INFO, sc);
897 #endif
898
899 /*
900 * See if MBH10302 is on its address.
901 * I'm not sure the following probe code works. FIXME.
902 */
903 if (!fe_simple_probe(iobase, probe_table))
904 return (0);
905
906 /* Determine the card type. */
907 sc->type = FE_TYPE_MBH10302;
908 sc->typestr = "MBH10302 (PCMCIA)";
909
910 /*
911 * Initialize constants in the per-line structure.
912 */
913
914 /* Get our station address from EEPROM. */
915 inblk(iobase + FE_MBH10, sc->sc_enaddr, ETHER_ADDR_LEN);
916
917 /* Make sure we got a valid station address. */
918 if ((sc->sc_enaddr[0] & 0x03) != 0x00
919 || (sc->sc_enaddr[0] == 0x00
920 && sc->sc_enaddr[1] == 0x00
921 && sc->sc_enaddr[2] == 0x00))
922 return (0);
923
924 /* Should find all register prototypes here. FIXME. */
925 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
926 sc->proto_dlcr5 = 0;
927 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
928 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
929
930 /*
931 * Program the 86960 as follows:
932 * SRAM: 32KB, 100ns, byte-wide access.
933 * Transmission buffer: 4KB x 2.
934 * System bus interface: 16 bits.
935 * We cannot change these values but TXBSIZE, because they
936 * are hard-wired on the board. Modifying TXBSIZE will affect
937 * the driver performance.
938 */
939 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
940 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
941
942 /* Setup hooks. We need a special initialization procedure. */
943 sc->init = fe_init_mbh;
944
945 /*
946 * Minimum initialization.
947 */
948
949 /* Wait for a while. I'm not sure this is necessary. FIXME. */
950 delay(200);
951
952 /* Minimul initialization of 86960. */
953 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
954 delay(200);
955
956 /* Disable all interrupts. */
957 outb(iobase + FE_DLCR2, 0);
958 outb(iobase + FE_DLCR3, 0);
959
960 #if 1 /* FIXME. */
961 /* Initialize system bus interface and encoder/decoder operation. */
962 outb(iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_DISABLE);
963 #endif
964
965 /*
966 * That's all. MBH10302 occupies 32 I/O addresses, by the way.
967 */
968 ia->ia_iosize = 32;
969 ia->ia_msize = 0;
970 return (1);
971 }
972
973 /* MBH specific initialization routine. */
974 void
975 fe_init_mbh(sc)
976 struct fe_softc *sc;
977 {
978
979 /* Probably required after hot-insertion... */
980
981 /* Wait for a while. I'm not sure this is necessary. FIXME. */
982 delay(200);
983
984 /* Minimul initialization of 86960. */
985 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
986 delay(200);
987
988 /* Disable all interrupts. */
989 outb(sc->sc_iobase + FE_DLCR2, 0);
990 outb(sc->sc_iobase + FE_DLCR3, 0);
991
992 /* Enable master interrupt flag. */
993 outb(sc->sc_iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE);
994 }
995
996 /*
997 * Install interface into kernel networking data structures
998 */
999 void
1000 feattach(parent, self, aux)
1001 struct device *parent, *self;
1002 void *aux;
1003 {
1004 struct fe_softc *sc = (void *)self;
1005 struct isa_attach_args *ia = aux;
1006 struct cfdata *cf = sc->sc_dev.dv_cfdata;
1007 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1008
1009 /* Stop the 86960. */
1010 fe_stop(sc);
1011
1012 /* Initialize ifnet structure. */
1013 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
1014 ifp->if_softc = sc;
1015 ifp->if_start = fe_start;
1016 ifp->if_ioctl = fe_ioctl;
1017 ifp->if_watchdog = fe_watchdog;
1018 ifp->if_flags =
1019 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
1020
1021 /*
1022 * Set maximum size of output queue, if it has not been set.
1023 * It is done here as this driver may be started after the
1024 * system intialization (i.e., the interface is PCMCIA.)
1025 *
1026 * I'm not sure this is really necessary, but, even if it is,
1027 * it should be done somewhere else, e.g., in if_attach(),
1028 * since it must be a common workaround for all network drivers.
1029 * FIXME.
1030 */
1031 if (ifp->if_snd.ifq_maxlen == 0) {
1032 extern int ifqmaxlen; /* Don't be so shocked... */
1033 ifp->if_snd.ifq_maxlen = ifqmaxlen;
1034 }
1035
1036 #if FE_DEBUG >= 3
1037 log(LOG_INFO, "%s: feattach()\n", sc->sc_dev.dv_xname);
1038 fe_dump(LOG_INFO, sc);
1039 #endif
1040
1041 #if FE_SINGLE_TRANSMISSION
1042 /* Override txb config to allocate minimum. */
1043 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
1044 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
1045 #endif
1046
1047 /* Modify hardware config if it is requested. */
1048 if ((cf->cf_flags & FE_FLAGS_OVERRIDE_DLCR6) != 0)
1049 sc->proto_dlcr6 = cf->cf_flags & FE_FLAGS_DLCR6_VALUE;
1050
1051 /* Find TX buffer size, based on the hardware dependent proto. */
1052 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
1053 case FE_D6_TXBSIZ_2x2KB:
1054 sc->txb_size = 2048;
1055 break;
1056 case FE_D6_TXBSIZ_2x4KB:
1057 sc->txb_size = 4096;
1058 break;
1059 case FE_D6_TXBSIZ_2x8KB:
1060 sc->txb_size = 8192;
1061 break;
1062 default:
1063 /* Oops, we can't work with single buffer configuration. */
1064 #if FE_DEBUG >= 2
1065 log(LOG_WARNING, "%s: strange TXBSIZ config; fixing\n",
1066 sc->sc_dev.dv_xname);
1067 #endif
1068 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
1069 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
1070 sc->txb_size = 2048;
1071 break;
1072 }
1073
1074 /* Attach the interface. */
1075 if_attach(ifp);
1076 ether_ifattach(ifp, sc->sc_enaddr);
1077
1078 /* Print additional info when attached. */
1079 printf(": address %s, type %s\n",
1080 ether_sprintf(sc->sc_enaddr), sc->typestr);
1081 #if FE_DEBUG >= 3
1082 {
1083 int buf, txb, bbw, sbw, ram;
1084
1085 buf = txb = bbw = sbw = ram = -1;
1086 switch (sc->proto_dlcr6 & FE_D6_BUFSIZ) {
1087 case FE_D6_BUFSIZ_8KB:
1088 buf = 8;
1089 break;
1090 case FE_D6_BUFSIZ_16KB:
1091 buf = 16;
1092 break;
1093 case FE_D6_BUFSIZ_32KB:
1094 buf = 32;
1095 break;
1096 case FE_D6_BUFSIZ_64KB:
1097 buf = 64;
1098 break;
1099 }
1100 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
1101 case FE_D6_TXBSIZ_2x2KB:
1102 txb = 2;
1103 break;
1104 case FE_D6_TXBSIZ_2x4KB:
1105 txb = 4;
1106 break;
1107 case FE_D6_TXBSIZ_2x8KB:
1108 txb = 8;
1109 break;
1110 }
1111 switch (sc->proto_dlcr6 & FE_D6_BBW) {
1112 case FE_D6_BBW_BYTE:
1113 bbw = 8;
1114 break;
1115 case FE_D6_BBW_WORD:
1116 bbw = 16;
1117 break;
1118 }
1119 switch (sc->proto_dlcr6 & FE_D6_SBW) {
1120 case FE_D6_SBW_BYTE:
1121 sbw = 8;
1122 break;
1123 case FE_D6_SBW_WORD:
1124 sbw = 16;
1125 break;
1126 }
1127 switch (sc->proto_dlcr6 & FE_D6_SRAM) {
1128 case FE_D6_SRAM_100ns:
1129 ram = 100;
1130 break;
1131 case FE_D6_SRAM_150ns:
1132 ram = 150;
1133 break;
1134 }
1135 printf("%s: SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
1136 sc->sc_dev.dv_xname, buf, bbw, ram, txb, sbw);
1137 }
1138 #endif
1139
1140 #if NBPFILTER > 0
1141 /* If BPF is in the kernel, call the attach for it. */
1142 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
1143 #endif
1144
1145 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
1146 IPL_NET, feintr, sc);
1147
1148 #if NRND > 0
1149 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
1150 RND_TYPE_NET);
1151 #endif
1152 }
1153
1154 /*
1155 * Reset interface.
1156 */
1157 void
1158 fe_reset(sc)
1159 struct fe_softc *sc;
1160 {
1161 int s;
1162
1163 s = splnet();
1164 fe_stop(sc);
1165 fe_init(sc);
1166 splx(s);
1167 }
1168
1169 /*
1170 * Stop everything on the interface.
1171 *
1172 * All buffered packets, both transmitting and receiving,
1173 * if any, will be lost by stopping the interface.
1174 */
1175 void
1176 fe_stop(sc)
1177 struct fe_softc *sc;
1178 {
1179
1180 #if FE_DEBUG >= 3
1181 log(LOG_INFO, "%s: top of fe_stop()\n", sc->sc_dev.dv_xname);
1182 fe_dump(LOG_INFO, sc);
1183 #endif
1184
1185 /* Disable interrupts. */
1186 outb(sc->sc_iobase + FE_DLCR2, 0x00);
1187 outb(sc->sc_iobase + FE_DLCR3, 0x00);
1188
1189 /* Stop interface hardware. */
1190 delay(200);
1191 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1192 delay(200);
1193
1194 /* Clear all interrupt status. */
1195 outb(sc->sc_iobase + FE_DLCR0, 0xFF);
1196 outb(sc->sc_iobase + FE_DLCR1, 0xFF);
1197
1198 /* Put the chip in stand-by mode. */
1199 delay(200);
1200 outb(sc->sc_iobase + FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN);
1201 delay(200);
1202
1203 /* MAR loading can be delayed. */
1204 sc->filter_change = 0;
1205
1206 /* Call a hook. */
1207 if (sc->stop)
1208 sc->stop(sc);
1209
1210 #if DEBUG >= 3
1211 log(LOG_INFO, "%s: end of fe_stop()\n", sc->sc_dev.dv_xname);
1212 fe_dump(LOG_INFO, sc);
1213 #endif
1214 }
1215
1216 /*
1217 * Device timeout/watchdog routine. Entered if the device neglects to
1218 * generate an interrupt after a transmit has been started on it.
1219 */
1220 void
1221 fe_watchdog(ifp)
1222 struct ifnet *ifp;
1223 {
1224 struct fe_softc *sc = ifp->if_softc;
1225
1226 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1227 #if FE_DEBUG >= 3
1228 fe_dump(LOG_INFO, sc);
1229 #endif
1230
1231 /* Record how many packets are lost by this accident. */
1232 sc->sc_ethercom.ec_if.if_oerrors += sc->txb_sched + sc->txb_count;
1233
1234 fe_reset(sc);
1235 }
1236
1237 /*
1238 * Drop (skip) a packet from receive buffer in 86960 memory.
1239 */
1240 static inline void
1241 fe_droppacket(sc)
1242 struct fe_softc *sc;
1243 {
1244
1245 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER | FE_B14_SKIP);
1246 }
1247
1248 /*
1249 * Initialize device.
1250 */
1251 void
1252 fe_init(sc)
1253 struct fe_softc *sc;
1254 {
1255 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1256 int i;
1257
1258 #if FE_DEBUG >= 3
1259 log(LOG_INFO, "%s: top of fe_init()\n", sc->sc_dev.dv_xname);
1260 fe_dump(LOG_INFO, sc);
1261 #endif
1262
1263 /* Reset transmitter flags. */
1264 ifp->if_flags &= ~IFF_OACTIVE;
1265 ifp->if_timer = 0;
1266
1267 sc->txb_free = sc->txb_size;
1268 sc->txb_count = 0;
1269 sc->txb_sched = 0;
1270
1271 /* Call a hook. */
1272 if (sc->init)
1273 sc->init(sc);
1274
1275 #if FE_DEBUG >= 3
1276 log(LOG_INFO, "%s: after init hook\n", sc->sc_dev.dv_xname);
1277 fe_dump(LOG_INFO, sc);
1278 #endif
1279
1280 /*
1281 * Make sure to disable the chip, also.
1282 * This may also help re-programming the chip after
1283 * hot insertion of PCMCIAs.
1284 */
1285 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1286
1287 /* Power up the chip and select register bank for DLCRs. */
1288 delay(200);
1289 outb(sc->sc_iobase + FE_DLCR7,
1290 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
1291 delay(200);
1292
1293 /* Feed the station address. */
1294 outblk(sc->sc_iobase + FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN);
1295
1296 /* Select the BMPR bank for runtime register access. */
1297 outb(sc->sc_iobase + FE_DLCR7,
1298 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1299
1300 /* Initialize registers. */
1301 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */
1302 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */
1303 outb(sc->sc_iobase + FE_DLCR2, 0x00);
1304 outb(sc->sc_iobase + FE_DLCR3, 0x00);
1305 outb(sc->sc_iobase + FE_DLCR4, sc->proto_dlcr4);
1306 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5);
1307 outb(sc->sc_iobase + FE_BMPR10, 0x00);
1308 outb(sc->sc_iobase + FE_BMPR11, FE_B11_CTRL_SKIP);
1309 outb(sc->sc_iobase + FE_BMPR12, 0x00);
1310 outb(sc->sc_iobase + FE_BMPR13, sc->proto_bmpr13);
1311 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER);
1312 outb(sc->sc_iobase + FE_BMPR15, 0x00);
1313
1314 #if FE_DEBUG >= 3
1315 log(LOG_INFO, "%s: just before enabling DLC\n", sc->sc_dev.dv_xname);
1316 fe_dump(LOG_INFO, sc);
1317 #endif
1318
1319 /* Enable interrupts. */
1320 outb(sc->sc_iobase + FE_DLCR2, FE_TMASK);
1321 outb(sc->sc_iobase + FE_DLCR3, FE_RMASK);
1322
1323 /* Enable transmitter and receiver. */
1324 delay(200);
1325 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
1326 delay(200);
1327
1328 #if FE_DEBUG >= 3
1329 log(LOG_INFO, "%s: just after enabling DLC\n", sc->sc_dev.dv_xname);
1330 fe_dump(LOG_INFO, sc);
1331 #endif
1332
1333 /*
1334 * Make sure to empty the receive buffer.
1335 *
1336 * This may be redundant, but *if* the receive buffer were full
1337 * at this point, the driver would hang. I have experienced
1338 * some strange hangups just after UP. I hope the following
1339 * code solve the problem.
1340 *
1341 * I have changed the order of hardware initialization.
1342 * I think the receive buffer cannot have any packets at this
1343 * point in this version. The following code *must* be
1344 * redundant now. FIXME.
1345 */
1346 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
1347 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP)
1348 break;
1349 fe_droppacket(sc);
1350 }
1351 #if FE_DEBUG >= 1
1352 if (i >= FE_MAX_RECV_COUNT) {
1353 log(LOG_ERR, "%s: cannot empty receive buffer\n",
1354 sc->sc_dev.dv_xname);
1355 }
1356 #endif
1357 #if FE_DEBUG >= 3
1358 if (i < FE_MAX_RECV_COUNT) {
1359 log(LOG_INFO, "%s: receive buffer emptied (%d)\n",
1360 sc->sc_dev.dv_xname, i);
1361 }
1362 #endif
1363
1364 #if FE_DEBUG >= 3
1365 log(LOG_INFO, "%s: after ERB loop\n", sc->sc_dev.dv_xname);
1366 fe_dump(LOG_INFO, sc);
1367 #endif
1368
1369 /* Do we need this here? */
1370 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */
1371 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */
1372
1373 #if FE_DEBUG >= 3
1374 log(LOG_INFO, "%s: after FIXME\n", sc->sc_dev.dv_xname);
1375 fe_dump(LOG_INFO, sc);
1376 #endif
1377
1378 /* Set 'running' flag. */
1379 ifp->if_flags |= IFF_RUNNING;
1380
1381 /*
1382 * At this point, the interface is runnung properly,
1383 * except that it receives *no* packets. we then call
1384 * fe_setmode() to tell the chip what packets to be
1385 * received, based on the if_flags and multicast group
1386 * list. It completes the initialization process.
1387 */
1388 fe_setmode(sc);
1389
1390 #if FE_DEBUG >= 3
1391 log(LOG_INFO, "%s: after setmode\n", sc->sc_dev.dv_xname);
1392 fe_dump(LOG_INFO, sc);
1393 #endif
1394
1395 /* ...and attempt to start output. */
1396 fe_start(ifp);
1397
1398 #if FE_DEBUG >= 3
1399 log(LOG_INFO, "%s: end of fe_init()\n", sc->sc_dev.dv_xname);
1400 fe_dump(LOG_INFO, sc);
1401 #endif
1402 }
1403
1404 /*
1405 * This routine actually starts the transmission on the interface
1406 */
1407 static inline void
1408 fe_xmit(sc)
1409 struct fe_softc *sc;
1410 {
1411
1412 /*
1413 * Set a timer just in case we never hear from the board again.
1414 * We use longer timeout for multiple packet transmission.
1415 * I'm not sure this timer value is appropriate. FIXME.
1416 */
1417 sc->sc_ethercom.ec_if.if_timer = 1 + sc->txb_count;
1418
1419 /* Update txb variables. */
1420 sc->txb_sched = sc->txb_count;
1421 sc->txb_count = 0;
1422 sc->txb_free = sc->txb_size;
1423
1424 #if FE_DELAYED_PADDING
1425 /* Omit the postponed padding process. */
1426 sc->txb_padding = 0;
1427 #endif
1428
1429 /* Start transmitter, passing packets in TX buffer. */
1430 outb(sc->sc_iobase + FE_BMPR10, sc->txb_sched | FE_B10_START);
1431 }
1432
1433 /*
1434 * Start output on interface.
1435 * We make two assumptions here:
1436 * 1) that the current priority is set to splnet _before_ this code
1437 * is called *and* is returned to the appropriate priority after
1438 * return
1439 * 2) that the IFF_OACTIVE flag is checked before this code is called
1440 * (i.e. that the output part of the interface is idle)
1441 */
1442 void
1443 fe_start(ifp)
1444 struct ifnet *ifp;
1445 {
1446 struct fe_softc *sc = ifp->if_softc;
1447 struct mbuf *m;
1448
1449 #if FE_DEBUG >= 1
1450 /* Just a sanity check. */
1451 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
1452 /*
1453 * Txb_count and txb_free co-works to manage the
1454 * transmission buffer. Txb_count keeps track of the
1455 * used potion of the buffer, while txb_free does unused
1456 * potion. So, as long as the driver runs properly,
1457 * txb_count is zero if and only if txb_free is same
1458 * as txb_size (which represents whole buffer.)
1459 */
1460 log(LOG_ERR, "%s: inconsistent txb variables (%d, %d)\n",
1461 sc->sc_dev.dv_xname, sc->txb_count, sc->txb_free);
1462 /*
1463 * So, what should I do, then?
1464 *
1465 * We now know txb_count and txb_free contradicts. We
1466 * cannot, however, tell which is wrong. More
1467 * over, we cannot peek 86960 transmission buffer or
1468 * reset the transmission buffer. (In fact, we can
1469 * reset the entire interface. I don't want to do it.)
1470 *
1471 * If txb_count is incorrect, leaving it as is will cause
1472 * sending of gabages after next interrupt. We have to
1473 * avoid it. Hence, we reset the txb_count here. If
1474 * txb_free was incorrect, resetting txb_count just loose
1475 * some packets. We can live with it.
1476 */
1477 sc->txb_count = 0;
1478 }
1479 #endif
1480
1481 #if FE_DEBUG >= 1
1482 /*
1483 * First, see if there are buffered packets and an idle
1484 * transmitter - should never happen at this point.
1485 */
1486 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
1487 log(LOG_ERR, "%s: transmitter idle with %d buffered packets\n",
1488 sc->sc_dev.dv_xname, sc->txb_count);
1489 fe_xmit(sc);
1490 }
1491 #endif
1492
1493 /*
1494 * Stop accepting more transmission packets temporarily, when
1495 * a filter change request is delayed. Updating the MARs on
1496 * 86960 flushes the transmisstion buffer, so it is delayed
1497 * until all buffered transmission packets have been sent
1498 * out.
1499 */
1500 if (sc->filter_change) {
1501 /*
1502 * Filter change requst is delayed only when the DLC is
1503 * working. DLC soon raise an interrupt after finishing
1504 * the work.
1505 */
1506 goto indicate_active;
1507 }
1508
1509 for (;;) {
1510 /*
1511 * See if there is room to put another packet in the buffer.
1512 * We *could* do better job by peeking the send queue to
1513 * know the length of the next packet. Current version just
1514 * tests against the worst case (i.e., longest packet). FIXME.
1515 *
1516 * When adding the packet-peek feature, don't forget adding a
1517 * test on txb_count against QUEUEING_MAX.
1518 * There is a little chance the packet count exceeds
1519 * the limit. Assume transmission buffer is 8KB (2x8KB
1520 * configuration) and an application sends a bunch of small
1521 * (i.e., minimum packet sized) packets rapidly. An 8KB
1522 * buffer can hold 130 blocks of 62 bytes long...
1523 */
1524 if (sc->txb_free < ETHER_MAX_LEN + FE_DATA_LEN_LEN) {
1525 /* No room. */
1526 goto indicate_active;
1527 }
1528
1529 #if FE_SINGLE_TRANSMISSION
1530 if (sc->txb_count > 0) {
1531 /* Just one packet per a transmission buffer. */
1532 goto indicate_active;
1533 }
1534 #endif
1535
1536 /*
1537 * Get the next mbuf chain for a packet to send.
1538 */
1539 IF_DEQUEUE(&ifp->if_snd, m);
1540 if (m == 0) {
1541 /* No more packets to send. */
1542 goto indicate_inactive;
1543 }
1544
1545 #if NBPFILTER > 0
1546 /* Tap off here if there is a BPF listener. */
1547 if (ifp->if_bpf)
1548 bpf_mtap(ifp->if_bpf, m);
1549 #endif
1550
1551 /*
1552 * Copy the mbuf chain into the transmission buffer.
1553 * txb_* variables are updated as necessary.
1554 */
1555 fe_write_mbufs(sc, m);
1556
1557 m_freem(m);
1558
1559 /* Start transmitter if it's idle. */
1560 if (sc->txb_sched == 0)
1561 fe_xmit(sc);
1562 }
1563
1564 indicate_inactive:
1565 /*
1566 * We are using the !OACTIVE flag to indicate to
1567 * the outside world that we can accept an
1568 * additional packet rather than that the
1569 * transmitter is _actually_ active. Indeed, the
1570 * transmitter may be active, but if we haven't
1571 * filled all the buffers with data then we still
1572 * want to accept more.
1573 */
1574 ifp->if_flags &= ~IFF_OACTIVE;
1575 return;
1576
1577 indicate_active:
1578 /*
1579 * The transmitter is active, and there are no room for
1580 * more outgoing packets in the transmission buffer.
1581 */
1582 ifp->if_flags |= IFF_OACTIVE;
1583 return;
1584 }
1585
1586 /*
1587 * Transmission interrupt handler
1588 * The control flow of this function looks silly. FIXME.
1589 */
1590 void
1591 fe_tint(sc, tstat)
1592 struct fe_softc *sc;
1593 u_char tstat;
1594 {
1595 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1596 int left;
1597 int col;
1598
1599 /*
1600 * Handle "excessive collision" interrupt.
1601 */
1602 if (tstat & FE_D0_COLL16) {
1603 /*
1604 * Find how many packets (including this collided one)
1605 * are left unsent in transmission buffer.
1606 */
1607 left = inb(sc->sc_iobase + FE_BMPR10);
1608
1609 #if FE_DEBUG >= 2
1610 log(LOG_WARNING, "%s: excessive collision (%d/%d)\n",
1611 sc->sc_dev.dv_xname, left, sc->txb_sched);
1612 #endif
1613 #if FE_DEBUG >= 3
1614 fe_dump(LOG_INFO, sc);
1615 #endif
1616
1617 /*
1618 * Update statistics.
1619 */
1620 ifp->if_collisions += 16;
1621 ifp->if_oerrors++;
1622 ifp->if_opackets += sc->txb_sched - left;
1623
1624 /*
1625 * Collision statistics has been updated.
1626 * Clear the collision flag on 86960 now to avoid confusion.
1627 */
1628 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID);
1629
1630 /*
1631 * Restart transmitter, skipping the
1632 * collided packet.
1633 *
1634 * We *must* skip the packet to keep network running
1635 * properly. Excessive collision error is an
1636 * indication of the network overload. If we
1637 * tried sending the same packet after excessive
1638 * collision, the network would be filled with
1639 * out-of-time packets. Packets belonging
1640 * to reliable transport (such as TCP) are resent
1641 * by some upper layer.
1642 */
1643 outb(sc->sc_iobase + FE_BMPR11,
1644 FE_B11_CTRL_SKIP | FE_B11_MODE1);
1645 sc->txb_sched = left - 1;
1646 }
1647
1648 /*
1649 * Handle "transmission complete" interrupt.
1650 */
1651 if (tstat & FE_D0_TXDONE) {
1652 /*
1653 * Add in total number of collisions on last
1654 * transmission. We also clear "collision occurred" flag
1655 * here.
1656 *
1657 * 86960 has a design flow on collision count on multiple
1658 * packet transmission. When we send two or more packets
1659 * with one start command (that's what we do when the
1660 * transmission queue is clauded), 86960 informs us number
1661 * of collisions occured on the last packet on the
1662 * transmission only. Number of collisions on previous
1663 * packets are lost. I have told that the fact is clearly
1664 * stated in the Fujitsu document.
1665 *
1666 * I considered not to mind it seriously. Collision
1667 * count is not so important, anyway. Any comments? FIXME.
1668 */
1669
1670 if (inb(sc->sc_iobase + FE_DLCR0) & FE_D0_COLLID) {
1671 /* Clear collision flag. */
1672 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID);
1673
1674 /* Extract collision count from 86960. */
1675 col = inb(sc->sc_iobase + FE_DLCR4) & FE_D4_COL;
1676 if (col == 0) {
1677 /*
1678 * Status register indicates collisions,
1679 * while the collision count is zero.
1680 * This can happen after multiple packet
1681 * transmission, indicating that one or more
1682 * previous packet(s) had been collided.
1683 *
1684 * Since the accurate number of collisions
1685 * has been lost, we just guess it as 1;
1686 * Am I too optimistic? FIXME.
1687 */
1688 col = 1;
1689 } else
1690 col >>= FE_D4_COL_SHIFT;
1691 ifp->if_collisions += col;
1692 #if FE_DEBUG >= 4
1693 log(LOG_WARNING, "%s: %d collision%s (%d)\n",
1694 sc->sc_dev.dv_xname, col, col == 1 ? "" : "s",
1695 sc->txb_sched);
1696 #endif
1697 }
1698
1699 /*
1700 * Update total number of successfully
1701 * transmitted packets.
1702 */
1703 ifp->if_opackets += sc->txb_sched;
1704 sc->txb_sched = 0;
1705 }
1706
1707 if (sc->txb_sched == 0) {
1708 /*
1709 * The transmitter is no more active.
1710 * Reset output active flag and watchdog timer.
1711 */
1712 ifp->if_flags &= ~IFF_OACTIVE;
1713 ifp->if_timer = 0;
1714
1715 /*
1716 * If more data is ready to transmit in the buffer, start
1717 * transmitting them. Otherwise keep transmitter idle,
1718 * even if more data is queued. This gives receive
1719 * process a slight priority.
1720 */
1721 if (sc->txb_count > 0)
1722 fe_xmit(sc);
1723 }
1724 }
1725
1726 /*
1727 * Ethernet interface receiver interrupt.
1728 */
1729 void
1730 fe_rint(sc, rstat)
1731 struct fe_softc *sc;
1732 u_char rstat;
1733 {
1734 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1735 int len;
1736 u_char status;
1737 int i;
1738
1739 /*
1740 * Update statistics if this interrupt is caused by an error.
1741 */
1742 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR |
1743 FE_D1_ALGERR | FE_D1_SRTPKT)) {
1744 #if FE_DEBUG >= 3
1745 log(LOG_WARNING, "%s: receive error: %b\n",
1746 sc->sc_dev.dv_xname, rstat, FE_D1_ERRBITS);
1747 #endif
1748 ifp->if_ierrors++;
1749 }
1750
1751 /*
1752 * MB86960 has a flag indicating "receive queue empty."
1753 * We just loop cheking the flag to pull out all received
1754 * packets.
1755 *
1756 * We limit the number of iterrations to avoid infinite loop.
1757 * It can be caused by a very slow CPU (some broken
1758 * peripheral may insert incredible number of wait cycles)
1759 * or, worse, by a broken MB86960 chip.
1760 */
1761 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
1762 /* Stop the iterration if 86960 indicates no packets. */
1763 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP)
1764 break;
1765
1766 /*
1767 * Extract A receive status byte.
1768 * As our 86960 is in 16 bit bus access mode, we have to
1769 * use inw() to get the status byte. The significant
1770 * value is returned in lower 8 bits.
1771 */
1772 status = (u_char)inw(sc->sc_iobase + FE_BMPR8);
1773 #if FE_DEBUG >= 4
1774 log(LOG_INFO, "%s: receive status = %02x\n",
1775 sc->sc_dev.dv_xname, status);
1776 #endif
1777
1778 /*
1779 * If there was an error, update statistics and drop
1780 * the packet, unless the interface is in promiscuous
1781 * mode.
1782 */
1783 if ((status & 0xF0) != 0x20) { /* XXXX ? */
1784 if ((ifp->if_flags & IFF_PROMISC) == 0) {
1785 ifp->if_ierrors++;
1786 fe_droppacket(sc);
1787 continue;
1788 }
1789 }
1790
1791 /*
1792 * Extract the packet length.
1793 * It is a sum of a header (14 bytes) and a payload.
1794 * CRC has been stripped off by the 86960.
1795 */
1796 len = inw(sc->sc_iobase + FE_BMPR8);
1797
1798 /*
1799 * MB86965 checks the packet length and drop big packet
1800 * before passing it to us. There are no chance we can
1801 * get [crufty] packets. Hence, if the length exceeds
1802 * the specified limit, it means some serious failure,
1803 * such as out-of-sync on receive buffer management.
1804 *
1805 * Is this statement true? FIXME.
1806 */
1807 if (len > ETHER_MAX_LEN || len < ETHER_HDR_SIZE) {
1808 #if FE_DEBUG >= 2
1809 log(LOG_WARNING,
1810 "%s: received a %s packet? (%u bytes)\n",
1811 sc->sc_dev.dv_xname,
1812 len < ETHER_HDR_SIZE ? "partial" : "big", len);
1813 #endif
1814 ifp->if_ierrors++;
1815 fe_droppacket(sc);
1816 continue;
1817 }
1818
1819 /*
1820 * Check for a short (RUNT) packet. We *do* check
1821 * but do nothing other than print a message.
1822 * Short packets are illegal, but does nothing bad
1823 * if it carries data for upper layer.
1824 */
1825 #if FE_DEBUG >= 2
1826 if (len < ETHER_MIN_LEN) {
1827 log(LOG_WARNING,
1828 "%s: received a short packet? (%u bytes)\n",
1829 sc->sc_dev.dv_xname, len);
1830 }
1831 #endif
1832
1833 /*
1834 * Go get a packet.
1835 */
1836 if (!fe_get_packet(sc, len)) {
1837 /* Skip a packet, updating statistics. */
1838 #if FE_DEBUG >= 2
1839 log(LOG_WARNING,
1840 "%s: out of mbufs; dropping packet (%u bytes)\n",
1841 sc->sc_dev.dv_xname, len);
1842 #endif
1843 ifp->if_ierrors++;
1844 fe_droppacket(sc);
1845
1846 /*
1847 * We stop receiving packets, even if there are
1848 * more in the buffer. We hope we can get more
1849 * mbufs next time.
1850 */
1851 return;
1852 }
1853
1854 /* Successfully received a packet. Update stat. */
1855 ifp->if_ipackets++;
1856 }
1857 }
1858
1859 /*
1860 * Ethernet interface interrupt processor
1861 */
1862 int
1863 feintr(arg)
1864 void *arg;
1865 {
1866 struct fe_softc *sc = arg;
1867 u_char tstat, rstat;
1868
1869 #if FE_DEBUG >= 4
1870 log(LOG_INFO, "%s: feintr()\n", sc->sc_dev.dv_xname);
1871 fe_dump(LOG_INFO, sc);
1872 #endif
1873
1874 /*
1875 * Get interrupt conditions, masking unneeded flags.
1876 */
1877 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK;
1878 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK;
1879 if (tstat == 0 && rstat == 0)
1880 return (0);
1881
1882 /*
1883 * Loop until there are no more new interrupt conditions.
1884 */
1885 for (;;) {
1886 /*
1887 * Reset the conditions we are acknowledging.
1888 */
1889 outb(sc->sc_iobase + FE_DLCR0, tstat);
1890 outb(sc->sc_iobase + FE_DLCR1, rstat);
1891
1892 /*
1893 * Handle transmitter interrupts. Handle these first because
1894 * the receiver will reset the board under some conditions.
1895 */
1896 if (tstat != 0)
1897 fe_tint(sc, tstat);
1898
1899 /*
1900 * Handle receiver interrupts.
1901 */
1902 if (rstat != 0)
1903 fe_rint(sc, rstat);
1904
1905 /*
1906 * Update the multicast address filter if it is
1907 * needed and possible. We do it now, because
1908 * we can make sure the transmission buffer is empty,
1909 * and there is a good chance that the receive queue
1910 * is empty. It will minimize the possibility of
1911 * packet lossage.
1912 */
1913 if (sc->filter_change &&
1914 sc->txb_count == 0 && sc->txb_sched == 0) {
1915 fe_loadmar(sc);
1916 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
1917 }
1918
1919 /*
1920 * If it looks like the transmitter can take more data,
1921 * attempt to start output on the interface. This is done
1922 * after handling the receiver interrupt to give the
1923 * receive operation priority.
1924 */
1925 if ((sc->sc_ethercom.ec_if.if_flags & IFF_OACTIVE) == 0)
1926 fe_start(&sc->sc_ethercom.ec_if);
1927
1928 #if NRND > 0
1929 if (rstat != 0 || tstat != 0)
1930 rnd_add_uint32(&sc->rnd_source, rstat + tstat);
1931 #endif
1932
1933 /*
1934 * Get interrupt conditions, masking unneeded flags.
1935 */
1936 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK;
1937 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK;
1938 if (tstat == 0 && rstat == 0)
1939 return (1);
1940 }
1941 }
1942
1943 /*
1944 * Process an ioctl request. This code needs some work - it looks pretty ugly.
1945 */
1946 int
1947 fe_ioctl(ifp, command, data)
1948 register struct ifnet *ifp;
1949 u_long command;
1950 caddr_t data;
1951 {
1952 struct fe_softc *sc = ifp->if_softc;
1953 register struct ifaddr *ifa = (struct ifaddr *)data;
1954 struct ifreq *ifr = (struct ifreq *)data;
1955 int s, error = 0;
1956
1957 #if FE_DEBUG >= 3
1958 log(LOG_INFO, "%s: ioctl(%x)\n", sc->sc_dev.dv_xname, command);
1959 #endif
1960
1961 s = splnet();
1962
1963 switch (command) {
1964
1965 case SIOCSIFADDR:
1966 ifp->if_flags |= IFF_UP;
1967
1968 switch (ifa->ifa_addr->sa_family) {
1969 #ifdef INET
1970 case AF_INET:
1971 fe_init(sc);
1972 arp_ifinit(ifp, ifa);
1973 break;
1974 #endif
1975 #ifdef NS
1976 case AF_NS:
1977 {
1978 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1979
1980 if (ns_nullhost(*ina))
1981 ina->x_host =
1982 *(union ns_host *)(sc->sc_enaddr);
1983 else {
1984 bcopy(ina->x_host.c_host, sc->sc_enaddr,
1985 ETHER_ADDR_LEN);
1986 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
1987 ETHER_ADDR_LEN);
1988 }
1989 /* Set new address. */
1990 fe_init(sc);
1991 break;
1992 }
1993 #endif
1994 default:
1995 fe_init(sc);
1996 break;
1997 }
1998 break;
1999
2000 case SIOCSIFFLAGS:
2001 if ((ifp->if_flags & IFF_UP) == 0 &&
2002 (ifp->if_flags & IFF_RUNNING) != 0) {
2003 /*
2004 * If interface is marked down and it is running, then
2005 * stop it.
2006 */
2007 fe_stop(sc);
2008 ifp->if_flags &= ~IFF_RUNNING;
2009 } else if ((ifp->if_flags & IFF_UP) != 0 &&
2010 (ifp->if_flags & IFF_RUNNING) == 0) {
2011 /*
2012 * If interface is marked up and it is stopped, then
2013 * start it.
2014 */
2015 fe_init(sc);
2016 } else {
2017 /*
2018 * Reset the interface to pick up changes in any other
2019 * flags that affect hardware registers.
2020 */
2021 fe_setmode(sc);
2022 }
2023 #if DEBUG >= 1
2024 /* "ifconfig fe0 debug" to print register dump. */
2025 if (ifp->if_flags & IFF_DEBUG) {
2026 log(LOG_INFO, "%s: SIOCSIFFLAGS(DEBUG)\n", sc->sc_dev.dv_xname);
2027 fe_dump(LOG_DEBUG, sc);
2028 }
2029 #endif
2030 break;
2031
2032 case SIOCADDMULTI:
2033 case SIOCDELMULTI:
2034 /* Update our multicast list. */
2035 error = (command == SIOCADDMULTI) ?
2036 ether_addmulti(ifr, &sc->sc_ethercom) :
2037 ether_delmulti(ifr, &sc->sc_ethercom);
2038
2039 if (error == ENETRESET) {
2040 /*
2041 * Multicast list has changed; set the hardware filter
2042 * accordingly.
2043 */
2044 fe_setmode(sc);
2045 error = 0;
2046 }
2047 break;
2048
2049 default:
2050 error = EINVAL;
2051 }
2052
2053 splx(s);
2054 return (error);
2055 }
2056
2057 /*
2058 * Retreive packet from receive buffer and send to the next level up via
2059 * ether_input(). If there is a BPF listener, give a copy to BPF, too.
2060 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
2061 */
2062 int
2063 fe_get_packet(sc, len)
2064 struct fe_softc *sc;
2065 int len;
2066 {
2067 struct ether_header *eh;
2068 struct mbuf *m;
2069 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2070
2071 /* Allocate a header mbuf. */
2072 MGETHDR(m, M_DONTWAIT, MT_DATA);
2073 if (m == 0)
2074 return (0);
2075 m->m_pkthdr.rcvif = ifp;
2076 m->m_pkthdr.len = len;
2077
2078 /* The following silliness is to make NFS happy. */
2079 #define EROUND ((sizeof(struct ether_header) + 3) & ~3)
2080 #define EOFF (EROUND - sizeof(struct ether_header))
2081
2082 /*
2083 * Our strategy has one more problem. There is a policy on
2084 * mbuf cluster allocation. It says that we must have at
2085 * least MINCLSIZE (208 bytes) to allocate a cluster. For a
2086 * packet of a size between (MHLEN - 2) to (MINCLSIZE - 2),
2087 * our code violates the rule...
2088 * On the other hand, the current code is short, simle,
2089 * and fast, however. It does no harmful thing, just waists
2090 * some memory. Any comments? FIXME.
2091 */
2092
2093 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
2094 if (len > MHLEN - EOFF) {
2095 MCLGET(m, M_DONTWAIT);
2096 if ((m->m_flags & M_EXT) == 0) {
2097 m_freem(m);
2098 return (0);
2099 }
2100 }
2101
2102 /*
2103 * The following assumes there is room for the ether header in the
2104 * header mbuf.
2105 */
2106 m->m_data += EOFF;
2107 eh = mtod(m, struct ether_header *);
2108
2109 /* Set the length of this packet. */
2110 m->m_len = len;
2111
2112 /* Get a packet. */
2113 insw(sc->sc_iobase + FE_BMPR8, m->m_data, (len + 1) >> 1);
2114
2115 #if NBPFILTER > 0
2116 /*
2117 * Check if there's a BPF listener on this interface. If so, hand off
2118 * the raw packet to bpf.
2119 */
2120 if (ifp->if_bpf) {
2121 bpf_mtap(ifp->if_bpf, m);
2122
2123 /*
2124 * Note that the interface cannot be in promiscuous mode if
2125 * there are no BPF listeners. And if we are in promiscuous
2126 * mode, we have to check if this packet is really ours.
2127 */
2128 if ((ifp->if_flags & IFF_PROMISC) != 0 &&
2129 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
2130 bcmp(eh->ether_dhost, sc->sc_enaddr,
2131 sizeof(eh->ether_dhost)) != 0) {
2132 m_freem(m);
2133 return (1);
2134 }
2135 }
2136 #endif
2137
2138 /* Fix up data start offset in mbuf to point past ether header. */
2139 m_adj(m, sizeof(struct ether_header));
2140 ether_input(ifp, eh, m);
2141 return (1);
2142 }
2143
2144 /*
2145 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
2146 * Returns number of bytes actually written, including length word.
2147 *
2148 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
2149 * Packets shorter than Ethernet minimum are legal, and we pad them
2150 * before sending out. An exception is "partial" packets which are
2151 * shorter than mandatory Ethernet header.
2152 *
2153 * I wrote a code for an experimental "delayed padding" technique.
2154 * When employed, it postpones the padding process for short packets.
2155 * If xmit() occured at the moment, the padding process is omitted, and
2156 * garbages are sent as pad data. If next packet is stored in the
2157 * transmission buffer before xmit(), write_mbuf() pads the previous
2158 * packet before transmitting new packet. This *may* gain the
2159 * system performance (slightly).
2160 */
2161 void
2162 fe_write_mbufs(sc, m)
2163 struct fe_softc *sc;
2164 struct mbuf *m;
2165 {
2166 int bmpr8 = sc->sc_iobase + FE_BMPR8;
2167 u_char *data;
2168 u_short savebyte; /* WARNING: Architecture dependent! */
2169 int totlen, len, wantbyte;
2170
2171 /* XXX thorpej 960116 - quiet bogus compiler warning. */
2172 savebyte = 0;
2173
2174 #if FE_DELAYED_PADDING
2175 /* Do the "delayed padding." */
2176 len = sc->txb_padding >> 1;
2177 if (len > 0) {
2178 while (--len >= 0)
2179 outw(bmpr8, 0);
2180 sc->txb_padding = 0;
2181 }
2182 #endif
2183
2184 /* We need to use m->m_pkthdr.len, so require the header */
2185 if ((m->m_flags & M_PKTHDR) == 0)
2186 panic("fe_write_mbufs: no header mbuf");
2187
2188 #if FE_DEBUG >= 2
2189 /* First, count up the total number of bytes to copy. */
2190 for (totlen = 0, mp = m; mp != 0; mp = mp->m_next)
2191 totlen += mp->m_len;
2192 /* Check if this matches the one in the packet header. */
2193 if (totlen != m->m_pkthdr.len)
2194 log(LOG_WARNING, "%s: packet length mismatch? (%d/%d)\n",
2195 sc->sc_dev.dv_xname, totlen, m->m_pkthdr.len);
2196 #else
2197 /* Just use the length value in the packet header. */
2198 totlen = m->m_pkthdr.len;
2199 #endif
2200
2201 #if FE_DEBUG >= 1
2202 /*
2203 * Should never send big packets. If such a packet is passed,
2204 * it should be a bug of upper layer. We just ignore it.
2205 * ... Partial (too short) packets, neither.
2206 */
2207 if (totlen > ETHER_MAX_LEN || totlen < ETHER_HDR_SIZE) {
2208 log(LOG_ERR, "%s: got a %s packet (%u bytes) to send\n",
2209 sc->sc_dev.dv_xname,
2210 totlen < ETHER_HDR_SIZE ? "partial" : "big", totlen);
2211 sc->sc_ethercom.ec_if.if_oerrors++;
2212 return;
2213 }
2214 #endif
2215
2216 /*
2217 * Put the length word for this frame.
2218 * Does 86960 accept odd length? -- Yes.
2219 * Do we need to pad the length to minimum size by ourselves?
2220 * -- Generally yes. But for (or will be) the last
2221 * packet in the transmission buffer, we can skip the
2222 * padding process. It may gain performance slightly. FIXME.
2223 */
2224 outw(bmpr8, max(totlen, ETHER_MIN_LEN));
2225
2226 /*
2227 * Update buffer status now.
2228 * Truncate the length up to an even number, since we use outw().
2229 */
2230 totlen = (totlen + 1) & ~1;
2231 sc->txb_free -= FE_DATA_LEN_LEN + max(totlen, ETHER_MIN_LEN);
2232 sc->txb_count++;
2233
2234 #if FE_DELAYED_PADDING
2235 /* Postpone the packet padding if necessary. */
2236 if (totlen < ETHER_MIN_LEN)
2237 sc->txb_padding = ETHER_MIN_LEN - totlen;
2238 #endif
2239
2240 /*
2241 * Transfer the data from mbuf chain to the transmission buffer.
2242 * MB86960 seems to require that data be transferred as words, and
2243 * only words. So that we require some extra code to patch
2244 * over odd-length mbufs.
2245 */
2246 wantbyte = 0;
2247 for (; m != 0; m = m->m_next) {
2248 /* Ignore empty mbuf. */
2249 len = m->m_len;
2250 if (len == 0)
2251 continue;
2252
2253 /* Find the actual data to send. */
2254 data = mtod(m, caddr_t);
2255
2256 /* Finish the last byte. */
2257 if (wantbyte) {
2258 outw(bmpr8, savebyte | (*data << 8));
2259 data++;
2260 len--;
2261 wantbyte = 0;
2262 }
2263
2264 /* Output contiguous words. */
2265 if (len > 1)
2266 outsw(bmpr8, data, len >> 1);
2267
2268 /* Save remaining byte, if there is one. */
2269 if (len & 1) {
2270 data += len & ~1;
2271 savebyte = *data;
2272 wantbyte = 1;
2273 }
2274 }
2275
2276 /* Spit the last byte, if the length is odd. */
2277 if (wantbyte)
2278 outw(bmpr8, savebyte);
2279
2280 #if ! FE_DELAYED_PADDING
2281 /*
2282 * Pad the packet to the minimum length if necessary.
2283 */
2284 len = (ETHER_MIN_LEN >> 1) - (totlen >> 1);
2285 while (--len >= 0)
2286 outw(bmpr8, 0);
2287 #endif
2288 }
2289
2290 /*
2291 * Compute the multicast address filter from the
2292 * list of multicast addresses we need to listen to.
2293 */
2294 void
2295 fe_getmcaf(ec, af)
2296 struct ethercom *ec;
2297 u_char *af;
2298 {
2299 struct ifnet *ifp = &ec->ec_if;
2300 struct ether_multi *enm;
2301 register u_char *cp, c;
2302 register u_long crc;
2303 register int i, len;
2304 struct ether_multistep step;
2305
2306 /*
2307 * Set up multicast address filter by passing all multicast addresses
2308 * through a crc generator, and then using the high order 6 bits as an
2309 * index into the 64 bit logical address filter. The high order bit
2310 * selects the word, while the rest of the bits select the bit within
2311 * the word.
2312 */
2313
2314 if ((ifp->if_flags & IFF_PROMISC) != 0)
2315 goto allmulti;
2316
2317 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0x00;
2318 ETHER_FIRST_MULTI(step, ec, enm);
2319 while (enm != NULL) {
2320 if (bcmp(enm->enm_addrlo, enm->enm_addrhi,
2321 sizeof(enm->enm_addrlo)) != 0) {
2322 /*
2323 * We must listen to a range of multicast addresses.
2324 * For now, just accept all multicasts, rather than
2325 * trying to set only those filter bits needed to match
2326 * the range. (At this time, the only use of address
2327 * ranges is for IP multicast routing, for which the
2328 * range is big enough to require all bits set.)
2329 */
2330 goto allmulti;
2331 }
2332
2333 cp = enm->enm_addrlo;
2334 crc = 0xffffffff;
2335 for (len = sizeof(enm->enm_addrlo); --len >= 0;) {
2336 c = *cp++;
2337 for (i = 8; --i >= 0;) {
2338 if ((crc & 0x01) ^ (c & 0x01)) {
2339 crc >>= 1;
2340 crc ^= 0xedb88320;
2341 } else
2342 crc >>= 1;
2343 c >>= 1;
2344 }
2345 }
2346 /* Just want the 6 most significant bits. */
2347 crc >>= 26;
2348
2349 /* Turn on the corresponding bit in the filter. */
2350 af[crc >> 3] |= 1 << (crc & 7);
2351
2352 ETHER_NEXT_MULTI(step, enm);
2353 }
2354 ifp->if_flags &= ~IFF_ALLMULTI;
2355 return;
2356
2357 allmulti:
2358 ifp->if_flags |= IFF_ALLMULTI;
2359 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0xff;
2360 }
2361
2362 /*
2363 * Calculate a new "multicast packet filter" and put the 86960
2364 * receiver in appropriate mode.
2365 */
2366 void
2367 fe_setmode(sc)
2368 struct fe_softc *sc;
2369 {
2370 int flags = sc->sc_ethercom.ec_if.if_flags;
2371
2372 /*
2373 * If the interface is not running, we postpone the update
2374 * process for receive modes and multicast address filter
2375 * until the interface is restarted. It reduces some
2376 * complicated job on maintaining chip states. (Earlier versions
2377 * of this driver had a bug on that point...)
2378 *
2379 * To complete the trick, fe_init() calls fe_setmode() after
2380 * restarting the interface.
2381 */
2382 if ((flags & IFF_RUNNING) == 0)
2383 return;
2384
2385 /*
2386 * Promiscuous mode is handled separately.
2387 */
2388 if ((flags & IFF_PROMISC) != 0) {
2389 /*
2390 * Program 86960 to receive all packets on the segment
2391 * including those directed to other stations.
2392 * Multicast filter stored in MARs are ignored
2393 * under this setting, so we don't need to update it.
2394 *
2395 * Promiscuous mode is used solely by BPF, and BPF only
2396 * listens to valid (no error) packets. So, we ignore
2397 * errornous ones even in this mode.
2398 */
2399 outb(sc->sc_iobase + FE_DLCR5,
2400 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
2401 sc->filter_change = 0;
2402
2403 #if FE_DEBUG >= 3
2404 log(LOG_INFO, "%s: promiscuous mode\n", sc->sc_dev.dv_xname);
2405 #endif
2406 return;
2407 }
2408
2409 /*
2410 * Turn the chip to the normal (non-promiscuous) mode.
2411 */
2412 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
2413
2414 /*
2415 * Find the new multicast filter value.
2416 */
2417 fe_getmcaf(&sc->sc_ethercom, sc->filter);
2418 sc->filter_change = 1;
2419
2420 #if FE_DEBUG >= 3
2421 log(LOG_INFO,
2422 "%s: address filter: [%02x %02x %02x %02x %02x %02x %02x %02x]\n",
2423 sc->sc_dev.dv_xname,
2424 sc->filter[0], sc->filter[1], sc->filter[2], sc->filter[3],
2425 sc->filter[4], sc->filter[5], sc->filter[6], sc->filter[7]);
2426 #endif
2427
2428 /*
2429 * We have to update the multicast filter in the 86960, A.S.A.P.
2430 *
2431 * Note that the DLC (Data Linc Control unit, i.e. transmitter
2432 * and receiver) must be stopped when feeding the filter, and
2433 * DLC trushes all packets in both transmission and receive
2434 * buffers when stopped.
2435 *
2436 * ... Are the above sentenses correct? I have to check the
2437 * manual of the MB86960A. FIXME.
2438 *
2439 * To reduce the packet lossage, we delay the filter update
2440 * process until buffers are empty.
2441 */
2442 if (sc->txb_sched == 0 && sc->txb_count == 0 &&
2443 (inb(sc->sc_iobase + FE_DLCR1) & FE_D1_PKTRDY) == 0) {
2444 /*
2445 * Buffers are (apparently) empty. Load
2446 * the new filter value into MARs now.
2447 */
2448 fe_loadmar(sc);
2449 } else {
2450 /*
2451 * Buffers are not empty. Mark that we have to update
2452 * the MARs. The new filter will be loaded by feintr()
2453 * later.
2454 */
2455 #if FE_DEBUG >= 4
2456 log(LOG_INFO, "%s: filter change delayed\n", sc->sc_dev.dv_xname);
2457 #endif
2458 }
2459 }
2460
2461 /*
2462 * Load a new multicast address filter into MARs.
2463 *
2464 * The caller must have splnet'ed befor fe_loadmar.
2465 * This function starts the DLC upon return. So it can be called only
2466 * when the chip is working, i.e., from the driver's point of view, when
2467 * a device is RUNNING. (I mistook the point in previous versions.)
2468 */
2469 void
2470 fe_loadmar(sc)
2471 struct fe_softc *sc;
2472 {
2473
2474 /* Stop the DLC (transmitter and receiver). */
2475 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
2476
2477 /* Select register bank 1 for MARs. */
2478 outb(sc->sc_iobase + FE_DLCR7,
2479 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
2480
2481 /* Copy filter value into the registers. */
2482 outblk(sc->sc_iobase + FE_MAR8, sc->filter, FE_FILTER_LEN);
2483
2484 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
2485 outb(sc->sc_iobase + FE_DLCR7,
2486 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
2487
2488 /* Restart the DLC. */
2489 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
2490
2491 /* We have just updated the filter. */
2492 sc->filter_change = 0;
2493
2494 #if FE_DEBUG >= 3
2495 log(LOG_INFO, "%s: address filter changed\n", sc->sc_dev.dv_xname);
2496 #endif
2497 }
2498
2499 #if FE_DEBUG >= 1
2500 void
2501 fe_dump(level, sc)
2502 int level;
2503 struct fe_softc *sc;
2504 {
2505 int iobase = sc->sc_iobase;
2506 u_char save_dlcr7;
2507
2508 save_dlcr7 = inb(iobase + FE_DLCR7);
2509
2510 log(level, "\tDLCR = %02x %02x %02x %02x %02x %02x %02x %02x",
2511 inb(iobase + FE_DLCR0), inb(iobase + FE_DLCR1),
2512 inb(iobase + FE_DLCR2), inb(iobase + FE_DLCR3),
2513 inb(iobase + FE_DLCR4), inb(iobase + FE_DLCR5),
2514 inb(iobase + FE_DLCR6), inb(iobase + FE_DLCR7));
2515
2516 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_DLCR);
2517 log(level, "\t %02x %02x %02x %02x %02x %02x %02x %02x,",
2518 inb(iobase + FE_DLCR8), inb(iobase + FE_DLCR9),
2519 inb(iobase + FE_DLCR10), inb(iobase + FE_DLCR11),
2520 inb(iobase + FE_DLCR12), inb(iobase + FE_DLCR13),
2521 inb(iobase + FE_DLCR14), inb(iobase + FE_DLCR15));
2522
2523 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_MAR);
2524 log(level, "\tMAR = %02x %02x %02x %02x %02x %02x %02x %02x,",
2525 inb(iobase + FE_MAR8), inb(iobase + FE_MAR9),
2526 inb(iobase + FE_MAR10), inb(iobase + FE_MAR11),
2527 inb(iobase + FE_MAR12), inb(iobase + FE_MAR13),
2528 inb(iobase + FE_MAR14), inb(iobase + FE_MAR15));
2529
2530 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_BMPR);
2531 log(level, "\tBMPR = xx xx %02x %02x %02x %02x %02x %02x %02x %02x xx %02x.",
2532 inb(iobase + FE_BMPR10), inb(iobase + FE_BMPR11),
2533 inb(iobase + FE_BMPR12), inb(iobase + FE_BMPR13),
2534 inb(iobase + FE_BMPR14), inb(iobase + FE_BMPR15),
2535 inb(iobase + FE_BMPR16), inb(iobase + FE_BMPR17),
2536 inb(iobase + FE_BMPR19));
2537
2538 outb(iobase + FE_DLCR7, save_dlcr7);
2539 }
2540 #endif
2541