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mb89352.c revision 1.5.6.2
      1  1.5.6.2  nathanw /*	$NetBSD: mb89352.c,v 1.5.6.2 2001/08/24 00:09:29 nathanw Exp $	*/
      2      1.1  minoura /*	NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp	*/
      3      1.1  minoura 
      4      1.1  minoura #ifdef DDB
      5      1.1  minoura #define	integrate
      6      1.1  minoura #else
      7      1.1  minoura #define	integrate	__inline static
      8      1.1  minoura #endif
      9      1.1  minoura 
     10      1.1  minoura /*-
     11      1.1  minoura  * Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc.
     12      1.1  minoura  * All rights reserved.
     13      1.1  minoura  *
     14      1.1  minoura  * This code is derived from software contributed to The NetBSD Foundation
     15      1.1  minoura  * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
     16      1.1  minoura  *
     17      1.1  minoura  * Redistribution and use in source and binary forms, with or without
     18      1.1  minoura  * modification, are permitted provided that the following conditions
     19      1.1  minoura  * are met:
     20      1.1  minoura  * 1. Redistributions of source code must retain the above copyright
     21      1.1  minoura  *    notice, this list of conditions and the following disclaimer.
     22      1.1  minoura  * 2. Redistributions in binary form must reproduce the above copyright
     23      1.1  minoura  *    notice, this list of conditions and the following disclaimer in the
     24      1.1  minoura  *    documentation and/or other materials provided with the distribution.
     25      1.1  minoura  * 3. All advertising materials mentioning features or use of this software
     26      1.1  minoura  *    must display the following acknowledgement:
     27      1.1  minoura  *	This product includes software developed by Charles M. Hannum.
     28      1.1  minoura  * 4. The name of the author may not be used to endorse or promote products
     29      1.1  minoura  *    derived from this software without specific prior written permission.
     30      1.1  minoura  *
     31      1.1  minoura  * Copyright (c) 1994 Jarle Greipsland
     32      1.1  minoura  * All rights reserved.
     33      1.1  minoura  *
     34      1.1  minoura  * Redistribution and use in source and binary forms, with or without
     35      1.1  minoura  * modification, are permitted provided that the following conditions
     36      1.1  minoura  * are met:
     37      1.1  minoura  * 1. Redistributions of source code must retain the above copyright
     38      1.1  minoura  *    notice, this list of conditions and the following disclaimer.
     39      1.1  minoura  * 2. Redistributions in binary form must reproduce the above copyright
     40      1.1  minoura  *    notice, this list of conditions and the following disclaimer in the
     41      1.1  minoura  *    documentation and/or other materials provided with the distribution.
     42      1.1  minoura  * 3. The name of the author may not be used to endorse or promote products
     43      1.1  minoura  *    derived from this software without specific prior written permission.
     44      1.1  minoura  *
     45      1.1  minoura  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     46      1.1  minoura  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     47      1.1  minoura  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     48      1.1  minoura  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
     49      1.1  minoura  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     50      1.1  minoura  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     51      1.1  minoura  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     52      1.1  minoura  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     53      1.1  minoura  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
     54      1.1  minoura  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     55      1.1  minoura  * POSSIBILITY OF SUCH DAMAGE.
     56      1.1  minoura  */
     57      1.1  minoura /*
     58      1.1  minoura  * [NetBSD for NEC PC-98 series]
     59      1.1  minoura  *  Copyright (c) 1996, 1997, 1998
     60      1.1  minoura  *	NetBSD/pc98 porting staff. All rights reserved.
     61      1.1  minoura  *  Copyright (c) 1996, 1997, 1998
     62      1.1  minoura  *	Kouichi Matsuda. All rights reserved.
     63      1.1  minoura  */
     64      1.1  minoura 
     65      1.1  minoura /*
     66      1.1  minoura  * Acknowledgements: Many of the algorithms used in this driver are
     67      1.1  minoura  * inspired by the work of Julian Elischer (julian (at) tfs.com) and
     68      1.1  minoura  * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu).  Thanks a million!
     69      1.1  minoura  */
     70      1.1  minoura 
     71      1.1  minoura /* TODO list:
     72      1.1  minoura  * 1) Get the DMA stuff working.
     73      1.1  minoura  * 2) Get the iov/uio stuff working. Is this a good thing ???
     74      1.1  minoura  * 3) Get the synch stuff working.
     75      1.1  minoura  * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
     76      1.1  minoura  */
     77      1.1  minoura 
     78      1.1  minoura /*
     79      1.1  minoura  * A few customizable items:
     80      1.1  minoura  */
     81      1.1  minoura 
     82      1.1  minoura /* Use doubleword transfers to/from SCSI chip.  Note: This requires
     83      1.1  minoura  * motherboard support.  Basicly, some motherboard chipsets are able to
     84      1.1  minoura  * split a 32 bit I/O operation into two 16 bit I/O operations,
     85      1.1  minoura  * transparently to the processor.  This speeds up some things, notably long
     86      1.1  minoura  * data transfers.
     87      1.1  minoura  */
     88      1.1  minoura #define SPC_USE_DWORDS		0
     89      1.1  minoura 
     90      1.1  minoura /* Synchronous data transfers? */
     91      1.1  minoura #define SPC_USE_SYNCHRONOUS	0
     92      1.1  minoura #define SPC_SYNC_REQ_ACK_OFS 	8
     93      1.1  minoura 
     94      1.1  minoura /* Wide data transfers? */
     95      1.1  minoura #define	SPC_USE_WIDE		0
     96      1.1  minoura #define	SPC_MAX_WIDTH		0
     97      1.1  minoura 
     98      1.1  minoura /* Max attempts made to transmit a message */
     99      1.1  minoura #define SPC_MSG_MAX_ATTEMPT	3 /* Not used now XXX */
    100      1.1  minoura 
    101      1.1  minoura /*
    102      1.1  minoura  * Some spin loop parameters (essentially how long to wait some places)
    103      1.1  minoura  * The problem(?) is that sometimes we expect either to be able to transmit a
    104      1.1  minoura  * byte or to get a new one from the SCSI bus pretty soon.  In order to avoid
    105      1.1  minoura  * returning from the interrupt just to get yanked back for the next byte we
    106      1.1  minoura  * may spin in the interrupt routine waiting for this byte to come.  How long?
    107      1.1  minoura  * This is really (SCSI) device and processor dependent.  Tuneable, I guess.
    108      1.1  minoura  */
    109      1.1  minoura #define SPC_MSGIN_SPIN	1 	/* Will spinwait upto ?ms for a new msg byte */
    110      1.1  minoura #define SPC_MSGOUT_SPIN	1
    111      1.1  minoura 
    112      1.1  minoura /* Include debug functions?  At the end of this file there are a bunch of
    113      1.1  minoura  * functions that will print out various information regarding queued SCSI
    114      1.1  minoura  * commands, driver state and chip contents.  You can call them from the
    115      1.1  minoura  * kernel debugger.  If you set SPC_DEBUG to 0 they are not included (the
    116      1.1  minoura  * kernel uses less memory) but you lose the debugging facilities.
    117      1.1  minoura  */
    118      1.1  minoura #define SPC_DEBUG		1
    119      1.1  minoura 
    120      1.1  minoura #define	SPC_ABORT_TIMEOUT	2000	/* time to wait for abort */
    121      1.1  minoura 
    122      1.1  minoura /* End of customizable parameters */
    123      1.1  minoura 
    124      1.1  minoura /*
    125      1.1  minoura  * MB89352 SCSI Protocol Controller (SPC) routines.
    126      1.1  minoura  */
    127      1.1  minoura 
    128      1.1  minoura #include "opt_ddb.h"
    129      1.1  minoura 
    130      1.1  minoura #include <sys/types.h>
    131      1.1  minoura #include <sys/param.h>
    132      1.1  minoura #include <sys/systm.h>
    133      1.1  minoura #include <sys/kernel.h>
    134      1.1  minoura #include <sys/errno.h>
    135      1.1  minoura #include <sys/ioctl.h>
    136      1.1  minoura #include <sys/device.h>
    137      1.1  minoura #include <sys/buf.h>
    138      1.1  minoura #include <sys/proc.h>
    139      1.1  minoura #include <sys/user.h>
    140      1.1  minoura #include <sys/queue.h>
    141      1.1  minoura 
    142      1.1  minoura #include <machine/intr.h>
    143      1.1  minoura #include <machine/bus.h>
    144      1.1  minoura 
    145      1.1  minoura #include <dev/scsipi/scsi_all.h>
    146      1.1  minoura #include <dev/scsipi/scsipi_all.h>
    147      1.1  minoura #include <dev/scsipi/scsi_message.h>
    148      1.1  minoura #include <dev/scsipi/scsiconf.h>
    149      1.1  minoura 
    150      1.1  minoura #include <dev/ic/mb89352reg.h>
    151      1.1  minoura #include <dev/ic/mb89352var.h>
    152      1.1  minoura 
    153      1.1  minoura #ifndef DDB
    155      1.1  minoura #define	Debugger() panic("should call debugger here (mb89352.c)")
    156      1.1  minoura #endif /* ! DDB */
    157      1.1  minoura 
    158      1.1  minoura #if SPC_DEBUG
    159      1.1  minoura int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */
    160      1.1  minoura #endif
    161      1.1  minoura 
    162      1.1  minoura void	spc_minphys	__P((struct buf *));
    163      1.1  minoura void	spc_done	__P((struct spc_softc *, struct spc_acb *));
    164  1.5.6.1  nathanw void	spc_dequeue	__P((struct spc_softc *, struct spc_acb *));
    165  1.5.6.1  nathanw void	spc_scsipi_request __P((struct scsipi_channel *,
    166      1.1  minoura 				scsipi_adapter_req_t, void *));
    167      1.1  minoura int	spc_poll	__P((struct spc_softc *, struct scsipi_xfer *, int));
    168      1.1  minoura integrate void	spc_sched_msgout __P((struct spc_softc *, u_char));
    169      1.1  minoura integrate void	spc_setsync	__P((struct spc_softc *, struct spc_tinfo *));
    170      1.1  minoura void	spc_select	__P((struct spc_softc *, struct spc_acb *));
    171      1.1  minoura void	spc_timeout	__P((void *));
    172      1.1  minoura void	spc_scsi_reset	__P((struct spc_softc *));
    173      1.1  minoura void	spc_reset	__P((struct spc_softc *));
    174  1.5.6.1  nathanw void	spc_free_acb	__P((struct spc_softc *, struct spc_acb *, int));
    175      1.1  minoura struct spc_acb* spc_get_acb __P((struct spc_softc *));
    176      1.1  minoura int	spc_reselect	__P((struct spc_softc *, int));
    177      1.1  minoura void	spc_msgin	__P((struct spc_softc *));
    178      1.1  minoura void	spc_abort	__P((struct spc_softc *, struct spc_acb *));
    179      1.1  minoura void	spc_msgout	__P((struct spc_softc *));
    180      1.1  minoura int	spc_dataout_pio	__P((struct spc_softc *, u_char *, int));
    181      1.1  minoura int	spc_datain_pio	__P((struct spc_softc *, u_char *, int));
    182      1.1  minoura #if SPC_DEBUG
    183      1.1  minoura void	spc_print_acb	__P((struct spc_acb *));
    184      1.1  minoura void	spc_dump_driver __P((struct spc_softc *));
    185      1.1  minoura void	spc_dump89352	__P((struct spc_softc *));
    186      1.1  minoura void	spc_show_scsi_cmd __P((struct spc_acb *));
    187      1.1  minoura void	spc_print_active_acb __P((void));
    188      1.1  minoura #endif
    189      1.1  minoura 
    190      1.1  minoura extern struct cfdriver spc_cd;
    191      1.1  minoura 
    192      1.1  minoura 
    193      1.1  minoura /*
    195      1.1  minoura  * INITIALIZATION ROUTINES (probe, attach ++)
    196      1.3  minoura  */
    197      1.3  minoura 
    198      1.1  minoura /*
    199      1.1  minoura  * Do the real search-for-device.
    200      1.1  minoura  * Prerequisite: sc->sc_iobase should be set to the proper value
    201      1.1  minoura  */
    202      1.1  minoura int
    203      1.1  minoura spc_find(iot, ioh, bdid)
    204      1.1  minoura 	bus_space_tag_t iot;
    205      1.1  minoura 	bus_space_handle_t ioh;
    206      1.1  minoura 	int bdid;
    207      1.1  minoura {
    208      1.1  minoura 	long timeout = SPC_ABORT_TIMEOUT;
    209      1.1  minoura 
    210      1.1  minoura 	SPC_TRACE(("spc: probing for spc-chip\n"));
    211      1.1  minoura 	/*
    212      1.1  minoura 	 * Disable interrupts then reset the FUJITSU chip.
    213      1.1  minoura 	 */
    214      1.1  minoura 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
    215      1.1  minoura 	bus_space_write_1(iot, ioh, SCMD, 0);
    216      1.1  minoura 	bus_space_write_1(iot, ioh, PCTL, 0);
    217      1.1  minoura 	bus_space_write_1(iot, ioh, TEMP, 0);
    218      1.1  minoura 	bus_space_write_1(iot, ioh, TCH, 0);
    219      1.1  minoura 	bus_space_write_1(iot, ioh, TCM, 0);
    220      1.1  minoura 	bus_space_write_1(iot, ioh, TCL, 0);
    221      1.1  minoura 	bus_space_write_1(iot, ioh, INTS, 0);
    222      1.1  minoura 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
    223      1.1  minoura 	bus_space_write_1(iot, ioh, BDID, bdid);
    224      1.1  minoura 	delay(400);
    225      1.1  minoura 	bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
    226      1.1  minoura 
    227      1.1  minoura 	/* The following detection is derived from spc.c
    228      1.1  minoura 	 * (by Takahide Matsutsuka) in FreeBSD/pccard-test.
    229      1.1  minoura 	 */
    230      1.1  minoura 	while (bus_space_read_1(iot, ioh, PSNS) && timeout)
    231      1.1  minoura 		timeout--;
    232      1.1  minoura 	if (!timeout) {
    233      1.1  minoura 		printf("spc: find failed\n");
    234      1.1  minoura 		return 0;
    235      1.1  minoura 	}
    236      1.1  minoura 
    237      1.1  minoura 	SPC_START(("SPC found"));
    238      1.1  minoura 	return 1;
    239      1.1  minoura }
    240      1.1  minoura 
    241      1.1  minoura void
    242      1.1  minoura spcattach(sc)
    243      1.1  minoura 	struct spc_softc *sc;
    244      1.1  minoura {
    245      1.1  minoura 
    246      1.1  minoura 	SPC_TRACE(("spcattach  "));
    247      1.1  minoura 	sc->sc_state = SPC_INIT;
    248      1.1  minoura 
    249      1.1  minoura 	sc->sc_freq = 20;	/* XXXX Assume 20 MHz. */
    250      1.1  minoura 
    251      1.1  minoura #if SPC_USE_SYNCHRONOUS
    252      1.1  minoura 	/*
    253      1.1  minoura 	 * These are the bounds of the sync period, based on the frequency of
    254      1.1  minoura 	 * the chip's clock input and the size and offset of the sync period
    255      1.1  minoura 	 * register.
    256      1.1  minoura 	 *
    257      1.1  minoura 	 * For a 20Mhz clock, this gives us 25, or 100nS, or 10MB/s, as a
    258      1.1  minoura 	 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
    259      1.1  minoura 	 * minimum transfer rate.
    260      1.1  minoura 	 */
    261      1.1  minoura 	sc->sc_minsync = (2 * 250) / sc->sc_freq;
    262      1.1  minoura 	sc->sc_maxsync = (9 * 250) / sc->sc_freq;
    263      1.1  minoura #endif
    264      1.1  minoura 
    265      1.1  minoura 	spc_init(sc);	/* Init chip and driver */
    266      1.1  minoura 
    267      1.1  minoura 	/*
    268  1.5.6.1  nathanw 	 * Fill in the adapter.
    269  1.5.6.1  nathanw 	 */
    270  1.5.6.1  nathanw 	sc->sc_adapter.adapt_dev = &sc->sc_dev;
    271  1.5.6.1  nathanw 	sc->sc_adapter.adapt_nchannels = 1;
    272  1.5.6.1  nathanw 	sc->sc_adapter.adapt_openings = 7;
    273  1.5.6.1  nathanw 	sc->sc_adapter.adapt_max_periph = 1;
    274  1.5.6.1  nathanw 	sc->sc_adapter.adapt_minphys = spc_minphys;
    275  1.5.6.1  nathanw 	sc->sc_adapter.adapt_request = spc_scsipi_request;
    276  1.5.6.1  nathanw 
    277  1.5.6.1  nathanw 	sc->sc_channel.chan_adapter = &sc->sc_adapter;
    278  1.5.6.1  nathanw 	sc->sc_channel.chan_bustype = &scsi_bustype;
    279  1.5.6.1  nathanw 	sc->sc_channel.chan_channel = 0;
    280  1.5.6.1  nathanw 	sc->sc_channel.chan_ntargets = 8;
    281      1.1  minoura 	sc->sc_channel.chan_nluns = 8;
    282      1.1  minoura 	sc->sc_channel.chan_id = sc->sc_initiator;
    283      1.1  minoura 
    284      1.1  minoura 	/*
    285  1.5.6.1  nathanw 	 * ask the adapter what subunits are present
    286      1.1  minoura 	 */
    287      1.1  minoura 	config_found((struct device*)sc, &sc->sc_channel, scsiprint);
    288      1.3  minoura }
    289      1.3  minoura 
    290      1.1  minoura /*
    291      1.1  minoura  * Initialize MB89352 chip itself
    292      1.1  minoura  * The following conditions should hold:
    293      1.1  minoura  * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc
    294      1.1  minoura  * must be valid.
    295      1.1  minoura  */
    296      1.1  minoura void
    297      1.1  minoura spc_reset(sc)
    298      1.1  minoura 	struct spc_softc *sc;
    299      1.1  minoura {
    300      1.1  minoura 	bus_space_tag_t iot = sc->sc_iot;
    301      1.1  minoura 	bus_space_handle_t ioh = sc->sc_ioh;
    302      1.1  minoura 
    303      1.1  minoura 	SPC_TRACE(("spc_reset  "));
    304      1.1  minoura 	/*
    305      1.1  minoura 	 * Disable interrupts then reset the FUJITSU chip.
    306      1.1  minoura 	 */
    307      1.1  minoura 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
    308      1.1  minoura 	bus_space_write_1(iot, ioh, SCMD, 0);
    309      1.1  minoura 	bus_space_write_1(iot, ioh, PCTL, 0);
    310      1.1  minoura 	bus_space_write_1(iot, ioh, TEMP, 0);
    311      1.1  minoura 	bus_space_write_1(iot, ioh, TCH, 0);
    312      1.1  minoura 	bus_space_write_1(iot, ioh, TCM, 0);
    313      1.1  minoura 	bus_space_write_1(iot, ioh, TCL, 0);
    314      1.1  minoura 	bus_space_write_1(iot, ioh, INTS, 0);
    315      1.1  minoura 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
    316      1.1  minoura 	bus_space_write_1(iot, ioh, BDID, sc->sc_initiator);
    317      1.1  minoura 	delay(400);
    318      1.1  minoura 	bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
    319      1.1  minoura }
    320      1.1  minoura 
    321      1.1  minoura 
    322      1.1  minoura /*
    323      1.1  minoura  * Pull the SCSI RST line for 500us.
    324      1.1  minoura  */
    325      1.1  minoura void
    326      1.1  minoura spc_scsi_reset(sc)
    327      1.1  minoura 	struct spc_softc *sc;
    328      1.1  minoura {
    329      1.1  minoura 	bus_space_tag_t iot = sc->sc_iot;
    330      1.1  minoura 	bus_space_handle_t ioh = sc->sc_ioh;
    331      1.1  minoura 
    332      1.1  minoura 	SPC_TRACE(("spc_scsi_reset  "));
    333      1.1  minoura 	bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) | SCMD_RST);
    334      1.1  minoura 	delay(500);
    335      1.1  minoura 	bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST);
    336      1.1  minoura 	delay(50);
    337      1.1  minoura }
    338      1.1  minoura 
    339      1.1  minoura /*
    340      1.1  minoura  * Initialize spc SCSI driver.
    341      1.1  minoura  */
    342      1.1  minoura void
    343      1.1  minoura spc_init(sc)
    344      1.1  minoura 	struct spc_softc *sc;
    345      1.1  minoura {
    346      1.1  minoura 	struct spc_acb *acb;
    347      1.1  minoura 	int r;
    348      1.1  minoura 
    349      1.1  minoura 	SPC_TRACE(("spc_init  "));
    350      1.1  minoura 	spc_reset(sc);
    351      1.1  minoura 	spc_scsi_reset(sc);
    352      1.1  minoura 	spc_reset(sc);
    353      1.1  minoura 
    354      1.1  minoura 	if (sc->sc_state == SPC_INIT) {
    355      1.1  minoura 		/* First time through; initialize. */
    356      1.1  minoura 		TAILQ_INIT(&sc->ready_list);
    357      1.1  minoura 		TAILQ_INIT(&sc->nexus_list);
    358      1.1  minoura 		TAILQ_INIT(&sc->free_list);
    359  1.5.6.2  nathanw 		sc->sc_nexus = NULL;
    360      1.1  minoura 		acb = sc->sc_acb;
    361      1.1  minoura 		memset(acb, 0, sizeof(sc->sc_acb));
    362      1.1  minoura 		for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
    363      1.1  minoura 			TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
    364  1.5.6.2  nathanw 			acb++;
    365      1.1  minoura 		}
    366      1.1  minoura 		memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
    367      1.1  minoura 	} else {
    368      1.1  minoura 		/* Cancel any active commands. */
    369      1.1  minoura 		sc->sc_state = SPC_CLEANING;
    370      1.5  thorpej 		if ((acb = sc->sc_nexus) != NULL) {
    371      1.1  minoura 			acb->xs->error = XS_DRIVER_STUFFUP;
    372      1.1  minoura 			callout_stop(&acb->xs->xs_callout);
    373      1.1  minoura 			spc_done(sc, acb);
    374      1.1  minoura 		}
    375      1.5  thorpej 		while ((acb = sc->nexus_list.tqh_first) != NULL) {
    376      1.1  minoura 			acb->xs->error = XS_DRIVER_STUFFUP;
    377      1.1  minoura 			callout_stop(&acb->xs->xs_callout);
    378      1.1  minoura 			spc_done(sc, acb);
    379      1.1  minoura 		}
    380      1.1  minoura 	}
    381      1.1  minoura 
    382      1.1  minoura 	sc->sc_prevphase = PH_INVALID;
    383      1.1  minoura 	for (r = 0; r < 8; r++) {
    384      1.1  minoura 		struct spc_tinfo *ti = &sc->sc_tinfo[r];
    385      1.1  minoura 
    386      1.1  minoura 		ti->flags = 0;
    387      1.1  minoura #if SPC_USE_SYNCHRONOUS
    388      1.1  minoura 		ti->flags |= DO_SYNC;
    389      1.1  minoura 		ti->period = sc->sc_minsync;
    390      1.1  minoura 		ti->offset = SPC_SYNC_REQ_ACK_OFS;
    391      1.1  minoura #else
    392      1.1  minoura 		ti->period = ti->offset = 0;
    393      1.1  minoura #endif
    394      1.1  minoura #if SPC_USE_WIDE
    395      1.1  minoura 		ti->flags |= DO_WIDE;
    396      1.1  minoura 		ti->width = SPC_MAX_WIDTH;
    397      1.1  minoura #else
    398      1.1  minoura 		ti->width = 0;
    399      1.1  minoura #endif
    400      1.1  minoura 	}
    401      1.1  minoura 
    402      1.1  minoura 	sc->sc_state = SPC_IDLE;
    403      1.1  minoura 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL,
    404      1.1  minoura 	    bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB);
    405      1.1  minoura }
    406      1.1  minoura 
    407      1.1  minoura void
    408      1.1  minoura spc_free_acb(sc, acb, flags)
    409      1.1  minoura 	struct spc_softc *sc;
    410      1.1  minoura 	struct spc_acb *acb;
    411      1.1  minoura 	int flags;
    412      1.1  minoura {
    413      1.1  minoura 	int s;
    414      1.1  minoura 
    415      1.1  minoura 	SPC_TRACE(("spc_free_acb  "));
    416      1.1  minoura 	s = splbio();
    417      1.1  minoura 
    418      1.1  minoura 	acb->flags = 0;
    419      1.1  minoura 	TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
    420      1.1  minoura 	splx(s);
    421      1.1  minoura }
    422  1.5.6.1  nathanw 
    423      1.1  minoura struct spc_acb *
    424      1.1  minoura spc_get_acb(sc)
    425      1.1  minoura 	struct spc_softc *sc;
    426      1.1  minoura {
    427      1.1  minoura 	struct spc_acb *acb;
    428      1.1  minoura 	int s;
    429      1.1  minoura 
    430  1.5.6.1  nathanw 	SPC_TRACE(("spc_get_acb  "));
    431  1.5.6.1  nathanw 	s = splbio();
    432      1.1  minoura 	acb = TAILQ_FIRST(&sc->free_list);
    433      1.1  minoura 	if (acb != NULL) {
    434      1.1  minoura 		TAILQ_REMOVE(&sc->free_list, acb, chain);
    435      1.1  minoura 		acb->flags |= ACB_ALLOC;
    436      1.1  minoura 	}
    437      1.1  minoura 	splx(s);
    438      1.1  minoura 	return acb;
    439      1.1  minoura }
    440      1.1  minoura 
    441      1.1  minoura /*
    443      1.1  minoura  * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
    444      1.1  minoura  */
    445      1.1  minoura 
    446      1.1  minoura /*
    447      1.1  minoura  * Expected sequence:
    448      1.1  minoura  * 1) Command inserted into ready list
    449      1.1  minoura  * 2) Command selected for execution
    450      1.1  minoura  * 3) Command won arbitration and has selected target device
    451      1.1  minoura  * 4) Send message out (identify message, eventually also sync.negotiations)
    452      1.1  minoura  * 5) Send command
    453      1.1  minoura  * 5a) Receive disconnect message, disconnect.
    454      1.1  minoura  * 5b) Reselected by target
    455      1.1  minoura  * 5c) Receive identify message from target.
    456      1.1  minoura  * 6) Send or receive data
    457      1.1  minoura  * 7) Receive status
    458      1.1  minoura  * 8) Receive message (command complete etc.)
    459      1.1  minoura  */
    460      1.1  minoura 
    461      1.1  minoura /*
    462      1.1  minoura  * Start a SCSI-command
    463  1.5.6.1  nathanw  * This function is called by the higher level SCSI-driver to queue/run
    464  1.5.6.1  nathanw  * SCSI-commands.
    465  1.5.6.1  nathanw  */
    466  1.5.6.1  nathanw void
    467  1.5.6.1  nathanw spc_scsipi_request(chan, req, arg)
    468      1.1  minoura 	struct scsipi_channel *chan;
    469  1.5.6.1  nathanw 	scsipi_adapter_req_t req;
    470  1.5.6.1  nathanw 	void *arg;
    471  1.5.6.1  nathanw {
    472      1.1  minoura 	struct scsipi_xfer *xs;
    473      1.1  minoura 	struct scsipi_periph *periph;
    474      1.1  minoura 	struct spc_softc *sc = (void *)chan->chan_adapter->adapt_dev;
    475  1.5.6.1  nathanw 	struct spc_acb *acb;
    476  1.5.6.1  nathanw 	int s, flags;
    477  1.5.6.1  nathanw 
    478  1.5.6.1  nathanw 	switch (req) {
    479  1.5.6.1  nathanw 	case ADAPTER_REQ_RUN_XFER:
    480  1.5.6.1  nathanw 		xs = arg;
    481  1.5.6.1  nathanw 		periph = xs->xs_periph;
    482  1.5.6.1  nathanw 		SPC_TRACE(("spc_scsipi_request  "));
    483  1.5.6.1  nathanw 		SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
    484  1.5.6.1  nathanw 		    periph->periph_target));
    485  1.5.6.1  nathanw 
    486  1.5.6.1  nathanw 		flags = xs->xs_control;
    487  1.5.6.1  nathanw 		if ((acb = spc_get_acb(sc)) == NULL) {
    488  1.5.6.1  nathanw 			xs->error = XS_DRIVER_STUFFUP;
    489  1.5.6.1  nathanw 			scsipi_done(xs);
    490  1.5.6.1  nathanw 			return;
    491  1.5.6.1  nathanw 		}
    492  1.5.6.1  nathanw 
    493  1.5.6.1  nathanw 		/* Initialize acb */
    494  1.5.6.1  nathanw 		acb->xs = xs;
    495  1.5.6.1  nathanw 		acb->timeout = xs->timeout;
    496  1.5.6.1  nathanw 
    497  1.5.6.1  nathanw 		if (xs->xs_control & XS_CTL_RESET) {
    498  1.5.6.1  nathanw 			acb->flags |= ACB_RESET;
    499  1.5.6.2  nathanw 			acb->scsipi_cmd_length = 0;
    500      1.1  minoura 			acb->data_length = 0;
    501  1.5.6.1  nathanw 		} else {
    502      1.1  minoura 			memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen);
    503  1.5.6.1  nathanw #if 1
    504  1.5.6.1  nathanw 			acb->scsipi_cmd.bytes[0] |= periph->periph_lun << 5; /* XXX? */
    505  1.5.6.1  nathanw #endif
    506  1.5.6.1  nathanw 			acb->scsipi_cmd_length = xs->cmdlen;
    507  1.5.6.1  nathanw 			acb->data_addr = xs->data;
    508      1.1  minoura 			acb->data_length = xs->datalen;
    509  1.5.6.1  nathanw 		}
    510      1.1  minoura 		acb->target_stat = 0;
    511  1.5.6.1  nathanw 
    512  1.5.6.1  nathanw 		s = splbio();
    513  1.5.6.1  nathanw 
    514  1.5.6.1  nathanw 		TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
    515  1.5.6.1  nathanw 		/*
    516  1.5.6.1  nathanw 		 * Start scheduling unless a queue process is in progress.
    517  1.5.6.1  nathanw 		 */
    518  1.5.6.1  nathanw 		if (sc->sc_state == SPC_IDLE)
    519  1.5.6.1  nathanw 			spc_sched(sc);
    520  1.5.6.1  nathanw 		/*
    521      1.1  minoura 		 * After successful sending, check if we should return just now.
    522  1.5.6.1  nathanw 		 * If so, return SUCCESSFULLY_QUEUED.
    523      1.1  minoura 		 */
    524  1.5.6.1  nathanw 
    525  1.5.6.1  nathanw 		splx(s);
    526      1.1  minoura 
    527  1.5.6.1  nathanw 		if ((flags & XS_CTL_POLL) == 0)
    528  1.5.6.1  nathanw 			return;
    529  1.5.6.1  nathanw 
    530      1.1  minoura 		/* Not allowed to use interrupts, use polling instead */
    531  1.5.6.1  nathanw 		s = splbio();
    532  1.5.6.1  nathanw 		if (spc_poll(sc, xs, acb->timeout)) {
    533  1.5.6.1  nathanw 			spc_timeout(acb);
    534  1.5.6.1  nathanw 			if (spc_poll(sc, xs, acb->timeout))
    535  1.5.6.1  nathanw 				spc_timeout(acb);
    536  1.5.6.1  nathanw 		}
    537  1.5.6.1  nathanw 		splx(s);
    538  1.5.6.1  nathanw 		return;
    539  1.5.6.1  nathanw 	case ADAPTER_REQ_GROW_RESOURCES:
    540  1.5.6.1  nathanw 		/* XXX Not supported. */
    541  1.5.6.1  nathanw 		return;
    542      1.1  minoura 	case ADAPTER_REQ_SET_XFER_MODE:
    543      1.1  minoura 		/* XXX Not supported. */
    544      1.1  minoura 		return;
    545      1.1  minoura 	}
    546      1.1  minoura }
    547      1.1  minoura 
    548      1.1  minoura /*
    549      1.1  minoura  * Adjust transfer size in buffer structure
    550      1.1  minoura  */
    551      1.1  minoura void
    552      1.1  minoura spc_minphys(bp)
    553      1.1  minoura 	struct buf *bp;
    554      1.1  minoura {
    555      1.1  minoura 
    556      1.1  minoura 	SPC_TRACE(("spc_minphys  "));
    557      1.1  minoura 	minphys(bp);
    558      1.1  minoura }
    559      1.1  minoura 
    560      1.1  minoura /*
    561      1.1  minoura  * Used when interrupt driven I/O isn't allowed, e.g. during boot.
    562      1.1  minoura  */
    563      1.1  minoura int
    564      1.1  minoura spc_poll(sc, xs, count)
    565      1.1  minoura 	struct spc_softc *sc;
    566      1.1  minoura 	struct scsipi_xfer *xs;
    567      1.1  minoura 	int count;
    568      1.1  minoura {
    569      1.1  minoura 	bus_space_tag_t iot = sc->sc_iot;
    570      1.1  minoura 	bus_space_handle_t ioh = sc->sc_ioh;
    571      1.1  minoura 
    572      1.1  minoura 	SPC_TRACE(("spc_poll  "));
    573      1.1  minoura 	while (count) {
    574      1.1  minoura 		/*
    575      1.1  minoura 		 * If we had interrupts enabled, would we
    576      1.1  minoura 		 * have got an interrupt?
    577      1.4  thorpej 		 */
    578      1.1  minoura 		if (bus_space_read_1(iot, ioh, INTS) != 0)
    579      1.1  minoura 			spcintr(sc);
    580      1.1  minoura 		if ((xs->xs_status & XS_STS_DONE) != 0)
    581      1.1  minoura 			return 0;
    582      1.1  minoura 		delay(1000);
    583      1.1  minoura 		count--;
    584      1.1  minoura 	}
    585      1.1  minoura 	return 1;
    586      1.1  minoura }
    587      1.1  minoura 
    588      1.1  minoura /*
    590      1.1  minoura  * LOW LEVEL SCSI UTILITIES
    591      1.1  minoura  */
    592      1.1  minoura 
    593      1.1  minoura integrate void
    594      1.1  minoura spc_sched_msgout(sc, m)
    595      1.1  minoura 	struct spc_softc *sc;
    596      1.1  minoura 	u_char m;
    597      1.1  minoura {
    598      1.1  minoura 	bus_space_tag_t iot = sc->sc_iot;
    599      1.1  minoura 	bus_space_handle_t ioh = sc->sc_ioh;
    600      1.1  minoura 
    601      1.1  minoura 	SPC_TRACE(("spc_sched_msgout  "));
    602      1.1  minoura 	if (sc->sc_msgpriq == 0)
    603      1.1  minoura 		bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
    604      1.1  minoura 	sc->sc_msgpriq |= m;
    605      1.1  minoura }
    606      1.1  minoura 
    607      1.1  minoura /*
    608      1.1  minoura  * Set synchronous transfer offset and period.
    609      1.1  minoura  */
    610      1.1  minoura integrate void
    611      1.1  minoura spc_setsync(sc, ti)
    612      1.1  minoura 	struct spc_softc *sc;
    613      1.1  minoura 	struct spc_tinfo *ti;
    614      1.1  minoura {
    615      1.1  minoura #if SPC_USE_SYNCHRONOUS
    616      1.1  minoura 	bus_space_tag_t iot = sc->sc_iot;
    617      1.1  minoura 	bus_space_handle_t ioh = sc->sc_ioh;
    618      1.1  minoura 
    619      1.1  minoura 	SPC_TRACE(("spc_setsync  "));
    620      1.1  minoura 	if (ti->offset != 0)
    621      1.1  minoura 		bus_space_write_1(iot, ioh, TMOD,
    622      1.1  minoura 		    ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
    623      1.1  minoura 	else
    624      1.1  minoura 		bus_space_write_1(iot, ioh, TMOD, 0);
    625  1.5.6.1  nathanw #endif
    626      1.1  minoura }
    627      1.1  minoura 
    628      1.1  minoura /*
    629      1.1  minoura  * Start a selection.  This is used by spc_sched() to select an idle target.
    630      1.1  minoura  */
    631      1.1  minoura void
    632  1.5.6.1  nathanw spc_select(sc, acb)
    633  1.5.6.1  nathanw 	struct spc_softc *sc;
    634      1.1  minoura 	struct spc_acb *acb;
    635      1.1  minoura {
    636      1.1  minoura 	struct scsipi_periph *periph = acb->xs->xs_periph;
    637      1.1  minoura 	int target = periph->periph_target;
    638      1.1  minoura 	struct spc_tinfo *ti = &sc->sc_tinfo[target];
    639      1.1  minoura 	bus_space_tag_t iot = sc->sc_iot;
    640      1.1  minoura 	bus_space_handle_t ioh = sc->sc_ioh;
    641      1.1  minoura 
    642      1.1  minoura 	SPC_TRACE(("spc_select  "));
    643      1.1  minoura 	spc_setsync(sc, ti);
    644      1.1  minoura 
    645      1.1  minoura #if 0
    646      1.1  minoura 	bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
    647      1.1  minoura #endif
    648      1.1  minoura #ifdef x68k			/* XXX? */
    649      1.1  minoura 	do {
    650      1.1  minoura 		asm ("nop");
    651      1.1  minoura 	} while (bus_space_read_1(iot, ioh, SSTS) &
    652      1.1  minoura 		 (SSTS_ACTIVE|SSTS_TARGET|SSTS_BUSY));
    653      1.1  minoura #endif
    654      1.2  minoura 
    655      1.2  minoura 	bus_space_write_1(iot, ioh, PCTL, 0);
    656      1.2  minoura 	bus_space_write_1(iot, ioh, TEMP, (1 << sc->sc_initiator) | (1 << target));
    657      1.2  minoura 	/*
    658      1.1  minoura 	 * Setup BSY timeout (selection timeout).
    659      1.1  minoura 	 * 250ms according to the SCSI specification.
    660      1.1  minoura 	 * T = (X * 256 + 15) * Tclf * 2  (Tclf = 200ns on x68k)
    661      1.1  minoura 	 * To setup 256ms timeout,
    662      1.2  minoura 	 * 128000ns/200ns = X * 256 + 15
    663      1.1  minoura 	 * 640 - 15 = X * 256
    664      1.1  minoura 	 * X = 625 / 256
    665      1.1  minoura 	 * X = 2 + 113 / 256
    666      1.2  minoura 	 *  ==> tch = 2, tcm = 113 (correct?)
    667      1.1  minoura 	 */
    668      1.1  minoura 	bus_space_write_1(iot, ioh, TCH, 2);
    669      1.1  minoura 	bus_space_write_1(iot, ioh, TCM, 113);
    670      1.1  minoura 	/* Time to the information transfer phase start. */
    671      1.1  minoura 	bus_space_write_1(iot, ioh, TCL, 3);
    672      1.1  minoura 	bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT);
    673      1.1  minoura 
    674      1.1  minoura 	sc->sc_state = SPC_SELECTING;
    675      1.1  minoura }
    676      1.1  minoura 
    677      1.1  minoura int
    678      1.1  minoura spc_reselect(sc, message)
    679      1.1  minoura 	struct spc_softc *sc;
    680  1.5.6.1  nathanw 	int message;
    681      1.1  minoura {
    682      1.1  minoura 	u_char selid, target, lun;
    683      1.1  minoura 	struct spc_acb *acb;
    684      1.1  minoura 	struct scsipi_periph *periph;
    685      1.1  minoura 	struct spc_tinfo *ti;
    686      1.1  minoura 
    687      1.1  minoura 	SPC_TRACE(("spc_reselect  "));
    688      1.1  minoura 	/*
    689      1.1  minoura 	 * The SCSI chip made a snapshot of the data bus while the reselection
    690      1.1  minoura 	 * was being negotiated.  This enables us to determine which target did
    691      1.1  minoura 	 * the reselect.
    692      1.1  minoura 	 */
    693      1.1  minoura 	selid = sc->sc_selid & ~(1 << sc->sc_initiator);
    694      1.1  minoura 	if (selid & (selid - 1)) {
    695      1.1  minoura 		printf("%s: reselect with invalid selid %02x; sending DEVICE RESET\n",
    696      1.1  minoura 		    sc->sc_dev.dv_xname, selid);
    697      1.1  minoura 		SPC_BREAK();
    698      1.1  minoura 		goto reset;
    699      1.1  minoura 	}
    700      1.1  minoura 
    701      1.1  minoura 	/*
    702      1.1  minoura 	 * Search wait queue for disconnected cmd
    703      1.1  minoura 	 * The list should be short, so I haven't bothered with
    704      1.1  minoura 	 * any more sophisticated structures than a simple
    705      1.1  minoura 	 * singly linked list.
    706      1.1  minoura 	 */
    707  1.5.6.1  nathanw 	target = ffs(selid) - 1;
    708  1.5.6.1  nathanw 	lun = message & 0x07;
    709  1.5.6.1  nathanw 	for (acb = sc->nexus_list.tqh_first; acb != NULL;
    710      1.1  minoura 	     acb = acb->chain.tqe_next) {
    711      1.1  minoura 		periph = acb->xs->xs_periph;
    712      1.1  minoura 		if (periph->periph_target == target &&
    713      1.1  minoura 		    periph->periph_lun == lun)
    714      1.1  minoura 			break;
    715      1.1  minoura 	}
    716      1.1  minoura 	if (acb == NULL) {
    717      1.1  minoura 		printf("%s: reselect from target %d lun %d with no nexus; sending ABORT\n",
    718      1.1  minoura 		    sc->sc_dev.dv_xname, target, lun);
    719      1.1  minoura 		SPC_BREAK();
    720      1.1  minoura 		goto abort;
    721      1.1  minoura 	}
    722      1.1  minoura 
    723      1.1  minoura 	/* Make this nexus active again. */
    724      1.1  minoura 	TAILQ_REMOVE(&sc->nexus_list, acb, chain);
    725      1.1  minoura 	sc->sc_state = SPC_CONNECTED;
    726      1.1  minoura 	sc->sc_nexus = acb;
    727      1.1  minoura 	ti = &sc->sc_tinfo[target];
    728      1.1  minoura 	ti->lubusy |= (1 << lun);
    729      1.1  minoura 	spc_setsync(sc, ti);
    730      1.1  minoura 
    731      1.1  minoura 	if (acb->flags & ACB_RESET)
    732      1.1  minoura 		spc_sched_msgout(sc, SEND_DEV_RESET);
    733      1.1  minoura 	else if (acb->flags & ACB_ABORT)
    734      1.1  minoura 		spc_sched_msgout(sc, SEND_ABORT);
    735      1.1  minoura 
    736      1.1  minoura 	/* Do an implicit RESTORE POINTERS. */
    737      1.1  minoura 	sc->sc_dp = acb->data_addr;
    738      1.1  minoura 	sc->sc_dleft = acb->data_length;
    739      1.1  minoura 	sc->sc_cp = (u_char *)&acb->scsipi_cmd;
    740      1.1  minoura 	sc->sc_cleft = acb->scsipi_cmd_length;
    741      1.1  minoura 
    742      1.1  minoura 	return (0);
    743      1.1  minoura 
    744      1.1  minoura reset:
    745      1.1  minoura 	spc_sched_msgout(sc, SEND_DEV_RESET);
    746      1.1  minoura 	return (1);
    747      1.1  minoura 
    748      1.1  minoura abort:
    749      1.1  minoura 	spc_sched_msgout(sc, SEND_ABORT);
    750      1.1  minoura 	return (1);
    751      1.1  minoura }
    752      1.1  minoura 
    753      1.1  minoura /*
    755      1.1  minoura  * Schedule a SCSI operation.  This has now been pulled out of the interrupt
    756      1.1  minoura  * handler so that we may call it from spc_scsi_cmd and spc_done.  This may
    757      1.3  minoura  * save us an unecessary interrupt just to get things going.  Should only be
    758      1.1  minoura  * called when state == SPC_IDLE and at bio pl.
    759      1.1  minoura  */
    760  1.5.6.1  nathanw void
    761      1.1  minoura spc_sched(sc)
    762      1.1  minoura 	struct spc_softc *sc;
    763      1.1  minoura {
    764      1.1  minoura 	struct spc_acb *acb;
    765      1.1  minoura 	struct scsipi_periph *periph;
    766      1.1  minoura 	struct spc_tinfo *ti;
    767      1.1  minoura 
    768      1.1  minoura 	/* missing the hw, just return and wait for our hw */
    769      1.1  minoura 	if (sc->sc_flags & SPC_INACTIVE)
    770      1.1  minoura 		return;
    771      1.1  minoura 	SPC_TRACE(("spc_sched  "));
    772      1.1  minoura 	/*
    773  1.5.6.1  nathanw 	 * Find first acb in ready queue that is for a target/lunit pair that
    774  1.5.6.1  nathanw 	 * is not busy.
    775  1.5.6.1  nathanw 	 */
    776      1.1  minoura 	for (acb = sc->ready_list.tqh_first; acb != NULL;
    777  1.5.6.1  nathanw 	    acb = acb->chain.tqe_next) {
    778      1.1  minoura 		periph = acb->xs->xs_periph;
    779      1.1  minoura 		ti = &sc->sc_tinfo[periph->periph_target];
    780      1.1  minoura 		if ((ti->lubusy & (1 << periph->periph_lun)) == 0) {
    781      1.1  minoura 			SPC_MISC(("selecting %d:%d  ",
    782      1.1  minoura 			    periph->periph_target, periph->periph_lun));
    783      1.1  minoura 			TAILQ_REMOVE(&sc->ready_list, acb, chain);
    784  1.5.6.1  nathanw 			sc->sc_nexus = acb;
    785      1.1  minoura 			spc_select(sc, acb);
    786      1.1  minoura 			return;
    787      1.1  minoura 		} else
    788      1.1  minoura 			SPC_MISC(("%d:%d busy\n",
    789      1.1  minoura 			    periph->periph_target, periph->periph_lun));
    790      1.1  minoura 	}
    791      1.1  minoura 	SPC_MISC(("idle  "));
    792      1.1  minoura 	/* Nothing to start; just enable reselections and wait. */
    793      1.1  minoura }
    794      1.1  minoura 
    795      1.1  minoura /*
    797      1.1  minoura  * POST PROCESSING OF SCSI_CMD (usually current)
    798      1.1  minoura  */
    799  1.5.6.1  nathanw void
    800  1.5.6.1  nathanw spc_done(sc, acb)
    801      1.1  minoura 	struct spc_softc *sc;
    802      1.1  minoura 	struct spc_acb *acb;
    803      1.1  minoura {
    804      1.1  minoura 	struct scsipi_xfer *xs = acb->xs;
    805      1.1  minoura 	struct scsipi_periph *periph = xs->xs_periph;
    806      1.1  minoura 	struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
    807      1.1  minoura 
    808      1.1  minoura 	SPC_TRACE(("spc_done  "));
    809      1.1  minoura 
    810      1.1  minoura 	if (xs->error == XS_NOERROR) {
    811      1.1  minoura 		if (acb->flags & ACB_ABORT) {
    812  1.5.6.1  nathanw 			xs->error = XS_DRIVER_STUFFUP;
    813      1.1  minoura 		} else {
    814  1.5.6.1  nathanw 			switch (acb->target_stat) {
    815      1.1  minoura 			case SCSI_CHECK:
    816      1.1  minoura 				/* First, save the return values */
    817      1.1  minoura 				xs->resid = acb->data_length;
    818      1.1  minoura 				/* FALLBACK */
    819      1.1  minoura 			case SCSI_BUSY:
    820      1.1  minoura 				xs->status = acb->target_stat;
    821      1.1  minoura 				xs->error = XS_BUSY;
    822      1.1  minoura 				break;
    823      1.1  minoura 			case SCSI_OK:
    824      1.1  minoura 				xs->resid = acb->data_length;
    825      1.1  minoura 				break;
    826      1.1  minoura 			default:
    827      1.1  minoura 				xs->error = XS_DRIVER_STUFFUP;
    828      1.1  minoura #if SPC_DEBUG
    829      1.1  minoura 				printf("%s: spc_done: bad stat 0x%x\n",
    830      1.1  minoura 					sc->sc_dev.dv_xname, acb->target_stat);
    831      1.1  minoura #endif
    832      1.1  minoura 				break;
    833      1.1  minoura 			}
    834      1.1  minoura 		}
    835      1.1  minoura 	}
    836      1.1  minoura 
    837      1.1  minoura #if SPC_DEBUG
    838      1.1  minoura 	if ((spc_debug & SPC_SHOWMISC) != 0) {
    839      1.1  minoura 		if (xs->resid != 0)
    840      1.1  minoura 			printf("resid=%d ", xs->resid);
    841      1.1  minoura 		else
    842      1.1  minoura 			printf("error=%d\n", xs->error);
    843      1.1  minoura 	}
    844  1.5.6.1  nathanw #endif
    845      1.1  minoura 
    846      1.1  minoura 	/*
    847      1.1  minoura 	 * Remove the ACB from whatever queue it happens to be on.
    848      1.1  minoura 	 */
    849      1.1  minoura 	if (acb->flags & ACB_NEXUS)
    850      1.1  minoura 		ti->lubusy &= ~(1 << periph->periph_lun);
    851      1.1  minoura 	if (acb == sc->sc_nexus) {
    852      1.4  thorpej 		sc->sc_nexus = NULL;
    853      1.1  minoura 		sc->sc_state = SPC_IDLE;
    854      1.1  minoura 		spc_sched(sc);
    855      1.1  minoura 	} else
    856      1.1  minoura 		spc_dequeue(sc, acb);
    857      1.1  minoura 
    858      1.1  minoura 	spc_free_acb(sc, acb, xs->xs_control);
    859      1.1  minoura 	ti->cmds++;
    860      1.1  minoura 	scsipi_done(xs);
    861      1.1  minoura }
    862      1.1  minoura 
    863      1.1  minoura void
    864      1.1  minoura spc_dequeue(sc, acb)
    865      1.1  minoura 	struct spc_softc *sc;
    866      1.1  minoura 	struct spc_acb *acb;
    867      1.1  minoura {
    868      1.1  minoura 
    869      1.1  minoura 	SPC_TRACE(("spc_dequeue  "));
    870      1.1  minoura 	if (acb->flags & ACB_NEXUS) {
    871      1.1  minoura 		TAILQ_REMOVE(&sc->nexus_list, acb, chain);
    872      1.1  minoura 	} else {
    873      1.1  minoura 		TAILQ_REMOVE(&sc->ready_list, acb, chain);
    874      1.1  minoura 	}
    875      1.1  minoura }
    876      1.1  minoura 
    877      1.1  minoura /*
    879      1.1  minoura  * INTERRUPT/PROTOCOL ENGINE
    880      1.1  minoura  */
    881      1.1  minoura 
    882      1.1  minoura #define IS1BYTEMSG(m) (((m) != 0x01 && (m) < 0x20) || (m) >= 0x80)
    883      1.1  minoura #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
    884      1.1  minoura #define ISEXTMSG(m) ((m) == 0x01)
    885      1.1  minoura 
    886      1.3  minoura /*
    887      1.1  minoura  * Precondition:
    888      1.1  minoura  * The SCSI bus is already in the MSGI phase and there is a message byte
    889      1.1  minoura  * on the bus, along with an asserted REQ signal.
    890      1.1  minoura  */
    891      1.1  minoura void
    892      1.1  minoura spc_msgin(sc)
    893      1.1  minoura 	struct spc_softc *sc;
    894      1.1  minoura {
    895      1.1  minoura 	bus_space_tag_t iot = sc->sc_iot;
    896      1.1  minoura 	bus_space_handle_t ioh = sc->sc_ioh;
    897      1.1  minoura 	int n;
    898      1.1  minoura 
    899      1.1  minoura 	SPC_TRACE(("spc_msgin  "));
    900      1.1  minoura 
    901      1.1  minoura 	if (sc->sc_prevphase == PH_MSGIN) {
    902      1.1  minoura 		/* This is a continuation of the previous message. */
    903      1.1  minoura 		n = sc->sc_imp - sc->sc_imess;
    904      1.1  minoura 		goto nextbyte;
    905      1.1  minoura 	}
    906      1.1  minoura 
    907      1.1  minoura 	/* This is a new MESSAGE IN phase.  Clean up our state. */
    908      1.1  minoura 	sc->sc_flags &= ~SPC_DROP_MSGIN;
    909      1.1  minoura 
    910      1.1  minoura nextmsg:
    911      1.1  minoura 	n = 0;
    912      1.1  minoura 	sc->sc_imp = &sc->sc_imess[n];
    913      1.1  minoura 
    914      1.1  minoura nextbyte:
    915      1.1  minoura 	/*
    916      1.1  minoura 	 * Read a whole message, but don't ack the last byte.  If we reject the
    917      1.1  minoura 	 * message, we have to assert ATN during the message transfer phase
    918      1.1  minoura 	 * itself.
    919      1.1  minoura 	 */
    920      1.1  minoura 	for (;;) {
    921      1.1  minoura #if 0
    922      1.1  minoura 		for (;;) {
    923      1.1  minoura 			if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
    924      1.1  minoura 				break;
    925      1.1  minoura 			/* Wait for REQINIT.  XXX Need timeout. */
    926      1.1  minoura 		}
    927      1.1  minoura #endif
    928      1.1  minoura 		if (bus_space_read_1(iot, ioh, INTS) != 0) {
    929      1.1  minoura 			/*
    930      1.1  minoura 			 * Target left MESSAGE IN, probably because it
    931      1.1  minoura 			 * a) noticed our ATN signal, or
    932      1.1  minoura 			 * b) ran out of messages.
    933      1.1  minoura 			 */
    934      1.1  minoura 			goto out;
    935      1.1  minoura 		}
    936      1.1  minoura 
    937      1.1  minoura 		/* If parity error, just dump everything on the floor. */
    938      1.1  minoura 		if ((bus_space_read_1(iot, ioh, SERR) &
    939      1.1  minoura 		     (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
    940      1.1  minoura 			sc->sc_flags |= SPC_DROP_MSGIN;
    941      1.1  minoura 			spc_sched_msgout(sc, SEND_PARITY_ERROR);
    942      1.1  minoura 		}
    943      1.3  minoura 
    944      1.3  minoura 		/* send TRANSFER command. */
    945      1.3  minoura 		bus_space_write_1(iot, ioh, TCH, 0);
    946      1.1  minoura 		bus_space_write_1(iot, ioh, TCM, 0);
    947      1.3  minoura 		bus_space_write_1(iot, ioh, TCL, 1);
    948      1.1  minoura 		bus_space_write_1(iot, ioh, PCTL,
    949      1.1  minoura 				  sc->sc_phase | PCTL_BFINT_ENAB);
    950      1.1  minoura #ifdef x68k
    951      1.1  minoura 		bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* | SCMD_PROG_XFR */
    952      1.1  minoura #else
    953      1.1  minoura 		bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR);	/* XXX */
    954      1.1  minoura #endif
    955      1.1  minoura 		for (;;) {
    956      1.1  minoura 			/*if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0
    957      1.1  minoura 				&& (bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)*/
    958      1.1  minoura 			if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) == 0)
    959      1.1  minoura 				break;
    960      1.1  minoura 			if (bus_space_read_1(iot, ioh, INTS) != 0)
    961      1.1  minoura 				goto out;
    962      1.1  minoura 		}
    963      1.1  minoura 
    964      1.1  minoura 		/* Gather incoming message bytes if needed. */
    965      1.1  minoura 		if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) {
    966      1.1  minoura 			if (n >= SPC_MAX_MSG_LEN) {
    967      1.1  minoura 				(void) bus_space_read_1(iot, ioh, DREG);
    968      1.1  minoura 				sc->sc_flags |= SPC_DROP_MSGIN;
    969      1.1  minoura 				spc_sched_msgout(sc, SEND_REJECT);
    970      1.1  minoura 			} else {
    971      1.1  minoura 				*sc->sc_imp++ = bus_space_read_1(iot, ioh, DREG);
    972      1.1  minoura 				n++;
    973      1.1  minoura 				/*
    974      1.1  minoura 				 * This testing is suboptimal, but most
    975      1.1  minoura 				 * messages will be of the one byte variety, so
    976      1.1  minoura 				 * it should not affect performance
    977      1.1  minoura 				 * significantly.
    978      1.1  minoura 				 */
    979      1.1  minoura 				if (n == 1 && IS1BYTEMSG(sc->sc_imess[0]))
    980      1.1  minoura 					break;
    981      1.1  minoura 				if (n == 2 && IS2BYTEMSG(sc->sc_imess[0]))
    982      1.1  minoura 					break;
    983      1.1  minoura 				if (n >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
    984      1.1  minoura 				    n == sc->sc_imess[1] + 2)
    985      1.1  minoura 					break;
    986      1.1  minoura 			}
    987      1.1  minoura 		} else
    988      1.1  minoura 			(void) bus_space_read_1(iot, ioh, DREG);
    989      1.1  minoura 
    990      1.1  minoura 		/*
    991      1.1  minoura 		 * If we reach this spot we're either:
    992      1.1  minoura 		 * a) in the middle of a multi-byte message, or
    993      1.1  minoura 		 * b) dropping bytes.
    994      1.1  minoura 		 */
    995      1.1  minoura #if 0
    996      1.1  minoura 		/* Ack the last byte read. */
    997      1.1  minoura 		/*(void) bus_space_read_1(iot, ioh, DREG);*/
    998      1.1  minoura 		while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
    999      1.1  minoura 			;
   1000      1.1  minoura #endif
   1001  1.5.6.1  nathanw 	}
   1002      1.1  minoura 
   1003      1.1  minoura 	SPC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
   1004      1.1  minoura 
   1005      1.1  minoura 	/* We now have a complete message.  Parse it. */
   1006      1.1  minoura 	switch (sc->sc_state) {
   1007  1.5.6.1  nathanw 		struct spc_acb *acb;
   1008      1.1  minoura 		struct scsipi_periph *periph;
   1009      1.1  minoura 		struct spc_tinfo *ti;
   1010      1.1  minoura 
   1011      1.1  minoura 	case SPC_CONNECTED:
   1012  1.5.6.1  nathanw 		SPC_ASSERT(sc->sc_nexus != NULL);
   1013      1.1  minoura 		acb = sc->sc_nexus;
   1014      1.1  minoura 		ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target];
   1015  1.5.6.1  nathanw 
   1016      1.1  minoura 		switch (sc->sc_imess[0]) {
   1017      1.1  minoura 		case MSG_CMDCOMPLETE:
   1018      1.1  minoura 			if (sc->sc_dleft < 0) {
   1019      1.1  minoura 				periph = acb->xs->xs_periph;
   1020      1.1  minoura 				printf("%s: %d extra bytes from %d:%d\n",
   1021      1.1  minoura 				    sc->sc_dev.dv_xname, -sc->sc_dleft,
   1022      1.1  minoura 				    periph->periph_target, periph->periph_lun);
   1023      1.1  minoura 				acb->data_length = 0;
   1024      1.1  minoura 			}
   1025      1.1  minoura 			acb->xs->resid = acb->data_length = sc->sc_dleft;
   1026      1.1  minoura 			sc->sc_state = SPC_CMDCOMPLETE;
   1027      1.1  minoura 			break;
   1028      1.1  minoura 
   1029      1.1  minoura 		case MSG_PARITY_ERROR:
   1030      1.1  minoura 			/* Resend the last message. */
   1031      1.1  minoura 			spc_sched_msgout(sc, sc->sc_lastmsg);
   1032      1.1  minoura 			break;
   1033      1.1  minoura 
   1034      1.1  minoura 		case MSG_MESSAGE_REJECT:
   1035      1.1  minoura 			SPC_MISC(("message rejected %02x  ", sc->sc_lastmsg));
   1036      1.1  minoura 			switch (sc->sc_lastmsg) {
   1037      1.1  minoura #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
   1038      1.1  minoura 			case SEND_IDENTIFY:
   1039      1.1  minoura 				ti->flags &= ~(DO_SYNC | DO_WIDE);
   1040      1.1  minoura 				ti->period = ti->offset = 0;
   1041      1.1  minoura 				spc_setsync(sc, ti);
   1042      1.1  minoura 				ti->width = 0;
   1043      1.1  minoura 				break;
   1044      1.1  minoura #endif
   1045      1.1  minoura #if SPC_USE_SYNCHRONOUS
   1046      1.1  minoura 			case SEND_SDTR:
   1047      1.1  minoura 				ti->flags &= ~DO_SYNC;
   1048      1.1  minoura 				ti->period = ti->offset = 0;
   1049      1.1  minoura 				spc_setsync(sc, ti);
   1050      1.1  minoura 				break;
   1051      1.1  minoura #endif
   1052      1.1  minoura #if SPC_USE_WIDE
   1053      1.1  minoura 			case SEND_WDTR:
   1054      1.1  minoura 				ti->flags &= ~DO_WIDE;
   1055      1.1  minoura 				ti->width = 0;
   1056      1.1  minoura 				break;
   1057      1.1  minoura #endif
   1058      1.1  minoura 			case SEND_INIT_DET_ERR:
   1059      1.1  minoura 				spc_sched_msgout(sc, SEND_ABORT);
   1060      1.1  minoura 				break;
   1061      1.1  minoura 			}
   1062      1.1  minoura 			break;
   1063      1.1  minoura 
   1064      1.1  minoura 		case MSG_NOOP:
   1065      1.1  minoura 			break;
   1066      1.1  minoura 
   1067      1.1  minoura 		case MSG_DISCONNECT:
   1068      1.1  minoura 			ti->dconns++;
   1069      1.1  minoura 			sc->sc_state = SPC_DISCONNECT;
   1070      1.1  minoura 			break;
   1071      1.1  minoura 
   1072      1.1  minoura 		case MSG_SAVEDATAPOINTER:
   1073      1.1  minoura 			acb->data_addr = sc->sc_dp;
   1074      1.1  minoura 			acb->data_length = sc->sc_dleft;
   1075      1.1  minoura 			break;
   1076      1.1  minoura 
   1077      1.1  minoura 		case MSG_RESTOREPOINTERS:
   1078      1.1  minoura 			sc->sc_dp = acb->data_addr;
   1079      1.1  minoura 			sc->sc_dleft = acb->data_length;
   1080      1.1  minoura 			sc->sc_cp = (u_char *)&acb->scsipi_cmd;
   1081      1.1  minoura 			sc->sc_cleft = acb->scsipi_cmd_length;
   1082      1.1  minoura 			break;
   1083      1.1  minoura 
   1084      1.1  minoura 		case MSG_EXTENDED:
   1085      1.1  minoura 			switch (sc->sc_imess[2]) {
   1086      1.1  minoura #if SPC_USE_SYNCHRONOUS
   1087      1.1  minoura 			case MSG_EXT_SDTR:
   1088      1.1  minoura 				if (sc->sc_imess[1] != 3)
   1089      1.1  minoura 					goto reject;
   1090      1.1  minoura 				ti->period = sc->sc_imess[3];
   1091      1.1  minoura 				ti->offset = sc->sc_imess[4];
   1092      1.1  minoura 				ti->flags &= ~DO_SYNC;
   1093  1.5.6.1  nathanw 				if (ti->offset == 0) {
   1094      1.1  minoura 				} else if (ti->period < sc->sc_minsync ||
   1095      1.1  minoura 					   ti->period > sc->sc_maxsync ||
   1096      1.1  minoura 					   ti->offset > 8) {
   1097      1.1  minoura 					ti->period = ti->offset = 0;
   1098      1.1  minoura 					spc_sched_msgout(sc, SEND_SDTR);
   1099      1.1  minoura 				} else {
   1100      1.1  minoura 					scsipi_printaddr(acb->xs->xs_periph);
   1101      1.1  minoura 					printf("sync, offset %d, period %dnsec\n",
   1102      1.1  minoura 					    ti->offset, ti->period * 4);
   1103      1.1  minoura 				}
   1104      1.1  minoura 				spc_setsync(sc, ti);
   1105      1.1  minoura 				break;
   1106      1.1  minoura #endif
   1107      1.1  minoura 
   1108      1.1  minoura #if SPC_USE_WIDE
   1109      1.1  minoura 			case MSG_EXT_WDTR:
   1110      1.1  minoura 				if (sc->sc_imess[1] != 2)
   1111      1.1  minoura 					goto reject;
   1112  1.5.6.1  nathanw 				ti->width = sc->sc_imess[3];
   1113      1.1  minoura 				ti->flags &= ~DO_WIDE;
   1114      1.1  minoura 				if (ti->width == 0) {
   1115      1.1  minoura 				} else if (ti->width > SPC_MAX_WIDTH) {
   1116      1.1  minoura 					ti->width = 0;
   1117      1.1  minoura 					spc_sched_msgout(sc, SEND_WDTR);
   1118      1.1  minoura 				} else {
   1119      1.1  minoura 					scsipi_printaddr(acb->xs->xs_periph);
   1120      1.1  minoura 					printf("wide, width %d\n",
   1121      1.1  minoura 					    1 << (3 + ti->width));
   1122      1.1  minoura 				}
   1123      1.1  minoura 				break;
   1124      1.1  minoura #endif
   1125      1.1  minoura 
   1126      1.1  minoura 			default:
   1127      1.1  minoura 				printf("%s: unrecognized MESSAGE EXTENDED; sending REJECT\n",
   1128      1.1  minoura 				    sc->sc_dev.dv_xname);
   1129      1.1  minoura 				SPC_BREAK();
   1130      1.1  minoura 				goto reject;
   1131      1.1  minoura 			}
   1132      1.1  minoura 			break;
   1133      1.1  minoura 
   1134      1.1  minoura 		default:
   1135      1.1  minoura 			printf("%s: unrecognized MESSAGE; sending REJECT\n",
   1136      1.1  minoura 			    sc->sc_dev.dv_xname);
   1137      1.1  minoura 			SPC_BREAK();
   1138      1.1  minoura 		reject:
   1139      1.1  minoura 			spc_sched_msgout(sc, SEND_REJECT);
   1140      1.1  minoura 			break;
   1141      1.1  minoura 		}
   1142      1.1  minoura 		break;
   1143      1.1  minoura 
   1144      1.1  minoura 	case SPC_RESELECTED:
   1145      1.1  minoura 		if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
   1146      1.1  minoura 			printf("%s: reselect without IDENTIFY; sending DEVICE RESET\n",
   1147      1.1  minoura 			    sc->sc_dev.dv_xname);
   1148      1.1  minoura 			SPC_BREAK();
   1149      1.1  minoura 			goto reset;
   1150      1.1  minoura 		}
   1151      1.1  minoura 
   1152      1.1  minoura 		(void) spc_reselect(sc, sc->sc_imess[0]);
   1153      1.1  minoura 		break;
   1154      1.1  minoura 
   1155      1.1  minoura 	default:
   1156      1.1  minoura 		printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
   1157      1.1  minoura 		    sc->sc_dev.dv_xname);
   1158      1.1  minoura 		SPC_BREAK();
   1159      1.1  minoura 	reset:
   1160      1.1  minoura 		spc_sched_msgout(sc, SEND_DEV_RESET);
   1161      1.1  minoura 		break;
   1162      1.1  minoura 
   1163      1.1  minoura #ifdef notdef
   1164      1.1  minoura 	abort:
   1165      1.3  minoura 		spc_sched_msgout(sc, SEND_ABORT);
   1166      1.1  minoura 		break;
   1167      1.1  minoura #endif
   1168      1.1  minoura 	}
   1169      1.1  minoura 
   1170      1.1  minoura 	/* Ack the last message byte. */
   1171      1.1  minoura #if 0 /* XXX? */
   1172      1.1  minoura 	(void) bus_space_read_1(iot, ioh, DREG);
   1173      1.1  minoura 	while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
   1174      1.1  minoura 		;
   1175      1.1  minoura #endif
   1176      1.1  minoura 
   1177      1.1  minoura 	/* Go get the next message, if any. */
   1178      1.1  minoura 	goto nextmsg;
   1179      1.1  minoura 
   1180      1.1  minoura out:
   1181      1.1  minoura 	bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
   1182      1.1  minoura 	SPC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
   1183      1.3  minoura }
   1184      1.1  minoura 
   1185      1.1  minoura /*
   1186      1.1  minoura  * Send the highest priority, scheduled message.
   1187      1.1  minoura  */
   1188      1.1  minoura void
   1189      1.1  minoura spc_msgout(sc)
   1190      1.1  minoura 	struct spc_softc *sc;
   1191      1.1  minoura {
   1192      1.1  minoura 	bus_space_tag_t iot = sc->sc_iot;
   1193      1.1  minoura 	bus_space_handle_t ioh = sc->sc_ioh;
   1194      1.1  minoura #if SPC_USE_SYNCHRONOUS
   1195      1.1  minoura 	struct spc_tinfo *ti;
   1196      1.1  minoura #endif
   1197      1.1  minoura 	int n;
   1198      1.1  minoura 
   1199      1.1  minoura 	SPC_TRACE(("spc_msgout  "));
   1200      1.1  minoura 
   1201      1.1  minoura 	if (sc->sc_prevphase == PH_MSGOUT) {
   1202      1.1  minoura 		if (sc->sc_omp == sc->sc_omess) {
   1203      1.1  minoura 			/*
   1204      1.1  minoura 			 * This is a retransmission.
   1205      1.1  minoura 			 *
   1206      1.1  minoura 			 * We get here if the target stayed in MESSAGE OUT
   1207      1.1  minoura 			 * phase.  Section 5.1.9.2 of the SCSI 2 spec indicates
   1208      1.1  minoura 			 * that all of the previously transmitted messages must
   1209      1.1  minoura 			 * be sent again, in the same order.  Therefore, we
   1210      1.1  minoura 			 * requeue all the previously transmitted messages, and
   1211      1.1  minoura 			 * start again from the top.  Our simple priority
   1212      1.1  minoura 			 * scheme keeps the messages in the right order.
   1213      1.1  minoura 			 */
   1214      1.1  minoura 			SPC_MISC(("retransmitting  "));
   1215      1.1  minoura 			sc->sc_msgpriq |= sc->sc_msgoutq;
   1216      1.1  minoura 			/*
   1217      1.1  minoura 			 * Set ATN.  If we're just sending a trivial 1-byte
   1218      1.1  minoura 			 * message, we'll clear ATN later on anyway.
   1219      1.1  minoura 			 */
   1220      1.1  minoura 			bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); /* XXX? */
   1221      1.1  minoura 		} else {
   1222      1.1  minoura 			/* This is a continuation of the previous message. */
   1223      1.1  minoura 			n = sc->sc_omp - sc->sc_omess;
   1224      1.1  minoura 			goto nextbyte;
   1225      1.1  minoura 		}
   1226      1.1  minoura 	}
   1227      1.1  minoura 
   1228      1.1  minoura 	/* No messages transmitted so far. */
   1229      1.1  minoura 	sc->sc_msgoutq = 0;
   1230      1.1  minoura 	sc->sc_lastmsg = 0;
   1231      1.1  minoura 
   1232      1.1  minoura nextmsg:
   1233      1.1  minoura 	/* Pick up highest priority message. */
   1234      1.1  minoura 	sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
   1235      1.1  minoura 	sc->sc_msgpriq &= ~sc->sc_currmsg;
   1236  1.5.6.1  nathanw 	sc->sc_msgoutq |= sc->sc_currmsg;
   1237      1.1  minoura 
   1238      1.1  minoura 	/* Build the outgoing message data. */
   1239      1.1  minoura 	switch (sc->sc_currmsg) {
   1240      1.1  minoura 	case SEND_IDENTIFY:
   1241      1.1  minoura 		SPC_ASSERT(sc->sc_nexus != NULL);
   1242      1.1  minoura 		sc->sc_omess[0] =
   1243  1.5.6.1  nathanw 		    MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1);
   1244      1.1  minoura 		n = 1;
   1245      1.1  minoura 		break;
   1246      1.1  minoura 
   1247      1.1  minoura #if SPC_USE_SYNCHRONOUS
   1248      1.1  minoura 	case SEND_SDTR:
   1249      1.1  minoura 		SPC_ASSERT(sc->sc_nexus != NULL);
   1250      1.1  minoura 		ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
   1251      1.1  minoura 		sc->sc_omess[4] = MSG_EXTENDED;
   1252      1.1  minoura 		sc->sc_omess[3] = 3;
   1253      1.1  minoura 		sc->sc_omess[2] = MSG_EXT_SDTR;
   1254      1.1  minoura 		sc->sc_omess[1] = ti->period >> 2;
   1255      1.1  minoura 		sc->sc_omess[0] = ti->offset;
   1256  1.5.6.1  nathanw 		n = 5;
   1257      1.1  minoura 		break;
   1258      1.1  minoura #endif
   1259      1.1  minoura 
   1260      1.1  minoura #if SPC_USE_WIDE
   1261      1.1  minoura 	case SEND_WDTR:
   1262      1.1  minoura 		SPC_ASSERT(sc->sc_nexus != NULL);
   1263      1.1  minoura 		ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
   1264      1.1  minoura 		sc->sc_omess[3] = MSG_EXTENDED;
   1265      1.1  minoura 		sc->sc_omess[2] = 2;
   1266      1.1  minoura 		sc->sc_omess[1] = MSG_EXT_WDTR;
   1267      1.1  minoura 		sc->sc_omess[0] = ti->width;
   1268      1.1  minoura 		n = 4;
   1269      1.1  minoura 		break;
   1270      1.1  minoura #endif
   1271      1.1  minoura 
   1272      1.1  minoura 	case SEND_DEV_RESET:
   1273      1.1  minoura 		sc->sc_flags |= SPC_ABORTING;
   1274      1.1  minoura 		sc->sc_omess[0] = MSG_BUS_DEV_RESET;
   1275      1.1  minoura 		n = 1;
   1276      1.1  minoura 		break;
   1277      1.1  minoura 
   1278      1.1  minoura 	case SEND_REJECT:
   1279      1.1  minoura 		sc->sc_omess[0] = MSG_MESSAGE_REJECT;
   1280      1.1  minoura 		n = 1;
   1281      1.1  minoura 		break;
   1282      1.1  minoura 
   1283      1.1  minoura 	case SEND_PARITY_ERROR:
   1284      1.1  minoura 		sc->sc_omess[0] = MSG_PARITY_ERROR;
   1285      1.1  minoura 		n = 1;
   1286      1.1  minoura 		break;
   1287      1.1  minoura 
   1288      1.1  minoura 	case SEND_INIT_DET_ERR:
   1289      1.1  minoura 		sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
   1290      1.1  minoura 		n = 1;
   1291      1.1  minoura 		break;
   1292      1.1  minoura 
   1293      1.1  minoura 	case SEND_ABORT:
   1294      1.1  minoura 		sc->sc_flags |= SPC_ABORTING;
   1295      1.1  minoura 		sc->sc_omess[0] = MSG_ABORT;
   1296      1.1  minoura 		n = 1;
   1297      1.1  minoura 		break;
   1298      1.1  minoura 
   1299      1.1  minoura 	default:
   1300      1.1  minoura 		printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
   1301      1.1  minoura 		    sc->sc_dev.dv_xname);
   1302      1.1  minoura 		SPC_BREAK();
   1303      1.1  minoura 		sc->sc_omess[0] = MSG_NOOP;
   1304      1.1  minoura 		n = 1;
   1305      1.1  minoura 		break;
   1306      1.1  minoura 	}
   1307      1.1  minoura 	sc->sc_omp = &sc->sc_omess[n];
   1308      1.1  minoura 
   1309      1.3  minoura nextbyte:
   1310      1.3  minoura 	/* Send message bytes. */
   1311      1.3  minoura 	/* send TRANSFER command. */
   1312      1.3  minoura 	bus_space_write_1(iot, ioh, TCH, n >> 16);
   1313      1.3  minoura 	bus_space_write_1(iot, ioh, TCM, n >> 8);
   1314      1.1  minoura 	bus_space_write_1(iot, ioh, TCL, n);
   1315      1.1  minoura 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
   1316      1.1  minoura #ifdef x68k
   1317      1.1  minoura 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
   1318      1.1  minoura #else
   1319      1.1  minoura 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR);
   1320      1.1  minoura #endif
   1321      1.1  minoura 	for (;;) {
   1322      1.1  minoura 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
   1323      1.1  minoura 			break;
   1324      1.1  minoura 		if (bus_space_read_1(iot, ioh, INTS) != 0)
   1325      1.1  minoura 			goto out;
   1326      1.1  minoura 	}
   1327      1.1  minoura 	for (;;) {
   1328      1.1  minoura #if 0
   1329      1.1  minoura 		for (;;) {
   1330      1.1  minoura 			if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
   1331      1.1  minoura 				break;
   1332      1.1  minoura 			/* Wait for REQINIT.  XXX Need timeout. */
   1333      1.1  minoura 		}
   1334      1.1  minoura #endif
   1335      1.1  minoura 		if (bus_space_read_1(iot, ioh, INTS) != 0) {
   1336      1.1  minoura 			/*
   1337      1.1  minoura 			 * Target left MESSAGE OUT, possibly to reject
   1338      1.1  minoura 			 * our message.
   1339      1.1  minoura 			 *
   1340      1.1  minoura 			 * If this is the last message being sent, then we
   1341      1.1  minoura 			 * deassert ATN, since either the target is going to
   1342      1.1  minoura 			 * ignore this message, or it's going to ask for a
   1343      1.1  minoura 			 * retransmission via MESSAGE PARITY ERROR (in which
   1344      1.1  minoura 			 * case we reassert ATN anyway).
   1345      1.1  minoura 			 */
   1346      1.1  minoura #if 0
   1347      1.1  minoura 			if (sc->sc_msgpriq == 0)
   1348      1.1  minoura 				bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
   1349      1.1  minoura #endif
   1350      1.1  minoura 			goto out;
   1351      1.1  minoura 		}
   1352      1.1  minoura 
   1353      1.1  minoura #if 0
   1354      1.1  minoura 		/* Clear ATN before last byte if this is the last message. */
   1355      1.1  minoura 		if (n == 1 && sc->sc_msgpriq == 0)
   1356      1.1  minoura 			bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
   1357      1.1  minoura #endif
   1358      1.1  minoura 
   1359      1.1  minoura 		while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0)
   1360      1.1  minoura 			;
   1361      1.1  minoura 		/* Send message byte. */
   1362      1.1  minoura 		bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp);
   1363      1.1  minoura 		--n;
   1364      1.1  minoura 		/* Keep track of the last message we've sent any bytes of. */
   1365      1.1  minoura 		sc->sc_lastmsg = sc->sc_currmsg;
   1366      1.1  minoura #if 0
   1367      1.1  minoura 		/* Wait for ACK to be negated.  XXX Need timeout. */
   1368      1.1  minoura 		while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
   1369      1.1  minoura 			;
   1370      1.1  minoura #endif
   1371      1.1  minoura 
   1372      1.1  minoura 		if (n == 0)
   1373      1.1  minoura 			break;
   1374      1.1  minoura 	}
   1375      1.1  minoura 
   1376      1.1  minoura 	/* We get here only if the entire message has been transmitted. */
   1377      1.1  minoura 	if (sc->sc_msgpriq != 0) {
   1378      1.1  minoura 		/* There are more outgoing messages. */
   1379      1.1  minoura 		goto nextmsg;
   1380      1.1  minoura 	}
   1381      1.1  minoura 
   1382      1.1  minoura 	/*
   1383      1.1  minoura 	 * The last message has been transmitted.  We need to remember the last
   1384      1.1  minoura 	 * message transmitted (in case the target switches to MESSAGE IN phase
   1385      1.1  minoura 	 * and sends a MESSAGE REJECT), and the list of messages transmitted
   1386      1.1  minoura 	 * this time around (in case the target stays in MESSAGE OUT phase to
   1387      1.1  minoura 	 * request a retransmit).
   1388      1.1  minoura 	 */
   1389      1.1  minoura 
   1390      1.1  minoura out:
   1391      1.1  minoura 	/* Disable REQ/ACK protocol. */
   1392      1.1  minoura }
   1393      1.1  minoura 
   1394      1.1  minoura /*
   1396      1.1  minoura  * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc
   1397      1.3  minoura  * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
   1398      1.1  minoura  * and ACK deasserted (i.e. waiting for a data byte)
   1399      1.1  minoura  *
   1400      1.1  minoura  * This new revision has been optimized (I tried) to make the common case fast,
   1401      1.1  minoura  * and the rarer cases (as a result) somewhat more comlex
   1402      1.1  minoura  */
   1403      1.3  minoura int
   1404      1.1  minoura spc_dataout_pio(sc, p, n)
   1405      1.1  minoura 	struct spc_softc *sc;
   1406      1.1  minoura 	u_char *p;
   1407      1.1  minoura 	int n;
   1408      1.1  minoura {
   1409      1.1  minoura 	bus_space_tag_t iot = sc->sc_iot;
   1410      1.1  minoura 	bus_space_handle_t ioh = sc->sc_ioh;
   1411      1.1  minoura 	u_char intstat = 0;
   1412      1.1  minoura 	int out = 0;
   1413      1.3  minoura #define DOUTAMOUNT 8		/* Full FIFO */
   1414      1.3  minoura 
   1415      1.3  minoura 	SPC_TRACE(("spc_dataout_pio  "));
   1416      1.1  minoura 	/* send TRANSFER command. */
   1417      1.3  minoura 	bus_space_write_1(iot, ioh, TCH, n >> 16);
   1418      1.1  minoura 	bus_space_write_1(iot, ioh, TCM, n >> 8);
   1419      1.1  minoura 	bus_space_write_1(iot, ioh, TCL, n);
   1420      1.1  minoura 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
   1421      1.1  minoura #ifdef x68k
   1422      1.1  minoura 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
   1423      1.1  minoura #else
   1424      1.1  minoura 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR);	/* XXX */
   1425      1.1  minoura #endif
   1426      1.1  minoura 	for (;;) {
   1427      1.1  minoura 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
   1428      1.1  minoura 			break;
   1429      1.1  minoura 		if (bus_space_read_1(iot, ioh, INTS) != 0)
   1430      1.1  minoura 			break;
   1431      1.1  minoura 	}
   1432      1.1  minoura 
   1433      1.1  minoura 	/*
   1434      1.1  minoura 	 * I have tried to make the main loop as tight as possible.  This
   1435      1.2  minoura 	 * means that some of the code following the loop is a bit more
   1436      1.1  minoura 	 * complex than otherwise.
   1437      1.1  minoura 	 */
   1438      1.2  minoura 	while (n > 0) {
   1439      1.1  minoura 		int xfer;
   1440      1.1  minoura 
   1441      1.1  minoura 		for (;;) {
   1442      1.1  minoura 			intstat = bus_space_read_1(iot, ioh, INTS);
   1443      1.1  minoura 			/* Wait till buffer is empty. */
   1444      1.1  minoura 			if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)
   1445      1.1  minoura 				break;
   1446      1.1  minoura 			/* Break on interrupt. */
   1447      1.1  minoura 			if (intstat != 0)
   1448      1.1  minoura 				goto phasechange;
   1449      1.1  minoura 		}
   1450      1.1  minoura 
   1451      1.1  minoura 		xfer = min(DOUTAMOUNT, n);
   1452      1.1  minoura 
   1453      1.1  minoura 		SPC_MISC(("%d> ", xfer));
   1454      1.1  minoura 
   1455      1.1  minoura 		n -= xfer;
   1456      1.1  minoura 		out += xfer;
   1457      1.1  minoura 
   1458      1.1  minoura 		while (xfer-- > 0) {
   1459      1.1  minoura 			bus_space_write_1(iot, ioh, DREG, *p++);
   1460      1.1  minoura 		}
   1461      1.1  minoura 	}
   1462      1.1  minoura 
   1463      1.1  minoura 	if (out == 0) {
   1464      1.2  minoura 		for (;;) {
   1465      1.1  minoura 			if (bus_space_read_1(iot, ioh, INTS) != 0)
   1466      1.1  minoura 				break;
   1467      1.1  minoura 		}
   1468      1.2  minoura 		SPC_MISC(("extra data  "));
   1469      1.1  minoura 	} else {
   1470      1.1  minoura 		/* See the bytes off chip */
   1471      1.1  minoura 		for (;;) {
   1472      1.1  minoura 			/* Wait till buffer is empty. */
   1473      1.1  minoura 			if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)
   1474      1.1  minoura 				break;
   1475      1.1  minoura 			intstat = bus_space_read_1(iot, ioh, INTS);
   1476      1.1  minoura 			/* Break on interrupt. */
   1477      1.1  minoura 			if (intstat != 0)
   1478      1.1  minoura 				goto phasechange;
   1479      1.1  minoura 		}
   1480      1.1  minoura 	}
   1481      1.1  minoura 
   1482      1.1  minoura phasechange:
   1483      1.1  minoura 	/* Stop the FIFO data path. */
   1484      1.1  minoura 
   1485      1.1  minoura 	if (intstat != 0) {
   1486      1.1  minoura 		/* Some sort of phase change. */
   1487      1.1  minoura 		int amount;
   1488      1.1  minoura 
   1489      1.1  minoura 		amount = ((bus_space_read_1(iot, ioh, TCH) << 16) |
   1490      1.1  minoura 			  (bus_space_read_1(iot, ioh, TCM) << 8) |
   1491      1.1  minoura 			  bus_space_read_1(iot, ioh, TCL));
   1492      1.1  minoura 		if (amount > 0) {
   1493      1.1  minoura 			out -= amount;
   1494      1.1  minoura 			SPC_MISC(("+%d ", amount));
   1495      1.1  minoura 		}
   1496      1.1  minoura 	}
   1497      1.1  minoura 
   1498      1.1  minoura 	/* Turn on ENREQINIT again. */
   1499      1.1  minoura 
   1500      1.1  minoura 	return out;
   1501      1.1  minoura }
   1502      1.1  minoura 
   1503      1.1  minoura /*
   1505      1.1  minoura  * spc_datain_pio: perform data transfers using the FIFO datapath in the spc
   1506      1.3  minoura  * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
   1507      1.1  minoura  * and ACK deasserted (i.e. at least one byte is ready).
   1508      1.1  minoura  *
   1509      1.1  minoura  * For now, uses a pretty dumb algorithm, hangs around until all data has been
   1510      1.1  minoura  * transferred.  This, is OK for fast targets, but not so smart for slow
   1511      1.1  minoura  * targets which don't disconnect or for huge transfers.
   1512      1.3  minoura  */
   1513      1.1  minoura int
   1514      1.1  minoura spc_datain_pio(sc, p, n)
   1515      1.1  minoura 	struct spc_softc *sc;
   1516      1.1  minoura 	u_char *p;
   1517      1.1  minoura 	int n;
   1518      1.1  minoura {
   1519      1.1  minoura 	bus_space_tag_t iot = sc->sc_iot;
   1520      1.1  minoura 	bus_space_handle_t ioh = sc->sc_ioh;
   1521      1.1  minoura 	u_short intstat;
   1522      1.3  minoura 	int in = 0;
   1523      1.3  minoura #define DINAMOUNT 8		/* Full FIFO */
   1524      1.3  minoura 
   1525      1.1  minoura 	SPC_TRACE(("spc_datain_pio  "));
   1526      1.3  minoura 	/* send TRANSFER command. */
   1527      1.1  minoura 	bus_space_write_1(iot, ioh, TCH, n >> 16);
   1528      1.1  minoura 	bus_space_write_1(iot, ioh, TCM, n >> 8);
   1529      1.1  minoura 	bus_space_write_1(iot, ioh, TCL, n);
   1530      1.1  minoura 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
   1531      1.1  minoura #ifdef x68k
   1532      1.1  minoura 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
   1533      1.1  minoura #else
   1534      1.3  minoura 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR);	/* XXX */
   1535      1.3  minoura #endif
   1536      1.1  minoura 	for (;;) {
   1537      1.1  minoura 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
   1538      1.1  minoura 			break;
   1539      1.1  minoura 		if (bus_space_read_1(iot, ioh, INTS) != 0)
   1540      1.1  minoura 			goto phasechange;
   1541      1.1  minoura 	}
   1542      1.1  minoura 
   1543      1.1  minoura 	/*
   1544      1.1  minoura 	 * We leave this loop if one or more of the following is true:
   1545      1.1  minoura 	 * a) phase != PH_DATAIN && FIFOs are empty
   1546      1.1  minoura 	 * b) reset has occurred or busfree is detected.
   1547      1.1  minoura 	 */
   1548      1.1  minoura 	while (n > 0) {
   1549      1.1  minoura 		int xfer;
   1550      1.1  minoura 
   1551      1.1  minoura #define INTSMASK 0xff
   1552      1.1  minoura 		/* Wait for fifo half full or phase mismatch */
   1553      1.1  minoura 		for (;;) {
   1554      1.1  minoura 			intstat = ((bus_space_read_1(iot, ioh, SSTS) << 8) |
   1555      1.1  minoura 				   bus_space_read_1(iot, ioh, INTS));
   1556      1.1  minoura 			if ((intstat & (INTSMASK | (SSTS_DREG_FULL << 8))) !=
   1557      1.1  minoura 			    0)
   1558      1.1  minoura 				break;
   1559      1.1  minoura 			if ((intstat & (SSTS_DREG_EMPTY << 8)) == 0)
   1560      1.1  minoura 				break;
   1561      1.1  minoura 		}
   1562      1.1  minoura 
   1563      1.1  minoura #if 1
   1564      1.1  minoura 		if ((intstat & INTSMASK) != 0)
   1565      1.1  minoura 			goto phasechange;
   1566      1.1  minoura #else
   1567      1.1  minoura 		if ((intstat & INTSMASK) != 0 &&
   1568      1.1  minoura 		    (intstat & (SSTS_DREG_EMPTY << 8)))
   1569      1.1  minoura 			goto phasechange;
   1570      1.1  minoura #endif
   1571      1.1  minoura 		if ((intstat & (SSTS_DREG_FULL << 8)) != 0)
   1572      1.1  minoura 			xfer = min(DINAMOUNT, n);
   1573      1.1  minoura 		else
   1574      1.1  minoura 			xfer = min(1, n);
   1575      1.1  minoura 
   1576      1.1  minoura 		SPC_MISC((">%d ", xfer));
   1577      1.1  minoura 
   1578      1.1  minoura 		n -= xfer;
   1579      1.1  minoura 		in += xfer;
   1580      1.1  minoura 
   1581      1.1  minoura 		while (xfer-- > 0) {
   1582      1.1  minoura 			*p++ = bus_space_read_1(iot, ioh, DREG);
   1583      1.1  minoura 		}
   1584      1.1  minoura 
   1585      1.1  minoura 		if ((intstat & INTSMASK) != 0)
   1586      1.1  minoura 			goto phasechange;
   1587      1.1  minoura 	}
   1588      1.1  minoura 
   1589      1.1  minoura 	/*
   1590      1.1  minoura 	 * Some SCSI-devices are rude enough to transfer more data than what
   1591      1.1  minoura 	 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
   1592      1.1  minoura 	 * requested 512.  Test for progress, i.e. real transfers.  If no real
   1593      1.1  minoura 	 * transfers have been performed (n is probably already zero) and the
   1594      1.1  minoura 	 * FIFO is not empty, waste some bytes....
   1595      1.1  minoura 	 */
   1596      1.1  minoura 	if (in == 0) {
   1597      1.1  minoura 		for (;;) {
   1598      1.1  minoura 			if (bus_space_read_1(iot, ioh, INTS) != 0)
   1599      1.1  minoura 				break;
   1600      1.1  minoura 		}
   1601      1.1  minoura 		SPC_MISC(("extra data  "));
   1602      1.1  minoura 	}
   1603      1.1  minoura 
   1604      1.1  minoura phasechange:
   1605      1.1  minoura 	/* Stop the FIFO data path. */
   1606      1.1  minoura 
   1607      1.1  minoura 	/* Turn on ENREQINIT again. */
   1608      1.1  minoura 
   1609      1.1  minoura 	return in;
   1610      1.1  minoura }
   1611      1.1  minoura 
   1612      1.1  minoura /*
   1614      1.1  minoura  * Catch an interrupt from the adaptor
   1615      1.3  minoura  */
   1616      1.1  minoura /*
   1617      1.1  minoura  * This is the workhorse routine of the driver.
   1618      1.1  minoura  * Deficiencies (for now):
   1619      1.3  minoura  * 1) always uses programmed I/O
   1620  1.5.6.1  nathanw  */
   1621      1.1  minoura int
   1622      1.1  minoura spcintr(arg)
   1623      1.1  minoura 	void *arg;
   1624      1.1  minoura {
   1625      1.2  minoura 	struct spc_softc *sc = arg;
   1626      1.1  minoura 	bus_space_tag_t iot = sc->sc_iot;
   1627      1.1  minoura 	bus_space_handle_t ioh = sc->sc_ioh;
   1628      1.1  minoura 	u_char ints;
   1629      1.1  minoura 	struct spc_acb *acb;
   1630      1.1  minoura 	struct scsipi_periph *periph;
   1631      1.1  minoura 	struct spc_tinfo *ti;
   1632      1.1  minoura 	int n;
   1633      1.2  minoura 
   1634      1.1  minoura 	/*
   1635      1.1  minoura 	 * Disable interrupt.
   1636      1.1  minoura 	 */
   1637      1.1  minoura 	bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB);
   1638      1.1  minoura 
   1639      1.1  minoura 	SPC_TRACE(("spcintr  "));
   1640      1.1  minoura 
   1641      1.1  minoura loop:
   1642      1.1  minoura 	/*
   1643      1.1  minoura 	 * Loop until transfer completion.
   1644      1.1  minoura 	 */
   1645      1.1  minoura 	/*
   1646      1.1  minoura 	 * First check for abnormal conditions, such as reset.
   1647      1.1  minoura 	 */
   1648      1.1  minoura #ifdef x68k			/* XXX? */
   1649      1.1  minoura 	while ((ints = bus_space_read_1(iot, ioh, INTS)) == 0)
   1650      1.1  minoura 		delay(1);
   1651      1.1  minoura 	SPC_MISC(("ints = 0x%x  ", ints));
   1652      1.1  minoura #else
   1653      1.1  minoura 	ints = bus_space_read_1(iot, ioh, INTS);
   1654      1.1  minoura 	SPC_MISC(("ints = 0x%x  ", ints));
   1655      1.1  minoura #endif
   1656      1.1  minoura 
   1657      1.1  minoura 	if ((ints & INTS_RST) != 0) {
   1658      1.1  minoura 		printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
   1659      1.1  minoura 		goto reset;
   1660      1.1  minoura 	}
   1661      1.1  minoura 
   1662      1.1  minoura 	/*
   1663      1.1  minoura 	 * Check for less serious errors.
   1664      1.1  minoura 	 */
   1665      1.1  minoura 	if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
   1666      1.1  minoura 		printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
   1667      1.1  minoura 		if (sc->sc_prevphase == PH_MSGIN) {
   1668      1.1  minoura 			sc->sc_flags |= SPC_DROP_MSGIN;
   1669      1.1  minoura 			spc_sched_msgout(sc, SEND_PARITY_ERROR);
   1670      1.1  minoura 		} else
   1671      1.1  minoura 			spc_sched_msgout(sc, SEND_INIT_DET_ERR);
   1672      1.1  minoura 	}
   1673      1.1  minoura 
   1674      1.1  minoura 	/*
   1675      1.1  minoura 	 * If we're not already busy doing something test for the following
   1676      1.1  minoura 	 * conditions:
   1677      1.1  minoura 	 * 1) We have been reselected by something
   1678      1.1  minoura 	 * 2) We have selected something successfully
   1679      1.1  minoura 	 * 3) Our selection process has timed out
   1680      1.1  minoura 	 * 4) This is really a bus free interrupt just to get a new command
   1681      1.1  minoura 	 *    going?
   1682      1.1  minoura 	 * 5) Spurious interrupt?
   1683      1.1  minoura 	 */
   1684      1.1  minoura 	switch (sc->sc_state) {
   1685      1.1  minoura 	case SPC_IDLE:
   1686      1.1  minoura 	case SPC_SELECTING:
   1687      1.1  minoura 		SPC_MISC(("ints:0x%02x ", ints));
   1688      1.1  minoura 
   1689      1.1  minoura 		if ((ints & INTS_SEL) != 0) {
   1690      1.1  minoura 			/*
   1691      1.1  minoura 			 * We don't currently support target mode.
   1692      1.1  minoura 			 */
   1693      1.1  minoura 			printf("%s: target mode selected; going to BUS FREE\n",
   1694      1.1  minoura 			    sc->sc_dev.dv_xname);
   1695      1.1  minoura 
   1696      1.1  minoura 			goto sched;
   1697      1.1  minoura 		} else if ((ints & INTS_RESEL) != 0) {
   1698      1.1  minoura 			SPC_MISC(("reselected  "));
   1699      1.1  minoura 
   1700      1.1  minoura 			/*
   1701      1.1  minoura 			 * If we're trying to select a target ourselves,
   1702      1.1  minoura 			 * push our command back into the ready list.
   1703      1.1  minoura 			 */
   1704      1.1  minoura 			if (sc->sc_state == SPC_SELECTING) {
   1705      1.1  minoura 				SPC_MISC(("backoff selector  "));
   1706      1.1  minoura 				SPC_ASSERT(sc->sc_nexus != NULL);
   1707      1.1  minoura 				acb = sc->sc_nexus;
   1708      1.1  minoura 				sc->sc_nexus = NULL;
   1709      1.1  minoura 				TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
   1710      1.1  minoura 			}
   1711      1.1  minoura 
   1712      1.1  minoura 			/* Save reselection ID. */
   1713      1.1  minoura 			sc->sc_selid = bus_space_read_1(iot, ioh, TEMP);
   1714      1.1  minoura 
   1715      1.1  minoura 			sc->sc_state = SPC_RESELECTED;
   1716      1.1  minoura 		} else if ((ints & INTS_CMD_DONE) != 0) {
   1717      1.1  minoura 			SPC_MISC(("selected  "));
   1718      1.1  minoura 
   1719      1.1  minoura 			/*
   1720      1.1  minoura 			 * We have selected a target. Things to do:
   1721      1.1  minoura 			 * a) Determine what message(s) to send.
   1722      1.1  minoura 			 * b) Verify that we're still selecting the target.
   1723  1.5.6.1  nathanw 			 * c) Mark device as busy.
   1724  1.5.6.1  nathanw 			 */
   1725      1.1  minoura 			if (sc->sc_state != SPC_SELECTING) {
   1726      1.1  minoura 				printf("%s: selection out while idle; resetting\n",
   1727      1.1  minoura 				    sc->sc_dev.dv_xname);
   1728      1.1  minoura 				SPC_BREAK();
   1729      1.1  minoura 				goto reset;
   1730      1.1  minoura 			}
   1731      1.1  minoura 			SPC_ASSERT(sc->sc_nexus != NULL);
   1732      1.1  minoura 			acb = sc->sc_nexus;
   1733      1.1  minoura 			periph = acb->xs->xs_periph;
   1734      1.1  minoura 			ti = &sc->sc_tinfo[periph->periph_target];
   1735      1.1  minoura 
   1736      1.1  minoura 			sc->sc_msgpriq = SEND_IDENTIFY;
   1737      1.1  minoura 			if (acb->flags & ACB_RESET)
   1738      1.1  minoura 				sc->sc_msgpriq |= SEND_DEV_RESET;
   1739      1.1  minoura 			else if (acb->flags & ACB_ABORT)
   1740      1.1  minoura 				sc->sc_msgpriq |= SEND_ABORT;
   1741      1.1  minoura 			else {
   1742      1.1  minoura #if SPC_USE_SYNCHRONOUS
   1743  1.5.6.1  nathanw 				if ((ti->flags & DO_SYNC) != 0)
   1744      1.1  minoura 					sc->sc_msgpriq |= SEND_SDTR;
   1745      1.1  minoura #endif
   1746      1.1  minoura #if SPC_USE_WIDE
   1747      1.1  minoura 				if ((ti->flags & DO_WIDE) != 0)
   1748      1.1  minoura 					sc->sc_msgpriq |= SEND_WDTR;
   1749      1.1  minoura #endif
   1750      1.1  minoura 			}
   1751      1.1  minoura 
   1752      1.4  thorpej 			acb->flags |= ACB_NEXUS;
   1753      1.5  thorpej 			ti->lubusy |= (1 << periph->periph_lun);
   1754      1.5  thorpej 
   1755      1.5  thorpej 			/* Do an implicit RESTORE POINTERS. */
   1756      1.1  minoura 			sc->sc_dp = acb->data_addr;
   1757      1.1  minoura 			sc->sc_dleft = acb->data_length;
   1758      1.1  minoura 			sc->sc_cp = (u_char *)&acb->scsipi_cmd;
   1759      1.1  minoura 			sc->sc_cleft = acb->scsipi_cmd_length;
   1760      1.1  minoura 
   1761      1.1  minoura 			/* On our first connection, schedule a timeout. */
   1762      1.1  minoura 			if ((acb->xs->xs_control & XS_CTL_POLL) == 0)
   1763      1.1  minoura 				callout_reset(&acb->xs->xs_callout,
   1764      1.1  minoura 				    (acb->timeout * hz) / 1000,
   1765      1.1  minoura 				    spc_timeout, acb);
   1766      1.1  minoura 
   1767      1.1  minoura 			sc->sc_state = SPC_CONNECTED;
   1768      1.1  minoura 		} else if ((ints & INTS_TIMEOUT) != 0) {
   1769      1.1  minoura 			SPC_MISC(("selection timeout  "));
   1770      1.1  minoura 
   1771      1.1  minoura 			if (sc->sc_state != SPC_SELECTING) {
   1772      1.1  minoura 				printf("%s: selection timeout while idle; resetting\n",
   1773      1.1  minoura 				    sc->sc_dev.dv_xname);
   1774      1.1  minoura 				SPC_BREAK();
   1775      1.1  minoura 				goto reset;
   1776      1.1  minoura 			}
   1777      1.1  minoura 			SPC_ASSERT(sc->sc_nexus != NULL);
   1778      1.1  minoura 			acb = sc->sc_nexus;
   1779      1.1  minoura 
   1780      1.1  minoura 			delay(250);
   1781      1.1  minoura 
   1782      1.1  minoura 			acb->xs->error = XS_SELTIMEOUT;
   1783      1.1  minoura 			goto finish;
   1784      1.1  minoura 		} else {
   1785      1.1  minoura 			if (sc->sc_state != SPC_IDLE) {
   1786      1.1  minoura 				printf("%s: BUS FREE while not idle; state=%d\n",
   1787      1.1  minoura 				    sc->sc_dev.dv_xname, sc->sc_state);
   1788      1.1  minoura 				SPC_BREAK();
   1789      1.1  minoura 				goto out;
   1790      1.1  minoura 			}
   1791      1.1  minoura 
   1792      1.1  minoura 			goto sched;
   1793      1.1  minoura 		}
   1794      1.1  minoura 
   1795      1.1  minoura 		/*
   1796      1.1  minoura 		 * Turn off selection stuff, and prepare to catch bus free
   1797      1.1  minoura 		 * interrupts, parity errors, and phase changes.
   1798      1.1  minoura 		 */
   1799      1.1  minoura 
   1800      1.1  minoura 		sc->sc_flags = 0;
   1801      1.1  minoura 		sc->sc_prevphase = PH_INVALID;
   1802      1.1  minoura 		goto dophase;
   1803      1.1  minoura 	}
   1804      1.1  minoura 
   1805      1.1  minoura 	if ((ints & INTS_DISCON) != 0) {
   1806      1.1  minoura 		/* We've gone to BUS FREE phase. */
   1807      1.1  minoura 		bus_space_write_1(iot, ioh, PCTL,
   1808      1.1  minoura 		    bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB);
   1809      1.1  minoura 				/* disable disconnect interrupt */
   1810      1.1  minoura 		bus_space_write_1(iot, ioh, INTS, ints);
   1811      1.1  minoura 				/* XXX reset interrput */
   1812      1.1  minoura 
   1813      1.1  minoura 		switch (sc->sc_state) {
   1814      1.1  minoura 		case SPC_RESELECTED:
   1815      1.1  minoura 			goto sched;
   1816      1.1  minoura 
   1817      1.1  minoura 		case SPC_CONNECTED:
   1818  1.5.6.1  nathanw 			SPC_ASSERT(sc->sc_nexus != NULL);
   1819  1.5.6.1  nathanw 			acb = sc->sc_nexus;
   1820      1.1  minoura 
   1821      1.1  minoura #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
   1822      1.1  minoura 			if (sc->sc_prevphase == PH_MSGOUT) {
   1823      1.1  minoura 				/*
   1824      1.1  minoura 				 * If the target went to BUS FREE phase during
   1825      1.1  minoura 				 * or immediately after sending a SDTR or WDTR
   1826      1.1  minoura 				 * message, disable negotiation.
   1827      1.1  minoura 				 */
   1828      1.1  minoura 				periph = acb->xs->xs_periph;
   1829      1.1  minoura 				ti = &sc->sc_tinfo[periph->periph_target];
   1830      1.1  minoura 				switch (sc->sc_lastmsg) {
   1831      1.1  minoura #if SPC_USE_SYNCHRONOUS
   1832      1.1  minoura 				case SEND_SDTR:
   1833      1.1  minoura 					ti->flags &= ~DO_SYNC;
   1834      1.1  minoura 					ti->period = ti->offset = 0;
   1835      1.1  minoura 					break;
   1836      1.1  minoura #endif
   1837      1.1  minoura #if SPC_USE_WIDE
   1838      1.1  minoura 				case SEND_WDTR:
   1839      1.1  minoura 					ti->flags &= ~DO_WIDE;
   1840      1.1  minoura 					ti->width = 0;
   1841      1.1  minoura 					break;
   1842      1.1  minoura #endif
   1843      1.1  minoura 				}
   1844      1.1  minoura 			}
   1845      1.1  minoura #endif
   1846      1.1  minoura 
   1847      1.1  minoura 			if ((sc->sc_flags & SPC_ABORTING) == 0) {
   1848      1.1  minoura 				/*
   1849  1.5.6.1  nathanw 				 * Section 5.1.1 of the SCSI 2 spec suggests
   1850  1.5.6.1  nathanw 				 * issuing a REQUEST SENSE following an
   1851  1.5.6.1  nathanw 				 * unexpected disconnect.  Some devices go into
   1852      1.1  minoura 				 * a contingent allegiance condition when
   1853      1.1  minoura 				 * disconnecting, and this is necessary to
   1854      1.1  minoura 				 * clean up their state.
   1855      1.1  minoura 				 */
   1856      1.1  minoura 				printf("%s: unexpected disconnect; sending REQUEST SENSE\n",
   1857      1.1  minoura 				    sc->sc_dev.dv_xname);
   1858      1.1  minoura 				SPC_BREAK();
   1859      1.1  minoura 				acb->target_stat = SCSI_CHECK;
   1860      1.1  minoura 				acb->xs->error = XS_NOERROR;
   1861      1.1  minoura 				goto finish;
   1862      1.1  minoura 			}
   1863      1.1  minoura 
   1864      1.1  minoura 			acb->xs->error = XS_DRIVER_STUFFUP;
   1865      1.1  minoura 			goto finish;
   1866      1.1  minoura 
   1867      1.1  minoura 		case SPC_DISCONNECT:
   1868      1.1  minoura 			SPC_ASSERT(sc->sc_nexus != NULL);
   1869      1.1  minoura 			acb = sc->sc_nexus;
   1870      1.1  minoura 			TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
   1871      1.1  minoura 			sc->sc_nexus = NULL;
   1872      1.1  minoura 			goto sched;
   1873      1.1  minoura 
   1874      1.1  minoura 		case SPC_CMDCOMPLETE:
   1875      1.1  minoura 			SPC_ASSERT(sc->sc_nexus != NULL);
   1876      1.1  minoura 			acb = sc->sc_nexus;
   1877      1.1  minoura 			goto finish;
   1878      1.1  minoura 		}
   1879      1.1  minoura 	}
   1880      1.1  minoura 	else if ((ints & INTS_CMD_DONE) != 0 &&
   1881      1.1  minoura 		 sc->sc_prevphase == PH_MSGIN && sc->sc_state != SPC_CONNECTED)
   1882      1.1  minoura 		goto out;
   1883      1.1  minoura 
   1884      1.1  minoura dophase:
   1885      1.1  minoura #if 0
   1886      1.1  minoura 	if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
   1887      1.1  minoura 		/* Wait for REQINIT. */
   1888      1.2  minoura 		goto out;
   1889      1.1  minoura 	}
   1890      1.1  minoura #else
   1891      1.1  minoura 	bus_space_write_1(iot, ioh, INTS, ints);
   1892      1.1  minoura 	ints = 0;
   1893      1.3  minoura 	while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
   1894      1.1  minoura 		delay(1);	/* need timeout XXX */
   1895      1.1  minoura #endif
   1896      1.1  minoura 
   1897      1.1  minoura 	/*
   1898      1.1  minoura 	 * State transition.
   1899      1.1  minoura 	 */
   1900      1.1  minoura 	sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK;
   1901      1.1  minoura /*	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase);*/
   1902      1.1  minoura 
   1903      1.1  minoura 	SPC_MISC(("phase=%d\n", sc->sc_phase));
   1904      1.1  minoura 	switch (sc->sc_phase) {
   1905      1.1  minoura 	case PH_MSGOUT:
   1906      1.1  minoura 		if (sc->sc_state != SPC_CONNECTED &&
   1907      1.1  minoura 		    sc->sc_state != SPC_RESELECTED)
   1908      1.1  minoura 			break;
   1909      1.1  minoura 		spc_msgout(sc);
   1910      1.1  minoura 		sc->sc_prevphase = PH_MSGOUT;
   1911      1.1  minoura 		goto loop;
   1912      1.1  minoura 
   1913      1.1  minoura 	case PH_MSGIN:
   1914      1.1  minoura 		if (sc->sc_state != SPC_CONNECTED &&
   1915      1.1  minoura 		    sc->sc_state != SPC_RESELECTED)
   1916      1.1  minoura 			break;
   1917      1.1  minoura 		spc_msgin(sc);
   1918      1.1  minoura 		sc->sc_prevphase = PH_MSGIN;
   1919      1.1  minoura 		goto loop;
   1920      1.1  minoura 
   1921      1.1  minoura 	case PH_CMD:
   1922      1.1  minoura 		if (sc->sc_state != SPC_CONNECTED)
   1923      1.1  minoura 			break;
   1924      1.1  minoura #if SPC_DEBUG
   1925      1.1  minoura 		if ((spc_debug & SPC_SHOWMISC) != 0) {
   1926      1.1  minoura 			SPC_ASSERT(sc->sc_nexus != NULL);
   1927      1.1  minoura 			acb = sc->sc_nexus;
   1928      1.1  minoura 			printf("cmd=0x%02x+%d  ",
   1929      1.1  minoura 			    acb->scsipi_cmd.opcode, acb->scsipi_cmd_length-1);
   1930      1.1  minoura 		}
   1931      1.1  minoura #endif
   1932      1.1  minoura 		n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
   1933      1.1  minoura 		sc->sc_cp += n;
   1934      1.1  minoura 		sc->sc_cleft -= n;
   1935      1.1  minoura 		sc->sc_prevphase = PH_CMD;
   1936      1.1  minoura 		goto loop;
   1937      1.1  minoura 
   1938      1.1  minoura 	case PH_DATAOUT:
   1939      1.1  minoura 		if (sc->sc_state != SPC_CONNECTED)
   1940      1.1  minoura 			break;
   1941      1.1  minoura 		SPC_MISC(("dataout dleft=%d  ", sc->sc_dleft));
   1942      1.1  minoura 		n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
   1943      1.1  minoura 		sc->sc_dp += n;
   1944      1.1  minoura 		sc->sc_dleft -= n;
   1945      1.1  minoura 		sc->sc_prevphase = PH_DATAOUT;
   1946      1.1  minoura 		goto loop;
   1947      1.1  minoura 
   1948      1.1  minoura 	case PH_DATAIN:
   1949      1.1  minoura 		if (sc->sc_state != SPC_CONNECTED)
   1950      1.1  minoura 			break;
   1951      1.1  minoura 		SPC_MISC(("datain  "));
   1952      1.1  minoura 		n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
   1953      1.1  minoura 		sc->sc_dp += n;
   1954      1.1  minoura 		sc->sc_dleft -= n;
   1955      1.1  minoura 		sc->sc_prevphase = PH_DATAIN;
   1956      1.1  minoura 		goto loop;
   1957      1.1  minoura 
   1958      1.1  minoura 	case PH_STAT:
   1959      1.1  minoura 		if (sc->sc_state != SPC_CONNECTED)
   1960      1.1  minoura 			break;
   1961      1.1  minoura 		SPC_ASSERT(sc->sc_nexus != NULL);
   1962      1.1  minoura 		acb = sc->sc_nexus;
   1963      1.1  minoura 		/*acb->target_stat = bus_space_read_1(iot, ioh, DREG);*/
   1964      1.1  minoura 		spc_datain_pio(sc, &acb->target_stat, 1);
   1965      1.1  minoura 		SPC_MISC(("target_stat=0x%02x  ", acb->target_stat));
   1966      1.1  minoura 		sc->sc_prevphase = PH_STAT;
   1967      1.5  thorpej 		goto loop;
   1968      1.1  minoura 	}
   1969      1.1  minoura 
   1970      1.1  minoura 	printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname);
   1971      1.1  minoura 	SPC_BREAK();
   1972      1.1  minoura reset:
   1973      1.1  minoura 	spc_init(sc);
   1974      1.1  minoura 	return 1;
   1975      1.1  minoura 
   1976      1.1  minoura finish:
   1977      1.1  minoura 	callout_stop(&acb->xs->xs_callout);
   1978      1.1  minoura 	bus_space_write_1(iot, ioh, INTS, ints);
   1979      1.1  minoura 	ints = 0;
   1980      1.1  minoura 	spc_done(sc, acb);
   1981      1.1  minoura 	goto out;
   1982      1.1  minoura 
   1983      1.1  minoura sched:
   1984      1.1  minoura 	sc->sc_state = SPC_IDLE;
   1985      1.1  minoura 	spc_sched(sc);
   1986      1.1  minoura 	goto out;
   1987      1.1  minoura 
   1988      1.1  minoura out:
   1989      1.1  minoura 	if (ints)
   1990      1.1  minoura 		bus_space_write_1(iot, ioh, INTS, ints);
   1991      1.1  minoura 	bus_space_write_1(iot, ioh, SCTL,
   1992      1.1  minoura 	    bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB);
   1993      1.1  minoura 	return 1;
   1994      1.1  minoura }
   1995      1.1  minoura 
   1996      1.1  minoura void
   1997      1.1  minoura spc_abort(sc, acb)
   1998      1.1  minoura 	struct spc_softc *sc;
   1999      1.1  minoura 	struct spc_acb *acb;
   2000      1.1  minoura {
   2001      1.1  minoura 
   2002      1.1  minoura 	/* 2 secs for the abort */
   2003      1.1  minoura 	acb->timeout = SPC_ABORT_TIMEOUT;
   2004      1.1  minoura 	acb->flags |= ACB_ABORT;
   2005      1.1  minoura 
   2006      1.1  minoura 	if (acb == sc->sc_nexus) {
   2007      1.1  minoura 		/*
   2008      1.1  minoura 		 * If we're still selecting, the message will be scheduled
   2009      1.1  minoura 		 * after selection is complete.
   2010      1.1  minoura 		 */
   2011      1.1  minoura 		if (sc->sc_state == SPC_CONNECTED)
   2012      1.1  minoura 			spc_sched_msgout(sc, SEND_ABORT);
   2013      1.1  minoura 	} else {
   2014      1.1  minoura 		spc_dequeue(sc, acb);
   2015      1.1  minoura 		TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
   2016      1.1  minoura 		if (sc->sc_state == SPC_IDLE)
   2017  1.5.6.1  nathanw 			spc_sched(sc);
   2018  1.5.6.1  nathanw 	}
   2019      1.1  minoura }
   2020      1.1  minoura 
   2021  1.5.6.1  nathanw void
   2022      1.1  minoura spc_timeout(arg)
   2023      1.1  minoura 	void *arg;
   2024      1.1  minoura {
   2025      1.1  minoura 	struct spc_acb *acb = arg;
   2026      1.1  minoura 	struct scsipi_xfer *xs = acb->xs;
   2027      1.1  minoura 	struct scsipi_periph *periph = xs->xs_periph;
   2028      1.1  minoura 	struct spc_softc *sc = (void*)periph->periph_channel->chan_adapter->adapt_dev;
   2029      1.1  minoura 	int s;
   2030      1.1  minoura 
   2031      1.1  minoura 	scsipi_printaddr(periph);
   2032      1.1  minoura 	printf("timed out");
   2033      1.1  minoura 
   2034      1.1  minoura 	s = splbio();
   2035      1.1  minoura 
   2036      1.1  minoura 	if (acb->flags & ACB_ABORT) {
   2037      1.1  minoura 		/* abort timed out */
   2038      1.1  minoura 		printf(" AGAIN\n");
   2039      1.1  minoura 		/* XXX Must reset! */
   2040      1.3  minoura 	} else {
   2041      1.1  minoura 		/* abort the operation that has timed out */
   2042      1.1  minoura 		printf("\n");
   2043      1.1  minoura 		acb->xs->error = XS_TIMEOUT;
   2044      1.1  minoura 		spc_abort(sc, acb);
   2045      1.1  minoura 	}
   2046      1.1  minoura 
   2047      1.1  minoura 	splx(s);
   2048      1.1  minoura }
   2049      1.1  minoura 
   2050      1.1  minoura #ifdef SPC_DEBUG
   2052      1.1  minoura /*
   2053  1.5.6.1  nathanw  * The following functions are mostly used for debugging purposes, either
   2054      1.4  thorpej  * directly called from the driver or from the kernel debugger.
   2055      1.1  minoura  */
   2056      1.1  minoura 
   2057      1.1  minoura void
   2058      1.1  minoura spc_show_scsi_cmd(acb)
   2059      1.1  minoura 	struct spc_acb *acb;
   2060      1.1  minoura {
   2061      1.1  minoura 	u_char  *b = (u_char *)&acb->scsipi_cmd;
   2062      1.1  minoura 	int i;
   2063      1.1  minoura 
   2064      1.1  minoura 	scsipi_printaddr(acb->xs->xs_periph);
   2065      1.1  minoura 	if ((acb->xs->xs_control & XS_CTL_RESET) == 0) {
   2066      1.1  minoura 		for (i = 0; i < acb->scsipi_cmd_length; i++) {
   2067      1.1  minoura 			if (i)
   2068      1.1  minoura 				printf(",");
   2069      1.1  minoura 			printf("%x", b[i]);
   2070      1.1  minoura 		}
   2071      1.1  minoura 		printf("\n");
   2072      1.1  minoura 	} else
   2073      1.1  minoura 		printf("RESET\n");
   2074      1.1  minoura }
   2075      1.1  minoura 
   2076      1.1  minoura void
   2077      1.1  minoura spc_print_acb(acb)
   2078      1.1  minoura 	struct spc_acb *acb;
   2079      1.1  minoura {
   2080      1.1  minoura 
   2081      1.1  minoura 	printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
   2082      1.1  minoura 	printf(" dp=%p dleft=%d target_stat=%x\n",
   2083      1.1  minoura 	       acb->data_addr, acb->data_length, acb->target_stat);
   2084      1.1  minoura 	spc_show_scsi_cmd(acb);
   2085      1.1  minoura }
   2086      1.1  minoura 
   2087      1.1  minoura void
   2088      1.1  minoura spc_print_active_acb()
   2089      1.1  minoura {
   2090      1.1  minoura 	struct spc_acb *acb;
   2091      1.1  minoura 	struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */
   2092      1.1  minoura 
   2093      1.1  minoura 	printf("ready list:\n");
   2094      1.1  minoura 	for (acb = sc->ready_list.tqh_first; acb != NULL;
   2095      1.1  minoura 	    acb = acb->chain.tqe_next)
   2096      1.1  minoura 		spc_print_acb(acb);
   2097      1.1  minoura 	printf("nexus:\n");
   2098      1.1  minoura 	if (sc->sc_nexus != NULL)
   2099      1.1  minoura 		spc_print_acb(sc->sc_nexus);
   2100      1.1  minoura 	printf("nexus list:\n");
   2101      1.1  minoura 	for (acb = sc->nexus_list.tqh_first; acb != NULL;
   2102      1.1  minoura 	    acb = acb->chain.tqe_next)
   2103      1.1  minoura 		spc_print_acb(acb);
   2104      1.1  minoura }
   2105      1.1  minoura 
   2106      1.1  minoura void
   2107      1.1  minoura spc_dump89352(sc)
   2108      1.1  minoura 	struct spc_softc *sc;
   2109      1.1  minoura {
   2110      1.1  minoura 	bus_space_tag_t iot = sc->sc_iot;
   2111      1.1  minoura 	bus_space_handle_t ioh = sc->sc_ioh;
   2112      1.1  minoura 
   2113      1.1  minoura 	printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n",
   2114      1.1  minoura 	    bus_space_read_1(iot, ioh, BDID),
   2115      1.3  minoura 	    bus_space_read_1(iot, ioh, SCTL),
   2116      1.1  minoura 	    bus_space_read_1(iot, ioh, SCMD),
   2117      1.3  minoura 	    bus_space_read_1(iot, ioh, TMOD));
   2118      1.3  minoura 	printf("         INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n",
   2119      1.3  minoura 	    bus_space_read_1(iot, ioh, INTS),
   2120      1.1  minoura 	    bus_space_read_1(iot, ioh, PSNS),
   2121      1.1  minoura 	    bus_space_read_1(iot, ioh, SSTS),
   2122      1.1  minoura 	    bus_space_read_1(iot, ioh, SERR),
   2123      1.1  minoura 	    bus_space_read_1(iot, ioh, PCTL));
   2124      1.1  minoura 	printf("         MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n",
   2125      1.1  minoura 	    bus_space_read_1(iot, ioh, MBC),
   2126      1.1  minoura #if 0
   2127      1.1  minoura 	    bus_space_read_1(iot, ioh, DREG),
   2128      1.1  minoura #else
   2129      1.1  minoura 	    0,
   2130      1.1  minoura #endif
   2131      1.1  minoura 	    bus_space_read_1(iot, ioh, TEMP),
   2132      1.1  minoura 	    bus_space_read_1(iot, ioh, TCH),
   2133      1.1  minoura 	    bus_space_read_1(iot, ioh, TCM));
   2134      1.1  minoura 	printf("         TCL=%x EXBF=%x\n",
   2135      1.1  minoura 	    bus_space_read_1(iot, ioh, TCL),
   2136      1.1  minoura 	    bus_space_read_1(iot, ioh, EXBF));
   2137      1.1  minoura }
   2138      1.1  minoura 
   2139      1.1  minoura void
   2140      1.1  minoura spc_dump_driver(sc)
   2141      1.1  minoura 	struct spc_softc *sc;
   2142      1.1  minoura {
   2143      1.1  minoura 	struct spc_tinfo *ti;
   2144      1.1  minoura 	int i;
   2145      1.1  minoura 
   2146      1.1  minoura 	printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
   2147                   	printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x currmsg=%x\n",
   2148                   	    sc->sc_state, sc->sc_imess[0],
   2149                   	    sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
   2150                   	for (i = 0; i < 7; i++) {
   2151                   		ti = &sc->sc_tinfo[i];
   2152                   		printf("tinfo%d: %d cmds %d disconnects %d timeouts",
   2153                   		    i, ti->cmds, ti->dconns, ti->touts);
   2154                   		printf(" %d senses flags=%x\n", ti->senses, ti->flags);
   2155                   	}
   2156                   }
   2157                   #endif
   2158