mb89352.c revision 1.1 1 /* $NetBSD: mb89352.c,v 1.1 1999/02/13 17:33:14 minoura Exp $ */
2 /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */
3
4 #ifdef DDB
5 #define integrate
6 #else
7 #define integrate __inline static
8 #endif
9
10 #ifndef ORIGINAL_CODE
11 #endif /* PC-98 */
12 /*-
13 * Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc.
14 * All rights reserved.
15 *
16 * This code is derived from software contributed to The NetBSD Foundation
17 * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions
21 * are met:
22 * 1. Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * 2. Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * 3. All advertising materials mentioning features or use of this software
28 * must display the following acknowledgement:
29 * This product includes software developed by Charles M. Hannum.
30 * 4. The name of the author may not be used to endorse or promote products
31 * derived from this software without specific prior written permission.
32 *
33 * Copyright (c) 1994 Jarle Greipsland
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. The name of the author may not be used to endorse or promote products
45 * derived from this software without specific prior written permission.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
49 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
50 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
53 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
56 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
57 * POSSIBILITY OF SUCH DAMAGE.
58 */
59 /*
60 * [NetBSD for NEC PC-98 series]
61 * Copyright (c) 1996, 1997, 1998
62 * NetBSD/pc98 porting staff. All rights reserved.
63 * Copyright (c) 1996, 1997, 1998
64 * Kouichi Matsuda. All rights reserved.
65 */
66
67 /*
68 * Acknowledgements: Many of the algorithms used in this driver are
69 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
70 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
71 */
72
73 /* TODO list:
74 * 1) Get the DMA stuff working.
75 * 2) Get the iov/uio stuff working. Is this a good thing ???
76 * 3) Get the synch stuff working.
77 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
78 */
79
80 /*
81 * A few customizable items:
82 */
83
84 /* Use doubleword transfers to/from SCSI chip. Note: This requires
85 * motherboard support. Basicly, some motherboard chipsets are able to
86 * split a 32 bit I/O operation into two 16 bit I/O operations,
87 * transparently to the processor. This speeds up some things, notably long
88 * data transfers.
89 */
90 #define SPC_USE_DWORDS 0
91
92 /* Synchronous data transfers? */
93 #define SPC_USE_SYNCHRONOUS 0
94 #define SPC_SYNC_REQ_ACK_OFS 8
95
96 /* Wide data transfers? */
97 #define SPC_USE_WIDE 0
98 #define SPC_MAX_WIDTH 0
99
100 /* Max attempts made to transmit a message */
101 #define SPC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */
102
103 /*
104 * Some spin loop parameters (essentially how long to wait some places)
105 * The problem(?) is that sometimes we expect either to be able to transmit a
106 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid
107 * returning from the interrupt just to get yanked back for the next byte we
108 * may spin in the interrupt routine waiting for this byte to come. How long?
109 * This is really (SCSI) device and processor dependent. Tuneable, I guess.
110 */
111 #define SPC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */
112 #define SPC_MSGOUT_SPIN 1
113
114 /* Include debug functions? At the end of this file there are a bunch of
115 * functions that will print out various information regarding queued SCSI
116 * commands, driver state and chip contents. You can call them from the
117 * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the
118 * kernel uses less memory) but you lose the debugging facilities.
119 */
120 #define SPC_DEBUG 1
121
122 #define SPC_ABORT_TIMEOUT 2000 /* time to wait for abort */
123
124 /* End of customizable parameters */
125
126 /*
127 * MB89352 SCSI Protocol Controller (SPC) routines.
128 */
129
130 #include "opt_ddb.h"
131
132 #include <sys/types.h>
133 #include <sys/param.h>
134 #include <sys/systm.h>
135 #include <sys/kernel.h>
136 #include <sys/errno.h>
137 #include <sys/ioctl.h>
138 #include <sys/device.h>
139 #include <sys/buf.h>
140 #include <sys/proc.h>
141 #include <sys/user.h>
142 #include <sys/queue.h>
143
144 #include <machine/intr.h>
145 #include <machine/bus.h>
146
147 #include <dev/scsipi/scsi_all.h>
148 #include <dev/scsipi/scsipi_all.h>
149 #include <dev/scsipi/scsi_message.h>
150 #include <dev/scsipi/scsiconf.h>
151
152 #include <dev/ic/mb89352reg.h>
153 #include <dev/ic/mb89352var.h>
154
155 #ifndef DDB
157 #define Debugger() panic("should call debugger here (mb89352.c)")
158 #endif /* ! DDB */
159
160 #if SPC_DEBUG
161 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */
162 #endif
163
164 void spc_minphys __P((struct buf *));
165 void spc_done __P((struct spc_softc *, struct spc_acb *));
166 void spc_dequeue __P((struct spc_softc *, struct spc_acb *));
167 int spc_scsi_cmd __P((struct scsipi_xfer *));
168 int spc_poll __P((struct spc_softc *, struct scsipi_xfer *, int));
169 integrate void spc_sched_msgout __P((struct spc_softc *, u_char));
170 integrate void spc_setsync __P((struct spc_softc *, struct spc_tinfo *));
171 void spc_select __P((struct spc_softc *, struct spc_acb *));
172 void spc_timeout __P((void *));
173 void spc_scsi_reset __P((struct spc_softc *));
174 void spc_reset __P((struct spc_softc *));
175 void spc_free_acb __P((struct spc_softc *, struct spc_acb *, int));
176 struct spc_acb* spc_get_acb __P((struct spc_softc *, int));
177 int spc_reselect __P((struct spc_softc *, int));
178 void spc_sense __P((struct spc_softc *, struct spc_acb *));
179 void spc_msgin __P((struct spc_softc *));
180 void spc_abort __P((struct spc_softc *, struct spc_acb *));
181 void spc_msgout __P((struct spc_softc *));
182 int spc_dataout_pio __P((struct spc_softc *, u_char *, int));
183 int spc_datain_pio __P((struct spc_softc *, u_char *, int));
184 #if SPC_DEBUG
185 void spc_print_acb __P((struct spc_acb *));
186 void spc_dump_driver __P((struct spc_softc *));
187 void spc_dump89352 __P((struct spc_softc *));
188 void spc_show_scsi_cmd __P((struct spc_acb *));
189 void spc_print_active_acb __P((void));
190 #endif
191
192 extern struct cfdriver spc_cd;
193
194 struct scsipi_device spc_dev = {
195 NULL, /* Use default error handler */
196 NULL, /* have a queue, served by this */
197 NULL, /* have no async handler */
198 NULL, /* Use default 'done' routine */
199 };
200
201 /*
203 * INITIALIZATION ROUTINES (probe, attach ++)
204 */
205
206 /* Do the real search-for-device.
207 * Prerequisite: sc->sc_iobase should be set to the proper value
208 */
209 int
210 spc_find(iot, ioh, bdid)
211 bus_space_tag_t iot;
212 bus_space_handle_t ioh;
213 int bdid;
214 {
215 long timeout = SPC_ABORT_TIMEOUT;
216
217 SPC_TRACE(("spc: probing for spc-chip\n"));
218 /*
219 * Disable interrupts then reset the FUJITSU chip.
220 */
221 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
222 bus_space_write_1(iot, ioh, SCMD, 0);
223 bus_space_write_1(iot, ioh, PCTL, 0);
224 bus_space_write_1(iot, ioh, TEMP, 0);
225 bus_space_write_1(iot, ioh, TCH, 0);
226 bus_space_write_1(iot, ioh, TCM, 0);
227 bus_space_write_1(iot, ioh, TCL, 0);
228 bus_space_write_1(iot, ioh, INTS, 0);
229 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
230 bus_space_write_1(iot, ioh, BDID, bdid);
231 delay(400);
232 bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
233
234 /* The following detection is derived from spc.c
235 * (by Takahide Matsutsuka) in FreeBSD/pccard-test.
236 */
237 while (bus_space_read_1(iot, ioh, PSNS) && timeout)
238 timeout--;
239 if (!timeout) {
240 printf("spc: find failed\n");
241 return 0;
242 }
243
244 SPC_START(("SPC found"));
245 return 1;
246 }
247
248 void
249 spcattach(sc)
250 struct spc_softc *sc;
251 {
252
253 SPC_TRACE(("spcattach "));
254 sc->sc_state = SPC_INIT;
255
256 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */
257
258 #if SPC_USE_SYNCHRONOUS
259 /*
260 * These are the bounds of the sync period, based on the frequency of
261 * the chip's clock input and the size and offset of the sync period
262 * register.
263 *
264 * For a 20Mhz clock, this gives us 25, or 100nS, or 10MB/s, as a
265 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
266 * minimum transfer rate.
267 */
268 sc->sc_minsync = (2 * 250) / sc->sc_freq;
269 sc->sc_maxsync = (9 * 250) / sc->sc_freq;
270 #endif
271
272 spc_init(sc); /* Init chip and driver */
273
274 /*
275 * Fill in the adapter.
276 */
277 sc->sc_adapter.scsipi_cmd = spc_scsi_cmd;
278 sc->sc_adapter.scsipi_minphys = spc_minphys;
279
280 /*
281 * Fill in the prototype scsipi_link
282 */
283 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
284 sc->sc_link.adapter_softc = sc;
285 sc->sc_link.scsipi_scsi.adapter_target = sc->sc_initiator;
286 sc->sc_link.adapter = &sc->sc_adapter;
287 sc->sc_link.device = &spc_dev;
288 sc->sc_link.openings = 2;
289 sc->sc_link.scsipi_scsi.max_target = 7;
290 sc->sc_link.scsipi_scsi.max_lun = 7;
291 sc->sc_link.type = BUS_SCSI;
292
293 /*
294 * ask the adapter what subunits are present
295 */
296 config_found(&sc->sc_dev, &sc->sc_link, scsiprint);
297 }
298
299 /* Initialize MB89352 chip itself
300 * The following conditions should hold:
301 * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc
302 * must be valid.
303 */
304 void
305 spc_reset(sc)
306 struct spc_softc *sc;
307 {
308 bus_space_tag_t iot = sc->sc_iot;
309 bus_space_handle_t ioh = sc->sc_ioh;
310
311 SPC_TRACE(("spc_reset "));
312 /*
313 * Disable interrupts then reset the FUJITSU chip.
314 */
315 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
316 bus_space_write_1(iot, ioh, SCMD, 0);
317 bus_space_write_1(iot, ioh, PCTL, 0);
318 bus_space_write_1(iot, ioh, TEMP, 0);
319 bus_space_write_1(iot, ioh, TCH, 0);
320 bus_space_write_1(iot, ioh, TCM, 0);
321 bus_space_write_1(iot, ioh, TCL, 0);
322 bus_space_write_1(iot, ioh, INTS, 0);
323 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
324 bus_space_write_1(iot, ioh, BDID, sc->sc_initiator);
325 delay(400);
326 bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
327 }
328
329
330 /*
331 * Pull the SCSI RST line for 500us.
332 */
333 void
334 spc_scsi_reset(sc)
335 struct spc_softc *sc;
336 {
337 bus_space_tag_t iot = sc->sc_iot;
338 bus_space_handle_t ioh = sc->sc_ioh;
339
340 SPC_TRACE(("spc_scsi_reset "));
341 bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) | SCMD_RST);
342 delay(500);
343 bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST);
344 delay(50);
345 }
346
347 /*
348 * Initialize spc SCSI driver.
349 */
350 void
351 spc_init(sc)
352 struct spc_softc *sc;
353 {
354 struct spc_acb *acb;
355 int r;
356
357 SPC_TRACE(("spc_init "));
358 spc_reset(sc);
359 spc_scsi_reset(sc);
360 spc_reset(sc);
361
362 if (sc->sc_state == SPC_INIT) {
363 /* First time through; initialize. */
364 TAILQ_INIT(&sc->ready_list);
365 TAILQ_INIT(&sc->nexus_list);
366 TAILQ_INIT(&sc->free_list);
367 sc->sc_nexus = NULL;
368 acb = sc->sc_acb;
369 bzero(acb, sizeof(sc->sc_acb));
370 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
371 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
372 acb++;
373 }
374 bzero(&sc->sc_tinfo, sizeof(sc->sc_tinfo));
375 } else {
376 /* Cancel any active commands. */
377 sc->sc_state = SPC_CLEANING;
378 if ((acb = sc->sc_nexus) != NULL) {
379 acb->xs->error = XS_DRIVER_STUFFUP;
380 untimeout(spc_timeout, acb);
381 spc_done(sc, acb);
382 }
383 while ((acb = sc->nexus_list.tqh_first) != NULL) {
384 acb->xs->error = XS_DRIVER_STUFFUP;
385 untimeout(spc_timeout, acb);
386 spc_done(sc, acb);
387 }
388 }
389
390 sc->sc_prevphase = PH_INVALID;
391 for (r = 0; r < 8; r++) {
392 struct spc_tinfo *ti = &sc->sc_tinfo[r];
393
394 ti->flags = 0;
395 #if SPC_USE_SYNCHRONOUS
396 ti->flags |= DO_SYNC;
397 ti->period = sc->sc_minsync;
398 ti->offset = SPC_SYNC_REQ_ACK_OFS;
399 #else
400 ti->period = ti->offset = 0;
401 #endif
402 #if SPC_USE_WIDE
403 ti->flags |= DO_WIDE;
404 ti->width = SPC_MAX_WIDTH;
405 #else
406 ti->width = 0;
407 #endif
408 }
409
410 sc->sc_state = SPC_IDLE;
411 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL,
412 bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB);
413 }
414
415 void
416 spc_free_acb(sc, acb, flags)
417 struct spc_softc *sc;
418 struct spc_acb *acb;
419 int flags;
420 {
421 int s;
422
423 SPC_TRACE(("spc_free_acb "));
424 s = splbio();
425
426 acb->flags = 0;
427 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
428
429 /*
430 * If there were none, wake anybody waiting for one to come free,
431 * starting with queued entries.
432 */
433 if (acb->chain.tqe_next == 0)
434 wakeup(&sc->free_list);
435
436 splx(s);
437 }
438
439 struct spc_acb *
440 spc_get_acb(sc, flags)
441 struct spc_softc *sc;
442 int flags;
443 {
444 struct spc_acb *acb;
445 int s;
446
447 SPC_TRACE(("spc_get_acb "));
448 s = splbio();
449
450 while ((acb = sc->free_list.tqh_first) == NULL &&
451 (flags & SCSI_NOSLEEP) == 0)
452 tsleep(&sc->free_list, PRIBIO, "spcacb", 0);
453 if (acb) {
454 TAILQ_REMOVE(&sc->free_list, acb, chain);
455 acb->flags |= ACB_ALLOC;
456 }
457
458 splx(s);
459 return acb;
460 }
461
462 /*
464 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
465 */
466
467 /*
468 * Expected sequence:
469 * 1) Command inserted into ready list
470 * 2) Command selected for execution
471 * 3) Command won arbitration and has selected target device
472 * 4) Send message out (identify message, eventually also sync.negotiations)
473 * 5) Send command
474 * 5a) Receive disconnect message, disconnect.
475 * 5b) Reselected by target
476 * 5c) Receive identify message from target.
477 * 6) Send or receive data
478 * 7) Receive status
479 * 8) Receive message (command complete etc.)
480 * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd.
481 * Repeat 2-8 (no disconnects please...)
482 */
483
484 /*
485 * Start a SCSI-command
486 * This function is called by the higher level SCSI-driver to queue/run
487 * SCSI-commands.
488 */
489 int
490 spc_scsi_cmd(xs)
491 struct scsipi_xfer *xs;
492 {
493 struct scsipi_link *sc_link = xs->sc_link;
494 struct spc_softc *sc = sc_link->adapter_softc;
495 struct spc_acb *acb;
496 int s, flags;
497
498 SPC_TRACE(("spc_scsi_cmd "));
499 SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
500 sc_link->scsipi_scsi.target));
501
502 flags = xs->flags;
503 if ((acb = spc_get_acb(sc, flags)) == NULL) {
504 xs->error = XS_DRIVER_STUFFUP;
505 return TRY_AGAIN_LATER;
506 }
507
508 /* Initialize acb */
509 acb->xs = xs;
510 acb->timeout = xs->timeout;
511
512 if (xs->flags & SCSI_RESET) {
513 acb->flags |= ACB_RESET;
514 acb->scsipi_cmd_length = 0;
515 acb->data_length = 0;
516 } else {
517 bcopy(xs->cmd, &acb->scsipi_cmd, xs->cmdlen);
518 #if 1
519 acb->scsipi_cmd.bytes[0] |= sc_link->scsipi_scsi.lun << 5; /* XXX? */
520 #endif
521 acb->scsipi_cmd_length = xs->cmdlen;
522 acb->data_addr = xs->data;
523 acb->data_length = xs->datalen;
524 }
525 acb->target_stat = 0;
526
527 s = splbio();
528
529 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
530 /*
531 * $B%-%e!<$N=hM}Cf$G$J$1$l$P!"%9%1%8%e!<%j%s%03+;O$9$k(B
532 */
533 if (sc->sc_state == SPC_IDLE)
534 spc_sched(sc);
535 /*
536 * $BAw?.$K@.8y$7$?$i!"$9$0$K%j%?!<%s$9$k$+D4$Y$k(B
537 * $B$9$0%j%?!<%s$9$k$J$i(B SUCCESSFULLY_QUEUED $B$rJV$9(B
538 */
539
540 splx(s);
541
542 if ((flags & SCSI_POLL) == 0)
543 return SUCCESSFULLY_QUEUED;
544
545 /* Not allowed to use interrupts, use polling instead */
546 s = splbio();
547 if (spc_poll(sc, xs, acb->timeout)) {
548 spc_timeout(acb);
549 if (spc_poll(sc, xs, acb->timeout))
550 spc_timeout(acb);
551 }
552 splx(s);
553 return COMPLETE;
554 }
555
556 /*
557 * Adjust transfer size in buffer structure
558 */
559 void
560 spc_minphys(bp)
561 struct buf *bp;
562 {
563
564 SPC_TRACE(("spc_minphys "));
565 minphys(bp);
566 }
567
568 /*
569 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
570 */
571 int
572 spc_poll(sc, xs, count)
573 struct spc_softc *sc;
574 struct scsipi_xfer *xs;
575 int count;
576 {
577 bus_space_tag_t iot = sc->sc_iot;
578 bus_space_handle_t ioh = sc->sc_ioh;
579
580 SPC_TRACE(("spc_poll "));
581 while (count) {
582 /*
583 * If we had interrupts enabled, would we
584 * have got an interrupt?
585 */
586 if (bus_space_read_1(iot, ioh, INTS) != 0)
587 spcintr(sc);
588 if ((xs->flags & ITSDONE) != 0)
589 return 0;
590 delay(1000);
591 count--;
592 }
593 return 1;
594 }
595
596 /*
598 * LOW LEVEL SCSI UTILITIES
599 */
600
601 integrate void
602 spc_sched_msgout(sc, m)
603 struct spc_softc *sc;
604 u_char m;
605 {
606 bus_space_tag_t iot = sc->sc_iot;
607 bus_space_handle_t ioh = sc->sc_ioh;
608
609 SPC_TRACE(("spc_sched_msgout "));
610 if (sc->sc_msgpriq == 0)
611 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
612 sc->sc_msgpriq |= m;
613 }
614
615 /*
616 * Set synchronous transfer offset and period.
617 */
618 integrate void
619 spc_setsync(sc, ti)
620 struct spc_softc *sc;
621 struct spc_tinfo *ti;
622 {
623 #if SPC_USE_SYNCHRONOUS
624 bus_space_tag_t iot = sc->sc_iot;
625 bus_space_handle_t ioh = sc->sc_ioh;
626
627 SPC_TRACE(("spc_setsync "));
628 if (ti->offset != 0)
629 bus_space_write_1(iot, ioh, TMOD,
630 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
631 else
632 bus_space_write_1(iot, ioh, TMOD, 0);
633 #endif
634 }
635
636 /*
637 * Start a selection. This is used by spc_sched() to select an idle target,
638 * and by spc_done() to immediately reselect a target to get sense information.
639 */
640 void
641 spc_select(sc, acb)
642 struct spc_softc *sc;
643 struct spc_acb *acb;
644 {
645 struct scsipi_link *sc_link = acb->xs->sc_link;
646 int target = sc_link->scsipi_scsi.target;
647 struct spc_tinfo *ti = &sc->sc_tinfo[target];
648 bus_space_tag_t iot = sc->sc_iot;
649 bus_space_handle_t ioh = sc->sc_ioh;
650
651 SPC_TRACE(("spc_select "));
652 spc_setsync(sc, ti);
653
654 #if 0
655 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
656 #endif
657 #ifdef x68k /* XXX? */
658 do {
659 asm ("nop");
660 } while (bus_space_read_1(iot, ioh, SSTS) &
661 (SSTS_ACTIVE|SSTS_TARGET|SSTS_BUSY));
662 #endif
663
664 bus_space_write_1(iot, ioh, PCTL, 0);
665 bus_space_write_1(iot, ioh, TEMP, (1 << sc->sc_initiator) | (1 << target));
666 /*
667 * BSY $B$K$h$k1~EzBT$A;~4V@_Dj(B ($B@_Dj;~4V$r2a$.$k$H(B selection timeout)
668 * 0 $B$K$9$k$HL58BBT$A(B (x68k $B$G$O(B Tclf == 200ns)
669 * T = (X * 256 + 15) * Tclf * 2 $B$J$N$G(B... 256ms $BBT$D$H$9$k$H(B
670 * 128000ns/200ns = X * 256 + 15
671 * 640 - 15 = X * 256
672 * X = 625 / 256
673 * X = 2 + 113 / 256
674 * $B$J$N$G(B tch $B$K(B 2, tcm $B$K(B 113 $B$rBeF~!#(B($B$$$$$N$+(B?)
675 */
676 bus_space_write_1(iot, ioh, TCH, 2);
677 bus_space_write_1(iot, ioh, TCM, 113);
678 /* BSY $B$H(B SEL $B$,(B 0 $B$K$J$C$F$+$i%U%'!<%:3+;O$^$G$N;~4V(B */
679 bus_space_write_1(iot, ioh, TCL, 3);
680 bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT);
681
682 sc->sc_state = SPC_SELECTING;
683 }
684
685 int
686 spc_reselect(sc, message)
687 struct spc_softc *sc;
688 int message;
689 {
690 u_char selid, target, lun;
691 struct spc_acb *acb;
692 struct scsipi_link *sc_link;
693 struct spc_tinfo *ti;
694
695 SPC_TRACE(("spc_reselect "));
696 /*
697 * The SCSI chip made a snapshot of the data bus while the reselection
698 * was being negotiated. This enables us to determine which target did
699 * the reselect.
700 */
701 selid = sc->sc_selid & ~(1 << sc->sc_initiator);
702 if (selid & (selid - 1)) {
703 printf("%s: reselect with invalid selid %02x; sending DEVICE RESET\n",
704 sc->sc_dev.dv_xname, selid);
705 SPC_BREAK();
706 goto reset;
707 }
708
709 /*
710 * Search wait queue for disconnected cmd
711 * The list should be short, so I haven't bothered with
712 * any more sophisticated structures than a simple
713 * singly linked list.
714 */
715 target = ffs(selid) - 1;
716 lun = message & 0x07;
717 for (acb = sc->nexus_list.tqh_first; acb != NULL;
718 acb = acb->chain.tqe_next) {
719 sc_link = acb->xs->sc_link;
720 if (sc_link->scsipi_scsi.target == target &&
721 sc_link->scsipi_scsi.lun == lun)
722 break;
723 }
724 if (acb == NULL) {
725 printf("%s: reselect from target %d lun %d with no nexus; sending ABORT\n",
726 sc->sc_dev.dv_xname, target, lun);
727 SPC_BREAK();
728 goto abort;
729 }
730
731 /* Make this nexus active again. */
732 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
733 sc->sc_state = SPC_CONNECTED;
734 sc->sc_nexus = acb;
735 ti = &sc->sc_tinfo[target];
736 ti->lubusy |= (1 << lun);
737 spc_setsync(sc, ti);
738
739 if (acb->flags & ACB_RESET)
740 spc_sched_msgout(sc, SEND_DEV_RESET);
741 else if (acb->flags & ACB_ABORT)
742 spc_sched_msgout(sc, SEND_ABORT);
743
744 /* Do an implicit RESTORE POINTERS. */
745 sc->sc_dp = acb->data_addr;
746 sc->sc_dleft = acb->data_length;
747 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
748 sc->sc_cleft = acb->scsipi_cmd_length;
749
750 return (0);
751
752 reset:
753 spc_sched_msgout(sc, SEND_DEV_RESET);
754 return (1);
755
756 abort:
757 spc_sched_msgout(sc, SEND_ABORT);
758 return (1);
759 }
760
761 /*
763 * Schedule a SCSI operation. This has now been pulled out of the interrupt
764 * handler so that we may call it from spc_scsi_cmd and spc_done. This may
765 * save us an unecessary interrupt just to get things going. Should only be
766 * called when state == SPC_IDLE and at bio pl.
767 */
768 void
769 spc_sched(sc)
770 register struct spc_softc *sc;
771 {
772 struct spc_acb *acb;
773 struct scsipi_link *sc_link;
774 struct spc_tinfo *ti;
775
776 /* missing the hw, just return and wait for our hw */
777 if (sc->sc_flags & SPC_INACTIVE)
778 return;
779 SPC_TRACE(("spc_sched "));
780 /*
781 * Find first acb in ready queue that is for a target/lunit pair that
782 * is not busy.
783 */
784 for (acb = sc->ready_list.tqh_first; acb != NULL;
785 acb = acb->chain.tqe_next) {
786 sc_link = acb->xs->sc_link;
787 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
788 if ((ti->lubusy & (1 << sc_link->scsipi_scsi.lun)) == 0) {
789 SPC_MISC(("selecting %d:%d ",
790 sc_link->scsipi_scsi.target, sc_link->scsipi_scsi.lun));
791 TAILQ_REMOVE(&sc->ready_list, acb, chain);
792 sc->sc_nexus = acb;
793 spc_select(sc, acb);
794 return;
795 } else
796 SPC_MISC(("%d:%d busy\n",
797 sc_link->scsipi_scsi.target, sc_link->scsipi_scsi.lun));
798 }
799 SPC_MISC(("idle "));
800 /* Nothing to start; just enable reselections and wait. */
801 }
802
803 void
805 spc_sense(sc, acb)
806 struct spc_softc *sc;
807 struct spc_acb *acb;
808 {
809 struct scsipi_xfer *xs = acb->xs;
810 struct scsipi_link *sc_link = xs->sc_link;
811 struct spc_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
812 struct scsipi_sense *ss = (void *)&acb->scsipi_cmd;
813
814 SPC_MISC(("requesting sense "));
815 /* Next, setup a request sense command block */
816 bzero(ss, sizeof(*ss));
817 ss->opcode = REQUEST_SENSE;
818 ss->byte2 = sc_link->scsipi_scsi.lun << 5;
819 ss->length = sizeof(struct scsipi_sense_data);
820 acb->scsipi_cmd_length = sizeof(*ss);
821 acb->data_addr = (char *)&xs->sense.scsi_sense;
822 acb->data_length = sizeof(struct scsipi_sense_data);
823 acb->flags |= ACB_SENSE;
824 ti->senses++;
825 if (acb->flags & ACB_NEXUS)
826 ti->lubusy &= ~(1 << sc_link->scsipi_scsi.lun);
827 if (acb == sc->sc_nexus) {
828 spc_select(sc, acb);
829 } else {
830 spc_dequeue(sc, acb);
831 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
832 if (sc->sc_state == SPC_IDLE)
833 spc_sched(sc);
834 }
835 }
836
837 /*
838 * POST PROCESSING OF SCSI_CMD (usually current)
839 */
840 void
841 spc_done(sc, acb)
842 struct spc_softc *sc;
843 struct spc_acb *acb;
844 {
845 struct scsipi_xfer *xs = acb->xs;
846 struct scsipi_link *sc_link = xs->sc_link;
847 struct spc_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
848
849 SPC_TRACE(("spc_done "));
850
851 /*
852 * Now, if we've come here with no error code, i.e. we've kept the
853 * initial XS_NOERROR, and the status code signals that we should
854 * check sense, we'll need to set up a request sense cmd block and
855 * push the command back into the ready queue *before* any other
856 * commands for this target/lunit, else we lose the sense info.
857 * We don't support chk sense conditions for the request sense cmd.
858 */
859 if (xs->error == XS_NOERROR) {
860 if (acb->flags & ACB_ABORT) {
861 xs->error = XS_DRIVER_STUFFUP;
862 } else if (acb->flags & ACB_SENSE) {
863 xs->error = XS_SENSE;
864 } else {
865 switch (acb->target_stat) {
866 case SCSI_CHECK:
867 /* First, save the return values */
868 xs->resid = acb->data_length;
869 xs->status = acb->target_stat;
870 spc_sense(sc, acb);
871 return;
872 case SCSI_BUSY:
873 xs->error = XS_BUSY;
874 break;
875 case SCSI_OK:
876 xs->resid = acb->data_length;
877 break;
878 default:
879 xs->error = XS_DRIVER_STUFFUP;
880 #if SPC_DEBUG
881 printf("%s: spc_done: bad stat 0x%x\n",
882 sc->sc_dev.dv_xname, acb->target_stat);
883 #endif
884 break;
885 }
886 }
887 }
888
889 xs->flags |= ITSDONE;
890
891 #if SPC_DEBUG
892 if ((spc_debug & SPC_SHOWMISC) != 0) {
893 if (xs->resid != 0)
894 printf("resid=%d ", xs->resid);
895 if (xs->error == XS_SENSE)
896 printf("sense=0x%02x\n", xs->sense.scsi_sense.error_code);
897 else
898 printf("error=%d\n", xs->error);
899 }
900 #endif
901
902 /*
903 * Remove the ACB from whatever queue it happens to be on.
904 */
905 if (acb->flags & ACB_NEXUS)
906 ti->lubusy &= ~(1 << sc_link->scsipi_scsi.lun);
907 if (acb == sc->sc_nexus) {
908 sc->sc_nexus = NULL;
909 sc->sc_state = SPC_IDLE;
910 spc_sched(sc);
911 } else
912 spc_dequeue(sc, acb);
913
914 spc_free_acb(sc, acb, xs->flags);
915 ti->cmds++;
916 scsipi_done(xs);
917 }
918
919 void
920 spc_dequeue(sc, acb)
921 struct spc_softc *sc;
922 struct spc_acb *acb;
923 {
924
925 SPC_TRACE(("spc_dequeue "));
926 if (acb->flags & ACB_NEXUS) {
927 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
928 } else {
929 TAILQ_REMOVE(&sc->ready_list, acb, chain);
930 }
931 }
932
933 /*
935 * INTERRUPT/PROTOCOL ENGINE
936 */
937
938 #define IS1BYTEMSG(m) (((m) != 0x01 && (m) < 0x20) || (m) >= 0x80)
939 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
940 #define ISEXTMSG(m) ((m) == 0x01)
941
942 /*
943 * Precondition:
944 * The SCSI bus is already in the MSGI phase and there is a message byte
945 * on the bus, along with an asserted REQ signal.
946 */
947 void
948 spc_msgin(sc)
949 register struct spc_softc *sc;
950 {
951 bus_space_tag_t iot = sc->sc_iot;
952 bus_space_handle_t ioh = sc->sc_ioh;
953 int n;
954
955 SPC_TRACE(("spc_msgin "));
956
957 if (sc->sc_prevphase == PH_MSGIN) {
958 /* This is a continuation of the previous message. */
959 n = sc->sc_imp - sc->sc_imess;
960 goto nextbyte;
961 }
962
963 /* This is a new MESSAGE IN phase. Clean up our state. */
964 sc->sc_flags &= ~SPC_DROP_MSGIN;
965
966 nextmsg:
967 n = 0;
968 sc->sc_imp = &sc->sc_imess[n];
969
970 nextbyte:
971 /*
972 * Read a whole message, but don't ack the last byte. If we reject the
973 * message, we have to assert ATN during the message transfer phase
974 * itself.
975 */
976 for (;;) {
977 #if 0
978 for (;;) {
979 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
980 break;
981 /* Wait for REQINIT. XXX Need timeout. */
982 }
983 #endif
984 if (bus_space_read_1(iot, ioh, INTS) != 0) {
985 /*
986 * Target left MESSAGE IN, probably because it
987 * a) noticed our ATN signal, or
988 * b) ran out of messages.
989 */
990 goto out;
991 }
992
993 /* If parity error, just dump everything on the floor. */
994 if ((bus_space_read_1(iot, ioh, SERR) &
995 (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
996 sc->sc_flags |= SPC_DROP_MSGIN;
997 spc_sched_msgout(sc, SEND_PARITY_ERROR);
998 }
999
1000 /* send TRANSFER command. */
1001 bus_space_write_1(iot, ioh, TCH, 0);
1002 bus_space_write_1(iot, ioh, TCM, 0);
1003 bus_space_write_1(iot, ioh, TCL, 1);
1004 bus_space_write_1(iot, ioh, PCTL,
1005 sc->sc_phase | PCTL_BFINT_ENAB);
1006 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); /* XXX */
1007 for (;;) {
1008 /*if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0
1009 && (bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)*/
1010 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) == 0)
1011 break;
1012 if (bus_space_read_1(iot, ioh, INTS) != 0)
1013 goto out;
1014 }
1015
1016 /* Gather incoming message bytes if needed. */
1017 if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) {
1018 if (n >= SPC_MAX_MSG_LEN) {
1019 (void) bus_space_read_1(iot, ioh, DREG);
1020 sc->sc_flags |= SPC_DROP_MSGIN;
1021 spc_sched_msgout(sc, SEND_REJECT);
1022 } else {
1023 *sc->sc_imp++ = bus_space_read_1(iot, ioh, DREG);
1024 n++;
1025 /*
1026 * This testing is suboptimal, but most
1027 * messages will be of the one byte variety, so
1028 * it should not affect performance
1029 * significantly.
1030 */
1031 if (n == 1 && IS1BYTEMSG(sc->sc_imess[0]))
1032 break;
1033 if (n == 2 && IS2BYTEMSG(sc->sc_imess[0]))
1034 break;
1035 if (n >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
1036 n == sc->sc_imess[1] + 2)
1037 break;
1038 }
1039 } else
1040 (void) bus_space_read_1(iot, ioh, DREG);
1041
1042 /*
1043 * If we reach this spot we're either:
1044 * a) in the middle of a multi-byte message, or
1045 * b) dropping bytes.
1046 */
1047 #if 0
1048 /* Ack the last byte read. */
1049 /*(void) bus_space_read_1(iot, ioh, DREG);*/
1050 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1051 ;
1052 #endif
1053 }
1054
1055 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
1056
1057 /* We now have a complete message. Parse it. */
1058 switch (sc->sc_state) {
1059 struct spc_acb *acb;
1060 struct scsipi_link *sc_link;
1061 struct spc_tinfo *ti;
1062
1063 case SPC_CONNECTED:
1064 SPC_ASSERT(sc->sc_nexus != NULL);
1065 acb = sc->sc_nexus;
1066 ti = &sc->sc_tinfo[acb->xs->sc_link->scsipi_scsi.target];
1067
1068 switch (sc->sc_imess[0]) {
1069 case MSG_CMDCOMPLETE:
1070 if (sc->sc_dleft < 0) {
1071 sc_link = acb->xs->sc_link;
1072 printf("%s: %d extra bytes from %d:%d\n",
1073 sc->sc_dev.dv_xname, -sc->sc_dleft,
1074 sc_link->scsipi_scsi.target, sc_link->scsipi_scsi.lun);
1075 acb->data_length = 0;
1076 }
1077 acb->xs->resid = acb->data_length = sc->sc_dleft;
1078 sc->sc_state = SPC_CMDCOMPLETE;
1079 break;
1080
1081 case MSG_PARITY_ERROR:
1082 /* Resend the last message. */
1083 spc_sched_msgout(sc, sc->sc_lastmsg);
1084 break;
1085
1086 case MSG_MESSAGE_REJECT:
1087 SPC_MISC(("message rejected %02x ", sc->sc_lastmsg));
1088 switch (sc->sc_lastmsg) {
1089 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1090 case SEND_IDENTIFY:
1091 ti->flags &= ~(DO_SYNC | DO_WIDE);
1092 ti->period = ti->offset = 0;
1093 spc_setsync(sc, ti);
1094 ti->width = 0;
1095 break;
1096 #endif
1097 #if SPC_USE_SYNCHRONOUS
1098 case SEND_SDTR:
1099 ti->flags &= ~DO_SYNC;
1100 ti->period = ti->offset = 0;
1101 spc_setsync(sc, ti);
1102 break;
1103 #endif
1104 #if SPC_USE_WIDE
1105 case SEND_WDTR:
1106 ti->flags &= ~DO_WIDE;
1107 ti->width = 0;
1108 break;
1109 #endif
1110 case SEND_INIT_DET_ERR:
1111 spc_sched_msgout(sc, SEND_ABORT);
1112 break;
1113 }
1114 break;
1115
1116 case MSG_NOOP:
1117 break;
1118
1119 case MSG_DISCONNECT:
1120 ti->dconns++;
1121 sc->sc_state = SPC_DISCONNECT;
1122 break;
1123
1124 case MSG_SAVEDATAPOINTER:
1125 acb->data_addr = sc->sc_dp;
1126 acb->data_length = sc->sc_dleft;
1127 break;
1128
1129 case MSG_RESTOREPOINTERS:
1130 sc->sc_dp = acb->data_addr;
1131 sc->sc_dleft = acb->data_length;
1132 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1133 sc->sc_cleft = acb->scsipi_cmd_length;
1134 break;
1135
1136 case MSG_EXTENDED:
1137 switch (sc->sc_imess[2]) {
1138 #if SPC_USE_SYNCHRONOUS
1139 case MSG_EXT_SDTR:
1140 if (sc->sc_imess[1] != 3)
1141 goto reject;
1142 ti->period = sc->sc_imess[3];
1143 ti->offset = sc->sc_imess[4];
1144 ti->flags &= ~DO_SYNC;
1145 if (ti->offset == 0) {
1146 } else if (ti->period < sc->sc_minsync ||
1147 ti->period > sc->sc_maxsync ||
1148 ti->offset > 8) {
1149 ti->period = ti->offset = 0;
1150 spc_sched_msgout(sc, SEND_SDTR);
1151 } else {
1152 scsi_print_addr(acb->xs->sc_link);
1153 printf("sync, offset %d, period %dnsec\n",
1154 ti->offset, ti->period * 4);
1155 }
1156 spc_setsync(sc, ti);
1157 break;
1158 #endif
1159
1160 #if SPC_USE_WIDE
1161 case MSG_EXT_WDTR:
1162 if (sc->sc_imess[1] != 2)
1163 goto reject;
1164 ti->width = sc->sc_imess[3];
1165 ti->flags &= ~DO_WIDE;
1166 if (ti->width == 0) {
1167 } else if (ti->width > SPC_MAX_WIDTH) {
1168 ti->width = 0;
1169 spc_sched_msgout(sc, SEND_WDTR);
1170 } else {
1171 scsi_print_addr(acb->xs->sc_link);
1172 printf("wide, width %d\n",
1173 1 << (3 + ti->width));
1174 }
1175 break;
1176 #endif
1177
1178 default:
1179 printf("%s: unrecognized MESSAGE EXTENDED; sending REJECT\n",
1180 sc->sc_dev.dv_xname);
1181 SPC_BREAK();
1182 goto reject;
1183 }
1184 break;
1185
1186 default:
1187 printf("%s: unrecognized MESSAGE; sending REJECT\n",
1188 sc->sc_dev.dv_xname);
1189 SPC_BREAK();
1190 reject:
1191 spc_sched_msgout(sc, SEND_REJECT);
1192 break;
1193 }
1194 break;
1195
1196 case SPC_RESELECTED:
1197 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
1198 printf("%s: reselect without IDENTIFY; sending DEVICE RESET\n",
1199 sc->sc_dev.dv_xname);
1200 SPC_BREAK();
1201 goto reset;
1202 }
1203
1204 (void) spc_reselect(sc, sc->sc_imess[0]);
1205 break;
1206
1207 default:
1208 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1209 sc->sc_dev.dv_xname);
1210 SPC_BREAK();
1211 reset:
1212 spc_sched_msgout(sc, SEND_DEV_RESET);
1213 break;
1214
1215 #ifdef notdef
1216 abort:
1217 spc_sched_msgout(sc, SEND_ABORT);
1218 break;
1219 #endif
1220 }
1221
1222 /* Ack the last message byte. */
1223 #if 0 /* XXX? */
1224 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1225 ;
1226 #endif
1227
1228 /* Go get the next message, if any. */
1229 goto nextmsg;
1230
1231 out:
1232 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1233 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
1234 }
1235
1236 /*
1237 * Send the highest priority, scheduled message.
1238 */
1239 void
1240 spc_msgout(sc)
1241 register struct spc_softc *sc;
1242 {
1243 bus_space_tag_t iot = sc->sc_iot;
1244 bus_space_handle_t ioh = sc->sc_ioh;
1245 #if SPC_USE_SYNCHRONOUS
1246 struct spc_tinfo *ti;
1247 #endif
1248 int n;
1249
1250 SPC_TRACE(("spc_msgout "));
1251
1252 if (sc->sc_prevphase == PH_MSGOUT) {
1253 if (sc->sc_omp == sc->sc_omess) {
1254 /*
1255 * This is a retransmission.
1256 *
1257 * We get here if the target stayed in MESSAGE OUT
1258 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates
1259 * that all of the previously transmitted messages must
1260 * be sent again, in the same order. Therefore, we
1261 * requeue all the previously transmitted messages, and
1262 * start again from the top. Our simple priority
1263 * scheme keeps the messages in the right order.
1264 */
1265 SPC_MISC(("retransmitting "));
1266 sc->sc_msgpriq |= sc->sc_msgoutq;
1267 /*
1268 * Set ATN. If we're just sending a trivial 1-byte
1269 * message, we'll clear ATN later on anyway.
1270 */
1271 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); /* XXX? */
1272 } else {
1273 /* This is a continuation of the previous message. */
1274 n = sc->sc_omp - sc->sc_omess;
1275 goto nextbyte;
1276 }
1277 }
1278
1279 /* No messages transmitted so far. */
1280 sc->sc_msgoutq = 0;
1281 sc->sc_lastmsg = 0;
1282
1283 nextmsg:
1284 /* Pick up highest priority message. */
1285 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
1286 sc->sc_msgpriq &= ~sc->sc_currmsg;
1287 sc->sc_msgoutq |= sc->sc_currmsg;
1288
1289 /* Build the outgoing message data. */
1290 switch (sc->sc_currmsg) {
1291 case SEND_IDENTIFY:
1292 SPC_ASSERT(sc->sc_nexus != NULL);
1293 sc->sc_omess[0] =
1294 MSG_IDENTIFY(sc->sc_nexus->xs->sc_link->scsipi_scsi.lun, 1);
1295 n = 1;
1296 break;
1297
1298 #if SPC_USE_SYNCHRONOUS
1299 case SEND_SDTR:
1300 SPC_ASSERT(sc->sc_nexus != NULL);
1301 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->scsipi_scsi.target];
1302 sc->sc_omess[4] = MSG_EXTENDED;
1303 sc->sc_omess[3] = 3;
1304 sc->sc_omess[2] = MSG_EXT_SDTR;
1305 sc->sc_omess[1] = ti->period >> 2;
1306 sc->sc_omess[0] = ti->offset;
1307 n = 5;
1308 break;
1309 #endif
1310
1311 #if SPC_USE_WIDE
1312 case SEND_WDTR:
1313 SPC_ASSERT(sc->sc_nexus != NULL);
1314 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->scsipi_scsi.target];
1315 sc->sc_omess[3] = MSG_EXTENDED;
1316 sc->sc_omess[2] = 2;
1317 sc->sc_omess[1] = MSG_EXT_WDTR;
1318 sc->sc_omess[0] = ti->width;
1319 n = 4;
1320 break;
1321 #endif
1322
1323 case SEND_DEV_RESET:
1324 sc->sc_flags |= SPC_ABORTING;
1325 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1326 n = 1;
1327 break;
1328
1329 case SEND_REJECT:
1330 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1331 n = 1;
1332 break;
1333
1334 case SEND_PARITY_ERROR:
1335 sc->sc_omess[0] = MSG_PARITY_ERROR;
1336 n = 1;
1337 break;
1338
1339 case SEND_INIT_DET_ERR:
1340 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1341 n = 1;
1342 break;
1343
1344 case SEND_ABORT:
1345 sc->sc_flags |= SPC_ABORTING;
1346 sc->sc_omess[0] = MSG_ABORT;
1347 n = 1;
1348 break;
1349
1350 default:
1351 printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
1352 sc->sc_dev.dv_xname);
1353 SPC_BREAK();
1354 sc->sc_omess[0] = MSG_NOOP;
1355 n = 1;
1356 break;
1357 }
1358 sc->sc_omp = &sc->sc_omess[n];
1359
1360 nextbyte:
1361 /* Send message bytes. */
1362 /* send TRANSFER command. */
1363 bus_space_write_1(iot, ioh, TCH, n >> 16);
1364 bus_space_write_1(iot, ioh, TCM, n >> 8);
1365 bus_space_write_1(iot, ioh, TCL, n);
1366 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1367 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR); /* XXX */
1368 for (;;) {
1369 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1370 break;
1371 if (bus_space_read_1(iot, ioh, INTS) != 0)
1372 goto out;
1373 }
1374 for (;;) {
1375 #if 0
1376 for (;;) {
1377 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
1378 break;
1379 /* Wait for REQINIT. XXX Need timeout. */
1380 }
1381 #endif
1382 if (bus_space_read_1(iot, ioh, INTS) != 0) {
1383 /*
1384 * Target left MESSAGE OUT, possibly to reject
1385 * our message.
1386 *
1387 * If this is the last message being sent, then we
1388 * deassert ATN, since either the target is going to
1389 * ignore this message, or it's going to ask for a
1390 * retransmission via MESSAGE PARITY ERROR (in which
1391 * case we reassert ATN anyway).
1392 */
1393 #if 0
1394 if (sc->sc_msgpriq == 0)
1395 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1396 #endif
1397 goto out;
1398 }
1399
1400 #if 0
1401 /* Clear ATN before last byte if this is the last message. */
1402 if (n == 1 && sc->sc_msgpriq == 0)
1403 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1404 #endif
1405
1406 while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0)
1407 ;
1408 /* Send message byte. */
1409 bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp);
1410 --n;
1411 /* Keep track of the last message we've sent any bytes of. */
1412 sc->sc_lastmsg = sc->sc_currmsg;
1413 #if 0
1414 /* Wait for ACK to be negated. XXX Need timeout. */
1415 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1416 ;
1417 #endif
1418
1419 if (n == 0)
1420 break;
1421 }
1422
1423 /* We get here only if the entire message has been transmitted. */
1424 if (sc->sc_msgpriq != 0) {
1425 /* There are more outgoing messages. */
1426 goto nextmsg;
1427 }
1428
1429 /*
1430 * The last message has been transmitted. We need to remember the last
1431 * message transmitted (in case the target switches to MESSAGE IN phase
1432 * and sends a MESSAGE REJECT), and the list of messages transmitted
1433 * this time around (in case the target stays in MESSAGE OUT phase to
1434 * request a retransmit).
1435 */
1436
1437 out:
1438 /* Disable REQ/ACK protocol. */
1439 }
1440
1441 /*
1443 * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc
1444 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
1445 * and ACK deasserted (i.e. waiting for a data byte)
1446 *
1447 * This new revision has been optimized (I tried) to make the common case fast,
1448 * and the rarer cases (as a result) somewhat more comlex
1449 */
1450 int
1451 spc_dataout_pio(sc, p, n)
1452 register struct spc_softc *sc;
1453 u_char *p;
1454 int n;
1455 {
1456 bus_space_tag_t iot = sc->sc_iot;
1457 bus_space_handle_t ioh = sc->sc_ioh;
1458 register u_char intstat = 0;
1459 int out = 0;
1460 #define DOUTAMOUNT 8 /* Full FIFO */
1461
1462 SPC_TRACE(("spc_dataout_pio "));
1463 /* send TRANSFER command. */
1464 bus_space_write_1(iot, ioh, TCH, n >> 16);
1465 bus_space_write_1(iot, ioh, TCM, n >> 8);
1466 bus_space_write_1(iot, ioh, TCL, n);
1467 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1468 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR); /* XXX */
1469 for (;;) {
1470 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1471 break;
1472 if (bus_space_read_1(iot, ioh, INTS) != 0)
1473 break;
1474 }
1475
1476 /*
1477 * I have tried to make the main loop as tight as possible. This
1478 * means that some of the code following the loop is a bit more
1479 * complex than otherwise.
1480 */
1481 while (n > 0) {
1482 int xfer;
1483
1484 for (;;) {
1485 intstat = bus_space_read_1(iot, ioh, INTS);
1486 /* $B%P%C%U%!$,6u$K$J$k$^$GBT$D(B */
1487 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)
1488 break;
1489 /* $B$?$@$73d$j9~$_$,F~$C$F$-$?$iH4$1$k(B */
1490 if (intstat != 0)
1491 goto phasechange;
1492 }
1493
1494 xfer = min(DOUTAMOUNT, n);
1495
1496 SPC_MISC(("%d> ", xfer));
1497
1498 n -= xfer;
1499 out += xfer;
1500
1501 while (xfer-- > 0) {
1502 bus_space_write_1(iot, ioh, DREG, *p++);
1503 }
1504 }
1505
1506 if (out == 0) {
1507 for (;;) {
1508 if (bus_space_read_1(iot, ioh, INTS) != 0)
1509 break;
1510 }
1511 SPC_MISC(("extra data "));
1512 } else {
1513 /* See the bytes off chip */
1514 for (;;) {
1515 /* $B%P%C%U%!$,6u$K$J$k$^$GBT$D(B */
1516 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)
1517 break;
1518 intstat = bus_space_read_1(iot, ioh, INTS);
1519 /* $B$?$@$73d$j9~$_$,F~$C$F$-$?$iH4$1$k(B */
1520 if (intstat != 0)
1521 goto phasechange;
1522 }
1523 }
1524
1525 phasechange:
1526 /* Stop the FIFO data path. */
1527
1528 if (intstat != 0) {
1529 /* Some sort of phase change. */
1530 int amount;
1531
1532 amount = ((bus_space_read_1(iot, ioh, TCH) << 16) |
1533 (bus_space_read_1(iot, ioh, TCM) << 8) |
1534 bus_space_read_1(iot, ioh, TCL));
1535 if (amount > 0) {
1536 out -= amount;
1537 SPC_MISC(("+%d ", amount));
1538 }
1539 }
1540
1541 /* Turn on ENREQINIT again. */
1542
1543 return out;
1544 }
1545
1546 /*
1548 * spc_datain_pio: perform data transfers using the FIFO datapath in the spc
1549 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
1550 * and ACK deasserted (i.e. at least one byte is ready).
1551 *
1552 * For now, uses a pretty dumb algorithm, hangs around until all data has been
1553 * transferred. This, is OK for fast targets, but not so smart for slow
1554 * targets which don't disconnect or for huge transfers.
1555 */
1556 int
1557 spc_datain_pio(sc, p, n)
1558 register struct spc_softc *sc;
1559 u_char *p;
1560 int n;
1561 {
1562 bus_space_tag_t iot = sc->sc_iot;
1563 bus_space_handle_t ioh = sc->sc_ioh;
1564 register u_short intstat;
1565 int in = 0;
1566 #define DINAMOUNT 8 /* Full FIFO */
1567
1568 SPC_TRACE(("spc_datain_pio "));
1569 /* send TRANSFER command. */
1570 bus_space_write_1(iot, ioh, TCH, n >> 16);
1571 bus_space_write_1(iot, ioh, TCM, n >> 8);
1572 bus_space_write_1(iot, ioh, TCL, n);
1573 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1574 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); /* XXX */
1575 for (;;) {
1576 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1577 break;
1578 if (bus_space_read_1(iot, ioh, INTS) != 0)
1579 goto phasechange;
1580 }
1581
1582 /* We leave this loop if one or more of the following is true:
1583 * a) phase != PH_DATAIN && FIFOs are empty
1584 * b) reset has occurred or busfree is detected.
1585 */
1586 while (n > 0) {
1587 int xfer;
1588
1589 #define INTSMASK 0xff
1590 /* Wait for fifo half full or phase mismatch */
1591 for (;;) {
1592 intstat = ((bus_space_read_1(iot, ioh, SSTS) << 8) |
1593 bus_space_read_1(iot, ioh, INTS));
1594 if ((intstat & (INTSMASK | (SSTS_DREG_FULL << 8))) !=
1595 0)
1596 break;
1597 if ((intstat & (SSTS_DREG_EMPTY << 8)) == 0)
1598 break;
1599 }
1600
1601 #if 1
1602 if ((intstat & INTSMASK) != 0)
1603 goto phasechange;
1604 #else
1605 if ((intstat & INTSMASK) != 0 &&
1606 (intstat & (SSTS_DREG_EMPTY << 8)))
1607 goto phasechange;
1608 #endif
1609 if ((intstat & (SSTS_DREG_FULL << 8)) != 0)
1610 xfer = min(DINAMOUNT, n);
1611 else
1612 xfer = min(1, n);
1613
1614 SPC_MISC((">%d ", xfer));
1615
1616 n -= xfer;
1617 in += xfer;
1618
1619 while (xfer-- > 0) {
1620 *p++ = bus_space_read_1(iot, ioh, DREG);
1621 }
1622
1623 if ((intstat & INTSMASK) != 0)
1624 goto phasechange;
1625 }
1626
1627 /*
1628 * Some SCSI-devices are rude enough to transfer more data than what
1629 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
1630 * requested 512. Test for progress, i.e. real transfers. If no real
1631 * transfers have been performed (n is probably already zero) and the
1632 * FIFO is not empty, waste some bytes....
1633 */
1634 if (in == 0) {
1635 for (;;) {
1636 if (bus_space_read_1(iot, ioh, INTS) != 0)
1637 break;
1638 }
1639 SPC_MISC(("extra data "));
1640 }
1641
1642 phasechange:
1643 /* Stop the FIFO data path. */
1644
1645 /* Turn on ENREQINIT again. */
1646
1647 return in;
1648 }
1649
1650 /*
1652 * Catch an interrupt from the adaptor
1653 */
1654 /*
1655 * This is the workhorse routine of the driver.
1656 * Deficiencies (for now):
1657 * 1) always uses programmed I/O
1658 */
1659 int
1660 spcintr(arg)
1661 void *arg;
1662 {
1663 register struct spc_softc *sc = arg;
1664 bus_space_tag_t iot = sc->sc_iot;
1665 bus_space_handle_t ioh = sc->sc_ioh;
1666 u_char ints;
1667 register struct spc_acb *acb;
1668 register struct scsipi_link *sc_link;
1669 struct spc_tinfo *ti;
1670 int n;
1671
1672 /*
1673 * $B3d$j9~$_6X;_$K$9$k(B
1674 */
1675 bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB);
1676
1677 SPC_TRACE(("spcintr "));
1678
1679 loop:
1680 /*
1681 * $BA4E>Aw$,40A4$K=*N;$9$k$^$G%k!<%W$9$k(B
1682 */
1683 /*
1684 * First check for abnormal conditions, such as reset.
1685 */
1686 #ifdef x68k /* XXX? */
1687 while ((ints = bus_space_read_1(iot, ioh, INTS)) == 0)
1688 delay(1);
1689 SPC_MISC(("ints = 0x%x ", ints));
1690 #else
1691 ints = bus_space_read_1(iot, ioh, INTS);
1692 SPC_MISC(("ints = 0x%x ", ints));
1693 #endif
1694
1695 if ((ints & INTS_RST) != 0) {
1696 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
1697 goto reset;
1698 }
1699
1700 /*
1701 * Check for less serious errors.
1702 */
1703 if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
1704 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
1705 if (sc->sc_prevphase == PH_MSGIN) {
1706 sc->sc_flags |= SPC_DROP_MSGIN;
1707 spc_sched_msgout(sc, SEND_PARITY_ERROR);
1708 } else
1709 spc_sched_msgout(sc, SEND_INIT_DET_ERR);
1710 }
1711
1712 /*
1713 * If we're not already busy doing something test for the following
1714 * conditions:
1715 * 1) We have been reselected by something
1716 * 2) We have selected something successfully
1717 * 3) Our selection process has timed out
1718 * 4) This is really a bus free interrupt just to get a new command
1719 * going?
1720 * 5) Spurious interrupt?
1721 */
1722 switch (sc->sc_state) {
1723 case SPC_IDLE:
1724 case SPC_SELECTING:
1725 SPC_MISC(("ints:0x%02x ", ints));
1726
1727 if ((ints & INTS_SEL) != 0) {
1728 /*
1729 * We don't currently support target mode.
1730 */
1731 printf("%s: target mode selected; going to BUS FREE\n",
1732 sc->sc_dev.dv_xname);
1733
1734 goto sched;
1735 } else if ((ints & INTS_RESEL) != 0) {
1736 SPC_MISC(("reselected "));
1737
1738 /*
1739 * If we're trying to select a target ourselves,
1740 * push our command back into the ready list.
1741 */
1742 if (sc->sc_state == SPC_SELECTING) {
1743 SPC_MISC(("backoff selector "));
1744 SPC_ASSERT(sc->sc_nexus != NULL);
1745 acb = sc->sc_nexus;
1746 sc->sc_nexus = NULL;
1747 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
1748 }
1749
1750 /* Save reselection ID. */
1751 sc->sc_selid = bus_space_read_1(iot, ioh, TEMP);
1752
1753 sc->sc_state = SPC_RESELECTED;
1754 } else if ((ints & INTS_CMD_DONE) != 0) {
1755 SPC_MISC(("selected "));
1756
1757 /*
1758 * We have selected a target. Things to do:
1759 * a) Determine what message(s) to send.
1760 * b) Verify that we're still selecting the target.
1761 * c) Mark device as busy.
1762 */
1763 if (sc->sc_state != SPC_SELECTING) {
1764 printf("%s: selection out while idle; resetting\n",
1765 sc->sc_dev.dv_xname);
1766 SPC_BREAK();
1767 goto reset;
1768 }
1769 SPC_ASSERT(sc->sc_nexus != NULL);
1770 acb = sc->sc_nexus;
1771 sc_link = acb->xs->sc_link;
1772 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1773
1774 sc->sc_msgpriq = SEND_IDENTIFY;
1775 if (acb->flags & ACB_RESET)
1776 sc->sc_msgpriq |= SEND_DEV_RESET;
1777 else if (acb->flags & ACB_ABORT)
1778 sc->sc_msgpriq |= SEND_ABORT;
1779 else {
1780 #if SPC_USE_SYNCHRONOUS
1781 if ((ti->flags & DO_SYNC) != 0)
1782 sc->sc_msgpriq |= SEND_SDTR;
1783 #endif
1784 #if SPC_USE_WIDE
1785 if ((ti->flags & DO_WIDE) != 0)
1786 sc->sc_msgpriq |= SEND_WDTR;
1787 #endif
1788 }
1789
1790 acb->flags |= ACB_NEXUS;
1791 ti->lubusy |= (1 << sc_link->scsipi_scsi.lun);
1792
1793 /* Do an implicit RESTORE POINTERS. */
1794 sc->sc_dp = acb->data_addr;
1795 sc->sc_dleft = acb->data_length;
1796 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1797 sc->sc_cleft = acb->scsipi_cmd_length;
1798
1799 /* On our first connection, schedule a timeout. */
1800 if ((acb->xs->flags & SCSI_POLL) == 0)
1801 timeout(spc_timeout, acb, (acb->timeout * hz) / 1000);
1802
1803 sc->sc_state = SPC_CONNECTED;
1804 } else if ((ints & INTS_TIMEOUT) != 0) {
1805 SPC_MISC(("selection timeout "));
1806
1807 if (sc->sc_state != SPC_SELECTING) {
1808 printf("%s: selection timeout while idle; resetting\n",
1809 sc->sc_dev.dv_xname);
1810 SPC_BREAK();
1811 goto reset;
1812 }
1813 SPC_ASSERT(sc->sc_nexus != NULL);
1814 acb = sc->sc_nexus;
1815
1816 delay(250);
1817
1818 acb->xs->error = XS_SELTIMEOUT;
1819 goto finish;
1820 } else {
1821 if (sc->sc_state != SPC_IDLE) {
1822 printf("%s: BUS FREE while not idle; state=%d\n",
1823 sc->sc_dev.dv_xname, sc->sc_state);
1824 SPC_BREAK();
1825 goto out;
1826 }
1827
1828 goto sched;
1829 }
1830
1831 /*
1832 * Turn off selection stuff, and prepare to catch bus free
1833 * interrupts, parity errors, and phase changes.
1834 */
1835
1836 sc->sc_flags = 0;
1837 sc->sc_prevphase = PH_INVALID;
1838 goto dophase;
1839 }
1840
1841 if ((ints & INTS_DISCON) != 0) {
1842 /* We've gone to BUS FREE phase. */
1843 bus_space_write_1(iot, ioh, PCTL,
1844 bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB);
1845 /* disable disconnect interrupt */
1846 bus_space_write_1(iot, ioh, INTS, ints);
1847 /* XXX reset interrput */
1848
1849 switch (sc->sc_state) {
1850 case SPC_RESELECTED:
1851 goto sched;
1852
1853 case SPC_CONNECTED:
1854 SPC_ASSERT(sc->sc_nexus != NULL);
1855 acb = sc->sc_nexus;
1856
1857 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1858 if (sc->sc_prevphase == PH_MSGOUT) {
1859 /*
1860 * If the target went to BUS FREE phase during
1861 * or immediately after sending a SDTR or WDTR
1862 * message, disable negotiation.
1863 */
1864 sc_link = acb->xs->sc_link;
1865 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1866 switch (sc->sc_lastmsg) {
1867 #if SPC_USE_SYNCHRONOUS
1868 case SEND_SDTR:
1869 ti->flags &= ~DO_SYNC;
1870 ti->period = ti->offset = 0;
1871 break;
1872 #endif
1873 #if SPC_USE_WIDE
1874 case SEND_WDTR:
1875 ti->flags &= ~DO_WIDE;
1876 ti->width = 0;
1877 break;
1878 #endif
1879 }
1880 }
1881 #endif
1882
1883 if ((sc->sc_flags & SPC_ABORTING) == 0) {
1884 /*
1885 * Section 5.1.1 of the SCSI 2 spec suggests
1886 * issuing a REQUEST SENSE following an
1887 * unexpected disconnect. Some devices go into
1888 * a contingent allegiance condition when
1889 * disconnecting, and this is necessary to
1890 * clean up their state.
1891 */
1892 printf("%s: unexpected disconnect; sending REQUEST SENSE\n",
1893 sc->sc_dev.dv_xname);
1894 SPC_BREAK();
1895 spc_sense(sc, acb);
1896 goto out;
1897 }
1898
1899 acb->xs->error = XS_DRIVER_STUFFUP;
1900 goto finish;
1901
1902 case SPC_DISCONNECT:
1903 SPC_ASSERT(sc->sc_nexus != NULL);
1904 acb = sc->sc_nexus;
1905 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
1906 sc->sc_nexus = NULL;
1907 goto sched;
1908
1909 case SPC_CMDCOMPLETE:
1910 SPC_ASSERT(sc->sc_nexus != NULL);
1911 acb = sc->sc_nexus;
1912 goto finish;
1913 }
1914 }
1915 else if ((ints & INTS_CMD_DONE) != 0 &&
1916 sc->sc_prevphase == PH_MSGIN && sc->sc_state != SPC_CONNECTED)
1917 goto out;
1918
1919 dophase:
1920 #if 0
1921 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
1922 /* Wait for REQINIT. */
1923 goto out;
1924 }
1925 #else
1926 bus_space_write_1(iot, ioh, INTS, ints);
1927 ints = 0;
1928 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
1929 delay(1); /* need timeout XXX */
1930 #endif
1931
1932 /*
1933 * $B%U%'!<%:$K$h$C$F>uBVA+0\$9$k(B
1934 */
1935 sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK;
1936 /* bus_space_write_1(iot, ioh, PCTL, sc->sc_phase);*/
1937
1938 switch (sc->sc_phase) {
1939 case PH_MSGOUT:
1940 if (sc->sc_state != SPC_CONNECTED &&
1941 sc->sc_state != SPC_RESELECTED)
1942 break;
1943 spc_msgout(sc);
1944 sc->sc_prevphase = PH_MSGOUT;
1945 goto loop;
1946
1947 case PH_MSGIN:
1948 if (sc->sc_state != SPC_CONNECTED &&
1949 sc->sc_state != SPC_RESELECTED)
1950 break;
1951 spc_msgin(sc);
1952 sc->sc_prevphase = PH_MSGIN;
1953 goto loop;
1954
1955 case PH_CMD:
1956 if (sc->sc_state != SPC_CONNECTED)
1957 break;
1958 #if SPC_DEBUG
1959 if ((spc_debug & SPC_SHOWMISC) != 0) {
1960 SPC_ASSERT(sc->sc_nexus != NULL);
1961 acb = sc->sc_nexus;
1962 printf("cmd=0x%02x+%d ",
1963 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length-1);
1964 }
1965 #endif
1966 n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
1967 sc->sc_cp += n;
1968 sc->sc_cleft -= n;
1969 sc->sc_prevphase = PH_CMD;
1970 goto loop;
1971
1972 case PH_DATAOUT:
1973 if (sc->sc_state != SPC_CONNECTED)
1974 break;
1975 SPC_MISC(("dataout dleft=%d ", sc->sc_dleft));
1976 n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
1977 sc->sc_dp += n;
1978 sc->sc_dleft -= n;
1979 sc->sc_prevphase = PH_DATAOUT;
1980 goto loop;
1981
1982 case PH_DATAIN:
1983 if (sc->sc_state != SPC_CONNECTED)
1984 break;
1985 SPC_MISC(("datain "));
1986 n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
1987 sc->sc_dp += n;
1988 sc->sc_dleft -= n;
1989 sc->sc_prevphase = PH_DATAIN;
1990 goto loop;
1991
1992 case PH_STAT:
1993 if (sc->sc_state != SPC_CONNECTED)
1994 break;
1995 SPC_ASSERT(sc->sc_nexus != NULL);
1996 acb = sc->sc_nexus;
1997 /*acb->target_stat = bus_space_read_1(iot, ioh, DREG);*/
1998 spc_datain_pio(sc, &acb->target_stat, 1);
1999 SPC_MISC(("target_stat=0x%02x ", acb->target_stat));
2000 sc->sc_prevphase = PH_STAT;
2001 goto loop;
2002 }
2003
2004 printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname);
2005 SPC_BREAK();
2006 reset:
2007 spc_init(sc);
2008 return 1;
2009
2010 finish:
2011 untimeout(spc_timeout, acb);
2012 bus_space_write_1(iot, ioh, INTS, ints);
2013 ints = 0;
2014 spc_done(sc, acb);
2015 goto out;
2016
2017 sched:
2018 sc->sc_state = SPC_IDLE;
2019 spc_sched(sc);
2020 goto out;
2021
2022 out:
2023 if (ints)
2024 bus_space_write_1(iot, ioh, INTS, ints);
2025 bus_space_write_1(iot, ioh, SCTL,
2026 bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB);
2027 return 1;
2028 }
2029
2030 void
2031 spc_abort(sc, acb)
2032 struct spc_softc *sc;
2033 struct spc_acb *acb;
2034 {
2035
2036 /* 2 secs for the abort */
2037 acb->timeout = SPC_ABORT_TIMEOUT;
2038 acb->flags |= ACB_ABORT;
2039
2040 if (acb == sc->sc_nexus) {
2041 /*
2042 * If we're still selecting, the message will be scheduled
2043 * after selection is complete.
2044 */
2045 if (sc->sc_state == SPC_CONNECTED)
2046 spc_sched_msgout(sc, SEND_ABORT);
2047 } else {
2048 spc_dequeue(sc, acb);
2049 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
2050 if (sc->sc_state == SPC_IDLE)
2051 spc_sched(sc);
2052 }
2053 }
2054
2055 void
2056 spc_timeout(arg)
2057 void *arg;
2058 {
2059 struct spc_acb *acb = arg;
2060 struct scsipi_xfer *xs = acb->xs;
2061 struct scsipi_link *sc_link = xs->sc_link;
2062 struct spc_softc *sc = sc_link->adapter_softc;
2063 int s;
2064
2065 scsi_print_addr(sc_link);
2066 printf("timed out");
2067
2068 s = splbio();
2069
2070 if (acb->flags & ACB_ABORT) {
2071 /* abort timed out */
2072 printf(" AGAIN\n");
2073 /* XXX Must reset! */
2074 } else {
2075 /* abort the operation that has timed out */
2076 printf("\n");
2077 acb->xs->error = XS_TIMEOUT;
2078 spc_abort(sc, acb);
2079 }
2080
2081 splx(s);
2082 }
2083
2084 #if SPC_DEBUG
2086 /*
2087 * The following functions are mostly used for debugging purposes, either
2088 * directly called from the driver or from the kernel debugger.
2089 */
2090
2091 void
2092 spc_show_scsi_cmd(acb)
2093 struct spc_acb *acb;
2094 {
2095 u_char *b = (u_char *)&acb->scsipi_cmd;
2096 struct scsipi_link *sc_link = acb->xs->sc_link;
2097 int i;
2098
2099 scsi_print_addr(sc_link);
2100 if ((acb->xs->flags & SCSI_RESET) == 0) {
2101 for (i = 0; i < acb->scsipi_cmd_length; i++) {
2102 if (i)
2103 printf(",");
2104 printf("%x", b[i]);
2105 }
2106 printf("\n");
2107 } else
2108 printf("RESET\n");
2109 }
2110
2111 void
2112 spc_print_acb(acb)
2113 struct spc_acb *acb;
2114 {
2115
2116 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
2117 printf(" dp=%p dleft=%d target_stat=%x\n",
2118 acb->data_addr, acb->data_length, acb->target_stat);
2119 spc_show_scsi_cmd(acb);
2120 }
2121
2122 void
2123 spc_print_active_acb()
2124 {
2125 struct spc_acb *acb;
2126 struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */
2127
2128 printf("ready list:\n");
2129 for (acb = sc->ready_list.tqh_first; acb != NULL;
2130 acb = acb->chain.tqe_next)
2131 spc_print_acb(acb);
2132 printf("nexus:\n");
2133 if (sc->sc_nexus != NULL)
2134 spc_print_acb(sc->sc_nexus);
2135 printf("nexus list:\n");
2136 for (acb = sc->nexus_list.tqh_first; acb != NULL;
2137 acb = acb->chain.tqe_next)
2138 spc_print_acb(acb);
2139 }
2140
2141 void
2142 spc_dump89352(sc)
2143 struct spc_softc *sc;
2144 {
2145 bus_space_tag_t iot = sc->sc_iot;
2146 bus_space_handle_t ioh = sc->sc_ioh;
2147
2148 printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n",
2149 bus_space_read_1(iot, ioh, BDID),
2150 bus_space_read_1(iot, ioh, SCTL),
2151 bus_space_read_1(iot, ioh, SCMD),
2152 bus_space_read_1(iot, ioh, TMOD));
2153 printf(" INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n",
2154 bus_space_read_1(iot, ioh, INTS),
2155 bus_space_read_1(iot, ioh, PSNS),
2156 bus_space_read_1(iot, ioh, SSTS),
2157 bus_space_read_1(iot, ioh, SERR),
2158 bus_space_read_1(iot, ioh, PCTL));
2159 printf(" MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n",
2160 bus_space_read_1(iot, ioh, MBC),
2161 bus_space_read_1(iot, ioh, DREG),
2162 bus_space_read_1(iot, ioh, TEMP),
2163 bus_space_read_1(iot, ioh, TCH),
2164 bus_space_read_1(iot, ioh, TCM));
2165 printf(" TCL=%x EXBF=%x\n",
2166 bus_space_read_1(iot, ioh, TCL),
2167 bus_space_read_1(iot, ioh, EXBF));
2168 }
2169
2170 void
2171 spc_dump_driver(sc)
2172 struct spc_softc *sc;
2173 {
2174 struct spc_tinfo *ti;
2175 int i;
2176
2177 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
2178 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x currmsg=%x\n",
2179 sc->sc_state, sc->sc_imess[0],
2180 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
2181 for (i = 0; i < 7; i++) {
2182 ti = &sc->sc_tinfo[i];
2183 printf("tinfo%d: %d cmds %d disconnects %d timeouts",
2184 i, ti->cmds, ti->dconns, ti->touts);
2185 printf(" %d senses flags=%x\n", ti->senses, ti->flags);
2186 }
2187 }
2188 #endif
2189