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mb89352.c revision 1.12
      1 /*	$NetBSD: mb89352.c,v 1.12 2002/04/05 18:27:52 bouyer Exp $	*/
      2 /*	NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp	*/
      3 
      4 /*-
      5  * Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc.
      6  * All rights reserved.
      7  *
      8  * This code is derived from software contributed to The NetBSD Foundation
      9  * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by Charles M. Hannum.
     22  * 4. The name of the author may not be used to endorse or promote products
     23  *    derived from this software without specific prior written permission.
     24  *
     25  * Copyright (c) 1994 Jarle Greipsland
     26  * All rights reserved.
     27  *
     28  * Redistribution and use in source and binary forms, with or without
     29  * modification, are permitted provided that the following conditions
     30  * are met:
     31  * 1. Redistributions of source code must retain the above copyright
     32  *    notice, this list of conditions and the following disclaimer.
     33  * 2. Redistributions in binary form must reproduce the above copyright
     34  *    notice, this list of conditions and the following disclaimer in the
     35  *    documentation and/or other materials provided with the distribution.
     36  * 3. The name of the author may not be used to endorse or promote products
     37  *    derived from this software without specific prior written permission.
     38  *
     39  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     40  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     41  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     42  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
     43  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     44  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     45  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     46  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     47  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
     48  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     49  * POSSIBILITY OF SUCH DAMAGE.
     50  */
     51 /*
     52  * [NetBSD for NEC PC-98 series]
     53  *  Copyright (c) 1996, 1997, 1998
     54  *	NetBSD/pc98 porting staff. All rights reserved.
     55  *  Copyright (c) 1996, 1997, 1998
     56  *	Kouichi Matsuda. All rights reserved.
     57  */
     58 
     59 /*
     60  * Acknowledgements: Many of the algorithms used in this driver are
     61  * inspired by the work of Julian Elischer (julian (at) tfs.com) and
     62  * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu).  Thanks a million!
     63  */
     64 
     65 /* TODO list:
     66  * 1) Get the DMA stuff working.
     67  * 2) Get the iov/uio stuff working. Is this a good thing ???
     68  * 3) Get the synch stuff working.
     69  * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
     70  */
     71 
     72 #include <sys/cdefs.h>
     73 __KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.12 2002/04/05 18:27:52 bouyer Exp $");
     74 
     75 #ifdef DDB
     76 #define	integrate
     77 #else
     78 #define	integrate	__inline static
     79 #endif
     80 
     81 /*
     82  * A few customizable items:
     83  */
     84 
     85 /* Use doubleword transfers to/from SCSI chip.  Note: This requires
     86  * motherboard support.  Basicly, some motherboard chipsets are able to
     87  * split a 32 bit I/O operation into two 16 bit I/O operations,
     88  * transparently to the processor.  This speeds up some things, notably long
     89  * data transfers.
     90  */
     91 #define SPC_USE_DWORDS		0
     92 
     93 /* Synchronous data transfers? */
     94 #define SPC_USE_SYNCHRONOUS	0
     95 #define SPC_SYNC_REQ_ACK_OFS 	8
     96 
     97 /* Wide data transfers? */
     98 #define	SPC_USE_WIDE		0
     99 #define	SPC_MAX_WIDTH		0
    100 
    101 /* Max attempts made to transmit a message */
    102 #define SPC_MSG_MAX_ATTEMPT	3 /* Not used now XXX */
    103 
    104 /*
    105  * Some spin loop parameters (essentially how long to wait some places)
    106  * The problem(?) is that sometimes we expect either to be able to transmit a
    107  * byte or to get a new one from the SCSI bus pretty soon.  In order to avoid
    108  * returning from the interrupt just to get yanked back for the next byte we
    109  * may spin in the interrupt routine waiting for this byte to come.  How long?
    110  * This is really (SCSI) device and processor dependent.  Tuneable, I guess.
    111  */
    112 #define SPC_MSGIN_SPIN	1 	/* Will spinwait upto ?ms for a new msg byte */
    113 #define SPC_MSGOUT_SPIN	1
    114 
    115 /* Include debug functions?  At the end of this file there are a bunch of
    116  * functions that will print out various information regarding queued SCSI
    117  * commands, driver state and chip contents.  You can call them from the
    118  * kernel debugger.  If you set SPC_DEBUG to 0 they are not included (the
    119  * kernel uses less memory) but you lose the debugging facilities.
    120  */
    121 #define SPC_DEBUG		1
    122 
    123 #define	SPC_ABORT_TIMEOUT	2000	/* time to wait for abort */
    124 
    125 /* End of customizable parameters */
    126 
    127 /*
    128  * MB89352 SCSI Protocol Controller (SPC) routines.
    129  */
    130 
    131 #include "opt_ddb.h"
    132 
    133 #include <sys/param.h>
    134 #include <sys/systm.h>
    135 #include <sys/kernel.h>
    136 #include <sys/errno.h>
    137 #include <sys/ioctl.h>
    138 #include <sys/device.h>
    139 #include <sys/buf.h>
    140 #include <sys/proc.h>
    141 #include <sys/user.h>
    142 #include <sys/queue.h>
    143 
    144 #include <machine/intr.h>
    145 #include <machine/bus.h>
    146 
    147 #include <dev/scsipi/scsi_all.h>
    148 #include <dev/scsipi/scsipi_all.h>
    149 #include <dev/scsipi/scsi_message.h>
    150 #include <dev/scsipi/scsiconf.h>
    151 
    152 #include <dev/ic/mb89352reg.h>
    153 #include <dev/ic/mb89352var.h>
    154 
    155 #ifndef DDB
    157 #define	Debugger() panic("should call debugger here (mb89352.c)")
    158 #endif /* ! DDB */
    159 
    160 #if SPC_DEBUG
    161 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */
    162 #endif
    163 
    164 void	spc_minphys	__P((struct buf *));
    165 void	spc_done	__P((struct spc_softc *, struct spc_acb *));
    166 void	spc_dequeue	__P((struct spc_softc *, struct spc_acb *));
    167 void	spc_scsipi_request __P((struct scsipi_channel *,
    168 				scsipi_adapter_req_t, void *));
    169 int	spc_poll	__P((struct spc_softc *, struct scsipi_xfer *, int));
    170 integrate void	spc_sched_msgout __P((struct spc_softc *, u_char));
    171 integrate void	spc_setsync	__P((struct spc_softc *, struct spc_tinfo *));
    172 void	spc_select	__P((struct spc_softc *, struct spc_acb *));
    173 void	spc_timeout	__P((void *));
    174 void	spc_scsi_reset	__P((struct spc_softc *));
    175 void	spc_reset	__P((struct spc_softc *));
    176 void	spc_free_acb	__P((struct spc_softc *, struct spc_acb *, int));
    177 struct spc_acb* spc_get_acb __P((struct spc_softc *));
    178 int	spc_reselect	__P((struct spc_softc *, int));
    179 void	spc_msgin	__P((struct spc_softc *));
    180 void	spc_abort	__P((struct spc_softc *, struct spc_acb *));
    181 void	spc_msgout	__P((struct spc_softc *));
    182 int	spc_dataout_pio	__P((struct spc_softc *, u_char *, int));
    183 int	spc_datain_pio	__P((struct spc_softc *, u_char *, int));
    184 #if SPC_DEBUG
    185 void	spc_print_acb	__P((struct spc_acb *));
    186 void	spc_dump_driver __P((struct spc_softc *));
    187 void	spc_dump89352	__P((struct spc_softc *));
    188 void	spc_show_scsi_cmd __P((struct spc_acb *));
    189 void	spc_print_active_acb __P((void));
    190 #endif
    191 
    192 extern struct cfdriver spc_cd;
    193 
    194 
    195 /*
    197  * INITIALIZATION ROUTINES (probe, attach ++)
    198  */
    199 
    200 /*
    201  * Do the real search-for-device.
    202  * Prerequisite: sc->sc_iobase should be set to the proper value
    203  */
    204 int
    205 spc_find(iot, ioh, bdid)
    206 	bus_space_tag_t iot;
    207 	bus_space_handle_t ioh;
    208 	int bdid;
    209 {
    210 	long timeout = SPC_ABORT_TIMEOUT;
    211 
    212 	SPC_TRACE(("spc: probing for spc-chip\n"));
    213 	/*
    214 	 * Disable interrupts then reset the FUJITSU chip.
    215 	 */
    216 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
    217 	bus_space_write_1(iot, ioh, SCMD, 0);
    218 	bus_space_write_1(iot, ioh, PCTL, 0);
    219 	bus_space_write_1(iot, ioh, TEMP, 0);
    220 	bus_space_write_1(iot, ioh, TCH, 0);
    221 	bus_space_write_1(iot, ioh, TCM, 0);
    222 	bus_space_write_1(iot, ioh, TCL, 0);
    223 	bus_space_write_1(iot, ioh, INTS, 0);
    224 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
    225 	bus_space_write_1(iot, ioh, BDID, bdid);
    226 	delay(400);
    227 	bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
    228 
    229 	/* The following detection is derived from spc.c
    230 	 * (by Takahide Matsutsuka) in FreeBSD/pccard-test.
    231 	 */
    232 	while (bus_space_read_1(iot, ioh, PSNS) && timeout)
    233 		timeout--;
    234 	if (!timeout) {
    235 		printf("spc: find failed\n");
    236 		return 0;
    237 	}
    238 
    239 	SPC_START(("SPC found"));
    240 	return 1;
    241 }
    242 
    243 void
    244 spcattach(sc)
    245 	struct spc_softc *sc;
    246 {
    247 
    248 	SPC_TRACE(("spcattach  "));
    249 	sc->sc_state = SPC_INIT;
    250 
    251 	sc->sc_freq = 20;	/* XXXX Assume 20 MHz. */
    252 
    253 #if SPC_USE_SYNCHRONOUS
    254 	/*
    255 	 * These are the bounds of the sync period, based on the frequency of
    256 	 * the chip's clock input and the size and offset of the sync period
    257 	 * register.
    258 	 *
    259 	 * For a 20Mhz clock, this gives us 25, or 100nS, or 10MB/s, as a
    260 	 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
    261 	 * minimum transfer rate.
    262 	 */
    263 	sc->sc_minsync = (2 * 250) / sc->sc_freq;
    264 	sc->sc_maxsync = (9 * 250) / sc->sc_freq;
    265 #endif
    266 
    267 	spc_init(sc);	/* Init chip and driver */
    268 
    269 	/*
    270 	 * Fill in the adapter.
    271 	 */
    272 	sc->sc_adapter.adapt_dev = &sc->sc_dev;
    273 	sc->sc_adapter.adapt_nchannels = 1;
    274 	sc->sc_adapter.adapt_openings = 7;
    275 	sc->sc_adapter.adapt_max_periph = 1;
    276 	sc->sc_adapter.adapt_minphys = spc_minphys;
    277 	sc->sc_adapter.adapt_request = spc_scsipi_request;
    278 
    279 	sc->sc_channel.chan_adapter = &sc->sc_adapter;
    280 	sc->sc_channel.chan_bustype = &scsi_bustype;
    281 	sc->sc_channel.chan_channel = 0;
    282 	sc->sc_channel.chan_ntargets = 8;
    283 	sc->sc_channel.chan_nluns = 8;
    284 	sc->sc_channel.chan_id = sc->sc_initiator;
    285 
    286 	/*
    287 	 * ask the adapter what subunits are present
    288 	 */
    289 	config_found((struct device*)sc, &sc->sc_channel, scsiprint);
    290 }
    291 
    292 /*
    293  * Initialize MB89352 chip itself
    294  * The following conditions should hold:
    295  * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc
    296  * must be valid.
    297  */
    298 void
    299 spc_reset(sc)
    300 	struct spc_softc *sc;
    301 {
    302 	bus_space_tag_t iot = sc->sc_iot;
    303 	bus_space_handle_t ioh = sc->sc_ioh;
    304 
    305 	SPC_TRACE(("spc_reset  "));
    306 	/*
    307 	 * Disable interrupts then reset the FUJITSU chip.
    308 	 */
    309 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
    310 	bus_space_write_1(iot, ioh, SCMD, 0);
    311 	bus_space_write_1(iot, ioh, PCTL, 0);
    312 	bus_space_write_1(iot, ioh, TEMP, 0);
    313 	bus_space_write_1(iot, ioh, TCH, 0);
    314 	bus_space_write_1(iot, ioh, TCM, 0);
    315 	bus_space_write_1(iot, ioh, TCL, 0);
    316 	bus_space_write_1(iot, ioh, INTS, 0);
    317 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
    318 	bus_space_write_1(iot, ioh, BDID, sc->sc_initiator);
    319 	delay(400);
    320 	bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
    321 }
    322 
    323 
    324 /*
    325  * Pull the SCSI RST line for 500us.
    326  */
    327 void
    328 spc_scsi_reset(sc)
    329 	struct spc_softc *sc;
    330 {
    331 	bus_space_tag_t iot = sc->sc_iot;
    332 	bus_space_handle_t ioh = sc->sc_ioh;
    333 
    334 	SPC_TRACE(("spc_scsi_reset  "));
    335 	bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) | SCMD_RST);
    336 	delay(500);
    337 	bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST);
    338 	delay(50);
    339 }
    340 
    341 /*
    342  * Initialize spc SCSI driver.
    343  */
    344 void
    345 spc_init(sc)
    346 	struct spc_softc *sc;
    347 {
    348 	struct spc_acb *acb;
    349 	int r;
    350 
    351 	SPC_TRACE(("spc_init  "));
    352 	spc_reset(sc);
    353 	spc_scsi_reset(sc);
    354 	spc_reset(sc);
    355 
    356 	if (sc->sc_state == SPC_INIT) {
    357 		/* First time through; initialize. */
    358 		TAILQ_INIT(&sc->ready_list);
    359 		TAILQ_INIT(&sc->nexus_list);
    360 		TAILQ_INIT(&sc->free_list);
    361 		sc->sc_nexus = NULL;
    362 		acb = sc->sc_acb;
    363 		memset(acb, 0, sizeof(sc->sc_acb));
    364 		for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
    365 			TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
    366 			acb++;
    367 		}
    368 		memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
    369 	} else {
    370 		/* Cancel any active commands. */
    371 		sc->sc_state = SPC_CLEANING;
    372 		if ((acb = sc->sc_nexus) != NULL) {
    373 			acb->xs->error = XS_DRIVER_STUFFUP;
    374 			callout_stop(&acb->xs->xs_callout);
    375 			spc_done(sc, acb);
    376 		}
    377 		while ((acb = sc->nexus_list.tqh_first) != NULL) {
    378 			acb->xs->error = XS_DRIVER_STUFFUP;
    379 			callout_stop(&acb->xs->xs_callout);
    380 			spc_done(sc, acb);
    381 		}
    382 	}
    383 
    384 	sc->sc_prevphase = PH_INVALID;
    385 	for (r = 0; r < 8; r++) {
    386 		struct spc_tinfo *ti = &sc->sc_tinfo[r];
    387 
    388 		ti->flags = 0;
    389 #if SPC_USE_SYNCHRONOUS
    390 		ti->flags |= DO_SYNC;
    391 		ti->period = sc->sc_minsync;
    392 		ti->offset = SPC_SYNC_REQ_ACK_OFS;
    393 #else
    394 		ti->period = ti->offset = 0;
    395 #endif
    396 #if SPC_USE_WIDE
    397 		ti->flags |= DO_WIDE;
    398 		ti->width = SPC_MAX_WIDTH;
    399 #else
    400 		ti->width = 0;
    401 #endif
    402 	}
    403 
    404 	sc->sc_state = SPC_IDLE;
    405 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL,
    406 	    bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB);
    407 }
    408 
    409 void
    410 spc_free_acb(sc, acb, flags)
    411 	struct spc_softc *sc;
    412 	struct spc_acb *acb;
    413 	int flags;
    414 {
    415 	int s;
    416 
    417 	SPC_TRACE(("spc_free_acb  "));
    418 	s = splbio();
    419 
    420 	acb->flags = 0;
    421 	TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
    422 	splx(s);
    423 }
    424 
    425 struct spc_acb *
    426 spc_get_acb(sc)
    427 	struct spc_softc *sc;
    428 {
    429 	struct spc_acb *acb;
    430 	int s;
    431 
    432 	SPC_TRACE(("spc_get_acb  "));
    433 	s = splbio();
    434 	acb = TAILQ_FIRST(&sc->free_list);
    435 	if (acb != NULL) {
    436 		TAILQ_REMOVE(&sc->free_list, acb, chain);
    437 		acb->flags |= ACB_ALLOC;
    438 	}
    439 	splx(s);
    440 	return acb;
    441 }
    442 
    443 /*
    445  * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
    446  */
    447 
    448 /*
    449  * Expected sequence:
    450  * 1) Command inserted into ready list
    451  * 2) Command selected for execution
    452  * 3) Command won arbitration and has selected target device
    453  * 4) Send message out (identify message, eventually also sync.negotiations)
    454  * 5) Send command
    455  * 5a) Receive disconnect message, disconnect.
    456  * 5b) Reselected by target
    457  * 5c) Receive identify message from target.
    458  * 6) Send or receive data
    459  * 7) Receive status
    460  * 8) Receive message (command complete etc.)
    461  */
    462 
    463 /*
    464  * Start a SCSI-command
    465  * This function is called by the higher level SCSI-driver to queue/run
    466  * SCSI-commands.
    467  */
    468 void
    469 spc_scsipi_request(chan, req, arg)
    470 	struct scsipi_channel *chan;
    471 	scsipi_adapter_req_t req;
    472 	void *arg;
    473 {
    474 	struct scsipi_xfer *xs;
    475 	struct scsipi_periph *periph;
    476 	struct spc_softc *sc = (void *)chan->chan_adapter->adapt_dev;
    477 	struct spc_acb *acb;
    478 	int s, flags;
    479 
    480 	switch (req) {
    481 	case ADAPTER_REQ_RUN_XFER:
    482 		xs = arg;
    483 		periph = xs->xs_periph;
    484 		SPC_TRACE(("spc_scsipi_request  "));
    485 		SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
    486 		    periph->periph_target));
    487 
    488 		flags = xs->xs_control;
    489 		if ((acb = spc_get_acb(sc)) == NULL) {
    490 			xs->error = XS_DRIVER_STUFFUP;
    491 			scsipi_done(xs);
    492 			return;
    493 		}
    494 
    495 		/* Initialize acb */
    496 		acb->xs = xs;
    497 		acb->timeout = xs->timeout;
    498 
    499 		if (xs->xs_control & XS_CTL_RESET) {
    500 			acb->flags |= ACB_RESET;
    501 			acb->scsipi_cmd_length = 0;
    502 			acb->data_length = 0;
    503 		} else {
    504 			memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen);
    505 #if 1
    506 			acb->scsipi_cmd.bytes[0] |= periph->periph_lun << 5; /* XXX? */
    507 #endif
    508 			acb->scsipi_cmd_length = xs->cmdlen;
    509 			acb->data_addr = xs->data;
    510 			acb->data_length = xs->datalen;
    511 		}
    512 		acb->target_stat = 0;
    513 
    514 		s = splbio();
    515 
    516 		TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
    517 		/*
    518 		 * Start scheduling unless a queue process is in progress.
    519 		 */
    520 		if (sc->sc_state == SPC_IDLE)
    521 			spc_sched(sc);
    522 		/*
    523 		 * After successful sending, check if we should return just now.
    524 		 * If so, return SUCCESSFULLY_QUEUED.
    525 		 */
    526 
    527 		splx(s);
    528 
    529 		if ((flags & XS_CTL_POLL) == 0)
    530 			return;
    531 
    532 		/* Not allowed to use interrupts, use polling instead */
    533 		s = splbio();
    534 		if (spc_poll(sc, xs, acb->timeout)) {
    535 			spc_timeout(acb);
    536 			if (spc_poll(sc, xs, acb->timeout))
    537 				spc_timeout(acb);
    538 		}
    539 		splx(s);
    540 		return;
    541 	case ADAPTER_REQ_GROW_RESOURCES:
    542 		/* XXX Not supported. */
    543 		return;
    544 	case ADAPTER_REQ_SET_XFER_MODE:
    545 		/* XXX Not supported. */
    546 		return;
    547 	}
    548 }
    549 
    550 /*
    551  * Adjust transfer size in buffer structure
    552  */
    553 void
    554 spc_minphys(bp)
    555 	struct buf *bp;
    556 {
    557 
    558 	SPC_TRACE(("spc_minphys  "));
    559 	minphys(bp);
    560 }
    561 
    562 /*
    563  * Used when interrupt driven I/O isn't allowed, e.g. during boot.
    564  */
    565 int
    566 spc_poll(sc, xs, count)
    567 	struct spc_softc *sc;
    568 	struct scsipi_xfer *xs;
    569 	int count;
    570 {
    571 	bus_space_tag_t iot = sc->sc_iot;
    572 	bus_space_handle_t ioh = sc->sc_ioh;
    573 
    574 	SPC_TRACE(("spc_poll  "));
    575 	while (count) {
    576 		/*
    577 		 * If we had interrupts enabled, would we
    578 		 * have got an interrupt?
    579 		 */
    580 		if (bus_space_read_1(iot, ioh, INTS) != 0)
    581 			spcintr(sc);
    582 		if ((xs->xs_status & XS_STS_DONE) != 0)
    583 			return 0;
    584 		delay(1000);
    585 		count--;
    586 	}
    587 	return 1;
    588 }
    589 
    590 /*
    592  * LOW LEVEL SCSI UTILITIES
    593  */
    594 
    595 integrate void
    596 spc_sched_msgout(sc, m)
    597 	struct spc_softc *sc;
    598 	u_char m;
    599 {
    600 	bus_space_tag_t iot = sc->sc_iot;
    601 	bus_space_handle_t ioh = sc->sc_ioh;
    602 
    603 	SPC_TRACE(("spc_sched_msgout  "));
    604 	if (sc->sc_msgpriq == 0)
    605 		bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
    606 	sc->sc_msgpriq |= m;
    607 }
    608 
    609 /*
    610  * Set synchronous transfer offset and period.
    611  */
    612 integrate void
    613 spc_setsync(sc, ti)
    614 	struct spc_softc *sc;
    615 	struct spc_tinfo *ti;
    616 {
    617 #if SPC_USE_SYNCHRONOUS
    618 	bus_space_tag_t iot = sc->sc_iot;
    619 	bus_space_handle_t ioh = sc->sc_ioh;
    620 
    621 	SPC_TRACE(("spc_setsync  "));
    622 	if (ti->offset != 0)
    623 		bus_space_write_1(iot, ioh, TMOD,
    624 		    ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
    625 	else
    626 		bus_space_write_1(iot, ioh, TMOD, 0);
    627 #endif
    628 }
    629 
    630 /*
    631  * Start a selection.  This is used by spc_sched() to select an idle target.
    632  */
    633 void
    634 spc_select(sc, acb)
    635 	struct spc_softc *sc;
    636 	struct spc_acb *acb;
    637 {
    638 	struct scsipi_periph *periph = acb->xs->xs_periph;
    639 	int target = periph->periph_target;
    640 	struct spc_tinfo *ti = &sc->sc_tinfo[target];
    641 	bus_space_tag_t iot = sc->sc_iot;
    642 	bus_space_handle_t ioh = sc->sc_ioh;
    643 
    644 	SPC_TRACE(("spc_select  "));
    645 	spc_setsync(sc, ti);
    646 
    647 #if 0
    648 	bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
    649 #endif
    650 #ifdef x68k			/* XXX? */
    651 	do {
    652 		asm ("nop");
    653 	} while (bus_space_read_1(iot, ioh, SSTS) &
    654 		 (SSTS_ACTIVE|SSTS_TARGET|SSTS_BUSY));
    655 #endif
    656 
    657 	bus_space_write_1(iot, ioh, PCTL, 0);
    658 	bus_space_write_1(iot, ioh, TEMP, (1 << sc->sc_initiator) | (1 << target));
    659 	/*
    660 	 * Setup BSY timeout (selection timeout).
    661 	 * 250ms according to the SCSI specification.
    662 	 * T = (X * 256 + 15) * Tclf * 2  (Tclf = 200ns on x68k)
    663 	 * To setup 256ms timeout,
    664 	 * 128000ns/200ns = X * 256 + 15
    665 	 * 640 - 15 = X * 256
    666 	 * X = 625 / 256
    667 	 * X = 2 + 113 / 256
    668 	 *  ==> tch = 2, tcm = 113 (correct?)
    669 	 */
    670 	bus_space_write_1(iot, ioh, TCH, 2);
    671 	bus_space_write_1(iot, ioh, TCM, 113);
    672 	/* Time to the information transfer phase start. */
    673 	bus_space_write_1(iot, ioh, TCL, 3);
    674 	bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT);
    675 
    676 	sc->sc_state = SPC_SELECTING;
    677 }
    678 
    679 int
    680 spc_reselect(sc, message)
    681 	struct spc_softc *sc;
    682 	int message;
    683 {
    684 	u_char selid, target, lun;
    685 	struct spc_acb *acb;
    686 	struct scsipi_periph *periph;
    687 	struct spc_tinfo *ti;
    688 
    689 	SPC_TRACE(("spc_reselect  "));
    690 	/*
    691 	 * The SCSI chip made a snapshot of the data bus while the reselection
    692 	 * was being negotiated.  This enables us to determine which target did
    693 	 * the reselect.
    694 	 */
    695 	selid = sc->sc_selid & ~(1 << sc->sc_initiator);
    696 	if (selid & (selid - 1)) {
    697 		printf("%s: reselect with invalid selid %02x; sending DEVICE RESET\n",
    698 		    sc->sc_dev.dv_xname, selid);
    699 		SPC_BREAK();
    700 		goto reset;
    701 	}
    702 
    703 	/*
    704 	 * Search wait queue for disconnected cmd
    705 	 * The list should be short, so I haven't bothered with
    706 	 * any more sophisticated structures than a simple
    707 	 * singly linked list.
    708 	 */
    709 	target = ffs(selid) - 1;
    710 	lun = message & 0x07;
    711 	for (acb = sc->nexus_list.tqh_first; acb != NULL;
    712 	     acb = acb->chain.tqe_next) {
    713 		periph = acb->xs->xs_periph;
    714 		if (periph->periph_target == target &&
    715 		    periph->periph_lun == lun)
    716 			break;
    717 	}
    718 	if (acb == NULL) {
    719 		printf("%s: reselect from target %d lun %d with no nexus; sending ABORT\n",
    720 		    sc->sc_dev.dv_xname, target, lun);
    721 		SPC_BREAK();
    722 		goto abort;
    723 	}
    724 
    725 	/* Make this nexus active again. */
    726 	TAILQ_REMOVE(&sc->nexus_list, acb, chain);
    727 	sc->sc_state = SPC_CONNECTED;
    728 	sc->sc_nexus = acb;
    729 	ti = &sc->sc_tinfo[target];
    730 	ti->lubusy |= (1 << lun);
    731 	spc_setsync(sc, ti);
    732 
    733 	if (acb->flags & ACB_RESET)
    734 		spc_sched_msgout(sc, SEND_DEV_RESET);
    735 	else if (acb->flags & ACB_ABORT)
    736 		spc_sched_msgout(sc, SEND_ABORT);
    737 
    738 	/* Do an implicit RESTORE POINTERS. */
    739 	sc->sc_dp = acb->data_addr;
    740 	sc->sc_dleft = acb->data_length;
    741 	sc->sc_cp = (u_char *)&acb->scsipi_cmd;
    742 	sc->sc_cleft = acb->scsipi_cmd_length;
    743 
    744 	return (0);
    745 
    746 reset:
    747 	spc_sched_msgout(sc, SEND_DEV_RESET);
    748 	return (1);
    749 
    750 abort:
    751 	spc_sched_msgout(sc, SEND_ABORT);
    752 	return (1);
    753 }
    754 
    755 /*
    757  * Schedule a SCSI operation.  This has now been pulled out of the interrupt
    758  * handler so that we may call it from spc_scsi_cmd and spc_done.  This may
    759  * save us an unecessary interrupt just to get things going.  Should only be
    760  * called when state == SPC_IDLE and at bio pl.
    761  */
    762 void
    763 spc_sched(sc)
    764 	struct spc_softc *sc;
    765 {
    766 	struct spc_acb *acb;
    767 	struct scsipi_periph *periph;
    768 	struct spc_tinfo *ti;
    769 
    770 	/* missing the hw, just return and wait for our hw */
    771 	if (sc->sc_flags & SPC_INACTIVE)
    772 		return;
    773 	SPC_TRACE(("spc_sched  "));
    774 	/*
    775 	 * Find first acb in ready queue that is for a target/lunit pair that
    776 	 * is not busy.
    777 	 */
    778 	for (acb = sc->ready_list.tqh_first; acb != NULL;
    779 	    acb = acb->chain.tqe_next) {
    780 		periph = acb->xs->xs_periph;
    781 		ti = &sc->sc_tinfo[periph->periph_target];
    782 		if ((ti->lubusy & (1 << periph->periph_lun)) == 0) {
    783 			SPC_MISC(("selecting %d:%d  ",
    784 			    periph->periph_target, periph->periph_lun));
    785 			TAILQ_REMOVE(&sc->ready_list, acb, chain);
    786 			sc->sc_nexus = acb;
    787 			spc_select(sc, acb);
    788 			return;
    789 		} else
    790 			SPC_MISC(("%d:%d busy\n",
    791 			    periph->periph_target, periph->periph_lun));
    792 	}
    793 	SPC_MISC(("idle  "));
    794 	/* Nothing to start; just enable reselections and wait. */
    795 }
    796 
    797 /*
    799  * POST PROCESSING OF SCSI_CMD (usually current)
    800  */
    801 void
    802 spc_done(sc, acb)
    803 	struct spc_softc *sc;
    804 	struct spc_acb *acb;
    805 {
    806 	struct scsipi_xfer *xs = acb->xs;
    807 	struct scsipi_periph *periph = xs->xs_periph;
    808 	struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
    809 
    810 	SPC_TRACE(("spc_done  "));
    811 
    812 	if (xs->error == XS_NOERROR) {
    813 		if (acb->flags & ACB_ABORT) {
    814 			xs->error = XS_DRIVER_STUFFUP;
    815 		} else {
    816 			switch (acb->target_stat) {
    817 			case SCSI_CHECK:
    818 				/* First, save the return values */
    819 				xs->resid = acb->data_length;
    820 				/* FALLBACK */
    821 			case SCSI_BUSY:
    822 				xs->status = acb->target_stat;
    823 				xs->error = XS_BUSY;
    824 				break;
    825 			case SCSI_OK:
    826 				xs->resid = acb->data_length;
    827 				break;
    828 			default:
    829 				xs->error = XS_DRIVER_STUFFUP;
    830 #if SPC_DEBUG
    831 				printf("%s: spc_done: bad stat 0x%x\n",
    832 					sc->sc_dev.dv_xname, acb->target_stat);
    833 #endif
    834 				break;
    835 			}
    836 		}
    837 	}
    838 
    839 #if SPC_DEBUG
    840 	if ((spc_debug & SPC_SHOWMISC) != 0) {
    841 		if (xs->resid != 0)
    842 			printf("resid=%d ", xs->resid);
    843 		else
    844 			printf("error=%d\n", xs->error);
    845 	}
    846 #endif
    847 
    848 	/*
    849 	 * Remove the ACB from whatever queue it happens to be on.
    850 	 */
    851 	if (acb->flags & ACB_NEXUS)
    852 		ti->lubusy &= ~(1 << periph->periph_lun);
    853 	if (acb == sc->sc_nexus) {
    854 		sc->sc_nexus = NULL;
    855 		sc->sc_state = SPC_IDLE;
    856 		spc_sched(sc);
    857 	} else
    858 		spc_dequeue(sc, acb);
    859 
    860 	spc_free_acb(sc, acb, xs->xs_control);
    861 	ti->cmds++;
    862 	scsipi_done(xs);
    863 }
    864 
    865 void
    866 spc_dequeue(sc, acb)
    867 	struct spc_softc *sc;
    868 	struct spc_acb *acb;
    869 {
    870 
    871 	SPC_TRACE(("spc_dequeue  "));
    872 	if (acb->flags & ACB_NEXUS) {
    873 		TAILQ_REMOVE(&sc->nexus_list, acb, chain);
    874 	} else {
    875 		TAILQ_REMOVE(&sc->ready_list, acb, chain);
    876 	}
    877 }
    878 
    879 /*
    881  * INTERRUPT/PROTOCOL ENGINE
    882  */
    883 
    884 /*
    885  * Precondition:
    886  * The SCSI bus is already in the MSGI phase and there is a message byte
    887  * on the bus, along with an asserted REQ signal.
    888  */
    889 void
    890 spc_msgin(sc)
    891 	struct spc_softc *sc;
    892 {
    893 	bus_space_tag_t iot = sc->sc_iot;
    894 	bus_space_handle_t ioh = sc->sc_ioh;
    895 	int n;
    896 
    897 	SPC_TRACE(("spc_msgin  "));
    898 
    899 	if (sc->sc_prevphase == PH_MSGIN) {
    900 		/* This is a continuation of the previous message. */
    901 		n = sc->sc_imp - sc->sc_imess;
    902 		goto nextbyte;
    903 	}
    904 
    905 	/* This is a new MESSAGE IN phase.  Clean up our state. */
    906 	sc->sc_flags &= ~SPC_DROP_MSGIN;
    907 
    908 nextmsg:
    909 	n = 0;
    910 	sc->sc_imp = &sc->sc_imess[n];
    911 
    912 nextbyte:
    913 	/*
    914 	 * Read a whole message, but don't ack the last byte.  If we reject the
    915 	 * message, we have to assert ATN during the message transfer phase
    916 	 * itself.
    917 	 */
    918 	for (;;) {
    919 #if 0
    920 		for (;;) {
    921 			if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
    922 				break;
    923 			/* Wait for REQINIT.  XXX Need timeout. */
    924 		}
    925 #endif
    926 		if (bus_space_read_1(iot, ioh, INTS) != 0) {
    927 			/*
    928 			 * Target left MESSAGE IN, probably because it
    929 			 * a) noticed our ATN signal, or
    930 			 * b) ran out of messages.
    931 			 */
    932 			goto out;
    933 		}
    934 
    935 		/* If parity error, just dump everything on the floor. */
    936 		if ((bus_space_read_1(iot, ioh, SERR) &
    937 		     (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
    938 			sc->sc_flags |= SPC_DROP_MSGIN;
    939 			spc_sched_msgout(sc, SEND_PARITY_ERROR);
    940 		}
    941 
    942 		/* send TRANSFER command. */
    943 		bus_space_write_1(iot, ioh, TCH, 0);
    944 		bus_space_write_1(iot, ioh, TCM, 0);
    945 		bus_space_write_1(iot, ioh, TCL, 1);
    946 		bus_space_write_1(iot, ioh, PCTL,
    947 				  sc->sc_phase | PCTL_BFINT_ENAB);
    948 #ifdef x68k
    949 		bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* | SCMD_PROG_XFR */
    950 #else
    951 		bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR);	/* XXX */
    952 #endif
    953 		for (;;) {
    954 			/*if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0
    955 				&& (bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)*/
    956 			if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) == 0)
    957 				break;
    958 			if (bus_space_read_1(iot, ioh, INTS) != 0)
    959 				goto out;
    960 		}
    961 
    962 		/* Gather incoming message bytes if needed. */
    963 		if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) {
    964 			if (n >= SPC_MAX_MSG_LEN) {
    965 				(void) bus_space_read_1(iot, ioh, DREG);
    966 				sc->sc_flags |= SPC_DROP_MSGIN;
    967 				spc_sched_msgout(sc, SEND_REJECT);
    968 			} else {
    969 				*sc->sc_imp++ = bus_space_read_1(iot, ioh, DREG);
    970 				n++;
    971 				/*
    972 				 * This testing is suboptimal, but most
    973 				 * messages will be of the one byte variety, so
    974 				 * it should not affect performance
    975 				 * significantly.
    976 				 */
    977 				if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0]))
    978 					break;
    979 				if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0]))
    980 					break;
    981 				if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) &&
    982 				    n == sc->sc_imess[1] + 2)
    983 					break;
    984 			}
    985 		} else
    986 			(void) bus_space_read_1(iot, ioh, DREG);
    987 
    988 		/*
    989 		 * If we reach this spot we're either:
    990 		 * a) in the middle of a multi-byte message, or
    991 		 * b) dropping bytes.
    992 		 */
    993 #if 0
    994 		/* Ack the last byte read. */
    995 		/*(void) bus_space_read_1(iot, ioh, DREG);*/
    996 		while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
    997 			;
    998 #endif
    999 	}
   1000 
   1001 	SPC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
   1002 
   1003 	/* We now have a complete message.  Parse it. */
   1004 	switch (sc->sc_state) {
   1005 		struct spc_acb *acb;
   1006 		struct scsipi_periph *periph;
   1007 		struct spc_tinfo *ti;
   1008 
   1009 	case SPC_CONNECTED:
   1010 		SPC_ASSERT(sc->sc_nexus != NULL);
   1011 		acb = sc->sc_nexus;
   1012 		ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target];
   1013 
   1014 		switch (sc->sc_imess[0]) {
   1015 		case MSG_CMDCOMPLETE:
   1016 			if (sc->sc_dleft < 0) {
   1017 				periph = acb->xs->xs_periph;
   1018 				printf("%s: %d extra bytes from %d:%d\n",
   1019 				    sc->sc_dev.dv_xname, -sc->sc_dleft,
   1020 				    periph->periph_target, periph->periph_lun);
   1021 				acb->data_length = 0;
   1022 			}
   1023 			acb->xs->resid = acb->data_length = sc->sc_dleft;
   1024 			sc->sc_state = SPC_CMDCOMPLETE;
   1025 			break;
   1026 
   1027 		case MSG_PARITY_ERROR:
   1028 			/* Resend the last message. */
   1029 			spc_sched_msgout(sc, sc->sc_lastmsg);
   1030 			break;
   1031 
   1032 		case MSG_MESSAGE_REJECT:
   1033 			SPC_MISC(("message rejected %02x  ", sc->sc_lastmsg));
   1034 			switch (sc->sc_lastmsg) {
   1035 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
   1036 			case SEND_IDENTIFY:
   1037 				ti->flags &= ~(DO_SYNC | DO_WIDE);
   1038 				ti->period = ti->offset = 0;
   1039 				spc_setsync(sc, ti);
   1040 				ti->width = 0;
   1041 				break;
   1042 #endif
   1043 #if SPC_USE_SYNCHRONOUS
   1044 			case SEND_SDTR:
   1045 				ti->flags &= ~DO_SYNC;
   1046 				ti->period = ti->offset = 0;
   1047 				spc_setsync(sc, ti);
   1048 				break;
   1049 #endif
   1050 #if SPC_USE_WIDE
   1051 			case SEND_WDTR:
   1052 				ti->flags &= ~DO_WIDE;
   1053 				ti->width = 0;
   1054 				break;
   1055 #endif
   1056 			case SEND_INIT_DET_ERR:
   1057 				spc_sched_msgout(sc, SEND_ABORT);
   1058 				break;
   1059 			}
   1060 			break;
   1061 
   1062 		case MSG_NOOP:
   1063 			break;
   1064 
   1065 		case MSG_DISCONNECT:
   1066 			ti->dconns++;
   1067 			sc->sc_state = SPC_DISCONNECT;
   1068 			break;
   1069 
   1070 		case MSG_SAVEDATAPOINTER:
   1071 			acb->data_addr = sc->sc_dp;
   1072 			acb->data_length = sc->sc_dleft;
   1073 			break;
   1074 
   1075 		case MSG_RESTOREPOINTERS:
   1076 			sc->sc_dp = acb->data_addr;
   1077 			sc->sc_dleft = acb->data_length;
   1078 			sc->sc_cp = (u_char *)&acb->scsipi_cmd;
   1079 			sc->sc_cleft = acb->scsipi_cmd_length;
   1080 			break;
   1081 
   1082 		case MSG_EXTENDED:
   1083 			switch (sc->sc_imess[2]) {
   1084 #if SPC_USE_SYNCHRONOUS
   1085 			case MSG_EXT_SDTR:
   1086 				if (sc->sc_imess[1] != 3)
   1087 					goto reject;
   1088 				ti->period = sc->sc_imess[3];
   1089 				ti->offset = sc->sc_imess[4];
   1090 				ti->flags &= ~DO_SYNC;
   1091 				if (ti->offset == 0) {
   1092 				} else if (ti->period < sc->sc_minsync ||
   1093 					   ti->period > sc->sc_maxsync ||
   1094 					   ti->offset > 8) {
   1095 					ti->period = ti->offset = 0;
   1096 					spc_sched_msgout(sc, SEND_SDTR);
   1097 				} else {
   1098 					scsipi_printaddr(acb->xs->xs_periph);
   1099 					printf("sync, offset %d, period %dnsec\n",
   1100 					    ti->offset, ti->period * 4);
   1101 				}
   1102 				spc_setsync(sc, ti);
   1103 				break;
   1104 #endif
   1105 
   1106 #if SPC_USE_WIDE
   1107 			case MSG_EXT_WDTR:
   1108 				if (sc->sc_imess[1] != 2)
   1109 					goto reject;
   1110 				ti->width = sc->sc_imess[3];
   1111 				ti->flags &= ~DO_WIDE;
   1112 				if (ti->width == 0) {
   1113 				} else if (ti->width > SPC_MAX_WIDTH) {
   1114 					ti->width = 0;
   1115 					spc_sched_msgout(sc, SEND_WDTR);
   1116 				} else {
   1117 					scsipi_printaddr(acb->xs->xs_periph);
   1118 					printf("wide, width %d\n",
   1119 					    1 << (3 + ti->width));
   1120 				}
   1121 				break;
   1122 #endif
   1123 
   1124 			default:
   1125 				printf("%s: unrecognized MESSAGE EXTENDED; sending REJECT\n",
   1126 				    sc->sc_dev.dv_xname);
   1127 				SPC_BREAK();
   1128 				goto reject;
   1129 			}
   1130 			break;
   1131 
   1132 		default:
   1133 			printf("%s: unrecognized MESSAGE; sending REJECT\n",
   1134 			    sc->sc_dev.dv_xname);
   1135 			SPC_BREAK();
   1136 		reject:
   1137 			spc_sched_msgout(sc, SEND_REJECT);
   1138 			break;
   1139 		}
   1140 		break;
   1141 
   1142 	case SPC_RESELECTED:
   1143 		if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
   1144 			printf("%s: reselect without IDENTIFY; sending DEVICE RESET\n",
   1145 			    sc->sc_dev.dv_xname);
   1146 			SPC_BREAK();
   1147 			goto reset;
   1148 		}
   1149 
   1150 		(void) spc_reselect(sc, sc->sc_imess[0]);
   1151 		break;
   1152 
   1153 	default:
   1154 		printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
   1155 		    sc->sc_dev.dv_xname);
   1156 		SPC_BREAK();
   1157 	reset:
   1158 		spc_sched_msgout(sc, SEND_DEV_RESET);
   1159 		break;
   1160 
   1161 #ifdef notdef
   1162 	abort:
   1163 		spc_sched_msgout(sc, SEND_ABORT);
   1164 		break;
   1165 #endif
   1166 	}
   1167 
   1168 	/* Ack the last message byte. */
   1169 #if 0 /* XXX? */
   1170 	(void) bus_space_read_1(iot, ioh, DREG);
   1171 	while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
   1172 		;
   1173 #endif
   1174 
   1175 	/* Go get the next message, if any. */
   1176 	goto nextmsg;
   1177 
   1178 out:
   1179 	bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
   1180 	SPC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
   1181 }
   1182 
   1183 /*
   1184  * Send the highest priority, scheduled message.
   1185  */
   1186 void
   1187 spc_msgout(sc)
   1188 	struct spc_softc *sc;
   1189 {
   1190 	bus_space_tag_t iot = sc->sc_iot;
   1191 	bus_space_handle_t ioh = sc->sc_ioh;
   1192 #if SPC_USE_SYNCHRONOUS
   1193 	struct spc_tinfo *ti;
   1194 #endif
   1195 	int n;
   1196 
   1197 	SPC_TRACE(("spc_msgout  "));
   1198 
   1199 	if (sc->sc_prevphase == PH_MSGOUT) {
   1200 		if (sc->sc_omp == sc->sc_omess) {
   1201 			/*
   1202 			 * This is a retransmission.
   1203 			 *
   1204 			 * We get here if the target stayed in MESSAGE OUT
   1205 			 * phase.  Section 5.1.9.2 of the SCSI 2 spec indicates
   1206 			 * that all of the previously transmitted messages must
   1207 			 * be sent again, in the same order.  Therefore, we
   1208 			 * requeue all the previously transmitted messages, and
   1209 			 * start again from the top.  Our simple priority
   1210 			 * scheme keeps the messages in the right order.
   1211 			 */
   1212 			SPC_MISC(("retransmitting  "));
   1213 			sc->sc_msgpriq |= sc->sc_msgoutq;
   1214 			/*
   1215 			 * Set ATN.  If we're just sending a trivial 1-byte
   1216 			 * message, we'll clear ATN later on anyway.
   1217 			 */
   1218 			bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); /* XXX? */
   1219 		} else {
   1220 			/* This is a continuation of the previous message. */
   1221 			n = sc->sc_omp - sc->sc_omess;
   1222 			goto nextbyte;
   1223 		}
   1224 	}
   1225 
   1226 	/* No messages transmitted so far. */
   1227 	sc->sc_msgoutq = 0;
   1228 	sc->sc_lastmsg = 0;
   1229 
   1230 nextmsg:
   1231 	/* Pick up highest priority message. */
   1232 	sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
   1233 	sc->sc_msgpriq &= ~sc->sc_currmsg;
   1234 	sc->sc_msgoutq |= sc->sc_currmsg;
   1235 
   1236 	/* Build the outgoing message data. */
   1237 	switch (sc->sc_currmsg) {
   1238 	case SEND_IDENTIFY:
   1239 		SPC_ASSERT(sc->sc_nexus != NULL);
   1240 		sc->sc_omess[0] =
   1241 		    MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1);
   1242 		n = 1;
   1243 		break;
   1244 
   1245 #if SPC_USE_SYNCHRONOUS
   1246 	case SEND_SDTR:
   1247 		SPC_ASSERT(sc->sc_nexus != NULL);
   1248 		ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
   1249 		sc->sc_omess[4] = MSG_EXTENDED;
   1250 		sc->sc_omess[3] = 3;
   1251 		sc->sc_omess[2] = MSG_EXT_SDTR;
   1252 		sc->sc_omess[1] = ti->period >> 2;
   1253 		sc->sc_omess[0] = ti->offset;
   1254 		n = 5;
   1255 		break;
   1256 #endif
   1257 
   1258 #if SPC_USE_WIDE
   1259 	case SEND_WDTR:
   1260 		SPC_ASSERT(sc->sc_nexus != NULL);
   1261 		ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
   1262 		sc->sc_omess[3] = MSG_EXTENDED;
   1263 		sc->sc_omess[2] = 2;
   1264 		sc->sc_omess[1] = MSG_EXT_WDTR;
   1265 		sc->sc_omess[0] = ti->width;
   1266 		n = 4;
   1267 		break;
   1268 #endif
   1269 
   1270 	case SEND_DEV_RESET:
   1271 		sc->sc_flags |= SPC_ABORTING;
   1272 		sc->sc_omess[0] = MSG_BUS_DEV_RESET;
   1273 		n = 1;
   1274 		break;
   1275 
   1276 	case SEND_REJECT:
   1277 		sc->sc_omess[0] = MSG_MESSAGE_REJECT;
   1278 		n = 1;
   1279 		break;
   1280 
   1281 	case SEND_PARITY_ERROR:
   1282 		sc->sc_omess[0] = MSG_PARITY_ERROR;
   1283 		n = 1;
   1284 		break;
   1285 
   1286 	case SEND_INIT_DET_ERR:
   1287 		sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
   1288 		n = 1;
   1289 		break;
   1290 
   1291 	case SEND_ABORT:
   1292 		sc->sc_flags |= SPC_ABORTING;
   1293 		sc->sc_omess[0] = MSG_ABORT;
   1294 		n = 1;
   1295 		break;
   1296 
   1297 	default:
   1298 		printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
   1299 		    sc->sc_dev.dv_xname);
   1300 		SPC_BREAK();
   1301 		sc->sc_omess[0] = MSG_NOOP;
   1302 		n = 1;
   1303 		break;
   1304 	}
   1305 	sc->sc_omp = &sc->sc_omess[n];
   1306 
   1307 nextbyte:
   1308 	/* Send message bytes. */
   1309 	/* send TRANSFER command. */
   1310 	bus_space_write_1(iot, ioh, TCH, n >> 16);
   1311 	bus_space_write_1(iot, ioh, TCM, n >> 8);
   1312 	bus_space_write_1(iot, ioh, TCL, n);
   1313 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
   1314 #ifdef x68k
   1315 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
   1316 #else
   1317 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR);
   1318 #endif
   1319 	for (;;) {
   1320 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
   1321 			break;
   1322 		if (bus_space_read_1(iot, ioh, INTS) != 0)
   1323 			goto out;
   1324 	}
   1325 	for (;;) {
   1326 #if 0
   1327 		for (;;) {
   1328 			if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
   1329 				break;
   1330 			/* Wait for REQINIT.  XXX Need timeout. */
   1331 		}
   1332 #endif
   1333 		if (bus_space_read_1(iot, ioh, INTS) != 0) {
   1334 			/*
   1335 			 * Target left MESSAGE OUT, possibly to reject
   1336 			 * our message.
   1337 			 *
   1338 			 * If this is the last message being sent, then we
   1339 			 * deassert ATN, since either the target is going to
   1340 			 * ignore this message, or it's going to ask for a
   1341 			 * retransmission via MESSAGE PARITY ERROR (in which
   1342 			 * case we reassert ATN anyway).
   1343 			 */
   1344 #if 0
   1345 			if (sc->sc_msgpriq == 0)
   1346 				bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
   1347 #endif
   1348 			goto out;
   1349 		}
   1350 
   1351 #if 0
   1352 		/* Clear ATN before last byte if this is the last message. */
   1353 		if (n == 1 && sc->sc_msgpriq == 0)
   1354 			bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
   1355 #endif
   1356 
   1357 		while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0)
   1358 			;
   1359 		/* Send message byte. */
   1360 		bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp);
   1361 		--n;
   1362 		/* Keep track of the last message we've sent any bytes of. */
   1363 		sc->sc_lastmsg = sc->sc_currmsg;
   1364 #if 0
   1365 		/* Wait for ACK to be negated.  XXX Need timeout. */
   1366 		while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
   1367 			;
   1368 #endif
   1369 
   1370 		if (n == 0)
   1371 			break;
   1372 	}
   1373 
   1374 	/* We get here only if the entire message has been transmitted. */
   1375 	if (sc->sc_msgpriq != 0) {
   1376 		/* There are more outgoing messages. */
   1377 		goto nextmsg;
   1378 	}
   1379 
   1380 	/*
   1381 	 * The last message has been transmitted.  We need to remember the last
   1382 	 * message transmitted (in case the target switches to MESSAGE IN phase
   1383 	 * and sends a MESSAGE REJECT), and the list of messages transmitted
   1384 	 * this time around (in case the target stays in MESSAGE OUT phase to
   1385 	 * request a retransmit).
   1386 	 */
   1387 
   1388 out:
   1389 	/* Disable REQ/ACK protocol. */
   1390 }
   1391 
   1392 /*
   1394  * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc
   1395  * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
   1396  * and ACK deasserted (i.e. waiting for a data byte)
   1397  *
   1398  * This new revision has been optimized (I tried) to make the common case fast,
   1399  * and the rarer cases (as a result) somewhat more comlex
   1400  */
   1401 int
   1402 spc_dataout_pio(sc, p, n)
   1403 	struct spc_softc *sc;
   1404 	u_char *p;
   1405 	int n;
   1406 {
   1407 	bus_space_tag_t iot = sc->sc_iot;
   1408 	bus_space_handle_t ioh = sc->sc_ioh;
   1409 	u_char intstat = 0;
   1410 	int out = 0;
   1411 #define DOUTAMOUNT 8		/* Full FIFO */
   1412 
   1413 	SPC_TRACE(("spc_dataout_pio  "));
   1414 	/* send TRANSFER command. */
   1415 	bus_space_write_1(iot, ioh, TCH, n >> 16);
   1416 	bus_space_write_1(iot, ioh, TCM, n >> 8);
   1417 	bus_space_write_1(iot, ioh, TCL, n);
   1418 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
   1419 #ifdef x68k
   1420 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
   1421 #else
   1422 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR);	/* XXX */
   1423 #endif
   1424 	for (;;) {
   1425 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
   1426 			break;
   1427 		if (bus_space_read_1(iot, ioh, INTS) != 0)
   1428 			break;
   1429 	}
   1430 
   1431 	/*
   1432 	 * I have tried to make the main loop as tight as possible.  This
   1433 	 * means that some of the code following the loop is a bit more
   1434 	 * complex than otherwise.
   1435 	 */
   1436 	while (n > 0) {
   1437 		int xfer;
   1438 
   1439 		for (;;) {
   1440 			intstat = bus_space_read_1(iot, ioh, INTS);
   1441 			/* Wait till buffer is empty. */
   1442 			if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)
   1443 				break;
   1444 			/* Break on interrupt. */
   1445 			if (intstat != 0)
   1446 				goto phasechange;
   1447 		}
   1448 
   1449 		xfer = min(DOUTAMOUNT, n);
   1450 
   1451 		SPC_MISC(("%d> ", xfer));
   1452 
   1453 		n -= xfer;
   1454 		out += xfer;
   1455 
   1456 		while (xfer-- > 0) {
   1457 			bus_space_write_1(iot, ioh, DREG, *p++);
   1458 		}
   1459 	}
   1460 
   1461 	if (out == 0) {
   1462 		for (;;) {
   1463 			if (bus_space_read_1(iot, ioh, INTS) != 0)
   1464 				break;
   1465 		}
   1466 		SPC_MISC(("extra data  "));
   1467 	} else {
   1468 		/* See the bytes off chip */
   1469 		for (;;) {
   1470 			/* Wait till buffer is empty. */
   1471 			if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)
   1472 				break;
   1473 			intstat = bus_space_read_1(iot, ioh, INTS);
   1474 			/* Break on interrupt. */
   1475 			if (intstat != 0)
   1476 				goto phasechange;
   1477 		}
   1478 	}
   1479 
   1480 phasechange:
   1481 	/* Stop the FIFO data path. */
   1482 
   1483 	if (intstat != 0) {
   1484 		/* Some sort of phase change. */
   1485 		int amount;
   1486 
   1487 		amount = ((bus_space_read_1(iot, ioh, TCH) << 16) |
   1488 			  (bus_space_read_1(iot, ioh, TCM) << 8) |
   1489 			  bus_space_read_1(iot, ioh, TCL));
   1490 		if (amount > 0) {
   1491 			out -= amount;
   1492 			SPC_MISC(("+%d ", amount));
   1493 		}
   1494 	}
   1495 
   1496 	/* Turn on ENREQINIT again. */
   1497 
   1498 	return out;
   1499 }
   1500 
   1501 /*
   1503  * spc_datain_pio: perform data transfers using the FIFO datapath in the spc
   1504  * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
   1505  * and ACK deasserted (i.e. at least one byte is ready).
   1506  *
   1507  * For now, uses a pretty dumb algorithm, hangs around until all data has been
   1508  * transferred.  This, is OK for fast targets, but not so smart for slow
   1509  * targets which don't disconnect or for huge transfers.
   1510  */
   1511 int
   1512 spc_datain_pio(sc, p, n)
   1513 	struct spc_softc *sc;
   1514 	u_char *p;
   1515 	int n;
   1516 {
   1517 	bus_space_tag_t iot = sc->sc_iot;
   1518 	bus_space_handle_t ioh = sc->sc_ioh;
   1519 	u_short intstat;
   1520 	int in = 0;
   1521 #define DINAMOUNT 8		/* Full FIFO */
   1522 
   1523 	SPC_TRACE(("spc_datain_pio  "));
   1524 	/* send TRANSFER command. */
   1525 	bus_space_write_1(iot, ioh, TCH, n >> 16);
   1526 	bus_space_write_1(iot, ioh, TCM, n >> 8);
   1527 	bus_space_write_1(iot, ioh, TCL, n);
   1528 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
   1529 #ifdef x68k
   1530 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
   1531 #else
   1532 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR);	/* XXX */
   1533 #endif
   1534 	for (;;) {
   1535 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
   1536 			break;
   1537 		if (bus_space_read_1(iot, ioh, INTS) != 0)
   1538 			goto phasechange;
   1539 	}
   1540 
   1541 	/*
   1542 	 * We leave this loop if one or more of the following is true:
   1543 	 * a) phase != PH_DATAIN && FIFOs are empty
   1544 	 * b) reset has occurred or busfree is detected.
   1545 	 */
   1546 	while (n > 0) {
   1547 		int xfer;
   1548 
   1549 #define INTSMASK 0xff
   1550 		/* Wait for fifo half full or phase mismatch */
   1551 		for (;;) {
   1552 			intstat = ((bus_space_read_1(iot, ioh, SSTS) << 8) |
   1553 				   bus_space_read_1(iot, ioh, INTS));
   1554 			if ((intstat & (INTSMASK | (SSTS_DREG_FULL << 8))) !=
   1555 			    0)
   1556 				break;
   1557 			if ((intstat & (SSTS_DREG_EMPTY << 8)) == 0)
   1558 				break;
   1559 		}
   1560 
   1561 #if 1
   1562 		if ((intstat & INTSMASK) != 0)
   1563 			goto phasechange;
   1564 #else
   1565 		if ((intstat & INTSMASK) != 0 &&
   1566 		    (intstat & (SSTS_DREG_EMPTY << 8)))
   1567 			goto phasechange;
   1568 #endif
   1569 		if ((intstat & (SSTS_DREG_FULL << 8)) != 0)
   1570 			xfer = min(DINAMOUNT, n);
   1571 		else
   1572 			xfer = min(1, n);
   1573 
   1574 		SPC_MISC((">%d ", xfer));
   1575 
   1576 		n -= xfer;
   1577 		in += xfer;
   1578 
   1579 		while (xfer-- > 0) {
   1580 			*p++ = bus_space_read_1(iot, ioh, DREG);
   1581 		}
   1582 
   1583 		if ((intstat & INTSMASK) != 0)
   1584 			goto phasechange;
   1585 	}
   1586 
   1587 	/*
   1588 	 * Some SCSI-devices are rude enough to transfer more data than what
   1589 	 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
   1590 	 * requested 512.  Test for progress, i.e. real transfers.  If no real
   1591 	 * transfers have been performed (n is probably already zero) and the
   1592 	 * FIFO is not empty, waste some bytes....
   1593 	 */
   1594 	if (in == 0) {
   1595 		for (;;) {
   1596 			if (bus_space_read_1(iot, ioh, INTS) != 0)
   1597 				break;
   1598 		}
   1599 		SPC_MISC(("extra data  "));
   1600 	}
   1601 
   1602 phasechange:
   1603 	/* Stop the FIFO data path. */
   1604 
   1605 	/* Turn on ENREQINIT again. */
   1606 
   1607 	return in;
   1608 }
   1609 
   1610 /*
   1612  * Catch an interrupt from the adaptor
   1613  */
   1614 /*
   1615  * This is the workhorse routine of the driver.
   1616  * Deficiencies (for now):
   1617  * 1) always uses programmed I/O
   1618  */
   1619 int
   1620 spcintr(arg)
   1621 	void *arg;
   1622 {
   1623 	struct spc_softc *sc = arg;
   1624 	bus_space_tag_t iot = sc->sc_iot;
   1625 	bus_space_handle_t ioh = sc->sc_ioh;
   1626 	u_char ints;
   1627 	struct spc_acb *acb;
   1628 	struct scsipi_periph *periph;
   1629 	struct spc_tinfo *ti;
   1630 	int n;
   1631 
   1632 	/*
   1633 	 * Disable interrupt.
   1634 	 */
   1635 	bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB);
   1636 
   1637 	SPC_TRACE(("spcintr  "));
   1638 
   1639 loop:
   1640 	/*
   1641 	 * Loop until transfer completion.
   1642 	 */
   1643 	/*
   1644 	 * First check for abnormal conditions, such as reset.
   1645 	 */
   1646 #ifdef x68k			/* XXX? */
   1647 	while ((ints = bus_space_read_1(iot, ioh, INTS)) == 0)
   1648 		delay(1);
   1649 	SPC_MISC(("ints = 0x%x  ", ints));
   1650 #else
   1651 	ints = bus_space_read_1(iot, ioh, INTS);
   1652 	SPC_MISC(("ints = 0x%x  ", ints));
   1653 #endif
   1654 
   1655 	if ((ints & INTS_RST) != 0) {
   1656 		printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
   1657 		goto reset;
   1658 	}
   1659 
   1660 	/*
   1661 	 * Check for less serious errors.
   1662 	 */
   1663 	if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
   1664 		printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
   1665 		if (sc->sc_prevphase == PH_MSGIN) {
   1666 			sc->sc_flags |= SPC_DROP_MSGIN;
   1667 			spc_sched_msgout(sc, SEND_PARITY_ERROR);
   1668 		} else
   1669 			spc_sched_msgout(sc, SEND_INIT_DET_ERR);
   1670 	}
   1671 
   1672 	/*
   1673 	 * If we're not already busy doing something test for the following
   1674 	 * conditions:
   1675 	 * 1) We have been reselected by something
   1676 	 * 2) We have selected something successfully
   1677 	 * 3) Our selection process has timed out
   1678 	 * 4) This is really a bus free interrupt just to get a new command
   1679 	 *    going?
   1680 	 * 5) Spurious interrupt?
   1681 	 */
   1682 	switch (sc->sc_state) {
   1683 	case SPC_IDLE:
   1684 	case SPC_SELECTING:
   1685 		SPC_MISC(("ints:0x%02x ", ints));
   1686 
   1687 		if ((ints & INTS_SEL) != 0) {
   1688 			/*
   1689 			 * We don't currently support target mode.
   1690 			 */
   1691 			printf("%s: target mode selected; going to BUS FREE\n",
   1692 			    sc->sc_dev.dv_xname);
   1693 
   1694 			goto sched;
   1695 		} else if ((ints & INTS_RESEL) != 0) {
   1696 			SPC_MISC(("reselected  "));
   1697 
   1698 			/*
   1699 			 * If we're trying to select a target ourselves,
   1700 			 * push our command back into the ready list.
   1701 			 */
   1702 			if (sc->sc_state == SPC_SELECTING) {
   1703 				SPC_MISC(("backoff selector  "));
   1704 				SPC_ASSERT(sc->sc_nexus != NULL);
   1705 				acb = sc->sc_nexus;
   1706 				sc->sc_nexus = NULL;
   1707 				TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
   1708 			}
   1709 
   1710 			/* Save reselection ID. */
   1711 			sc->sc_selid = bus_space_read_1(iot, ioh, TEMP);
   1712 
   1713 			sc->sc_state = SPC_RESELECTED;
   1714 		} else if ((ints & INTS_CMD_DONE) != 0) {
   1715 			SPC_MISC(("selected  "));
   1716 
   1717 			/*
   1718 			 * We have selected a target. Things to do:
   1719 			 * a) Determine what message(s) to send.
   1720 			 * b) Verify that we're still selecting the target.
   1721 			 * c) Mark device as busy.
   1722 			 */
   1723 			if (sc->sc_state != SPC_SELECTING) {
   1724 				printf("%s: selection out while idle; resetting\n",
   1725 				    sc->sc_dev.dv_xname);
   1726 				SPC_BREAK();
   1727 				goto reset;
   1728 			}
   1729 			SPC_ASSERT(sc->sc_nexus != NULL);
   1730 			acb = sc->sc_nexus;
   1731 			periph = acb->xs->xs_periph;
   1732 			ti = &sc->sc_tinfo[periph->periph_target];
   1733 
   1734 			sc->sc_msgpriq = SEND_IDENTIFY;
   1735 			if (acb->flags & ACB_RESET)
   1736 				sc->sc_msgpriq |= SEND_DEV_RESET;
   1737 			else if (acb->flags & ACB_ABORT)
   1738 				sc->sc_msgpriq |= SEND_ABORT;
   1739 			else {
   1740 #if SPC_USE_SYNCHRONOUS
   1741 				if ((ti->flags & DO_SYNC) != 0)
   1742 					sc->sc_msgpriq |= SEND_SDTR;
   1743 #endif
   1744 #if SPC_USE_WIDE
   1745 				if ((ti->flags & DO_WIDE) != 0)
   1746 					sc->sc_msgpriq |= SEND_WDTR;
   1747 #endif
   1748 			}
   1749 
   1750 			acb->flags |= ACB_NEXUS;
   1751 			ti->lubusy |= (1 << periph->periph_lun);
   1752 
   1753 			/* Do an implicit RESTORE POINTERS. */
   1754 			sc->sc_dp = acb->data_addr;
   1755 			sc->sc_dleft = acb->data_length;
   1756 			sc->sc_cp = (u_char *)&acb->scsipi_cmd;
   1757 			sc->sc_cleft = acb->scsipi_cmd_length;
   1758 
   1759 			/* On our first connection, schedule a timeout. */
   1760 			if ((acb->xs->xs_control & XS_CTL_POLL) == 0)
   1761 				callout_reset(&acb->xs->xs_callout,
   1762 				    mstohz(acb->timeout), spc_timeout, acb);
   1763 
   1764 			sc->sc_state = SPC_CONNECTED;
   1765 		} else if ((ints & INTS_TIMEOUT) != 0) {
   1766 			SPC_MISC(("selection timeout  "));
   1767 
   1768 			if (sc->sc_state != SPC_SELECTING) {
   1769 				printf("%s: selection timeout while idle; resetting\n",
   1770 				    sc->sc_dev.dv_xname);
   1771 				SPC_BREAK();
   1772 				goto reset;
   1773 			}
   1774 			SPC_ASSERT(sc->sc_nexus != NULL);
   1775 			acb = sc->sc_nexus;
   1776 
   1777 			delay(250);
   1778 
   1779 			acb->xs->error = XS_SELTIMEOUT;
   1780 			goto finish;
   1781 		} else {
   1782 			if (sc->sc_state != SPC_IDLE) {
   1783 				printf("%s: BUS FREE while not idle; state=%d\n",
   1784 				    sc->sc_dev.dv_xname, sc->sc_state);
   1785 				SPC_BREAK();
   1786 				goto out;
   1787 			}
   1788 
   1789 			goto sched;
   1790 		}
   1791 
   1792 		/*
   1793 		 * Turn off selection stuff, and prepare to catch bus free
   1794 		 * interrupts, parity errors, and phase changes.
   1795 		 */
   1796 
   1797 		sc->sc_flags = 0;
   1798 		sc->sc_prevphase = PH_INVALID;
   1799 		goto dophase;
   1800 	}
   1801 
   1802 	if ((ints & INTS_DISCON) != 0) {
   1803 		/* We've gone to BUS FREE phase. */
   1804 		bus_space_write_1(iot, ioh, PCTL,
   1805 		    bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB);
   1806 				/* disable disconnect interrupt */
   1807 		bus_space_write_1(iot, ioh, INTS, ints);
   1808 				/* XXX reset interrput */
   1809 
   1810 		switch (sc->sc_state) {
   1811 		case SPC_RESELECTED:
   1812 			goto sched;
   1813 
   1814 		case SPC_CONNECTED:
   1815 			SPC_ASSERT(sc->sc_nexus != NULL);
   1816 			acb = sc->sc_nexus;
   1817 
   1818 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
   1819 			if (sc->sc_prevphase == PH_MSGOUT) {
   1820 				/*
   1821 				 * If the target went to BUS FREE phase during
   1822 				 * or immediately after sending a SDTR or WDTR
   1823 				 * message, disable negotiation.
   1824 				 */
   1825 				periph = acb->xs->xs_periph;
   1826 				ti = &sc->sc_tinfo[periph->periph_target];
   1827 				switch (sc->sc_lastmsg) {
   1828 #if SPC_USE_SYNCHRONOUS
   1829 				case SEND_SDTR:
   1830 					ti->flags &= ~DO_SYNC;
   1831 					ti->period = ti->offset = 0;
   1832 					break;
   1833 #endif
   1834 #if SPC_USE_WIDE
   1835 				case SEND_WDTR:
   1836 					ti->flags &= ~DO_WIDE;
   1837 					ti->width = 0;
   1838 					break;
   1839 #endif
   1840 				}
   1841 			}
   1842 #endif
   1843 
   1844 			if ((sc->sc_flags & SPC_ABORTING) == 0) {
   1845 				/*
   1846 				 * Section 5.1.1 of the SCSI 2 spec suggests
   1847 				 * issuing a REQUEST SENSE following an
   1848 				 * unexpected disconnect.  Some devices go into
   1849 				 * a contingent allegiance condition when
   1850 				 * disconnecting, and this is necessary to
   1851 				 * clean up their state.
   1852 				 */
   1853 				printf("%s: unexpected disconnect; sending REQUEST SENSE\n",
   1854 				    sc->sc_dev.dv_xname);
   1855 				SPC_BREAK();
   1856 				acb->target_stat = SCSI_CHECK;
   1857 				acb->xs->error = XS_NOERROR;
   1858 				goto finish;
   1859 			}
   1860 
   1861 			acb->xs->error = XS_DRIVER_STUFFUP;
   1862 			goto finish;
   1863 
   1864 		case SPC_DISCONNECT:
   1865 			SPC_ASSERT(sc->sc_nexus != NULL);
   1866 			acb = sc->sc_nexus;
   1867 			TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
   1868 			sc->sc_nexus = NULL;
   1869 			goto sched;
   1870 
   1871 		case SPC_CMDCOMPLETE:
   1872 			SPC_ASSERT(sc->sc_nexus != NULL);
   1873 			acb = sc->sc_nexus;
   1874 			goto finish;
   1875 		}
   1876 	}
   1877 	else if ((ints & INTS_CMD_DONE) != 0 &&
   1878 		 sc->sc_prevphase == PH_MSGIN && sc->sc_state != SPC_CONNECTED)
   1879 		goto out;
   1880 
   1881 dophase:
   1882 #if 0
   1883 	if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
   1884 		/* Wait for REQINIT. */
   1885 		goto out;
   1886 	}
   1887 #else
   1888 	bus_space_write_1(iot, ioh, INTS, ints);
   1889 	ints = 0;
   1890 	while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
   1891 		delay(1);	/* need timeout XXX */
   1892 #endif
   1893 
   1894 	/*
   1895 	 * State transition.
   1896 	 */
   1897 	sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK;
   1898 /*	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase);*/
   1899 
   1900 	SPC_MISC(("phase=%d\n", sc->sc_phase));
   1901 	switch (sc->sc_phase) {
   1902 	case PH_MSGOUT:
   1903 		if (sc->sc_state != SPC_CONNECTED &&
   1904 		    sc->sc_state != SPC_RESELECTED)
   1905 			break;
   1906 		spc_msgout(sc);
   1907 		sc->sc_prevphase = PH_MSGOUT;
   1908 		goto loop;
   1909 
   1910 	case PH_MSGIN:
   1911 		if (sc->sc_state != SPC_CONNECTED &&
   1912 		    sc->sc_state != SPC_RESELECTED)
   1913 			break;
   1914 		spc_msgin(sc);
   1915 		sc->sc_prevphase = PH_MSGIN;
   1916 		goto loop;
   1917 
   1918 	case PH_CMD:
   1919 		if (sc->sc_state != SPC_CONNECTED)
   1920 			break;
   1921 #if SPC_DEBUG
   1922 		if ((spc_debug & SPC_SHOWMISC) != 0) {
   1923 			SPC_ASSERT(sc->sc_nexus != NULL);
   1924 			acb = sc->sc_nexus;
   1925 			printf("cmd=0x%02x+%d  ",
   1926 			    acb->scsipi_cmd.opcode, acb->scsipi_cmd_length-1);
   1927 		}
   1928 #endif
   1929 		n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
   1930 		sc->sc_cp += n;
   1931 		sc->sc_cleft -= n;
   1932 		sc->sc_prevphase = PH_CMD;
   1933 		goto loop;
   1934 
   1935 	case PH_DATAOUT:
   1936 		if (sc->sc_state != SPC_CONNECTED)
   1937 			break;
   1938 		SPC_MISC(("dataout dleft=%d  ", sc->sc_dleft));
   1939 		n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
   1940 		sc->sc_dp += n;
   1941 		sc->sc_dleft -= n;
   1942 		sc->sc_prevphase = PH_DATAOUT;
   1943 		goto loop;
   1944 
   1945 	case PH_DATAIN:
   1946 		if (sc->sc_state != SPC_CONNECTED)
   1947 			break;
   1948 		SPC_MISC(("datain  "));
   1949 		n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
   1950 		sc->sc_dp += n;
   1951 		sc->sc_dleft -= n;
   1952 		sc->sc_prevphase = PH_DATAIN;
   1953 		goto loop;
   1954 
   1955 	case PH_STAT:
   1956 		if (sc->sc_state != SPC_CONNECTED)
   1957 			break;
   1958 		SPC_ASSERT(sc->sc_nexus != NULL);
   1959 		acb = sc->sc_nexus;
   1960 		/*acb->target_stat = bus_space_read_1(iot, ioh, DREG);*/
   1961 		spc_datain_pio(sc, &acb->target_stat, 1);
   1962 		SPC_MISC(("target_stat=0x%02x  ", acb->target_stat));
   1963 		sc->sc_prevphase = PH_STAT;
   1964 		goto loop;
   1965 	}
   1966 
   1967 	printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname);
   1968 	SPC_BREAK();
   1969 reset:
   1970 	spc_init(sc);
   1971 	return 1;
   1972 
   1973 finish:
   1974 	callout_stop(&acb->xs->xs_callout);
   1975 	bus_space_write_1(iot, ioh, INTS, ints);
   1976 	ints = 0;
   1977 	spc_done(sc, acb);
   1978 	goto out;
   1979 
   1980 sched:
   1981 	sc->sc_state = SPC_IDLE;
   1982 	spc_sched(sc);
   1983 	goto out;
   1984 
   1985 out:
   1986 	if (ints)
   1987 		bus_space_write_1(iot, ioh, INTS, ints);
   1988 	bus_space_write_1(iot, ioh, SCTL,
   1989 	    bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB);
   1990 	return 1;
   1991 }
   1992 
   1993 void
   1994 spc_abort(sc, acb)
   1995 	struct spc_softc *sc;
   1996 	struct spc_acb *acb;
   1997 {
   1998 
   1999 	/* 2 secs for the abort */
   2000 	acb->timeout = SPC_ABORT_TIMEOUT;
   2001 	acb->flags |= ACB_ABORT;
   2002 
   2003 	if (acb == sc->sc_nexus) {
   2004 		/*
   2005 		 * If we're still selecting, the message will be scheduled
   2006 		 * after selection is complete.
   2007 		 */
   2008 		if (sc->sc_state == SPC_CONNECTED)
   2009 			spc_sched_msgout(sc, SEND_ABORT);
   2010 	} else {
   2011 		spc_dequeue(sc, acb);
   2012 		TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
   2013 		if (sc->sc_state == SPC_IDLE)
   2014 			spc_sched(sc);
   2015 	}
   2016 }
   2017 
   2018 void
   2019 spc_timeout(arg)
   2020 	void *arg;
   2021 {
   2022 	struct spc_acb *acb = arg;
   2023 	struct scsipi_xfer *xs = acb->xs;
   2024 	struct scsipi_periph *periph = xs->xs_periph;
   2025 	struct spc_softc *sc = (void*)periph->periph_channel->chan_adapter->adapt_dev;
   2026 	int s;
   2027 
   2028 	scsipi_printaddr(periph);
   2029 	printf("timed out");
   2030 
   2031 	s = splbio();
   2032 
   2033 	if (acb->flags & ACB_ABORT) {
   2034 		/* abort timed out */
   2035 		printf(" AGAIN\n");
   2036 		/* XXX Must reset! */
   2037 	} else {
   2038 		/* abort the operation that has timed out */
   2039 		printf("\n");
   2040 		acb->xs->error = XS_TIMEOUT;
   2041 		spc_abort(sc, acb);
   2042 	}
   2043 
   2044 	splx(s);
   2045 }
   2046 
   2047 #ifdef SPC_DEBUG
   2049 /*
   2050  * The following functions are mostly used for debugging purposes, either
   2051  * directly called from the driver or from the kernel debugger.
   2052  */
   2053 
   2054 void
   2055 spc_show_scsi_cmd(acb)
   2056 	struct spc_acb *acb;
   2057 {
   2058 	u_char  *b = (u_char *)&acb->scsipi_cmd;
   2059 	int i;
   2060 
   2061 	scsipi_printaddr(acb->xs->xs_periph);
   2062 	if ((acb->xs->xs_control & XS_CTL_RESET) == 0) {
   2063 		for (i = 0; i < acb->scsipi_cmd_length; i++) {
   2064 			if (i)
   2065 				printf(",");
   2066 			printf("%x", b[i]);
   2067 		}
   2068 		printf("\n");
   2069 	} else
   2070 		printf("RESET\n");
   2071 }
   2072 
   2073 void
   2074 spc_print_acb(acb)
   2075 	struct spc_acb *acb;
   2076 {
   2077 
   2078 	printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
   2079 	printf(" dp=%p dleft=%d target_stat=%x\n",
   2080 	       acb->data_addr, acb->data_length, acb->target_stat);
   2081 	spc_show_scsi_cmd(acb);
   2082 }
   2083 
   2084 void
   2085 spc_print_active_acb()
   2086 {
   2087 	struct spc_acb *acb;
   2088 	struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */
   2089 
   2090 	printf("ready list:\n");
   2091 	for (acb = sc->ready_list.tqh_first; acb != NULL;
   2092 	    acb = acb->chain.tqe_next)
   2093 		spc_print_acb(acb);
   2094 	printf("nexus:\n");
   2095 	if (sc->sc_nexus != NULL)
   2096 		spc_print_acb(sc->sc_nexus);
   2097 	printf("nexus list:\n");
   2098 	for (acb = sc->nexus_list.tqh_first; acb != NULL;
   2099 	    acb = acb->chain.tqe_next)
   2100 		spc_print_acb(acb);
   2101 }
   2102 
   2103 void
   2104 spc_dump89352(sc)
   2105 	struct spc_softc *sc;
   2106 {
   2107 	bus_space_tag_t iot = sc->sc_iot;
   2108 	bus_space_handle_t ioh = sc->sc_ioh;
   2109 
   2110 	printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n",
   2111 	    bus_space_read_1(iot, ioh, BDID),
   2112 	    bus_space_read_1(iot, ioh, SCTL),
   2113 	    bus_space_read_1(iot, ioh, SCMD),
   2114 	    bus_space_read_1(iot, ioh, TMOD));
   2115 	printf("         INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n",
   2116 	    bus_space_read_1(iot, ioh, INTS),
   2117 	    bus_space_read_1(iot, ioh, PSNS),
   2118 	    bus_space_read_1(iot, ioh, SSTS),
   2119 	    bus_space_read_1(iot, ioh, SERR),
   2120 	    bus_space_read_1(iot, ioh, PCTL));
   2121 	printf("         MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n",
   2122 	    bus_space_read_1(iot, ioh, MBC),
   2123 #if 0
   2124 	    bus_space_read_1(iot, ioh, DREG),
   2125 #else
   2126 	    0,
   2127 #endif
   2128 	    bus_space_read_1(iot, ioh, TEMP),
   2129 	    bus_space_read_1(iot, ioh, TCH),
   2130 	    bus_space_read_1(iot, ioh, TCM));
   2131 	printf("         TCL=%x EXBF=%x\n",
   2132 	    bus_space_read_1(iot, ioh, TCL),
   2133 	    bus_space_read_1(iot, ioh, EXBF));
   2134 }
   2135 
   2136 void
   2137 spc_dump_driver(sc)
   2138 	struct spc_softc *sc;
   2139 {
   2140 	struct spc_tinfo *ti;
   2141 	int i;
   2142 
   2143 	printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
   2144 	printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x currmsg=%x\n",
   2145 	    sc->sc_state, sc->sc_imess[0],
   2146 	    sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
   2147 	for (i = 0; i < 7; i++) {
   2148 		ti = &sc->sc_tinfo[i];
   2149 		printf("tinfo%d: %d cmds %d disconnects %d timeouts",
   2150 		    i, ti->cmds, ti->dconns, ti->touts);
   2151 		printf(" %d senses flags=%x\n", ti->senses, ti->flags);
   2152 	}
   2153 }
   2154 #endif
   2155