mb89352.c revision 1.16 1 /* $NetBSD: mb89352.c,v 1.16 2003/07/05 18:56:55 tsutsui Exp $ */
2 /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */
3
4 /*-
5 * Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Charles M. Hannum.
22 * 4. The name of the author may not be used to endorse or promote products
23 * derived from this software without specific prior written permission.
24 *
25 * Copyright (c) 1994 Jarle Greipsland
26 * All rights reserved.
27 *
28 * Redistribution and use in source and binary forms, with or without
29 * modification, are permitted provided that the following conditions
30 * are met:
31 * 1. Redistributions of source code must retain the above copyright
32 * notice, this list of conditions and the following disclaimer.
33 * 2. Redistributions in binary form must reproduce the above copyright
34 * notice, this list of conditions and the following disclaimer in the
35 * documentation and/or other materials provided with the distribution.
36 * 3. The name of the author may not be used to endorse or promote products
37 * derived from this software without specific prior written permission.
38 *
39 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
40 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
41 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
42 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
43 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
44 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
47 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
48 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
49 * POSSIBILITY OF SUCH DAMAGE.
50 */
51 /*
52 * [NetBSD for NEC PC-98 series]
53 * Copyright (c) 1996, 1997, 1998
54 * NetBSD/pc98 porting staff. All rights reserved.
55 * Copyright (c) 1996, 1997, 1998
56 * Kouichi Matsuda. All rights reserved.
57 */
58
59 /*
60 * Acknowledgements: Many of the algorithms used in this driver are
61 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
62 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
63 */
64
65 /* TODO list:
66 * 1) Get the DMA stuff working.
67 * 2) Get the iov/uio stuff working. Is this a good thing ???
68 * 3) Get the synch stuff working.
69 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
70 */
71
72 #include <sys/cdefs.h>
73 __KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.16 2003/07/05 18:56:55 tsutsui Exp $");
74
75 #ifdef DDB
76 #define integrate
77 #else
78 #define integrate __inline static
79 #endif
80
81 /*
82 * A few customizable items:
83 */
84
85 /* Synchronous data transfers? */
86 #define SPC_USE_SYNCHRONOUS 0
87 #define SPC_SYNC_REQ_ACK_OFS 8
88
89 /* Wide data transfers? */
90 #define SPC_USE_WIDE 0
91 #define SPC_MAX_WIDTH 0
92
93 /* Max attempts made to transmit a message */
94 #define SPC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */
95
96 /*
97 * Some spin loop parameters (essentially how long to wait some places)
98 * The problem(?) is that sometimes we expect either to be able to transmit a
99 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid
100 * returning from the interrupt just to get yanked back for the next byte we
101 * may spin in the interrupt routine waiting for this byte to come. How long?
102 * This is really (SCSI) device and processor dependent. Tuneable, I guess.
103 */
104 #define SPC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */
105 #define SPC_MSGOUT_SPIN 1
106
107 /*
108 * Include debug functions? At the end of this file there are a bunch of
109 * functions that will print out various information regarding queued SCSI
110 * commands, driver state and chip contents. You can call them from the
111 * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the
112 * kernel uses less memory) but you lose the debugging facilities.
113 */
114 #define SPC_DEBUG 1
115
116 #define SPC_ABORT_TIMEOUT 2000 /* time to wait for abort */
117
118 /* End of customizable parameters */
119
120 /*
121 * MB89352 SCSI Protocol Controller (SPC) routines.
122 */
123
124 #include "opt_ddb.h"
125
126 #include <sys/param.h>
127 #include <sys/systm.h>
128 #include <sys/kernel.h>
129 #include <sys/errno.h>
130 #include <sys/ioctl.h>
131 #include <sys/device.h>
132 #include <sys/buf.h>
133 #include <sys/proc.h>
134 #include <sys/user.h>
135 #include <sys/queue.h>
136
137 #include <machine/intr.h>
138 #include <machine/bus.h>
139
140 #include <dev/scsipi/scsi_all.h>
141 #include <dev/scsipi/scsipi_all.h>
142 #include <dev/scsipi/scsi_message.h>
143 #include <dev/scsipi/scsiconf.h>
144
145 #include <dev/ic/mb89352reg.h>
146 #include <dev/ic/mb89352var.h>
147
148 #ifndef DDB
149 #define Debugger() panic("should call debugger here (mb89352.c)")
150 #endif /* ! DDB */
151
152 #if SPC_DEBUG
153 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */
154 #endif
155
156 void spc_minphys __P((struct buf *));
157 void spc_done __P((struct spc_softc *, struct spc_acb *));
158 void spc_dequeue __P((struct spc_softc *, struct spc_acb *));
159 void spc_scsipi_request __P((struct scsipi_channel *,
160 scsipi_adapter_req_t, void *));
161 int spc_poll __P((struct spc_softc *, struct scsipi_xfer *, int));
162 integrate void spc_sched_msgout __P((struct spc_softc *, u_char));
163 integrate void spc_setsync __P((struct spc_softc *, struct spc_tinfo *));
164 void spc_select __P((struct spc_softc *, struct spc_acb *));
165 void spc_timeout __P((void *));
166 void spc_scsi_reset __P((struct spc_softc *));
167 void spc_reset __P((struct spc_softc *));
168 void spc_free_acb __P((struct spc_softc *, struct spc_acb *, int));
169 struct spc_acb* spc_get_acb __P((struct spc_softc *));
170 int spc_reselect __P((struct spc_softc *, int));
171 void spc_msgin __P((struct spc_softc *));
172 void spc_abort __P((struct spc_softc *, struct spc_acb *));
173 void spc_msgout __P((struct spc_softc *));
174 int spc_dataout_pio __P((struct spc_softc *, u_char *, int));
175 int spc_datain_pio __P((struct spc_softc *, u_char *, int));
176 #if SPC_DEBUG
177 void spc_print_acb __P((struct spc_acb *));
178 void spc_dump_driver __P((struct spc_softc *));
179 void spc_dump89352 __P((struct spc_softc *));
180 void spc_show_scsi_cmd __P((struct spc_acb *));
181 void spc_print_active_acb __P((void));
182 #endif
183
184 extern struct cfdriver spc_cd;
185
186 /*
187 * INITIALIZATION ROUTINES (probe, attach ++)
188 */
189
190 /*
191 * Do the real search-for-device.
192 * Prerequisite: sc->sc_iobase should be set to the proper value
193 */
194 int
195 spc_find(iot, ioh, bdid)
196 bus_space_tag_t iot;
197 bus_space_handle_t ioh;
198 int bdid;
199 {
200 long timeout = SPC_ABORT_TIMEOUT;
201
202 SPC_TRACE(("spc: probing for spc-chip\n"));
203 /*
204 * Disable interrupts then reset the FUJITSU chip.
205 */
206 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
207 bus_space_write_1(iot, ioh, SCMD, 0);
208 bus_space_write_1(iot, ioh, PCTL, 0);
209 bus_space_write_1(iot, ioh, TEMP, 0);
210 bus_space_write_1(iot, ioh, TCH, 0);
211 bus_space_write_1(iot, ioh, TCM, 0);
212 bus_space_write_1(iot, ioh, TCL, 0);
213 bus_space_write_1(iot, ioh, INTS, 0);
214 bus_space_write_1(iot, ioh, SCTL,
215 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
216 bus_space_write_1(iot, ioh, BDID, bdid);
217 delay(400);
218 bus_space_write_1(iot, ioh, SCTL,
219 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
220
221 /* The following detection is derived from spc.c
222 * (by Takahide Matsutsuka) in FreeBSD/pccard-test.
223 */
224 while (bus_space_read_1(iot, ioh, PSNS) && timeout)
225 timeout--;
226 if (!timeout) {
227 printf("spc: find failed\n");
228 return 0;
229 }
230
231 SPC_START(("SPC found"));
232 return 1;
233 }
234
235 void
236 spcattach(sc)
237 struct spc_softc *sc;
238 {
239
240 SPC_TRACE(("spcattach "));
241 sc->sc_state = SPC_INIT;
242
243 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */
244
245 #if SPC_USE_SYNCHRONOUS
246 /*
247 * These are the bounds of the sync period, based on the frequency of
248 * the chip's clock input and the size and offset of the sync period
249 * register.
250 *
251 * For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a
252 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
253 * minimum transfer rate.
254 */
255 sc->sc_minsync = (2 * 250) / sc->sc_freq;
256 sc->sc_maxsync = (9 * 250) / sc->sc_freq;
257 #endif
258
259 spc_init(sc); /* Init chip and driver */
260
261 /*
262 * Fill in the adapter.
263 */
264 sc->sc_adapter.adapt_dev = &sc->sc_dev;
265 sc->sc_adapter.adapt_nchannels = 1;
266 sc->sc_adapter.adapt_openings = 7;
267 sc->sc_adapter.adapt_max_periph = 1;
268 sc->sc_adapter.adapt_minphys = spc_minphys;
269 sc->sc_adapter.adapt_request = spc_scsipi_request;
270
271 sc->sc_channel.chan_adapter = &sc->sc_adapter;
272 sc->sc_channel.chan_bustype = &scsi_bustype;
273 sc->sc_channel.chan_channel = 0;
274 sc->sc_channel.chan_ntargets = 8;
275 sc->sc_channel.chan_nluns = 8;
276 sc->sc_channel.chan_id = sc->sc_initiator;
277
278 /*
279 * ask the adapter what subunits are present
280 */
281 config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
282 }
283
284 /*
285 * Initialize MB89352 chip itself
286 * The following conditions should hold:
287 * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc
288 * must be valid.
289 */
290 void
291 spc_reset(sc)
292 struct spc_softc *sc;
293 {
294 bus_space_tag_t iot = sc->sc_iot;
295 bus_space_handle_t ioh = sc->sc_ioh;
296
297 SPC_TRACE(("spc_reset "));
298 /*
299 * Disable interrupts then reset the FUJITSU chip.
300 */
301 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
302 bus_space_write_1(iot, ioh, SCMD, 0);
303 bus_space_write_1(iot, ioh, PCTL, 0);
304 bus_space_write_1(iot, ioh, TEMP, 0);
305 bus_space_write_1(iot, ioh, TCH, 0);
306 bus_space_write_1(iot, ioh, TCM, 0);
307 bus_space_write_1(iot, ioh, TCL, 0);
308 bus_space_write_1(iot, ioh, INTS, 0);
309 bus_space_write_1(iot, ioh, SCTL,
310 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
311 bus_space_write_1(iot, ioh, BDID, sc->sc_initiator);
312 delay(400);
313 bus_space_write_1(iot, ioh, SCTL,
314 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
315 }
316
317
318 /*
319 * Pull the SCSI RST line for 500us.
320 */
321 void
322 spc_scsi_reset(sc)
323 struct spc_softc *sc;
324 {
325 bus_space_tag_t iot = sc->sc_iot;
326 bus_space_handle_t ioh = sc->sc_ioh;
327
328 SPC_TRACE(("spc_scsi_reset "));
329 bus_space_write_1(iot, ioh, SCMD,
330 bus_space_read_1(iot, ioh, SCMD) | SCMD_RST);
331 delay(500);
332 bus_space_write_1(iot, ioh, SCMD,
333 bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST);
334 delay(50);
335 }
336
337 /*
338 * Initialize spc SCSI driver.
339 */
340 void
341 spc_init(sc)
342 struct spc_softc *sc;
343 {
344 struct spc_acb *acb;
345 int r;
346
347 SPC_TRACE(("spc_init "));
348 spc_reset(sc);
349 spc_scsi_reset(sc);
350 spc_reset(sc);
351
352 if (sc->sc_state == SPC_INIT) {
353 /* First time through; initialize. */
354 TAILQ_INIT(&sc->ready_list);
355 TAILQ_INIT(&sc->nexus_list);
356 TAILQ_INIT(&sc->free_list);
357 sc->sc_nexus = NULL;
358 acb = sc->sc_acb;
359 memset(acb, 0, sizeof(sc->sc_acb));
360 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
361 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
362 acb++;
363 }
364 memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
365 } else {
366 /* Cancel any active commands. */
367 sc->sc_state = SPC_CLEANING;
368 if ((acb = sc->sc_nexus) != NULL) {
369 acb->xs->error = XS_DRIVER_STUFFUP;
370 callout_stop(&acb->xs->xs_callout);
371 spc_done(sc, acb);
372 }
373 while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) {
374 acb->xs->error = XS_DRIVER_STUFFUP;
375 callout_stop(&acb->xs->xs_callout);
376 spc_done(sc, acb);
377 }
378 }
379
380 sc->sc_prevphase = PH_INVALID;
381 for (r = 0; r < 8; r++) {
382 struct spc_tinfo *ti = &sc->sc_tinfo[r];
383
384 ti->flags = 0;
385 #if SPC_USE_SYNCHRONOUS
386 ti->flags |= DO_SYNC;
387 ti->period = sc->sc_minsync;
388 ti->offset = SPC_SYNC_REQ_ACK_OFS;
389 #else
390 ti->period = ti->offset = 0;
391 #endif
392 #if SPC_USE_WIDE
393 ti->flags |= DO_WIDE;
394 ti->width = SPC_MAX_WIDTH;
395 #else
396 ti->width = 0;
397 #endif
398 }
399
400 sc->sc_state = SPC_IDLE;
401 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL,
402 bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB);
403 }
404
405 void
406 spc_free_acb(sc, acb, flags)
407 struct spc_softc *sc;
408 struct spc_acb *acb;
409 int flags;
410 {
411 int s;
412
413 SPC_TRACE(("spc_free_acb "));
414 s = splbio();
415
416 acb->flags = 0;
417 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
418 splx(s);
419 }
420
421 struct spc_acb *
422 spc_get_acb(sc)
423 struct spc_softc *sc;
424 {
425 struct spc_acb *acb;
426 int s;
427
428 SPC_TRACE(("spc_get_acb "));
429 s = splbio();
430 acb = TAILQ_FIRST(&sc->free_list);
431 if (acb != NULL) {
432 TAILQ_REMOVE(&sc->free_list, acb, chain);
433 acb->flags |= ACB_ALLOC;
434 }
435 splx(s);
436 return acb;
437 }
438
439 /*
440 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
441 */
442
443 /*
444 * Expected sequence:
445 * 1) Command inserted into ready list
446 * 2) Command selected for execution
447 * 3) Command won arbitration and has selected target device
448 * 4) Send message out (identify message, eventually also sync.negotiations)
449 * 5) Send command
450 * 5a) Receive disconnect message, disconnect.
451 * 5b) Reselected by target
452 * 5c) Receive identify message from target.
453 * 6) Send or receive data
454 * 7) Receive status
455 * 8) Receive message (command complete etc.)
456 */
457
458 /*
459 * Start a SCSI-command
460 * This function is called by the higher level SCSI-driver to queue/run
461 * SCSI-commands.
462 */
463 void
464 spc_scsipi_request(chan, req, arg)
465 struct scsipi_channel *chan;
466 scsipi_adapter_req_t req;
467 void *arg;
468 {
469 struct scsipi_xfer *xs;
470 struct scsipi_periph *periph;
471 struct spc_softc *sc = (void *)chan->chan_adapter->adapt_dev;
472 struct spc_acb *acb;
473 int s, flags;
474
475 switch (req) {
476 case ADAPTER_REQ_RUN_XFER:
477 xs = arg;
478 periph = xs->xs_periph;
479 SPC_TRACE(("spc_scsipi_request "));
480 SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
481 periph->periph_target));
482
483 flags = xs->xs_control;
484 if ((acb = spc_get_acb(sc)) == NULL) {
485 xs->error = XS_DRIVER_STUFFUP;
486 scsipi_done(xs);
487 return;
488 }
489
490 /* Initialize acb */
491 acb->xs = xs;
492 acb->timeout = xs->timeout;
493
494 if (xs->xs_control & XS_CTL_RESET) {
495 acb->flags |= ACB_RESET;
496 acb->scsipi_cmd_length = 0;
497 acb->data_length = 0;
498 } else {
499 memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen);
500 #if 1
501 acb->scsipi_cmd.bytes[0] |= periph->periph_lun << 5; /* XXX? */
502 #endif
503 acb->scsipi_cmd_length = xs->cmdlen;
504 acb->data_addr = xs->data;
505 acb->data_length = xs->datalen;
506 }
507 acb->target_stat = 0;
508
509 s = splbio();
510
511 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
512 /*
513 * Start scheduling unless a queue process is in progress.
514 */
515 if (sc->sc_state == SPC_IDLE)
516 spc_sched(sc);
517 /*
518 * After successful sending, check if we should return just now.
519 * If so, return SUCCESSFULLY_QUEUED.
520 */
521
522 splx(s);
523
524 if ((flags & XS_CTL_POLL) == 0)
525 return;
526
527 /* Not allowed to use interrupts, use polling instead */
528 s = splbio();
529 if (spc_poll(sc, xs, acb->timeout)) {
530 spc_timeout(acb);
531 if (spc_poll(sc, xs, acb->timeout))
532 spc_timeout(acb);
533 }
534 splx(s);
535 return;
536 case ADAPTER_REQ_GROW_RESOURCES:
537 /* XXX Not supported. */
538 return;
539 case ADAPTER_REQ_SET_XFER_MODE:
540 /* XXX Not supported. */
541 return;
542 }
543 }
544
545 /*
546 * Adjust transfer size in buffer structure
547 */
548 void
549 spc_minphys(bp)
550 struct buf *bp;
551 {
552
553 SPC_TRACE(("spc_minphys "));
554 minphys(bp);
555 }
556
557 /*
558 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
559 */
560 int
561 spc_poll(sc, xs, count)
562 struct spc_softc *sc;
563 struct scsipi_xfer *xs;
564 int count;
565 {
566 bus_space_tag_t iot = sc->sc_iot;
567 bus_space_handle_t ioh = sc->sc_ioh;
568
569 SPC_TRACE(("spc_poll "));
570 while (count) {
571 /*
572 * If we had interrupts enabled, would we
573 * have got an interrupt?
574 */
575 if (bus_space_read_1(iot, ioh, INTS) != 0)
576 spcintr(sc);
577 if ((xs->xs_status & XS_STS_DONE) != 0)
578 return 0;
579 delay(1000);
580 count--;
581 }
582 return 1;
583 }
584
585 /*
586 * LOW LEVEL SCSI UTILITIES
587 */
588
589 integrate void
590 spc_sched_msgout(sc, m)
591 struct spc_softc *sc;
592 u_char m;
593 {
594 bus_space_tag_t iot = sc->sc_iot;
595 bus_space_handle_t ioh = sc->sc_ioh;
596
597 SPC_TRACE(("spc_sched_msgout "));
598 if (sc->sc_msgpriq == 0)
599 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
600 sc->sc_msgpriq |= m;
601 }
602
603 /*
604 * Set synchronous transfer offset and period.
605 */
606 integrate void
607 spc_setsync(sc, ti)
608 struct spc_softc *sc;
609 struct spc_tinfo *ti;
610 {
611 #if SPC_USE_SYNCHRONOUS
612 bus_space_tag_t iot = sc->sc_iot;
613 bus_space_handle_t ioh = sc->sc_ioh;
614
615 SPC_TRACE(("spc_setsync "));
616 if (ti->offset != 0)
617 bus_space_write_1(iot, ioh, TMOD,
618 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
619 else
620 bus_space_write_1(iot, ioh, TMOD, 0);
621 #endif
622 }
623
624 /*
625 * Start a selection. This is used by spc_sched() to select an idle target.
626 */
627 void
628 spc_select(sc, acb)
629 struct spc_softc *sc;
630 struct spc_acb *acb;
631 {
632 struct scsipi_periph *periph = acb->xs->xs_periph;
633 int target = periph->periph_target;
634 struct spc_tinfo *ti = &sc->sc_tinfo[target];
635 bus_space_tag_t iot = sc->sc_iot;
636 bus_space_handle_t ioh = sc->sc_ioh;
637
638 SPC_TRACE(("spc_select "));
639 spc_setsync(sc, ti);
640
641 #if 0
642 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
643 #endif
644 #ifdef x68k /* XXX? */
645 do {
646 asm ("nop");
647 } while (bus_space_read_1(iot, ioh, SSTS) &
648 (SSTS_ACTIVE|SSTS_TARGET|SSTS_BUSY));
649 #endif
650
651 bus_space_write_1(iot, ioh, PCTL, 0);
652 bus_space_write_1(iot, ioh, TEMP,
653 (1 << sc->sc_initiator) | (1 << target));
654 /*
655 * Setup BSY timeout (selection timeout).
656 * 250ms according to the SCSI specification.
657 * T = (X * 256 + 15) * Tclf * 2 (Tclf = 200ns on x68k)
658 * To setup 256ms timeout,
659 * 128000ns/200ns = X * 256 + 15
660 * 640 - 15 = X * 256
661 * X = 625 / 256
662 * X = 2 + 113 / 256
663 * ==> tch = 2, tcm = 113 (correct?)
664 */
665 bus_space_write_1(iot, ioh, TCH, 2);
666 bus_space_write_1(iot, ioh, TCM, 113);
667 /* Time to the information transfer phase start. */
668 bus_space_write_1(iot, ioh, TCL, 3);
669 bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT);
670
671 sc->sc_state = SPC_SELECTING;
672 }
673
674 int
675 spc_reselect(sc, message)
676 struct spc_softc *sc;
677 int message;
678 {
679 u_char selid, target, lun;
680 struct spc_acb *acb;
681 struct scsipi_periph *periph;
682 struct spc_tinfo *ti;
683
684 SPC_TRACE(("spc_reselect "));
685 /*
686 * The SCSI chip made a snapshot of the data bus while the reselection
687 * was being negotiated. This enables us to determine which target did
688 * the reselect.
689 */
690 selid = sc->sc_selid & ~(1 << sc->sc_initiator);
691 if (selid & (selid - 1)) {
692 printf("%s: reselect with invalid selid %02x; "
693 "sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid);
694 SPC_BREAK();
695 goto reset;
696 }
697
698 /*
699 * Search wait queue for disconnected cmd
700 * The list should be short, so I haven't bothered with
701 * any more sophisticated structures than a simple
702 * singly linked list.
703 */
704 target = ffs(selid) - 1;
705 lun = message & 0x07;
706 TAILQ_FOREACH(acb, &sc->nexus_list, chain) {
707 periph = acb->xs->xs_periph;
708 if (periph->periph_target == target &&
709 periph->periph_lun == lun)
710 break;
711 }
712 if (acb == NULL) {
713 printf("%s: reselect from target %d lun %d with no nexus; "
714 "sending ABORT\n", sc->sc_dev.dv_xname, target, lun);
715 SPC_BREAK();
716 goto abort;
717 }
718
719 /* Make this nexus active again. */
720 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
721 sc->sc_state = SPC_CONNECTED;
722 sc->sc_nexus = acb;
723 ti = &sc->sc_tinfo[target];
724 ti->lubusy |= (1 << lun);
725 spc_setsync(sc, ti);
726
727 if (acb->flags & ACB_RESET)
728 spc_sched_msgout(sc, SEND_DEV_RESET);
729 else if (acb->flags & ACB_ABORT)
730 spc_sched_msgout(sc, SEND_ABORT);
731
732 /* Do an implicit RESTORE POINTERS. */
733 sc->sc_dp = acb->data_addr;
734 sc->sc_dleft = acb->data_length;
735 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
736 sc->sc_cleft = acb->scsipi_cmd_length;
737
738 return (0);
739
740 reset:
741 spc_sched_msgout(sc, SEND_DEV_RESET);
742 return (1);
743
744 abort:
745 spc_sched_msgout(sc, SEND_ABORT);
746 return (1);
747 }
748
749 /*
750 * Schedule a SCSI operation. This has now been pulled out of the interrupt
751 * handler so that we may call it from spc_scsi_cmd and spc_done. This may
752 * save us an unecessary interrupt just to get things going. Should only be
753 * called when state == SPC_IDLE and at bio pl.
754 */
755 void
756 spc_sched(sc)
757 struct spc_softc *sc;
758 {
759 struct spc_acb *acb;
760 struct scsipi_periph *periph;
761 struct spc_tinfo *ti;
762
763 /* missing the hw, just return and wait for our hw */
764 if (sc->sc_flags & SPC_INACTIVE)
765 return;
766 SPC_TRACE(("spc_sched "));
767 /*
768 * Find first acb in ready queue that is for a target/lunit pair that
769 * is not busy.
770 */
771 TAILQ_FOREACH(acb, &sc->ready_list, chain) {
772 periph = acb->xs->xs_periph;
773 ti = &sc->sc_tinfo[periph->periph_target];
774 if ((ti->lubusy & (1 << periph->periph_lun)) == 0) {
775 SPC_MISC(("selecting %d:%d ",
776 periph->periph_target, periph->periph_lun));
777 TAILQ_REMOVE(&sc->ready_list, acb, chain);
778 sc->sc_nexus = acb;
779 spc_select(sc, acb);
780 return;
781 } else
782 SPC_MISC(("%d:%d busy\n",
783 periph->periph_target, periph->periph_lun));
784 }
785 SPC_MISC(("idle "));
786 /* Nothing to start; just enable reselections and wait. */
787 }
788
789 /*
790 * POST PROCESSING OF SCSI_CMD (usually current)
791 */
792 void
793 spc_done(sc, acb)
794 struct spc_softc *sc;
795 struct spc_acb *acb;
796 {
797 struct scsipi_xfer *xs = acb->xs;
798 struct scsipi_periph *periph = xs->xs_periph;
799 struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
800
801 SPC_TRACE(("spc_done "));
802
803 if (xs->error == XS_NOERROR) {
804 if (acb->flags & ACB_ABORT) {
805 xs->error = XS_DRIVER_STUFFUP;
806 } else {
807 switch (acb->target_stat) {
808 case SCSI_CHECK:
809 /* First, save the return values */
810 xs->resid = acb->data_length;
811 /* FALLBACK */
812 case SCSI_BUSY:
813 xs->status = acb->target_stat;
814 xs->error = XS_BUSY;
815 break;
816 case SCSI_OK:
817 xs->resid = acb->data_length;
818 break;
819 default:
820 xs->error = XS_DRIVER_STUFFUP;
821 #if SPC_DEBUG
822 printf("%s: spc_done: bad stat 0x%x\n",
823 sc->sc_dev.dv_xname, acb->target_stat);
824 #endif
825 break;
826 }
827 }
828 }
829
830 #if SPC_DEBUG
831 if ((spc_debug & SPC_SHOWMISC) != 0) {
832 if (xs->resid != 0)
833 printf("resid=%d ", xs->resid);
834 else
835 printf("error=%d\n", xs->error);
836 }
837 #endif
838
839 /*
840 * Remove the ACB from whatever queue it happens to be on.
841 */
842 if (acb->flags & ACB_NEXUS)
843 ti->lubusy &= ~(1 << periph->periph_lun);
844 if (acb == sc->sc_nexus) {
845 sc->sc_nexus = NULL;
846 sc->sc_state = SPC_IDLE;
847 spc_sched(sc);
848 } else
849 spc_dequeue(sc, acb);
850
851 spc_free_acb(sc, acb, xs->xs_control);
852 ti->cmds++;
853 scsipi_done(xs);
854 }
855
856 void
857 spc_dequeue(sc, acb)
858 struct spc_softc *sc;
859 struct spc_acb *acb;
860 {
861
862 SPC_TRACE(("spc_dequeue "));
863 if (acb->flags & ACB_NEXUS)
864 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
865 else
866 TAILQ_REMOVE(&sc->ready_list, acb, chain);
867 }
868
869 /*
870 * INTERRUPT/PROTOCOL ENGINE
871 */
872
873 /*
874 * Precondition:
875 * The SCSI bus is already in the MSGI phase and there is a message byte
876 * on the bus, along with an asserted REQ signal.
877 */
878 void
879 spc_msgin(sc)
880 struct spc_softc *sc;
881 {
882 bus_space_tag_t iot = sc->sc_iot;
883 bus_space_handle_t ioh = sc->sc_ioh;
884 int n;
885
886 SPC_TRACE(("spc_msgin "));
887
888 if (sc->sc_prevphase == PH_MSGIN) {
889 /* This is a continuation of the previous message. */
890 n = sc->sc_imp - sc->sc_imess;
891 goto nextbyte;
892 }
893
894 /* This is a new MESSAGE IN phase. Clean up our state. */
895 sc->sc_flags &= ~SPC_DROP_MSGIN;
896
897 nextmsg:
898 n = 0;
899 sc->sc_imp = &sc->sc_imess[n];
900
901 nextbyte:
902 /*
903 * Read a whole message, but don't ack the last byte. If we reject the
904 * message, we have to assert ATN during the message transfer phase
905 * itself.
906 */
907 for (;;) {
908 #if 0
909 for (;;) {
910 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
911 break;
912 /* Wait for REQINIT. XXX Need timeout. */
913 }
914 #endif
915 if (bus_space_read_1(iot, ioh, INTS) != 0) {
916 /*
917 * Target left MESSAGE IN, probably because it
918 * a) noticed our ATN signal, or
919 * b) ran out of messages.
920 */
921 goto out;
922 }
923
924 /* If parity error, just dump everything on the floor. */
925 if ((bus_space_read_1(iot, ioh, SERR) &
926 (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
927 sc->sc_flags |= SPC_DROP_MSGIN;
928 spc_sched_msgout(sc, SEND_PARITY_ERROR);
929 }
930
931 /* send TRANSFER command. */
932 bus_space_write_1(iot, ioh, TCH, 0);
933 bus_space_write_1(iot, ioh, TCM, 0);
934 bus_space_write_1(iot, ioh, TCL, 1);
935 bus_space_write_1(iot, ioh, PCTL,
936 sc->sc_phase | PCTL_BFINT_ENAB);
937 #ifdef x68k
938 bus_space_write_1(iot, ioh, SCMD,
939 SCMD_XFR /* | SCMD_PROG_XFR */);
940 #else
941 bus_space_write_1(iot, ioh, SCMD,
942 SCMD_XFR | SCMD_PROG_XFR); /* XXX */
943 #endif
944 for (;;) {
945 #if 0
946 if ((bus_space_read_1(iot, ioh, SSTS) &
947 SSTS_BUSY) != 0 &&
948 (bus_space_read_1(iot, ioh, SSTS) &
949 SSTS_DREG_EMPTY) != 0)
950 #endif
951 if ((bus_space_read_1(iot, ioh, SSTS) &
952 SSTS_DREG_EMPTY) == 0)
953 break;
954 if (bus_space_read_1(iot, ioh, INTS) != 0)
955 goto out;
956 }
957
958 /* Gather incoming message bytes if needed. */
959 if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) {
960 if (n >= SPC_MAX_MSG_LEN) {
961 (void) bus_space_read_1(iot, ioh, DREG);
962 sc->sc_flags |= SPC_DROP_MSGIN;
963 spc_sched_msgout(sc, SEND_REJECT);
964 } else {
965 *sc->sc_imp++ =
966 bus_space_read_1(iot, ioh, DREG);
967 n++;
968 /*
969 * This testing is suboptimal, but most
970 * messages will be of the one byte variety, so
971 * it should not affect performance
972 * significantly.
973 */
974 if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0]))
975 break;
976 if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0]))
977 break;
978 if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) &&
979 n == sc->sc_imess[1] + 2)
980 break;
981 }
982 } else
983 (void) bus_space_read_1(iot, ioh, DREG);
984
985 /*
986 * If we reach this spot we're either:
987 * a) in the middle of a multi-byte message, or
988 * b) dropping bytes.
989 */
990 #if 0
991 /* Ack the last byte read. */
992 /*(void) bus_space_read_1(iot, ioh, DREG);*/
993 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
994 ;
995 #endif
996 }
997
998 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
999
1000 /* We now have a complete message. Parse it. */
1001 switch (sc->sc_state) {
1002 struct spc_acb *acb;
1003 struct scsipi_periph *periph;
1004 struct spc_tinfo *ti;
1005
1006 case SPC_CONNECTED:
1007 SPC_ASSERT(sc->sc_nexus != NULL);
1008 acb = sc->sc_nexus;
1009 ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target];
1010
1011 switch (sc->sc_imess[0]) {
1012 case MSG_CMDCOMPLETE:
1013 if (sc->sc_dleft < 0) {
1014 periph = acb->xs->xs_periph;
1015 printf("%s: %d extra bytes from %d:%d\n",
1016 sc->sc_dev.dv_xname, -sc->sc_dleft,
1017 periph->periph_target, periph->periph_lun);
1018 acb->data_length = 0;
1019 }
1020 acb->xs->resid = acb->data_length = sc->sc_dleft;
1021 sc->sc_state = SPC_CMDCOMPLETE;
1022 break;
1023
1024 case MSG_PARITY_ERROR:
1025 /* Resend the last message. */
1026 spc_sched_msgout(sc, sc->sc_lastmsg);
1027 break;
1028
1029 case MSG_MESSAGE_REJECT:
1030 SPC_MISC(("message rejected %02x ", sc->sc_lastmsg));
1031 switch (sc->sc_lastmsg) {
1032 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1033 case SEND_IDENTIFY:
1034 ti->flags &= ~(DO_SYNC | DO_WIDE);
1035 ti->period = ti->offset = 0;
1036 spc_setsync(sc, ti);
1037 ti->width = 0;
1038 break;
1039 #endif
1040 #if SPC_USE_SYNCHRONOUS
1041 case SEND_SDTR:
1042 ti->flags &= ~DO_SYNC;
1043 ti->period = ti->offset = 0;
1044 spc_setsync(sc, ti);
1045 break;
1046 #endif
1047 #if SPC_USE_WIDE
1048 case SEND_WDTR:
1049 ti->flags &= ~DO_WIDE;
1050 ti->width = 0;
1051 break;
1052 #endif
1053 case SEND_INIT_DET_ERR:
1054 spc_sched_msgout(sc, SEND_ABORT);
1055 break;
1056 }
1057 break;
1058
1059 case MSG_NOOP:
1060 break;
1061
1062 case MSG_DISCONNECT:
1063 ti->dconns++;
1064 sc->sc_state = SPC_DISCONNECT;
1065 break;
1066
1067 case MSG_SAVEDATAPOINTER:
1068 acb->data_addr = sc->sc_dp;
1069 acb->data_length = sc->sc_dleft;
1070 break;
1071
1072 case MSG_RESTOREPOINTERS:
1073 sc->sc_dp = acb->data_addr;
1074 sc->sc_dleft = acb->data_length;
1075 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1076 sc->sc_cleft = acb->scsipi_cmd_length;
1077 break;
1078
1079 case MSG_EXTENDED:
1080 switch (sc->sc_imess[2]) {
1081 #if SPC_USE_SYNCHRONOUS
1082 case MSG_EXT_SDTR:
1083 if (sc->sc_imess[1] != 3)
1084 goto reject;
1085 ti->period = sc->sc_imess[3];
1086 ti->offset = sc->sc_imess[4];
1087 ti->flags &= ~DO_SYNC;
1088 if (ti->offset == 0) {
1089 } else if (ti->period < sc->sc_minsync ||
1090 ti->period > sc->sc_maxsync ||
1091 ti->offset > 8) {
1092 ti->period = ti->offset = 0;
1093 spc_sched_msgout(sc, SEND_SDTR);
1094 } else {
1095 scsipi_printaddr(acb->xs->xs_periph);
1096 printf("sync, offset %d, "
1097 "period %dnsec\n",
1098 ti->offset, ti->period * 4);
1099 }
1100 spc_setsync(sc, ti);
1101 break;
1102 #endif
1103
1104 #if SPC_USE_WIDE
1105 case MSG_EXT_WDTR:
1106 if (sc->sc_imess[1] != 2)
1107 goto reject;
1108 ti->width = sc->sc_imess[3];
1109 ti->flags &= ~DO_WIDE;
1110 if (ti->width == 0) {
1111 } else if (ti->width > SPC_MAX_WIDTH) {
1112 ti->width = 0;
1113 spc_sched_msgout(sc, SEND_WDTR);
1114 } else {
1115 scsipi_printaddr(acb->xs->xs_periph);
1116 printf("wide, width %d\n",
1117 1 << (3 + ti->width));
1118 }
1119 break;
1120 #endif
1121
1122 default:
1123 printf("%s: unrecognized MESSAGE EXTENDED; "
1124 "sending REJECT\n", sc->sc_dev.dv_xname);
1125 SPC_BREAK();
1126 goto reject;
1127 }
1128 break;
1129
1130 default:
1131 printf("%s: unrecognized MESSAGE; sending REJECT\n",
1132 sc->sc_dev.dv_xname);
1133 SPC_BREAK();
1134 reject:
1135 spc_sched_msgout(sc, SEND_REJECT);
1136 break;
1137 }
1138 break;
1139
1140 case SPC_RESELECTED:
1141 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
1142 printf("%s: reselect without IDENTIFY; "
1143 "sending DEVICE RESET\n", sc->sc_dev.dv_xname);
1144 SPC_BREAK();
1145 goto reset;
1146 }
1147
1148 (void) spc_reselect(sc, sc->sc_imess[0]);
1149 break;
1150
1151 default:
1152 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1153 sc->sc_dev.dv_xname);
1154 SPC_BREAK();
1155 reset:
1156 spc_sched_msgout(sc, SEND_DEV_RESET);
1157 break;
1158
1159 #ifdef notdef
1160 abort:
1161 spc_sched_msgout(sc, SEND_ABORT);
1162 break;
1163 #endif
1164 }
1165
1166 /* Ack the last message byte. */
1167 #if 0 /* XXX? */
1168 (void) bus_space_read_1(iot, ioh, DREG);
1169 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1170 ;
1171 #endif
1172
1173 /* Go get the next message, if any. */
1174 goto nextmsg;
1175
1176 out:
1177 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1178 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
1179 }
1180
1181 /*
1182 * Send the highest priority, scheduled message.
1183 */
1184 void
1185 spc_msgout(sc)
1186 struct spc_softc *sc;
1187 {
1188 bus_space_tag_t iot = sc->sc_iot;
1189 bus_space_handle_t ioh = sc->sc_ioh;
1190 #if SPC_USE_SYNCHRONOUS
1191 struct spc_tinfo *ti;
1192 #endif
1193 int n;
1194
1195 SPC_TRACE(("spc_msgout "));
1196
1197 if (sc->sc_prevphase == PH_MSGOUT) {
1198 if (sc->sc_omp == sc->sc_omess) {
1199 /*
1200 * This is a retransmission.
1201 *
1202 * We get here if the target stayed in MESSAGE OUT
1203 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates
1204 * that all of the previously transmitted messages must
1205 * be sent again, in the same order. Therefore, we
1206 * requeue all the previously transmitted messages, and
1207 * start again from the top. Our simple priority
1208 * scheme keeps the messages in the right order.
1209 */
1210 SPC_MISC(("retransmitting "));
1211 sc->sc_msgpriq |= sc->sc_msgoutq;
1212 /*
1213 * Set ATN. If we're just sending a trivial 1-byte
1214 * message, we'll clear ATN later on anyway.
1215 */
1216 bus_space_write_1(iot, ioh, SCMD,
1217 SCMD_SET_ATN); /* XXX? */
1218 } else {
1219 /* This is a continuation of the previous message. */
1220 n = sc->sc_omp - sc->sc_omess;
1221 goto nextbyte;
1222 }
1223 }
1224
1225 /* No messages transmitted so far. */
1226 sc->sc_msgoutq = 0;
1227 sc->sc_lastmsg = 0;
1228
1229 nextmsg:
1230 /* Pick up highest priority message. */
1231 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
1232 sc->sc_msgpriq &= ~sc->sc_currmsg;
1233 sc->sc_msgoutq |= sc->sc_currmsg;
1234
1235 /* Build the outgoing message data. */
1236 switch (sc->sc_currmsg) {
1237 case SEND_IDENTIFY:
1238 SPC_ASSERT(sc->sc_nexus != NULL);
1239 sc->sc_omess[0] =
1240 MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1);
1241 n = 1;
1242 break;
1243
1244 #if SPC_USE_SYNCHRONOUS
1245 case SEND_SDTR:
1246 SPC_ASSERT(sc->sc_nexus != NULL);
1247 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
1248 sc->sc_omess[4] = MSG_EXTENDED;
1249 sc->sc_omess[3] = MSG_EXT_SDTR_LEN;
1250 sc->sc_omess[2] = MSG_EXT_SDTR;
1251 sc->sc_omess[1] = ti->period >> 2;
1252 sc->sc_omess[0] = ti->offset;
1253 n = 5;
1254 break;
1255 #endif
1256
1257 #if SPC_USE_WIDE
1258 case SEND_WDTR:
1259 SPC_ASSERT(sc->sc_nexus != NULL);
1260 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
1261 sc->sc_omess[3] = MSG_EXTENDED;
1262 sc->sc_omess[2] = MSG_EXT_WDTR_LEN;
1263 sc->sc_omess[1] = MSG_EXT_WDTR;
1264 sc->sc_omess[0] = ti->width;
1265 n = 4;
1266 break;
1267 #endif
1268
1269 case SEND_DEV_RESET:
1270 sc->sc_flags |= SPC_ABORTING;
1271 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1272 n = 1;
1273 break;
1274
1275 case SEND_REJECT:
1276 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1277 n = 1;
1278 break;
1279
1280 case SEND_PARITY_ERROR:
1281 sc->sc_omess[0] = MSG_PARITY_ERROR;
1282 n = 1;
1283 break;
1284
1285 case SEND_INIT_DET_ERR:
1286 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1287 n = 1;
1288 break;
1289
1290 case SEND_ABORT:
1291 sc->sc_flags |= SPC_ABORTING;
1292 sc->sc_omess[0] = MSG_ABORT;
1293 n = 1;
1294 break;
1295
1296 default:
1297 printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
1298 sc->sc_dev.dv_xname);
1299 SPC_BREAK();
1300 sc->sc_omess[0] = MSG_NOOP;
1301 n = 1;
1302 break;
1303 }
1304 sc->sc_omp = &sc->sc_omess[n];
1305
1306 nextbyte:
1307 /* Send message bytes. */
1308 /* send TRANSFER command. */
1309 bus_space_write_1(iot, ioh, TCH, n >> 16);
1310 bus_space_write_1(iot, ioh, TCM, n >> 8);
1311 bus_space_write_1(iot, ioh, TCL, n);
1312 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1313 #ifdef x68k
1314 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */
1315 #else
1316 bus_space_write_1(iot, ioh, SCMD,
1317 SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR);
1318 #endif
1319 for (;;) {
1320 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1321 break;
1322 if (bus_space_read_1(iot, ioh, INTS) != 0)
1323 goto out;
1324 }
1325 for (;;) {
1326 #if 0
1327 for (;;) {
1328 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
1329 break;
1330 /* Wait for REQINIT. XXX Need timeout. */
1331 }
1332 #endif
1333 if (bus_space_read_1(iot, ioh, INTS) != 0) {
1334 /*
1335 * Target left MESSAGE OUT, possibly to reject
1336 * our message.
1337 *
1338 * If this is the last message being sent, then we
1339 * deassert ATN, since either the target is going to
1340 * ignore this message, or it's going to ask for a
1341 * retransmission via MESSAGE PARITY ERROR (in which
1342 * case we reassert ATN anyway).
1343 */
1344 #if 0
1345 if (sc->sc_msgpriq == 0)
1346 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1347 #endif
1348 goto out;
1349 }
1350
1351 #if 0
1352 /* Clear ATN before last byte if this is the last message. */
1353 if (n == 1 && sc->sc_msgpriq == 0)
1354 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1355 #endif
1356
1357 while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0)
1358 ;
1359 /* Send message byte. */
1360 bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp);
1361 --n;
1362 /* Keep track of the last message we've sent any bytes of. */
1363 sc->sc_lastmsg = sc->sc_currmsg;
1364 #if 0
1365 /* Wait for ACK to be negated. XXX Need timeout. */
1366 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1367 ;
1368 #endif
1369
1370 if (n == 0)
1371 break;
1372 }
1373
1374 /* We get here only if the entire message has been transmitted. */
1375 if (sc->sc_msgpriq != 0) {
1376 /* There are more outgoing messages. */
1377 goto nextmsg;
1378 }
1379
1380 /*
1381 * The last message has been transmitted. We need to remember the last
1382 * message transmitted (in case the target switches to MESSAGE IN phase
1383 * and sends a MESSAGE REJECT), and the list of messages transmitted
1384 * this time around (in case the target stays in MESSAGE OUT phase to
1385 * request a retransmit).
1386 */
1387
1388 out:
1389 /* Disable REQ/ACK protocol. */
1390 return;
1391 }
1392
1393 /*
1394 * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc
1395 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
1396 * and ACK deasserted (i.e. waiting for a data byte)
1397 *
1398 * This new revision has been optimized (I tried) to make the common case fast,
1399 * and the rarer cases (as a result) somewhat more comlex
1400 */
1401 int
1402 spc_dataout_pio(sc, p, n)
1403 struct spc_softc *sc;
1404 u_char *p;
1405 int n;
1406 {
1407 bus_space_tag_t iot = sc->sc_iot;
1408 bus_space_handle_t ioh = sc->sc_ioh;
1409 u_char intstat = 0;
1410 int out = 0;
1411 #define DOUTAMOUNT 8 /* Full FIFO */
1412
1413 SPC_TRACE(("spc_dataout_pio "));
1414 /* send TRANSFER command. */
1415 bus_space_write_1(iot, ioh, TCH, n >> 16);
1416 bus_space_write_1(iot, ioh, TCM, n >> 8);
1417 bus_space_write_1(iot, ioh, TCL, n);
1418 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1419 #ifdef x68k
1420 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */
1421 #else
1422 bus_space_write_1(iot, ioh, SCMD,
1423 SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR); /* XXX */
1424 #endif
1425 for (;;) {
1426 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1427 break;
1428 if (bus_space_read_1(iot, ioh, INTS) != 0)
1429 break;
1430 }
1431
1432 /*
1433 * I have tried to make the main loop as tight as possible. This
1434 * means that some of the code following the loop is a bit more
1435 * complex than otherwise.
1436 */
1437 while (n > 0) {
1438 int xfer;
1439
1440 for (;;) {
1441 intstat = bus_space_read_1(iot, ioh, INTS);
1442 /* Wait till buffer is empty. */
1443 if ((bus_space_read_1(iot, ioh, SSTS) &
1444 SSTS_DREG_EMPTY) != 0)
1445 break;
1446 /* Break on interrupt. */
1447 if (intstat != 0)
1448 goto phasechange;
1449 }
1450
1451 xfer = min(DOUTAMOUNT, n);
1452
1453 SPC_MISC(("%d> ", xfer));
1454
1455 n -= xfer;
1456 out += xfer;
1457
1458 while (xfer-- > 0) {
1459 bus_space_write_1(iot, ioh, DREG, *p++);
1460 }
1461 }
1462
1463 if (out == 0) {
1464 for (;;) {
1465 if (bus_space_read_1(iot, ioh, INTS) != 0)
1466 break;
1467 }
1468 SPC_MISC(("extra data "));
1469 } else {
1470 /* See the bytes off chip */
1471 for (;;) {
1472 /* Wait till buffer is empty. */
1473 if ((bus_space_read_1(iot, ioh, SSTS) &
1474 SSTS_DREG_EMPTY) != 0)
1475 break;
1476 intstat = bus_space_read_1(iot, ioh, INTS);
1477 /* Break on interrupt. */
1478 if (intstat != 0)
1479 goto phasechange;
1480 }
1481 }
1482
1483 phasechange:
1484 /* Stop the FIFO data path. */
1485
1486 if (intstat != 0) {
1487 /* Some sort of phase change. */
1488 int amount;
1489
1490 amount = (bus_space_read_1(iot, ioh, TCH) << 16) |
1491 (bus_space_read_1(iot, ioh, TCM) << 8) |
1492 bus_space_read_1(iot, ioh, TCL);
1493 if (amount > 0) {
1494 out -= amount;
1495 SPC_MISC(("+%d ", amount));
1496 }
1497 }
1498
1499 /* Turn on ENREQINIT again. */
1500
1501 return out;
1502 }
1503
1504 /*
1505 * spc_datain_pio: perform data transfers using the FIFO datapath in the spc
1506 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
1507 * and ACK deasserted (i.e. at least one byte is ready).
1508 *
1509 * For now, uses a pretty dumb algorithm, hangs around until all data has been
1510 * transferred. This, is OK for fast targets, but not so smart for slow
1511 * targets which don't disconnect or for huge transfers.
1512 */
1513 int
1514 spc_datain_pio(sc, p, n)
1515 struct spc_softc *sc;
1516 u_char *p;
1517 int n;
1518 {
1519 bus_space_tag_t iot = sc->sc_iot;
1520 bus_space_handle_t ioh = sc->sc_ioh;
1521 u_short intstat;
1522 int in = 0;
1523 #define DINAMOUNT 8 /* Full FIFO */
1524
1525 SPC_TRACE(("spc_datain_pio "));
1526 /* send TRANSFER command. */
1527 bus_space_write_1(iot, ioh, TCH, n >> 16);
1528 bus_space_write_1(iot, ioh, TCM, n >> 8);
1529 bus_space_write_1(iot, ioh, TCL, n);
1530 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1531 #ifdef x68k
1532 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */
1533 #else
1534 bus_space_write_1(iot, ioh, SCMD,
1535 SCMD_XFR | SCMD_PROG_XFR); /* XXX */
1536 #endif
1537 for (;;) {
1538 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1539 break;
1540 if (bus_space_read_1(iot, ioh, INTS) != 0)
1541 goto phasechange;
1542 }
1543
1544 /*
1545 * We leave this loop if one or more of the following is true:
1546 * a) phase != PH_DATAIN && FIFOs are empty
1547 * b) reset has occurred or busfree is detected.
1548 */
1549 while (n > 0) {
1550 int xfer;
1551
1552 #define INTSMASK 0xff
1553 /* Wait for fifo half full or phase mismatch */
1554 for (;;) {
1555 intstat = (bus_space_read_1(iot, ioh, SSTS) << 8) |
1556 bus_space_read_1(iot, ioh, INTS);
1557 if ((intstat & (INTSMASK | (SSTS_DREG_FULL << 8))) !=
1558 0)
1559 break;
1560 if ((intstat & (SSTS_DREG_EMPTY << 8)) == 0)
1561 break;
1562 }
1563
1564 #if 1
1565 if ((intstat & INTSMASK) != 0)
1566 goto phasechange;
1567 #else
1568 if ((intstat & INTSMASK) != 0 &&
1569 (intstat & (SSTS_DREG_EMPTY << 8)))
1570 goto phasechange;
1571 #endif
1572 if ((intstat & (SSTS_DREG_FULL << 8)) != 0)
1573 xfer = min(DINAMOUNT, n);
1574 else
1575 xfer = min(1, n);
1576
1577 SPC_MISC((">%d ", xfer));
1578
1579 n -= xfer;
1580 in += xfer;
1581
1582 while (xfer-- > 0) {
1583 *p++ = bus_space_read_1(iot, ioh, DREG);
1584 }
1585
1586 if ((intstat & INTSMASK) != 0)
1587 goto phasechange;
1588 }
1589
1590 /*
1591 * Some SCSI-devices are rude enough to transfer more data than what
1592 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
1593 * requested 512. Test for progress, i.e. real transfers. If no real
1594 * transfers have been performed (n is probably already zero) and the
1595 * FIFO is not empty, waste some bytes....
1596 */
1597 if (in == 0) {
1598 for (;;) {
1599 if (bus_space_read_1(iot, ioh, INTS) != 0)
1600 break;
1601 }
1602 SPC_MISC(("extra data "));
1603 }
1604
1605 phasechange:
1606 /* Stop the FIFO data path. */
1607
1608 /* Turn on ENREQINIT again. */
1609
1610 return in;
1611 }
1612
1613 /*
1614 * Catch an interrupt from the adaptor
1615 */
1616 /*
1617 * This is the workhorse routine of the driver.
1618 * Deficiencies (for now):
1619 * 1) always uses programmed I/O
1620 */
1621 int
1622 spcintr(arg)
1623 void *arg;
1624 {
1625 struct spc_softc *sc = arg;
1626 bus_space_tag_t iot = sc->sc_iot;
1627 bus_space_handle_t ioh = sc->sc_ioh;
1628 u_char ints;
1629 struct spc_acb *acb;
1630 struct scsipi_periph *periph;
1631 struct spc_tinfo *ti;
1632 int n;
1633
1634 /*
1635 * Disable interrupt.
1636 */
1637 bus_space_write_1(iot, ioh, SCTL,
1638 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB);
1639
1640 SPC_TRACE(("spcintr "));
1641
1642 loop:
1643 /*
1644 * Loop until transfer completion.
1645 */
1646 /*
1647 * First check for abnormal conditions, such as reset.
1648 */
1649 #ifdef x68k /* XXX? */
1650 while ((ints = bus_space_read_1(iot, ioh, INTS)) == 0)
1651 delay(1);
1652 SPC_MISC(("ints = 0x%x ", ints));
1653 #else
1654 ints = bus_space_read_1(iot, ioh, INTS);
1655 SPC_MISC(("ints = 0x%x ", ints));
1656 #endif
1657
1658 if ((ints & INTS_RST) != 0) {
1659 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
1660 goto reset;
1661 }
1662
1663 /*
1664 * Check for less serious errors.
1665 */
1666 if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR))
1667 != 0) {
1668 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
1669 if (sc->sc_prevphase == PH_MSGIN) {
1670 sc->sc_flags |= SPC_DROP_MSGIN;
1671 spc_sched_msgout(sc, SEND_PARITY_ERROR);
1672 } else
1673 spc_sched_msgout(sc, SEND_INIT_DET_ERR);
1674 }
1675
1676 /*
1677 * If we're not already busy doing something test for the following
1678 * conditions:
1679 * 1) We have been reselected by something
1680 * 2) We have selected something successfully
1681 * 3) Our selection process has timed out
1682 * 4) This is really a bus free interrupt just to get a new command
1683 * going?
1684 * 5) Spurious interrupt?
1685 */
1686 switch (sc->sc_state) {
1687 case SPC_IDLE:
1688 case SPC_SELECTING:
1689 SPC_MISC(("ints:0x%02x ", ints));
1690
1691 if ((ints & INTS_SEL) != 0) {
1692 /*
1693 * We don't currently support target mode.
1694 */
1695 printf("%s: target mode selected; going to BUS FREE\n",
1696 sc->sc_dev.dv_xname);
1697
1698 goto sched;
1699 } else if ((ints & INTS_RESEL) != 0) {
1700 SPC_MISC(("reselected "));
1701
1702 /*
1703 * If we're trying to select a target ourselves,
1704 * push our command back into the ready list.
1705 */
1706 if (sc->sc_state == SPC_SELECTING) {
1707 SPC_MISC(("backoff selector "));
1708 SPC_ASSERT(sc->sc_nexus != NULL);
1709 acb = sc->sc_nexus;
1710 sc->sc_nexus = NULL;
1711 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
1712 }
1713
1714 /* Save reselection ID. */
1715 sc->sc_selid = bus_space_read_1(iot, ioh, TEMP);
1716
1717 sc->sc_state = SPC_RESELECTED;
1718 } else if ((ints & INTS_CMD_DONE) != 0) {
1719 SPC_MISC(("selected "));
1720
1721 /*
1722 * We have selected a target. Things to do:
1723 * a) Determine what message(s) to send.
1724 * b) Verify that we're still selecting the target.
1725 * c) Mark device as busy.
1726 */
1727 if (sc->sc_state != SPC_SELECTING) {
1728 printf("%s: selection out while idle; "
1729 "resetting\n", sc->sc_dev.dv_xname);
1730 SPC_BREAK();
1731 goto reset;
1732 }
1733 SPC_ASSERT(sc->sc_nexus != NULL);
1734 acb = sc->sc_nexus;
1735 periph = acb->xs->xs_periph;
1736 ti = &sc->sc_tinfo[periph->periph_target];
1737
1738 sc->sc_msgpriq = SEND_IDENTIFY;
1739 if (acb->flags & ACB_RESET)
1740 sc->sc_msgpriq |= SEND_DEV_RESET;
1741 else if (acb->flags & ACB_ABORT)
1742 sc->sc_msgpriq |= SEND_ABORT;
1743 else {
1744 #if SPC_USE_SYNCHRONOUS
1745 if ((ti->flags & DO_SYNC) != 0)
1746 sc->sc_msgpriq |= SEND_SDTR;
1747 #endif
1748 #if SPC_USE_WIDE
1749 if ((ti->flags & DO_WIDE) != 0)
1750 sc->sc_msgpriq |= SEND_WDTR;
1751 #endif
1752 }
1753
1754 acb->flags |= ACB_NEXUS;
1755 ti->lubusy |= (1 << periph->periph_lun);
1756
1757 /* Do an implicit RESTORE POINTERS. */
1758 sc->sc_dp = acb->data_addr;
1759 sc->sc_dleft = acb->data_length;
1760 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1761 sc->sc_cleft = acb->scsipi_cmd_length;
1762
1763 /* On our first connection, schedule a timeout. */
1764 if ((acb->xs->xs_control & XS_CTL_POLL) == 0)
1765 callout_reset(&acb->xs->xs_callout,
1766 mstohz(acb->timeout), spc_timeout, acb);
1767
1768 sc->sc_state = SPC_CONNECTED;
1769 } else if ((ints & INTS_TIMEOUT) != 0) {
1770 SPC_MISC(("selection timeout "));
1771
1772 if (sc->sc_state != SPC_SELECTING) {
1773 printf("%s: selection timeout while idle; "
1774 "resetting\n", sc->sc_dev.dv_xname);
1775 SPC_BREAK();
1776 goto reset;
1777 }
1778 SPC_ASSERT(sc->sc_nexus != NULL);
1779 acb = sc->sc_nexus;
1780
1781 delay(250);
1782
1783 acb->xs->error = XS_SELTIMEOUT;
1784 goto finish;
1785 } else {
1786 if (sc->sc_state != SPC_IDLE) {
1787 printf("%s: BUS FREE while not idle; "
1788 "state=%d\n",
1789 sc->sc_dev.dv_xname, sc->sc_state);
1790 SPC_BREAK();
1791 goto out;
1792 }
1793
1794 goto sched;
1795 }
1796
1797 /*
1798 * Turn off selection stuff, and prepare to catch bus free
1799 * interrupts, parity errors, and phase changes.
1800 */
1801
1802 sc->sc_flags = 0;
1803 sc->sc_prevphase = PH_INVALID;
1804 goto dophase;
1805 }
1806
1807 if ((ints & INTS_DISCON) != 0) {
1808 /* We've gone to BUS FREE phase. */
1809 /* disable disconnect interrupt */
1810 bus_space_write_1(iot, ioh, PCTL,
1811 bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB);
1812 /* XXX reset interrput */
1813 bus_space_write_1(iot, ioh, INTS, ints);
1814
1815 switch (sc->sc_state) {
1816 case SPC_RESELECTED:
1817 goto sched;
1818
1819 case SPC_CONNECTED:
1820 SPC_ASSERT(sc->sc_nexus != NULL);
1821 acb = sc->sc_nexus;
1822
1823 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1824 if (sc->sc_prevphase == PH_MSGOUT) {
1825 /*
1826 * If the target went to BUS FREE phase during
1827 * or immediately after sending a SDTR or WDTR
1828 * message, disable negotiation.
1829 */
1830 periph = acb->xs->xs_periph;
1831 ti = &sc->sc_tinfo[periph->periph_target];
1832 switch (sc->sc_lastmsg) {
1833 #if SPC_USE_SYNCHRONOUS
1834 case SEND_SDTR:
1835 ti->flags &= ~DO_SYNC;
1836 ti->period = ti->offset = 0;
1837 break;
1838 #endif
1839 #if SPC_USE_WIDE
1840 case SEND_WDTR:
1841 ti->flags &= ~DO_WIDE;
1842 ti->width = 0;
1843 break;
1844 #endif
1845 }
1846 }
1847 #endif
1848
1849 if ((sc->sc_flags & SPC_ABORTING) == 0) {
1850 /*
1851 * Section 5.1.1 of the SCSI 2 spec suggests
1852 * issuing a REQUEST SENSE following an
1853 * unexpected disconnect. Some devices go into
1854 * a contingent allegiance condition when
1855 * disconnecting, and this is necessary to
1856 * clean up their state.
1857 */
1858 printf("%s: unexpected disconnect; "
1859 "sending REQUEST SENSE\n",
1860 sc->sc_dev.dv_xname);
1861 SPC_BREAK();
1862 acb->target_stat = SCSI_CHECK;
1863 acb->xs->error = XS_NOERROR;
1864 goto finish;
1865 }
1866
1867 acb->xs->error = XS_DRIVER_STUFFUP;
1868 goto finish;
1869
1870 case SPC_DISCONNECT:
1871 SPC_ASSERT(sc->sc_nexus != NULL);
1872 acb = sc->sc_nexus;
1873 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
1874 sc->sc_nexus = NULL;
1875 goto sched;
1876
1877 case SPC_CMDCOMPLETE:
1878 SPC_ASSERT(sc->sc_nexus != NULL);
1879 acb = sc->sc_nexus;
1880 goto finish;
1881 }
1882 }
1883 else if ((ints & INTS_CMD_DONE) != 0 &&
1884 sc->sc_prevphase == PH_MSGIN &&
1885 sc->sc_state != SPC_CONNECTED)
1886 goto out;
1887
1888 dophase:
1889 #if 0
1890 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
1891 /* Wait for REQINIT. */
1892 goto out;
1893 }
1894 #else
1895 bus_space_write_1(iot, ioh, INTS, ints);
1896 ints = 0;
1897 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
1898 delay(1); /* need timeout XXX */
1899 #endif
1900
1901 /*
1902 * State transition.
1903 */
1904 sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK;
1905 #if 0
1906 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase);
1907 #endif
1908
1909 SPC_MISC(("phase=%d\n", sc->sc_phase));
1910 switch (sc->sc_phase) {
1911 case PH_MSGOUT:
1912 if (sc->sc_state != SPC_CONNECTED &&
1913 sc->sc_state != SPC_RESELECTED)
1914 break;
1915 spc_msgout(sc);
1916 sc->sc_prevphase = PH_MSGOUT;
1917 goto loop;
1918
1919 case PH_MSGIN:
1920 if (sc->sc_state != SPC_CONNECTED &&
1921 sc->sc_state != SPC_RESELECTED)
1922 break;
1923 spc_msgin(sc);
1924 sc->sc_prevphase = PH_MSGIN;
1925 goto loop;
1926
1927 case PH_CMD:
1928 if (sc->sc_state != SPC_CONNECTED)
1929 break;
1930 #if SPC_DEBUG
1931 if ((spc_debug & SPC_SHOWMISC) != 0) {
1932 SPC_ASSERT(sc->sc_nexus != NULL);
1933 acb = sc->sc_nexus;
1934 printf("cmd=0x%02x+%d ",
1935 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length - 1);
1936 }
1937 #endif
1938 n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
1939 sc->sc_cp += n;
1940 sc->sc_cleft -= n;
1941 sc->sc_prevphase = PH_CMD;
1942 goto loop;
1943
1944 case PH_DATAOUT:
1945 if (sc->sc_state != SPC_CONNECTED)
1946 break;
1947 SPC_MISC(("dataout dleft=%d ", sc->sc_dleft));
1948 n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
1949 sc->sc_dp += n;
1950 sc->sc_dleft -= n;
1951 sc->sc_prevphase = PH_DATAOUT;
1952 goto loop;
1953
1954 case PH_DATAIN:
1955 if (sc->sc_state != SPC_CONNECTED)
1956 break;
1957 SPC_MISC(("datain "));
1958 n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
1959 sc->sc_dp += n;
1960 sc->sc_dleft -= n;
1961 sc->sc_prevphase = PH_DATAIN;
1962 goto loop;
1963
1964 case PH_STAT:
1965 if (sc->sc_state != SPC_CONNECTED)
1966 break;
1967 SPC_ASSERT(sc->sc_nexus != NULL);
1968 acb = sc->sc_nexus;
1969 #if 0
1970 acb->target_stat = bus_space_read_1(iot, ioh, DREG);
1971 #endif
1972 spc_datain_pio(sc, &acb->target_stat, 1);
1973 SPC_MISC(("target_stat=0x%02x ", acb->target_stat));
1974 sc->sc_prevphase = PH_STAT;
1975 goto loop;
1976 }
1977
1978 printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname);
1979 SPC_BREAK();
1980 reset:
1981 spc_init(sc);
1982 return 1;
1983
1984 finish:
1985 callout_stop(&acb->xs->xs_callout);
1986 bus_space_write_1(iot, ioh, INTS, ints);
1987 ints = 0;
1988 spc_done(sc, acb);
1989 goto out;
1990
1991 sched:
1992 sc->sc_state = SPC_IDLE;
1993 spc_sched(sc);
1994 goto out;
1995
1996 out:
1997 if (ints)
1998 bus_space_write_1(iot, ioh, INTS, ints);
1999 bus_space_write_1(iot, ioh, SCTL,
2000 bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB);
2001 return 1;
2002 }
2003
2004 void
2005 spc_abort(sc, acb)
2006 struct spc_softc *sc;
2007 struct spc_acb *acb;
2008 {
2009
2010 /* 2 secs for the abort */
2011 acb->timeout = SPC_ABORT_TIMEOUT;
2012 acb->flags |= ACB_ABORT;
2013
2014 if (acb == sc->sc_nexus) {
2015 /*
2016 * If we're still selecting, the message will be scheduled
2017 * after selection is complete.
2018 */
2019 if (sc->sc_state == SPC_CONNECTED)
2020 spc_sched_msgout(sc, SEND_ABORT);
2021 } else {
2022 spc_dequeue(sc, acb);
2023 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
2024 if (sc->sc_state == SPC_IDLE)
2025 spc_sched(sc);
2026 }
2027 }
2028
2029 void
2030 spc_timeout(arg)
2031 void *arg;
2032 {
2033 struct spc_acb *acb = arg;
2034 struct scsipi_xfer *xs = acb->xs;
2035 struct scsipi_periph *periph = xs->xs_periph;
2036 struct spc_softc *sc;
2037 int s;
2038
2039 sc = (void *)periph->periph_channel->chan_adapter->adapt_dev;
2040 scsipi_printaddr(periph);
2041 printf("timed out");
2042
2043 s = splbio();
2044
2045 if (acb->flags & ACB_ABORT) {
2046 /* abort timed out */
2047 printf(" AGAIN\n");
2048 /* XXX Must reset! */
2049 } else {
2050 /* abort the operation that has timed out */
2051 printf("\n");
2052 acb->xs->error = XS_TIMEOUT;
2053 spc_abort(sc, acb);
2054 }
2055
2056 splx(s);
2057 }
2058
2059 #ifdef SPC_DEBUG
2060 /*
2061 * The following functions are mostly used for debugging purposes, either
2062 * directly called from the driver or from the kernel debugger.
2063 */
2064
2065 void
2066 spc_show_scsi_cmd(acb)
2067 struct spc_acb *acb;
2068 {
2069 u_char *b = (u_char *)&acb->scsipi_cmd;
2070 int i;
2071
2072 scsipi_printaddr(acb->xs->xs_periph);
2073 if ((acb->xs->xs_control & XS_CTL_RESET) == 0) {
2074 for (i = 0; i < acb->scsipi_cmd_length; i++) {
2075 if (i)
2076 printf(",");
2077 printf("%x", b[i]);
2078 }
2079 printf("\n");
2080 } else
2081 printf("RESET\n");
2082 }
2083
2084 void
2085 spc_print_acb(acb)
2086 struct spc_acb *acb;
2087 {
2088
2089 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
2090 printf(" dp=%p dleft=%d target_stat=%x\n",
2091 acb->data_addr, acb->data_length, acb->target_stat);
2092 spc_show_scsi_cmd(acb);
2093 }
2094
2095 void
2096 spc_print_active_acb()
2097 {
2098 struct spc_acb *acb;
2099 struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */
2100
2101 printf("ready list:\n");
2102 TAILQ_FOREACH(acb, &sc->ready_list, chain)
2103 spc_print_acb(acb);
2104 printf("nexus:\n");
2105 if (sc->sc_nexus != NULL)
2106 spc_print_acb(sc->sc_nexus);
2107 printf("nexus list:\n");
2108 TAILQ_FOREACH(acb, &sc->nexus_list, chain)
2109 spc_print_acb(acb);
2110 }
2111
2112 void
2113 spc_dump89352(sc)
2114 struct spc_softc *sc;
2115 {
2116 bus_space_tag_t iot = sc->sc_iot;
2117 bus_space_handle_t ioh = sc->sc_ioh;
2118
2119 printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n",
2120 bus_space_read_1(iot, ioh, BDID),
2121 bus_space_read_1(iot, ioh, SCTL),
2122 bus_space_read_1(iot, ioh, SCMD),
2123 bus_space_read_1(iot, ioh, TMOD));
2124 printf(" INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n",
2125 bus_space_read_1(iot, ioh, INTS),
2126 bus_space_read_1(iot, ioh, PSNS),
2127 bus_space_read_1(iot, ioh, SSTS),
2128 bus_space_read_1(iot, ioh, SERR),
2129 bus_space_read_1(iot, ioh, PCTL));
2130 printf(" MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n",
2131 bus_space_read_1(iot, ioh, MBC),
2132 #if 0
2133 bus_space_read_1(iot, ioh, DREG),
2134 #else
2135 0,
2136 #endif
2137 bus_space_read_1(iot, ioh, TEMP),
2138 bus_space_read_1(iot, ioh, TCH),
2139 bus_space_read_1(iot, ioh, TCM));
2140 printf(" TCL=%x EXBF=%x\n",
2141 bus_space_read_1(iot, ioh, TCL),
2142 bus_space_read_1(iot, ioh, EXBF));
2143 }
2144
2145 void
2146 spc_dump_driver(sc)
2147 struct spc_softc *sc;
2148 {
2149 struct spc_tinfo *ti;
2150 int i;
2151
2152 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
2153 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x "
2154 "currmsg=%x\n", sc->sc_state, sc->sc_imess[0],
2155 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
2156 for (i = 0; i < 7; i++) {
2157 ti = &sc->sc_tinfo[i];
2158 printf("tinfo%d: %d cmds %d disconnects %d timeouts",
2159 i, ti->cmds, ti->dconns, ti->touts);
2160 printf(" %d senses flags=%x\n", ti->senses, ti->flags);
2161 }
2162 }
2163 #endif
2164