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mb89352.c revision 1.20
      1 /*	$NetBSD: mb89352.c,v 1.20 2003/07/05 19:50:17 tsutsui Exp $	*/
      2 /*	NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp	*/
      3 
      4 /*-
      5  * Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc.
      6  * All rights reserved.
      7  *
      8  * This code is derived from software contributed to The NetBSD Foundation
      9  * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by Charles M. Hannum.
     22  * 4. The name of the author may not be used to endorse or promote products
     23  *    derived from this software without specific prior written permission.
     24  *
     25  * Copyright (c) 1994 Jarle Greipsland
     26  * All rights reserved.
     27  *
     28  * Redistribution and use in source and binary forms, with or without
     29  * modification, are permitted provided that the following conditions
     30  * are met:
     31  * 1. Redistributions of source code must retain the above copyright
     32  *    notice, this list of conditions and the following disclaimer.
     33  * 2. Redistributions in binary form must reproduce the above copyright
     34  *    notice, this list of conditions and the following disclaimer in the
     35  *    documentation and/or other materials provided with the distribution.
     36  * 3. The name of the author may not be used to endorse or promote products
     37  *    derived from this software without specific prior written permission.
     38  *
     39  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     40  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     41  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     42  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
     43  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     44  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     45  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     46  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     47  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
     48  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     49  * POSSIBILITY OF SUCH DAMAGE.
     50  */
     51 /*
     52  * [NetBSD for NEC PC-98 series]
     53  *  Copyright (c) 1996, 1997, 1998
     54  *	NetBSD/pc98 porting staff. All rights reserved.
     55  *  Copyright (c) 1996, 1997, 1998
     56  *	Kouichi Matsuda. All rights reserved.
     57  */
     58 
     59 /*
     60  * Acknowledgements: Many of the algorithms used in this driver are
     61  * inspired by the work of Julian Elischer (julian (at) tfs.com) and
     62  * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu).  Thanks a million!
     63  */
     64 
     65 /* TODO list:
     66  * 1) Get the DMA stuff working.
     67  * 2) Get the iov/uio stuff working. Is this a good thing ???
     68  * 3) Get the synch stuff working.
     69  * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
     70  */
     71 
     72 #include <sys/cdefs.h>
     73 __KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.20 2003/07/05 19:50:17 tsutsui Exp $");
     74 
     75 #ifdef DDB
     76 #define	integrate
     77 #else
     78 #define	integrate	__inline static
     79 #endif
     80 
     81 /*
     82  * A few customizable items:
     83  */
     84 
     85 /* Synchronous data transfers? */
     86 #define SPC_USE_SYNCHRONOUS	0
     87 #define SPC_SYNC_REQ_ACK_OFS 	8
     88 
     89 /* Wide data transfers? */
     90 #define	SPC_USE_WIDE		0
     91 #define	SPC_MAX_WIDTH		0
     92 
     93 /* Max attempts made to transmit a message */
     94 #define SPC_MSG_MAX_ATTEMPT	3 /* Not used now XXX */
     95 
     96 /*
     97  * Some spin loop parameters (essentially how long to wait some places)
     98  * The problem(?) is that sometimes we expect either to be able to transmit a
     99  * byte or to get a new one from the SCSI bus pretty soon.  In order to avoid
    100  * returning from the interrupt just to get yanked back for the next byte we
    101  * may spin in the interrupt routine waiting for this byte to come.  How long?
    102  * This is really (SCSI) device and processor dependent.  Tuneable, I guess.
    103  */
    104 #define SPC_MSGIN_SPIN	1 	/* Will spinwait upto ?ms for a new msg byte */
    105 #define SPC_MSGOUT_SPIN	1
    106 
    107 /*
    108  * Include debug functions?  At the end of this file there are a bunch of
    109  * functions that will print out various information regarding queued SCSI
    110  * commands, driver state and chip contents.  You can call them from the
    111  * kernel debugger.  If you set SPC_DEBUG to 0 they are not included (the
    112  * kernel uses less memory) but you lose the debugging facilities.
    113  */
    114 #if 0
    115 #define SPC_DEBUG		1
    116 #endif
    117 
    118 #define	SPC_ABORT_TIMEOUT	2000	/* time to wait for abort */
    119 
    120 /* End of customizable parameters */
    121 
    122 /*
    123  * MB89352 SCSI Protocol Controller (SPC) routines.
    124  */
    125 
    126 #include "opt_ddb.h"
    127 
    128 #include <sys/param.h>
    129 #include <sys/systm.h>
    130 #include <sys/kernel.h>
    131 #include <sys/errno.h>
    132 #include <sys/ioctl.h>
    133 #include <sys/device.h>
    134 #include <sys/buf.h>
    135 #include <sys/proc.h>
    136 #include <sys/user.h>
    137 #include <sys/queue.h>
    138 
    139 #include <machine/intr.h>
    140 #include <machine/bus.h>
    141 
    142 #include <dev/scsipi/scsi_all.h>
    143 #include <dev/scsipi/scsipi_all.h>
    144 #include <dev/scsipi/scsi_message.h>
    145 #include <dev/scsipi/scsiconf.h>
    146 
    147 #include <dev/ic/mb89352reg.h>
    148 #include <dev/ic/mb89352var.h>
    149 
    150 #ifndef DDB
    151 #define	Debugger() panic("should call debugger here (mb89352.c)")
    152 #endif /* ! DDB */
    153 
    154 #if SPC_DEBUG
    155 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */
    156 #endif
    157 
    158 void	spc_done	__P((struct spc_softc *, struct spc_acb *));
    159 void	spc_dequeue	__P((struct spc_softc *, struct spc_acb *));
    160 void	spc_scsipi_request __P((struct scsipi_channel *,
    161 				scsipi_adapter_req_t, void *));
    162 int	spc_poll	__P((struct spc_softc *, struct scsipi_xfer *, int));
    163 integrate void	spc_sched_msgout __P((struct spc_softc *, u_char));
    164 integrate void	spc_setsync	__P((struct spc_softc *, struct spc_tinfo *));
    165 void	spc_select	__P((struct spc_softc *, struct spc_acb *));
    166 void	spc_timeout	__P((void *));
    167 void	spc_scsi_reset	__P((struct spc_softc *));
    168 void	spc_reset	__P((struct spc_softc *));
    169 void	spc_free_acb	__P((struct spc_softc *, struct spc_acb *, int));
    170 struct spc_acb* spc_get_acb __P((struct spc_softc *));
    171 int	spc_reselect	__P((struct spc_softc *, int));
    172 void	spc_msgin	__P((struct spc_softc *));
    173 void	spc_abort	__P((struct spc_softc *, struct spc_acb *));
    174 void	spc_msgout	__P((struct spc_softc *));
    175 int	spc_dataout_pio	__P((struct spc_softc *, u_char *, int));
    176 int	spc_datain_pio	__P((struct spc_softc *, u_char *, int));
    177 #if SPC_DEBUG
    178 void	spc_print_acb	__P((struct spc_acb *));
    179 void	spc_dump_driver __P((struct spc_softc *));
    180 void	spc_dump89352	__P((struct spc_softc *));
    181 void	spc_show_scsi_cmd __P((struct spc_acb *));
    182 void	spc_print_active_acb __P((void));
    183 #endif
    184 
    185 extern struct cfdriver spc_cd;
    186 
    187 /*
    188  * INITIALIZATION ROUTINES (probe, attach ++)
    189  */
    190 
    191 /*
    192  * Do the real search-for-device.
    193  * Prerequisite: sc->sc_iobase should be set to the proper value
    194  */
    195 int
    196 spc_find(iot, ioh, bdid)
    197 	bus_space_tag_t iot;
    198 	bus_space_handle_t ioh;
    199 	int bdid;
    200 {
    201 	long timeout = SPC_ABORT_TIMEOUT;
    202 
    203 	SPC_TRACE(("spc: probing for spc-chip\n"));
    204 	/*
    205 	 * Disable interrupts then reset the FUJITSU chip.
    206 	 */
    207 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
    208 	bus_space_write_1(iot, ioh, SCMD, 0);
    209 	bus_space_write_1(iot, ioh, PCTL, 0);
    210 	bus_space_write_1(iot, ioh, TEMP, 0);
    211 	bus_space_write_1(iot, ioh, TCH, 0);
    212 	bus_space_write_1(iot, ioh, TCM, 0);
    213 	bus_space_write_1(iot, ioh, TCL, 0);
    214 	bus_space_write_1(iot, ioh, INTS, 0);
    215 	bus_space_write_1(iot, ioh, SCTL,
    216 	    SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
    217 	bus_space_write_1(iot, ioh, BDID, bdid);
    218 	delay(400);
    219 	bus_space_write_1(iot, ioh, SCTL,
    220 	    bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
    221 
    222 	/* The following detection is derived from spc.c
    223 	 * (by Takahide Matsutsuka) in FreeBSD/pccard-test.
    224 	 */
    225 	while (bus_space_read_1(iot, ioh, PSNS) && timeout) {
    226 		timeout--;
    227 		DELAY(1);
    228 	}
    229 	if (timeout == 0) {
    230 		printf("spc: find failed\n");
    231 		return 0;
    232 	}
    233 
    234 	SPC_START(("SPC found"));
    235 	return 1;
    236 }
    237 
    238 void
    239 spc_attach(sc)
    240 	struct spc_softc *sc;
    241 {
    242 
    243 	SPC_TRACE(("spc_attach  "));
    244 	sc->sc_state = SPC_INIT;
    245 
    246 	sc->sc_freq = 20;	/* XXXX Assume 20 MHz. */
    247 
    248 #if SPC_USE_SYNCHRONOUS
    249 	/*
    250 	 * These are the bounds of the sync period, based on the frequency of
    251 	 * the chip's clock input and the size and offset of the sync period
    252 	 * register.
    253 	 *
    254 	 * For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a
    255 	 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
    256 	 * minimum transfer rate.
    257 	 */
    258 	sc->sc_minsync = (2 * 250) / sc->sc_freq;
    259 	sc->sc_maxsync = (9 * 250) / sc->sc_freq;
    260 #endif
    261 
    262 	spc_init(sc);	/* Init chip and driver */
    263 
    264 	/*
    265 	 * Fill in the adapter.
    266 	 */
    267 	sc->sc_adapter.adapt_dev = &sc->sc_dev;
    268 	sc->sc_adapter.adapt_nchannels = 1;
    269 	sc->sc_adapter.adapt_openings = 7;
    270 	sc->sc_adapter.adapt_max_periph = 1;
    271 	sc->sc_adapter.adapt_minphys = minphys;
    272 	sc->sc_adapter.adapt_request = spc_scsipi_request;
    273 
    274 	sc->sc_channel.chan_adapter = &sc->sc_adapter;
    275 	sc->sc_channel.chan_bustype = &scsi_bustype;
    276 	sc->sc_channel.chan_channel = 0;
    277 	sc->sc_channel.chan_ntargets = 8;
    278 	sc->sc_channel.chan_nluns = 8;
    279 	sc->sc_channel.chan_id = sc->sc_initiator;
    280 
    281 	/*
    282 	 * ask the adapter what subunits are present
    283 	 */
    284 	config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
    285 }
    286 
    287 /*
    288  * Initialize MB89352 chip itself
    289  * The following conditions should hold:
    290  * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc
    291  * must be valid.
    292  */
    293 void
    294 spc_reset(sc)
    295 	struct spc_softc *sc;
    296 {
    297 	bus_space_tag_t iot = sc->sc_iot;
    298 	bus_space_handle_t ioh = sc->sc_ioh;
    299 
    300 	SPC_TRACE(("spc_reset  "));
    301 	/*
    302 	 * Disable interrupts then reset the FUJITSU chip.
    303 	 */
    304 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
    305 	bus_space_write_1(iot, ioh, SCMD, 0);
    306 	bus_space_write_1(iot, ioh, TMOD, 0);
    307 	bus_space_write_1(iot, ioh, PCTL, 0);
    308 	bus_space_write_1(iot, ioh, TEMP, 0);
    309 	bus_space_write_1(iot, ioh, TCH, 0);
    310 	bus_space_write_1(iot, ioh, TCM, 0);
    311 	bus_space_write_1(iot, ioh, TCL, 0);
    312 	bus_space_write_1(iot, ioh, INTS, 0);
    313 	bus_space_write_1(iot, ioh, SCTL,
    314 	    SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
    315 	bus_space_write_1(iot, ioh, BDID, sc->sc_initiator);
    316 	delay(400);
    317 	bus_space_write_1(iot, ioh, SCTL,
    318 	    bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
    319 }
    320 
    321 
    322 /*
    323  * Pull the SCSI RST line for 500us.
    324  */
    325 void
    326 spc_scsi_reset(sc)
    327 	struct spc_softc *sc;
    328 {
    329 	bus_space_tag_t iot = sc->sc_iot;
    330 	bus_space_handle_t ioh = sc->sc_ioh;
    331 
    332 	SPC_TRACE(("spc_scsi_reset  "));
    333 	bus_space_write_1(iot, ioh, SCMD,
    334 	    bus_space_read_1(iot, ioh, SCMD) | SCMD_RST);
    335 	delay(500);
    336 	bus_space_write_1(iot, ioh, SCMD,
    337 	    bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST);
    338 	delay(50);
    339 }
    340 
    341 /*
    342  * Initialize spc SCSI driver.
    343  */
    344 void
    345 spc_init(sc)
    346 	struct spc_softc *sc;
    347 {
    348 	struct spc_acb *acb;
    349 	int r;
    350 
    351 	SPC_TRACE(("spc_init  "));
    352 	spc_reset(sc);
    353 	spc_scsi_reset(sc);
    354 	spc_reset(sc);
    355 
    356 	if (sc->sc_state == SPC_INIT) {
    357 		/* First time through; initialize. */
    358 		TAILQ_INIT(&sc->ready_list);
    359 		TAILQ_INIT(&sc->nexus_list);
    360 		TAILQ_INIT(&sc->free_list);
    361 		sc->sc_nexus = NULL;
    362 		acb = sc->sc_acb;
    363 		memset(acb, 0, sizeof(sc->sc_acb));
    364 		for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
    365 			TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
    366 			acb++;
    367 		}
    368 		memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
    369 	} else {
    370 		/* Cancel any active commands. */
    371 		sc->sc_state = SPC_CLEANING;
    372 		if ((acb = sc->sc_nexus) != NULL) {
    373 			acb->xs->error = XS_DRIVER_STUFFUP;
    374 			callout_stop(&acb->xs->xs_callout);
    375 			spc_done(sc, acb);
    376 		}
    377 		while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) {
    378 			acb->xs->error = XS_DRIVER_STUFFUP;
    379 			callout_stop(&acb->xs->xs_callout);
    380 			spc_done(sc, acb);
    381 		}
    382 	}
    383 
    384 	sc->sc_prevphase = PH_INVALID;
    385 	for (r = 0; r < 8; r++) {
    386 		struct spc_tinfo *ti = &sc->sc_tinfo[r];
    387 
    388 		ti->flags = 0;
    389 #if SPC_USE_SYNCHRONOUS
    390 		ti->flags |= DO_SYNC;
    391 		ti->period = sc->sc_minsync;
    392 		ti->offset = SPC_SYNC_REQ_ACK_OFS;
    393 #else
    394 		ti->period = ti->offset = 0;
    395 #endif
    396 #if SPC_USE_WIDE
    397 		ti->flags |= DO_WIDE;
    398 		ti->width = SPC_MAX_WIDTH;
    399 #else
    400 		ti->width = 0;
    401 #endif
    402 	}
    403 
    404 	sc->sc_state = SPC_IDLE;
    405 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL,
    406 	    bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB);
    407 }
    408 
    409 void
    410 spc_free_acb(sc, acb, flags)
    411 	struct spc_softc *sc;
    412 	struct spc_acb *acb;
    413 	int flags;
    414 {
    415 	int s;
    416 
    417 	SPC_TRACE(("spc_free_acb  "));
    418 	s = splbio();
    419 
    420 	acb->flags = 0;
    421 	TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
    422 	splx(s);
    423 }
    424 
    425 struct spc_acb *
    426 spc_get_acb(sc)
    427 	struct spc_softc *sc;
    428 {
    429 	struct spc_acb *acb;
    430 	int s;
    431 
    432 	SPC_TRACE(("spc_get_acb  "));
    433 	s = splbio();
    434 	acb = TAILQ_FIRST(&sc->free_list);
    435 	if (acb != NULL) {
    436 		TAILQ_REMOVE(&sc->free_list, acb, chain);
    437 		acb->flags |= ACB_ALLOC;
    438 	}
    439 	splx(s);
    440 	return acb;
    441 }
    442 
    443 /*
    444  * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
    445  */
    446 
    447 /*
    448  * Expected sequence:
    449  * 1) Command inserted into ready list
    450  * 2) Command selected for execution
    451  * 3) Command won arbitration and has selected target device
    452  * 4) Send message out (identify message, eventually also sync.negotiations)
    453  * 5) Send command
    454  * 5a) Receive disconnect message, disconnect.
    455  * 5b) Reselected by target
    456  * 5c) Receive identify message from target.
    457  * 6) Send or receive data
    458  * 7) Receive status
    459  * 8) Receive message (command complete etc.)
    460  */
    461 
    462 /*
    463  * Start a SCSI-command
    464  * This function is called by the higher level SCSI-driver to queue/run
    465  * SCSI-commands.
    466  */
    467 void
    468 spc_scsipi_request(chan, req, arg)
    469 	struct scsipi_channel *chan;
    470 	scsipi_adapter_req_t req;
    471 	void *arg;
    472 {
    473 	struct scsipi_xfer *xs;
    474 	struct scsipi_periph *periph;
    475 	struct spc_softc *sc = (void *)chan->chan_adapter->adapt_dev;
    476 	struct spc_acb *acb;
    477 	int s, flags;
    478 
    479 	switch (req) {
    480 	case ADAPTER_REQ_RUN_XFER:
    481 		xs = arg;
    482 		periph = xs->xs_periph;
    483 		SPC_TRACE(("spc_scsipi_request  "));
    484 		SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
    485 		    periph->periph_target));
    486 
    487 		flags = xs->xs_control;
    488 		acb = spc_get_acb(sc);
    489 #ifdef DIAGNOSTIC
    490 		/*
    491 		 * This should nerver happen as we track the resources
    492 		 * in the mid-layer.
    493 		 */
    494 		if (acb == NULL) {
    495 			scsipi_printaddr(periph);
    496 			printf("unable to allocate acb\n");
    497 			panic("spc_scsipi_request");
    498 		}
    499 #endif
    500 
    501 		/* Initialize acb */
    502 		acb->xs = xs;
    503 		acb->timeout = xs->timeout;
    504 
    505 		if (xs->xs_control & XS_CTL_RESET) {
    506 			acb->flags |= ACB_RESET;
    507 			acb->scsipi_cmd_length = 0;
    508 			acb->data_length = 0;
    509 		} else {
    510 			memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen);
    511 			acb->scsipi_cmd_length = xs->cmdlen;
    512 			acb->data_addr = xs->data;
    513 			acb->data_length = xs->datalen;
    514 		}
    515 		acb->target_stat = 0;
    516 
    517 		s = splbio();
    518 
    519 		TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
    520 		/*
    521 		 * Start scheduling unless a queue process is in progress.
    522 		 */
    523 		if (sc->sc_state == SPC_IDLE)
    524 			spc_sched(sc);
    525 		/*
    526 		 * After successful sending, check if we should return just now.
    527 		 * If so, return SUCCESSFULLY_QUEUED.
    528 		 */
    529 
    530 		splx(s);
    531 
    532 		if ((flags & XS_CTL_POLL) == 0)
    533 			return;
    534 
    535 		/* Not allowed to use interrupts, use polling instead */
    536 		s = splbio();
    537 		if (spc_poll(sc, xs, acb->timeout)) {
    538 			spc_timeout(acb);
    539 			if (spc_poll(sc, xs, acb->timeout))
    540 				spc_timeout(acb);
    541 		}
    542 		splx(s);
    543 		return;
    544 	case ADAPTER_REQ_GROW_RESOURCES:
    545 		/* XXX Not supported. */
    546 		return;
    547 	case ADAPTER_REQ_SET_XFER_MODE:
    548 		/* XXX Not supported. */
    549 		return;
    550 	}
    551 }
    552 
    553 /*
    554  * Used when interrupt driven I/O isn't allowed, e.g. during boot.
    555  */
    556 int
    557 spc_poll(sc, xs, count)
    558 	struct spc_softc *sc;
    559 	struct scsipi_xfer *xs;
    560 	int count;
    561 {
    562 	bus_space_tag_t iot = sc->sc_iot;
    563 	bus_space_handle_t ioh = sc->sc_ioh;
    564 
    565 	SPC_TRACE(("spc_poll  "));
    566 	while (count) {
    567 		/*
    568 		 * If we had interrupts enabled, would we
    569 		 * have got an interrupt?
    570 		 */
    571 		if (bus_space_read_1(iot, ioh, INTS) != 0)
    572 			spc_intr(sc);
    573 		if ((xs->xs_status & XS_STS_DONE) != 0)
    574 			return 0;
    575 		delay(1000);
    576 		count--;
    577 	}
    578 	return 1;
    579 }
    580 
    581 /*
    582  * LOW LEVEL SCSI UTILITIES
    583  */
    584 
    585 integrate void
    586 spc_sched_msgout(sc, m)
    587 	struct spc_softc *sc;
    588 	u_char m;
    589 {
    590 	bus_space_tag_t iot = sc->sc_iot;
    591 	bus_space_handle_t ioh = sc->sc_ioh;
    592 
    593 	SPC_TRACE(("spc_sched_msgout  "));
    594 	if (sc->sc_msgpriq == 0)
    595 		bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
    596 	sc->sc_msgpriq |= m;
    597 }
    598 
    599 /*
    600  * Set synchronous transfer offset and period.
    601  */
    602 integrate void
    603 spc_setsync(sc, ti)
    604 	struct spc_softc *sc;
    605 	struct spc_tinfo *ti;
    606 {
    607 #if SPC_USE_SYNCHRONOUS
    608 	bus_space_tag_t iot = sc->sc_iot;
    609 	bus_space_handle_t ioh = sc->sc_ioh;
    610 
    611 	SPC_TRACE(("spc_setsync  "));
    612 	if (ti->offset != 0)
    613 		bus_space_write_1(iot, ioh, TMOD,
    614 		    ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
    615 	else
    616 		bus_space_write_1(iot, ioh, TMOD, 0);
    617 #endif
    618 }
    619 
    620 /*
    621  * Start a selection.  This is used by spc_sched() to select an idle target.
    622  */
    623 void
    624 spc_select(sc, acb)
    625 	struct spc_softc *sc;
    626 	struct spc_acb *acb;
    627 {
    628 	struct scsipi_periph *periph = acb->xs->xs_periph;
    629 	int target = periph->periph_target;
    630 	struct spc_tinfo *ti = &sc->sc_tinfo[target];
    631 	bus_space_tag_t iot = sc->sc_iot;
    632 	bus_space_handle_t ioh = sc->sc_ioh;
    633 
    634 	SPC_TRACE(("spc_select  "));
    635 	spc_setsync(sc, ti);
    636 
    637 #if 0
    638 	bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
    639 #endif
    640 #ifdef x68k			/* XXX? */
    641 	do {
    642 		asm ("nop");
    643 	} while (bus_space_read_1(iot, ioh, SSTS) &
    644 	    (SSTS_ACTIVE|SSTS_TARGET|SSTS_BUSY));
    645 #endif
    646 
    647 	bus_space_write_1(iot, ioh, PCTL, 0);
    648 	bus_space_write_1(iot, ioh, TEMP,
    649 	    (1 << sc->sc_initiator) | (1 << target));
    650 	/*
    651 	 * Setup BSY timeout (selection timeout).
    652 	 * 250ms according to the SCSI specification.
    653 	 * T = (X * 256 + 15) * Tclf * 2  (Tclf = 200ns on x68k)
    654 	 * To setup 256ms timeout,
    655 	 * 128000ns/200ns = X * 256 + 15
    656 	 * 640 - 15 = X * 256
    657 	 * X = 625 / 256
    658 	 * X = 2 + 113 / 256
    659 	 *  ==> tch = 2, tcm = 113 (correct?)
    660 	 */
    661 	bus_space_write_1(iot, ioh, TCH, 2);
    662 	bus_space_write_1(iot, ioh, TCM, 113);
    663 	/* Time to the information transfer phase start. */
    664 	bus_space_write_1(iot, ioh, TCL, 3);
    665 	bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT);
    666 
    667 	sc->sc_state = SPC_SELECTING;
    668 }
    669 
    670 int
    671 spc_reselect(sc, message)
    672 	struct spc_softc *sc;
    673 	int message;
    674 {
    675 	u_char selid, target, lun;
    676 	struct spc_acb *acb;
    677 	struct scsipi_periph *periph;
    678 	struct spc_tinfo *ti;
    679 
    680 	SPC_TRACE(("spc_reselect  "));
    681 	/*
    682 	 * The SCSI chip made a snapshot of the data bus while the reselection
    683 	 * was being negotiated.  This enables us to determine which target did
    684 	 * the reselect.
    685 	 */
    686 	selid = sc->sc_selid & ~(1 << sc->sc_initiator);
    687 	if (selid & (selid - 1)) {
    688 		printf("%s: reselect with invalid selid %02x; "
    689 		    "sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid);
    690 		SPC_BREAK();
    691 		goto reset;
    692 	}
    693 
    694 	/*
    695 	 * Search wait queue for disconnected cmd
    696 	 * The list should be short, so I haven't bothered with
    697 	 * any more sophisticated structures than a simple
    698 	 * singly linked list.
    699 	 */
    700 	target = ffs(selid) - 1;
    701 	lun = message & 0x07;
    702 	TAILQ_FOREACH(acb, &sc->nexus_list, chain) {
    703 		periph = acb->xs->xs_periph;
    704 		if (periph->periph_target == target &&
    705 		    periph->periph_lun == lun)
    706 			break;
    707 	}
    708 	if (acb == NULL) {
    709 		printf("%s: reselect from target %d lun %d with no nexus; "
    710 		    "sending ABORT\n", sc->sc_dev.dv_xname, target, lun);
    711 		SPC_BREAK();
    712 		goto abort;
    713 	}
    714 
    715 	/* Make this nexus active again. */
    716 	TAILQ_REMOVE(&sc->nexus_list, acb, chain);
    717 	sc->sc_state = SPC_CONNECTED;
    718 	sc->sc_nexus = acb;
    719 	ti = &sc->sc_tinfo[target];
    720 	ti->lubusy |= (1 << lun);
    721 	spc_setsync(sc, ti);
    722 
    723 	if (acb->flags & ACB_RESET)
    724 		spc_sched_msgout(sc, SEND_DEV_RESET);
    725 	else if (acb->flags & ACB_ABORT)
    726 		spc_sched_msgout(sc, SEND_ABORT);
    727 
    728 	/* Do an implicit RESTORE POINTERS. */
    729 	sc->sc_dp = acb->data_addr;
    730 	sc->sc_dleft = acb->data_length;
    731 	sc->sc_cp = (u_char *)&acb->scsipi_cmd;
    732 	sc->sc_cleft = acb->scsipi_cmd_length;
    733 
    734 	return (0);
    735 
    736 reset:
    737 	spc_sched_msgout(sc, SEND_DEV_RESET);
    738 	return (1);
    739 
    740 abort:
    741 	spc_sched_msgout(sc, SEND_ABORT);
    742 	return (1);
    743 }
    744 
    745 /*
    746  * Schedule a SCSI operation.  This has now been pulled out of the interrupt
    747  * handler so that we may call it from spc_scsi_cmd and spc_done.  This may
    748  * save us an unecessary interrupt just to get things going.  Should only be
    749  * called when state == SPC_IDLE and at bio pl.
    750  */
    751 void
    752 spc_sched(sc)
    753 	struct spc_softc *sc;
    754 {
    755 	struct spc_acb *acb;
    756 	struct scsipi_periph *periph;
    757 	struct spc_tinfo *ti;
    758 
    759 	/* missing the hw, just return and wait for our hw */
    760 	if (sc->sc_flags & SPC_INACTIVE)
    761 		return;
    762 	SPC_TRACE(("spc_sched  "));
    763 	/*
    764 	 * Find first acb in ready queue that is for a target/lunit pair that
    765 	 * is not busy.
    766 	 */
    767 	TAILQ_FOREACH(acb, &sc->ready_list, chain) {
    768 		periph = acb->xs->xs_periph;
    769 		ti = &sc->sc_tinfo[periph->periph_target];
    770 		if ((ti->lubusy & (1 << periph->periph_lun)) == 0) {
    771 			SPC_MISC(("selecting %d:%d  ",
    772 			    periph->periph_target, periph->periph_lun));
    773 			TAILQ_REMOVE(&sc->ready_list, acb, chain);
    774 			sc->sc_nexus = acb;
    775 			spc_select(sc, acb);
    776 			return;
    777 		} else
    778 			SPC_MISC(("%d:%d busy\n",
    779 			    periph->periph_target, periph->periph_lun));
    780 	}
    781 	SPC_MISC(("idle  "));
    782 	/* Nothing to start; just enable reselections and wait. */
    783 }
    784 
    785 /*
    786  * POST PROCESSING OF SCSI_CMD (usually current)
    787  */
    788 void
    789 spc_done(sc, acb)
    790 	struct spc_softc *sc;
    791 	struct spc_acb *acb;
    792 {
    793 	struct scsipi_xfer *xs = acb->xs;
    794 	struct scsipi_periph *periph = xs->xs_periph;
    795 	struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
    796 
    797 	SPC_TRACE(("spc_done  "));
    798 
    799 	if (xs->error == XS_NOERROR) {
    800 		if (acb->flags & ACB_ABORT) {
    801 			xs->error = XS_DRIVER_STUFFUP;
    802 		} else {
    803 			switch (acb->target_stat) {
    804 			case SCSI_CHECK:
    805 				/* First, save the return values */
    806 				xs->resid = acb->data_length;
    807 				/* FALLTHROUGH */
    808 			case SCSI_BUSY:
    809 				xs->status = acb->target_stat;
    810 				xs->error = XS_BUSY;
    811 				break;
    812 			case SCSI_OK:
    813 				xs->resid = acb->data_length;
    814 				break;
    815 			default:
    816 				xs->error = XS_DRIVER_STUFFUP;
    817 #if SPC_DEBUG
    818 				printf("%s: spc_done: bad stat 0x%x\n",
    819 				    sc->sc_dev.dv_xname, acb->target_stat);
    820 #endif
    821 				break;
    822 			}
    823 		}
    824 	}
    825 
    826 #if SPC_DEBUG
    827 	if ((spc_debug & SPC_SHOWMISC) != 0) {
    828 		if (xs->resid != 0)
    829 			printf("resid=%d ", xs->resid);
    830 		else
    831 			printf("error=%d\n", xs->error);
    832 	}
    833 #endif
    834 
    835 	/*
    836 	 * Remove the ACB from whatever queue it happens to be on.
    837 	 */
    838 	if (acb->flags & ACB_NEXUS)
    839 		ti->lubusy &= ~(1 << periph->periph_lun);
    840 	if (acb == sc->sc_nexus) {
    841 		sc->sc_nexus = NULL;
    842 		sc->sc_state = SPC_IDLE;
    843 		spc_sched(sc);
    844 	} else
    845 		spc_dequeue(sc, acb);
    846 
    847 	spc_free_acb(sc, acb, xs->xs_control);
    848 	ti->cmds++;
    849 	scsipi_done(xs);
    850 }
    851 
    852 void
    853 spc_dequeue(sc, acb)
    854 	struct spc_softc *sc;
    855 	struct spc_acb *acb;
    856 {
    857 
    858 	SPC_TRACE(("spc_dequeue  "));
    859 	if (acb->flags & ACB_NEXUS)
    860 		TAILQ_REMOVE(&sc->nexus_list, acb, chain);
    861 	else
    862 		TAILQ_REMOVE(&sc->ready_list, acb, chain);
    863 }
    864 
    865 /*
    866  * INTERRUPT/PROTOCOL ENGINE
    867  */
    868 
    869 /*
    870  * Precondition:
    871  * The SCSI bus is already in the MSGI phase and there is a message byte
    872  * on the bus, along with an asserted REQ signal.
    873  */
    874 void
    875 spc_msgin(sc)
    876 	struct spc_softc *sc;
    877 {
    878 	bus_space_tag_t iot = sc->sc_iot;
    879 	bus_space_handle_t ioh = sc->sc_ioh;
    880 	int n;
    881 
    882 	SPC_TRACE(("spc_msgin  "));
    883 
    884 	if (sc->sc_prevphase == PH_MSGIN) {
    885 		/* This is a continuation of the previous message. */
    886 		n = sc->sc_imp - sc->sc_imess;
    887 		goto nextbyte;
    888 	}
    889 
    890 	/* This is a new MESSAGE IN phase.  Clean up our state. */
    891 	sc->sc_flags &= ~SPC_DROP_MSGIN;
    892 
    893 nextmsg:
    894 	n = 0;
    895 	sc->sc_imp = &sc->sc_imess[n];
    896 
    897 nextbyte:
    898 	/*
    899 	 * Read a whole message, but don't ack the last byte.  If we reject the
    900 	 * message, we have to assert ATN during the message transfer phase
    901 	 * itself.
    902 	 */
    903 	for (;;) {
    904 		/* If parity error, just dump everything on the floor. */
    905 		if ((bus_space_read_1(iot, ioh, SERR) &
    906 		     (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
    907 			sc->sc_flags |= SPC_DROP_MSGIN;
    908 			spc_sched_msgout(sc, SEND_PARITY_ERROR);
    909 		}
    910 
    911 		if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0)
    912 			bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
    913 
    914 		while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
    915 			/* XXX needs timeout */
    916 			if ((bus_space_read_1(iot, ioh, PSNS) & PH_MASK)
    917 			     != PH_MSGIN ||
    918 			    (bus_space_read_1(iot, ioh, SSTS) & SSTS_INITIATOR)
    919 			     == 0)
    920 				goto out;
    921 		}
    922 
    923 		bus_space_write_1(iot, ioh, PCTL, PH_MSGIN);
    924 		bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK);
    925 		while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
    926 			continue;	/* XXX needs timeout */
    927 
    928 		/* Gather incoming message bytes if needed. */
    929 		if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) {
    930 			if (n >= SPC_MAX_MSG_LEN) {
    931 				(void) bus_space_read_1(iot, ioh, TEMP);
    932 				sc->sc_flags |= SPC_DROP_MSGIN;
    933 				spc_sched_msgout(sc, SEND_REJECT);
    934 			} else {
    935 				*sc->sc_imp++ =
    936 				    bus_space_read_1(iot, ioh, TEMP);
    937 				n++;
    938 				/*
    939 				 * This testing is suboptimal, but most
    940 				 * messages will be of the one byte variety, so
    941 				 * it should not affect performance
    942 				 * significantly.
    943 				 */
    944 				if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0]))
    945 					break;
    946 				if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0]))
    947 					break;
    948 				if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) &&
    949 				    n == sc->sc_imess[1] + 2)
    950 					break;
    951 			}
    952 		} else
    953 			(void) bus_space_read_1(iot, ioh, TEMP);
    954 
    955 		/*
    956 		 * If we reach this spot we're either:
    957 		 * a) in the middle of a multi-byte message, or
    958 		 * b) dropping bytes.
    959 		 */
    960 
    961 		/* Ack the last byte read. */
    962 		bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
    963 	}
    964 
    965 	SPC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
    966 
    967 	/* We now have a complete message.  Parse it. */
    968 	switch (sc->sc_state) {
    969 		struct spc_acb *acb;
    970 		struct scsipi_periph *periph;
    971 		struct spc_tinfo *ti;
    972 
    973 	case SPC_CONNECTED:
    974 		SPC_ASSERT(sc->sc_nexus != NULL);
    975 		acb = sc->sc_nexus;
    976 		ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target];
    977 
    978 		switch (sc->sc_imess[0]) {
    979 		case MSG_CMDCOMPLETE:
    980 			if (sc->sc_dleft < 0) {
    981 				periph = acb->xs->xs_periph;
    982 				printf("%s: %d extra bytes from %d:%d\n",
    983 				    sc->sc_dev.dv_xname, -sc->sc_dleft,
    984 				    periph->periph_target, periph->periph_lun);
    985 				sc->sc_dleft = 0;
    986 			}
    987 			acb->xs->resid = acb->data_length = sc->sc_dleft;
    988 			sc->sc_state = SPC_CMDCOMPLETE;
    989 			break;
    990 
    991 		case MSG_PARITY_ERROR:
    992 			/* Resend the last message. */
    993 			spc_sched_msgout(sc, sc->sc_lastmsg);
    994 			break;
    995 
    996 		case MSG_MESSAGE_REJECT:
    997 			SPC_MISC(("message rejected %02x  ", sc->sc_lastmsg));
    998 			switch (sc->sc_lastmsg) {
    999 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
   1000 			case SEND_IDENTIFY:
   1001 				ti->flags &= ~(DO_SYNC | DO_WIDE);
   1002 				ti->period = ti->offset = 0;
   1003 				spc_setsync(sc, ti);
   1004 				ti->width = 0;
   1005 				break;
   1006 #endif
   1007 #if SPC_USE_SYNCHRONOUS
   1008 			case SEND_SDTR:
   1009 				ti->flags &= ~DO_SYNC;
   1010 				ti->period = ti->offset = 0;
   1011 				spc_setsync(sc, ti);
   1012 				break;
   1013 #endif
   1014 #if SPC_USE_WIDE
   1015 			case SEND_WDTR:
   1016 				ti->flags &= ~DO_WIDE;
   1017 				ti->width = 0;
   1018 				break;
   1019 #endif
   1020 			case SEND_INIT_DET_ERR:
   1021 				spc_sched_msgout(sc, SEND_ABORT);
   1022 				break;
   1023 			}
   1024 			break;
   1025 
   1026 		case MSG_NOOP:
   1027 			break;
   1028 
   1029 		case MSG_DISCONNECT:
   1030 			ti->dconns++;
   1031 			sc->sc_state = SPC_DISCONNECT;
   1032 			break;
   1033 
   1034 		case MSG_SAVEDATAPOINTER:
   1035 			acb->data_addr = sc->sc_dp;
   1036 			acb->data_length = sc->sc_dleft;
   1037 			break;
   1038 
   1039 		case MSG_RESTOREPOINTERS:
   1040 			sc->sc_dp = acb->data_addr;
   1041 			sc->sc_dleft = acb->data_length;
   1042 			sc->sc_cp = (u_char *)&acb->scsipi_cmd;
   1043 			sc->sc_cleft = acb->scsipi_cmd_length;
   1044 			break;
   1045 
   1046 		case MSG_EXTENDED:
   1047 			switch (sc->sc_imess[2]) {
   1048 #if SPC_USE_SYNCHRONOUS
   1049 			case MSG_EXT_SDTR:
   1050 				if (sc->sc_imess[1] != 3)
   1051 					goto reject;
   1052 				ti->period = sc->sc_imess[3];
   1053 				ti->offset = sc->sc_imess[4];
   1054 				ti->flags &= ~DO_SYNC;
   1055 				if (ti->offset == 0) {
   1056 				} else if (ti->period < sc->sc_minsync ||
   1057 				    ti->period > sc->sc_maxsync ||
   1058 				    ti->offset > 8) {
   1059 					ti->period = ti->offset = 0;
   1060 					spc_sched_msgout(sc, SEND_SDTR);
   1061 				} else {
   1062 					scsipi_printaddr(acb->xs->xs_periph);
   1063 					printf("sync, offset %d, "
   1064 					    "period %dnsec\n",
   1065 					    ti->offset, ti->period * 4);
   1066 				}
   1067 				spc_setsync(sc, ti);
   1068 				break;
   1069 #endif
   1070 
   1071 #if SPC_USE_WIDE
   1072 			case MSG_EXT_WDTR:
   1073 				if (sc->sc_imess[1] != 2)
   1074 					goto reject;
   1075 				ti->width = sc->sc_imess[3];
   1076 				ti->flags &= ~DO_WIDE;
   1077 				if (ti->width == 0) {
   1078 				} else if (ti->width > SPC_MAX_WIDTH) {
   1079 					ti->width = 0;
   1080 					spc_sched_msgout(sc, SEND_WDTR);
   1081 				} else {
   1082 					scsipi_printaddr(acb->xs->xs_periph);
   1083 					printf("wide, width %d\n",
   1084 					    1 << (3 + ti->width));
   1085 				}
   1086 				break;
   1087 #endif
   1088 
   1089 			default:
   1090 				printf("%s: unrecognized MESSAGE EXTENDED; "
   1091 				    "sending REJECT\n", sc->sc_dev.dv_xname);
   1092 				SPC_BREAK();
   1093 				goto reject;
   1094 			}
   1095 			break;
   1096 
   1097 		default:
   1098 			printf("%s: unrecognized MESSAGE; sending REJECT\n",
   1099 			    sc->sc_dev.dv_xname);
   1100 			SPC_BREAK();
   1101 		reject:
   1102 			spc_sched_msgout(sc, SEND_REJECT);
   1103 			break;
   1104 		}
   1105 		break;
   1106 
   1107 	case SPC_RESELECTED:
   1108 		if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
   1109 			printf("%s: reselect without IDENTIFY; "
   1110 			    "sending DEVICE RESET\n", sc->sc_dev.dv_xname);
   1111 			SPC_BREAK();
   1112 			goto reset;
   1113 		}
   1114 
   1115 		(void) spc_reselect(sc, sc->sc_imess[0]);
   1116 		break;
   1117 
   1118 	default:
   1119 		printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
   1120 		    sc->sc_dev.dv_xname);
   1121 		SPC_BREAK();
   1122 	reset:
   1123 		spc_sched_msgout(sc, SEND_DEV_RESET);
   1124 		break;
   1125 
   1126 #ifdef notdef
   1127 	abort:
   1128 		spc_sched_msgout(sc, SEND_ABORT);
   1129 		break;
   1130 #endif
   1131 	}
   1132 
   1133 	/* Ack the last message byte. */
   1134 	bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
   1135 
   1136 	/* Go get the next message, if any. */
   1137 	goto nextmsg;
   1138 
   1139 out:
   1140 	bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
   1141 	SPC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
   1142 
   1143 	while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_ACTIVE)
   1144 	    == SSTS_INITIATOR)
   1145 		continue;	/* XXX needs timeout */
   1146 }
   1147 
   1148 /*
   1149  * Send the highest priority, scheduled message.
   1150  */
   1151 void
   1152 spc_msgout(sc)
   1153 	struct spc_softc *sc;
   1154 {
   1155 	bus_space_tag_t iot = sc->sc_iot;
   1156 	bus_space_handle_t ioh = sc->sc_ioh;
   1157 #if SPC_USE_SYNCHRONOUS
   1158 	struct spc_tinfo *ti;
   1159 #endif
   1160 	int n;
   1161 
   1162 	SPC_TRACE(("spc_msgout  "));
   1163 
   1164 	if (sc->sc_prevphase == PH_MSGOUT) {
   1165 		if (sc->sc_omp == sc->sc_omess) {
   1166 			/*
   1167 			 * This is a retransmission.
   1168 			 *
   1169 			 * We get here if the target stayed in MESSAGE OUT
   1170 			 * phase.  Section 5.1.9.2 of the SCSI 2 spec indicates
   1171 			 * that all of the previously transmitted messages must
   1172 			 * be sent again, in the same order.  Therefore, we
   1173 			 * requeue all the previously transmitted messages, and
   1174 			 * start again from the top.  Our simple priority
   1175 			 * scheme keeps the messages in the right order.
   1176 			 */
   1177 			SPC_MISC(("retransmitting  "));
   1178 			sc->sc_msgpriq |= sc->sc_msgoutq;
   1179 			/*
   1180 			 * Set ATN.  If we're just sending a trivial 1-byte
   1181 			 * message, we'll clear ATN later on anyway.
   1182 			 */
   1183 			bus_space_write_1(iot, ioh, SCMD,
   1184 			    SCMD_SET_ATN);	/* XXX? */
   1185 		} else {
   1186 			/* This is a continuation of the previous message. */
   1187 			n = sc->sc_omp - sc->sc_omess;
   1188 			goto nextbyte;
   1189 		}
   1190 	}
   1191 
   1192 	/* No messages transmitted so far. */
   1193 	sc->sc_msgoutq = 0;
   1194 	sc->sc_lastmsg = 0;
   1195 
   1196 nextmsg:
   1197 	/* Pick up highest priority message. */
   1198 	sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
   1199 	sc->sc_msgpriq &= ~sc->sc_currmsg;
   1200 	sc->sc_msgoutq |= sc->sc_currmsg;
   1201 
   1202 	/* Build the outgoing message data. */
   1203 	switch (sc->sc_currmsg) {
   1204 	case SEND_IDENTIFY:
   1205 		SPC_ASSERT(sc->sc_nexus != NULL);
   1206 		sc->sc_omess[0] =
   1207 		    MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1);
   1208 		n = 1;
   1209 		break;
   1210 
   1211 #if SPC_USE_SYNCHRONOUS
   1212 	case SEND_SDTR:
   1213 		SPC_ASSERT(sc->sc_nexus != NULL);
   1214 		ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
   1215 		sc->sc_omess[4] = MSG_EXTENDED;
   1216 		sc->sc_omess[3] = MSG_EXT_SDTR_LEN;
   1217 		sc->sc_omess[2] = MSG_EXT_SDTR;
   1218 		sc->sc_omess[1] = ti->period >> 2;
   1219 		sc->sc_omess[0] = ti->offset;
   1220 		n = 5;
   1221 		break;
   1222 #endif
   1223 
   1224 #if SPC_USE_WIDE
   1225 	case SEND_WDTR:
   1226 		SPC_ASSERT(sc->sc_nexus != NULL);
   1227 		ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
   1228 		sc->sc_omess[3] = MSG_EXTENDED;
   1229 		sc->sc_omess[2] = MSG_EXT_WDTR_LEN;
   1230 		sc->sc_omess[1] = MSG_EXT_WDTR;
   1231 		sc->sc_omess[0] = ti->width;
   1232 		n = 4;
   1233 		break;
   1234 #endif
   1235 
   1236 	case SEND_DEV_RESET:
   1237 		sc->sc_flags |= SPC_ABORTING;
   1238 		sc->sc_omess[0] = MSG_BUS_DEV_RESET;
   1239 		n = 1;
   1240 		break;
   1241 
   1242 	case SEND_REJECT:
   1243 		sc->sc_omess[0] = MSG_MESSAGE_REJECT;
   1244 		n = 1;
   1245 		break;
   1246 
   1247 	case SEND_PARITY_ERROR:
   1248 		sc->sc_omess[0] = MSG_PARITY_ERROR;
   1249 		n = 1;
   1250 		break;
   1251 
   1252 	case SEND_INIT_DET_ERR:
   1253 		sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
   1254 		n = 1;
   1255 		break;
   1256 
   1257 	case SEND_ABORT:
   1258 		sc->sc_flags |= SPC_ABORTING;
   1259 		sc->sc_omess[0] = MSG_ABORT;
   1260 		n = 1;
   1261 		break;
   1262 
   1263 	default:
   1264 		printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
   1265 		    sc->sc_dev.dv_xname);
   1266 		SPC_BREAK();
   1267 		sc->sc_omess[0] = MSG_NOOP;
   1268 		n = 1;
   1269 		break;
   1270 	}
   1271 	sc->sc_omp = &sc->sc_omess[n];
   1272 
   1273 nextbyte:
   1274 	/* Send message bytes. */
   1275 	/* send TRANSFER command. */
   1276 	bus_space_write_1(iot, ioh, TCH, n >> 16);
   1277 	bus_space_write_1(iot, ioh, TCM, n >> 8);
   1278 	bus_space_write_1(iot, ioh, TCL, n);
   1279 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
   1280 #ifdef x68k
   1281 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
   1282 #else
   1283 	bus_space_write_1(iot, ioh, SCMD,
   1284 	    SCMD_XFR | SCMD_PROG_XFR);
   1285 #endif
   1286 	for (;;) {
   1287 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
   1288 			break;
   1289 		if (bus_space_read_1(iot, ioh, INTS) != 0)
   1290 			goto out;
   1291 	}
   1292 	for (;;) {
   1293 #if 0
   1294 		for (;;) {
   1295 			if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
   1296 				break;
   1297 			/* Wait for REQINIT.  XXX Need timeout. */
   1298 		}
   1299 #endif
   1300 		if (bus_space_read_1(iot, ioh, INTS) != 0) {
   1301 			/*
   1302 			 * Target left MESSAGE OUT, possibly to reject
   1303 			 * our message.
   1304 			 *
   1305 			 * If this is the last message being sent, then we
   1306 			 * deassert ATN, since either the target is going to
   1307 			 * ignore this message, or it's going to ask for a
   1308 			 * retransmission via MESSAGE PARITY ERROR (in which
   1309 			 * case we reassert ATN anyway).
   1310 			 */
   1311 #if 0
   1312 			if (sc->sc_msgpriq == 0)
   1313 				bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
   1314 #endif
   1315 			goto out;
   1316 		}
   1317 
   1318 #if 0
   1319 		/* Clear ATN before last byte if this is the last message. */
   1320 		if (n == 1 && sc->sc_msgpriq == 0)
   1321 			bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
   1322 #endif
   1323 
   1324 		while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0)
   1325 			;
   1326 		/* Send message byte. */
   1327 		bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp);
   1328 		--n;
   1329 		/* Keep track of the last message we've sent any bytes of. */
   1330 		sc->sc_lastmsg = sc->sc_currmsg;
   1331 #if 0
   1332 		/* Wait for ACK to be negated.  XXX Need timeout. */
   1333 		while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
   1334 			;
   1335 #endif
   1336 
   1337 		if (n == 0)
   1338 			break;
   1339 	}
   1340 
   1341 	/* We get here only if the entire message has been transmitted. */
   1342 	if (sc->sc_msgpriq != 0) {
   1343 		/* There are more outgoing messages. */
   1344 		goto nextmsg;
   1345 	}
   1346 
   1347 	/*
   1348 	 * The last message has been transmitted.  We need to remember the last
   1349 	 * message transmitted (in case the target switches to MESSAGE IN phase
   1350 	 * and sends a MESSAGE REJECT), and the list of messages transmitted
   1351 	 * this time around (in case the target stays in MESSAGE OUT phase to
   1352 	 * request a retransmit).
   1353 	 */
   1354 
   1355 out:
   1356 	/* Disable REQ/ACK protocol. */
   1357 	return;
   1358 }
   1359 
   1360 /*
   1361  * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc
   1362  * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
   1363  * and ACK deasserted (i.e. waiting for a data byte)
   1364  *
   1365  * This new revision has been optimized (I tried) to make the common case fast,
   1366  * and the rarer cases (as a result) somewhat more comlex
   1367  */
   1368 int
   1369 spc_dataout_pio(sc, p, n)
   1370 	struct spc_softc *sc;
   1371 	u_char *p;
   1372 	int n;
   1373 {
   1374 	bus_space_tag_t iot = sc->sc_iot;
   1375 	bus_space_handle_t ioh = sc->sc_ioh;
   1376 	u_char intstat = 0;
   1377 	int out = 0;
   1378 #define DOUTAMOUNT 8		/* Full FIFO */
   1379 
   1380 	SPC_TRACE(("spc_dataout_pio  "));
   1381 	/* send TRANSFER command. */
   1382 	bus_space_write_1(iot, ioh, TCH, n >> 16);
   1383 	bus_space_write_1(iot, ioh, TCM, n >> 8);
   1384 	bus_space_write_1(iot, ioh, TCL, n);
   1385 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
   1386 #ifdef x68k
   1387 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
   1388 #else
   1389 	bus_space_write_1(iot, ioh, SCMD,
   1390 	    SCMD_XFR | SCMD_PROG_XFR);	/* XXX */
   1391 #endif
   1392 	for (;;) {
   1393 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
   1394 			break;
   1395 		if (bus_space_read_1(iot, ioh, INTS) != 0)
   1396 			break;
   1397 	}
   1398 
   1399 	/*
   1400 	 * I have tried to make the main loop as tight as possible.  This
   1401 	 * means that some of the code following the loop is a bit more
   1402 	 * complex than otherwise.
   1403 	 */
   1404 	while (n > 0) {
   1405 		int xfer;
   1406 
   1407 		for (;;) {
   1408 			intstat = bus_space_read_1(iot, ioh, INTS);
   1409 			/* Wait till buffer is empty. */
   1410 			if ((bus_space_read_1(iot, ioh, SSTS) &
   1411 			    SSTS_DREG_EMPTY) != 0)
   1412 				break;
   1413 			/* Break on interrupt. */
   1414 			if (intstat != 0)
   1415 				goto phasechange;
   1416 		}
   1417 
   1418 		xfer = min(DOUTAMOUNT, n);
   1419 
   1420 		SPC_MISC(("%d> ", xfer));
   1421 
   1422 		n -= xfer;
   1423 		out += xfer;
   1424 
   1425 		bus_space_write_multi_1(iot, ioh, DREG, p, xfer);
   1426 		p += xfer;
   1427 	}
   1428 
   1429 	if (out == 0) {
   1430 		for (;;) {
   1431 			if (bus_space_read_1(iot, ioh, INTS) != 0)
   1432 				break;
   1433 		}
   1434 		SPC_MISC(("extra data  "));
   1435 	} else {
   1436 		/* See the bytes off chip */
   1437 		for (;;) {
   1438 			/* Wait till buffer is empty. */
   1439 			if ((bus_space_read_1(iot, ioh, SSTS) &
   1440 			    SSTS_DREG_EMPTY) != 0)
   1441 				break;
   1442 			intstat = bus_space_read_1(iot, ioh, INTS);
   1443 			/* Break on interrupt. */
   1444 			if (intstat != 0)
   1445 				goto phasechange;
   1446 		}
   1447 	}
   1448 
   1449 phasechange:
   1450 	/* Stop the FIFO data path. */
   1451 
   1452 	if (intstat != 0) {
   1453 		/* Some sort of phase change. */
   1454 		int amount;
   1455 
   1456 		amount = (bus_space_read_1(iot, ioh, TCH) << 16) |
   1457 		    (bus_space_read_1(iot, ioh, TCM) << 8) |
   1458 		    bus_space_read_1(iot, ioh, TCL);
   1459 		if (amount > 0) {
   1460 			out -= amount;
   1461 			SPC_MISC(("+%d ", amount));
   1462 		}
   1463 	}
   1464 
   1465 	return out;
   1466 }
   1467 
   1468 /*
   1469  * spc_datain_pio: perform data transfers using the FIFO datapath in the spc
   1470  * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
   1471  * and ACK deasserted (i.e. at least one byte is ready).
   1472  *
   1473  * For now, uses a pretty dumb algorithm, hangs around until all data has been
   1474  * transferred.  This, is OK for fast targets, but not so smart for slow
   1475  * targets which don't disconnect or for huge transfers.
   1476  */
   1477 int
   1478 spc_datain_pio(sc, p, n)
   1479 	struct spc_softc *sc;
   1480 	u_char *p;
   1481 	int n;
   1482 {
   1483 	bus_space_tag_t iot = sc->sc_iot;
   1484 	bus_space_handle_t ioh = sc->sc_ioh;
   1485 	int in = 0;
   1486 	u_int8_t intstat, sstat;
   1487 #define DINAMOUNT 8		/* Full FIFO */
   1488 
   1489 	SPC_TRACE(("spc_datain_pio  "));
   1490 	/* send TRANSFER command. */
   1491 	bus_space_write_1(iot, ioh, TCH, n >> 16);
   1492 	bus_space_write_1(iot, ioh, TCM, n >> 8);
   1493 	bus_space_write_1(iot, ioh, TCL, n);
   1494 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
   1495 #ifdef x68k
   1496 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
   1497 #else
   1498 	bus_space_write_1(iot, ioh, SCMD,
   1499 	    SCMD_XFR | SCMD_PROG_XFR);	/* XXX */
   1500 #endif
   1501 	for (;;) {
   1502 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
   1503 			break;
   1504 		if (bus_space_read_1(iot, ioh, INTS) != 0)
   1505 			goto phasechange;
   1506 	}
   1507 
   1508 	/*
   1509 	 * We leave this loop if one or more of the following is true:
   1510 	 * a) phase != PH_DATAIN && FIFOs are empty
   1511 	 * b) reset has occurred or busfree is detected.
   1512 	 */
   1513 	while (n > 0) {
   1514 		int xfer;
   1515 
   1516 		/* Wait for fifo half full or phase mismatch */
   1517 		for (;;) {
   1518 			/* XXX needs timeout */
   1519 			intstat = bus_space_read_1(iot, ioh, INTS);
   1520 			sstat = bus_space_read_1(iot, ioh, SSTS);
   1521 			if (intstat != 0 ||
   1522 			    (sstat & SSTS_DREG_EMPTY) == 0)
   1523 				break;
   1524 		}
   1525 
   1526 		if (sstat & SSTS_DREG_FULL) {
   1527 			xfer = DINAMOUNT;
   1528 			n -= xfer;
   1529 			in += xfer;
   1530 			bus_space_read_multi_1(iot, ioh, DREG, p, xfer);
   1531 			p += xfer;
   1532 		}
   1533 		while (n > 0 &&
   1534 		    (bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) == 0) {
   1535 			n--;
   1536 			in++;
   1537 			*p++ = bus_space_read_1(iot, ioh, DREG);
   1538 		}
   1539 
   1540 		if (intstat != 0)
   1541 			goto phasechange;
   1542 	}
   1543 
   1544 	/*
   1545 	 * Some SCSI-devices are rude enough to transfer more data than what
   1546 	 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
   1547 	 * requested 512.  Test for progress, i.e. real transfers.  If no real
   1548 	 * transfers have been performed (n is probably already zero) and the
   1549 	 * FIFO is not empty, waste some bytes....
   1550 	 */
   1551 	if (in == 0) {
   1552 		for (;;) {
   1553 			/* XXX needs timeout */
   1554 			if (bus_space_read_1(iot, ioh, INTS) != 0)
   1555 				break;
   1556 		}
   1557 		SPC_MISC(("extra data  "));
   1558 	}
   1559 
   1560 phasechange:
   1561 	/* Stop the FIFO data path. */
   1562 
   1563 	return in;
   1564 }
   1565 
   1566 /*
   1567  * Catch an interrupt from the adaptor
   1568  */
   1569 /*
   1570  * This is the workhorse routine of the driver.
   1571  * Deficiencies (for now):
   1572  * 1) always uses programmed I/O
   1573  */
   1574 int
   1575 spc_intr(arg)
   1576 	void *arg;
   1577 {
   1578 	struct spc_softc *sc = arg;
   1579 	bus_space_tag_t iot = sc->sc_iot;
   1580 	bus_space_handle_t ioh = sc->sc_ioh;
   1581 	u_char ints;
   1582 	struct spc_acb *acb;
   1583 	struct scsipi_periph *periph;
   1584 	struct spc_tinfo *ti;
   1585 	int n;
   1586 
   1587 	/*
   1588 	 * Disable interrupt.
   1589 	 */
   1590 	bus_space_write_1(iot, ioh, SCTL,
   1591 	    bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB);
   1592 
   1593 	SPC_TRACE(("spc_intr  "));
   1594 
   1595 loop:
   1596 	/*
   1597 	 * Loop until transfer completion.
   1598 	 */
   1599 	/*
   1600 	 * First check for abnormal conditions, such as reset.
   1601 	 */
   1602 #ifdef x68k			/* XXX? */
   1603 	while ((ints = bus_space_read_1(iot, ioh, INTS)) == 0)
   1604 		delay(1);
   1605 	SPC_MISC(("ints = 0x%x  ", ints));
   1606 #else
   1607 	ints = bus_space_read_1(iot, ioh, INTS);
   1608 	SPC_MISC(("ints = 0x%x  ", ints));
   1609 #endif
   1610 
   1611 	if ((ints & INTS_RST) != 0) {
   1612 		printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
   1613 		goto reset;
   1614 	}
   1615 
   1616 	/*
   1617 	 * Check for less serious errors.
   1618 	 */
   1619 	if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR))
   1620 	    != 0) {
   1621 		printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
   1622 		if (sc->sc_prevphase == PH_MSGIN) {
   1623 			sc->sc_flags |= SPC_DROP_MSGIN;
   1624 			spc_sched_msgout(sc, SEND_PARITY_ERROR);
   1625 		} else
   1626 			spc_sched_msgout(sc, SEND_INIT_DET_ERR);
   1627 	}
   1628 
   1629 	/*
   1630 	 * If we're not already busy doing something test for the following
   1631 	 * conditions:
   1632 	 * 1) We have been reselected by something
   1633 	 * 2) We have selected something successfully
   1634 	 * 3) Our selection process has timed out
   1635 	 * 4) This is really a bus free interrupt just to get a new command
   1636 	 *    going?
   1637 	 * 5) Spurious interrupt?
   1638 	 */
   1639 	switch (sc->sc_state) {
   1640 	case SPC_IDLE:
   1641 	case SPC_SELECTING:
   1642 		SPC_MISC(("ints:0x%02x ", ints));
   1643 
   1644 		if ((ints & INTS_SEL) != 0) {
   1645 			/*
   1646 			 * We don't currently support target mode.
   1647 			 */
   1648 			printf("%s: target mode selected; going to BUS FREE\n",
   1649 			    sc->sc_dev.dv_xname);
   1650 
   1651 			goto sched;
   1652 		} else if ((ints & INTS_RESEL) != 0) {
   1653 			SPC_MISC(("reselected  "));
   1654 
   1655 			/*
   1656 			 * If we're trying to select a target ourselves,
   1657 			 * push our command back into the ready list.
   1658 			 */
   1659 			if (sc->sc_state == SPC_SELECTING) {
   1660 				SPC_MISC(("backoff selector  "));
   1661 				SPC_ASSERT(sc->sc_nexus != NULL);
   1662 				acb = sc->sc_nexus;
   1663 				sc->sc_nexus = NULL;
   1664 				TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
   1665 			}
   1666 
   1667 			/* Save reselection ID. */
   1668 			sc->sc_selid = bus_space_read_1(iot, ioh, TEMP);
   1669 
   1670 			sc->sc_state = SPC_RESELECTED;
   1671 		} else if ((ints & INTS_CMD_DONE) != 0) {
   1672 			SPC_MISC(("selected  "));
   1673 
   1674 			/*
   1675 			 * We have selected a target. Things to do:
   1676 			 * a) Determine what message(s) to send.
   1677 			 * b) Verify that we're still selecting the target.
   1678 			 * c) Mark device as busy.
   1679 			 */
   1680 			if (sc->sc_state != SPC_SELECTING) {
   1681 				printf("%s: selection out while idle; "
   1682 				    "resetting\n", sc->sc_dev.dv_xname);
   1683 				SPC_BREAK();
   1684 				goto reset;
   1685 			}
   1686 			SPC_ASSERT(sc->sc_nexus != NULL);
   1687 			acb = sc->sc_nexus;
   1688 			periph = acb->xs->xs_periph;
   1689 			ti = &sc->sc_tinfo[periph->periph_target];
   1690 
   1691 			sc->sc_msgpriq = SEND_IDENTIFY;
   1692 			if (acb->flags & ACB_RESET)
   1693 				sc->sc_msgpriq |= SEND_DEV_RESET;
   1694 			else if (acb->flags & ACB_ABORT)
   1695 				sc->sc_msgpriq |= SEND_ABORT;
   1696 			else {
   1697 #if SPC_USE_SYNCHRONOUS
   1698 				if ((ti->flags & DO_SYNC) != 0)
   1699 					sc->sc_msgpriq |= SEND_SDTR;
   1700 #endif
   1701 #if SPC_USE_WIDE
   1702 				if ((ti->flags & DO_WIDE) != 0)
   1703 					sc->sc_msgpriq |= SEND_WDTR;
   1704 #endif
   1705 			}
   1706 
   1707 			acb->flags |= ACB_NEXUS;
   1708 			ti->lubusy |= (1 << periph->periph_lun);
   1709 
   1710 			/* Do an implicit RESTORE POINTERS. */
   1711 			sc->sc_dp = acb->data_addr;
   1712 			sc->sc_dleft = acb->data_length;
   1713 			sc->sc_cp = (u_char *)&acb->scsipi_cmd;
   1714 			sc->sc_cleft = acb->scsipi_cmd_length;
   1715 
   1716 			/* On our first connection, schedule a timeout. */
   1717 			if ((acb->xs->xs_control & XS_CTL_POLL) == 0)
   1718 				callout_reset(&acb->xs->xs_callout,
   1719 				    mstohz(acb->timeout), spc_timeout, acb);
   1720 
   1721 			sc->sc_state = SPC_CONNECTED;
   1722 		} else if ((ints & INTS_TIMEOUT) != 0) {
   1723 			SPC_MISC(("selection timeout  "));
   1724 
   1725 			if (sc->sc_state != SPC_SELECTING) {
   1726 				printf("%s: selection timeout while idle; "
   1727 				    "resetting\n", sc->sc_dev.dv_xname);
   1728 				SPC_BREAK();
   1729 				goto reset;
   1730 			}
   1731 			SPC_ASSERT(sc->sc_nexus != NULL);
   1732 			acb = sc->sc_nexus;
   1733 
   1734 			delay(250);
   1735 
   1736 			acb->xs->error = XS_SELTIMEOUT;
   1737 			goto finish;
   1738 		} else {
   1739 			if (sc->sc_state != SPC_IDLE) {
   1740 				printf("%s: BUS FREE while not idle; "
   1741 				    "state=%d\n",
   1742 				    sc->sc_dev.dv_xname, sc->sc_state);
   1743 				SPC_BREAK();
   1744 				goto out;
   1745 			}
   1746 
   1747 			goto sched;
   1748 		}
   1749 
   1750 		/*
   1751 		 * Turn off selection stuff, and prepare to catch bus free
   1752 		 * interrupts, parity errors, and phase changes.
   1753 		 */
   1754 
   1755 		sc->sc_flags = 0;
   1756 		sc->sc_prevphase = PH_INVALID;
   1757 		goto dophase;
   1758 	}
   1759 
   1760 	if ((ints & INTS_DISCON) != 0) {
   1761 		/* We've gone to BUS FREE phase. */
   1762 		/* disable disconnect interrupt */
   1763 		bus_space_write_1(iot, ioh, PCTL,
   1764 		    bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB);
   1765 		/* XXX reset interrput */
   1766 		bus_space_write_1(iot, ioh, INTS, ints);
   1767 
   1768 		switch (sc->sc_state) {
   1769 		case SPC_RESELECTED:
   1770 			goto sched;
   1771 
   1772 		case SPC_CONNECTED:
   1773 			SPC_ASSERT(sc->sc_nexus != NULL);
   1774 			acb = sc->sc_nexus;
   1775 
   1776 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
   1777 			if (sc->sc_prevphase == PH_MSGOUT) {
   1778 				/*
   1779 				 * If the target went to BUS FREE phase during
   1780 				 * or immediately after sending a SDTR or WDTR
   1781 				 * message, disable negotiation.
   1782 				 */
   1783 				periph = acb->xs->xs_periph;
   1784 				ti = &sc->sc_tinfo[periph->periph_target];
   1785 				switch (sc->sc_lastmsg) {
   1786 #if SPC_USE_SYNCHRONOUS
   1787 				case SEND_SDTR:
   1788 					ti->flags &= ~DO_SYNC;
   1789 					ti->period = ti->offset = 0;
   1790 					break;
   1791 #endif
   1792 #if SPC_USE_WIDE
   1793 				case SEND_WDTR:
   1794 					ti->flags &= ~DO_WIDE;
   1795 					ti->width = 0;
   1796 					break;
   1797 #endif
   1798 				}
   1799 			}
   1800 #endif
   1801 
   1802 			if ((sc->sc_flags & SPC_ABORTING) == 0) {
   1803 				/*
   1804 				 * Section 5.1.1 of the SCSI 2 spec suggests
   1805 				 * issuing a REQUEST SENSE following an
   1806 				 * unexpected disconnect.  Some devices go into
   1807 				 * a contingent allegiance condition when
   1808 				 * disconnecting, and this is necessary to
   1809 				 * clean up their state.
   1810 				 */
   1811 				printf("%s: unexpected disconnect; "
   1812 				    "sending REQUEST SENSE\n",
   1813 				    sc->sc_dev.dv_xname);
   1814 				SPC_BREAK();
   1815 				acb->target_stat = SCSI_CHECK;
   1816 				acb->xs->error = XS_NOERROR;
   1817 				goto finish;
   1818 			}
   1819 
   1820 			acb->xs->error = XS_DRIVER_STUFFUP;
   1821 			goto finish;
   1822 
   1823 		case SPC_DISCONNECT:
   1824 			SPC_ASSERT(sc->sc_nexus != NULL);
   1825 			acb = sc->sc_nexus;
   1826 			TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
   1827 			sc->sc_nexus = NULL;
   1828 			goto sched;
   1829 
   1830 		case SPC_CMDCOMPLETE:
   1831 			SPC_ASSERT(sc->sc_nexus != NULL);
   1832 			acb = sc->sc_nexus;
   1833 			goto finish;
   1834 		}
   1835 	}
   1836 	else if ((ints & INTS_CMD_DONE) != 0 &&
   1837 	    sc->sc_prevphase == PH_MSGIN &&
   1838 	    sc->sc_state != SPC_CONNECTED)
   1839 		goto out;
   1840 
   1841 dophase:
   1842 #if 0
   1843 	if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
   1844 		/* Wait for REQINIT. */
   1845 		goto out;
   1846 	}
   1847 #else
   1848 	bus_space_write_1(iot, ioh, INTS, ints);
   1849 	ints = 0;
   1850 	while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
   1851 		delay(1);	/* need timeout XXX */
   1852 #endif
   1853 
   1854 	/*
   1855 	 * State transition.
   1856 	 */
   1857 	sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK;
   1858 #if 0
   1859 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase);
   1860 #endif
   1861 
   1862 	SPC_MISC(("phase=%d\n", sc->sc_phase));
   1863 	switch (sc->sc_phase) {
   1864 	case PH_MSGOUT:
   1865 		if (sc->sc_state != SPC_CONNECTED &&
   1866 		    sc->sc_state != SPC_RESELECTED)
   1867 			break;
   1868 		spc_msgout(sc);
   1869 		sc->sc_prevphase = PH_MSGOUT;
   1870 		goto loop;
   1871 
   1872 	case PH_MSGIN:
   1873 		if (sc->sc_state != SPC_CONNECTED &&
   1874 		    sc->sc_state != SPC_RESELECTED)
   1875 			break;
   1876 		spc_msgin(sc);
   1877 		sc->sc_prevphase = PH_MSGIN;
   1878 		goto loop;
   1879 
   1880 	case PH_CMD:
   1881 		if (sc->sc_state != SPC_CONNECTED)
   1882 			break;
   1883 #if SPC_DEBUG
   1884 		if ((spc_debug & SPC_SHOWMISC) != 0) {
   1885 			SPC_ASSERT(sc->sc_nexus != NULL);
   1886 			acb = sc->sc_nexus;
   1887 			printf("cmd=0x%02x+%d  ",
   1888 			    acb->scsipi_cmd.opcode, acb->scsipi_cmd_length - 1);
   1889 		}
   1890 #endif
   1891 		n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
   1892 		sc->sc_cp += n;
   1893 		sc->sc_cleft -= n;
   1894 		sc->sc_prevphase = PH_CMD;
   1895 		goto loop;
   1896 
   1897 	case PH_DATAOUT:
   1898 		if (sc->sc_state != SPC_CONNECTED)
   1899 			break;
   1900 		SPC_MISC(("dataout dleft=%d  ", sc->sc_dleft));
   1901 		n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
   1902 		sc->sc_dp += n;
   1903 		sc->sc_dleft -= n;
   1904 		sc->sc_prevphase = PH_DATAOUT;
   1905 		goto loop;
   1906 
   1907 	case PH_DATAIN:
   1908 		if (sc->sc_state != SPC_CONNECTED)
   1909 			break;
   1910 		SPC_MISC(("datain  "));
   1911 		n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
   1912 		sc->sc_dp += n;
   1913 		sc->sc_dleft -= n;
   1914 		sc->sc_prevphase = PH_DATAIN;
   1915 		goto loop;
   1916 
   1917 	case PH_STAT:
   1918 		if (sc->sc_state != SPC_CONNECTED)
   1919 			break;
   1920 		SPC_ASSERT(sc->sc_nexus != NULL);
   1921 		acb = sc->sc_nexus;
   1922 
   1923 		if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0)
   1924 			bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
   1925 		while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
   1926 			continue;	/* XXX needs timeout */
   1927 		bus_space_write_1(iot, ioh, PCTL, PH_STAT);
   1928 		bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK);
   1929 		while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
   1930 			continue;	/* XXX needs timeout */
   1931 		acb->target_stat = bus_space_read_1(iot, ioh, TEMP);
   1932 		bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
   1933 
   1934 		SPC_MISC(("target_stat=0x%02x  ", acb->target_stat));
   1935 		sc->sc_prevphase = PH_STAT;
   1936 		goto loop;
   1937 	}
   1938 
   1939 	printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname);
   1940 	SPC_BREAK();
   1941 reset:
   1942 	spc_init(sc);
   1943 	return 1;
   1944 
   1945 finish:
   1946 	callout_stop(&acb->xs->xs_callout);
   1947 	bus_space_write_1(iot, ioh, INTS, ints);
   1948 	ints = 0;
   1949 	spc_done(sc, acb);
   1950 	goto out;
   1951 
   1952 sched:
   1953 	sc->sc_state = SPC_IDLE;
   1954 	spc_sched(sc);
   1955 	goto out;
   1956 
   1957 out:
   1958 	if (ints)
   1959 		bus_space_write_1(iot, ioh, INTS, ints);
   1960 	bus_space_write_1(iot, ioh, SCTL,
   1961 	    bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB);
   1962 	return 1;
   1963 }
   1964 
   1965 void
   1966 spc_abort(sc, acb)
   1967 	struct spc_softc *sc;
   1968 	struct spc_acb *acb;
   1969 {
   1970 
   1971 	/* 2 secs for the abort */
   1972 	acb->timeout = SPC_ABORT_TIMEOUT;
   1973 	acb->flags |= ACB_ABORT;
   1974 
   1975 	if (acb == sc->sc_nexus) {
   1976 		/*
   1977 		 * If we're still selecting, the message will be scheduled
   1978 		 * after selection is complete.
   1979 		 */
   1980 		if (sc->sc_state == SPC_CONNECTED)
   1981 			spc_sched_msgout(sc, SEND_ABORT);
   1982 	} else {
   1983 		spc_dequeue(sc, acb);
   1984 		TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
   1985 		if (sc->sc_state == SPC_IDLE)
   1986 			spc_sched(sc);
   1987 	}
   1988 }
   1989 
   1990 void
   1991 spc_timeout(arg)
   1992 	void *arg;
   1993 {
   1994 	struct spc_acb *acb = arg;
   1995 	struct scsipi_xfer *xs = acb->xs;
   1996 	struct scsipi_periph *periph = xs->xs_periph;
   1997 	struct spc_softc *sc;
   1998 	int s;
   1999 
   2000 	sc = (void *)periph->periph_channel->chan_adapter->adapt_dev;
   2001 	scsipi_printaddr(periph);
   2002 	printf("timed out");
   2003 
   2004 	s = splbio();
   2005 
   2006 	if (acb->flags & ACB_ABORT) {
   2007 		/* abort timed out */
   2008 		printf(" AGAIN\n");
   2009 		/* XXX Must reset! */
   2010 	} else {
   2011 		/* abort the operation that has timed out */
   2012 		printf("\n");
   2013 		acb->xs->error = XS_TIMEOUT;
   2014 		spc_abort(sc, acb);
   2015 	}
   2016 
   2017 	splx(s);
   2018 }
   2019 
   2020 #ifdef SPC_DEBUG
   2021 /*
   2022  * The following functions are mostly used for debugging purposes, either
   2023  * directly called from the driver or from the kernel debugger.
   2024  */
   2025 
   2026 void
   2027 spc_show_scsi_cmd(acb)
   2028 	struct spc_acb *acb;
   2029 {
   2030 	u_char  *b = (u_char *)&acb->scsipi_cmd;
   2031 	int i;
   2032 
   2033 	scsipi_printaddr(acb->xs->xs_periph);
   2034 	if ((acb->xs->xs_control & XS_CTL_RESET) == 0) {
   2035 		for (i = 0; i < acb->scsipi_cmd_length; i++) {
   2036 			if (i)
   2037 				printf(",");
   2038 			printf("%x", b[i]);
   2039 		}
   2040 		printf("\n");
   2041 	} else
   2042 		printf("RESET\n");
   2043 }
   2044 
   2045 void
   2046 spc_print_acb(acb)
   2047 	struct spc_acb *acb;
   2048 {
   2049 
   2050 	printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
   2051 	printf(" dp=%p dleft=%d target_stat=%x\n",
   2052 	    acb->data_addr, acb->data_length, acb->target_stat);
   2053 	spc_show_scsi_cmd(acb);
   2054 }
   2055 
   2056 void
   2057 spc_print_active_acb()
   2058 {
   2059 	struct spc_acb *acb;
   2060 	struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */
   2061 
   2062 	printf("ready list:\n");
   2063 	TAILQ_FOREACH(acb, &sc->ready_list, chain)
   2064 		spc_print_acb(acb);
   2065 	printf("nexus:\n");
   2066 	if (sc->sc_nexus != NULL)
   2067 		spc_print_acb(sc->sc_nexus);
   2068 	printf("nexus list:\n");
   2069 	TAILQ_FOREACH(acb, &sc->nexus_list, chain)
   2070 		spc_print_acb(acb);
   2071 }
   2072 
   2073 void
   2074 spc_dump89352(sc)
   2075 	struct spc_softc *sc;
   2076 {
   2077 	bus_space_tag_t iot = sc->sc_iot;
   2078 	bus_space_handle_t ioh = sc->sc_ioh;
   2079 
   2080 	printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n",
   2081 	    bus_space_read_1(iot, ioh, BDID),
   2082 	    bus_space_read_1(iot, ioh, SCTL),
   2083 	    bus_space_read_1(iot, ioh, SCMD),
   2084 	    bus_space_read_1(iot, ioh, TMOD));
   2085 	printf("         INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n",
   2086 	    bus_space_read_1(iot, ioh, INTS),
   2087 	    bus_space_read_1(iot, ioh, PSNS),
   2088 	    bus_space_read_1(iot, ioh, SSTS),
   2089 	    bus_space_read_1(iot, ioh, SERR),
   2090 	    bus_space_read_1(iot, ioh, PCTL));
   2091 	printf("         MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n",
   2092 	    bus_space_read_1(iot, ioh, MBC),
   2093 #if 0
   2094 	    bus_space_read_1(iot, ioh, DREG),
   2095 #else
   2096 	    0,
   2097 #endif
   2098 	    bus_space_read_1(iot, ioh, TEMP),
   2099 	    bus_space_read_1(iot, ioh, TCH),
   2100 	    bus_space_read_1(iot, ioh, TCM));
   2101 	printf("         TCL=%x EXBF=%x\n",
   2102 	    bus_space_read_1(iot, ioh, TCL),
   2103 	    bus_space_read_1(iot, ioh, EXBF));
   2104 }
   2105 
   2106 void
   2107 spc_dump_driver(sc)
   2108 	struct spc_softc *sc;
   2109 {
   2110 	struct spc_tinfo *ti;
   2111 	int i;
   2112 
   2113 	printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
   2114 	printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x "
   2115 	    "currmsg=%x\n", sc->sc_state, sc->sc_imess[0],
   2116 	    sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
   2117 	for (i = 0; i < 7; i++) {
   2118 		ti = &sc->sc_tinfo[i];
   2119 		printf("tinfo%d: %d cmds %d disconnects %d timeouts",
   2120 		    i, ti->cmds, ti->dconns, ti->touts);
   2121 		printf(" %d senses flags=%x\n", ti->senses, ti->flags);
   2122 	}
   2123 }
   2124 #endif
   2125