mb89352.c revision 1.21 1 /* $NetBSD: mb89352.c,v 1.21 2003/07/27 03:51:28 tsutsui Exp $ */
2 /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */
3
4 /*-
5 * Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Charles M. Hannum.
22 * 4. The name of the author may not be used to endorse or promote products
23 * derived from this software without specific prior written permission.
24 *
25 * Copyright (c) 1994 Jarle Greipsland
26 * All rights reserved.
27 *
28 * Redistribution and use in source and binary forms, with or without
29 * modification, are permitted provided that the following conditions
30 * are met:
31 * 1. Redistributions of source code must retain the above copyright
32 * notice, this list of conditions and the following disclaimer.
33 * 2. Redistributions in binary form must reproduce the above copyright
34 * notice, this list of conditions and the following disclaimer in the
35 * documentation and/or other materials provided with the distribution.
36 * 3. The name of the author may not be used to endorse or promote products
37 * derived from this software without specific prior written permission.
38 *
39 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
40 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
41 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
42 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
43 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
44 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
47 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
48 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
49 * POSSIBILITY OF SUCH DAMAGE.
50 */
51 /*
52 * [NetBSD for NEC PC-98 series]
53 * Copyright (c) 1996, 1997, 1998
54 * NetBSD/pc98 porting staff. All rights reserved.
55 * Copyright (c) 1996, 1997, 1998
56 * Kouichi Matsuda. All rights reserved.
57 */
58
59 /*
60 * Acknowledgements: Many of the algorithms used in this driver are
61 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
62 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
63 */
64
65 /* TODO list:
66 * 1) Get the DMA stuff working.
67 * 2) Get the iov/uio stuff working. Is this a good thing ???
68 * 3) Get the synch stuff working.
69 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
70 */
71
72 #include <sys/cdefs.h>
73 __KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.21 2003/07/27 03:51:28 tsutsui Exp $");
74
75 #ifdef DDB
76 #define integrate
77 #else
78 #define integrate __inline static
79 #endif
80
81 /*
82 * A few customizable items:
83 */
84
85 /* Synchronous data transfers? */
86 #define SPC_USE_SYNCHRONOUS 0
87 #define SPC_SYNC_REQ_ACK_OFS 8
88
89 /* Wide data transfers? */
90 #define SPC_USE_WIDE 0
91 #define SPC_MAX_WIDTH 0
92
93 /* Max attempts made to transmit a message */
94 #define SPC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */
95
96 /*
97 * Some spin loop parameters (essentially how long to wait some places)
98 * The problem(?) is that sometimes we expect either to be able to transmit a
99 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid
100 * returning from the interrupt just to get yanked back for the next byte we
101 * may spin in the interrupt routine waiting for this byte to come. How long?
102 * This is really (SCSI) device and processor dependent. Tuneable, I guess.
103 */
104 #define SPC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */
105 #define SPC_MSGOUT_SPIN 1
106
107 /*
108 * Include debug functions? At the end of this file there are a bunch of
109 * functions that will print out various information regarding queued SCSI
110 * commands, driver state and chip contents. You can call them from the
111 * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the
112 * kernel uses less memory) but you lose the debugging facilities.
113 */
114 #if 0
115 #define SPC_DEBUG 1
116 #endif
117
118 #define SPC_ABORT_TIMEOUT 2000 /* time to wait for abort */
119
120 #ifdef x68k /* XXX it seems x68k SPC SCSI hardware has some quirks */
121 #define NEED_DREQ_ON_HARDWARE_XFER
122 #define NO_MANUAL_XFER
123 #endif
124
125 /* End of customizable parameters */
126
127 /*
128 * MB89352 SCSI Protocol Controller (SPC) routines.
129 */
130
131 #include "opt_ddb.h"
132
133 #include <sys/param.h>
134 #include <sys/systm.h>
135 #include <sys/kernel.h>
136 #include <sys/errno.h>
137 #include <sys/ioctl.h>
138 #include <sys/device.h>
139 #include <sys/buf.h>
140 #include <sys/proc.h>
141 #include <sys/user.h>
142 #include <sys/queue.h>
143
144 #include <machine/intr.h>
145 #include <machine/bus.h>
146
147 #include <dev/scsipi/scsi_all.h>
148 #include <dev/scsipi/scsipi_all.h>
149 #include <dev/scsipi/scsi_message.h>
150 #include <dev/scsipi/scsiconf.h>
151
152 #include <dev/ic/mb89352reg.h>
153 #include <dev/ic/mb89352var.h>
154
155 #ifndef DDB
156 #define Debugger() panic("should call debugger here (mb89352.c)")
157 #endif /* ! DDB */
158
159 #if SPC_DEBUG
160 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */
161 #endif
162
163 void spc_done __P((struct spc_softc *, struct spc_acb *));
164 void spc_dequeue __P((struct spc_softc *, struct spc_acb *));
165 void spc_scsipi_request __P((struct scsipi_channel *,
166 scsipi_adapter_req_t, void *));
167 int spc_poll __P((struct spc_softc *, struct scsipi_xfer *, int));
168 integrate void spc_sched_msgout __P((struct spc_softc *, u_char));
169 integrate void spc_setsync __P((struct spc_softc *, struct spc_tinfo *));
170 void spc_select __P((struct spc_softc *, struct spc_acb *));
171 void spc_timeout __P((void *));
172 void spc_scsi_reset __P((struct spc_softc *));
173 void spc_reset __P((struct spc_softc *));
174 void spc_free_acb __P((struct spc_softc *, struct spc_acb *, int));
175 struct spc_acb* spc_get_acb __P((struct spc_softc *));
176 int spc_reselect __P((struct spc_softc *, int));
177 void spc_msgin __P((struct spc_softc *));
178 void spc_abort __P((struct spc_softc *, struct spc_acb *));
179 void spc_msgout __P((struct spc_softc *));
180 int spc_dataout_pio __P((struct spc_softc *, u_char *, int));
181 int spc_datain_pio __P((struct spc_softc *, u_char *, int));
182 #if SPC_DEBUG
183 void spc_print_acb __P((struct spc_acb *));
184 void spc_dump_driver __P((struct spc_softc *));
185 void spc_dump89352 __P((struct spc_softc *));
186 void spc_show_scsi_cmd __P((struct spc_acb *));
187 void spc_print_active_acb __P((void));
188 #endif
189
190 extern struct cfdriver spc_cd;
191
192 /*
193 * INITIALIZATION ROUTINES (probe, attach ++)
194 */
195
196 /*
197 * Do the real search-for-device.
198 * Prerequisite: sc->sc_iobase should be set to the proper value
199 */
200 int
201 spc_find(iot, ioh, bdid)
202 bus_space_tag_t iot;
203 bus_space_handle_t ioh;
204 int bdid;
205 {
206 long timeout = SPC_ABORT_TIMEOUT;
207
208 SPC_TRACE(("spc: probing for spc-chip\n"));
209 /*
210 * Disable interrupts then reset the FUJITSU chip.
211 */
212 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
213 bus_space_write_1(iot, ioh, SCMD, 0);
214 bus_space_write_1(iot, ioh, PCTL, 0);
215 bus_space_write_1(iot, ioh, TEMP, 0);
216 bus_space_write_1(iot, ioh, TCH, 0);
217 bus_space_write_1(iot, ioh, TCM, 0);
218 bus_space_write_1(iot, ioh, TCL, 0);
219 bus_space_write_1(iot, ioh, INTS, 0);
220 bus_space_write_1(iot, ioh, SCTL,
221 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
222 bus_space_write_1(iot, ioh, BDID, bdid);
223 delay(400);
224 bus_space_write_1(iot, ioh, SCTL,
225 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
226
227 /* The following detection is derived from spc.c
228 * (by Takahide Matsutsuka) in FreeBSD/pccard-test.
229 */
230 while (bus_space_read_1(iot, ioh, PSNS) && timeout) {
231 timeout--;
232 DELAY(1);
233 }
234 if (timeout == 0) {
235 printf("spc: find failed\n");
236 return 0;
237 }
238
239 SPC_START(("SPC found"));
240 return 1;
241 }
242
243 void
244 spc_attach(sc)
245 struct spc_softc *sc;
246 {
247
248 SPC_TRACE(("spc_attach "));
249 sc->sc_state = SPC_INIT;
250
251 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */
252
253 #if SPC_USE_SYNCHRONOUS
254 /*
255 * These are the bounds of the sync period, based on the frequency of
256 * the chip's clock input and the size and offset of the sync period
257 * register.
258 *
259 * For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a
260 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
261 * minimum transfer rate.
262 */
263 sc->sc_minsync = (2 * 250) / sc->sc_freq;
264 sc->sc_maxsync = (9 * 250) / sc->sc_freq;
265 #endif
266
267 spc_init(sc); /* Init chip and driver */
268
269 /*
270 * Fill in the adapter.
271 */
272 sc->sc_adapter.adapt_dev = &sc->sc_dev;
273 sc->sc_adapter.adapt_nchannels = 1;
274 sc->sc_adapter.adapt_openings = 7;
275 sc->sc_adapter.adapt_max_periph = 1;
276 sc->sc_adapter.adapt_minphys = minphys;
277 sc->sc_adapter.adapt_request = spc_scsipi_request;
278
279 sc->sc_channel.chan_adapter = &sc->sc_adapter;
280 sc->sc_channel.chan_bustype = &scsi_bustype;
281 sc->sc_channel.chan_channel = 0;
282 sc->sc_channel.chan_ntargets = 8;
283 sc->sc_channel.chan_nluns = 8;
284 sc->sc_channel.chan_id = sc->sc_initiator;
285
286 /*
287 * ask the adapter what subunits are present
288 */
289 config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
290 }
291
292 /*
293 * Initialize MB89352 chip itself
294 * The following conditions should hold:
295 * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc
296 * must be valid.
297 */
298 void
299 spc_reset(sc)
300 struct spc_softc *sc;
301 {
302 bus_space_tag_t iot = sc->sc_iot;
303 bus_space_handle_t ioh = sc->sc_ioh;
304
305 SPC_TRACE(("spc_reset "));
306 /*
307 * Disable interrupts then reset the FUJITSU chip.
308 */
309 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
310 bus_space_write_1(iot, ioh, SCMD, 0);
311 bus_space_write_1(iot, ioh, TMOD, 0);
312 bus_space_write_1(iot, ioh, PCTL, 0);
313 bus_space_write_1(iot, ioh, TEMP, 0);
314 bus_space_write_1(iot, ioh, TCH, 0);
315 bus_space_write_1(iot, ioh, TCM, 0);
316 bus_space_write_1(iot, ioh, TCL, 0);
317 bus_space_write_1(iot, ioh, INTS, 0);
318 bus_space_write_1(iot, ioh, SCTL,
319 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
320 bus_space_write_1(iot, ioh, BDID, sc->sc_initiator);
321 delay(400);
322 bus_space_write_1(iot, ioh, SCTL,
323 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
324 }
325
326
327 /*
328 * Pull the SCSI RST line for 500us.
329 */
330 void
331 spc_scsi_reset(sc)
332 struct spc_softc *sc;
333 {
334 bus_space_tag_t iot = sc->sc_iot;
335 bus_space_handle_t ioh = sc->sc_ioh;
336
337 SPC_TRACE(("spc_scsi_reset "));
338 bus_space_write_1(iot, ioh, SCMD,
339 bus_space_read_1(iot, ioh, SCMD) | SCMD_RST);
340 delay(500);
341 bus_space_write_1(iot, ioh, SCMD,
342 bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST);
343 delay(50);
344 }
345
346 /*
347 * Initialize spc SCSI driver.
348 */
349 void
350 spc_init(sc)
351 struct spc_softc *sc;
352 {
353 struct spc_acb *acb;
354 int r;
355
356 SPC_TRACE(("spc_init "));
357 spc_reset(sc);
358 spc_scsi_reset(sc);
359 spc_reset(sc);
360
361 if (sc->sc_state == SPC_INIT) {
362 /* First time through; initialize. */
363 TAILQ_INIT(&sc->ready_list);
364 TAILQ_INIT(&sc->nexus_list);
365 TAILQ_INIT(&sc->free_list);
366 sc->sc_nexus = NULL;
367 acb = sc->sc_acb;
368 memset(acb, 0, sizeof(sc->sc_acb));
369 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
370 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
371 acb++;
372 }
373 memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
374 } else {
375 /* Cancel any active commands. */
376 sc->sc_state = SPC_CLEANING;
377 if ((acb = sc->sc_nexus) != NULL) {
378 acb->xs->error = XS_DRIVER_STUFFUP;
379 callout_stop(&acb->xs->xs_callout);
380 spc_done(sc, acb);
381 }
382 while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) {
383 acb->xs->error = XS_DRIVER_STUFFUP;
384 callout_stop(&acb->xs->xs_callout);
385 spc_done(sc, acb);
386 }
387 }
388
389 sc->sc_prevphase = PH_INVALID;
390 for (r = 0; r < 8; r++) {
391 struct spc_tinfo *ti = &sc->sc_tinfo[r];
392
393 ti->flags = 0;
394 #if SPC_USE_SYNCHRONOUS
395 ti->flags |= DO_SYNC;
396 ti->period = sc->sc_minsync;
397 ti->offset = SPC_SYNC_REQ_ACK_OFS;
398 #else
399 ti->period = ti->offset = 0;
400 #endif
401 #if SPC_USE_WIDE
402 ti->flags |= DO_WIDE;
403 ti->width = SPC_MAX_WIDTH;
404 #else
405 ti->width = 0;
406 #endif
407 }
408
409 sc->sc_state = SPC_IDLE;
410 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL,
411 bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB);
412 }
413
414 void
415 spc_free_acb(sc, acb, flags)
416 struct spc_softc *sc;
417 struct spc_acb *acb;
418 int flags;
419 {
420 int s;
421
422 SPC_TRACE(("spc_free_acb "));
423 s = splbio();
424
425 acb->flags = 0;
426 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
427 splx(s);
428 }
429
430 struct spc_acb *
431 spc_get_acb(sc)
432 struct spc_softc *sc;
433 {
434 struct spc_acb *acb;
435 int s;
436
437 SPC_TRACE(("spc_get_acb "));
438 s = splbio();
439 acb = TAILQ_FIRST(&sc->free_list);
440 if (acb != NULL) {
441 TAILQ_REMOVE(&sc->free_list, acb, chain);
442 acb->flags |= ACB_ALLOC;
443 }
444 splx(s);
445 return acb;
446 }
447
448 /*
449 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
450 */
451
452 /*
453 * Expected sequence:
454 * 1) Command inserted into ready list
455 * 2) Command selected for execution
456 * 3) Command won arbitration and has selected target device
457 * 4) Send message out (identify message, eventually also sync.negotiations)
458 * 5) Send command
459 * 5a) Receive disconnect message, disconnect.
460 * 5b) Reselected by target
461 * 5c) Receive identify message from target.
462 * 6) Send or receive data
463 * 7) Receive status
464 * 8) Receive message (command complete etc.)
465 */
466
467 /*
468 * Start a SCSI-command
469 * This function is called by the higher level SCSI-driver to queue/run
470 * SCSI-commands.
471 */
472 void
473 spc_scsipi_request(chan, req, arg)
474 struct scsipi_channel *chan;
475 scsipi_adapter_req_t req;
476 void *arg;
477 {
478 struct scsipi_xfer *xs;
479 struct scsipi_periph *periph;
480 struct spc_softc *sc = (void *)chan->chan_adapter->adapt_dev;
481 struct spc_acb *acb;
482 int s, flags;
483
484 switch (req) {
485 case ADAPTER_REQ_RUN_XFER:
486 xs = arg;
487 periph = xs->xs_periph;
488 SPC_TRACE(("spc_scsipi_request "));
489 SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
490 periph->periph_target));
491
492 flags = xs->xs_control;
493 acb = spc_get_acb(sc);
494 #ifdef DIAGNOSTIC
495 /*
496 * This should nerver happen as we track the resources
497 * in the mid-layer.
498 */
499 if (acb == NULL) {
500 scsipi_printaddr(periph);
501 printf("unable to allocate acb\n");
502 panic("spc_scsipi_request");
503 }
504 #endif
505
506 /* Initialize acb */
507 acb->xs = xs;
508 acb->timeout = xs->timeout;
509
510 if (xs->xs_control & XS_CTL_RESET) {
511 acb->flags |= ACB_RESET;
512 acb->scsipi_cmd_length = 0;
513 acb->data_length = 0;
514 } else {
515 memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen);
516 acb->scsipi_cmd_length = xs->cmdlen;
517 acb->data_addr = xs->data;
518 acb->data_length = xs->datalen;
519 }
520 acb->target_stat = 0;
521
522 s = splbio();
523
524 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
525 /*
526 * Start scheduling unless a queue process is in progress.
527 */
528 if (sc->sc_state == SPC_IDLE)
529 spc_sched(sc);
530 /*
531 * After successful sending, check if we should return just now.
532 * If so, return SUCCESSFULLY_QUEUED.
533 */
534
535 splx(s);
536
537 if ((flags & XS_CTL_POLL) == 0)
538 return;
539
540 /* Not allowed to use interrupts, use polling instead */
541 s = splbio();
542 if (spc_poll(sc, xs, acb->timeout)) {
543 spc_timeout(acb);
544 if (spc_poll(sc, xs, acb->timeout))
545 spc_timeout(acb);
546 }
547 splx(s);
548 return;
549 case ADAPTER_REQ_GROW_RESOURCES:
550 /* XXX Not supported. */
551 return;
552 case ADAPTER_REQ_SET_XFER_MODE:
553 /* XXX Not supported. */
554 return;
555 }
556 }
557
558 /*
559 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
560 */
561 int
562 spc_poll(sc, xs, count)
563 struct spc_softc *sc;
564 struct scsipi_xfer *xs;
565 int count;
566 {
567 bus_space_tag_t iot = sc->sc_iot;
568 bus_space_handle_t ioh = sc->sc_ioh;
569
570 SPC_TRACE(("spc_poll "));
571 while (count) {
572 /*
573 * If we had interrupts enabled, would we
574 * have got an interrupt?
575 */
576 if (bus_space_read_1(iot, ioh, INTS) != 0)
577 spc_intr(sc);
578 if ((xs->xs_status & XS_STS_DONE) != 0)
579 return 0;
580 delay(1000);
581 count--;
582 }
583 return 1;
584 }
585
586 /*
587 * LOW LEVEL SCSI UTILITIES
588 */
589
590 integrate void
591 spc_sched_msgout(sc, m)
592 struct spc_softc *sc;
593 u_char m;
594 {
595 bus_space_tag_t iot = sc->sc_iot;
596 bus_space_handle_t ioh = sc->sc_ioh;
597
598 SPC_TRACE(("spc_sched_msgout "));
599 if (sc->sc_msgpriq == 0)
600 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
601 sc->sc_msgpriq |= m;
602 }
603
604 /*
605 * Set synchronous transfer offset and period.
606 */
607 integrate void
608 spc_setsync(sc, ti)
609 struct spc_softc *sc;
610 struct spc_tinfo *ti;
611 {
612 #if SPC_USE_SYNCHRONOUS
613 bus_space_tag_t iot = sc->sc_iot;
614 bus_space_handle_t ioh = sc->sc_ioh;
615
616 SPC_TRACE(("spc_setsync "));
617 if (ti->offset != 0)
618 bus_space_write_1(iot, ioh, TMOD,
619 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
620 else
621 bus_space_write_1(iot, ioh, TMOD, 0);
622 #endif
623 }
624
625 /*
626 * Start a selection. This is used by spc_sched() to select an idle target.
627 */
628 void
629 spc_select(sc, acb)
630 struct spc_softc *sc;
631 struct spc_acb *acb;
632 {
633 struct scsipi_periph *periph = acb->xs->xs_periph;
634 int target = periph->periph_target;
635 struct spc_tinfo *ti = &sc->sc_tinfo[target];
636 bus_space_tag_t iot = sc->sc_iot;
637 bus_space_handle_t ioh = sc->sc_ioh;
638
639 SPC_TRACE(("spc_select "));
640 spc_setsync(sc, ti);
641
642 #if 0
643 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
644 #endif
645 #ifdef x68k /* XXX? */
646 do {
647 asm ("nop");
648 } while (bus_space_read_1(iot, ioh, SSTS) &
649 (SSTS_ACTIVE|SSTS_TARGET|SSTS_BUSY));
650 #endif
651
652 bus_space_write_1(iot, ioh, PCTL, 0);
653 bus_space_write_1(iot, ioh, TEMP,
654 (1 << sc->sc_initiator) | (1 << target));
655 /*
656 * Setup BSY timeout (selection timeout).
657 * 250ms according to the SCSI specification.
658 * T = (X * 256 + 15) * Tclf * 2 (Tclf = 200ns on x68k)
659 * To setup 256ms timeout,
660 * 128000ns/200ns = X * 256 + 15
661 * 640 - 15 = X * 256
662 * X = 625 / 256
663 * X = 2 + 113 / 256
664 * ==> tch = 2, tcm = 113 (correct?)
665 */
666 bus_space_write_1(iot, ioh, TCH, 2);
667 bus_space_write_1(iot, ioh, TCM, 113);
668 /* Time to the information transfer phase start. */
669 bus_space_write_1(iot, ioh, TCL, 3);
670 bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT);
671
672 sc->sc_state = SPC_SELECTING;
673 }
674
675 int
676 spc_reselect(sc, message)
677 struct spc_softc *sc;
678 int message;
679 {
680 u_char selid, target, lun;
681 struct spc_acb *acb;
682 struct scsipi_periph *periph;
683 struct spc_tinfo *ti;
684
685 SPC_TRACE(("spc_reselect "));
686 /*
687 * The SCSI chip made a snapshot of the data bus while the reselection
688 * was being negotiated. This enables us to determine which target did
689 * the reselect.
690 */
691 selid = sc->sc_selid & ~(1 << sc->sc_initiator);
692 if (selid & (selid - 1)) {
693 printf("%s: reselect with invalid selid %02x; "
694 "sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid);
695 SPC_BREAK();
696 goto reset;
697 }
698
699 /*
700 * Search wait queue for disconnected cmd
701 * The list should be short, so I haven't bothered with
702 * any more sophisticated structures than a simple
703 * singly linked list.
704 */
705 target = ffs(selid) - 1;
706 lun = message & 0x07;
707 TAILQ_FOREACH(acb, &sc->nexus_list, chain) {
708 periph = acb->xs->xs_periph;
709 if (periph->periph_target == target &&
710 periph->periph_lun == lun)
711 break;
712 }
713 if (acb == NULL) {
714 printf("%s: reselect from target %d lun %d with no nexus; "
715 "sending ABORT\n", sc->sc_dev.dv_xname, target, lun);
716 SPC_BREAK();
717 goto abort;
718 }
719
720 /* Make this nexus active again. */
721 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
722 sc->sc_state = SPC_CONNECTED;
723 sc->sc_nexus = acb;
724 ti = &sc->sc_tinfo[target];
725 ti->lubusy |= (1 << lun);
726 spc_setsync(sc, ti);
727
728 if (acb->flags & ACB_RESET)
729 spc_sched_msgout(sc, SEND_DEV_RESET);
730 else if (acb->flags & ACB_ABORT)
731 spc_sched_msgout(sc, SEND_ABORT);
732
733 /* Do an implicit RESTORE POINTERS. */
734 sc->sc_dp = acb->data_addr;
735 sc->sc_dleft = acb->data_length;
736 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
737 sc->sc_cleft = acb->scsipi_cmd_length;
738
739 return (0);
740
741 reset:
742 spc_sched_msgout(sc, SEND_DEV_RESET);
743 return (1);
744
745 abort:
746 spc_sched_msgout(sc, SEND_ABORT);
747 return (1);
748 }
749
750 /*
751 * Schedule a SCSI operation. This has now been pulled out of the interrupt
752 * handler so that we may call it from spc_scsi_cmd and spc_done. This may
753 * save us an unecessary interrupt just to get things going. Should only be
754 * called when state == SPC_IDLE and at bio pl.
755 */
756 void
757 spc_sched(sc)
758 struct spc_softc *sc;
759 {
760 struct spc_acb *acb;
761 struct scsipi_periph *periph;
762 struct spc_tinfo *ti;
763
764 /* missing the hw, just return and wait for our hw */
765 if (sc->sc_flags & SPC_INACTIVE)
766 return;
767 SPC_TRACE(("spc_sched "));
768 /*
769 * Find first acb in ready queue that is for a target/lunit pair that
770 * is not busy.
771 */
772 TAILQ_FOREACH(acb, &sc->ready_list, chain) {
773 periph = acb->xs->xs_periph;
774 ti = &sc->sc_tinfo[periph->periph_target];
775 if ((ti->lubusy & (1 << periph->periph_lun)) == 0) {
776 SPC_MISC(("selecting %d:%d ",
777 periph->periph_target, periph->periph_lun));
778 TAILQ_REMOVE(&sc->ready_list, acb, chain);
779 sc->sc_nexus = acb;
780 spc_select(sc, acb);
781 return;
782 } else
783 SPC_MISC(("%d:%d busy\n",
784 periph->periph_target, periph->periph_lun));
785 }
786 SPC_MISC(("idle "));
787 /* Nothing to start; just enable reselections and wait. */
788 }
789
790 /*
791 * POST PROCESSING OF SCSI_CMD (usually current)
792 */
793 void
794 spc_done(sc, acb)
795 struct spc_softc *sc;
796 struct spc_acb *acb;
797 {
798 struct scsipi_xfer *xs = acb->xs;
799 struct scsipi_periph *periph = xs->xs_periph;
800 struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
801
802 SPC_TRACE(("spc_done "));
803
804 if (xs->error == XS_NOERROR) {
805 if (acb->flags & ACB_ABORT) {
806 xs->error = XS_DRIVER_STUFFUP;
807 } else {
808 switch (acb->target_stat) {
809 case SCSI_CHECK:
810 /* First, save the return values */
811 xs->resid = acb->data_length;
812 /* FALLTHROUGH */
813 case SCSI_BUSY:
814 xs->status = acb->target_stat;
815 xs->error = XS_BUSY;
816 break;
817 case SCSI_OK:
818 xs->resid = acb->data_length;
819 break;
820 default:
821 xs->error = XS_DRIVER_STUFFUP;
822 #if SPC_DEBUG
823 printf("%s: spc_done: bad stat 0x%x\n",
824 sc->sc_dev.dv_xname, acb->target_stat);
825 #endif
826 break;
827 }
828 }
829 }
830
831 #if SPC_DEBUG
832 if ((spc_debug & SPC_SHOWMISC) != 0) {
833 if (xs->resid != 0)
834 printf("resid=%d ", xs->resid);
835 else
836 printf("error=%d\n", xs->error);
837 }
838 #endif
839
840 /*
841 * Remove the ACB from whatever queue it happens to be on.
842 */
843 if (acb->flags & ACB_NEXUS)
844 ti->lubusy &= ~(1 << periph->periph_lun);
845 if (acb == sc->sc_nexus) {
846 sc->sc_nexus = NULL;
847 sc->sc_state = SPC_IDLE;
848 spc_sched(sc);
849 } else
850 spc_dequeue(sc, acb);
851
852 spc_free_acb(sc, acb, xs->xs_control);
853 ti->cmds++;
854 scsipi_done(xs);
855 }
856
857 void
858 spc_dequeue(sc, acb)
859 struct spc_softc *sc;
860 struct spc_acb *acb;
861 {
862
863 SPC_TRACE(("spc_dequeue "));
864 if (acb->flags & ACB_NEXUS)
865 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
866 else
867 TAILQ_REMOVE(&sc->ready_list, acb, chain);
868 }
869
870 /*
871 * INTERRUPT/PROTOCOL ENGINE
872 */
873
874 /*
875 * Precondition:
876 * The SCSI bus is already in the MSGI phase and there is a message byte
877 * on the bus, along with an asserted REQ signal.
878 */
879 void
880 spc_msgin(sc)
881 struct spc_softc *sc;
882 {
883 bus_space_tag_t iot = sc->sc_iot;
884 bus_space_handle_t ioh = sc->sc_ioh;
885 int n;
886 u_int8_t msg;
887
888 SPC_TRACE(("spc_msgin "));
889
890 if (sc->sc_prevphase == PH_MSGIN) {
891 /* This is a continuation of the previous message. */
892 n = sc->sc_imp - sc->sc_imess;
893 goto nextbyte;
894 }
895
896 /* This is a new MESSAGE IN phase. Clean up our state. */
897 sc->sc_flags &= ~SPC_DROP_MSGIN;
898
899 nextmsg:
900 n = 0;
901 sc->sc_imp = &sc->sc_imess[n];
902
903 nextbyte:
904 /*
905 * Read a whole message, but don't ack the last byte. If we reject the
906 * message, we have to assert ATN during the message transfer phase
907 * itself.
908 */
909 for (;;) {
910 #ifdef NO_MANUAL_XFER /* XXX */
911 if (bus_space_read_1(iot, ioh, INTS) != 0) {
912 /*
913 * Target left MESSAGE IN, probably because it
914 * a) noticed our ATN signal, or
915 * b) ran out of messages.
916 */
917 goto out;
918 }
919 #endif
920 /* If parity error, just dump everything on the floor. */
921 if ((bus_space_read_1(iot, ioh, SERR) &
922 (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
923 sc->sc_flags |= SPC_DROP_MSGIN;
924 spc_sched_msgout(sc, SEND_PARITY_ERROR);
925 }
926
927 #ifdef NO_MANUAL_XFER /* XXX */
928 /* send TRANSFER command. */
929 bus_space_write_1(iot, ioh, TCH, 0);
930 bus_space_write_1(iot, ioh, TCM, 0);
931 bus_space_write_1(iot, ioh, TCL, 1);
932 bus_space_write_1(iot, ioh, PCTL,
933 sc->sc_phase | PCTL_BFINT_ENAB);
934 #ifdef NEED_DREQ_ON_HARDWARE_XFER
935 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);
936 #else
937 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR);
938 #endif
939 for (;;) {
940 if ((bus_space_read_1(iot, ioh, SSTS) &
941 SSTS_DREG_EMPTY) == 0)
942 break;
943 if (bus_space_read_1(iot, ioh, INTS) != 0)
944 goto out;
945 }
946 msg = bus_space_read_1(iot, ioh, DREG);
947 #else
948 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0)
949 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
950
951 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
952 /* XXX needs timeout */
953 if ((bus_space_read_1(iot, ioh, PSNS) & PH_MASK)
954 != PH_MSGIN)
955 /*
956 * Target left MESSAGE IN, probably because it
957 * a) noticed our ATN signal, or
958 * b) ran out of messages.
959 */
960 goto out;
961 }
962
963 bus_space_write_1(iot, ioh, PCTL, PH_MSGIN);
964 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK);
965 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
966 continue; /* XXX needs timeout */
967 msg = bus_space_read_1(iot, ioh, TEMP);
968 #endif
969
970 /* Gather incoming message bytes if needed. */
971 if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) {
972 if (n >= SPC_MAX_MSG_LEN) {
973 sc->sc_flags |= SPC_DROP_MSGIN;
974 spc_sched_msgout(sc, SEND_REJECT);
975 } else {
976 *sc->sc_imp++ = msg;
977 n++;
978 /*
979 * This testing is suboptimal, but most
980 * messages will be of the one byte variety, so
981 * it should not affect performance
982 * significantly.
983 */
984 if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0]))
985 break;
986 if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0]))
987 break;
988 if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) &&
989 n == sc->sc_imess[1] + 2)
990 break;
991 }
992 }
993 /*
994 * If we reach this spot we're either:
995 * a) in the middle of a multi-byte message, or
996 * b) dropping bytes.
997 */
998
999 #ifndef NO_MANUAL_XFER /* XXX */
1000 /* Ack the last byte read. */
1001 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1002 #endif
1003 }
1004
1005 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
1006
1007 /* We now have a complete message. Parse it. */
1008 switch (sc->sc_state) {
1009 struct spc_acb *acb;
1010 struct scsipi_periph *periph;
1011 struct spc_tinfo *ti;
1012
1013 case SPC_CONNECTED:
1014 SPC_ASSERT(sc->sc_nexus != NULL);
1015 acb = sc->sc_nexus;
1016 ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target];
1017
1018 switch (sc->sc_imess[0]) {
1019 case MSG_CMDCOMPLETE:
1020 if (sc->sc_dleft < 0) {
1021 periph = acb->xs->xs_periph;
1022 printf("%s: %d extra bytes from %d:%d\n",
1023 sc->sc_dev.dv_xname, -sc->sc_dleft,
1024 periph->periph_target, periph->periph_lun);
1025 sc->sc_dleft = 0;
1026 }
1027 acb->xs->resid = acb->data_length = sc->sc_dleft;
1028 sc->sc_state = SPC_CMDCOMPLETE;
1029 break;
1030
1031 case MSG_PARITY_ERROR:
1032 /* Resend the last message. */
1033 spc_sched_msgout(sc, sc->sc_lastmsg);
1034 break;
1035
1036 case MSG_MESSAGE_REJECT:
1037 SPC_MISC(("message rejected %02x ", sc->sc_lastmsg));
1038 switch (sc->sc_lastmsg) {
1039 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1040 case SEND_IDENTIFY:
1041 ti->flags &= ~(DO_SYNC | DO_WIDE);
1042 ti->period = ti->offset = 0;
1043 spc_setsync(sc, ti);
1044 ti->width = 0;
1045 break;
1046 #endif
1047 #if SPC_USE_SYNCHRONOUS
1048 case SEND_SDTR:
1049 ti->flags &= ~DO_SYNC;
1050 ti->period = ti->offset = 0;
1051 spc_setsync(sc, ti);
1052 break;
1053 #endif
1054 #if SPC_USE_WIDE
1055 case SEND_WDTR:
1056 ti->flags &= ~DO_WIDE;
1057 ti->width = 0;
1058 break;
1059 #endif
1060 case SEND_INIT_DET_ERR:
1061 spc_sched_msgout(sc, SEND_ABORT);
1062 break;
1063 }
1064 break;
1065
1066 case MSG_NOOP:
1067 break;
1068
1069 case MSG_DISCONNECT:
1070 ti->dconns++;
1071 sc->sc_state = SPC_DISCONNECT;
1072 break;
1073
1074 case MSG_SAVEDATAPOINTER:
1075 acb->data_addr = sc->sc_dp;
1076 acb->data_length = sc->sc_dleft;
1077 break;
1078
1079 case MSG_RESTOREPOINTERS:
1080 sc->sc_dp = acb->data_addr;
1081 sc->sc_dleft = acb->data_length;
1082 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1083 sc->sc_cleft = acb->scsipi_cmd_length;
1084 break;
1085
1086 case MSG_EXTENDED:
1087 switch (sc->sc_imess[2]) {
1088 #if SPC_USE_SYNCHRONOUS
1089 case MSG_EXT_SDTR:
1090 if (sc->sc_imess[1] != 3)
1091 goto reject;
1092 ti->period = sc->sc_imess[3];
1093 ti->offset = sc->sc_imess[4];
1094 ti->flags &= ~DO_SYNC;
1095 if (ti->offset == 0) {
1096 } else if (ti->period < sc->sc_minsync ||
1097 ti->period > sc->sc_maxsync ||
1098 ti->offset > 8) {
1099 ti->period = ti->offset = 0;
1100 spc_sched_msgout(sc, SEND_SDTR);
1101 } else {
1102 scsipi_printaddr(acb->xs->xs_periph);
1103 printf("sync, offset %d, "
1104 "period %dnsec\n",
1105 ti->offset, ti->period * 4);
1106 }
1107 spc_setsync(sc, ti);
1108 break;
1109 #endif
1110
1111 #if SPC_USE_WIDE
1112 case MSG_EXT_WDTR:
1113 if (sc->sc_imess[1] != 2)
1114 goto reject;
1115 ti->width = sc->sc_imess[3];
1116 ti->flags &= ~DO_WIDE;
1117 if (ti->width == 0) {
1118 } else if (ti->width > SPC_MAX_WIDTH) {
1119 ti->width = 0;
1120 spc_sched_msgout(sc, SEND_WDTR);
1121 } else {
1122 scsipi_printaddr(acb->xs->xs_periph);
1123 printf("wide, width %d\n",
1124 1 << (3 + ti->width));
1125 }
1126 break;
1127 #endif
1128
1129 default:
1130 printf("%s: unrecognized MESSAGE EXTENDED; "
1131 "sending REJECT\n", sc->sc_dev.dv_xname);
1132 SPC_BREAK();
1133 goto reject;
1134 }
1135 break;
1136
1137 default:
1138 printf("%s: unrecognized MESSAGE; sending REJECT\n",
1139 sc->sc_dev.dv_xname);
1140 SPC_BREAK();
1141 reject:
1142 spc_sched_msgout(sc, SEND_REJECT);
1143 break;
1144 }
1145 break;
1146
1147 case SPC_RESELECTED:
1148 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
1149 printf("%s: reselect without IDENTIFY; "
1150 "sending DEVICE RESET\n", sc->sc_dev.dv_xname);
1151 SPC_BREAK();
1152 goto reset;
1153 }
1154
1155 (void) spc_reselect(sc, sc->sc_imess[0]);
1156 break;
1157
1158 default:
1159 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1160 sc->sc_dev.dv_xname);
1161 SPC_BREAK();
1162 reset:
1163 spc_sched_msgout(sc, SEND_DEV_RESET);
1164 break;
1165
1166 #ifdef notdef
1167 abort:
1168 spc_sched_msgout(sc, SEND_ABORT);
1169 break;
1170 #endif
1171 }
1172
1173 #ifndef NO_MANUAL_XFER /* XXX */
1174 /* Ack the last message byte. */
1175 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1176 #endif
1177
1178 /* Go get the next message, if any. */
1179 goto nextmsg;
1180
1181 out:
1182 #ifndef NO_MANUAL_XFER /* XXX */
1183 /* Ack the last message byte. */
1184 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1185 #endif
1186 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
1187 }
1188
1189 /*
1190 * Send the highest priority, scheduled message.
1191 */
1192 void
1193 spc_msgout(sc)
1194 struct spc_softc *sc;
1195 {
1196 bus_space_tag_t iot = sc->sc_iot;
1197 bus_space_handle_t ioh = sc->sc_ioh;
1198 #if SPC_USE_SYNCHRONOUS
1199 struct spc_tinfo *ti;
1200 #endif
1201 int n;
1202
1203 SPC_TRACE(("spc_msgout "));
1204
1205 if (sc->sc_prevphase == PH_MSGOUT) {
1206 if (sc->sc_omp == sc->sc_omess) {
1207 /*
1208 * This is a retransmission.
1209 *
1210 * We get here if the target stayed in MESSAGE OUT
1211 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates
1212 * that all of the previously transmitted messages must
1213 * be sent again, in the same order. Therefore, we
1214 * requeue all the previously transmitted messages, and
1215 * start again from the top. Our simple priority
1216 * scheme keeps the messages in the right order.
1217 */
1218 SPC_MISC(("retransmitting "));
1219 sc->sc_msgpriq |= sc->sc_msgoutq;
1220 /*
1221 * Set ATN. If we're just sending a trivial 1-byte
1222 * message, we'll clear ATN later on anyway.
1223 */
1224 bus_space_write_1(iot, ioh, SCMD,
1225 SCMD_SET_ATN); /* XXX? */
1226 } else {
1227 /* This is a continuation of the previous message. */
1228 n = sc->sc_omp - sc->sc_omess;
1229 goto nextbyte;
1230 }
1231 }
1232
1233 /* No messages transmitted so far. */
1234 sc->sc_msgoutq = 0;
1235 sc->sc_lastmsg = 0;
1236
1237 nextmsg:
1238 /* Pick up highest priority message. */
1239 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
1240 sc->sc_msgpriq &= ~sc->sc_currmsg;
1241 sc->sc_msgoutq |= sc->sc_currmsg;
1242
1243 /* Build the outgoing message data. */
1244 switch (sc->sc_currmsg) {
1245 case SEND_IDENTIFY:
1246 SPC_ASSERT(sc->sc_nexus != NULL);
1247 sc->sc_omess[0] =
1248 MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1);
1249 n = 1;
1250 break;
1251
1252 #if SPC_USE_SYNCHRONOUS
1253 case SEND_SDTR:
1254 SPC_ASSERT(sc->sc_nexus != NULL);
1255 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
1256 sc->sc_omess[4] = MSG_EXTENDED;
1257 sc->sc_omess[3] = MSG_EXT_SDTR_LEN;
1258 sc->sc_omess[2] = MSG_EXT_SDTR;
1259 sc->sc_omess[1] = ti->period >> 2;
1260 sc->sc_omess[0] = ti->offset;
1261 n = 5;
1262 break;
1263 #endif
1264
1265 #if SPC_USE_WIDE
1266 case SEND_WDTR:
1267 SPC_ASSERT(sc->sc_nexus != NULL);
1268 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
1269 sc->sc_omess[3] = MSG_EXTENDED;
1270 sc->sc_omess[2] = MSG_EXT_WDTR_LEN;
1271 sc->sc_omess[1] = MSG_EXT_WDTR;
1272 sc->sc_omess[0] = ti->width;
1273 n = 4;
1274 break;
1275 #endif
1276
1277 case SEND_DEV_RESET:
1278 sc->sc_flags |= SPC_ABORTING;
1279 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1280 n = 1;
1281 break;
1282
1283 case SEND_REJECT:
1284 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1285 n = 1;
1286 break;
1287
1288 case SEND_PARITY_ERROR:
1289 sc->sc_omess[0] = MSG_PARITY_ERROR;
1290 n = 1;
1291 break;
1292
1293 case SEND_INIT_DET_ERR:
1294 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1295 n = 1;
1296 break;
1297
1298 case SEND_ABORT:
1299 sc->sc_flags |= SPC_ABORTING;
1300 sc->sc_omess[0] = MSG_ABORT;
1301 n = 1;
1302 break;
1303
1304 default:
1305 printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
1306 sc->sc_dev.dv_xname);
1307 SPC_BREAK();
1308 sc->sc_omess[0] = MSG_NOOP;
1309 n = 1;
1310 break;
1311 }
1312 sc->sc_omp = &sc->sc_omess[n];
1313
1314 nextbyte:
1315 /* Send message bytes. */
1316 /* send TRANSFER command. */
1317 bus_space_write_1(iot, ioh, TCH, n >> 16);
1318 bus_space_write_1(iot, ioh, TCM, n >> 8);
1319 bus_space_write_1(iot, ioh, TCL, n);
1320 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1321 #ifdef NEED_DREQ_ON_HARDWARE_XFER
1322 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */
1323 #else
1324 bus_space_write_1(iot, ioh, SCMD,
1325 SCMD_XFR | SCMD_PROG_XFR);
1326 #endif
1327 for (;;) {
1328 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1329 break;
1330 if (bus_space_read_1(iot, ioh, INTS) != 0)
1331 goto out;
1332 }
1333 for (;;) {
1334 #if 0
1335 for (;;) {
1336 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
1337 break;
1338 /* Wait for REQINIT. XXX Need timeout. */
1339 }
1340 #endif
1341 if (bus_space_read_1(iot, ioh, INTS) != 0) {
1342 /*
1343 * Target left MESSAGE OUT, possibly to reject
1344 * our message.
1345 *
1346 * If this is the last message being sent, then we
1347 * deassert ATN, since either the target is going to
1348 * ignore this message, or it's going to ask for a
1349 * retransmission via MESSAGE PARITY ERROR (in which
1350 * case we reassert ATN anyway).
1351 */
1352 #if 0
1353 if (sc->sc_msgpriq == 0)
1354 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1355 #endif
1356 goto out;
1357 }
1358
1359 #if 0
1360 /* Clear ATN before last byte if this is the last message. */
1361 if (n == 1 && sc->sc_msgpriq == 0)
1362 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1363 #endif
1364
1365 while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0)
1366 ;
1367 /* Send message byte. */
1368 bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp);
1369 --n;
1370 /* Keep track of the last message we've sent any bytes of. */
1371 sc->sc_lastmsg = sc->sc_currmsg;
1372 #if 0
1373 /* Wait for ACK to be negated. XXX Need timeout. */
1374 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1375 ;
1376 #endif
1377
1378 if (n == 0)
1379 break;
1380 }
1381
1382 /* We get here only if the entire message has been transmitted. */
1383 if (sc->sc_msgpriq != 0) {
1384 /* There are more outgoing messages. */
1385 goto nextmsg;
1386 }
1387
1388 /*
1389 * The last message has been transmitted. We need to remember the last
1390 * message transmitted (in case the target switches to MESSAGE IN phase
1391 * and sends a MESSAGE REJECT), and the list of messages transmitted
1392 * this time around (in case the target stays in MESSAGE OUT phase to
1393 * request a retransmit).
1394 */
1395
1396 out:
1397 /* Disable REQ/ACK protocol. */
1398 return;
1399 }
1400
1401 /*
1402 * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc
1403 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
1404 * and ACK deasserted (i.e. waiting for a data byte)
1405 *
1406 * This new revision has been optimized (I tried) to make the common case fast,
1407 * and the rarer cases (as a result) somewhat more comlex
1408 */
1409 int
1410 spc_dataout_pio(sc, p, n)
1411 struct spc_softc *sc;
1412 u_char *p;
1413 int n;
1414 {
1415 bus_space_tag_t iot = sc->sc_iot;
1416 bus_space_handle_t ioh = sc->sc_ioh;
1417 u_char intstat = 0;
1418 int out = 0;
1419 #define DOUTAMOUNT 8 /* Full FIFO */
1420
1421 SPC_TRACE(("spc_dataout_pio "));
1422 /* send TRANSFER command. */
1423 bus_space_write_1(iot, ioh, TCH, n >> 16);
1424 bus_space_write_1(iot, ioh, TCM, n >> 8);
1425 bus_space_write_1(iot, ioh, TCL, n);
1426 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1427 #ifdef NEED_DREQ_ON_HARDWARE_XFER
1428 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */
1429 #else
1430 bus_space_write_1(iot, ioh, SCMD,
1431 SCMD_XFR | SCMD_PROG_XFR); /* XXX */
1432 #endif
1433 for (;;) {
1434 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1435 break;
1436 if (bus_space_read_1(iot, ioh, INTS) != 0)
1437 break;
1438 }
1439
1440 /*
1441 * I have tried to make the main loop as tight as possible. This
1442 * means that some of the code following the loop is a bit more
1443 * complex than otherwise.
1444 */
1445 while (n > 0) {
1446 int xfer;
1447
1448 for (;;) {
1449 intstat = bus_space_read_1(iot, ioh, INTS);
1450 /* Wait till buffer is empty. */
1451 if ((bus_space_read_1(iot, ioh, SSTS) &
1452 SSTS_DREG_EMPTY) != 0)
1453 break;
1454 /* Break on interrupt. */
1455 if (intstat != 0)
1456 goto phasechange;
1457 }
1458
1459 xfer = min(DOUTAMOUNT, n);
1460
1461 SPC_MISC(("%d> ", xfer));
1462
1463 n -= xfer;
1464 out += xfer;
1465
1466 bus_space_write_multi_1(iot, ioh, DREG, p, xfer);
1467 p += xfer;
1468 }
1469
1470 if (out == 0) {
1471 for (;;) {
1472 if (bus_space_read_1(iot, ioh, INTS) != 0)
1473 break;
1474 }
1475 SPC_MISC(("extra data "));
1476 } else {
1477 /* See the bytes off chip */
1478 for (;;) {
1479 /* Wait till buffer is empty. */
1480 if ((bus_space_read_1(iot, ioh, SSTS) &
1481 SSTS_DREG_EMPTY) != 0)
1482 break;
1483 intstat = bus_space_read_1(iot, ioh, INTS);
1484 /* Break on interrupt. */
1485 if (intstat != 0)
1486 goto phasechange;
1487 }
1488 }
1489
1490 phasechange:
1491 /* Stop the FIFO data path. */
1492
1493 if (intstat != 0) {
1494 /* Some sort of phase change. */
1495 int amount;
1496
1497 amount = (bus_space_read_1(iot, ioh, TCH) << 16) |
1498 (bus_space_read_1(iot, ioh, TCM) << 8) |
1499 bus_space_read_1(iot, ioh, TCL);
1500 if (amount > 0) {
1501 out -= amount;
1502 SPC_MISC(("+%d ", amount));
1503 }
1504 }
1505
1506 return out;
1507 }
1508
1509 /*
1510 * spc_datain_pio: perform data transfers using the FIFO datapath in the spc
1511 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
1512 * and ACK deasserted (i.e. at least one byte is ready).
1513 *
1514 * For now, uses a pretty dumb algorithm, hangs around until all data has been
1515 * transferred. This, is OK for fast targets, but not so smart for slow
1516 * targets which don't disconnect or for huge transfers.
1517 */
1518 int
1519 spc_datain_pio(sc, p, n)
1520 struct spc_softc *sc;
1521 u_char *p;
1522 int n;
1523 {
1524 bus_space_tag_t iot = sc->sc_iot;
1525 bus_space_handle_t ioh = sc->sc_ioh;
1526 int in = 0;
1527 u_int8_t intstat, sstat;
1528 #define DINAMOUNT 8 /* Full FIFO */
1529
1530 SPC_TRACE(("spc_datain_pio "));
1531 /* send TRANSFER command. */
1532 bus_space_write_1(iot, ioh, TCH, n >> 16);
1533 bus_space_write_1(iot, ioh, TCM, n >> 8);
1534 bus_space_write_1(iot, ioh, TCL, n);
1535 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1536 #ifdef NEED_DREQ_ON_HARDWARE_XFER
1537 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */
1538 #else
1539 bus_space_write_1(iot, ioh, SCMD,
1540 SCMD_XFR | SCMD_PROG_XFR); /* XXX */
1541 #endif
1542 for (;;) {
1543 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1544 break;
1545 if (bus_space_read_1(iot, ioh, INTS) != 0)
1546 goto phasechange;
1547 }
1548
1549 /*
1550 * We leave this loop if one or more of the following is true:
1551 * a) phase != PH_DATAIN && FIFOs are empty
1552 * b) reset has occurred or busfree is detected.
1553 */
1554 while (n > 0) {
1555 int xfer;
1556
1557 /* Wait for fifo half full or phase mismatch */
1558 for (;;) {
1559 /* XXX needs timeout */
1560 intstat = bus_space_read_1(iot, ioh, INTS);
1561 sstat = bus_space_read_1(iot, ioh, SSTS);
1562 if (intstat != 0 ||
1563 (sstat & SSTS_DREG_EMPTY) == 0)
1564 break;
1565 }
1566
1567 if (sstat & SSTS_DREG_FULL) {
1568 xfer = DINAMOUNT;
1569 n -= xfer;
1570 in += xfer;
1571 bus_space_read_multi_1(iot, ioh, DREG, p, xfer);
1572 p += xfer;
1573 }
1574 while (n > 0 &&
1575 (bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) == 0) {
1576 n--;
1577 in++;
1578 *p++ = bus_space_read_1(iot, ioh, DREG);
1579 }
1580
1581 if (intstat != 0)
1582 goto phasechange;
1583 }
1584
1585 /*
1586 * Some SCSI-devices are rude enough to transfer more data than what
1587 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
1588 * requested 512. Test for progress, i.e. real transfers. If no real
1589 * transfers have been performed (n is probably already zero) and the
1590 * FIFO is not empty, waste some bytes....
1591 */
1592 if (in == 0) {
1593 for (;;) {
1594 /* XXX needs timeout */
1595 if (bus_space_read_1(iot, ioh, INTS) != 0)
1596 break;
1597 }
1598 SPC_MISC(("extra data "));
1599 }
1600
1601 phasechange:
1602 /* Stop the FIFO data path. */
1603
1604 return in;
1605 }
1606
1607 /*
1608 * Catch an interrupt from the adaptor
1609 */
1610 /*
1611 * This is the workhorse routine of the driver.
1612 * Deficiencies (for now):
1613 * 1) always uses programmed I/O
1614 */
1615 int
1616 spc_intr(arg)
1617 void *arg;
1618 {
1619 struct spc_softc *sc = arg;
1620 bus_space_tag_t iot = sc->sc_iot;
1621 bus_space_handle_t ioh = sc->sc_ioh;
1622 u_char ints;
1623 struct spc_acb *acb;
1624 struct scsipi_periph *periph;
1625 struct spc_tinfo *ti;
1626 int n;
1627
1628 /*
1629 * Disable interrupt.
1630 */
1631 bus_space_write_1(iot, ioh, SCTL,
1632 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB);
1633
1634 SPC_TRACE(("spc_intr "));
1635
1636 loop:
1637 /*
1638 * Loop until transfer completion.
1639 */
1640 /*
1641 * First check for abnormal conditions, such as reset.
1642 */
1643 #ifdef x68k /* XXX? */
1644 while ((ints = bus_space_read_1(iot, ioh, INTS)) == 0)
1645 delay(1);
1646 SPC_MISC(("ints = 0x%x ", ints));
1647 #else
1648 ints = bus_space_read_1(iot, ioh, INTS);
1649 SPC_MISC(("ints = 0x%x ", ints));
1650 #endif
1651
1652 if ((ints & INTS_RST) != 0) {
1653 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
1654 goto reset;
1655 }
1656
1657 /*
1658 * Check for less serious errors.
1659 */
1660 if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR))
1661 != 0) {
1662 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
1663 if (sc->sc_prevphase == PH_MSGIN) {
1664 sc->sc_flags |= SPC_DROP_MSGIN;
1665 spc_sched_msgout(sc, SEND_PARITY_ERROR);
1666 } else
1667 spc_sched_msgout(sc, SEND_INIT_DET_ERR);
1668 }
1669
1670 /*
1671 * If we're not already busy doing something test for the following
1672 * conditions:
1673 * 1) We have been reselected by something
1674 * 2) We have selected something successfully
1675 * 3) Our selection process has timed out
1676 * 4) This is really a bus free interrupt just to get a new command
1677 * going?
1678 * 5) Spurious interrupt?
1679 */
1680 switch (sc->sc_state) {
1681 case SPC_IDLE:
1682 case SPC_SELECTING:
1683 SPC_MISC(("ints:0x%02x ", ints));
1684
1685 if ((ints & INTS_SEL) != 0) {
1686 /*
1687 * We don't currently support target mode.
1688 */
1689 printf("%s: target mode selected; going to BUS FREE\n",
1690 sc->sc_dev.dv_xname);
1691
1692 goto sched;
1693 } else if ((ints & INTS_RESEL) != 0) {
1694 SPC_MISC(("reselected "));
1695
1696 /*
1697 * If we're trying to select a target ourselves,
1698 * push our command back into the ready list.
1699 */
1700 if (sc->sc_state == SPC_SELECTING) {
1701 SPC_MISC(("backoff selector "));
1702 SPC_ASSERT(sc->sc_nexus != NULL);
1703 acb = sc->sc_nexus;
1704 sc->sc_nexus = NULL;
1705 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
1706 }
1707
1708 /* Save reselection ID. */
1709 sc->sc_selid = bus_space_read_1(iot, ioh, TEMP);
1710
1711 sc->sc_state = SPC_RESELECTED;
1712 } else if ((ints & INTS_CMD_DONE) != 0) {
1713 SPC_MISC(("selected "));
1714
1715 /*
1716 * We have selected a target. Things to do:
1717 * a) Determine what message(s) to send.
1718 * b) Verify that we're still selecting the target.
1719 * c) Mark device as busy.
1720 */
1721 if (sc->sc_state != SPC_SELECTING) {
1722 printf("%s: selection out while idle; "
1723 "resetting\n", sc->sc_dev.dv_xname);
1724 SPC_BREAK();
1725 goto reset;
1726 }
1727 SPC_ASSERT(sc->sc_nexus != NULL);
1728 acb = sc->sc_nexus;
1729 periph = acb->xs->xs_periph;
1730 ti = &sc->sc_tinfo[periph->periph_target];
1731
1732 sc->sc_msgpriq = SEND_IDENTIFY;
1733 if (acb->flags & ACB_RESET)
1734 sc->sc_msgpriq |= SEND_DEV_RESET;
1735 else if (acb->flags & ACB_ABORT)
1736 sc->sc_msgpriq |= SEND_ABORT;
1737 else {
1738 #if SPC_USE_SYNCHRONOUS
1739 if ((ti->flags & DO_SYNC) != 0)
1740 sc->sc_msgpriq |= SEND_SDTR;
1741 #endif
1742 #if SPC_USE_WIDE
1743 if ((ti->flags & DO_WIDE) != 0)
1744 sc->sc_msgpriq |= SEND_WDTR;
1745 #endif
1746 }
1747
1748 acb->flags |= ACB_NEXUS;
1749 ti->lubusy |= (1 << periph->periph_lun);
1750
1751 /* Do an implicit RESTORE POINTERS. */
1752 sc->sc_dp = acb->data_addr;
1753 sc->sc_dleft = acb->data_length;
1754 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1755 sc->sc_cleft = acb->scsipi_cmd_length;
1756
1757 /* On our first connection, schedule a timeout. */
1758 if ((acb->xs->xs_control & XS_CTL_POLL) == 0)
1759 callout_reset(&acb->xs->xs_callout,
1760 mstohz(acb->timeout), spc_timeout, acb);
1761
1762 sc->sc_state = SPC_CONNECTED;
1763 } else if ((ints & INTS_TIMEOUT) != 0) {
1764 SPC_MISC(("selection timeout "));
1765
1766 if (sc->sc_state != SPC_SELECTING) {
1767 printf("%s: selection timeout while idle; "
1768 "resetting\n", sc->sc_dev.dv_xname);
1769 SPC_BREAK();
1770 goto reset;
1771 }
1772 SPC_ASSERT(sc->sc_nexus != NULL);
1773 acb = sc->sc_nexus;
1774
1775 delay(250);
1776
1777 acb->xs->error = XS_SELTIMEOUT;
1778 goto finish;
1779 } else {
1780 if (sc->sc_state != SPC_IDLE) {
1781 printf("%s: BUS FREE while not idle; "
1782 "state=%d\n",
1783 sc->sc_dev.dv_xname, sc->sc_state);
1784 SPC_BREAK();
1785 goto out;
1786 }
1787
1788 goto sched;
1789 }
1790
1791 /*
1792 * Turn off selection stuff, and prepare to catch bus free
1793 * interrupts, parity errors, and phase changes.
1794 */
1795
1796 sc->sc_flags = 0;
1797 sc->sc_prevphase = PH_INVALID;
1798 goto dophase;
1799 }
1800
1801 if ((ints & INTS_DISCON) != 0) {
1802 /* We've gone to BUS FREE phase. */
1803 /* disable disconnect interrupt */
1804 bus_space_write_1(iot, ioh, PCTL,
1805 bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB);
1806 /* XXX reset interrput */
1807 bus_space_write_1(iot, ioh, INTS, ints);
1808
1809 switch (sc->sc_state) {
1810 case SPC_RESELECTED:
1811 goto sched;
1812
1813 case SPC_CONNECTED:
1814 SPC_ASSERT(sc->sc_nexus != NULL);
1815 acb = sc->sc_nexus;
1816
1817 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1818 if (sc->sc_prevphase == PH_MSGOUT) {
1819 /*
1820 * If the target went to BUS FREE phase during
1821 * or immediately after sending a SDTR or WDTR
1822 * message, disable negotiation.
1823 */
1824 periph = acb->xs->xs_periph;
1825 ti = &sc->sc_tinfo[periph->periph_target];
1826 switch (sc->sc_lastmsg) {
1827 #if SPC_USE_SYNCHRONOUS
1828 case SEND_SDTR:
1829 ti->flags &= ~DO_SYNC;
1830 ti->period = ti->offset = 0;
1831 break;
1832 #endif
1833 #if SPC_USE_WIDE
1834 case SEND_WDTR:
1835 ti->flags &= ~DO_WIDE;
1836 ti->width = 0;
1837 break;
1838 #endif
1839 }
1840 }
1841 #endif
1842
1843 if ((sc->sc_flags & SPC_ABORTING) == 0) {
1844 /*
1845 * Section 5.1.1 of the SCSI 2 spec suggests
1846 * issuing a REQUEST SENSE following an
1847 * unexpected disconnect. Some devices go into
1848 * a contingent allegiance condition when
1849 * disconnecting, and this is necessary to
1850 * clean up their state.
1851 */
1852 printf("%s: unexpected disconnect; "
1853 "sending REQUEST SENSE\n",
1854 sc->sc_dev.dv_xname);
1855 SPC_BREAK();
1856 acb->target_stat = SCSI_CHECK;
1857 acb->xs->error = XS_NOERROR;
1858 goto finish;
1859 }
1860
1861 acb->xs->error = XS_DRIVER_STUFFUP;
1862 goto finish;
1863
1864 case SPC_DISCONNECT:
1865 SPC_ASSERT(sc->sc_nexus != NULL);
1866 acb = sc->sc_nexus;
1867 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
1868 sc->sc_nexus = NULL;
1869 goto sched;
1870
1871 case SPC_CMDCOMPLETE:
1872 SPC_ASSERT(sc->sc_nexus != NULL);
1873 acb = sc->sc_nexus;
1874 goto finish;
1875 }
1876 }
1877 else if ((ints & INTS_CMD_DONE) != 0 &&
1878 sc->sc_prevphase == PH_MSGIN &&
1879 sc->sc_state != SPC_CONNECTED)
1880 goto out;
1881
1882 dophase:
1883 #if 0
1884 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
1885 /* Wait for REQINIT. */
1886 goto out;
1887 }
1888 #else
1889 bus_space_write_1(iot, ioh, INTS, ints);
1890 ints = 0;
1891 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
1892 delay(1); /* need timeout XXX */
1893 #endif
1894
1895 /*
1896 * State transition.
1897 */
1898 sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK;
1899 #if 0
1900 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase);
1901 #endif
1902
1903 SPC_MISC(("phase=%d\n", sc->sc_phase));
1904 switch (sc->sc_phase) {
1905 case PH_MSGOUT:
1906 if (sc->sc_state != SPC_CONNECTED &&
1907 sc->sc_state != SPC_RESELECTED)
1908 break;
1909 spc_msgout(sc);
1910 sc->sc_prevphase = PH_MSGOUT;
1911 goto loop;
1912
1913 case PH_MSGIN:
1914 if (sc->sc_state != SPC_CONNECTED &&
1915 sc->sc_state != SPC_RESELECTED)
1916 break;
1917 spc_msgin(sc);
1918 sc->sc_prevphase = PH_MSGIN;
1919 goto loop;
1920
1921 case PH_CMD:
1922 if (sc->sc_state != SPC_CONNECTED)
1923 break;
1924 #if SPC_DEBUG
1925 if ((spc_debug & SPC_SHOWMISC) != 0) {
1926 SPC_ASSERT(sc->sc_nexus != NULL);
1927 acb = sc->sc_nexus;
1928 printf("cmd=0x%02x+%d ",
1929 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length - 1);
1930 }
1931 #endif
1932 n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
1933 sc->sc_cp += n;
1934 sc->sc_cleft -= n;
1935 sc->sc_prevphase = PH_CMD;
1936 goto loop;
1937
1938 case PH_DATAOUT:
1939 if (sc->sc_state != SPC_CONNECTED)
1940 break;
1941 SPC_MISC(("dataout dleft=%d ", sc->sc_dleft));
1942 n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
1943 sc->sc_dp += n;
1944 sc->sc_dleft -= n;
1945 sc->sc_prevphase = PH_DATAOUT;
1946 goto loop;
1947
1948 case PH_DATAIN:
1949 if (sc->sc_state != SPC_CONNECTED)
1950 break;
1951 SPC_MISC(("datain "));
1952 n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
1953 sc->sc_dp += n;
1954 sc->sc_dleft -= n;
1955 sc->sc_prevphase = PH_DATAIN;
1956 goto loop;
1957
1958 case PH_STAT:
1959 if (sc->sc_state != SPC_CONNECTED)
1960 break;
1961 SPC_ASSERT(sc->sc_nexus != NULL);
1962 acb = sc->sc_nexus;
1963
1964 #ifdef NO_MANUAL_XFER
1965 spc_datain_pio(sc, &acb->target_stat, 1);
1966 #else
1967 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0)
1968 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1969 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
1970 continue; /* XXX needs timeout */
1971 bus_space_write_1(iot, ioh, PCTL, PH_STAT);
1972 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK);
1973 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
1974 continue; /* XXX needs timeout */
1975 acb->target_stat = bus_space_read_1(iot, ioh, TEMP);
1976 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1977 #endif
1978
1979 SPC_MISC(("target_stat=0x%02x ", acb->target_stat));
1980 sc->sc_prevphase = PH_STAT;
1981 goto loop;
1982 }
1983
1984 printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname);
1985 SPC_BREAK();
1986 reset:
1987 spc_init(sc);
1988 return 1;
1989
1990 finish:
1991 callout_stop(&acb->xs->xs_callout);
1992 bus_space_write_1(iot, ioh, INTS, ints);
1993 ints = 0;
1994 spc_done(sc, acb);
1995 goto out;
1996
1997 sched:
1998 sc->sc_state = SPC_IDLE;
1999 spc_sched(sc);
2000 goto out;
2001
2002 out:
2003 if (ints)
2004 bus_space_write_1(iot, ioh, INTS, ints);
2005 bus_space_write_1(iot, ioh, SCTL,
2006 bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB);
2007 return 1;
2008 }
2009
2010 void
2011 spc_abort(sc, acb)
2012 struct spc_softc *sc;
2013 struct spc_acb *acb;
2014 {
2015
2016 /* 2 secs for the abort */
2017 acb->timeout = SPC_ABORT_TIMEOUT;
2018 acb->flags |= ACB_ABORT;
2019
2020 if (acb == sc->sc_nexus) {
2021 /*
2022 * If we're still selecting, the message will be scheduled
2023 * after selection is complete.
2024 */
2025 if (sc->sc_state == SPC_CONNECTED)
2026 spc_sched_msgout(sc, SEND_ABORT);
2027 } else {
2028 spc_dequeue(sc, acb);
2029 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
2030 if (sc->sc_state == SPC_IDLE)
2031 spc_sched(sc);
2032 }
2033 }
2034
2035 void
2036 spc_timeout(arg)
2037 void *arg;
2038 {
2039 struct spc_acb *acb = arg;
2040 struct scsipi_xfer *xs = acb->xs;
2041 struct scsipi_periph *periph = xs->xs_periph;
2042 struct spc_softc *sc;
2043 int s;
2044
2045 sc = (void *)periph->periph_channel->chan_adapter->adapt_dev;
2046 scsipi_printaddr(periph);
2047 printf("timed out");
2048
2049 s = splbio();
2050
2051 if (acb->flags & ACB_ABORT) {
2052 /* abort timed out */
2053 printf(" AGAIN\n");
2054 /* XXX Must reset! */
2055 } else {
2056 /* abort the operation that has timed out */
2057 printf("\n");
2058 acb->xs->error = XS_TIMEOUT;
2059 spc_abort(sc, acb);
2060 }
2061
2062 splx(s);
2063 }
2064
2065 #ifdef SPC_DEBUG
2066 /*
2067 * The following functions are mostly used for debugging purposes, either
2068 * directly called from the driver or from the kernel debugger.
2069 */
2070
2071 void
2072 spc_show_scsi_cmd(acb)
2073 struct spc_acb *acb;
2074 {
2075 u_char *b = (u_char *)&acb->scsipi_cmd;
2076 int i;
2077
2078 scsipi_printaddr(acb->xs->xs_periph);
2079 if ((acb->xs->xs_control & XS_CTL_RESET) == 0) {
2080 for (i = 0; i < acb->scsipi_cmd_length; i++) {
2081 if (i)
2082 printf(",");
2083 printf("%x", b[i]);
2084 }
2085 printf("\n");
2086 } else
2087 printf("RESET\n");
2088 }
2089
2090 void
2091 spc_print_acb(acb)
2092 struct spc_acb *acb;
2093 {
2094
2095 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
2096 printf(" dp=%p dleft=%d target_stat=%x\n",
2097 acb->data_addr, acb->data_length, acb->target_stat);
2098 spc_show_scsi_cmd(acb);
2099 }
2100
2101 void
2102 spc_print_active_acb()
2103 {
2104 struct spc_acb *acb;
2105 struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */
2106
2107 printf("ready list:\n");
2108 TAILQ_FOREACH(acb, &sc->ready_list, chain)
2109 spc_print_acb(acb);
2110 printf("nexus:\n");
2111 if (sc->sc_nexus != NULL)
2112 spc_print_acb(sc->sc_nexus);
2113 printf("nexus list:\n");
2114 TAILQ_FOREACH(acb, &sc->nexus_list, chain)
2115 spc_print_acb(acb);
2116 }
2117
2118 void
2119 spc_dump89352(sc)
2120 struct spc_softc *sc;
2121 {
2122 bus_space_tag_t iot = sc->sc_iot;
2123 bus_space_handle_t ioh = sc->sc_ioh;
2124
2125 printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n",
2126 bus_space_read_1(iot, ioh, BDID),
2127 bus_space_read_1(iot, ioh, SCTL),
2128 bus_space_read_1(iot, ioh, SCMD),
2129 bus_space_read_1(iot, ioh, TMOD));
2130 printf(" INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n",
2131 bus_space_read_1(iot, ioh, INTS),
2132 bus_space_read_1(iot, ioh, PSNS),
2133 bus_space_read_1(iot, ioh, SSTS),
2134 bus_space_read_1(iot, ioh, SERR),
2135 bus_space_read_1(iot, ioh, PCTL));
2136 printf(" MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n",
2137 bus_space_read_1(iot, ioh, MBC),
2138 #if 0
2139 bus_space_read_1(iot, ioh, DREG),
2140 #else
2141 0,
2142 #endif
2143 bus_space_read_1(iot, ioh, TEMP),
2144 bus_space_read_1(iot, ioh, TCH),
2145 bus_space_read_1(iot, ioh, TCM));
2146 printf(" TCL=%x EXBF=%x\n",
2147 bus_space_read_1(iot, ioh, TCL),
2148 bus_space_read_1(iot, ioh, EXBF));
2149 }
2150
2151 void
2152 spc_dump_driver(sc)
2153 struct spc_softc *sc;
2154 {
2155 struct spc_tinfo *ti;
2156 int i;
2157
2158 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
2159 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x "
2160 "currmsg=%x\n", sc->sc_state, sc->sc_imess[0],
2161 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
2162 for (i = 0; i < 7; i++) {
2163 ti = &sc->sc_tinfo[i];
2164 printf("tinfo%d: %d cmds %d disconnects %d timeouts",
2165 i, ti->cmds, ti->dconns, ti->touts);
2166 printf(" %d senses flags=%x\n", ti->senses, ti->flags);
2167 }
2168 }
2169 #endif
2170