mb89352.c revision 1.4.2.2 1 /* $NetBSD: mb89352.c,v 1.4.2.2 2000/11/20 11:40:44 bouyer Exp $ */
2 /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */
3
4 #ifdef DDB
5 #define integrate
6 #else
7 #define integrate __inline static
8 #endif
9
10 /*-
11 * Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc.
12 * All rights reserved.
13 *
14 * This code is derived from software contributed to The NetBSD Foundation
15 * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions
19 * are met:
20 * 1. Redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer.
22 * 2. Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution.
25 * 3. All advertising materials mentioning features or use of this software
26 * must display the following acknowledgement:
27 * This product includes software developed by Charles M. Hannum.
28 * 4. The name of the author may not be used to endorse or promote products
29 * derived from this software without specific prior written permission.
30 *
31 * Copyright (c) 1994 Jarle Greipsland
32 * All rights reserved.
33 *
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
36 * are met:
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
44 *
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
47 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
48 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
49 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
50 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
51 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
53 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
54 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
55 * POSSIBILITY OF SUCH DAMAGE.
56 */
57 /*
58 * [NetBSD for NEC PC-98 series]
59 * Copyright (c) 1996, 1997, 1998
60 * NetBSD/pc98 porting staff. All rights reserved.
61 * Copyright (c) 1996, 1997, 1998
62 * Kouichi Matsuda. All rights reserved.
63 */
64
65 /*
66 * Acknowledgements: Many of the algorithms used in this driver are
67 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
68 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
69 */
70
71 /* TODO list:
72 * 1) Get the DMA stuff working.
73 * 2) Get the iov/uio stuff working. Is this a good thing ???
74 * 3) Get the synch stuff working.
75 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
76 */
77
78 /*
79 * A few customizable items:
80 */
81
82 /* Use doubleword transfers to/from SCSI chip. Note: This requires
83 * motherboard support. Basicly, some motherboard chipsets are able to
84 * split a 32 bit I/O operation into two 16 bit I/O operations,
85 * transparently to the processor. This speeds up some things, notably long
86 * data transfers.
87 */
88 #define SPC_USE_DWORDS 0
89
90 /* Synchronous data transfers? */
91 #define SPC_USE_SYNCHRONOUS 0
92 #define SPC_SYNC_REQ_ACK_OFS 8
93
94 /* Wide data transfers? */
95 #define SPC_USE_WIDE 0
96 #define SPC_MAX_WIDTH 0
97
98 /* Max attempts made to transmit a message */
99 #define SPC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */
100
101 /*
102 * Some spin loop parameters (essentially how long to wait some places)
103 * The problem(?) is that sometimes we expect either to be able to transmit a
104 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid
105 * returning from the interrupt just to get yanked back for the next byte we
106 * may spin in the interrupt routine waiting for this byte to come. How long?
107 * This is really (SCSI) device and processor dependent. Tuneable, I guess.
108 */
109 #define SPC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */
110 #define SPC_MSGOUT_SPIN 1
111
112 /* Include debug functions? At the end of this file there are a bunch of
113 * functions that will print out various information regarding queued SCSI
114 * commands, driver state and chip contents. You can call them from the
115 * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the
116 * kernel uses less memory) but you lose the debugging facilities.
117 */
118 #define SPC_DEBUG 1
119
120 #define SPC_ABORT_TIMEOUT 2000 /* time to wait for abort */
121
122 /* End of customizable parameters */
123
124 /*
125 * MB89352 SCSI Protocol Controller (SPC) routines.
126 */
127
128 #include "opt_ddb.h"
129
130 #include <sys/types.h>
131 #include <sys/param.h>
132 #include <sys/systm.h>
133 #include <sys/kernel.h>
134 #include <sys/errno.h>
135 #include <sys/ioctl.h>
136 #include <sys/device.h>
137 #include <sys/buf.h>
138 #include <sys/proc.h>
139 #include <sys/user.h>
140 #include <sys/queue.h>
141
142 #include <machine/intr.h>
143 #include <machine/bus.h>
144
145 #include <dev/scsipi/scsi_all.h>
146 #include <dev/scsipi/scsipi_all.h>
147 #include <dev/scsipi/scsi_message.h>
148 #include <dev/scsipi/scsiconf.h>
149
150 #include <dev/ic/mb89352reg.h>
151 #include <dev/ic/mb89352var.h>
152
153 #ifndef DDB
155 #define Debugger() panic("should call debugger here (mb89352.c)")
156 #endif /* ! DDB */
157
158 #if SPC_DEBUG
159 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */
160 #endif
161
162 void spc_minphys __P((struct buf *));
163 void spc_done __P((struct spc_softc *, struct spc_acb *));
164 void spc_dequeue __P((struct spc_softc *, struct spc_acb *));
165 int spc_scsi_cmd __P((struct scsipi_xfer *));
166 int spc_poll __P((struct spc_softc *, struct scsipi_xfer *, int));
167 integrate void spc_sched_msgout __P((struct spc_softc *, u_char));
168 integrate void spc_setsync __P((struct spc_softc *, struct spc_tinfo *));
169 void spc_select __P((struct spc_softc *, struct spc_acb *));
170 void spc_timeout __P((void *));
171 void spc_scsi_reset __P((struct spc_softc *));
172 void spc_reset __P((struct spc_softc *));
173 void spc_free_acb __P((struct spc_softc *, struct spc_acb *, int));
174 struct spc_acb* spc_get_acb __P((struct spc_softc *));
175 int spc_reselect __P((struct spc_softc *, int));
176 void spc_sense __P((struct spc_softc *, struct spc_acb *));
177 void spc_msgin __P((struct spc_softc *));
178 void spc_abort __P((struct spc_softc *, struct spc_acb *));
179 void spc_msgout __P((struct spc_softc *));
180 int spc_dataout_pio __P((struct spc_softc *, u_char *, int));
181 int spc_datain_pio __P((struct spc_softc *, u_char *, int));
182 #if SPC_DEBUG
183 void spc_print_acb __P((struct spc_acb *));
184 void spc_dump_driver __P((struct spc_softc *));
185 void spc_dump89352 __P((struct spc_softc *));
186 void spc_show_scsi_cmd __P((struct spc_acb *));
187 void spc_print_active_acb __P((void));
188 #endif
189
190 extern struct cfdriver spc_cd;
191
192 struct scsipi_device spc_dev = {
193 NULL, /* Use default error handler */
194 NULL, /* have a queue, served by this */
195 NULL, /* have no async handler */
196 NULL, /* Use default 'done' routine */
197 };
198
199 /*
201 * INITIALIZATION ROUTINES (probe, attach ++)
202 */
203
204 /*
205 * Do the real search-for-device.
206 * Prerequisite: sc->sc_iobase should be set to the proper value
207 */
208 int
209 spc_find(iot, ioh, bdid)
210 bus_space_tag_t iot;
211 bus_space_handle_t ioh;
212 int bdid;
213 {
214 long timeout = SPC_ABORT_TIMEOUT;
215
216 SPC_TRACE(("spc: probing for spc-chip\n"));
217 /*
218 * Disable interrupts then reset the FUJITSU chip.
219 */
220 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
221 bus_space_write_1(iot, ioh, SCMD, 0);
222 bus_space_write_1(iot, ioh, PCTL, 0);
223 bus_space_write_1(iot, ioh, TEMP, 0);
224 bus_space_write_1(iot, ioh, TCH, 0);
225 bus_space_write_1(iot, ioh, TCM, 0);
226 bus_space_write_1(iot, ioh, TCL, 0);
227 bus_space_write_1(iot, ioh, INTS, 0);
228 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
229 bus_space_write_1(iot, ioh, BDID, bdid);
230 delay(400);
231 bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
232
233 /* The following detection is derived from spc.c
234 * (by Takahide Matsutsuka) in FreeBSD/pccard-test.
235 */
236 while (bus_space_read_1(iot, ioh, PSNS) && timeout)
237 timeout--;
238 if (!timeout) {
239 printf("spc: find failed\n");
240 return 0;
241 }
242
243 SPC_START(("SPC found"));
244 return 1;
245 }
246
247 void
248 spcattach(sc)
249 struct spc_softc *sc;
250 {
251
252 SPC_TRACE(("spcattach "));
253 sc->sc_state = SPC_INIT;
254
255 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */
256
257 #if SPC_USE_SYNCHRONOUS
258 /*
259 * These are the bounds of the sync period, based on the frequency of
260 * the chip's clock input and the size and offset of the sync period
261 * register.
262 *
263 * For a 20Mhz clock, this gives us 25, or 100nS, or 10MB/s, as a
264 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
265 * minimum transfer rate.
266 */
267 sc->sc_minsync = (2 * 250) / sc->sc_freq;
268 sc->sc_maxsync = (9 * 250) / sc->sc_freq;
269 #endif
270
271 spc_init(sc); /* Init chip and driver */
272
273 /*
274 * Fill in the adapter.
275 */
276 sc->sc_adapter.scsipi_cmd = spc_scsi_cmd;
277 sc->sc_adapter.scsipi_minphys = spc_minphys;
278
279 /*
280 * Fill in the prototype scsipi_link
281 */
282 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
283 sc->sc_link.adapter_softc = sc;
284 sc->sc_link.scsipi_scsi.adapter_target = sc->sc_initiator;
285 sc->sc_link.adapter = &sc->sc_adapter;
286 sc->sc_link.device = &spc_dev;
287 sc->sc_link.openings = 2;
288 sc->sc_link.scsipi_scsi.max_target = 7;
289 sc->sc_link.scsipi_scsi.max_lun = 7;
290 sc->sc_link.type = BUS_SCSI;
291
292 /*
293 * ask the adapter what subunits are present
294 */
295 config_found(&sc->sc_dev, &sc->sc_link, scsiprint);
296 }
297
298 /*
299 * Initialize MB89352 chip itself
300 * The following conditions should hold:
301 * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc
302 * must be valid.
303 */
304 void
305 spc_reset(sc)
306 struct spc_softc *sc;
307 {
308 bus_space_tag_t iot = sc->sc_iot;
309 bus_space_handle_t ioh = sc->sc_ioh;
310
311 SPC_TRACE(("spc_reset "));
312 /*
313 * Disable interrupts then reset the FUJITSU chip.
314 */
315 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
316 bus_space_write_1(iot, ioh, SCMD, 0);
317 bus_space_write_1(iot, ioh, PCTL, 0);
318 bus_space_write_1(iot, ioh, TEMP, 0);
319 bus_space_write_1(iot, ioh, TCH, 0);
320 bus_space_write_1(iot, ioh, TCM, 0);
321 bus_space_write_1(iot, ioh, TCL, 0);
322 bus_space_write_1(iot, ioh, INTS, 0);
323 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
324 bus_space_write_1(iot, ioh, BDID, sc->sc_initiator);
325 delay(400);
326 bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
327 }
328
329
330 /*
331 * Pull the SCSI RST line for 500us.
332 */
333 void
334 spc_scsi_reset(sc)
335 struct spc_softc *sc;
336 {
337 bus_space_tag_t iot = sc->sc_iot;
338 bus_space_handle_t ioh = sc->sc_ioh;
339
340 SPC_TRACE(("spc_scsi_reset "));
341 bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) | SCMD_RST);
342 delay(500);
343 bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST);
344 delay(50);
345 }
346
347 /*
348 * Initialize spc SCSI driver.
349 */
350 void
351 spc_init(sc)
352 struct spc_softc *sc;
353 {
354 struct spc_acb *acb;
355 int r;
356
357 SPC_TRACE(("spc_init "));
358 spc_reset(sc);
359 spc_scsi_reset(sc);
360 spc_reset(sc);
361
362 if (sc->sc_state == SPC_INIT) {
363 /* First time through; initialize. */
364 TAILQ_INIT(&sc->ready_list);
365 TAILQ_INIT(&sc->nexus_list);
366 TAILQ_INIT(&sc->free_list);
367 sc->sc_nexus = NULL;
368 acb = sc->sc_acb;
369 bzero(acb, sizeof(sc->sc_acb));
370 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
371 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
372 acb++;
373 }
374 bzero(&sc->sc_tinfo, sizeof(sc->sc_tinfo));
375 } else {
376 /* Cancel any active commands. */
377 sc->sc_state = SPC_CLEANING;
378 if ((acb = sc->sc_nexus) != NULL) {
379 acb->xs->error = XS_DRIVER_STUFFUP;
380 callout_stop(&acb->xs->xs_callout);
381 spc_done(sc, acb);
382 }
383 while ((acb = sc->nexus_list.tqh_first) != NULL) {
384 acb->xs->error = XS_DRIVER_STUFFUP;
385 callout_stop(&acb->xs->xs_callout);
386 spc_done(sc, acb);
387 }
388 }
389
390 sc->sc_prevphase = PH_INVALID;
391 for (r = 0; r < 8; r++) {
392 struct spc_tinfo *ti = &sc->sc_tinfo[r];
393
394 ti->flags = 0;
395 #if SPC_USE_SYNCHRONOUS
396 ti->flags |= DO_SYNC;
397 ti->period = sc->sc_minsync;
398 ti->offset = SPC_SYNC_REQ_ACK_OFS;
399 #else
400 ti->period = ti->offset = 0;
401 #endif
402 #if SPC_USE_WIDE
403 ti->flags |= DO_WIDE;
404 ti->width = SPC_MAX_WIDTH;
405 #else
406 ti->width = 0;
407 #endif
408 }
409
410 sc->sc_state = SPC_IDLE;
411 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL,
412 bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB);
413 }
414
415 void
416 spc_free_acb(sc, acb, flags)
417 struct spc_softc *sc;
418 struct spc_acb *acb;
419 int flags;
420 {
421 int s;
422
423 SPC_TRACE(("spc_free_acb "));
424 s = splbio();
425
426 acb->flags = 0;
427 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
428 splx(s);
429 }
430
431 struct spc_acb *
432 spc_get_acb(sc)
433 struct spc_softc *sc;
434 {
435 struct spc_acb *acb;
436 int s;
437
438 SPC_TRACE(("spc_get_acb "));
439 s = splbio();
440 acb = TAILQ_FIRST(&sc->free_list);
441 if (acb != NULL) {
442 TAILQ_REMOVE(&sc->free_list, acb, chain);
443 acb->flags |= ACB_ALLOC;
444 }
445 splx(s);
446 return acb;
447 }
448
449 /*
451 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
452 */
453
454 /*
455 * Expected sequence:
456 * 1) Command inserted into ready list
457 * 2) Command selected for execution
458 * 3) Command won arbitration and has selected target device
459 * 4) Send message out (identify message, eventually also sync.negotiations)
460 * 5) Send command
461 * 5a) Receive disconnect message, disconnect.
462 * 5b) Reselected by target
463 * 5c) Receive identify message from target.
464 * 6) Send or receive data
465 * 7) Receive status
466 * 8) Receive message (command complete etc.)
467 * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd.
468 * Repeat 2-8 (no disconnects please...)
469 */
470
471 /*
472 * Start a SCSI-command
473 * This function is called by the higher level SCSI-driver to queue/run
474 * SCSI-commands.
475 */
476 int
477 spc_scsi_cmd(xs)
478 struct scsipi_xfer *xs;
479 {
480 struct scsipi_link *sc_link = xs->sc_link;
481 struct spc_softc *sc = sc_link->adapter_softc;
482 struct spc_acb *acb;
483 int s, flags;
484
485 SPC_TRACE(("spc_scsi_cmd "));
486 SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
487 sc_link->scsipi_scsi.target));
488
489 flags = xs->xs_control;
490 if ((acb = spc_get_acb(sc)) == NULL) {
491 xs->error = XS_DRIVER_STUFFUP;
492 return TRY_AGAIN_LATER;
493 }
494
495 /* Initialize acb */
496 acb->xs = xs;
497 acb->timeout = xs->timeout;
498
499 if (xs->xs_control & XS_CTL_RESET) {
500 acb->flags |= ACB_RESET;
501 acb->scsipi_cmd_length = 0;
502 acb->data_length = 0;
503 } else {
504 bcopy(xs->cmd, &acb->scsipi_cmd, xs->cmdlen);
505 #if 1
506 acb->scsipi_cmd.bytes[0] |= sc_link->scsipi_scsi.lun << 5; /* XXX? */
507 #endif
508 acb->scsipi_cmd_length = xs->cmdlen;
509 acb->data_addr = xs->data;
510 acb->data_length = xs->datalen;
511 }
512 acb->target_stat = 0;
513
514 s = splbio();
515
516 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
517 /*
518 * Start scheduling unless a queue process is in progress.
519 */
520 if (sc->sc_state == SPC_IDLE)
521 spc_sched(sc);
522 /*
523 * After successful sending, check if we should return just now.
524 * If so, return SUCCESSFULLY_QUEUED.
525 */
526
527 splx(s);
528
529 if ((flags & XS_CTL_POLL) == 0)
530 return SUCCESSFULLY_QUEUED;
531
532 /* Not allowed to use interrupts, use polling instead */
533 s = splbio();
534 if (spc_poll(sc, xs, acb->timeout)) {
535 spc_timeout(acb);
536 if (spc_poll(sc, xs, acb->timeout))
537 spc_timeout(acb);
538 }
539 splx(s);
540 return COMPLETE;
541 }
542
543 /*
544 * Adjust transfer size in buffer structure
545 */
546 void
547 spc_minphys(bp)
548 struct buf *bp;
549 {
550
551 SPC_TRACE(("spc_minphys "));
552 minphys(bp);
553 }
554
555 /*
556 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
557 */
558 int
559 spc_poll(sc, xs, count)
560 struct spc_softc *sc;
561 struct scsipi_xfer *xs;
562 int count;
563 {
564 bus_space_tag_t iot = sc->sc_iot;
565 bus_space_handle_t ioh = sc->sc_ioh;
566
567 SPC_TRACE(("spc_poll "));
568 while (count) {
569 /*
570 * If we had interrupts enabled, would we
571 * have got an interrupt?
572 */
573 if (bus_space_read_1(iot, ioh, INTS) != 0)
574 spcintr(sc);
575 if ((xs->xs_status & XS_STS_DONE) != 0)
576 return 0;
577 delay(1000);
578 count--;
579 }
580 return 1;
581 }
582
583 /*
585 * LOW LEVEL SCSI UTILITIES
586 */
587
588 integrate void
589 spc_sched_msgout(sc, m)
590 struct spc_softc *sc;
591 u_char m;
592 {
593 bus_space_tag_t iot = sc->sc_iot;
594 bus_space_handle_t ioh = sc->sc_ioh;
595
596 SPC_TRACE(("spc_sched_msgout "));
597 if (sc->sc_msgpriq == 0)
598 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
599 sc->sc_msgpriq |= m;
600 }
601
602 /*
603 * Set synchronous transfer offset and period.
604 */
605 integrate void
606 spc_setsync(sc, ti)
607 struct spc_softc *sc;
608 struct spc_tinfo *ti;
609 {
610 #if SPC_USE_SYNCHRONOUS
611 bus_space_tag_t iot = sc->sc_iot;
612 bus_space_handle_t ioh = sc->sc_ioh;
613
614 SPC_TRACE(("spc_setsync "));
615 if (ti->offset != 0)
616 bus_space_write_1(iot, ioh, TMOD,
617 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
618 else
619 bus_space_write_1(iot, ioh, TMOD, 0);
620 #endif
621 }
622
623 /*
624 * Start a selection. This is used by spc_sched() to select an idle target,
625 * and by spc_done() to immediately reselect a target to get sense information.
626 */
627 void
628 spc_select(sc, acb)
629 struct spc_softc *sc;
630 struct spc_acb *acb;
631 {
632 struct scsipi_link *sc_link = acb->xs->sc_link;
633 int target = sc_link->scsipi_scsi.target;
634 struct spc_tinfo *ti = &sc->sc_tinfo[target];
635 bus_space_tag_t iot = sc->sc_iot;
636 bus_space_handle_t ioh = sc->sc_ioh;
637
638 SPC_TRACE(("spc_select "));
639 spc_setsync(sc, ti);
640
641 #if 0
642 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
643 #endif
644 #ifdef x68k /* XXX? */
645 do {
646 asm ("nop");
647 } while (bus_space_read_1(iot, ioh, SSTS) &
648 (SSTS_ACTIVE|SSTS_TARGET|SSTS_BUSY));
649 #endif
650
651 bus_space_write_1(iot, ioh, PCTL, 0);
652 bus_space_write_1(iot, ioh, TEMP, (1 << sc->sc_initiator) | (1 << target));
653 /*
654 * Setup BSY timeout (selection timeout).
655 * 250ms according to the SCSI specification.
656 * T = (X * 256 + 15) * Tclf * 2 (Tclf = 200ns on x68k)
657 * To setup 256ms timeout,
658 * 128000ns/200ns = X * 256 + 15
659 * 640 - 15 = X * 256
660 * X = 625 / 256
661 * X = 2 + 113 / 256
662 * ==> tch = 2, tcm = 113 (correct?)
663 */
664 bus_space_write_1(iot, ioh, TCH, 2);
665 bus_space_write_1(iot, ioh, TCM, 113);
666 /* Time to the information transfer phase start. */
667 bus_space_write_1(iot, ioh, TCL, 3);
668 bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT);
669
670 sc->sc_state = SPC_SELECTING;
671 }
672
673 int
674 spc_reselect(sc, message)
675 struct spc_softc *sc;
676 int message;
677 {
678 u_char selid, target, lun;
679 struct spc_acb *acb;
680 struct scsipi_link *sc_link;
681 struct spc_tinfo *ti;
682
683 SPC_TRACE(("spc_reselect "));
684 /*
685 * The SCSI chip made a snapshot of the data bus while the reselection
686 * was being negotiated. This enables us to determine which target did
687 * the reselect.
688 */
689 selid = sc->sc_selid & ~(1 << sc->sc_initiator);
690 if (selid & (selid - 1)) {
691 printf("%s: reselect with invalid selid %02x; sending DEVICE RESET\n",
692 sc->sc_dev.dv_xname, selid);
693 SPC_BREAK();
694 goto reset;
695 }
696
697 /*
698 * Search wait queue for disconnected cmd
699 * The list should be short, so I haven't bothered with
700 * any more sophisticated structures than a simple
701 * singly linked list.
702 */
703 target = ffs(selid) - 1;
704 lun = message & 0x07;
705 for (acb = sc->nexus_list.tqh_first; acb != NULL;
706 acb = acb->chain.tqe_next) {
707 sc_link = acb->xs->sc_link;
708 if (sc_link->scsipi_scsi.target == target &&
709 sc_link->scsipi_scsi.lun == lun)
710 break;
711 }
712 if (acb == NULL) {
713 printf("%s: reselect from target %d lun %d with no nexus; sending ABORT\n",
714 sc->sc_dev.dv_xname, target, lun);
715 SPC_BREAK();
716 goto abort;
717 }
718
719 /* Make this nexus active again. */
720 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
721 sc->sc_state = SPC_CONNECTED;
722 sc->sc_nexus = acb;
723 ti = &sc->sc_tinfo[target];
724 ti->lubusy |= (1 << lun);
725 spc_setsync(sc, ti);
726
727 if (acb->flags & ACB_RESET)
728 spc_sched_msgout(sc, SEND_DEV_RESET);
729 else if (acb->flags & ACB_ABORT)
730 spc_sched_msgout(sc, SEND_ABORT);
731
732 /* Do an implicit RESTORE POINTERS. */
733 sc->sc_dp = acb->data_addr;
734 sc->sc_dleft = acb->data_length;
735 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
736 sc->sc_cleft = acb->scsipi_cmd_length;
737
738 return (0);
739
740 reset:
741 spc_sched_msgout(sc, SEND_DEV_RESET);
742 return (1);
743
744 abort:
745 spc_sched_msgout(sc, SEND_ABORT);
746 return (1);
747 }
748
749 /*
751 * Schedule a SCSI operation. This has now been pulled out of the interrupt
752 * handler so that we may call it from spc_scsi_cmd and spc_done. This may
753 * save us an unecessary interrupt just to get things going. Should only be
754 * called when state == SPC_IDLE and at bio pl.
755 */
756 void
757 spc_sched(sc)
758 struct spc_softc *sc;
759 {
760 struct spc_acb *acb;
761 struct scsipi_link *sc_link;
762 struct spc_tinfo *ti;
763
764 /* missing the hw, just return and wait for our hw */
765 if (sc->sc_flags & SPC_INACTIVE)
766 return;
767 SPC_TRACE(("spc_sched "));
768 /*
769 * Find first acb in ready queue that is for a target/lunit pair that
770 * is not busy.
771 */
772 for (acb = sc->ready_list.tqh_first; acb != NULL;
773 acb = acb->chain.tqe_next) {
774 sc_link = acb->xs->sc_link;
775 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
776 if ((ti->lubusy & (1 << sc_link->scsipi_scsi.lun)) == 0) {
777 SPC_MISC(("selecting %d:%d ",
778 sc_link->scsipi_scsi.target, sc_link->scsipi_scsi.lun));
779 TAILQ_REMOVE(&sc->ready_list, acb, chain);
780 sc->sc_nexus = acb;
781 spc_select(sc, acb);
782 return;
783 } else
784 SPC_MISC(("%d:%d busy\n",
785 sc_link->scsipi_scsi.target, sc_link->scsipi_scsi.lun));
786 }
787 SPC_MISC(("idle "));
788 /* Nothing to start; just enable reselections and wait. */
789 }
790
791 void
793 spc_sense(sc, acb)
794 struct spc_softc *sc;
795 struct spc_acb *acb;
796 {
797 struct scsipi_xfer *xs = acb->xs;
798 struct scsipi_link *sc_link = xs->sc_link;
799 struct spc_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
800 struct scsipi_sense *ss = (void *)&acb->scsipi_cmd;
801
802 SPC_MISC(("requesting sense "));
803 /* Next, setup a request sense command block */
804 bzero(ss, sizeof(*ss));
805 ss->opcode = REQUEST_SENSE;
806 ss->byte2 = sc_link->scsipi_scsi.lun << 5;
807 ss->length = sizeof(struct scsipi_sense_data);
808 acb->scsipi_cmd_length = sizeof(*ss);
809 acb->data_addr = (char *)&xs->sense.scsi_sense;
810 acb->data_length = sizeof(struct scsipi_sense_data);
811 acb->flags |= ACB_SENSE;
812 ti->senses++;
813 if (acb->flags & ACB_NEXUS)
814 ti->lubusy &= ~(1 << sc_link->scsipi_scsi.lun);
815 if (acb == sc->sc_nexus) {
816 spc_select(sc, acb);
817 } else {
818 spc_dequeue(sc, acb);
819 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
820 if (sc->sc_state == SPC_IDLE)
821 spc_sched(sc);
822 }
823 }
824
825 /*
826 * POST PROCESSING OF SCSI_CMD (usually current)
827 */
828 void
829 spc_done(sc, acb)
830 struct spc_softc *sc;
831 struct spc_acb *acb;
832 {
833 struct scsipi_xfer *xs = acb->xs;
834 struct scsipi_link *sc_link = xs->sc_link;
835 struct spc_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
836
837 SPC_TRACE(("spc_done "));
838
839 /*
840 * Now, if we've come here with no error code, i.e. we've kept the
841 * initial XS_NOERROR, and the status code signals that we should
842 * check sense, we'll need to set up a request sense cmd block and
843 * push the command back into the ready queue *before* any other
844 * commands for this target/lunit, else we lose the sense info.
845 * We don't support chk sense conditions for the request sense cmd.
846 */
847 if (xs->error == XS_NOERROR) {
848 if (acb->flags & ACB_ABORT) {
849 xs->error = XS_DRIVER_STUFFUP;
850 } else if (acb->flags & ACB_SENSE) {
851 xs->error = XS_SENSE;
852 } else {
853 switch (acb->target_stat) {
854 case SCSI_CHECK:
855 /* First, save the return values */
856 xs->resid = acb->data_length;
857 xs->status = acb->target_stat;
858 spc_sense(sc, acb);
859 return;
860 case SCSI_BUSY:
861 xs->error = XS_BUSY;
862 break;
863 case SCSI_OK:
864 xs->resid = acb->data_length;
865 break;
866 default:
867 xs->error = XS_DRIVER_STUFFUP;
868 #if SPC_DEBUG
869 printf("%s: spc_done: bad stat 0x%x\n",
870 sc->sc_dev.dv_xname, acb->target_stat);
871 #endif
872 break;
873 }
874 }
875 }
876
877 xs->xs_status |= XS_STS_DONE;
878
879 #if SPC_DEBUG
880 if ((spc_debug & SPC_SHOWMISC) != 0) {
881 if (xs->resid != 0)
882 printf("resid=%d ", xs->resid);
883 if (xs->error == XS_SENSE)
884 printf("sense=0x%02x\n", xs->sense.scsi_sense.error_code);
885 else
886 printf("error=%d\n", xs->error);
887 }
888 #endif
889
890 /*
891 * Remove the ACB from whatever queue it happens to be on.
892 */
893 if (acb->flags & ACB_NEXUS)
894 ti->lubusy &= ~(1 << sc_link->scsipi_scsi.lun);
895 if (acb == sc->sc_nexus) {
896 sc->sc_nexus = NULL;
897 sc->sc_state = SPC_IDLE;
898 spc_sched(sc);
899 } else
900 spc_dequeue(sc, acb);
901
902 spc_free_acb(sc, acb, xs->xs_control);
903 ti->cmds++;
904 scsipi_done(xs);
905 }
906
907 void
908 spc_dequeue(sc, acb)
909 struct spc_softc *sc;
910 struct spc_acb *acb;
911 {
912
913 SPC_TRACE(("spc_dequeue "));
914 if (acb->flags & ACB_NEXUS) {
915 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
916 } else {
917 TAILQ_REMOVE(&sc->ready_list, acb, chain);
918 }
919 }
920
921 /*
923 * INTERRUPT/PROTOCOL ENGINE
924 */
925
926 #define IS1BYTEMSG(m) (((m) != 0x01 && (m) < 0x20) || (m) >= 0x80)
927 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
928 #define ISEXTMSG(m) ((m) == 0x01)
929
930 /*
931 * Precondition:
932 * The SCSI bus is already in the MSGI phase and there is a message byte
933 * on the bus, along with an asserted REQ signal.
934 */
935 void
936 spc_msgin(sc)
937 struct spc_softc *sc;
938 {
939 bus_space_tag_t iot = sc->sc_iot;
940 bus_space_handle_t ioh = sc->sc_ioh;
941 int n;
942
943 SPC_TRACE(("spc_msgin "));
944
945 if (sc->sc_prevphase == PH_MSGIN) {
946 /* This is a continuation of the previous message. */
947 n = sc->sc_imp - sc->sc_imess;
948 goto nextbyte;
949 }
950
951 /* This is a new MESSAGE IN phase. Clean up our state. */
952 sc->sc_flags &= ~SPC_DROP_MSGIN;
953
954 nextmsg:
955 n = 0;
956 sc->sc_imp = &sc->sc_imess[n];
957
958 nextbyte:
959 /*
960 * Read a whole message, but don't ack the last byte. If we reject the
961 * message, we have to assert ATN during the message transfer phase
962 * itself.
963 */
964 for (;;) {
965 #if 0
966 for (;;) {
967 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
968 break;
969 /* Wait for REQINIT. XXX Need timeout. */
970 }
971 #endif
972 if (bus_space_read_1(iot, ioh, INTS) != 0) {
973 /*
974 * Target left MESSAGE IN, probably because it
975 * a) noticed our ATN signal, or
976 * b) ran out of messages.
977 */
978 goto out;
979 }
980
981 /* If parity error, just dump everything on the floor. */
982 if ((bus_space_read_1(iot, ioh, SERR) &
983 (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
984 sc->sc_flags |= SPC_DROP_MSGIN;
985 spc_sched_msgout(sc, SEND_PARITY_ERROR);
986 }
987
988 /* send TRANSFER command. */
989 bus_space_write_1(iot, ioh, TCH, 0);
990 bus_space_write_1(iot, ioh, TCM, 0);
991 bus_space_write_1(iot, ioh, TCL, 1);
992 bus_space_write_1(iot, ioh, PCTL,
993 sc->sc_phase | PCTL_BFINT_ENAB);
994 #ifdef x68k
995 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* | SCMD_PROG_XFR */
996 #else
997 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); /* XXX */
998 #endif
999 for (;;) {
1000 /*if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0
1001 && (bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)*/
1002 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) == 0)
1003 break;
1004 if (bus_space_read_1(iot, ioh, INTS) != 0)
1005 goto out;
1006 }
1007
1008 /* Gather incoming message bytes if needed. */
1009 if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) {
1010 if (n >= SPC_MAX_MSG_LEN) {
1011 (void) bus_space_read_1(iot, ioh, DREG);
1012 sc->sc_flags |= SPC_DROP_MSGIN;
1013 spc_sched_msgout(sc, SEND_REJECT);
1014 } else {
1015 *sc->sc_imp++ = bus_space_read_1(iot, ioh, DREG);
1016 n++;
1017 /*
1018 * This testing is suboptimal, but most
1019 * messages will be of the one byte variety, so
1020 * it should not affect performance
1021 * significantly.
1022 */
1023 if (n == 1 && IS1BYTEMSG(sc->sc_imess[0]))
1024 break;
1025 if (n == 2 && IS2BYTEMSG(sc->sc_imess[0]))
1026 break;
1027 if (n >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
1028 n == sc->sc_imess[1] + 2)
1029 break;
1030 }
1031 } else
1032 (void) bus_space_read_1(iot, ioh, DREG);
1033
1034 /*
1035 * If we reach this spot we're either:
1036 * a) in the middle of a multi-byte message, or
1037 * b) dropping bytes.
1038 */
1039 #if 0
1040 /* Ack the last byte read. */
1041 /*(void) bus_space_read_1(iot, ioh, DREG);*/
1042 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1043 ;
1044 #endif
1045 }
1046
1047 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
1048
1049 /* We now have a complete message. Parse it. */
1050 switch (sc->sc_state) {
1051 struct spc_acb *acb;
1052 struct scsipi_link *sc_link;
1053 struct spc_tinfo *ti;
1054
1055 case SPC_CONNECTED:
1056 SPC_ASSERT(sc->sc_nexus != NULL);
1057 acb = sc->sc_nexus;
1058 ti = &sc->sc_tinfo[acb->xs->sc_link->scsipi_scsi.target];
1059
1060 switch (sc->sc_imess[0]) {
1061 case MSG_CMDCOMPLETE:
1062 if (sc->sc_dleft < 0) {
1063 sc_link = acb->xs->sc_link;
1064 printf("%s: %d extra bytes from %d:%d\n",
1065 sc->sc_dev.dv_xname, -sc->sc_dleft,
1066 sc_link->scsipi_scsi.target, sc_link->scsipi_scsi.lun);
1067 acb->data_length = 0;
1068 }
1069 acb->xs->resid = acb->data_length = sc->sc_dleft;
1070 sc->sc_state = SPC_CMDCOMPLETE;
1071 break;
1072
1073 case MSG_PARITY_ERROR:
1074 /* Resend the last message. */
1075 spc_sched_msgout(sc, sc->sc_lastmsg);
1076 break;
1077
1078 case MSG_MESSAGE_REJECT:
1079 SPC_MISC(("message rejected %02x ", sc->sc_lastmsg));
1080 switch (sc->sc_lastmsg) {
1081 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1082 case SEND_IDENTIFY:
1083 ti->flags &= ~(DO_SYNC | DO_WIDE);
1084 ti->period = ti->offset = 0;
1085 spc_setsync(sc, ti);
1086 ti->width = 0;
1087 break;
1088 #endif
1089 #if SPC_USE_SYNCHRONOUS
1090 case SEND_SDTR:
1091 ti->flags &= ~DO_SYNC;
1092 ti->period = ti->offset = 0;
1093 spc_setsync(sc, ti);
1094 break;
1095 #endif
1096 #if SPC_USE_WIDE
1097 case SEND_WDTR:
1098 ti->flags &= ~DO_WIDE;
1099 ti->width = 0;
1100 break;
1101 #endif
1102 case SEND_INIT_DET_ERR:
1103 spc_sched_msgout(sc, SEND_ABORT);
1104 break;
1105 }
1106 break;
1107
1108 case MSG_NOOP:
1109 break;
1110
1111 case MSG_DISCONNECT:
1112 ti->dconns++;
1113 sc->sc_state = SPC_DISCONNECT;
1114 break;
1115
1116 case MSG_SAVEDATAPOINTER:
1117 acb->data_addr = sc->sc_dp;
1118 acb->data_length = sc->sc_dleft;
1119 break;
1120
1121 case MSG_RESTOREPOINTERS:
1122 sc->sc_dp = acb->data_addr;
1123 sc->sc_dleft = acb->data_length;
1124 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1125 sc->sc_cleft = acb->scsipi_cmd_length;
1126 break;
1127
1128 case MSG_EXTENDED:
1129 switch (sc->sc_imess[2]) {
1130 #if SPC_USE_SYNCHRONOUS
1131 case MSG_EXT_SDTR:
1132 if (sc->sc_imess[1] != 3)
1133 goto reject;
1134 ti->period = sc->sc_imess[3];
1135 ti->offset = sc->sc_imess[4];
1136 ti->flags &= ~DO_SYNC;
1137 if (ti->offset == 0) {
1138 } else if (ti->period < sc->sc_minsync ||
1139 ti->period > sc->sc_maxsync ||
1140 ti->offset > 8) {
1141 ti->period = ti->offset = 0;
1142 spc_sched_msgout(sc, SEND_SDTR);
1143 } else {
1144 scsi_print_addr(acb->xs->sc_link);
1145 printf("sync, offset %d, period %dnsec\n",
1146 ti->offset, ti->period * 4);
1147 }
1148 spc_setsync(sc, ti);
1149 break;
1150 #endif
1151
1152 #if SPC_USE_WIDE
1153 case MSG_EXT_WDTR:
1154 if (sc->sc_imess[1] != 2)
1155 goto reject;
1156 ti->width = sc->sc_imess[3];
1157 ti->flags &= ~DO_WIDE;
1158 if (ti->width == 0) {
1159 } else if (ti->width > SPC_MAX_WIDTH) {
1160 ti->width = 0;
1161 spc_sched_msgout(sc, SEND_WDTR);
1162 } else {
1163 scsi_print_addr(acb->xs->sc_link);
1164 printf("wide, width %d\n",
1165 1 << (3 + ti->width));
1166 }
1167 break;
1168 #endif
1169
1170 default:
1171 printf("%s: unrecognized MESSAGE EXTENDED; sending REJECT\n",
1172 sc->sc_dev.dv_xname);
1173 SPC_BREAK();
1174 goto reject;
1175 }
1176 break;
1177
1178 default:
1179 printf("%s: unrecognized MESSAGE; sending REJECT\n",
1180 sc->sc_dev.dv_xname);
1181 SPC_BREAK();
1182 reject:
1183 spc_sched_msgout(sc, SEND_REJECT);
1184 break;
1185 }
1186 break;
1187
1188 case SPC_RESELECTED:
1189 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
1190 printf("%s: reselect without IDENTIFY; sending DEVICE RESET\n",
1191 sc->sc_dev.dv_xname);
1192 SPC_BREAK();
1193 goto reset;
1194 }
1195
1196 (void) spc_reselect(sc, sc->sc_imess[0]);
1197 break;
1198
1199 default:
1200 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1201 sc->sc_dev.dv_xname);
1202 SPC_BREAK();
1203 reset:
1204 spc_sched_msgout(sc, SEND_DEV_RESET);
1205 break;
1206
1207 #ifdef notdef
1208 abort:
1209 spc_sched_msgout(sc, SEND_ABORT);
1210 break;
1211 #endif
1212 }
1213
1214 /* Ack the last message byte. */
1215 #if 0 /* XXX? */
1216 (void) bus_space_read_1(iot, ioh, DREG);
1217 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1218 ;
1219 #endif
1220
1221 /* Go get the next message, if any. */
1222 goto nextmsg;
1223
1224 out:
1225 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1226 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
1227 }
1228
1229 /*
1230 * Send the highest priority, scheduled message.
1231 */
1232 void
1233 spc_msgout(sc)
1234 struct spc_softc *sc;
1235 {
1236 bus_space_tag_t iot = sc->sc_iot;
1237 bus_space_handle_t ioh = sc->sc_ioh;
1238 #if SPC_USE_SYNCHRONOUS
1239 struct spc_tinfo *ti;
1240 #endif
1241 int n;
1242
1243 SPC_TRACE(("spc_msgout "));
1244
1245 if (sc->sc_prevphase == PH_MSGOUT) {
1246 if (sc->sc_omp == sc->sc_omess) {
1247 /*
1248 * This is a retransmission.
1249 *
1250 * We get here if the target stayed in MESSAGE OUT
1251 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates
1252 * that all of the previously transmitted messages must
1253 * be sent again, in the same order. Therefore, we
1254 * requeue all the previously transmitted messages, and
1255 * start again from the top. Our simple priority
1256 * scheme keeps the messages in the right order.
1257 */
1258 SPC_MISC(("retransmitting "));
1259 sc->sc_msgpriq |= sc->sc_msgoutq;
1260 /*
1261 * Set ATN. If we're just sending a trivial 1-byte
1262 * message, we'll clear ATN later on anyway.
1263 */
1264 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); /* XXX? */
1265 } else {
1266 /* This is a continuation of the previous message. */
1267 n = sc->sc_omp - sc->sc_omess;
1268 goto nextbyte;
1269 }
1270 }
1271
1272 /* No messages transmitted so far. */
1273 sc->sc_msgoutq = 0;
1274 sc->sc_lastmsg = 0;
1275
1276 nextmsg:
1277 /* Pick up highest priority message. */
1278 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
1279 sc->sc_msgpriq &= ~sc->sc_currmsg;
1280 sc->sc_msgoutq |= sc->sc_currmsg;
1281
1282 /* Build the outgoing message data. */
1283 switch (sc->sc_currmsg) {
1284 case SEND_IDENTIFY:
1285 SPC_ASSERT(sc->sc_nexus != NULL);
1286 sc->sc_omess[0] =
1287 MSG_IDENTIFY(sc->sc_nexus->xs->sc_link->scsipi_scsi.lun, 1);
1288 n = 1;
1289 break;
1290
1291 #if SPC_USE_SYNCHRONOUS
1292 case SEND_SDTR:
1293 SPC_ASSERT(sc->sc_nexus != NULL);
1294 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->scsipi_scsi.target];
1295 sc->sc_omess[4] = MSG_EXTENDED;
1296 sc->sc_omess[3] = 3;
1297 sc->sc_omess[2] = MSG_EXT_SDTR;
1298 sc->sc_omess[1] = ti->period >> 2;
1299 sc->sc_omess[0] = ti->offset;
1300 n = 5;
1301 break;
1302 #endif
1303
1304 #if SPC_USE_WIDE
1305 case SEND_WDTR:
1306 SPC_ASSERT(sc->sc_nexus != NULL);
1307 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->scsipi_scsi.target];
1308 sc->sc_omess[3] = MSG_EXTENDED;
1309 sc->sc_omess[2] = 2;
1310 sc->sc_omess[1] = MSG_EXT_WDTR;
1311 sc->sc_omess[0] = ti->width;
1312 n = 4;
1313 break;
1314 #endif
1315
1316 case SEND_DEV_RESET:
1317 sc->sc_flags |= SPC_ABORTING;
1318 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1319 n = 1;
1320 break;
1321
1322 case SEND_REJECT:
1323 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1324 n = 1;
1325 break;
1326
1327 case SEND_PARITY_ERROR:
1328 sc->sc_omess[0] = MSG_PARITY_ERROR;
1329 n = 1;
1330 break;
1331
1332 case SEND_INIT_DET_ERR:
1333 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1334 n = 1;
1335 break;
1336
1337 case SEND_ABORT:
1338 sc->sc_flags |= SPC_ABORTING;
1339 sc->sc_omess[0] = MSG_ABORT;
1340 n = 1;
1341 break;
1342
1343 default:
1344 printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
1345 sc->sc_dev.dv_xname);
1346 SPC_BREAK();
1347 sc->sc_omess[0] = MSG_NOOP;
1348 n = 1;
1349 break;
1350 }
1351 sc->sc_omp = &sc->sc_omess[n];
1352
1353 nextbyte:
1354 /* Send message bytes. */
1355 /* send TRANSFER command. */
1356 bus_space_write_1(iot, ioh, TCH, n >> 16);
1357 bus_space_write_1(iot, ioh, TCM, n >> 8);
1358 bus_space_write_1(iot, ioh, TCL, n);
1359 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1360 #ifdef x68k
1361 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */
1362 #else
1363 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR);
1364 #endif
1365 for (;;) {
1366 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1367 break;
1368 if (bus_space_read_1(iot, ioh, INTS) != 0)
1369 goto out;
1370 }
1371 for (;;) {
1372 #if 0
1373 for (;;) {
1374 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
1375 break;
1376 /* Wait for REQINIT. XXX Need timeout. */
1377 }
1378 #endif
1379 if (bus_space_read_1(iot, ioh, INTS) != 0) {
1380 /*
1381 * Target left MESSAGE OUT, possibly to reject
1382 * our message.
1383 *
1384 * If this is the last message being sent, then we
1385 * deassert ATN, since either the target is going to
1386 * ignore this message, or it's going to ask for a
1387 * retransmission via MESSAGE PARITY ERROR (in which
1388 * case we reassert ATN anyway).
1389 */
1390 #if 0
1391 if (sc->sc_msgpriq == 0)
1392 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1393 #endif
1394 goto out;
1395 }
1396
1397 #if 0
1398 /* Clear ATN before last byte if this is the last message. */
1399 if (n == 1 && sc->sc_msgpriq == 0)
1400 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1401 #endif
1402
1403 while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0)
1404 ;
1405 /* Send message byte. */
1406 bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp);
1407 --n;
1408 /* Keep track of the last message we've sent any bytes of. */
1409 sc->sc_lastmsg = sc->sc_currmsg;
1410 #if 0
1411 /* Wait for ACK to be negated. XXX Need timeout. */
1412 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1413 ;
1414 #endif
1415
1416 if (n == 0)
1417 break;
1418 }
1419
1420 /* We get here only if the entire message has been transmitted. */
1421 if (sc->sc_msgpriq != 0) {
1422 /* There are more outgoing messages. */
1423 goto nextmsg;
1424 }
1425
1426 /*
1427 * The last message has been transmitted. We need to remember the last
1428 * message transmitted (in case the target switches to MESSAGE IN phase
1429 * and sends a MESSAGE REJECT), and the list of messages transmitted
1430 * this time around (in case the target stays in MESSAGE OUT phase to
1431 * request a retransmit).
1432 */
1433
1434 out:
1435 /* Disable REQ/ACK protocol. */
1436 }
1437
1438 /*
1440 * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc
1441 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
1442 * and ACK deasserted (i.e. waiting for a data byte)
1443 *
1444 * This new revision has been optimized (I tried) to make the common case fast,
1445 * and the rarer cases (as a result) somewhat more comlex
1446 */
1447 int
1448 spc_dataout_pio(sc, p, n)
1449 struct spc_softc *sc;
1450 u_char *p;
1451 int n;
1452 {
1453 bus_space_tag_t iot = sc->sc_iot;
1454 bus_space_handle_t ioh = sc->sc_ioh;
1455 u_char intstat = 0;
1456 int out = 0;
1457 #define DOUTAMOUNT 8 /* Full FIFO */
1458
1459 SPC_TRACE(("spc_dataout_pio "));
1460 /* send TRANSFER command. */
1461 bus_space_write_1(iot, ioh, TCH, n >> 16);
1462 bus_space_write_1(iot, ioh, TCM, n >> 8);
1463 bus_space_write_1(iot, ioh, TCL, n);
1464 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1465 #ifdef x68k
1466 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */
1467 #else
1468 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR); /* XXX */
1469 #endif
1470 for (;;) {
1471 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1472 break;
1473 if (bus_space_read_1(iot, ioh, INTS) != 0)
1474 break;
1475 }
1476
1477 /*
1478 * I have tried to make the main loop as tight as possible. This
1479 * means that some of the code following the loop is a bit more
1480 * complex than otherwise.
1481 */
1482 while (n > 0) {
1483 int xfer;
1484
1485 for (;;) {
1486 intstat = bus_space_read_1(iot, ioh, INTS);
1487 /* Wait till buffer is empty. */
1488 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)
1489 break;
1490 /* Break on interrupt. */
1491 if (intstat != 0)
1492 goto phasechange;
1493 }
1494
1495 xfer = min(DOUTAMOUNT, n);
1496
1497 SPC_MISC(("%d> ", xfer));
1498
1499 n -= xfer;
1500 out += xfer;
1501
1502 while (xfer-- > 0) {
1503 bus_space_write_1(iot, ioh, DREG, *p++);
1504 }
1505 }
1506
1507 if (out == 0) {
1508 for (;;) {
1509 if (bus_space_read_1(iot, ioh, INTS) != 0)
1510 break;
1511 }
1512 SPC_MISC(("extra data "));
1513 } else {
1514 /* See the bytes off chip */
1515 for (;;) {
1516 /* Wait till buffer is empty. */
1517 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)
1518 break;
1519 intstat = bus_space_read_1(iot, ioh, INTS);
1520 /* Break on interrupt. */
1521 if (intstat != 0)
1522 goto phasechange;
1523 }
1524 }
1525
1526 phasechange:
1527 /* Stop the FIFO data path. */
1528
1529 if (intstat != 0) {
1530 /* Some sort of phase change. */
1531 int amount;
1532
1533 amount = ((bus_space_read_1(iot, ioh, TCH) << 16) |
1534 (bus_space_read_1(iot, ioh, TCM) << 8) |
1535 bus_space_read_1(iot, ioh, TCL));
1536 if (amount > 0) {
1537 out -= amount;
1538 SPC_MISC(("+%d ", amount));
1539 }
1540 }
1541
1542 /* Turn on ENREQINIT again. */
1543
1544 return out;
1545 }
1546
1547 /*
1549 * spc_datain_pio: perform data transfers using the FIFO datapath in the spc
1550 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
1551 * and ACK deasserted (i.e. at least one byte is ready).
1552 *
1553 * For now, uses a pretty dumb algorithm, hangs around until all data has been
1554 * transferred. This, is OK for fast targets, but not so smart for slow
1555 * targets which don't disconnect or for huge transfers.
1556 */
1557 int
1558 spc_datain_pio(sc, p, n)
1559 struct spc_softc *sc;
1560 u_char *p;
1561 int n;
1562 {
1563 bus_space_tag_t iot = sc->sc_iot;
1564 bus_space_handle_t ioh = sc->sc_ioh;
1565 u_short intstat;
1566 int in = 0;
1567 #define DINAMOUNT 8 /* Full FIFO */
1568
1569 SPC_TRACE(("spc_datain_pio "));
1570 /* send TRANSFER command. */
1571 bus_space_write_1(iot, ioh, TCH, n >> 16);
1572 bus_space_write_1(iot, ioh, TCM, n >> 8);
1573 bus_space_write_1(iot, ioh, TCL, n);
1574 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1575 #ifdef x68k
1576 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */
1577 #else
1578 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); /* XXX */
1579 #endif
1580 for (;;) {
1581 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1582 break;
1583 if (bus_space_read_1(iot, ioh, INTS) != 0)
1584 goto phasechange;
1585 }
1586
1587 /*
1588 * We leave this loop if one or more of the following is true:
1589 * a) phase != PH_DATAIN && FIFOs are empty
1590 * b) reset has occurred or busfree is detected.
1591 */
1592 while (n > 0) {
1593 int xfer;
1594
1595 #define INTSMASK 0xff
1596 /* Wait for fifo half full or phase mismatch */
1597 for (;;) {
1598 intstat = ((bus_space_read_1(iot, ioh, SSTS) << 8) |
1599 bus_space_read_1(iot, ioh, INTS));
1600 if ((intstat & (INTSMASK | (SSTS_DREG_FULL << 8))) !=
1601 0)
1602 break;
1603 if ((intstat & (SSTS_DREG_EMPTY << 8)) == 0)
1604 break;
1605 }
1606
1607 #if 1
1608 if ((intstat & INTSMASK) != 0)
1609 goto phasechange;
1610 #else
1611 if ((intstat & INTSMASK) != 0 &&
1612 (intstat & (SSTS_DREG_EMPTY << 8)))
1613 goto phasechange;
1614 #endif
1615 if ((intstat & (SSTS_DREG_FULL << 8)) != 0)
1616 xfer = min(DINAMOUNT, n);
1617 else
1618 xfer = min(1, n);
1619
1620 SPC_MISC((">%d ", xfer));
1621
1622 n -= xfer;
1623 in += xfer;
1624
1625 while (xfer-- > 0) {
1626 *p++ = bus_space_read_1(iot, ioh, DREG);
1627 }
1628
1629 if ((intstat & INTSMASK) != 0)
1630 goto phasechange;
1631 }
1632
1633 /*
1634 * Some SCSI-devices are rude enough to transfer more data than what
1635 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
1636 * requested 512. Test for progress, i.e. real transfers. If no real
1637 * transfers have been performed (n is probably already zero) and the
1638 * FIFO is not empty, waste some bytes....
1639 */
1640 if (in == 0) {
1641 for (;;) {
1642 if (bus_space_read_1(iot, ioh, INTS) != 0)
1643 break;
1644 }
1645 SPC_MISC(("extra data "));
1646 }
1647
1648 phasechange:
1649 /* Stop the FIFO data path. */
1650
1651 /* Turn on ENREQINIT again. */
1652
1653 return in;
1654 }
1655
1656 /*
1658 * Catch an interrupt from the adaptor
1659 */
1660 /*
1661 * This is the workhorse routine of the driver.
1662 * Deficiencies (for now):
1663 * 1) always uses programmed I/O
1664 */
1665 int
1666 spcintr(arg)
1667 void *arg;
1668 {
1669 struct spc_softc *sc = arg;
1670 bus_space_tag_t iot = sc->sc_iot;
1671 bus_space_handle_t ioh = sc->sc_ioh;
1672 u_char ints;
1673 struct spc_acb *acb;
1674 struct scsipi_link *sc_link;
1675 struct spc_tinfo *ti;
1676 int n;
1677
1678 /*
1679 * Disable interrupt.
1680 */
1681 bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB);
1682
1683 SPC_TRACE(("spcintr "));
1684
1685 loop:
1686 /*
1687 * Loop until transfer completion.
1688 */
1689 /*
1690 * First check for abnormal conditions, such as reset.
1691 */
1692 #ifdef x68k /* XXX? */
1693 while ((ints = bus_space_read_1(iot, ioh, INTS)) == 0)
1694 delay(1);
1695 SPC_MISC(("ints = 0x%x ", ints));
1696 #else
1697 ints = bus_space_read_1(iot, ioh, INTS);
1698 SPC_MISC(("ints = 0x%x ", ints));
1699 #endif
1700
1701 if ((ints & INTS_RST) != 0) {
1702 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
1703 goto reset;
1704 }
1705
1706 /*
1707 * Check for less serious errors.
1708 */
1709 if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
1710 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
1711 if (sc->sc_prevphase == PH_MSGIN) {
1712 sc->sc_flags |= SPC_DROP_MSGIN;
1713 spc_sched_msgout(sc, SEND_PARITY_ERROR);
1714 } else
1715 spc_sched_msgout(sc, SEND_INIT_DET_ERR);
1716 }
1717
1718 /*
1719 * If we're not already busy doing something test for the following
1720 * conditions:
1721 * 1) We have been reselected by something
1722 * 2) We have selected something successfully
1723 * 3) Our selection process has timed out
1724 * 4) This is really a bus free interrupt just to get a new command
1725 * going?
1726 * 5) Spurious interrupt?
1727 */
1728 switch (sc->sc_state) {
1729 case SPC_IDLE:
1730 case SPC_SELECTING:
1731 SPC_MISC(("ints:0x%02x ", ints));
1732
1733 if ((ints & INTS_SEL) != 0) {
1734 /*
1735 * We don't currently support target mode.
1736 */
1737 printf("%s: target mode selected; going to BUS FREE\n",
1738 sc->sc_dev.dv_xname);
1739
1740 goto sched;
1741 } else if ((ints & INTS_RESEL) != 0) {
1742 SPC_MISC(("reselected "));
1743
1744 /*
1745 * If we're trying to select a target ourselves,
1746 * push our command back into the ready list.
1747 */
1748 if (sc->sc_state == SPC_SELECTING) {
1749 SPC_MISC(("backoff selector "));
1750 SPC_ASSERT(sc->sc_nexus != NULL);
1751 acb = sc->sc_nexus;
1752 sc->sc_nexus = NULL;
1753 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
1754 }
1755
1756 /* Save reselection ID. */
1757 sc->sc_selid = bus_space_read_1(iot, ioh, TEMP);
1758
1759 sc->sc_state = SPC_RESELECTED;
1760 } else if ((ints & INTS_CMD_DONE) != 0) {
1761 SPC_MISC(("selected "));
1762
1763 /*
1764 * We have selected a target. Things to do:
1765 * a) Determine what message(s) to send.
1766 * b) Verify that we're still selecting the target.
1767 * c) Mark device as busy.
1768 */
1769 if (sc->sc_state != SPC_SELECTING) {
1770 printf("%s: selection out while idle; resetting\n",
1771 sc->sc_dev.dv_xname);
1772 SPC_BREAK();
1773 goto reset;
1774 }
1775 SPC_ASSERT(sc->sc_nexus != NULL);
1776 acb = sc->sc_nexus;
1777 sc_link = acb->xs->sc_link;
1778 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1779
1780 sc->sc_msgpriq = SEND_IDENTIFY;
1781 if (acb->flags & ACB_RESET)
1782 sc->sc_msgpriq |= SEND_DEV_RESET;
1783 else if (acb->flags & ACB_ABORT)
1784 sc->sc_msgpriq |= SEND_ABORT;
1785 else {
1786 #if SPC_USE_SYNCHRONOUS
1787 if ((ti->flags & DO_SYNC) != 0)
1788 sc->sc_msgpriq |= SEND_SDTR;
1789 #endif
1790 #if SPC_USE_WIDE
1791 if ((ti->flags & DO_WIDE) != 0)
1792 sc->sc_msgpriq |= SEND_WDTR;
1793 #endif
1794 }
1795
1796 acb->flags |= ACB_NEXUS;
1797 ti->lubusy |= (1 << sc_link->scsipi_scsi.lun);
1798
1799 /* Do an implicit RESTORE POINTERS. */
1800 sc->sc_dp = acb->data_addr;
1801 sc->sc_dleft = acb->data_length;
1802 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1803 sc->sc_cleft = acb->scsipi_cmd_length;
1804
1805 /* On our first connection, schedule a timeout. */
1806 if ((acb->xs->xs_control & XS_CTL_POLL) == 0)
1807 callout_reset(&acb->xs->xs_callout,
1808 (acb->timeout * hz) / 1000,
1809 spc_timeout, acb);
1810
1811 sc->sc_state = SPC_CONNECTED;
1812 } else if ((ints & INTS_TIMEOUT) != 0) {
1813 SPC_MISC(("selection timeout "));
1814
1815 if (sc->sc_state != SPC_SELECTING) {
1816 printf("%s: selection timeout while idle; resetting\n",
1817 sc->sc_dev.dv_xname);
1818 SPC_BREAK();
1819 goto reset;
1820 }
1821 SPC_ASSERT(sc->sc_nexus != NULL);
1822 acb = sc->sc_nexus;
1823
1824 delay(250);
1825
1826 acb->xs->error = XS_SELTIMEOUT;
1827 goto finish;
1828 } else {
1829 if (sc->sc_state != SPC_IDLE) {
1830 printf("%s: BUS FREE while not idle; state=%d\n",
1831 sc->sc_dev.dv_xname, sc->sc_state);
1832 SPC_BREAK();
1833 goto out;
1834 }
1835
1836 goto sched;
1837 }
1838
1839 /*
1840 * Turn off selection stuff, and prepare to catch bus free
1841 * interrupts, parity errors, and phase changes.
1842 */
1843
1844 sc->sc_flags = 0;
1845 sc->sc_prevphase = PH_INVALID;
1846 goto dophase;
1847 }
1848
1849 if ((ints & INTS_DISCON) != 0) {
1850 /* We've gone to BUS FREE phase. */
1851 bus_space_write_1(iot, ioh, PCTL,
1852 bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB);
1853 /* disable disconnect interrupt */
1854 bus_space_write_1(iot, ioh, INTS, ints);
1855 /* XXX reset interrput */
1856
1857 switch (sc->sc_state) {
1858 case SPC_RESELECTED:
1859 goto sched;
1860
1861 case SPC_CONNECTED:
1862 SPC_ASSERT(sc->sc_nexus != NULL);
1863 acb = sc->sc_nexus;
1864
1865 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1866 if (sc->sc_prevphase == PH_MSGOUT) {
1867 /*
1868 * If the target went to BUS FREE phase during
1869 * or immediately after sending a SDTR or WDTR
1870 * message, disable negotiation.
1871 */
1872 sc_link = acb->xs->sc_link;
1873 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1874 switch (sc->sc_lastmsg) {
1875 #if SPC_USE_SYNCHRONOUS
1876 case SEND_SDTR:
1877 ti->flags &= ~DO_SYNC;
1878 ti->period = ti->offset = 0;
1879 break;
1880 #endif
1881 #if SPC_USE_WIDE
1882 case SEND_WDTR:
1883 ti->flags &= ~DO_WIDE;
1884 ti->width = 0;
1885 break;
1886 #endif
1887 }
1888 }
1889 #endif
1890
1891 if ((sc->sc_flags & SPC_ABORTING) == 0) {
1892 /*
1893 * Section 5.1.1 of the SCSI 2 spec suggests
1894 * issuing a REQUEST SENSE following an
1895 * unexpected disconnect. Some devices go into
1896 * a contingent allegiance condition when
1897 * disconnecting, and this is necessary to
1898 * clean up their state.
1899 */
1900 printf("%s: unexpected disconnect; sending REQUEST SENSE\n",
1901 sc->sc_dev.dv_xname);
1902 SPC_BREAK();
1903 spc_sense(sc, acb);
1904 goto out;
1905 }
1906
1907 acb->xs->error = XS_DRIVER_STUFFUP;
1908 goto finish;
1909
1910 case SPC_DISCONNECT:
1911 SPC_ASSERT(sc->sc_nexus != NULL);
1912 acb = sc->sc_nexus;
1913 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
1914 sc->sc_nexus = NULL;
1915 goto sched;
1916
1917 case SPC_CMDCOMPLETE:
1918 SPC_ASSERT(sc->sc_nexus != NULL);
1919 acb = sc->sc_nexus;
1920 goto finish;
1921 }
1922 }
1923 else if ((ints & INTS_CMD_DONE) != 0 &&
1924 sc->sc_prevphase == PH_MSGIN && sc->sc_state != SPC_CONNECTED)
1925 goto out;
1926
1927 dophase:
1928 #if 0
1929 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
1930 /* Wait for REQINIT. */
1931 goto out;
1932 }
1933 #else
1934 bus_space_write_1(iot, ioh, INTS, ints);
1935 ints = 0;
1936 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
1937 delay(1); /* need timeout XXX */
1938 #endif
1939
1940 /*
1941 * State transition.
1942 */
1943 sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK;
1944 /* bus_space_write_1(iot, ioh, PCTL, sc->sc_phase);*/
1945
1946 SPC_MISC(("phase=%d\n", sc->sc_phase));
1947 switch (sc->sc_phase) {
1948 case PH_MSGOUT:
1949 if (sc->sc_state != SPC_CONNECTED &&
1950 sc->sc_state != SPC_RESELECTED)
1951 break;
1952 spc_msgout(sc);
1953 sc->sc_prevphase = PH_MSGOUT;
1954 goto loop;
1955
1956 case PH_MSGIN:
1957 if (sc->sc_state != SPC_CONNECTED &&
1958 sc->sc_state != SPC_RESELECTED)
1959 break;
1960 spc_msgin(sc);
1961 sc->sc_prevphase = PH_MSGIN;
1962 goto loop;
1963
1964 case PH_CMD:
1965 if (sc->sc_state != SPC_CONNECTED)
1966 break;
1967 #if SPC_DEBUG
1968 if ((spc_debug & SPC_SHOWMISC) != 0) {
1969 SPC_ASSERT(sc->sc_nexus != NULL);
1970 acb = sc->sc_nexus;
1971 printf("cmd=0x%02x+%d ",
1972 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length-1);
1973 }
1974 #endif
1975 n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
1976 sc->sc_cp += n;
1977 sc->sc_cleft -= n;
1978 sc->sc_prevphase = PH_CMD;
1979 goto loop;
1980
1981 case PH_DATAOUT:
1982 if (sc->sc_state != SPC_CONNECTED)
1983 break;
1984 SPC_MISC(("dataout dleft=%d ", sc->sc_dleft));
1985 n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
1986 sc->sc_dp += n;
1987 sc->sc_dleft -= n;
1988 sc->sc_prevphase = PH_DATAOUT;
1989 goto loop;
1990
1991 case PH_DATAIN:
1992 if (sc->sc_state != SPC_CONNECTED)
1993 break;
1994 SPC_MISC(("datain "));
1995 n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
1996 sc->sc_dp += n;
1997 sc->sc_dleft -= n;
1998 sc->sc_prevphase = PH_DATAIN;
1999 goto loop;
2000
2001 case PH_STAT:
2002 if (sc->sc_state != SPC_CONNECTED)
2003 break;
2004 SPC_ASSERT(sc->sc_nexus != NULL);
2005 acb = sc->sc_nexus;
2006 /*acb->target_stat = bus_space_read_1(iot, ioh, DREG);*/
2007 spc_datain_pio(sc, &acb->target_stat, 1);
2008 SPC_MISC(("target_stat=0x%02x ", acb->target_stat));
2009 sc->sc_prevphase = PH_STAT;
2010 goto loop;
2011 }
2012
2013 printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname);
2014 SPC_BREAK();
2015 reset:
2016 spc_init(sc);
2017 return 1;
2018
2019 finish:
2020 callout_stop(&acb->xs->xs_callout);
2021 bus_space_write_1(iot, ioh, INTS, ints);
2022 ints = 0;
2023 spc_done(sc, acb);
2024 goto out;
2025
2026 sched:
2027 sc->sc_state = SPC_IDLE;
2028 spc_sched(sc);
2029 goto out;
2030
2031 out:
2032 if (ints)
2033 bus_space_write_1(iot, ioh, INTS, ints);
2034 bus_space_write_1(iot, ioh, SCTL,
2035 bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB);
2036 return 1;
2037 }
2038
2039 void
2040 spc_abort(sc, acb)
2041 struct spc_softc *sc;
2042 struct spc_acb *acb;
2043 {
2044
2045 /* 2 secs for the abort */
2046 acb->timeout = SPC_ABORT_TIMEOUT;
2047 acb->flags |= ACB_ABORT;
2048
2049 if (acb == sc->sc_nexus) {
2050 /*
2051 * If we're still selecting, the message will be scheduled
2052 * after selection is complete.
2053 */
2054 if (sc->sc_state == SPC_CONNECTED)
2055 spc_sched_msgout(sc, SEND_ABORT);
2056 } else {
2057 spc_dequeue(sc, acb);
2058 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
2059 if (sc->sc_state == SPC_IDLE)
2060 spc_sched(sc);
2061 }
2062 }
2063
2064 void
2065 spc_timeout(arg)
2066 void *arg;
2067 {
2068 struct spc_acb *acb = arg;
2069 struct scsipi_xfer *xs = acb->xs;
2070 struct scsipi_link *sc_link = xs->sc_link;
2071 struct spc_softc *sc = sc_link->adapter_softc;
2072 int s;
2073
2074 scsi_print_addr(sc_link);
2075 printf("timed out");
2076
2077 s = splbio();
2078
2079 if (acb->flags & ACB_ABORT) {
2080 /* abort timed out */
2081 printf(" AGAIN\n");
2082 /* XXX Must reset! */
2083 } else {
2084 /* abort the operation that has timed out */
2085 printf("\n");
2086 acb->xs->error = XS_TIMEOUT;
2087 spc_abort(sc, acb);
2088 }
2089
2090 splx(s);
2091 }
2092
2093 #ifdef SPC_DEBUG
2095 /*
2096 * The following functions are mostly used for debugging purposes, either
2097 * directly called from the driver or from the kernel debugger.
2098 */
2099
2100 void
2101 spc_show_scsi_cmd(acb)
2102 struct spc_acb *acb;
2103 {
2104 u_char *b = (u_char *)&acb->scsipi_cmd;
2105 struct scsipi_link *sc_link = acb->xs->sc_link;
2106 int i;
2107
2108 scsi_print_addr(sc_link);
2109 if ((acb->xs->xs_control & XS_CTL_RESET) == 0) {
2110 for (i = 0; i < acb->scsipi_cmd_length; i++) {
2111 if (i)
2112 printf(",");
2113 printf("%x", b[i]);
2114 }
2115 printf("\n");
2116 } else
2117 printf("RESET\n");
2118 }
2119
2120 void
2121 spc_print_acb(acb)
2122 struct spc_acb *acb;
2123 {
2124
2125 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
2126 printf(" dp=%p dleft=%d target_stat=%x\n",
2127 acb->data_addr, acb->data_length, acb->target_stat);
2128 spc_show_scsi_cmd(acb);
2129 }
2130
2131 void
2132 spc_print_active_acb()
2133 {
2134 struct spc_acb *acb;
2135 struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */
2136
2137 printf("ready list:\n");
2138 for (acb = sc->ready_list.tqh_first; acb != NULL;
2139 acb = acb->chain.tqe_next)
2140 spc_print_acb(acb);
2141 printf("nexus:\n");
2142 if (sc->sc_nexus != NULL)
2143 spc_print_acb(sc->sc_nexus);
2144 printf("nexus list:\n");
2145 for (acb = sc->nexus_list.tqh_first; acb != NULL;
2146 acb = acb->chain.tqe_next)
2147 spc_print_acb(acb);
2148 }
2149
2150 void
2151 spc_dump89352(sc)
2152 struct spc_softc *sc;
2153 {
2154 bus_space_tag_t iot = sc->sc_iot;
2155 bus_space_handle_t ioh = sc->sc_ioh;
2156
2157 printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n",
2158 bus_space_read_1(iot, ioh, BDID),
2159 bus_space_read_1(iot, ioh, SCTL),
2160 bus_space_read_1(iot, ioh, SCMD),
2161 bus_space_read_1(iot, ioh, TMOD));
2162 printf(" INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n",
2163 bus_space_read_1(iot, ioh, INTS),
2164 bus_space_read_1(iot, ioh, PSNS),
2165 bus_space_read_1(iot, ioh, SSTS),
2166 bus_space_read_1(iot, ioh, SERR),
2167 bus_space_read_1(iot, ioh, PCTL));
2168 printf(" MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n",
2169 bus_space_read_1(iot, ioh, MBC),
2170 #if 0
2171 bus_space_read_1(iot, ioh, DREG),
2172 #else
2173 0,
2174 #endif
2175 bus_space_read_1(iot, ioh, TEMP),
2176 bus_space_read_1(iot, ioh, TCH),
2177 bus_space_read_1(iot, ioh, TCM));
2178 printf(" TCL=%x EXBF=%x\n",
2179 bus_space_read_1(iot, ioh, TCL),
2180 bus_space_read_1(iot, ioh, EXBF));
2181 }
2182
2183 void
2184 spc_dump_driver(sc)
2185 struct spc_softc *sc;
2186 {
2187 struct spc_tinfo *ti;
2188 int i;
2189
2190 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
2191 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x currmsg=%x\n",
2192 sc->sc_state, sc->sc_imess[0],
2193 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
2194 for (i = 0; i < 7; i++) {
2195 ti = &sc->sc_tinfo[i];
2196 printf("tinfo%d: %d cmds %d disconnects %d timeouts",
2197 i, ti->cmds, ti->dconns, ti->touts);
2198 printf(" %d senses flags=%x\n", ti->senses, ti->flags);
2199 }
2200 }
2201 #endif
2202