1 1.1 thorpej /* $NetBSD: mcp23xxxgpioreg.h,v 1.1 2022/01/17 16:31:23 thorpej Exp $ */ 2 1.1 thorpej 3 1.1 thorpej /*- 4 1.1 thorpej * Copyright (c) 2014, 2022 The NetBSD Foundation, Inc. 5 1.1 thorpej * All rights reserved. 6 1.1 thorpej * 7 1.1 thorpej * This code is derived from software contributed to The NetBSD Foundation 8 1.1 thorpej * by Frank Kardel, and by Jason R. Thorpe. 9 1.1 thorpej * 10 1.1 thorpej * Redistribution and use in source and binary forms, with or without 11 1.1 thorpej * modification, are permitted provided that the following conditions 12 1.1 thorpej * are met: 13 1.1 thorpej * 1. Redistributions of source code must retain the above copyright 14 1.1 thorpej * notice, this list of conditions and the following disclaimer. 15 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 thorpej * notice, this list of conditions and the following disclaimer in the 17 1.1 thorpej * documentation and/or other materials provided with the distribution. 18 1.1 thorpej * 19 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 thorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 thorpej * POSSIBILITY OF SUCH DAMAGE. 30 1.1 thorpej */ 31 1.1 thorpej 32 1.1 thorpej #ifndef _DEV_IC_MCP23xxxGPIOREG_H_ 33 1.1 thorpej #define _DEV_IC_MCP23xxxGPIOREG_H_ 34 1.1 thorpej 35 1.1 thorpej /* 36 1.1 thorpej * Microchip serial I/O expanders: 37 1.1 thorpej * 38 1.1 thorpej * MCP23008 8-bit, I2C interface 39 1.1 thorpej * MCP23S08 8-bit, SPI interface 40 1.1 thorpej * MCP23017 16-bit, I2C interface 41 1.1 thorpej * MCP23S17 16-bit, SPI interface 42 1.1 thorpej * MCP23018 16-bit (open-drain outputs), I2C interface 43 1.1 thorpej * MCP23S18 16-bit (open-drain outputs), SPI interface 44 1.1 thorpej * 45 1.1 thorpej * Data sheet: 46 1.1 thorpej * 47 1.1 thorpej * https://ww1.microchip.com/downloads/en/DeviceDoc/20001952C.pdf 48 1.1 thorpej */ 49 1.1 thorpej 50 1.1 thorpej /* resources */ 51 1.1 thorpej #define MCPGPIO_PINS_PER_BANK 8 52 1.1 thorpej 53 1.1 thorpej #define MCP23x08_GPIO_NBANKS 1 54 1.1 thorpej #define MCP23x08_GPIO_NPINS (MCPGPIO_PINS_PER_BANK * MCP23x08_GPIO_NBANKS) 55 1.1 thorpej 56 1.1 thorpej #define MCP23x17_GPIO_NBANKS 2 57 1.1 thorpej #define MCP23x17_GPIO_NPINS (MCPGPIO_PINS_PER_BANK * MCP23x17_GPIO_NBANKS) 58 1.1 thorpej 59 1.1 thorpej /* 60 1.1 thorpej * The MCP23x17 has two addressing schemes, depending on the setting 61 1.1 thorpej * of IOCON.BANK: 62 1.1 thorpej * 63 1.1 thorpej * IOCON.BANK=1 IOCON.BANK=0 Register 64 1.1 thorpej * ----------------------------------------------------- 65 1.1 thorpej * 0x00 0x00 IODIRA 66 1.1 thorpej * 0x10 0x01 IODIRB 67 1.1 thorpej * 0x01 0x02 IPOLA 68 1.1 thorpej * 0x11 0x03 IPOLB 69 1.1 thorpej * 0x02 0x04 GPINTENA 70 1.1 thorpej * 0x12 0x05 GPINTENB 71 1.1 thorpej * 0x03 0x06 DEFVALA 72 1.1 thorpej * 0x13 0x07 DEFVALB 73 1.1 thorpej * 0x04 0x08 INTCONA 74 1.1 thorpej * 0x14 0x09 INTCONB 75 1.1 thorpej * 0x05 0x0a IOCON 76 1.1 thorpej * 0x15 0x0b IOCON (yes, it's an alias) 77 1.1 thorpej * 0x06 0x0c GPPUA 78 1.1 thorpej * 0x16 0x0d GPPUB 79 1.1 thorpej * 0x07 0x0e INTFA 80 1.1 thorpej * 0x17 0x0f INTFB 81 1.1 thorpej * 0x08 0x10 INTCAPA 82 1.1 thorpej * 0x18 0x11 INTCAPB 83 1.1 thorpej * 0x09 0x12 GPIOA 84 1.1 thorpej * 0x19 0x13 GPIOB 85 1.1 thorpej * 0x0a 0x14 OLATA 86 1.1 thorpej * 0x1a 0x15 OLATB 87 1.1 thorpej * 88 1.1 thorpej * The MCP23x08, of course, only has a single bank of 8 GPIOs, and it 89 1.1 thorpej * has an addressing schme that operates like IOCON.BANK=1 90 1.1 thorpej */ 91 1.1 thorpej #define REG_IODIR 0x00 92 1.1 thorpej #define REG_IPOL 0x01 93 1.1 thorpej #define REG_GPINTEN 0x02 94 1.1 thorpej #define REG_DEFVAL 0x03 95 1.1 thorpej #define REG_INTCON 0x04 96 1.1 thorpej #define REG_IOCON 0x05 97 1.1 thorpej #define REG_GPPU 0x06 98 1.1 thorpej #define REG_INTF 0x07 99 1.1 thorpej #define REG_INTCAP 0x08 100 1.1 thorpej #define REG_GPIO 0x09 101 1.1 thorpej #define REG_OLAT 0x0a 102 1.1 thorpej 103 1.1 thorpej /* IOCON.BANK=1 */ 104 1.1 thorpej #define REGADDR_BANK1(bank, reg) (((bank) << 4) | (reg)) 105 1.1 thorpej 106 1.1 thorpej /* IOCON.BANK=0 */ 107 1.1 thorpej #define REGADDR_BANK0(bank, reg) (((reg) << 1) | (bank)) 108 1.1 thorpej 109 1.1 thorpej /* bits */ 110 1.1 thorpej #define IOCON_BANK __BIT(7) /* select address layout (23x1x only) */ 111 1.1 thorpej #define IOCON_MIRROR __BIT(6) /* mirror INTA/INTB outputs (23x1x only) */ 112 1.1 thorpej #define IOCON_SEQOP __BIT(5) /* sequential address operation */ 113 1.1 thorpej #define IOCON_DISLW __BIT(4) /* slew rate SDA output */ 114 1.1 thorpej #define IOCON_HAEN __BIT(3) /* hardware address enable bit (SPI only) */ 115 1.1 thorpej #define IOCON_ODR __BIT(2) /* configure INT pin as open drain */ 116 1.1 thorpej #define IOCON_INTPOL __BIT(1) /* INT pin polarity (unless ODR is set) */ 117 1.1 thorpej 118 1.1 thorpej #endif /* _DEV_IC_MCP23xxxGPIOREG_H_ */ 119