mfi.c revision 1.26 1 1.26 dyoung /* $NetBSD: mfi.c,v 1.26 2009/07/16 18:10:00 dyoung Exp $ */
2 1.1 bouyer /* $OpenBSD: mfi.c,v 1.66 2006/11/28 23:59:45 dlg Exp $ */
3 1.1 bouyer /*
4 1.1 bouyer * Copyright (c) 2006 Marco Peereboom <marco (at) peereboom.us>
5 1.1 bouyer *
6 1.1 bouyer * Permission to use, copy, modify, and distribute this software for any
7 1.1 bouyer * purpose with or without fee is hereby granted, provided that the above
8 1.1 bouyer * copyright notice and this permission notice appear in all copies.
9 1.1 bouyer *
10 1.1 bouyer * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 1.1 bouyer * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 1.1 bouyer * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 1.1 bouyer * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 1.1 bouyer * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 1.1 bouyer * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 1.1 bouyer * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 1.1 bouyer */
18 1.1 bouyer
19 1.2 bouyer #include <sys/cdefs.h>
20 1.26 dyoung __KERNEL_RCSID(0, "$NetBSD: mfi.c,v 1.26 2009/07/16 18:10:00 dyoung Exp $");
21 1.2 bouyer
22 1.4 bouyer #include "bio.h"
23 1.1 bouyer
24 1.1 bouyer #include <sys/param.h>
25 1.1 bouyer #include <sys/systm.h>
26 1.1 bouyer #include <sys/buf.h>
27 1.1 bouyer #include <sys/ioctl.h>
28 1.1 bouyer #include <sys/device.h>
29 1.1 bouyer #include <sys/kernel.h>
30 1.1 bouyer #include <sys/malloc.h>
31 1.1 bouyer #include <sys/proc.h>
32 1.1 bouyer
33 1.1 bouyer #include <uvm/uvm_param.h>
34 1.1 bouyer
35 1.10 ad #include <sys/bus.h>
36 1.1 bouyer
37 1.1 bouyer #include <dev/scsipi/scsipi_all.h>
38 1.1 bouyer #include <dev/scsipi/scsi_all.h>
39 1.1 bouyer #include <dev/scsipi/scsi_spc.h>
40 1.1 bouyer #include <dev/scsipi/scsipi_disk.h>
41 1.1 bouyer #include <dev/scsipi/scsi_disk.h>
42 1.1 bouyer #include <dev/scsipi/scsiconf.h>
43 1.1 bouyer
44 1.1 bouyer #include <dev/ic/mfireg.h>
45 1.1 bouyer #include <dev/ic/mfivar.h>
46 1.1 bouyer
47 1.1 bouyer #if NBIO > 0
48 1.1 bouyer #include <dev/biovar.h>
49 1.1 bouyer #endif /* NBIO > 0 */
50 1.1 bouyer
51 1.1 bouyer #ifdef MFI_DEBUG
52 1.1 bouyer uint32_t mfi_debug = 0
53 1.1 bouyer /* | MFI_D_CMD */
54 1.1 bouyer /* | MFI_D_INTR */
55 1.1 bouyer /* | MFI_D_MISC */
56 1.1 bouyer /* | MFI_D_DMA */
57 1.1 bouyer | MFI_D_IOCTL
58 1.1 bouyer /* | MFI_D_RW */
59 1.1 bouyer /* | MFI_D_MEM */
60 1.1 bouyer /* | MFI_D_CCB */
61 1.1 bouyer ;
62 1.1 bouyer #endif
63 1.1 bouyer
64 1.13 xtraeme static void mfi_scsipi_request(struct scsipi_channel *,
65 1.13 xtraeme scsipi_adapter_req_t, void *);
66 1.13 xtraeme static void mfiminphys(struct buf *bp);
67 1.13 xtraeme
68 1.13 xtraeme static struct mfi_ccb *mfi_get_ccb(struct mfi_softc *);
69 1.13 xtraeme static void mfi_put_ccb(struct mfi_ccb *);
70 1.13 xtraeme static int mfi_init_ccb(struct mfi_softc *);
71 1.13 xtraeme
72 1.13 xtraeme static struct mfi_mem *mfi_allocmem(struct mfi_softc *, size_t);
73 1.13 xtraeme static void mfi_freemem(struct mfi_softc *, struct mfi_mem *);
74 1.13 xtraeme
75 1.13 xtraeme static int mfi_transition_firmware(struct mfi_softc *);
76 1.13 xtraeme static int mfi_initialize_firmware(struct mfi_softc *);
77 1.13 xtraeme static int mfi_get_info(struct mfi_softc *);
78 1.13 xtraeme static uint32_t mfi_read(struct mfi_softc *, bus_size_t);
79 1.13 xtraeme static void mfi_write(struct mfi_softc *, bus_size_t, uint32_t);
80 1.13 xtraeme static int mfi_poll(struct mfi_ccb *);
81 1.13 xtraeme static int mfi_create_sgl(struct mfi_ccb *, int);
82 1.1 bouyer
83 1.1 bouyer /* commands */
84 1.13 xtraeme static int mfi_scsi_ld(struct mfi_ccb *, struct scsipi_xfer *);
85 1.13 xtraeme static int mfi_scsi_io(struct mfi_ccb *, struct scsipi_xfer *,
86 1.13 xtraeme uint32_t, uint32_t);
87 1.13 xtraeme static void mfi_scsi_xs_done(struct mfi_ccb *);
88 1.19 bouyer static int mfi_mgmt_internal(struct mfi_softc *,
89 1.19 bouyer uint32_t, uint32_t, uint32_t, void *, uint8_t *);
90 1.19 bouyer static int mfi_mgmt(struct mfi_ccb *,struct scsipi_xfer *,
91 1.19 bouyer uint32_t, uint32_t, uint32_t, void *, uint8_t *);
92 1.13 xtraeme static void mfi_mgmt_done(struct mfi_ccb *);
93 1.1 bouyer
94 1.1 bouyer #if NBIO > 0
95 1.23 cegger static int mfi_ioctl(device_t, u_long, void *);
96 1.13 xtraeme static int mfi_ioctl_inq(struct mfi_softc *, struct bioc_inq *);
97 1.13 xtraeme static int mfi_ioctl_vol(struct mfi_softc *, struct bioc_vol *);
98 1.13 xtraeme static int mfi_ioctl_disk(struct mfi_softc *, struct bioc_disk *);
99 1.13 xtraeme static int mfi_ioctl_alarm(struct mfi_softc *,
100 1.13 xtraeme struct bioc_alarm *);
101 1.13 xtraeme static int mfi_ioctl_blink(struct mfi_softc *sc,
102 1.13 xtraeme struct bioc_blink *);
103 1.13 xtraeme static int mfi_ioctl_setstate(struct mfi_softc *,
104 1.13 xtraeme struct bioc_setstate *);
105 1.13 xtraeme static int mfi_bio_hs(struct mfi_softc *, int, int, void *);
106 1.13 xtraeme static int mfi_create_sensors(struct mfi_softc *);
107 1.24 dyoung static int mfi_destroy_sensors(struct mfi_softc *);
108 1.13 xtraeme static void mfi_sensor_refresh(struct sysmon_envsys *,
109 1.13 xtraeme envsys_data_t *);
110 1.1 bouyer #endif /* NBIO > 0 */
111 1.1 bouyer
112 1.13 xtraeme static uint32_t mfi_xscale_fw_state(struct mfi_softc *sc);
113 1.13 xtraeme static void mfi_xscale_intr_ena(struct mfi_softc *sc);
114 1.24 dyoung static void mfi_xscale_intr_dis(struct mfi_softc *sc);
115 1.13 xtraeme static int mfi_xscale_intr(struct mfi_softc *sc);
116 1.13 xtraeme static void mfi_xscale_post(struct mfi_softc *sc, struct mfi_ccb *ccb);
117 1.12 xtraeme
118 1.12 xtraeme static const struct mfi_iop_ops mfi_iop_xscale = {
119 1.12 xtraeme mfi_xscale_fw_state,
120 1.24 dyoung mfi_xscale_intr_dis,
121 1.12 xtraeme mfi_xscale_intr_ena,
122 1.12 xtraeme mfi_xscale_intr,
123 1.12 xtraeme mfi_xscale_post
124 1.12 xtraeme };
125 1.12 xtraeme
126 1.13 xtraeme static uint32_t mfi_ppc_fw_state(struct mfi_softc *sc);
127 1.13 xtraeme static void mfi_ppc_intr_ena(struct mfi_softc *sc);
128 1.24 dyoung static void mfi_ppc_intr_dis(struct mfi_softc *sc);
129 1.13 xtraeme static int mfi_ppc_intr(struct mfi_softc *sc);
130 1.13 xtraeme static void mfi_ppc_post(struct mfi_softc *sc, struct mfi_ccb *ccb);
131 1.12 xtraeme
132 1.12 xtraeme static const struct mfi_iop_ops mfi_iop_ppc = {
133 1.12 xtraeme mfi_ppc_fw_state,
134 1.24 dyoung mfi_ppc_intr_dis,
135 1.12 xtraeme mfi_ppc_intr_ena,
136 1.12 xtraeme mfi_ppc_intr,
137 1.12 xtraeme mfi_ppc_post
138 1.12 xtraeme };
139 1.12 xtraeme
140 1.12 xtraeme #define mfi_fw_state(_s) ((_s)->sc_iop->mio_fw_state(_s))
141 1.12 xtraeme #define mfi_intr_enable(_s) ((_s)->sc_iop->mio_intr_ena(_s))
142 1.24 dyoung #define mfi_intr_disable(_s) ((_s)->sc_iop->mio_intr_dis(_s))
143 1.12 xtraeme #define mfi_my_intr(_s) ((_s)->sc_iop->mio_intr(_s))
144 1.12 xtraeme #define mfi_post(_s, _c) ((_s)->sc_iop->mio_post((_s), (_c)))
145 1.12 xtraeme
146 1.13 xtraeme static struct mfi_ccb *
147 1.1 bouyer mfi_get_ccb(struct mfi_softc *sc)
148 1.1 bouyer {
149 1.1 bouyer struct mfi_ccb *ccb;
150 1.1 bouyer int s;
151 1.1 bouyer
152 1.1 bouyer s = splbio();
153 1.1 bouyer ccb = TAILQ_FIRST(&sc->sc_ccb_freeq);
154 1.1 bouyer if (ccb) {
155 1.1 bouyer TAILQ_REMOVE(&sc->sc_ccb_freeq, ccb, ccb_link);
156 1.1 bouyer ccb->ccb_state = MFI_CCB_READY;
157 1.1 bouyer }
158 1.1 bouyer splx(s);
159 1.1 bouyer
160 1.1 bouyer DNPRINTF(MFI_D_CCB, "%s: mfi_get_ccb: %p\n", DEVNAME(sc), ccb);
161 1.1 bouyer
162 1.13 xtraeme return ccb;
163 1.1 bouyer }
164 1.1 bouyer
165 1.13 xtraeme static void
166 1.1 bouyer mfi_put_ccb(struct mfi_ccb *ccb)
167 1.1 bouyer {
168 1.1 bouyer struct mfi_softc *sc = ccb->ccb_sc;
169 1.1 bouyer int s;
170 1.1 bouyer
171 1.1 bouyer DNPRINTF(MFI_D_CCB, "%s: mfi_put_ccb: %p\n", DEVNAME(sc), ccb);
172 1.1 bouyer
173 1.1 bouyer s = splbio();
174 1.1 bouyer ccb->ccb_state = MFI_CCB_FREE;
175 1.1 bouyer ccb->ccb_xs = NULL;
176 1.1 bouyer ccb->ccb_flags = 0;
177 1.1 bouyer ccb->ccb_done = NULL;
178 1.1 bouyer ccb->ccb_direction = 0;
179 1.1 bouyer ccb->ccb_frame_size = 0;
180 1.1 bouyer ccb->ccb_extra_frames = 0;
181 1.1 bouyer ccb->ccb_sgl = NULL;
182 1.1 bouyer ccb->ccb_data = NULL;
183 1.1 bouyer ccb->ccb_len = 0;
184 1.1 bouyer TAILQ_INSERT_TAIL(&sc->sc_ccb_freeq, ccb, ccb_link);
185 1.1 bouyer splx(s);
186 1.1 bouyer }
187 1.1 bouyer
188 1.13 xtraeme static int
189 1.24 dyoung mfi_destroy_ccb(struct mfi_softc *sc)
190 1.24 dyoung {
191 1.24 dyoung struct mfi_ccb *ccb;
192 1.24 dyoung uint32_t i;
193 1.24 dyoung
194 1.24 dyoung DNPRINTF(MFI_D_CCB, "%s: mfi_init_ccb\n", DEVNAME(sc));
195 1.24 dyoung
196 1.24 dyoung
197 1.24 dyoung for (i = 0; (ccb = mfi_get_ccb(sc)) != NULL; i++) {
198 1.24 dyoung /* create a dma map for transfer */
199 1.24 dyoung bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap);
200 1.24 dyoung }
201 1.24 dyoung
202 1.24 dyoung if (i < sc->sc_max_cmds)
203 1.24 dyoung return EBUSY;
204 1.24 dyoung
205 1.24 dyoung free(sc->sc_ccb, M_DEVBUF);
206 1.24 dyoung
207 1.24 dyoung return 0;
208 1.24 dyoung }
209 1.24 dyoung
210 1.24 dyoung static int
211 1.1 bouyer mfi_init_ccb(struct mfi_softc *sc)
212 1.1 bouyer {
213 1.1 bouyer struct mfi_ccb *ccb;
214 1.1 bouyer uint32_t i;
215 1.1 bouyer int error;
216 1.1 bouyer
217 1.1 bouyer DNPRINTF(MFI_D_CCB, "%s: mfi_init_ccb\n", DEVNAME(sc));
218 1.1 bouyer
219 1.1 bouyer sc->sc_ccb = malloc(sizeof(struct mfi_ccb) * sc->sc_max_cmds,
220 1.13 xtraeme M_DEVBUF, M_WAITOK|M_ZERO);
221 1.1 bouyer
222 1.1 bouyer for (i = 0; i < sc->sc_max_cmds; i++) {
223 1.1 bouyer ccb = &sc->sc_ccb[i];
224 1.1 bouyer
225 1.1 bouyer ccb->ccb_sc = sc;
226 1.1 bouyer
227 1.1 bouyer /* select i'th frame */
228 1.1 bouyer ccb->ccb_frame = (union mfi_frame *)
229 1.1 bouyer ((char*)MFIMEM_KVA(sc->sc_frames) + sc->sc_frames_size * i);
230 1.1 bouyer ccb->ccb_pframe =
231 1.1 bouyer MFIMEM_DVA(sc->sc_frames) + sc->sc_frames_size * i;
232 1.1 bouyer ccb->ccb_frame->mfr_header.mfh_context = i;
233 1.1 bouyer
234 1.1 bouyer /* select i'th sense */
235 1.1 bouyer ccb->ccb_sense = (struct mfi_sense *)
236 1.1 bouyer ((char*)MFIMEM_KVA(sc->sc_sense) + MFI_SENSE_SIZE * i);
237 1.1 bouyer ccb->ccb_psense =
238 1.1 bouyer (MFIMEM_DVA(sc->sc_sense) + MFI_SENSE_SIZE * i);
239 1.1 bouyer
240 1.1 bouyer /* create a dma map for transfer */
241 1.1 bouyer error = bus_dmamap_create(sc->sc_dmat,
242 1.1 bouyer MAXPHYS, sc->sc_max_sgl, MAXPHYS, 0,
243 1.1 bouyer BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->ccb_dmamap);
244 1.1 bouyer if (error) {
245 1.1 bouyer printf("%s: cannot create ccb dmamap (%d)\n",
246 1.1 bouyer DEVNAME(sc), error);
247 1.1 bouyer goto destroy;
248 1.1 bouyer }
249 1.1 bouyer
250 1.1 bouyer DNPRINTF(MFI_D_CCB,
251 1.4 bouyer "ccb(%d): %p frame: %#lx (%#lx) sense: %#lx (%#lx) map: %#lx\n",
252 1.1 bouyer ccb->ccb_frame->mfr_header.mfh_context, ccb,
253 1.4 bouyer (u_long)ccb->ccb_frame, (u_long)ccb->ccb_pframe,
254 1.4 bouyer (u_long)ccb->ccb_sense, (u_long)ccb->ccb_psense,
255 1.4 bouyer (u_long)ccb->ccb_dmamap);
256 1.1 bouyer
257 1.1 bouyer /* add ccb to queue */
258 1.1 bouyer mfi_put_ccb(ccb);
259 1.1 bouyer }
260 1.1 bouyer
261 1.13 xtraeme return 0;
262 1.1 bouyer destroy:
263 1.1 bouyer /* free dma maps and ccb memory */
264 1.17 cegger while (i) {
265 1.17 cegger i--;
266 1.1 bouyer ccb = &sc->sc_ccb[i];
267 1.1 bouyer bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap);
268 1.1 bouyer }
269 1.1 bouyer
270 1.1 bouyer free(sc->sc_ccb, M_DEVBUF);
271 1.1 bouyer
272 1.13 xtraeme return 1;
273 1.1 bouyer }
274 1.1 bouyer
275 1.13 xtraeme static uint32_t
276 1.1 bouyer mfi_read(struct mfi_softc *sc, bus_size_t r)
277 1.1 bouyer {
278 1.1 bouyer uint32_t rv;
279 1.1 bouyer
280 1.1 bouyer bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
281 1.1 bouyer BUS_SPACE_BARRIER_READ);
282 1.1 bouyer rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, r);
283 1.1 bouyer
284 1.4 bouyer DNPRINTF(MFI_D_RW, "%s: mr 0x%lx 0x08%x ", DEVNAME(sc), (u_long)r, rv);
285 1.13 xtraeme return rv;
286 1.1 bouyer }
287 1.1 bouyer
288 1.13 xtraeme static void
289 1.1 bouyer mfi_write(struct mfi_softc *sc, bus_size_t r, uint32_t v)
290 1.1 bouyer {
291 1.4 bouyer DNPRINTF(MFI_D_RW, "%s: mw 0x%lx 0x%08x", DEVNAME(sc), (u_long)r, v);
292 1.1 bouyer
293 1.1 bouyer bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
294 1.1 bouyer bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
295 1.1 bouyer BUS_SPACE_BARRIER_WRITE);
296 1.1 bouyer }
297 1.1 bouyer
298 1.13 xtraeme static struct mfi_mem *
299 1.1 bouyer mfi_allocmem(struct mfi_softc *sc, size_t size)
300 1.1 bouyer {
301 1.1 bouyer struct mfi_mem *mm;
302 1.1 bouyer int nsegs;
303 1.1 bouyer
304 1.4 bouyer DNPRINTF(MFI_D_MEM, "%s: mfi_allocmem: %ld\n", DEVNAME(sc),
305 1.4 bouyer (long)size);
306 1.1 bouyer
307 1.13 xtraeme mm = malloc(sizeof(struct mfi_mem), M_DEVBUF, M_NOWAIT|M_ZERO);
308 1.1 bouyer if (mm == NULL)
309 1.13 xtraeme return NULL;
310 1.1 bouyer
311 1.1 bouyer mm->am_size = size;
312 1.1 bouyer
313 1.1 bouyer if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
314 1.1 bouyer BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &mm->am_map) != 0)
315 1.1 bouyer goto amfree;
316 1.1 bouyer
317 1.1 bouyer if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &mm->am_seg, 1,
318 1.1 bouyer &nsegs, BUS_DMA_NOWAIT) != 0)
319 1.1 bouyer goto destroy;
320 1.1 bouyer
321 1.1 bouyer if (bus_dmamem_map(sc->sc_dmat, &mm->am_seg, nsegs, size, &mm->am_kva,
322 1.1 bouyer BUS_DMA_NOWAIT) != 0)
323 1.1 bouyer goto free;
324 1.1 bouyer
325 1.1 bouyer if (bus_dmamap_load(sc->sc_dmat, mm->am_map, mm->am_kva, size, NULL,
326 1.1 bouyer BUS_DMA_NOWAIT) != 0)
327 1.1 bouyer goto unmap;
328 1.1 bouyer
329 1.1 bouyer DNPRINTF(MFI_D_MEM, " kva: %p dva: %p map: %p\n",
330 1.4 bouyer mm->am_kva, (void *)mm->am_map->dm_segs[0].ds_addr, mm->am_map);
331 1.1 bouyer
332 1.1 bouyer memset(mm->am_kva, 0, size);
333 1.13 xtraeme return mm;
334 1.1 bouyer
335 1.1 bouyer unmap:
336 1.1 bouyer bus_dmamem_unmap(sc->sc_dmat, mm->am_kva, size);
337 1.1 bouyer free:
338 1.1 bouyer bus_dmamem_free(sc->sc_dmat, &mm->am_seg, 1);
339 1.1 bouyer destroy:
340 1.1 bouyer bus_dmamap_destroy(sc->sc_dmat, mm->am_map);
341 1.1 bouyer amfree:
342 1.1 bouyer free(mm, M_DEVBUF);
343 1.1 bouyer
344 1.13 xtraeme return NULL;
345 1.1 bouyer }
346 1.1 bouyer
347 1.13 xtraeme static void
348 1.1 bouyer mfi_freemem(struct mfi_softc *sc, struct mfi_mem *mm)
349 1.1 bouyer {
350 1.1 bouyer DNPRINTF(MFI_D_MEM, "%s: mfi_freemem: %p\n", DEVNAME(sc), mm);
351 1.1 bouyer
352 1.1 bouyer bus_dmamap_unload(sc->sc_dmat, mm->am_map);
353 1.1 bouyer bus_dmamem_unmap(sc->sc_dmat, mm->am_kva, mm->am_size);
354 1.1 bouyer bus_dmamem_free(sc->sc_dmat, &mm->am_seg, 1);
355 1.1 bouyer bus_dmamap_destroy(sc->sc_dmat, mm->am_map);
356 1.1 bouyer free(mm, M_DEVBUF);
357 1.1 bouyer }
358 1.1 bouyer
359 1.13 xtraeme static int
360 1.1 bouyer mfi_transition_firmware(struct mfi_softc *sc)
361 1.1 bouyer {
362 1.18 gmcgarry uint32_t fw_state, cur_state;
363 1.1 bouyer int max_wait, i;
364 1.1 bouyer
365 1.12 xtraeme fw_state = mfi_fw_state(sc) & MFI_STATE_MASK;
366 1.1 bouyer
367 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: mfi_transition_firmware: %#x\n", DEVNAME(sc),
368 1.1 bouyer fw_state);
369 1.1 bouyer
370 1.1 bouyer while (fw_state != MFI_STATE_READY) {
371 1.1 bouyer DNPRINTF(MFI_D_MISC,
372 1.1 bouyer "%s: waiting for firmware to become ready\n",
373 1.1 bouyer DEVNAME(sc));
374 1.1 bouyer cur_state = fw_state;
375 1.1 bouyer switch (fw_state) {
376 1.1 bouyer case MFI_STATE_FAULT:
377 1.1 bouyer printf("%s: firmware fault\n", DEVNAME(sc));
378 1.13 xtraeme return 1;
379 1.1 bouyer case MFI_STATE_WAIT_HANDSHAKE:
380 1.1 bouyer mfi_write(sc, MFI_IDB, MFI_INIT_CLEAR_HANDSHAKE);
381 1.1 bouyer max_wait = 2;
382 1.1 bouyer break;
383 1.1 bouyer case MFI_STATE_OPERATIONAL:
384 1.1 bouyer mfi_write(sc, MFI_IDB, MFI_INIT_READY);
385 1.1 bouyer max_wait = 10;
386 1.1 bouyer break;
387 1.1 bouyer case MFI_STATE_UNDEFINED:
388 1.1 bouyer case MFI_STATE_BB_INIT:
389 1.1 bouyer max_wait = 2;
390 1.1 bouyer break;
391 1.1 bouyer case MFI_STATE_FW_INIT:
392 1.1 bouyer case MFI_STATE_DEVICE_SCAN:
393 1.1 bouyer case MFI_STATE_FLUSH_CACHE:
394 1.1 bouyer max_wait = 20;
395 1.1 bouyer break;
396 1.1 bouyer default:
397 1.1 bouyer printf("%s: unknown firmware state %d\n",
398 1.1 bouyer DEVNAME(sc), fw_state);
399 1.13 xtraeme return 1;
400 1.1 bouyer }
401 1.1 bouyer for (i = 0; i < (max_wait * 10); i++) {
402 1.12 xtraeme fw_state = mfi_fw_state(sc) & MFI_STATE_MASK;
403 1.1 bouyer if (fw_state == cur_state)
404 1.1 bouyer DELAY(100000);
405 1.1 bouyer else
406 1.1 bouyer break;
407 1.1 bouyer }
408 1.1 bouyer if (fw_state == cur_state) {
409 1.1 bouyer printf("%s: firmware stuck in state %#x\n",
410 1.1 bouyer DEVNAME(sc), fw_state);
411 1.13 xtraeme return 1;
412 1.1 bouyer }
413 1.1 bouyer }
414 1.1 bouyer
415 1.13 xtraeme return 0;
416 1.1 bouyer }
417 1.1 bouyer
418 1.13 xtraeme static int
419 1.1 bouyer mfi_initialize_firmware(struct mfi_softc *sc)
420 1.1 bouyer {
421 1.1 bouyer struct mfi_ccb *ccb;
422 1.1 bouyer struct mfi_init_frame *init;
423 1.1 bouyer struct mfi_init_qinfo *qinfo;
424 1.1 bouyer
425 1.1 bouyer DNPRINTF(MFI_D_MISC, "%s: mfi_initialize_firmware\n", DEVNAME(sc));
426 1.1 bouyer
427 1.1 bouyer if ((ccb = mfi_get_ccb(sc)) == NULL)
428 1.13 xtraeme return 1;
429 1.1 bouyer
430 1.1 bouyer init = &ccb->ccb_frame->mfr_init;
431 1.1 bouyer qinfo = (struct mfi_init_qinfo *)((uint8_t *)init + MFI_FRAME_SIZE);
432 1.1 bouyer
433 1.1 bouyer memset(qinfo, 0, sizeof *qinfo);
434 1.1 bouyer qinfo->miq_rq_entries = sc->sc_max_cmds + 1;
435 1.1 bouyer qinfo->miq_rq_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) +
436 1.1 bouyer offsetof(struct mfi_prod_cons, mpc_reply_q));
437 1.1 bouyer qinfo->miq_pi_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) +
438 1.1 bouyer offsetof(struct mfi_prod_cons, mpc_producer));
439 1.1 bouyer qinfo->miq_ci_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) +
440 1.1 bouyer offsetof(struct mfi_prod_cons, mpc_consumer));
441 1.1 bouyer
442 1.1 bouyer init->mif_header.mfh_cmd = MFI_CMD_INIT;
443 1.1 bouyer init->mif_header.mfh_data_len = sizeof *qinfo;
444 1.1 bouyer init->mif_qinfo_new_addr_lo = htole32(ccb->ccb_pframe + MFI_FRAME_SIZE);
445 1.1 bouyer
446 1.1 bouyer DNPRINTF(MFI_D_MISC, "%s: entries: %#x rq: %#x pi: %#x ci: %#x\n",
447 1.1 bouyer DEVNAME(sc),
448 1.1 bouyer qinfo->miq_rq_entries, qinfo->miq_rq_addr_lo,
449 1.1 bouyer qinfo->miq_pi_addr_lo, qinfo->miq_ci_addr_lo);
450 1.1 bouyer
451 1.1 bouyer if (mfi_poll(ccb)) {
452 1.1 bouyer printf("%s: mfi_initialize_firmware failed\n", DEVNAME(sc));
453 1.13 xtraeme return 1;
454 1.1 bouyer }
455 1.1 bouyer
456 1.1 bouyer mfi_put_ccb(ccb);
457 1.1 bouyer
458 1.13 xtraeme return 0;
459 1.1 bouyer }
460 1.1 bouyer
461 1.13 xtraeme static int
462 1.1 bouyer mfi_get_info(struct mfi_softc *sc)
463 1.1 bouyer {
464 1.1 bouyer #ifdef MFI_DEBUG
465 1.1 bouyer int i;
466 1.1 bouyer #endif
467 1.1 bouyer DNPRINTF(MFI_D_MISC, "%s: mfi_get_info\n", DEVNAME(sc));
468 1.1 bouyer
469 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_CTRL_GET_INFO, MFI_DATA_IN,
470 1.1 bouyer sizeof(sc->sc_info), &sc->sc_info, NULL))
471 1.13 xtraeme return 1;
472 1.1 bouyer
473 1.1 bouyer #ifdef MFI_DEBUG
474 1.1 bouyer
475 1.1 bouyer for (i = 0; i < sc->sc_info.mci_image_component_count; i++) {
476 1.1 bouyer printf("%s: active FW %s Version %s date %s time %s\n",
477 1.1 bouyer DEVNAME(sc),
478 1.1 bouyer sc->sc_info.mci_image_component[i].mic_name,
479 1.1 bouyer sc->sc_info.mci_image_component[i].mic_version,
480 1.1 bouyer sc->sc_info.mci_image_component[i].mic_build_date,
481 1.1 bouyer sc->sc_info.mci_image_component[i].mic_build_time);
482 1.1 bouyer }
483 1.1 bouyer
484 1.1 bouyer for (i = 0; i < sc->sc_info.mci_pending_image_component_count; i++) {
485 1.1 bouyer printf("%s: pending FW %s Version %s date %s time %s\n",
486 1.1 bouyer DEVNAME(sc),
487 1.1 bouyer sc->sc_info.mci_pending_image_component[i].mic_name,
488 1.1 bouyer sc->sc_info.mci_pending_image_component[i].mic_version,
489 1.1 bouyer sc->sc_info.mci_pending_image_component[i].mic_build_date,
490 1.1 bouyer sc->sc_info.mci_pending_image_component[i].mic_build_time);
491 1.1 bouyer }
492 1.1 bouyer
493 1.1 bouyer printf("%s: max_arms %d max_spans %d max_arrs %d max_lds %d name %s\n",
494 1.1 bouyer DEVNAME(sc),
495 1.1 bouyer sc->sc_info.mci_max_arms,
496 1.1 bouyer sc->sc_info.mci_max_spans,
497 1.1 bouyer sc->sc_info.mci_max_arrays,
498 1.1 bouyer sc->sc_info.mci_max_lds,
499 1.1 bouyer sc->sc_info.mci_product_name);
500 1.1 bouyer
501 1.1 bouyer printf("%s: serial %s present %#x fw time %d max_cmds %d max_sg %d\n",
502 1.1 bouyer DEVNAME(sc),
503 1.1 bouyer sc->sc_info.mci_serial_number,
504 1.1 bouyer sc->sc_info.mci_hw_present,
505 1.1 bouyer sc->sc_info.mci_current_fw_time,
506 1.1 bouyer sc->sc_info.mci_max_cmds,
507 1.1 bouyer sc->sc_info.mci_max_sg_elements);
508 1.1 bouyer
509 1.1 bouyer printf("%s: max_rq %d lds_pres %d lds_deg %d lds_off %d pd_pres %d\n",
510 1.1 bouyer DEVNAME(sc),
511 1.1 bouyer sc->sc_info.mci_max_request_size,
512 1.1 bouyer sc->sc_info.mci_lds_present,
513 1.1 bouyer sc->sc_info.mci_lds_degraded,
514 1.1 bouyer sc->sc_info.mci_lds_offline,
515 1.1 bouyer sc->sc_info.mci_pd_present);
516 1.1 bouyer
517 1.1 bouyer printf("%s: pd_dsk_prs %d pd_dsk_pred_fail %d pd_dsk_fail %d\n",
518 1.1 bouyer DEVNAME(sc),
519 1.1 bouyer sc->sc_info.mci_pd_disks_present,
520 1.1 bouyer sc->sc_info.mci_pd_disks_pred_failure,
521 1.1 bouyer sc->sc_info.mci_pd_disks_failed);
522 1.1 bouyer
523 1.1 bouyer printf("%s: nvram %d mem %d flash %d\n",
524 1.1 bouyer DEVNAME(sc),
525 1.1 bouyer sc->sc_info.mci_nvram_size,
526 1.1 bouyer sc->sc_info.mci_memory_size,
527 1.1 bouyer sc->sc_info.mci_flash_size);
528 1.1 bouyer
529 1.1 bouyer printf("%s: ram_cor %d ram_uncor %d clus_all %d clus_act %d\n",
530 1.1 bouyer DEVNAME(sc),
531 1.1 bouyer sc->sc_info.mci_ram_correctable_errors,
532 1.1 bouyer sc->sc_info.mci_ram_uncorrectable_errors,
533 1.1 bouyer sc->sc_info.mci_cluster_allowed,
534 1.1 bouyer sc->sc_info.mci_cluster_active);
535 1.1 bouyer
536 1.1 bouyer printf("%s: max_strps_io %d raid_lvl %#x adapt_ops %#x ld_ops %#x\n",
537 1.1 bouyer DEVNAME(sc),
538 1.1 bouyer sc->sc_info.mci_max_strips_per_io,
539 1.1 bouyer sc->sc_info.mci_raid_levels,
540 1.1 bouyer sc->sc_info.mci_adapter_ops,
541 1.1 bouyer sc->sc_info.mci_ld_ops);
542 1.1 bouyer
543 1.1 bouyer printf("%s: strp_sz_min %d strp_sz_max %d pd_ops %#x pd_mix %#x\n",
544 1.1 bouyer DEVNAME(sc),
545 1.1 bouyer sc->sc_info.mci_stripe_sz_ops.min,
546 1.1 bouyer sc->sc_info.mci_stripe_sz_ops.max,
547 1.1 bouyer sc->sc_info.mci_pd_ops,
548 1.1 bouyer sc->sc_info.mci_pd_mix_support);
549 1.1 bouyer
550 1.1 bouyer printf("%s: ecc_bucket %d pckg_prop %s\n",
551 1.1 bouyer DEVNAME(sc),
552 1.1 bouyer sc->sc_info.mci_ecc_bucket_count,
553 1.1 bouyer sc->sc_info.mci_package_version);
554 1.1 bouyer
555 1.1 bouyer printf("%s: sq_nm %d prd_fail_poll %d intr_thrtl %d intr_thrtl_to %d\n",
556 1.1 bouyer DEVNAME(sc),
557 1.1 bouyer sc->sc_info.mci_properties.mcp_seq_num,
558 1.1 bouyer sc->sc_info.mci_properties.mcp_pred_fail_poll_interval,
559 1.1 bouyer sc->sc_info.mci_properties.mcp_intr_throttle_cnt,
560 1.1 bouyer sc->sc_info.mci_properties.mcp_intr_throttle_timeout);
561 1.1 bouyer
562 1.1 bouyer printf("%s: rbld_rate %d patr_rd_rate %d bgi_rate %d cc_rate %d\n",
563 1.1 bouyer DEVNAME(sc),
564 1.1 bouyer sc->sc_info.mci_properties.mcp_rebuild_rate,
565 1.1 bouyer sc->sc_info.mci_properties.mcp_patrol_read_rate,
566 1.1 bouyer sc->sc_info.mci_properties.mcp_bgi_rate,
567 1.1 bouyer sc->sc_info.mci_properties.mcp_cc_rate);
568 1.1 bouyer
569 1.1 bouyer printf("%s: rc_rate %d ch_flsh %d spin_cnt %d spin_dly %d clus_en %d\n",
570 1.1 bouyer DEVNAME(sc),
571 1.1 bouyer sc->sc_info.mci_properties.mcp_recon_rate,
572 1.1 bouyer sc->sc_info.mci_properties.mcp_cache_flush_interval,
573 1.1 bouyer sc->sc_info.mci_properties.mcp_spinup_drv_cnt,
574 1.1 bouyer sc->sc_info.mci_properties.mcp_spinup_delay,
575 1.1 bouyer sc->sc_info.mci_properties.mcp_cluster_enable);
576 1.1 bouyer
577 1.1 bouyer printf("%s: coerc %d alarm %d dis_auto_rbld %d dis_bat_wrn %d ecc %d\n",
578 1.1 bouyer DEVNAME(sc),
579 1.1 bouyer sc->sc_info.mci_properties.mcp_coercion_mode,
580 1.1 bouyer sc->sc_info.mci_properties.mcp_alarm_enable,
581 1.1 bouyer sc->sc_info.mci_properties.mcp_disable_auto_rebuild,
582 1.1 bouyer sc->sc_info.mci_properties.mcp_disable_battery_warn,
583 1.1 bouyer sc->sc_info.mci_properties.mcp_ecc_bucket_size);
584 1.1 bouyer
585 1.1 bouyer printf("%s: ecc_leak %d rest_hs %d exp_encl_dev %d\n",
586 1.1 bouyer DEVNAME(sc),
587 1.1 bouyer sc->sc_info.mci_properties.mcp_ecc_bucket_leak_rate,
588 1.1 bouyer sc->sc_info.mci_properties.mcp_restore_hotspare_on_insertion,
589 1.1 bouyer sc->sc_info.mci_properties.mcp_expose_encl_devices);
590 1.1 bouyer
591 1.1 bouyer printf("%s: vendor %#x device %#x subvendor %#x subdevice %#x\n",
592 1.1 bouyer DEVNAME(sc),
593 1.1 bouyer sc->sc_info.mci_pci.mip_vendor,
594 1.1 bouyer sc->sc_info.mci_pci.mip_device,
595 1.1 bouyer sc->sc_info.mci_pci.mip_subvendor,
596 1.1 bouyer sc->sc_info.mci_pci.mip_subdevice);
597 1.1 bouyer
598 1.1 bouyer printf("%s: type %#x port_count %d port_addr ",
599 1.1 bouyer DEVNAME(sc),
600 1.1 bouyer sc->sc_info.mci_host.mih_type,
601 1.1 bouyer sc->sc_info.mci_host.mih_port_count);
602 1.1 bouyer
603 1.1 bouyer for (i = 0; i < 8; i++)
604 1.4 bouyer printf("%.0lx ", sc->sc_info.mci_host.mih_port_addr[i]);
605 1.1 bouyer printf("\n");
606 1.1 bouyer
607 1.1 bouyer printf("%s: type %.x port_count %d port_addr ",
608 1.1 bouyer DEVNAME(sc),
609 1.1 bouyer sc->sc_info.mci_device.mid_type,
610 1.1 bouyer sc->sc_info.mci_device.mid_port_count);
611 1.1 bouyer
612 1.1 bouyer for (i = 0; i < 8; i++)
613 1.4 bouyer printf("%.0lx ", sc->sc_info.mci_device.mid_port_addr[i]);
614 1.1 bouyer printf("\n");
615 1.1 bouyer #endif /* MFI_DEBUG */
616 1.1 bouyer
617 1.13 xtraeme return 0;
618 1.1 bouyer }
619 1.1 bouyer
620 1.13 xtraeme static void
621 1.1 bouyer mfiminphys(struct buf *bp)
622 1.1 bouyer {
623 1.1 bouyer DNPRINTF(MFI_D_MISC, "mfiminphys: %d\n", bp->b_bcount);
624 1.1 bouyer
625 1.1 bouyer /* XXX currently using MFI_MAXFER = MAXPHYS */
626 1.1 bouyer if (bp->b_bcount > MFI_MAXFER)
627 1.1 bouyer bp->b_bcount = MFI_MAXFER;
628 1.1 bouyer minphys(bp);
629 1.1 bouyer }
630 1.1 bouyer
631 1.1 bouyer int
632 1.24 dyoung mfi_detach(struct mfi_softc *sc, int flags)
633 1.24 dyoung {
634 1.24 dyoung int error;
635 1.24 dyoung
636 1.24 dyoung DNPRINTF(MFI_D_MISC, "%s: mfi_detach\n", DEVNAME(sc));
637 1.24 dyoung
638 1.26 dyoung if ((error = config_detach_children(sc->sc_dev, flags)) != 0)
639 1.25 dyoung return error;
640 1.25 dyoung
641 1.24 dyoung #if NBIO > 0
642 1.24 dyoung mfi_destroy_sensors(sc);
643 1.26 dyoung bio_unregister(sc->sc_dev);
644 1.24 dyoung #endif /* NBIO > 0 */
645 1.24 dyoung
646 1.24 dyoung mfi_intr_disable(sc);
647 1.24 dyoung
648 1.24 dyoung /* TBD: shutdown firmware */
649 1.24 dyoung
650 1.24 dyoung if ((error = mfi_destroy_ccb(sc)) != 0)
651 1.24 dyoung return error;
652 1.24 dyoung
653 1.24 dyoung mfi_freemem(sc, sc->sc_sense);
654 1.24 dyoung
655 1.24 dyoung mfi_freemem(sc, sc->sc_frames);
656 1.24 dyoung
657 1.24 dyoung mfi_freemem(sc, sc->sc_pcq);
658 1.24 dyoung
659 1.24 dyoung return 0;
660 1.24 dyoung }
661 1.24 dyoung
662 1.24 dyoung int
663 1.12 xtraeme mfi_attach(struct mfi_softc *sc, enum mfi_iop iop)
664 1.1 bouyer {
665 1.1 bouyer struct scsipi_adapter *adapt = &sc->sc_adapt;
666 1.1 bouyer struct scsipi_channel *chan = &sc->sc_chan;
667 1.1 bouyer uint32_t status, frames;
668 1.1 bouyer int i;
669 1.1 bouyer
670 1.1 bouyer DNPRINTF(MFI_D_MISC, "%s: mfi_attach\n", DEVNAME(sc));
671 1.1 bouyer
672 1.12 xtraeme switch (iop) {
673 1.12 xtraeme case MFI_IOP_XSCALE:
674 1.12 xtraeme sc->sc_iop = &mfi_iop_xscale;
675 1.12 xtraeme break;
676 1.12 xtraeme case MFI_IOP_PPC:
677 1.12 xtraeme sc->sc_iop = &mfi_iop_ppc;
678 1.12 xtraeme break;
679 1.12 xtraeme default:
680 1.12 xtraeme panic("%s: unknown iop %d", DEVNAME(sc), iop);
681 1.12 xtraeme }
682 1.12 xtraeme
683 1.1 bouyer if (mfi_transition_firmware(sc))
684 1.13 xtraeme return 1;
685 1.1 bouyer
686 1.1 bouyer TAILQ_INIT(&sc->sc_ccb_freeq);
687 1.1 bouyer
688 1.12 xtraeme status = mfi_fw_state(sc);
689 1.1 bouyer sc->sc_max_cmds = status & MFI_STATE_MAXCMD_MASK;
690 1.1 bouyer sc->sc_max_sgl = (status & MFI_STATE_MAXSGL_MASK) >> 16;
691 1.1 bouyer DNPRINTF(MFI_D_MISC, "%s: max commands: %u, max sgl: %u\n",
692 1.1 bouyer DEVNAME(sc), sc->sc_max_cmds, sc->sc_max_sgl);
693 1.1 bouyer
694 1.1 bouyer /* consumer/producer and reply queue memory */
695 1.1 bouyer sc->sc_pcq = mfi_allocmem(sc, (sizeof(uint32_t) * sc->sc_max_cmds) +
696 1.1 bouyer sizeof(struct mfi_prod_cons));
697 1.1 bouyer if (sc->sc_pcq == NULL) {
698 1.1 bouyer aprint_error("%s: unable to allocate reply queue memory\n",
699 1.1 bouyer DEVNAME(sc));
700 1.1 bouyer goto nopcq;
701 1.1 bouyer }
702 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0,
703 1.1 bouyer sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons),
704 1.1 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
705 1.1 bouyer
706 1.1 bouyer /* frame memory */
707 1.1 bouyer /* we are not doing 64 bit IO so only calculate # of 32 bit frames */
708 1.1 bouyer frames = (sizeof(struct mfi_sg32) * sc->sc_max_sgl +
709 1.1 bouyer MFI_FRAME_SIZE - 1) / MFI_FRAME_SIZE + 1;
710 1.1 bouyer sc->sc_frames_size = frames * MFI_FRAME_SIZE;
711 1.1 bouyer sc->sc_frames = mfi_allocmem(sc, sc->sc_frames_size * sc->sc_max_cmds);
712 1.1 bouyer if (sc->sc_frames == NULL) {
713 1.1 bouyer aprint_error("%s: unable to allocate frame memory\n",
714 1.1 bouyer DEVNAME(sc));
715 1.1 bouyer goto noframe;
716 1.1 bouyer }
717 1.1 bouyer /* XXX hack, fix this */
718 1.1 bouyer if (MFIMEM_DVA(sc->sc_frames) & 0x3f) {
719 1.1 bouyer aprint_error("%s: improper frame alignment (%#llx) FIXME\n",
720 1.1 bouyer DEVNAME(sc), (long long int)MFIMEM_DVA(sc->sc_frames));
721 1.1 bouyer goto noframe;
722 1.1 bouyer }
723 1.1 bouyer
724 1.1 bouyer /* sense memory */
725 1.1 bouyer sc->sc_sense = mfi_allocmem(sc, sc->sc_max_cmds * MFI_SENSE_SIZE);
726 1.1 bouyer if (sc->sc_sense == NULL) {
727 1.1 bouyer aprint_error("%s: unable to allocate sense memory\n",
728 1.1 bouyer DEVNAME(sc));
729 1.1 bouyer goto nosense;
730 1.1 bouyer }
731 1.1 bouyer
732 1.1 bouyer /* now that we have all memory bits go initialize ccbs */
733 1.1 bouyer if (mfi_init_ccb(sc)) {
734 1.1 bouyer aprint_error("%s: could not init ccb list\n", DEVNAME(sc));
735 1.1 bouyer goto noinit;
736 1.1 bouyer }
737 1.1 bouyer
738 1.1 bouyer /* kickstart firmware with all addresses and pointers */
739 1.1 bouyer if (mfi_initialize_firmware(sc)) {
740 1.1 bouyer aprint_error("%s: could not initialize firmware\n",
741 1.1 bouyer DEVNAME(sc));
742 1.1 bouyer goto noinit;
743 1.1 bouyer }
744 1.1 bouyer
745 1.1 bouyer if (mfi_get_info(sc)) {
746 1.1 bouyer aprint_error("%s: could not retrieve controller information\n",
747 1.1 bouyer DEVNAME(sc));
748 1.1 bouyer goto noinit;
749 1.1 bouyer }
750 1.1 bouyer
751 1.1 bouyer aprint_normal("%s: logical drives %d, version %s, %dMB RAM\n",
752 1.1 bouyer DEVNAME(sc),
753 1.1 bouyer sc->sc_info.mci_lds_present,
754 1.1 bouyer sc->sc_info.mci_package_version,
755 1.1 bouyer sc->sc_info.mci_memory_size);
756 1.1 bouyer
757 1.1 bouyer sc->sc_ld_cnt = sc->sc_info.mci_lds_present;
758 1.1 bouyer sc->sc_max_ld = sc->sc_ld_cnt;
759 1.1 bouyer for (i = 0; i < sc->sc_ld_cnt; i++)
760 1.1 bouyer sc->sc_ld[i].ld_present = 1;
761 1.1 bouyer
762 1.1 bouyer memset(adapt, 0, sizeof(*adapt));
763 1.26 dyoung adapt->adapt_dev = sc->sc_dev;
764 1.1 bouyer adapt->adapt_nchannels = 1;
765 1.1 bouyer if (sc->sc_ld_cnt)
766 1.1 bouyer adapt->adapt_openings = sc->sc_max_cmds / sc->sc_ld_cnt;
767 1.1 bouyer else
768 1.1 bouyer adapt->adapt_openings = sc->sc_max_cmds;
769 1.1 bouyer adapt->adapt_max_periph = adapt->adapt_openings;
770 1.1 bouyer adapt->adapt_request = mfi_scsipi_request;
771 1.1 bouyer adapt->adapt_minphys = mfiminphys;
772 1.1 bouyer
773 1.1 bouyer memset(chan, 0, sizeof(*chan));
774 1.1 bouyer chan->chan_adapter = adapt;
775 1.1 bouyer chan->chan_bustype = &scsi_bustype;
776 1.1 bouyer chan->chan_channel = 0;
777 1.1 bouyer chan->chan_flags = 0;
778 1.1 bouyer chan->chan_nluns = 8;
779 1.1 bouyer chan->chan_ntargets = MFI_MAX_LD;
780 1.1 bouyer chan->chan_id = MFI_MAX_LD;
781 1.1 bouyer
782 1.26 dyoung (void)config_found(sc->sc_dev, &sc->sc_chan, scsiprint);
783 1.1 bouyer
784 1.1 bouyer /* enable interrupts */
785 1.12 xtraeme mfi_intr_enable(sc);
786 1.1 bouyer
787 1.1 bouyer #if NBIO > 0
788 1.26 dyoung if (bio_register(sc->sc_dev, mfi_ioctl) != 0)
789 1.1 bouyer panic("%s: controller registration failed", DEVNAME(sc));
790 1.1 bouyer if (mfi_create_sensors(sc) != 0)
791 1.1 bouyer aprint_error("%s: unable to create sensors\n", DEVNAME(sc));
792 1.1 bouyer #endif /* NBIO > 0 */
793 1.1 bouyer
794 1.13 xtraeme return 0;
795 1.1 bouyer noinit:
796 1.1 bouyer mfi_freemem(sc, sc->sc_sense);
797 1.1 bouyer nosense:
798 1.1 bouyer mfi_freemem(sc, sc->sc_frames);
799 1.1 bouyer noframe:
800 1.1 bouyer mfi_freemem(sc, sc->sc_pcq);
801 1.1 bouyer nopcq:
802 1.13 xtraeme return 1;
803 1.1 bouyer }
804 1.1 bouyer
805 1.13 xtraeme static int
806 1.1 bouyer mfi_poll(struct mfi_ccb *ccb)
807 1.1 bouyer {
808 1.1 bouyer struct mfi_softc *sc = ccb->ccb_sc;
809 1.1 bouyer struct mfi_frame_header *hdr;
810 1.1 bouyer int to = 0;
811 1.1 bouyer
812 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: mfi_poll\n", DEVNAME(sc));
813 1.1 bouyer
814 1.1 bouyer hdr = &ccb->ccb_frame->mfr_header;
815 1.1 bouyer hdr->mfh_cmd_status = 0xff;
816 1.1 bouyer hdr->mfh_flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE;
817 1.1 bouyer
818 1.12 xtraeme mfi_post(sc, ccb);
819 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames),
820 1.1 bouyer ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames),
821 1.1 bouyer sc->sc_frames_size, BUS_DMASYNC_POSTREAD);
822 1.1 bouyer
823 1.1 bouyer while (hdr->mfh_cmd_status == 0xff) {
824 1.1 bouyer delay(1000);
825 1.1 bouyer if (to++ > 5000) /* XXX 5 seconds busywait sucks */
826 1.1 bouyer break;
827 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames),
828 1.1 bouyer ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames),
829 1.1 bouyer sc->sc_frames_size, BUS_DMASYNC_POSTREAD);
830 1.1 bouyer }
831 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames),
832 1.1 bouyer ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames),
833 1.1 bouyer sc->sc_frames_size, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
834 1.1 bouyer
835 1.1 bouyer if (ccb->ccb_data != NULL) {
836 1.1 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done sync\n",
837 1.1 bouyer DEVNAME(sc));
838 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
839 1.1 bouyer ccb->ccb_dmamap->dm_mapsize,
840 1.1 bouyer (ccb->ccb_direction & MFI_DATA_IN) ?
841 1.1 bouyer BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
842 1.1 bouyer
843 1.1 bouyer bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap);
844 1.1 bouyer }
845 1.1 bouyer
846 1.1 bouyer if (hdr->mfh_cmd_status == 0xff) {
847 1.1 bouyer printf("%s: timeout on ccb %d\n", DEVNAME(sc),
848 1.1 bouyer hdr->mfh_context);
849 1.1 bouyer ccb->ccb_flags |= MFI_CCB_F_ERR;
850 1.13 xtraeme return 1;
851 1.1 bouyer }
852 1.1 bouyer
853 1.13 xtraeme return 0;
854 1.1 bouyer }
855 1.1 bouyer
856 1.1 bouyer int
857 1.1 bouyer mfi_intr(void *arg)
858 1.1 bouyer {
859 1.1 bouyer struct mfi_softc *sc = arg;
860 1.1 bouyer struct mfi_prod_cons *pcq;
861 1.1 bouyer struct mfi_ccb *ccb;
862 1.12 xtraeme uint32_t producer, consumer, ctx;
863 1.1 bouyer int claimed = 0;
864 1.1 bouyer
865 1.12 xtraeme if (!mfi_my_intr(sc))
866 1.12 xtraeme return 0;
867 1.1 bouyer
868 1.4 bouyer pcq = MFIMEM_KVA(sc->sc_pcq);
869 1.4 bouyer
870 1.4 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_intr %#lx %#lx\n", DEVNAME(sc),
871 1.4 bouyer (u_long)sc, (u_long)pcq);
872 1.1 bouyer
873 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0,
874 1.1 bouyer sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons),
875 1.1 bouyer BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
876 1.1 bouyer
877 1.1 bouyer producer = pcq->mpc_producer;
878 1.1 bouyer consumer = pcq->mpc_consumer;
879 1.1 bouyer
880 1.1 bouyer while (consumer != producer) {
881 1.1 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_intr pi %#x ci %#x\n",
882 1.1 bouyer DEVNAME(sc), producer, consumer);
883 1.1 bouyer
884 1.1 bouyer ctx = pcq->mpc_reply_q[consumer];
885 1.1 bouyer pcq->mpc_reply_q[consumer] = MFI_INVALID_CTX;
886 1.1 bouyer if (ctx == MFI_INVALID_CTX)
887 1.1 bouyer printf("%s: invalid context, p: %d c: %d\n",
888 1.1 bouyer DEVNAME(sc), producer, consumer);
889 1.1 bouyer else {
890 1.1 bouyer /* XXX remove from queue and call scsi_done */
891 1.1 bouyer ccb = &sc->sc_ccb[ctx];
892 1.1 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_intr context %#x\n",
893 1.1 bouyer DEVNAME(sc), ctx);
894 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames),
895 1.1 bouyer ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames),
896 1.1 bouyer sc->sc_frames_size,
897 1.1 bouyer BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
898 1.1 bouyer ccb->ccb_done(ccb);
899 1.1 bouyer
900 1.1 bouyer claimed = 1;
901 1.1 bouyer }
902 1.1 bouyer consumer++;
903 1.1 bouyer if (consumer == (sc->sc_max_cmds + 1))
904 1.1 bouyer consumer = 0;
905 1.1 bouyer }
906 1.1 bouyer
907 1.1 bouyer pcq->mpc_consumer = consumer;
908 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0,
909 1.1 bouyer sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons),
910 1.1 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
911 1.1 bouyer
912 1.13 xtraeme return claimed;
913 1.1 bouyer }
914 1.1 bouyer
915 1.13 xtraeme static int
916 1.1 bouyer mfi_scsi_io(struct mfi_ccb *ccb, struct scsipi_xfer *xs, uint32_t blockno,
917 1.1 bouyer uint32_t blockcnt)
918 1.1 bouyer {
919 1.1 bouyer struct scsipi_periph *periph = xs->xs_periph;
920 1.1 bouyer struct mfi_io_frame *io;
921 1.1 bouyer
922 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: mfi_scsi_io: %d\n",
923 1.15 cegger device_xname(periph->periph_channel->chan_adapter->adapt_dev),
924 1.1 bouyer periph->periph_target);
925 1.1 bouyer
926 1.1 bouyer if (!xs->data)
927 1.13 xtraeme return 1;
928 1.1 bouyer
929 1.1 bouyer io = &ccb->ccb_frame->mfr_io;
930 1.1 bouyer if (xs->xs_control & XS_CTL_DATA_IN) {
931 1.1 bouyer io->mif_header.mfh_cmd = MFI_CMD_LD_READ;
932 1.1 bouyer ccb->ccb_direction = MFI_DATA_IN;
933 1.1 bouyer } else {
934 1.1 bouyer io->mif_header.mfh_cmd = MFI_CMD_LD_WRITE;
935 1.1 bouyer ccb->ccb_direction = MFI_DATA_OUT;
936 1.1 bouyer }
937 1.1 bouyer io->mif_header.mfh_target_id = periph->periph_target;
938 1.1 bouyer io->mif_header.mfh_timeout = 0;
939 1.1 bouyer io->mif_header.mfh_flags = 0;
940 1.1 bouyer io->mif_header.mfh_sense_len = MFI_SENSE_SIZE;
941 1.1 bouyer io->mif_header.mfh_data_len= blockcnt;
942 1.1 bouyer io->mif_lba_hi = 0;
943 1.1 bouyer io->mif_lba_lo = blockno;
944 1.1 bouyer io->mif_sense_addr_lo = htole32(ccb->ccb_psense);
945 1.1 bouyer io->mif_sense_addr_hi = 0;
946 1.1 bouyer
947 1.1 bouyer ccb->ccb_done = mfi_scsi_xs_done;
948 1.1 bouyer ccb->ccb_xs = xs;
949 1.1 bouyer ccb->ccb_frame_size = MFI_IO_FRAME_SIZE;
950 1.1 bouyer ccb->ccb_sgl = &io->mif_sgl;
951 1.1 bouyer ccb->ccb_data = xs->data;
952 1.1 bouyer ccb->ccb_len = xs->datalen;
953 1.1 bouyer
954 1.14 xtraeme if (mfi_create_sgl(ccb, (xs->xs_control & XS_CTL_NOSLEEP) ?
955 1.14 xtraeme BUS_DMA_NOWAIT : BUS_DMA_WAITOK))
956 1.13 xtraeme return 1;
957 1.1 bouyer
958 1.13 xtraeme return 0;
959 1.1 bouyer }
960 1.1 bouyer
961 1.13 xtraeme static void
962 1.1 bouyer mfi_scsi_xs_done(struct mfi_ccb *ccb)
963 1.1 bouyer {
964 1.1 bouyer struct scsipi_xfer *xs = ccb->ccb_xs;
965 1.1 bouyer struct mfi_softc *sc = ccb->ccb_sc;
966 1.1 bouyer struct mfi_frame_header *hdr = &ccb->ccb_frame->mfr_header;
967 1.1 bouyer
968 1.4 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done %#lx %#lx\n",
969 1.4 bouyer DEVNAME(sc), (u_long)ccb, (u_long)ccb->ccb_frame);
970 1.1 bouyer
971 1.1 bouyer if (xs->data != NULL) {
972 1.1 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done sync\n",
973 1.1 bouyer DEVNAME(sc));
974 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
975 1.1 bouyer ccb->ccb_dmamap->dm_mapsize,
976 1.1 bouyer (xs->xs_control & XS_CTL_DATA_IN) ?
977 1.1 bouyer BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
978 1.1 bouyer
979 1.1 bouyer bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap);
980 1.1 bouyer }
981 1.1 bouyer
982 1.1 bouyer if (hdr->mfh_cmd_status != MFI_STAT_OK) {
983 1.1 bouyer xs->error = XS_DRIVER_STUFFUP;
984 1.1 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done stuffup %#x\n",
985 1.1 bouyer DEVNAME(sc), hdr->mfh_cmd_status);
986 1.1 bouyer
987 1.1 bouyer if (hdr->mfh_scsi_status != 0) {
988 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_sense),
989 1.1 bouyer ccb->ccb_psense - MFIMEM_DVA(sc->sc_sense),
990 1.1 bouyer MFI_SENSE_SIZE, BUS_DMASYNC_POSTREAD);
991 1.1 bouyer DNPRINTF(MFI_D_INTR,
992 1.4 bouyer "%s: mfi_scsi_xs_done sense %#x %lx %lx\n",
993 1.1 bouyer DEVNAME(sc), hdr->mfh_scsi_status,
994 1.4 bouyer (u_long)&xs->sense, (u_long)ccb->ccb_sense);
995 1.1 bouyer memset(&xs->sense, 0, sizeof(xs->sense));
996 1.1 bouyer memcpy(&xs->sense, ccb->ccb_sense,
997 1.1 bouyer sizeof(struct scsi_sense_data));
998 1.1 bouyer xs->error = XS_SENSE;
999 1.1 bouyer }
1000 1.1 bouyer } else {
1001 1.1 bouyer xs->error = XS_NOERROR;
1002 1.1 bouyer xs->status = SCSI_OK;
1003 1.1 bouyer xs->resid = 0;
1004 1.1 bouyer }
1005 1.1 bouyer
1006 1.1 bouyer mfi_put_ccb(ccb);
1007 1.1 bouyer scsipi_done(xs);
1008 1.1 bouyer }
1009 1.1 bouyer
1010 1.13 xtraeme static int
1011 1.1 bouyer mfi_scsi_ld(struct mfi_ccb *ccb, struct scsipi_xfer *xs)
1012 1.1 bouyer {
1013 1.1 bouyer struct mfi_pass_frame *pf;
1014 1.1 bouyer struct scsipi_periph *periph = xs->xs_periph;
1015 1.1 bouyer
1016 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: mfi_scsi_ld: %d\n",
1017 1.15 cegger device_xname(periph->periph_channel->chan_adapter->adapt_dev),
1018 1.1 bouyer periph->periph_target);
1019 1.1 bouyer
1020 1.1 bouyer pf = &ccb->ccb_frame->mfr_pass;
1021 1.1 bouyer pf->mpf_header.mfh_cmd = MFI_CMD_LD_SCSI_IO;
1022 1.1 bouyer pf->mpf_header.mfh_target_id = periph->periph_target;
1023 1.1 bouyer pf->mpf_header.mfh_lun_id = 0;
1024 1.1 bouyer pf->mpf_header.mfh_cdb_len = xs->cmdlen;
1025 1.1 bouyer pf->mpf_header.mfh_timeout = 0;
1026 1.1 bouyer pf->mpf_header.mfh_data_len= xs->datalen; /* XXX */
1027 1.1 bouyer pf->mpf_header.mfh_sense_len = MFI_SENSE_SIZE;
1028 1.1 bouyer
1029 1.1 bouyer pf->mpf_sense_addr_hi = 0;
1030 1.1 bouyer pf->mpf_sense_addr_lo = htole32(ccb->ccb_psense);
1031 1.1 bouyer
1032 1.1 bouyer memset(pf->mpf_cdb, 0, 16);
1033 1.1 bouyer memcpy(pf->mpf_cdb, &xs->cmdstore, xs->cmdlen);
1034 1.1 bouyer
1035 1.1 bouyer ccb->ccb_done = mfi_scsi_xs_done;
1036 1.1 bouyer ccb->ccb_xs = xs;
1037 1.1 bouyer ccb->ccb_frame_size = MFI_PASS_FRAME_SIZE;
1038 1.1 bouyer ccb->ccb_sgl = &pf->mpf_sgl;
1039 1.1 bouyer
1040 1.1 bouyer if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT))
1041 1.1 bouyer ccb->ccb_direction = (xs->xs_control & XS_CTL_DATA_IN) ?
1042 1.1 bouyer MFI_DATA_IN : MFI_DATA_OUT;
1043 1.1 bouyer else
1044 1.1 bouyer ccb->ccb_direction = MFI_DATA_NONE;
1045 1.1 bouyer
1046 1.1 bouyer if (xs->data) {
1047 1.1 bouyer ccb->ccb_data = xs->data;
1048 1.1 bouyer ccb->ccb_len = xs->datalen;
1049 1.1 bouyer
1050 1.14 xtraeme if (mfi_create_sgl(ccb, (xs->xs_control & XS_CTL_NOSLEEP) ?
1051 1.14 xtraeme BUS_DMA_NOWAIT : BUS_DMA_WAITOK))
1052 1.13 xtraeme return 1;
1053 1.1 bouyer }
1054 1.1 bouyer
1055 1.13 xtraeme return 0;
1056 1.1 bouyer }
1057 1.1 bouyer
1058 1.13 xtraeme static void
1059 1.1 bouyer mfi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
1060 1.1 bouyer void *arg)
1061 1.1 bouyer {
1062 1.1 bouyer struct scsipi_periph *periph;
1063 1.1 bouyer struct scsipi_xfer *xs;
1064 1.1 bouyer struct scsipi_adapter *adapt = chan->chan_adapter;
1065 1.26 dyoung struct mfi_softc *sc = device_private(adapt->adapt_dev);
1066 1.1 bouyer struct mfi_ccb *ccb;
1067 1.1 bouyer struct scsi_rw_6 *rw;
1068 1.1 bouyer struct scsipi_rw_10 *rwb;
1069 1.1 bouyer uint32_t blockno, blockcnt;
1070 1.1 bouyer uint8_t target;
1071 1.1 bouyer uint8_t mbox[MFI_MBOX_SIZE];
1072 1.1 bouyer int s;
1073 1.1 bouyer
1074 1.1 bouyer switch (req) {
1075 1.1 bouyer case ADAPTER_REQ_GROW_RESOURCES:
1076 1.1 bouyer /* Not supported. */
1077 1.1 bouyer return;
1078 1.1 bouyer case ADAPTER_REQ_SET_XFER_MODE:
1079 1.1 bouyer /* Not supported. */
1080 1.1 bouyer return;
1081 1.1 bouyer case ADAPTER_REQ_RUN_XFER:
1082 1.1 bouyer break;
1083 1.1 bouyer }
1084 1.1 bouyer
1085 1.1 bouyer xs = arg;
1086 1.4 bouyer
1087 1.4 bouyer DNPRINTF(MFI_D_CMD, "%s: mfi_scsipi_request req %d opcode: %#x\n",
1088 1.4 bouyer DEVNAME(sc), req, xs->cmd->opcode);
1089 1.4 bouyer
1090 1.1 bouyer periph = xs->xs_periph;
1091 1.1 bouyer target = periph->periph_target;
1092 1.1 bouyer
1093 1.1 bouyer s = splbio();
1094 1.1 bouyer if (target >= MFI_MAX_LD || !sc->sc_ld[target].ld_present ||
1095 1.1 bouyer periph->periph_lun != 0) {
1096 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: invalid target %d\n",
1097 1.1 bouyer DEVNAME(sc), target);
1098 1.1 bouyer xs->error = XS_SELTIMEOUT;
1099 1.1 bouyer scsipi_done(xs);
1100 1.1 bouyer splx(s);
1101 1.1 bouyer return;
1102 1.1 bouyer }
1103 1.1 bouyer
1104 1.1 bouyer if ((ccb = mfi_get_ccb(sc)) == NULL) {
1105 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: mfi_scsipi_request no ccb\n", DEVNAME(sc));
1106 1.1 bouyer xs->error = XS_RESOURCE_SHORTAGE;
1107 1.1 bouyer scsipi_done(xs);
1108 1.1 bouyer splx(s);
1109 1.1 bouyer return;
1110 1.1 bouyer }
1111 1.1 bouyer
1112 1.1 bouyer switch (xs->cmd->opcode) {
1113 1.1 bouyer /* IO path */
1114 1.1 bouyer case READ_10:
1115 1.1 bouyer case WRITE_10:
1116 1.1 bouyer rwb = (struct scsipi_rw_10 *)xs->cmd;
1117 1.1 bouyer blockno = _4btol(rwb->addr);
1118 1.1 bouyer blockcnt = _2btol(rwb->length);
1119 1.1 bouyer if (mfi_scsi_io(ccb, xs, blockno, blockcnt)) {
1120 1.1 bouyer mfi_put_ccb(ccb);
1121 1.1 bouyer goto stuffup;
1122 1.1 bouyer }
1123 1.1 bouyer break;
1124 1.1 bouyer
1125 1.1 bouyer case SCSI_READ_6_COMMAND:
1126 1.1 bouyer case SCSI_WRITE_6_COMMAND:
1127 1.1 bouyer rw = (struct scsi_rw_6 *)xs->cmd;
1128 1.1 bouyer blockno = _3btol(rw->addr) & (SRW_TOPADDR << 16 | 0xffff);
1129 1.1 bouyer blockcnt = rw->length ? rw->length : 0x100;
1130 1.1 bouyer if (mfi_scsi_io(ccb, xs, blockno, blockcnt)) {
1131 1.1 bouyer mfi_put_ccb(ccb);
1132 1.1 bouyer goto stuffup;
1133 1.1 bouyer }
1134 1.1 bouyer break;
1135 1.1 bouyer
1136 1.1 bouyer case SCSI_SYNCHRONIZE_CACHE_10:
1137 1.1 bouyer mbox[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
1138 1.19 bouyer if (mfi_mgmt(ccb, xs,
1139 1.19 bouyer MR_DCMD_CTRL_CACHE_FLUSH, MFI_DATA_NONE, 0, NULL, mbox)) {
1140 1.19 bouyer mfi_put_ccb(ccb);
1141 1.1 bouyer goto stuffup;
1142 1.19 bouyer }
1143 1.19 bouyer break;
1144 1.1 bouyer
1145 1.1 bouyer /* hand it of to the firmware and let it deal with it */
1146 1.1 bouyer case SCSI_TEST_UNIT_READY:
1147 1.1 bouyer /* save off sd? after autoconf */
1148 1.1 bouyer if (!cold) /* XXX bogus */
1149 1.26 dyoung strlcpy(sc->sc_ld[target].ld_dev, device_xname(sc->sc_dev),
1150 1.1 bouyer sizeof(sc->sc_ld[target].ld_dev));
1151 1.1 bouyer /* FALLTHROUGH */
1152 1.1 bouyer
1153 1.1 bouyer default:
1154 1.1 bouyer if (mfi_scsi_ld(ccb, xs)) {
1155 1.1 bouyer mfi_put_ccb(ccb);
1156 1.1 bouyer goto stuffup;
1157 1.1 bouyer }
1158 1.1 bouyer break;
1159 1.1 bouyer }
1160 1.1 bouyer
1161 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: start io %d\n", DEVNAME(sc), target);
1162 1.1 bouyer
1163 1.1 bouyer if (xs->xs_control & XS_CTL_POLL) {
1164 1.1 bouyer if (mfi_poll(ccb)) {
1165 1.1 bouyer /* XXX check for sense in ccb->ccb_sense? */
1166 1.1 bouyer printf("%s: mfi_scsipi_request poll failed\n",
1167 1.1 bouyer DEVNAME(sc));
1168 1.22 cegger memset(&xs->sense, 0, sizeof(xs->sense));
1169 1.1 bouyer xs->sense.scsi_sense.response_code =
1170 1.1 bouyer SSD_RCODE_VALID | SSD_RCODE_CURRENT;
1171 1.1 bouyer xs->sense.scsi_sense.flags = SKEY_ILLEGAL_REQUEST;
1172 1.1 bouyer xs->sense.scsi_sense.asc = 0x20; /* invalid opcode */
1173 1.1 bouyer xs->error = XS_SENSE;
1174 1.1 bouyer xs->status = SCSI_CHECK;
1175 1.1 bouyer } else {
1176 1.1 bouyer DNPRINTF(MFI_D_DMA,
1177 1.1 bouyer "%s: mfi_scsipi_request poll complete %d\n",
1178 1.1 bouyer DEVNAME(sc), ccb->ccb_dmamap->dm_nsegs);
1179 1.1 bouyer xs->error = XS_NOERROR;
1180 1.1 bouyer xs->status = SCSI_OK;
1181 1.1 bouyer xs->resid = 0;
1182 1.1 bouyer }
1183 1.1 bouyer mfi_put_ccb(ccb);
1184 1.1 bouyer scsipi_done(xs);
1185 1.1 bouyer splx(s);
1186 1.1 bouyer return;
1187 1.1 bouyer }
1188 1.1 bouyer
1189 1.12 xtraeme mfi_post(sc, ccb);
1190 1.1 bouyer
1191 1.1 bouyer DNPRINTF(MFI_D_DMA, "%s: mfi_scsipi_request queued %d\n", DEVNAME(sc),
1192 1.1 bouyer ccb->ccb_dmamap->dm_nsegs);
1193 1.1 bouyer
1194 1.1 bouyer splx(s);
1195 1.1 bouyer return;
1196 1.1 bouyer
1197 1.1 bouyer stuffup:
1198 1.1 bouyer xs->error = XS_DRIVER_STUFFUP;
1199 1.1 bouyer scsipi_done(xs);
1200 1.1 bouyer splx(s);
1201 1.1 bouyer }
1202 1.1 bouyer
1203 1.13 xtraeme static int
1204 1.1 bouyer mfi_create_sgl(struct mfi_ccb *ccb, int flags)
1205 1.1 bouyer {
1206 1.1 bouyer struct mfi_softc *sc = ccb->ccb_sc;
1207 1.1 bouyer struct mfi_frame_header *hdr;
1208 1.1 bouyer bus_dma_segment_t *sgd;
1209 1.1 bouyer union mfi_sgl *sgl;
1210 1.1 bouyer int error, i;
1211 1.1 bouyer
1212 1.4 bouyer DNPRINTF(MFI_D_DMA, "%s: mfi_create_sgl %#lx\n", DEVNAME(sc),
1213 1.4 bouyer (u_long)ccb->ccb_data);
1214 1.1 bouyer
1215 1.1 bouyer if (!ccb->ccb_data)
1216 1.13 xtraeme return 1;
1217 1.1 bouyer
1218 1.1 bouyer error = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap,
1219 1.1 bouyer ccb->ccb_data, ccb->ccb_len, NULL, flags);
1220 1.1 bouyer if (error) {
1221 1.1 bouyer if (error == EFBIG)
1222 1.1 bouyer printf("more than %d dma segs\n",
1223 1.1 bouyer sc->sc_max_sgl);
1224 1.1 bouyer else
1225 1.1 bouyer printf("error %d loading dma map\n", error);
1226 1.13 xtraeme return 1;
1227 1.1 bouyer }
1228 1.1 bouyer
1229 1.1 bouyer hdr = &ccb->ccb_frame->mfr_header;
1230 1.1 bouyer sgl = ccb->ccb_sgl;
1231 1.1 bouyer sgd = ccb->ccb_dmamap->dm_segs;
1232 1.1 bouyer for (i = 0; i < ccb->ccb_dmamap->dm_nsegs; i++) {
1233 1.1 bouyer sgl->sg32[i].addr = htole32(sgd[i].ds_addr);
1234 1.1 bouyer sgl->sg32[i].len = htole32(sgd[i].ds_len);
1235 1.1 bouyer DNPRINTF(MFI_D_DMA, "%s: addr: %#x len: %#x\n",
1236 1.1 bouyer DEVNAME(sc), sgl->sg32[i].addr, sgl->sg32[i].len);
1237 1.1 bouyer }
1238 1.1 bouyer
1239 1.1 bouyer if (ccb->ccb_direction == MFI_DATA_IN) {
1240 1.1 bouyer hdr->mfh_flags |= MFI_FRAME_DIR_READ;
1241 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
1242 1.1 bouyer ccb->ccb_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1243 1.1 bouyer } else {
1244 1.1 bouyer hdr->mfh_flags |= MFI_FRAME_DIR_WRITE;
1245 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
1246 1.1 bouyer ccb->ccb_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
1247 1.1 bouyer }
1248 1.1 bouyer
1249 1.1 bouyer hdr->mfh_sg_count = ccb->ccb_dmamap->dm_nsegs;
1250 1.1 bouyer /* for 64 bit io make the sizeof a variable to hold whatever sg size */
1251 1.1 bouyer ccb->ccb_frame_size += sizeof(struct mfi_sg32) *
1252 1.1 bouyer ccb->ccb_dmamap->dm_nsegs;
1253 1.1 bouyer ccb->ccb_extra_frames = (ccb->ccb_frame_size - 1) / MFI_FRAME_SIZE;
1254 1.1 bouyer
1255 1.1 bouyer DNPRINTF(MFI_D_DMA, "%s: sg_count: %d frame_size: %d frames_size: %d"
1256 1.1 bouyer " dm_nsegs: %d extra_frames: %d\n",
1257 1.1 bouyer DEVNAME(sc),
1258 1.1 bouyer hdr->mfh_sg_count,
1259 1.1 bouyer ccb->ccb_frame_size,
1260 1.1 bouyer sc->sc_frames_size,
1261 1.1 bouyer ccb->ccb_dmamap->dm_nsegs,
1262 1.1 bouyer ccb->ccb_extra_frames);
1263 1.1 bouyer
1264 1.13 xtraeme return 0;
1265 1.1 bouyer }
1266 1.1 bouyer
1267 1.13 xtraeme static int
1268 1.19 bouyer mfi_mgmt_internal(struct mfi_softc *sc, uint32_t opc, uint32_t dir,
1269 1.19 bouyer uint32_t len, void *buf, uint8_t *mbox) {
1270 1.1 bouyer struct mfi_ccb *ccb;
1271 1.1 bouyer int rv = 1;
1272 1.1 bouyer
1273 1.1 bouyer if ((ccb = mfi_get_ccb(sc)) == NULL)
1274 1.13 xtraeme return rv;
1275 1.19 bouyer rv = mfi_mgmt(ccb, NULL, opc, dir, len, buf, mbox);
1276 1.19 bouyer if (rv)
1277 1.19 bouyer return rv;
1278 1.19 bouyer
1279 1.19 bouyer if (cold) {
1280 1.19 bouyer if (mfi_poll(ccb))
1281 1.19 bouyer goto done;
1282 1.19 bouyer } else {
1283 1.19 bouyer mfi_post(sc, ccb);
1284 1.19 bouyer
1285 1.19 bouyer DNPRINTF(MFI_D_MISC, "%s: mfi_mgmt_internal sleeping\n",
1286 1.19 bouyer DEVNAME(sc));
1287 1.19 bouyer while (ccb->ccb_state != MFI_CCB_DONE)
1288 1.19 bouyer tsleep(ccb, PRIBIO, "mfi_mgmt", 0);
1289 1.19 bouyer
1290 1.19 bouyer if (ccb->ccb_flags & MFI_CCB_F_ERR)
1291 1.19 bouyer goto done;
1292 1.19 bouyer }
1293 1.19 bouyer rv = 0;
1294 1.19 bouyer
1295 1.19 bouyer done:
1296 1.19 bouyer mfi_put_ccb(ccb);
1297 1.19 bouyer return rv;
1298 1.19 bouyer }
1299 1.19 bouyer
1300 1.19 bouyer static int
1301 1.19 bouyer mfi_mgmt(struct mfi_ccb *ccb, struct scsipi_xfer *xs,
1302 1.19 bouyer uint32_t opc, uint32_t dir, uint32_t len, void *buf, uint8_t *mbox)
1303 1.19 bouyer {
1304 1.19 bouyer struct mfi_dcmd_frame *dcmd;
1305 1.19 bouyer
1306 1.19 bouyer DNPRINTF(MFI_D_MISC, "%s: mfi_mgmt %#x\n", DEVNAME(ccb->ccb_sc), opc);
1307 1.1 bouyer
1308 1.1 bouyer dcmd = &ccb->ccb_frame->mfr_dcmd;
1309 1.1 bouyer memset(dcmd->mdf_mbox, 0, MFI_MBOX_SIZE);
1310 1.1 bouyer dcmd->mdf_header.mfh_cmd = MFI_CMD_DCMD;
1311 1.1 bouyer dcmd->mdf_header.mfh_timeout = 0;
1312 1.1 bouyer
1313 1.1 bouyer dcmd->mdf_opcode = opc;
1314 1.1 bouyer dcmd->mdf_header.mfh_data_len = 0;
1315 1.1 bouyer ccb->ccb_direction = dir;
1316 1.19 bouyer ccb->ccb_xs = xs;
1317 1.1 bouyer ccb->ccb_done = mfi_mgmt_done;
1318 1.1 bouyer
1319 1.1 bouyer ccb->ccb_frame_size = MFI_DCMD_FRAME_SIZE;
1320 1.1 bouyer
1321 1.1 bouyer /* handle special opcodes */
1322 1.1 bouyer if (mbox)
1323 1.1 bouyer memcpy(dcmd->mdf_mbox, mbox, MFI_MBOX_SIZE);
1324 1.1 bouyer
1325 1.1 bouyer if (dir != MFI_DATA_NONE) {
1326 1.1 bouyer dcmd->mdf_header.mfh_data_len = len;
1327 1.1 bouyer ccb->ccb_data = buf;
1328 1.1 bouyer ccb->ccb_len = len;
1329 1.1 bouyer ccb->ccb_sgl = &dcmd->mdf_sgl;
1330 1.1 bouyer
1331 1.1 bouyer if (mfi_create_sgl(ccb, BUS_DMA_WAITOK))
1332 1.19 bouyer return 1;
1333 1.1 bouyer }
1334 1.19 bouyer return 0;
1335 1.1 bouyer }
1336 1.1 bouyer
1337 1.13 xtraeme static void
1338 1.1 bouyer mfi_mgmt_done(struct mfi_ccb *ccb)
1339 1.1 bouyer {
1340 1.19 bouyer struct scsipi_xfer *xs = ccb->ccb_xs;
1341 1.1 bouyer struct mfi_softc *sc = ccb->ccb_sc;
1342 1.1 bouyer struct mfi_frame_header *hdr = &ccb->ccb_frame->mfr_header;
1343 1.1 bouyer
1344 1.4 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done %#lx %#lx\n",
1345 1.4 bouyer DEVNAME(sc), (u_long)ccb, (u_long)ccb->ccb_frame);
1346 1.1 bouyer
1347 1.1 bouyer if (ccb->ccb_data != NULL) {
1348 1.1 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done sync\n",
1349 1.1 bouyer DEVNAME(sc));
1350 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
1351 1.1 bouyer ccb->ccb_dmamap->dm_mapsize,
1352 1.1 bouyer (ccb->ccb_direction & MFI_DATA_IN) ?
1353 1.1 bouyer BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1354 1.1 bouyer
1355 1.1 bouyer bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap);
1356 1.1 bouyer }
1357 1.1 bouyer
1358 1.1 bouyer if (hdr->mfh_cmd_status != MFI_STAT_OK)
1359 1.1 bouyer ccb->ccb_flags |= MFI_CCB_F_ERR;
1360 1.1 bouyer
1361 1.1 bouyer ccb->ccb_state = MFI_CCB_DONE;
1362 1.19 bouyer if (xs) {
1363 1.19 bouyer if (hdr->mfh_cmd_status != MFI_STAT_OK) {
1364 1.19 bouyer xs->error = XS_DRIVER_STUFFUP;
1365 1.19 bouyer } else {
1366 1.19 bouyer xs->error = XS_NOERROR;
1367 1.19 bouyer xs->status = SCSI_OK;
1368 1.19 bouyer xs->resid = 0;
1369 1.19 bouyer }
1370 1.19 bouyer mfi_put_ccb(ccb);
1371 1.19 bouyer scsipi_done(xs);
1372 1.19 bouyer } else
1373 1.19 bouyer wakeup(ccb);
1374 1.1 bouyer }
1375 1.1 bouyer
1376 1.1 bouyer #if NBIO > 0
1377 1.1 bouyer int
1378 1.23 cegger mfi_ioctl(device_t dev, u_long cmd, void *addr)
1379 1.1 bouyer {
1380 1.26 dyoung struct mfi_softc *sc = device_private(dev);
1381 1.1 bouyer int error = 0;
1382 1.13 xtraeme int s = splbio();
1383 1.1 bouyer
1384 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl ", DEVNAME(sc));
1385 1.1 bouyer
1386 1.1 bouyer switch (cmd) {
1387 1.1 bouyer case BIOCINQ:
1388 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "inq\n");
1389 1.1 bouyer error = mfi_ioctl_inq(sc, (struct bioc_inq *)addr);
1390 1.1 bouyer break;
1391 1.1 bouyer
1392 1.1 bouyer case BIOCVOL:
1393 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "vol\n");
1394 1.1 bouyer error = mfi_ioctl_vol(sc, (struct bioc_vol *)addr);
1395 1.1 bouyer break;
1396 1.1 bouyer
1397 1.1 bouyer case BIOCDISK:
1398 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "disk\n");
1399 1.1 bouyer error = mfi_ioctl_disk(sc, (struct bioc_disk *)addr);
1400 1.1 bouyer break;
1401 1.1 bouyer
1402 1.1 bouyer case BIOCALARM:
1403 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "alarm\n");
1404 1.1 bouyer error = mfi_ioctl_alarm(sc, (struct bioc_alarm *)addr);
1405 1.1 bouyer break;
1406 1.1 bouyer
1407 1.1 bouyer case BIOCBLINK:
1408 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "blink\n");
1409 1.1 bouyer error = mfi_ioctl_blink(sc, (struct bioc_blink *)addr);
1410 1.1 bouyer break;
1411 1.1 bouyer
1412 1.1 bouyer case BIOCSETSTATE:
1413 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "setstate\n");
1414 1.1 bouyer error = mfi_ioctl_setstate(sc, (struct bioc_setstate *)addr);
1415 1.1 bouyer break;
1416 1.1 bouyer
1417 1.1 bouyer default:
1418 1.1 bouyer DNPRINTF(MFI_D_IOCTL, " invalid ioctl\n");
1419 1.1 bouyer error = EINVAL;
1420 1.1 bouyer }
1421 1.4 bouyer splx(s);
1422 1.13 xtraeme
1423 1.4 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl return %x\n", DEVNAME(sc), error);
1424 1.13 xtraeme return error;
1425 1.1 bouyer }
1426 1.1 bouyer
1427 1.13 xtraeme static int
1428 1.1 bouyer mfi_ioctl_inq(struct mfi_softc *sc, struct bioc_inq *bi)
1429 1.1 bouyer {
1430 1.1 bouyer struct mfi_conf *cfg;
1431 1.1 bouyer int rv = EINVAL;
1432 1.1 bouyer
1433 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_inq\n", DEVNAME(sc));
1434 1.1 bouyer
1435 1.1 bouyer if (mfi_get_info(sc)) {
1436 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_inq failed\n",
1437 1.1 bouyer DEVNAME(sc));
1438 1.13 xtraeme return EIO;
1439 1.1 bouyer }
1440 1.1 bouyer
1441 1.1 bouyer /* get figures */
1442 1.1 bouyer cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK);
1443 1.19 bouyer if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN,
1444 1.19 bouyer sizeof *cfg, cfg, NULL))
1445 1.1 bouyer goto freeme;
1446 1.1 bouyer
1447 1.1 bouyer strlcpy(bi->bi_dev, DEVNAME(sc), sizeof(bi->bi_dev));
1448 1.1 bouyer bi->bi_novol = cfg->mfc_no_ld + cfg->mfc_no_hs;
1449 1.1 bouyer bi->bi_nodisk = sc->sc_info.mci_pd_disks_present;
1450 1.1 bouyer
1451 1.1 bouyer rv = 0;
1452 1.1 bouyer freeme:
1453 1.1 bouyer free(cfg, M_DEVBUF);
1454 1.13 xtraeme return rv;
1455 1.1 bouyer }
1456 1.1 bouyer
1457 1.13 xtraeme static int
1458 1.1 bouyer mfi_ioctl_vol(struct mfi_softc *sc, struct bioc_vol *bv)
1459 1.1 bouyer {
1460 1.1 bouyer int i, per, rv = EINVAL;
1461 1.1 bouyer uint8_t mbox[MFI_MBOX_SIZE];
1462 1.1 bouyer
1463 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol %#x\n",
1464 1.1 bouyer DEVNAME(sc), bv->bv_volid);
1465 1.1 bouyer
1466 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_LD_GET_LIST, MFI_DATA_IN,
1467 1.1 bouyer sizeof(sc->sc_ld_list), &sc->sc_ld_list, NULL))
1468 1.1 bouyer goto done;
1469 1.1 bouyer
1470 1.1 bouyer i = bv->bv_volid;
1471 1.1 bouyer mbox[0] = sc->sc_ld_list.mll_list[i].mll_ld.mld_target;
1472 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol target %#x\n",
1473 1.1 bouyer DEVNAME(sc), mbox[0]);
1474 1.1 bouyer
1475 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_LD_GET_INFO, MFI_DATA_IN,
1476 1.1 bouyer sizeof(sc->sc_ld_details), &sc->sc_ld_details, mbox))
1477 1.1 bouyer goto done;
1478 1.1 bouyer
1479 1.1 bouyer if (bv->bv_volid >= sc->sc_ld_list.mll_no_ld) {
1480 1.1 bouyer /* go do hotspares */
1481 1.1 bouyer rv = mfi_bio_hs(sc, bv->bv_volid, MFI_MGMT_VD, bv);
1482 1.1 bouyer goto done;
1483 1.1 bouyer }
1484 1.1 bouyer
1485 1.1 bouyer strlcpy(bv->bv_dev, sc->sc_ld[i].ld_dev, sizeof(bv->bv_dev));
1486 1.1 bouyer
1487 1.1 bouyer switch(sc->sc_ld_list.mll_list[i].mll_state) {
1488 1.1 bouyer case MFI_LD_OFFLINE:
1489 1.1 bouyer bv->bv_status = BIOC_SVOFFLINE;
1490 1.1 bouyer break;
1491 1.1 bouyer
1492 1.1 bouyer case MFI_LD_PART_DEGRADED:
1493 1.1 bouyer case MFI_LD_DEGRADED:
1494 1.1 bouyer bv->bv_status = BIOC_SVDEGRADED;
1495 1.1 bouyer break;
1496 1.1 bouyer
1497 1.1 bouyer case MFI_LD_ONLINE:
1498 1.1 bouyer bv->bv_status = BIOC_SVONLINE;
1499 1.1 bouyer break;
1500 1.1 bouyer
1501 1.1 bouyer default:
1502 1.1 bouyer bv->bv_status = BIOC_SVINVALID;
1503 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: invalid logical disk state %#x\n",
1504 1.1 bouyer DEVNAME(sc),
1505 1.1 bouyer sc->sc_ld_list.mll_list[i].mll_state);
1506 1.1 bouyer }
1507 1.1 bouyer
1508 1.1 bouyer /* additional status can modify MFI status */
1509 1.1 bouyer switch (sc->sc_ld_details.mld_progress.mlp_in_prog) {
1510 1.1 bouyer case MFI_LD_PROG_CC:
1511 1.1 bouyer case MFI_LD_PROG_BGI:
1512 1.1 bouyer bv->bv_status = BIOC_SVSCRUB;
1513 1.1 bouyer per = (int)sc->sc_ld_details.mld_progress.mlp_cc.mp_progress;
1514 1.1 bouyer bv->bv_percent = (per * 100) / 0xffff;
1515 1.1 bouyer bv->bv_seconds =
1516 1.1 bouyer sc->sc_ld_details.mld_progress.mlp_cc.mp_elapsed_seconds;
1517 1.1 bouyer break;
1518 1.1 bouyer
1519 1.1 bouyer case MFI_LD_PROG_FGI:
1520 1.1 bouyer case MFI_LD_PROG_RECONSTRUCT:
1521 1.1 bouyer /* nothing yet */
1522 1.1 bouyer break;
1523 1.1 bouyer }
1524 1.1 bouyer
1525 1.1 bouyer /*
1526 1.1 bouyer * The RAID levels are determined per the SNIA DDF spec, this is only
1527 1.1 bouyer * a subset that is valid for the MFI contrller.
1528 1.1 bouyer */
1529 1.1 bouyer bv->bv_level = sc->sc_ld_details.mld_cfg.mlc_parm.mpa_pri_raid;
1530 1.1 bouyer if (sc->sc_ld_details.mld_cfg.mlc_parm.mpa_sec_raid ==
1531 1.1 bouyer MFI_DDF_SRL_SPANNED)
1532 1.1 bouyer bv->bv_level *= 10;
1533 1.1 bouyer
1534 1.1 bouyer bv->bv_nodisk = sc->sc_ld_details.mld_cfg.mlc_parm.mpa_no_drv_per_span *
1535 1.1 bouyer sc->sc_ld_details.mld_cfg.mlc_parm.mpa_span_depth;
1536 1.1 bouyer
1537 1.1 bouyer bv->bv_size = sc->sc_ld_details.mld_size * 512; /* bytes per block */
1538 1.1 bouyer
1539 1.1 bouyer rv = 0;
1540 1.1 bouyer done:
1541 1.4 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol done %x\n",
1542 1.4 bouyer DEVNAME(sc), rv);
1543 1.13 xtraeme return rv;
1544 1.1 bouyer }
1545 1.1 bouyer
1546 1.13 xtraeme static int
1547 1.1 bouyer mfi_ioctl_disk(struct mfi_softc *sc, struct bioc_disk *bd)
1548 1.1 bouyer {
1549 1.1 bouyer struct mfi_conf *cfg;
1550 1.1 bouyer struct mfi_array *ar;
1551 1.1 bouyer struct mfi_ld_cfg *ld;
1552 1.1 bouyer struct mfi_pd_details *pd;
1553 1.4 bouyer struct scsipi_inquiry_data *inqbuf;
1554 1.1 bouyer char vend[8+16+4+1];
1555 1.1 bouyer int i, rv = EINVAL;
1556 1.1 bouyer int arr, vol, disk;
1557 1.1 bouyer uint32_t size;
1558 1.1 bouyer uint8_t mbox[MFI_MBOX_SIZE];
1559 1.1 bouyer
1560 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_disk %#x\n",
1561 1.1 bouyer DEVNAME(sc), bd->bd_diskid);
1562 1.1 bouyer
1563 1.4 bouyer pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK | M_ZERO);
1564 1.1 bouyer
1565 1.1 bouyer /* send single element command to retrieve size for full structure */
1566 1.1 bouyer cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK);
1567 1.19 bouyer if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN,
1568 1.19 bouyer sizeof *cfg, cfg, NULL))
1569 1.1 bouyer goto freeme;
1570 1.1 bouyer
1571 1.1 bouyer size = cfg->mfc_size;
1572 1.1 bouyer free(cfg, M_DEVBUF);
1573 1.1 bouyer
1574 1.1 bouyer /* memory for read config */
1575 1.13 xtraeme cfg = malloc(size, M_DEVBUF, M_WAITOK|M_ZERO);
1576 1.19 bouyer if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN,
1577 1.19 bouyer size, cfg, NULL))
1578 1.1 bouyer goto freeme;
1579 1.1 bouyer
1580 1.1 bouyer ar = cfg->mfc_array;
1581 1.1 bouyer
1582 1.1 bouyer /* calculate offset to ld structure */
1583 1.1 bouyer ld = (struct mfi_ld_cfg *)(
1584 1.1 bouyer ((uint8_t *)cfg) + offsetof(struct mfi_conf, mfc_array) +
1585 1.1 bouyer cfg->mfc_array_size * cfg->mfc_no_array);
1586 1.1 bouyer
1587 1.1 bouyer vol = bd->bd_volid;
1588 1.1 bouyer
1589 1.1 bouyer if (vol >= cfg->mfc_no_ld) {
1590 1.1 bouyer /* do hotspares */
1591 1.1 bouyer rv = mfi_bio_hs(sc, bd->bd_volid, MFI_MGMT_SD, bd);
1592 1.1 bouyer goto freeme;
1593 1.1 bouyer }
1594 1.1 bouyer
1595 1.1 bouyer /* find corresponding array for ld */
1596 1.1 bouyer for (i = 0, arr = 0; i < vol; i++)
1597 1.1 bouyer arr += ld[i].mlc_parm.mpa_span_depth;
1598 1.1 bouyer
1599 1.1 bouyer /* offset disk into pd list */
1600 1.1 bouyer disk = bd->bd_diskid % ld[vol].mlc_parm.mpa_no_drv_per_span;
1601 1.1 bouyer
1602 1.1 bouyer /* offset array index into the next spans */
1603 1.1 bouyer arr += bd->bd_diskid / ld[vol].mlc_parm.mpa_no_drv_per_span;
1604 1.1 bouyer
1605 1.1 bouyer bd->bd_target = ar[arr].pd[disk].mar_enc_slot;
1606 1.1 bouyer switch (ar[arr].pd[disk].mar_pd_state){
1607 1.1 bouyer case MFI_PD_UNCONFIG_GOOD:
1608 1.1 bouyer bd->bd_status = BIOC_SDUNUSED;
1609 1.1 bouyer break;
1610 1.1 bouyer
1611 1.1 bouyer case MFI_PD_HOTSPARE: /* XXX dedicated hotspare part of array? */
1612 1.1 bouyer bd->bd_status = BIOC_SDHOTSPARE;
1613 1.1 bouyer break;
1614 1.1 bouyer
1615 1.1 bouyer case MFI_PD_OFFLINE:
1616 1.1 bouyer bd->bd_status = BIOC_SDOFFLINE;
1617 1.1 bouyer break;
1618 1.1 bouyer
1619 1.1 bouyer case MFI_PD_FAILED:
1620 1.1 bouyer bd->bd_status = BIOC_SDFAILED;
1621 1.1 bouyer break;
1622 1.1 bouyer
1623 1.1 bouyer case MFI_PD_REBUILD:
1624 1.1 bouyer bd->bd_status = BIOC_SDREBUILD;
1625 1.1 bouyer break;
1626 1.1 bouyer
1627 1.1 bouyer case MFI_PD_ONLINE:
1628 1.1 bouyer bd->bd_status = BIOC_SDONLINE;
1629 1.1 bouyer break;
1630 1.1 bouyer
1631 1.1 bouyer case MFI_PD_UNCONFIG_BAD: /* XXX define new state in bio */
1632 1.1 bouyer default:
1633 1.1 bouyer bd->bd_status = BIOC_SDINVALID;
1634 1.1 bouyer break;
1635 1.1 bouyer
1636 1.1 bouyer }
1637 1.1 bouyer
1638 1.1 bouyer /* get the remaining fields */
1639 1.1 bouyer *((uint16_t *)&mbox) = ar[arr].pd[disk].mar_pd.mfp_id;
1640 1.4 bouyer memset(pd, 0, sizeof(*pd));
1641 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_PD_GET_INFO, MFI_DATA_IN,
1642 1.1 bouyer sizeof *pd, pd, mbox))
1643 1.1 bouyer goto freeme;
1644 1.1 bouyer
1645 1.1 bouyer bd->bd_size = pd->mpd_size * 512; /* bytes per block */
1646 1.1 bouyer
1647 1.1 bouyer /* if pd->mpd_enc_idx is 0 then it is not in an enclosure */
1648 1.1 bouyer bd->bd_channel = pd->mpd_enc_idx;
1649 1.1 bouyer
1650 1.4 bouyer inqbuf = (struct scsipi_inquiry_data *)&pd->mpd_inq_data;
1651 1.1 bouyer memcpy(vend, inqbuf->vendor, sizeof vend - 1);
1652 1.1 bouyer vend[sizeof vend - 1] = '\0';
1653 1.1 bouyer strlcpy(bd->bd_vendor, vend, sizeof(bd->bd_vendor));
1654 1.1 bouyer
1655 1.1 bouyer /* XXX find a way to retrieve serial nr from drive */
1656 1.1 bouyer /* XXX find a way to get bd_procdev */
1657 1.1 bouyer
1658 1.1 bouyer rv = 0;
1659 1.1 bouyer freeme:
1660 1.1 bouyer free(pd, M_DEVBUF);
1661 1.1 bouyer free(cfg, M_DEVBUF);
1662 1.1 bouyer
1663 1.13 xtraeme return rv;
1664 1.1 bouyer }
1665 1.1 bouyer
1666 1.13 xtraeme static int
1667 1.1 bouyer mfi_ioctl_alarm(struct mfi_softc *sc, struct bioc_alarm *ba)
1668 1.1 bouyer {
1669 1.1 bouyer uint32_t opc, dir = MFI_DATA_NONE;
1670 1.1 bouyer int rv = 0;
1671 1.1 bouyer int8_t ret;
1672 1.1 bouyer
1673 1.1 bouyer switch(ba->ba_opcode) {
1674 1.1 bouyer case BIOC_SADISABLE:
1675 1.1 bouyer opc = MR_DCMD_SPEAKER_DISABLE;
1676 1.1 bouyer break;
1677 1.1 bouyer
1678 1.1 bouyer case BIOC_SAENABLE:
1679 1.1 bouyer opc = MR_DCMD_SPEAKER_ENABLE;
1680 1.1 bouyer break;
1681 1.1 bouyer
1682 1.1 bouyer case BIOC_SASILENCE:
1683 1.1 bouyer opc = MR_DCMD_SPEAKER_SILENCE;
1684 1.1 bouyer break;
1685 1.1 bouyer
1686 1.1 bouyer case BIOC_GASTATUS:
1687 1.1 bouyer opc = MR_DCMD_SPEAKER_GET;
1688 1.1 bouyer dir = MFI_DATA_IN;
1689 1.1 bouyer break;
1690 1.1 bouyer
1691 1.1 bouyer case BIOC_SATEST:
1692 1.1 bouyer opc = MR_DCMD_SPEAKER_TEST;
1693 1.1 bouyer break;
1694 1.1 bouyer
1695 1.1 bouyer default:
1696 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_alarm biocalarm invalid "
1697 1.1 bouyer "opcode %x\n", DEVNAME(sc), ba->ba_opcode);
1698 1.13 xtraeme return EINVAL;
1699 1.1 bouyer }
1700 1.1 bouyer
1701 1.19 bouyer if (mfi_mgmt_internal(sc, opc, dir, sizeof(ret), &ret, NULL))
1702 1.1 bouyer rv = EINVAL;
1703 1.1 bouyer else
1704 1.1 bouyer if (ba->ba_opcode == BIOC_GASTATUS)
1705 1.1 bouyer ba->ba_status = ret;
1706 1.1 bouyer else
1707 1.1 bouyer ba->ba_status = 0;
1708 1.1 bouyer
1709 1.13 xtraeme return rv;
1710 1.1 bouyer }
1711 1.1 bouyer
1712 1.13 xtraeme static int
1713 1.1 bouyer mfi_ioctl_blink(struct mfi_softc *sc, struct bioc_blink *bb)
1714 1.1 bouyer {
1715 1.1 bouyer int i, found, rv = EINVAL;
1716 1.1 bouyer uint8_t mbox[MFI_MBOX_SIZE];
1717 1.1 bouyer uint32_t cmd;
1718 1.1 bouyer struct mfi_pd_list *pd;
1719 1.1 bouyer
1720 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_blink %x\n", DEVNAME(sc),
1721 1.1 bouyer bb->bb_status);
1722 1.1 bouyer
1723 1.1 bouyer /* channel 0 means not in an enclosure so can't be blinked */
1724 1.1 bouyer if (bb->bb_channel == 0)
1725 1.13 xtraeme return EINVAL;
1726 1.1 bouyer
1727 1.1 bouyer pd = malloc(MFI_PD_LIST_SIZE, M_DEVBUF, M_WAITOK);
1728 1.1 bouyer
1729 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_PD_GET_LIST, MFI_DATA_IN,
1730 1.1 bouyer MFI_PD_LIST_SIZE, pd, NULL))
1731 1.1 bouyer goto done;
1732 1.1 bouyer
1733 1.1 bouyer for (i = 0, found = 0; i < pd->mpl_no_pd; i++)
1734 1.1 bouyer if (bb->bb_channel == pd->mpl_address[i].mpa_enc_index &&
1735 1.1 bouyer bb->bb_target == pd->mpl_address[i].mpa_enc_slot) {
1736 1.1 bouyer found = 1;
1737 1.1 bouyer break;
1738 1.1 bouyer }
1739 1.1 bouyer
1740 1.1 bouyer if (!found)
1741 1.1 bouyer goto done;
1742 1.1 bouyer
1743 1.1 bouyer memset(mbox, 0, sizeof mbox);
1744 1.1 bouyer
1745 1.20 yamt *((uint16_t *)&mbox) = pd->mpl_address[i].mpa_pd_id;
1746 1.1 bouyer
1747 1.1 bouyer switch (bb->bb_status) {
1748 1.1 bouyer case BIOC_SBUNBLINK:
1749 1.1 bouyer cmd = MR_DCMD_PD_UNBLINK;
1750 1.1 bouyer break;
1751 1.1 bouyer
1752 1.1 bouyer case BIOC_SBBLINK:
1753 1.1 bouyer cmd = MR_DCMD_PD_BLINK;
1754 1.1 bouyer break;
1755 1.1 bouyer
1756 1.1 bouyer case BIOC_SBALARM:
1757 1.1 bouyer default:
1758 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_blink biocblink invalid "
1759 1.1 bouyer "opcode %x\n", DEVNAME(sc), bb->bb_status);
1760 1.1 bouyer goto done;
1761 1.1 bouyer }
1762 1.1 bouyer
1763 1.1 bouyer
1764 1.19 bouyer if (mfi_mgmt_internal(sc, cmd, MFI_DATA_NONE, 0, NULL, mbox))
1765 1.1 bouyer goto done;
1766 1.1 bouyer
1767 1.1 bouyer rv = 0;
1768 1.1 bouyer done:
1769 1.1 bouyer free(pd, M_DEVBUF);
1770 1.13 xtraeme return rv;
1771 1.1 bouyer }
1772 1.1 bouyer
1773 1.13 xtraeme static int
1774 1.1 bouyer mfi_ioctl_setstate(struct mfi_softc *sc, struct bioc_setstate *bs)
1775 1.1 bouyer {
1776 1.1 bouyer struct mfi_pd_list *pd;
1777 1.1 bouyer int i, found, rv = EINVAL;
1778 1.1 bouyer uint8_t mbox[MFI_MBOX_SIZE];
1779 1.1 bouyer uint32_t cmd;
1780 1.1 bouyer
1781 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_setstate %x\n", DEVNAME(sc),
1782 1.1 bouyer bs->bs_status);
1783 1.1 bouyer
1784 1.1 bouyer pd = malloc(MFI_PD_LIST_SIZE, M_DEVBUF, M_WAITOK);
1785 1.1 bouyer
1786 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_PD_GET_LIST, MFI_DATA_IN,
1787 1.1 bouyer MFI_PD_LIST_SIZE, pd, NULL))
1788 1.1 bouyer goto done;
1789 1.1 bouyer
1790 1.1 bouyer for (i = 0, found = 0; i < pd->mpl_no_pd; i++)
1791 1.1 bouyer if (bs->bs_channel == pd->mpl_address[i].mpa_enc_index &&
1792 1.1 bouyer bs->bs_target == pd->mpl_address[i].mpa_enc_slot) {
1793 1.1 bouyer found = 1;
1794 1.1 bouyer break;
1795 1.1 bouyer }
1796 1.1 bouyer
1797 1.1 bouyer if (!found)
1798 1.1 bouyer goto done;
1799 1.1 bouyer
1800 1.1 bouyer memset(mbox, 0, sizeof mbox);
1801 1.1 bouyer
1802 1.20 yamt *((uint16_t *)&mbox) = pd->mpl_address[i].mpa_pd_id;
1803 1.1 bouyer
1804 1.1 bouyer switch (bs->bs_status) {
1805 1.1 bouyer case BIOC_SSONLINE:
1806 1.1 bouyer mbox[2] = MFI_PD_ONLINE;
1807 1.1 bouyer cmd = MD_DCMD_PD_SET_STATE;
1808 1.1 bouyer break;
1809 1.1 bouyer
1810 1.1 bouyer case BIOC_SSOFFLINE:
1811 1.1 bouyer mbox[2] = MFI_PD_OFFLINE;
1812 1.1 bouyer cmd = MD_DCMD_PD_SET_STATE;
1813 1.1 bouyer break;
1814 1.1 bouyer
1815 1.1 bouyer case BIOC_SSHOTSPARE:
1816 1.1 bouyer mbox[2] = MFI_PD_HOTSPARE;
1817 1.1 bouyer cmd = MD_DCMD_PD_SET_STATE;
1818 1.1 bouyer break;
1819 1.1 bouyer /*
1820 1.1 bouyer case BIOC_SSREBUILD:
1821 1.1 bouyer cmd = MD_DCMD_PD_REBUILD;
1822 1.1 bouyer break;
1823 1.1 bouyer */
1824 1.1 bouyer default:
1825 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_setstate invalid "
1826 1.1 bouyer "opcode %x\n", DEVNAME(sc), bs->bs_status);
1827 1.1 bouyer goto done;
1828 1.1 bouyer }
1829 1.1 bouyer
1830 1.1 bouyer
1831 1.19 bouyer if (mfi_mgmt_internal(sc, MD_DCMD_PD_SET_STATE, MFI_DATA_NONE,
1832 1.19 bouyer 0, NULL, mbox))
1833 1.1 bouyer goto done;
1834 1.1 bouyer
1835 1.1 bouyer rv = 0;
1836 1.1 bouyer done:
1837 1.1 bouyer free(pd, M_DEVBUF);
1838 1.13 xtraeme return rv;
1839 1.1 bouyer }
1840 1.1 bouyer
1841 1.13 xtraeme static int
1842 1.1 bouyer mfi_bio_hs(struct mfi_softc *sc, int volid, int type, void *bio_hs)
1843 1.1 bouyer {
1844 1.1 bouyer struct mfi_conf *cfg;
1845 1.1 bouyer struct mfi_hotspare *hs;
1846 1.1 bouyer struct mfi_pd_details *pd;
1847 1.1 bouyer struct bioc_disk *sdhs;
1848 1.1 bouyer struct bioc_vol *vdhs;
1849 1.4 bouyer struct scsipi_inquiry_data *inqbuf;
1850 1.1 bouyer char vend[8+16+4+1];
1851 1.1 bouyer int i, rv = EINVAL;
1852 1.1 bouyer uint32_t size;
1853 1.1 bouyer uint8_t mbox[MFI_MBOX_SIZE];
1854 1.1 bouyer
1855 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs %d\n", DEVNAME(sc), volid);
1856 1.1 bouyer
1857 1.1 bouyer if (!bio_hs)
1858 1.13 xtraeme return EINVAL;
1859 1.1 bouyer
1860 1.4 bouyer pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK | M_ZERO);
1861 1.1 bouyer
1862 1.1 bouyer /* send single element command to retrieve size for full structure */
1863 1.1 bouyer cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK);
1864 1.19 bouyer if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN,
1865 1.19 bouyer sizeof *cfg, cfg, NULL))
1866 1.1 bouyer goto freeme;
1867 1.1 bouyer
1868 1.1 bouyer size = cfg->mfc_size;
1869 1.1 bouyer free(cfg, M_DEVBUF);
1870 1.1 bouyer
1871 1.1 bouyer /* memory for read config */
1872 1.13 xtraeme cfg = malloc(size, M_DEVBUF, M_WAITOK|M_ZERO);
1873 1.19 bouyer if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN,
1874 1.19 bouyer size, cfg, NULL))
1875 1.1 bouyer goto freeme;
1876 1.1 bouyer
1877 1.1 bouyer /* calculate offset to hs structure */
1878 1.1 bouyer hs = (struct mfi_hotspare *)(
1879 1.1 bouyer ((uint8_t *)cfg) + offsetof(struct mfi_conf, mfc_array) +
1880 1.1 bouyer cfg->mfc_array_size * cfg->mfc_no_array +
1881 1.1 bouyer cfg->mfc_ld_size * cfg->mfc_no_ld);
1882 1.1 bouyer
1883 1.1 bouyer if (volid < cfg->mfc_no_ld)
1884 1.1 bouyer goto freeme; /* not a hotspare */
1885 1.1 bouyer
1886 1.1 bouyer if (volid > (cfg->mfc_no_ld + cfg->mfc_no_hs))
1887 1.1 bouyer goto freeme; /* not a hotspare */
1888 1.1 bouyer
1889 1.1 bouyer /* offset into hotspare structure */
1890 1.1 bouyer i = volid - cfg->mfc_no_ld;
1891 1.1 bouyer
1892 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs i %d volid %d no_ld %d no_hs %d "
1893 1.1 bouyer "hs %p cfg %p id %02x\n", DEVNAME(sc), i, volid, cfg->mfc_no_ld,
1894 1.1 bouyer cfg->mfc_no_hs, hs, cfg, hs[i].mhs_pd.mfp_id);
1895 1.1 bouyer
1896 1.1 bouyer /* get pd fields */
1897 1.1 bouyer memset(mbox, 0, sizeof mbox);
1898 1.1 bouyer *((uint16_t *)&mbox) = hs[i].mhs_pd.mfp_id;
1899 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_PD_GET_INFO, MFI_DATA_IN,
1900 1.1 bouyer sizeof *pd, pd, mbox)) {
1901 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs illegal PD\n",
1902 1.1 bouyer DEVNAME(sc));
1903 1.1 bouyer goto freeme;
1904 1.1 bouyer }
1905 1.1 bouyer
1906 1.1 bouyer switch (type) {
1907 1.1 bouyer case MFI_MGMT_VD:
1908 1.1 bouyer vdhs = bio_hs;
1909 1.1 bouyer vdhs->bv_status = BIOC_SVONLINE;
1910 1.14 xtraeme vdhs->bv_size = pd->mpd_size * 512; /* bytes per block */
1911 1.1 bouyer vdhs->bv_level = -1; /* hotspare */
1912 1.1 bouyer vdhs->bv_nodisk = 1;
1913 1.1 bouyer break;
1914 1.1 bouyer
1915 1.1 bouyer case MFI_MGMT_SD:
1916 1.1 bouyer sdhs = bio_hs;
1917 1.1 bouyer sdhs->bd_status = BIOC_SDHOTSPARE;
1918 1.14 xtraeme sdhs->bd_size = pd->mpd_size * 512; /* bytes per block */
1919 1.1 bouyer sdhs->bd_channel = pd->mpd_enc_idx;
1920 1.1 bouyer sdhs->bd_target = pd->mpd_enc_slot;
1921 1.4 bouyer inqbuf = (struct scsipi_inquiry_data *)&pd->mpd_inq_data;
1922 1.4 bouyer memcpy(vend, inqbuf->vendor, sizeof(vend) - 1);
1923 1.1 bouyer vend[sizeof vend - 1] = '\0';
1924 1.1 bouyer strlcpy(sdhs->bd_vendor, vend, sizeof(sdhs->bd_vendor));
1925 1.1 bouyer break;
1926 1.1 bouyer
1927 1.1 bouyer default:
1928 1.1 bouyer goto freeme;
1929 1.1 bouyer }
1930 1.1 bouyer
1931 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs 6\n", DEVNAME(sc));
1932 1.1 bouyer rv = 0;
1933 1.1 bouyer freeme:
1934 1.1 bouyer free(pd, M_DEVBUF);
1935 1.1 bouyer free(cfg, M_DEVBUF);
1936 1.1 bouyer
1937 1.13 xtraeme return rv;
1938 1.1 bouyer }
1939 1.1 bouyer
1940 1.13 xtraeme static int
1941 1.24 dyoung mfi_destroy_sensors(struct mfi_softc *sc)
1942 1.24 dyoung {
1943 1.24 dyoung sysmon_envsys_unregister(sc->sc_sme);
1944 1.24 dyoung free(sc->sc_sensor, M_DEVBUF);
1945 1.24 dyoung return 0;
1946 1.24 dyoung }
1947 1.24 dyoung
1948 1.24 dyoung static int
1949 1.1 bouyer mfi_create_sensors(struct mfi_softc *sc)
1950 1.1 bouyer {
1951 1.13 xtraeme int i;
1952 1.4 bouyer int nsensors = sc->sc_ld_cnt;
1953 1.1 bouyer
1954 1.11 xtraeme sc->sc_sme = sysmon_envsys_create();
1955 1.11 xtraeme sc->sc_sensor = malloc(sizeof(envsys_data_t) * nsensors,
1956 1.11 xtraeme M_DEVBUF, M_NOWAIT | M_ZERO);
1957 1.11 xtraeme if (sc->sc_sensor == NULL) {
1958 1.11 xtraeme aprint_error("%s: can't allocate envsys_data_t\n",
1959 1.4 bouyer DEVNAME(sc));
1960 1.13 xtraeme return ENOMEM;
1961 1.4 bouyer }
1962 1.6 xtraeme
1963 1.4 bouyer for (i = 0; i < nsensors; i++) {
1964 1.11 xtraeme sc->sc_sensor[i].units = ENVSYS_DRIVE;
1965 1.11 xtraeme sc->sc_sensor[i].monitor = true;
1966 1.6 xtraeme /* Enable monitoring for drive state changes */
1967 1.11 xtraeme sc->sc_sensor[i].flags |= ENVSYS_FMONSTCHANGED;
1968 1.4 bouyer /* logical drives */
1969 1.11 xtraeme snprintf(sc->sc_sensor[i].desc,
1970 1.11 xtraeme sizeof(sc->sc_sensor[i].desc), "%s:%d",
1971 1.4 bouyer DEVNAME(sc), i);
1972 1.11 xtraeme if (sysmon_envsys_sensor_attach(sc->sc_sme,
1973 1.11 xtraeme &sc->sc_sensor[i]))
1974 1.11 xtraeme goto out;
1975 1.4 bouyer }
1976 1.6 xtraeme
1977 1.11 xtraeme sc->sc_sme->sme_name = DEVNAME(sc);
1978 1.11 xtraeme sc->sc_sme->sme_cookie = sc;
1979 1.11 xtraeme sc->sc_sme->sme_refresh = mfi_sensor_refresh;
1980 1.11 xtraeme if (sysmon_envsys_register(sc->sc_sme)) {
1981 1.13 xtraeme aprint_error("%s: unable to register with sysmon\n",
1982 1.13 xtraeme DEVNAME(sc));
1983 1.11 xtraeme goto out;
1984 1.1 bouyer }
1985 1.13 xtraeme return 0;
1986 1.11 xtraeme
1987 1.11 xtraeme out:
1988 1.11 xtraeme free(sc->sc_sensor, M_DEVBUF);
1989 1.11 xtraeme sysmon_envsys_destroy(sc->sc_sme);
1990 1.11 xtraeme return EINVAL;
1991 1.1 bouyer }
1992 1.1 bouyer
1993 1.13 xtraeme static void
1994 1.11 xtraeme mfi_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *edata)
1995 1.1 bouyer {
1996 1.4 bouyer struct mfi_softc *sc = sme->sme_cookie;
1997 1.1 bouyer struct bioc_vol bv;
1998 1.4 bouyer int s;
1999 1.1 bouyer
2000 1.6 xtraeme if (edata->sensor >= sc->sc_ld_cnt)
2001 1.11 xtraeme return;
2002 1.1 bouyer
2003 1.22 cegger memset(&bv, 0, sizeof(bv));
2004 1.6 xtraeme bv.bv_volid = edata->sensor;
2005 1.4 bouyer s = splbio();
2006 1.4 bouyer if (mfi_ioctl_vol(sc, &bv)) {
2007 1.4 bouyer splx(s);
2008 1.11 xtraeme return;
2009 1.4 bouyer }
2010 1.4 bouyer splx(s);
2011 1.1 bouyer
2012 1.4 bouyer switch(bv.bv_status) {
2013 1.4 bouyer case BIOC_SVOFFLINE:
2014 1.6 xtraeme edata->value_cur = ENVSYS_DRIVE_FAIL;
2015 1.6 xtraeme edata->state = ENVSYS_SCRITICAL;
2016 1.4 bouyer break;
2017 1.1 bouyer
2018 1.4 bouyer case BIOC_SVDEGRADED:
2019 1.6 xtraeme edata->value_cur = ENVSYS_DRIVE_PFAIL;
2020 1.6 xtraeme edata->state = ENVSYS_SCRITICAL;
2021 1.4 bouyer break;
2022 1.1 bouyer
2023 1.4 bouyer case BIOC_SVSCRUB:
2024 1.4 bouyer case BIOC_SVONLINE:
2025 1.6 xtraeme edata->value_cur = ENVSYS_DRIVE_ONLINE;
2026 1.6 xtraeme edata->state = ENVSYS_SVALID;
2027 1.4 bouyer break;
2028 1.1 bouyer
2029 1.4 bouyer case BIOC_SVINVALID:
2030 1.4 bouyer /* FALLTRHOUGH */
2031 1.4 bouyer default:
2032 1.6 xtraeme edata->value_cur = 0; /* unknown */
2033 1.6 xtraeme edata->state = ENVSYS_SINVALID;
2034 1.1 bouyer }
2035 1.4 bouyer }
2036 1.4 bouyer
2037 1.1 bouyer #endif /* NBIO > 0 */
2038 1.12 xtraeme
2039 1.13 xtraeme static uint32_t
2040 1.12 xtraeme mfi_xscale_fw_state(struct mfi_softc *sc)
2041 1.12 xtraeme {
2042 1.12 xtraeme return mfi_read(sc, MFI_OMSG0);
2043 1.12 xtraeme }
2044 1.12 xtraeme
2045 1.13 xtraeme static void
2046 1.24 dyoung mfi_xscale_intr_dis(struct mfi_softc *sc)
2047 1.24 dyoung {
2048 1.24 dyoung mfi_write(sc, MFI_OMSK, 0);
2049 1.24 dyoung }
2050 1.24 dyoung
2051 1.24 dyoung static void
2052 1.12 xtraeme mfi_xscale_intr_ena(struct mfi_softc *sc)
2053 1.12 xtraeme {
2054 1.12 xtraeme mfi_write(sc, MFI_OMSK, MFI_ENABLE_INTR);
2055 1.12 xtraeme }
2056 1.12 xtraeme
2057 1.13 xtraeme static int
2058 1.12 xtraeme mfi_xscale_intr(struct mfi_softc *sc)
2059 1.12 xtraeme {
2060 1.12 xtraeme uint32_t status;
2061 1.12 xtraeme
2062 1.12 xtraeme status = mfi_read(sc, MFI_OSTS);
2063 1.12 xtraeme if (!ISSET(status, MFI_OSTS_INTR_VALID))
2064 1.12 xtraeme return 0;
2065 1.12 xtraeme
2066 1.12 xtraeme /* write status back to acknowledge interrupt */
2067 1.12 xtraeme mfi_write(sc, MFI_OSTS, status);
2068 1.12 xtraeme return 1;
2069 1.12 xtraeme }
2070 1.12 xtraeme
2071 1.13 xtraeme static void
2072 1.12 xtraeme mfi_xscale_post(struct mfi_softc *sc, struct mfi_ccb *ccb)
2073 1.12 xtraeme {
2074 1.14 xtraeme bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames),
2075 1.14 xtraeme ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames),
2076 1.14 xtraeme sc->sc_frames_size, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2077 1.14 xtraeme bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_sense),
2078 1.14 xtraeme ccb->ccb_psense - MFIMEM_DVA(sc->sc_sense),
2079 1.14 xtraeme MFI_SENSE_SIZE, BUS_DMASYNC_PREREAD);
2080 1.14 xtraeme
2081 1.12 xtraeme mfi_write(sc, MFI_IQP, (ccb->ccb_pframe >> 3) |
2082 1.12 xtraeme ccb->ccb_extra_frames);
2083 1.12 xtraeme }
2084 1.12 xtraeme
2085 1.13 xtraeme static uint32_t
2086 1.12 xtraeme mfi_ppc_fw_state(struct mfi_softc *sc)
2087 1.12 xtraeme {
2088 1.12 xtraeme return mfi_read(sc, MFI_OSP);
2089 1.12 xtraeme }
2090 1.12 xtraeme
2091 1.13 xtraeme static void
2092 1.24 dyoung mfi_ppc_intr_dis(struct mfi_softc *sc)
2093 1.24 dyoung {
2094 1.24 dyoung /* Taking a wild guess --dyoung */
2095 1.24 dyoung mfi_write(sc, MFI_OMSK, ~(uint32_t)0x0);
2096 1.24 dyoung mfi_write(sc, MFI_ODC, 0xffffffff);
2097 1.24 dyoung }
2098 1.24 dyoung
2099 1.24 dyoung static void
2100 1.12 xtraeme mfi_ppc_intr_ena(struct mfi_softc *sc)
2101 1.12 xtraeme {
2102 1.12 xtraeme mfi_write(sc, MFI_ODC, 0xffffffff);
2103 1.12 xtraeme mfi_write(sc, MFI_OMSK, ~0x80000004);
2104 1.12 xtraeme }
2105 1.12 xtraeme
2106 1.13 xtraeme static int
2107 1.12 xtraeme mfi_ppc_intr(struct mfi_softc *sc)
2108 1.12 xtraeme {
2109 1.12 xtraeme uint32_t status;
2110 1.12 xtraeme
2111 1.12 xtraeme status = mfi_read(sc, MFI_OSTS);
2112 1.12 xtraeme if (!ISSET(status, MFI_OSTS_PPC_INTR_VALID))
2113 1.12 xtraeme return 0;
2114 1.12 xtraeme
2115 1.12 xtraeme /* write status back to acknowledge interrupt */
2116 1.12 xtraeme mfi_write(sc, MFI_ODC, status);
2117 1.12 xtraeme return 1;
2118 1.12 xtraeme }
2119 1.12 xtraeme
2120 1.13 xtraeme static void
2121 1.12 xtraeme mfi_ppc_post(struct mfi_softc *sc, struct mfi_ccb *ccb)
2122 1.12 xtraeme {
2123 1.12 xtraeme mfi_write(sc, MFI_IQP, 0x1 | ccb->ccb_pframe |
2124 1.12 xtraeme (ccb->ccb_extra_frames << 1));
2125 1.12 xtraeme }
2126