mfi.c revision 1.41 1 1.41 bouyer /* $NetBSD: mfi.c,v 1.41 2012/08/05 17:23:25 bouyer Exp $ */
2 1.1 bouyer /* $OpenBSD: mfi.c,v 1.66 2006/11/28 23:59:45 dlg Exp $ */
3 1.1 bouyer /*
4 1.1 bouyer * Copyright (c) 2006 Marco Peereboom <marco (at) peereboom.us>
5 1.1 bouyer *
6 1.1 bouyer * Permission to use, copy, modify, and distribute this software for any
7 1.1 bouyer * purpose with or without fee is hereby granted, provided that the above
8 1.1 bouyer * copyright notice and this permission notice appear in all copies.
9 1.1 bouyer *
10 1.1 bouyer * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 1.1 bouyer * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 1.1 bouyer * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 1.1 bouyer * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 1.1 bouyer * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 1.1 bouyer * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 1.1 bouyer * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 1.1 bouyer */
18 1.1 bouyer
19 1.2 bouyer #include <sys/cdefs.h>
20 1.41 bouyer __KERNEL_RCSID(0, "$NetBSD: mfi.c,v 1.41 2012/08/05 17:23:25 bouyer Exp $");
21 1.2 bouyer
22 1.4 bouyer #include "bio.h"
23 1.1 bouyer
24 1.1 bouyer #include <sys/param.h>
25 1.1 bouyer #include <sys/systm.h>
26 1.1 bouyer #include <sys/buf.h>
27 1.1 bouyer #include <sys/ioctl.h>
28 1.1 bouyer #include <sys/device.h>
29 1.1 bouyer #include <sys/kernel.h>
30 1.1 bouyer #include <sys/malloc.h>
31 1.1 bouyer #include <sys/proc.h>
32 1.1 bouyer
33 1.1 bouyer #include <uvm/uvm_param.h>
34 1.1 bouyer
35 1.10 ad #include <sys/bus.h>
36 1.1 bouyer
37 1.1 bouyer #include <dev/scsipi/scsipi_all.h>
38 1.1 bouyer #include <dev/scsipi/scsi_all.h>
39 1.1 bouyer #include <dev/scsipi/scsi_spc.h>
40 1.1 bouyer #include <dev/scsipi/scsipi_disk.h>
41 1.1 bouyer #include <dev/scsipi/scsi_disk.h>
42 1.1 bouyer #include <dev/scsipi/scsiconf.h>
43 1.1 bouyer
44 1.1 bouyer #include <dev/ic/mfireg.h>
45 1.1 bouyer #include <dev/ic/mfivar.h>
46 1.1 bouyer
47 1.1 bouyer #if NBIO > 0
48 1.1 bouyer #include <dev/biovar.h>
49 1.1 bouyer #endif /* NBIO > 0 */
50 1.1 bouyer
51 1.1 bouyer #ifdef MFI_DEBUG
52 1.1 bouyer uint32_t mfi_debug = 0
53 1.1 bouyer /* | MFI_D_CMD */
54 1.1 bouyer /* | MFI_D_INTR */
55 1.1 bouyer /* | MFI_D_MISC */
56 1.1 bouyer /* | MFI_D_DMA */
57 1.1 bouyer | MFI_D_IOCTL
58 1.1 bouyer /* | MFI_D_RW */
59 1.1 bouyer /* | MFI_D_MEM */
60 1.1 bouyer /* | MFI_D_CCB */
61 1.1 bouyer ;
62 1.1 bouyer #endif
63 1.1 bouyer
64 1.13 xtraeme static void mfi_scsipi_request(struct scsipi_channel *,
65 1.13 xtraeme scsipi_adapter_req_t, void *);
66 1.13 xtraeme static void mfiminphys(struct buf *bp);
67 1.13 xtraeme
68 1.13 xtraeme static struct mfi_ccb *mfi_get_ccb(struct mfi_softc *);
69 1.13 xtraeme static void mfi_put_ccb(struct mfi_ccb *);
70 1.13 xtraeme static int mfi_init_ccb(struct mfi_softc *);
71 1.13 xtraeme
72 1.13 xtraeme static struct mfi_mem *mfi_allocmem(struct mfi_softc *, size_t);
73 1.27 dyoung static void mfi_freemem(struct mfi_softc *, struct mfi_mem **);
74 1.13 xtraeme
75 1.13 xtraeme static int mfi_transition_firmware(struct mfi_softc *);
76 1.13 xtraeme static int mfi_initialize_firmware(struct mfi_softc *);
77 1.13 xtraeme static int mfi_get_info(struct mfi_softc *);
78 1.13 xtraeme static uint32_t mfi_read(struct mfi_softc *, bus_size_t);
79 1.13 xtraeme static void mfi_write(struct mfi_softc *, bus_size_t, uint32_t);
80 1.13 xtraeme static int mfi_poll(struct mfi_ccb *);
81 1.13 xtraeme static int mfi_create_sgl(struct mfi_ccb *, int);
82 1.1 bouyer
83 1.1 bouyer /* commands */
84 1.13 xtraeme static int mfi_scsi_ld(struct mfi_ccb *, struct scsipi_xfer *);
85 1.13 xtraeme static int mfi_scsi_io(struct mfi_ccb *, struct scsipi_xfer *,
86 1.13 xtraeme uint32_t, uint32_t);
87 1.13 xtraeme static void mfi_scsi_xs_done(struct mfi_ccb *);
88 1.19 bouyer static int mfi_mgmt_internal(struct mfi_softc *,
89 1.19 bouyer uint32_t, uint32_t, uint32_t, void *, uint8_t *);
90 1.19 bouyer static int mfi_mgmt(struct mfi_ccb *,struct scsipi_xfer *,
91 1.19 bouyer uint32_t, uint32_t, uint32_t, void *, uint8_t *);
92 1.13 xtraeme static void mfi_mgmt_done(struct mfi_ccb *);
93 1.1 bouyer
94 1.1 bouyer #if NBIO > 0
95 1.23 cegger static int mfi_ioctl(device_t, u_long, void *);
96 1.13 xtraeme static int mfi_ioctl_inq(struct mfi_softc *, struct bioc_inq *);
97 1.13 xtraeme static int mfi_ioctl_vol(struct mfi_softc *, struct bioc_vol *);
98 1.13 xtraeme static int mfi_ioctl_disk(struct mfi_softc *, struct bioc_disk *);
99 1.13 xtraeme static int mfi_ioctl_alarm(struct mfi_softc *,
100 1.13 xtraeme struct bioc_alarm *);
101 1.13 xtraeme static int mfi_ioctl_blink(struct mfi_softc *sc,
102 1.13 xtraeme struct bioc_blink *);
103 1.13 xtraeme static int mfi_ioctl_setstate(struct mfi_softc *,
104 1.13 xtraeme struct bioc_setstate *);
105 1.13 xtraeme static int mfi_bio_hs(struct mfi_softc *, int, int, void *);
106 1.13 xtraeme static int mfi_create_sensors(struct mfi_softc *);
107 1.24 dyoung static int mfi_destroy_sensors(struct mfi_softc *);
108 1.13 xtraeme static void mfi_sensor_refresh(struct sysmon_envsys *,
109 1.13 xtraeme envsys_data_t *);
110 1.1 bouyer #endif /* NBIO > 0 */
111 1.1 bouyer
112 1.13 xtraeme static uint32_t mfi_xscale_fw_state(struct mfi_softc *sc);
113 1.13 xtraeme static void mfi_xscale_intr_ena(struct mfi_softc *sc);
114 1.24 dyoung static void mfi_xscale_intr_dis(struct mfi_softc *sc);
115 1.13 xtraeme static int mfi_xscale_intr(struct mfi_softc *sc);
116 1.13 xtraeme static void mfi_xscale_post(struct mfi_softc *sc, struct mfi_ccb *ccb);
117 1.30 dyoung
118 1.12 xtraeme static const struct mfi_iop_ops mfi_iop_xscale = {
119 1.12 xtraeme mfi_xscale_fw_state,
120 1.24 dyoung mfi_xscale_intr_dis,
121 1.12 xtraeme mfi_xscale_intr_ena,
122 1.12 xtraeme mfi_xscale_intr,
123 1.12 xtraeme mfi_xscale_post
124 1.12 xtraeme };
125 1.30 dyoung
126 1.13 xtraeme static uint32_t mfi_ppc_fw_state(struct mfi_softc *sc);
127 1.13 xtraeme static void mfi_ppc_intr_ena(struct mfi_softc *sc);
128 1.24 dyoung static void mfi_ppc_intr_dis(struct mfi_softc *sc);
129 1.13 xtraeme static int mfi_ppc_intr(struct mfi_softc *sc);
130 1.13 xtraeme static void mfi_ppc_post(struct mfi_softc *sc, struct mfi_ccb *ccb);
131 1.30 dyoung
132 1.12 xtraeme static const struct mfi_iop_ops mfi_iop_ppc = {
133 1.12 xtraeme mfi_ppc_fw_state,
134 1.24 dyoung mfi_ppc_intr_dis,
135 1.12 xtraeme mfi_ppc_intr_ena,
136 1.12 xtraeme mfi_ppc_intr,
137 1.12 xtraeme mfi_ppc_post
138 1.12 xtraeme };
139 1.30 dyoung
140 1.33 msaitoh uint32_t mfi_gen2_fw_state(struct mfi_softc *sc);
141 1.33 msaitoh void mfi_gen2_intr_ena(struct mfi_softc *sc);
142 1.33 msaitoh void mfi_gen2_intr_dis(struct mfi_softc *sc);
143 1.33 msaitoh int mfi_gen2_intr(struct mfi_softc *sc);
144 1.33 msaitoh void mfi_gen2_post(struct mfi_softc *sc, struct mfi_ccb *ccb);
145 1.33 msaitoh
146 1.33 msaitoh static const struct mfi_iop_ops mfi_iop_gen2 = {
147 1.33 msaitoh mfi_gen2_fw_state,
148 1.33 msaitoh mfi_gen2_intr_dis,
149 1.33 msaitoh mfi_gen2_intr_ena,
150 1.33 msaitoh mfi_gen2_intr,
151 1.33 msaitoh mfi_gen2_post
152 1.33 msaitoh };
153 1.33 msaitoh
154 1.38 sborrill u_int32_t mfi_skinny_fw_state(struct mfi_softc *);
155 1.38 sborrill void mfi_skinny_intr_dis(struct mfi_softc *);
156 1.38 sborrill void mfi_skinny_intr_ena(struct mfi_softc *);
157 1.38 sborrill int mfi_skinny_intr(struct mfi_softc *);
158 1.38 sborrill void mfi_skinny_post(struct mfi_softc *, struct mfi_ccb *);
159 1.38 sborrill
160 1.38 sborrill static const struct mfi_iop_ops mfi_iop_skinny = {
161 1.38 sborrill mfi_skinny_fw_state,
162 1.38 sborrill mfi_skinny_intr_dis,
163 1.38 sborrill mfi_skinny_intr_ena,
164 1.38 sborrill mfi_skinny_intr,
165 1.38 sborrill mfi_skinny_post
166 1.38 sborrill };
167 1.38 sborrill
168 1.12 xtraeme #define mfi_fw_state(_s) ((_s)->sc_iop->mio_fw_state(_s))
169 1.12 xtraeme #define mfi_intr_enable(_s) ((_s)->sc_iop->mio_intr_ena(_s))
170 1.24 dyoung #define mfi_intr_disable(_s) ((_s)->sc_iop->mio_intr_dis(_s))
171 1.12 xtraeme #define mfi_my_intr(_s) ((_s)->sc_iop->mio_intr(_s))
172 1.12 xtraeme #define mfi_post(_s, _c) ((_s)->sc_iop->mio_post((_s), (_c)))
173 1.12 xtraeme
174 1.13 xtraeme static struct mfi_ccb *
175 1.1 bouyer mfi_get_ccb(struct mfi_softc *sc)
176 1.1 bouyer {
177 1.1 bouyer struct mfi_ccb *ccb;
178 1.1 bouyer int s;
179 1.1 bouyer
180 1.1 bouyer s = splbio();
181 1.1 bouyer ccb = TAILQ_FIRST(&sc->sc_ccb_freeq);
182 1.1 bouyer if (ccb) {
183 1.1 bouyer TAILQ_REMOVE(&sc->sc_ccb_freeq, ccb, ccb_link);
184 1.1 bouyer ccb->ccb_state = MFI_CCB_READY;
185 1.1 bouyer }
186 1.1 bouyer splx(s);
187 1.1 bouyer
188 1.1 bouyer DNPRINTF(MFI_D_CCB, "%s: mfi_get_ccb: %p\n", DEVNAME(sc), ccb);
189 1.1 bouyer
190 1.13 xtraeme return ccb;
191 1.1 bouyer }
192 1.1 bouyer
193 1.13 xtraeme static void
194 1.1 bouyer mfi_put_ccb(struct mfi_ccb *ccb)
195 1.1 bouyer {
196 1.1 bouyer struct mfi_softc *sc = ccb->ccb_sc;
197 1.37 sborrill struct mfi_frame_header *hdr = &ccb->ccb_frame->mfr_header;
198 1.1 bouyer int s;
199 1.1 bouyer
200 1.1 bouyer DNPRINTF(MFI_D_CCB, "%s: mfi_put_ccb: %p\n", DEVNAME(sc), ccb);
201 1.1 bouyer
202 1.37 sborrill hdr->mfh_cmd_status = 0x0;
203 1.37 sborrill hdr->mfh_flags = 0x0;
204 1.1 bouyer ccb->ccb_state = MFI_CCB_FREE;
205 1.1 bouyer ccb->ccb_xs = NULL;
206 1.1 bouyer ccb->ccb_flags = 0;
207 1.1 bouyer ccb->ccb_done = NULL;
208 1.1 bouyer ccb->ccb_direction = 0;
209 1.1 bouyer ccb->ccb_frame_size = 0;
210 1.1 bouyer ccb->ccb_extra_frames = 0;
211 1.1 bouyer ccb->ccb_sgl = NULL;
212 1.1 bouyer ccb->ccb_data = NULL;
213 1.1 bouyer ccb->ccb_len = 0;
214 1.37 sborrill
215 1.37 sborrill s = splbio();
216 1.1 bouyer TAILQ_INSERT_TAIL(&sc->sc_ccb_freeq, ccb, ccb_link);
217 1.1 bouyer splx(s);
218 1.1 bouyer }
219 1.1 bouyer
220 1.13 xtraeme static int
221 1.24 dyoung mfi_destroy_ccb(struct mfi_softc *sc)
222 1.24 dyoung {
223 1.24 dyoung struct mfi_ccb *ccb;
224 1.24 dyoung uint32_t i;
225 1.24 dyoung
226 1.24 dyoung DNPRINTF(MFI_D_CCB, "%s: mfi_init_ccb\n", DEVNAME(sc));
227 1.24 dyoung
228 1.24 dyoung
229 1.24 dyoung for (i = 0; (ccb = mfi_get_ccb(sc)) != NULL; i++) {
230 1.24 dyoung /* create a dma map for transfer */
231 1.24 dyoung bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap);
232 1.24 dyoung }
233 1.24 dyoung
234 1.24 dyoung if (i < sc->sc_max_cmds)
235 1.24 dyoung return EBUSY;
236 1.24 dyoung
237 1.24 dyoung free(sc->sc_ccb, M_DEVBUF);
238 1.24 dyoung
239 1.24 dyoung return 0;
240 1.24 dyoung }
241 1.24 dyoung
242 1.24 dyoung static int
243 1.1 bouyer mfi_init_ccb(struct mfi_softc *sc)
244 1.1 bouyer {
245 1.1 bouyer struct mfi_ccb *ccb;
246 1.1 bouyer uint32_t i;
247 1.1 bouyer int error;
248 1.1 bouyer
249 1.1 bouyer DNPRINTF(MFI_D_CCB, "%s: mfi_init_ccb\n", DEVNAME(sc));
250 1.1 bouyer
251 1.1 bouyer sc->sc_ccb = malloc(sizeof(struct mfi_ccb) * sc->sc_max_cmds,
252 1.13 xtraeme M_DEVBUF, M_WAITOK|M_ZERO);
253 1.1 bouyer
254 1.1 bouyer for (i = 0; i < sc->sc_max_cmds; i++) {
255 1.1 bouyer ccb = &sc->sc_ccb[i];
256 1.1 bouyer
257 1.1 bouyer ccb->ccb_sc = sc;
258 1.1 bouyer
259 1.1 bouyer /* select i'th frame */
260 1.1 bouyer ccb->ccb_frame = (union mfi_frame *)
261 1.1 bouyer ((char*)MFIMEM_KVA(sc->sc_frames) + sc->sc_frames_size * i);
262 1.1 bouyer ccb->ccb_pframe =
263 1.1 bouyer MFIMEM_DVA(sc->sc_frames) + sc->sc_frames_size * i;
264 1.1 bouyer ccb->ccb_frame->mfr_header.mfh_context = i;
265 1.1 bouyer
266 1.1 bouyer /* select i'th sense */
267 1.1 bouyer ccb->ccb_sense = (struct mfi_sense *)
268 1.1 bouyer ((char*)MFIMEM_KVA(sc->sc_sense) + MFI_SENSE_SIZE * i);
269 1.1 bouyer ccb->ccb_psense =
270 1.1 bouyer (MFIMEM_DVA(sc->sc_sense) + MFI_SENSE_SIZE * i);
271 1.1 bouyer
272 1.1 bouyer /* create a dma map for transfer */
273 1.1 bouyer error = bus_dmamap_create(sc->sc_dmat,
274 1.1 bouyer MAXPHYS, sc->sc_max_sgl, MAXPHYS, 0,
275 1.1 bouyer BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->ccb_dmamap);
276 1.1 bouyer if (error) {
277 1.1 bouyer printf("%s: cannot create ccb dmamap (%d)\n",
278 1.1 bouyer DEVNAME(sc), error);
279 1.1 bouyer goto destroy;
280 1.1 bouyer }
281 1.1 bouyer
282 1.1 bouyer DNPRINTF(MFI_D_CCB,
283 1.4 bouyer "ccb(%d): %p frame: %#lx (%#lx) sense: %#lx (%#lx) map: %#lx\n",
284 1.1 bouyer ccb->ccb_frame->mfr_header.mfh_context, ccb,
285 1.4 bouyer (u_long)ccb->ccb_frame, (u_long)ccb->ccb_pframe,
286 1.4 bouyer (u_long)ccb->ccb_sense, (u_long)ccb->ccb_psense,
287 1.4 bouyer (u_long)ccb->ccb_dmamap);
288 1.1 bouyer
289 1.1 bouyer /* add ccb to queue */
290 1.1 bouyer mfi_put_ccb(ccb);
291 1.1 bouyer }
292 1.1 bouyer
293 1.13 xtraeme return 0;
294 1.1 bouyer destroy:
295 1.1 bouyer /* free dma maps and ccb memory */
296 1.17 cegger while (i) {
297 1.17 cegger i--;
298 1.1 bouyer ccb = &sc->sc_ccb[i];
299 1.1 bouyer bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap);
300 1.1 bouyer }
301 1.1 bouyer
302 1.1 bouyer free(sc->sc_ccb, M_DEVBUF);
303 1.1 bouyer
304 1.13 xtraeme return 1;
305 1.1 bouyer }
306 1.1 bouyer
307 1.13 xtraeme static uint32_t
308 1.1 bouyer mfi_read(struct mfi_softc *sc, bus_size_t r)
309 1.1 bouyer {
310 1.1 bouyer uint32_t rv;
311 1.1 bouyer
312 1.1 bouyer bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
313 1.1 bouyer BUS_SPACE_BARRIER_READ);
314 1.1 bouyer rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, r);
315 1.1 bouyer
316 1.4 bouyer DNPRINTF(MFI_D_RW, "%s: mr 0x%lx 0x08%x ", DEVNAME(sc), (u_long)r, rv);
317 1.13 xtraeme return rv;
318 1.1 bouyer }
319 1.1 bouyer
320 1.13 xtraeme static void
321 1.1 bouyer mfi_write(struct mfi_softc *sc, bus_size_t r, uint32_t v)
322 1.1 bouyer {
323 1.4 bouyer DNPRINTF(MFI_D_RW, "%s: mw 0x%lx 0x%08x", DEVNAME(sc), (u_long)r, v);
324 1.1 bouyer
325 1.1 bouyer bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
326 1.1 bouyer bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
327 1.1 bouyer BUS_SPACE_BARRIER_WRITE);
328 1.1 bouyer }
329 1.1 bouyer
330 1.13 xtraeme static struct mfi_mem *
331 1.1 bouyer mfi_allocmem(struct mfi_softc *sc, size_t size)
332 1.1 bouyer {
333 1.1 bouyer struct mfi_mem *mm;
334 1.1 bouyer int nsegs;
335 1.1 bouyer
336 1.4 bouyer DNPRINTF(MFI_D_MEM, "%s: mfi_allocmem: %ld\n", DEVNAME(sc),
337 1.4 bouyer (long)size);
338 1.1 bouyer
339 1.13 xtraeme mm = malloc(sizeof(struct mfi_mem), M_DEVBUF, M_NOWAIT|M_ZERO);
340 1.1 bouyer if (mm == NULL)
341 1.13 xtraeme return NULL;
342 1.1 bouyer
343 1.1 bouyer mm->am_size = size;
344 1.1 bouyer
345 1.1 bouyer if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
346 1.1 bouyer BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &mm->am_map) != 0)
347 1.30 dyoung goto amfree;
348 1.1 bouyer
349 1.1 bouyer if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &mm->am_seg, 1,
350 1.1 bouyer &nsegs, BUS_DMA_NOWAIT) != 0)
351 1.1 bouyer goto destroy;
352 1.1 bouyer
353 1.1 bouyer if (bus_dmamem_map(sc->sc_dmat, &mm->am_seg, nsegs, size, &mm->am_kva,
354 1.1 bouyer BUS_DMA_NOWAIT) != 0)
355 1.1 bouyer goto free;
356 1.1 bouyer
357 1.1 bouyer if (bus_dmamap_load(sc->sc_dmat, mm->am_map, mm->am_kva, size, NULL,
358 1.1 bouyer BUS_DMA_NOWAIT) != 0)
359 1.1 bouyer goto unmap;
360 1.1 bouyer
361 1.1 bouyer DNPRINTF(MFI_D_MEM, " kva: %p dva: %p map: %p\n",
362 1.4 bouyer mm->am_kva, (void *)mm->am_map->dm_segs[0].ds_addr, mm->am_map);
363 1.1 bouyer
364 1.1 bouyer memset(mm->am_kva, 0, size);
365 1.13 xtraeme return mm;
366 1.1 bouyer
367 1.1 bouyer unmap:
368 1.1 bouyer bus_dmamem_unmap(sc->sc_dmat, mm->am_kva, size);
369 1.1 bouyer free:
370 1.1 bouyer bus_dmamem_free(sc->sc_dmat, &mm->am_seg, 1);
371 1.1 bouyer destroy:
372 1.1 bouyer bus_dmamap_destroy(sc->sc_dmat, mm->am_map);
373 1.1 bouyer amfree:
374 1.1 bouyer free(mm, M_DEVBUF);
375 1.1 bouyer
376 1.13 xtraeme return NULL;
377 1.1 bouyer }
378 1.1 bouyer
379 1.13 xtraeme static void
380 1.27 dyoung mfi_freemem(struct mfi_softc *sc, struct mfi_mem **mmp)
381 1.1 bouyer {
382 1.27 dyoung struct mfi_mem *mm = *mmp;
383 1.27 dyoung
384 1.27 dyoung if (mm == NULL)
385 1.27 dyoung return;
386 1.27 dyoung
387 1.27 dyoung *mmp = NULL;
388 1.27 dyoung
389 1.1 bouyer DNPRINTF(MFI_D_MEM, "%s: mfi_freemem: %p\n", DEVNAME(sc), mm);
390 1.1 bouyer
391 1.1 bouyer bus_dmamap_unload(sc->sc_dmat, mm->am_map);
392 1.1 bouyer bus_dmamem_unmap(sc->sc_dmat, mm->am_kva, mm->am_size);
393 1.1 bouyer bus_dmamem_free(sc->sc_dmat, &mm->am_seg, 1);
394 1.1 bouyer bus_dmamap_destroy(sc->sc_dmat, mm->am_map);
395 1.1 bouyer free(mm, M_DEVBUF);
396 1.1 bouyer }
397 1.1 bouyer
398 1.13 xtraeme static int
399 1.1 bouyer mfi_transition_firmware(struct mfi_softc *sc)
400 1.1 bouyer {
401 1.18 gmcgarry uint32_t fw_state, cur_state;
402 1.1 bouyer int max_wait, i;
403 1.1 bouyer
404 1.12 xtraeme fw_state = mfi_fw_state(sc) & MFI_STATE_MASK;
405 1.1 bouyer
406 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: mfi_transition_firmware: %#x\n", DEVNAME(sc),
407 1.1 bouyer fw_state);
408 1.1 bouyer
409 1.1 bouyer while (fw_state != MFI_STATE_READY) {
410 1.1 bouyer DNPRINTF(MFI_D_MISC,
411 1.1 bouyer "%s: waiting for firmware to become ready\n",
412 1.1 bouyer DEVNAME(sc));
413 1.1 bouyer cur_state = fw_state;
414 1.1 bouyer switch (fw_state) {
415 1.1 bouyer case MFI_STATE_FAULT:
416 1.1 bouyer printf("%s: firmware fault\n", DEVNAME(sc));
417 1.13 xtraeme return 1;
418 1.1 bouyer case MFI_STATE_WAIT_HANDSHAKE:
419 1.40 bouyer if (sc->sc_ioptype == MFI_IOP_SKINNY)
420 1.38 sborrill mfi_write(sc, MFI_SKINNY_IDB, MFI_INIT_CLEAR_HANDSHAKE);
421 1.38 sborrill else
422 1.38 sborrill mfi_write(sc, MFI_IDB, MFI_INIT_CLEAR_HANDSHAKE);
423 1.1 bouyer max_wait = 2;
424 1.1 bouyer break;
425 1.1 bouyer case MFI_STATE_OPERATIONAL:
426 1.40 bouyer if (sc->sc_ioptype == MFI_IOP_SKINNY)
427 1.38 sborrill mfi_write(sc, MFI_SKINNY_IDB, MFI_INIT_READY);
428 1.38 sborrill else
429 1.38 sborrill mfi_write(sc, MFI_IDB, MFI_INIT_READY);
430 1.1 bouyer max_wait = 10;
431 1.1 bouyer break;
432 1.1 bouyer case MFI_STATE_UNDEFINED:
433 1.1 bouyer case MFI_STATE_BB_INIT:
434 1.1 bouyer max_wait = 2;
435 1.1 bouyer break;
436 1.1 bouyer case MFI_STATE_FW_INIT:
437 1.1 bouyer case MFI_STATE_DEVICE_SCAN:
438 1.1 bouyer case MFI_STATE_FLUSH_CACHE:
439 1.1 bouyer max_wait = 20;
440 1.1 bouyer break;
441 1.1 bouyer default:
442 1.1 bouyer printf("%s: unknown firmware state %d\n",
443 1.1 bouyer DEVNAME(sc), fw_state);
444 1.13 xtraeme return 1;
445 1.1 bouyer }
446 1.1 bouyer for (i = 0; i < (max_wait * 10); i++) {
447 1.12 xtraeme fw_state = mfi_fw_state(sc) & MFI_STATE_MASK;
448 1.1 bouyer if (fw_state == cur_state)
449 1.1 bouyer DELAY(100000);
450 1.1 bouyer else
451 1.1 bouyer break;
452 1.1 bouyer }
453 1.1 bouyer if (fw_state == cur_state) {
454 1.1 bouyer printf("%s: firmware stuck in state %#x\n",
455 1.1 bouyer DEVNAME(sc), fw_state);
456 1.13 xtraeme return 1;
457 1.1 bouyer }
458 1.1 bouyer }
459 1.1 bouyer
460 1.13 xtraeme return 0;
461 1.1 bouyer }
462 1.1 bouyer
463 1.13 xtraeme static int
464 1.1 bouyer mfi_initialize_firmware(struct mfi_softc *sc)
465 1.1 bouyer {
466 1.1 bouyer struct mfi_ccb *ccb;
467 1.1 bouyer struct mfi_init_frame *init;
468 1.1 bouyer struct mfi_init_qinfo *qinfo;
469 1.1 bouyer
470 1.1 bouyer DNPRINTF(MFI_D_MISC, "%s: mfi_initialize_firmware\n", DEVNAME(sc));
471 1.1 bouyer
472 1.1 bouyer if ((ccb = mfi_get_ccb(sc)) == NULL)
473 1.13 xtraeme return 1;
474 1.1 bouyer
475 1.1 bouyer init = &ccb->ccb_frame->mfr_init;
476 1.1 bouyer qinfo = (struct mfi_init_qinfo *)((uint8_t *)init + MFI_FRAME_SIZE);
477 1.1 bouyer
478 1.1 bouyer memset(qinfo, 0, sizeof *qinfo);
479 1.1 bouyer qinfo->miq_rq_entries = sc->sc_max_cmds + 1;
480 1.1 bouyer qinfo->miq_rq_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) +
481 1.1 bouyer offsetof(struct mfi_prod_cons, mpc_reply_q));
482 1.1 bouyer qinfo->miq_pi_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) +
483 1.1 bouyer offsetof(struct mfi_prod_cons, mpc_producer));
484 1.1 bouyer qinfo->miq_ci_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) +
485 1.1 bouyer offsetof(struct mfi_prod_cons, mpc_consumer));
486 1.1 bouyer
487 1.1 bouyer init->mif_header.mfh_cmd = MFI_CMD_INIT;
488 1.1 bouyer init->mif_header.mfh_data_len = sizeof *qinfo;
489 1.1 bouyer init->mif_qinfo_new_addr_lo = htole32(ccb->ccb_pframe + MFI_FRAME_SIZE);
490 1.1 bouyer
491 1.1 bouyer DNPRINTF(MFI_D_MISC, "%s: entries: %#x rq: %#x pi: %#x ci: %#x\n",
492 1.1 bouyer DEVNAME(sc),
493 1.1 bouyer qinfo->miq_rq_entries, qinfo->miq_rq_addr_lo,
494 1.1 bouyer qinfo->miq_pi_addr_lo, qinfo->miq_ci_addr_lo);
495 1.1 bouyer
496 1.1 bouyer if (mfi_poll(ccb)) {
497 1.1 bouyer printf("%s: mfi_initialize_firmware failed\n", DEVNAME(sc));
498 1.13 xtraeme return 1;
499 1.1 bouyer }
500 1.1 bouyer
501 1.1 bouyer mfi_put_ccb(ccb);
502 1.1 bouyer
503 1.13 xtraeme return 0;
504 1.1 bouyer }
505 1.1 bouyer
506 1.13 xtraeme static int
507 1.1 bouyer mfi_get_info(struct mfi_softc *sc)
508 1.1 bouyer {
509 1.1 bouyer #ifdef MFI_DEBUG
510 1.1 bouyer int i;
511 1.1 bouyer #endif
512 1.1 bouyer DNPRINTF(MFI_D_MISC, "%s: mfi_get_info\n", DEVNAME(sc));
513 1.1 bouyer
514 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_CTRL_GET_INFO, MFI_DATA_IN,
515 1.1 bouyer sizeof(sc->sc_info), &sc->sc_info, NULL))
516 1.13 xtraeme return 1;
517 1.1 bouyer
518 1.1 bouyer #ifdef MFI_DEBUG
519 1.1 bouyer
520 1.1 bouyer for (i = 0; i < sc->sc_info.mci_image_component_count; i++) {
521 1.1 bouyer printf("%s: active FW %s Version %s date %s time %s\n",
522 1.1 bouyer DEVNAME(sc),
523 1.1 bouyer sc->sc_info.mci_image_component[i].mic_name,
524 1.1 bouyer sc->sc_info.mci_image_component[i].mic_version,
525 1.1 bouyer sc->sc_info.mci_image_component[i].mic_build_date,
526 1.1 bouyer sc->sc_info.mci_image_component[i].mic_build_time);
527 1.1 bouyer }
528 1.1 bouyer
529 1.1 bouyer for (i = 0; i < sc->sc_info.mci_pending_image_component_count; i++) {
530 1.1 bouyer printf("%s: pending FW %s Version %s date %s time %s\n",
531 1.1 bouyer DEVNAME(sc),
532 1.1 bouyer sc->sc_info.mci_pending_image_component[i].mic_name,
533 1.1 bouyer sc->sc_info.mci_pending_image_component[i].mic_version,
534 1.1 bouyer sc->sc_info.mci_pending_image_component[i].mic_build_date,
535 1.1 bouyer sc->sc_info.mci_pending_image_component[i].mic_build_time);
536 1.1 bouyer }
537 1.1 bouyer
538 1.1 bouyer printf("%s: max_arms %d max_spans %d max_arrs %d max_lds %d name %s\n",
539 1.1 bouyer DEVNAME(sc),
540 1.1 bouyer sc->sc_info.mci_max_arms,
541 1.1 bouyer sc->sc_info.mci_max_spans,
542 1.1 bouyer sc->sc_info.mci_max_arrays,
543 1.1 bouyer sc->sc_info.mci_max_lds,
544 1.1 bouyer sc->sc_info.mci_product_name);
545 1.1 bouyer
546 1.1 bouyer printf("%s: serial %s present %#x fw time %d max_cmds %d max_sg %d\n",
547 1.1 bouyer DEVNAME(sc),
548 1.1 bouyer sc->sc_info.mci_serial_number,
549 1.1 bouyer sc->sc_info.mci_hw_present,
550 1.1 bouyer sc->sc_info.mci_current_fw_time,
551 1.1 bouyer sc->sc_info.mci_max_cmds,
552 1.1 bouyer sc->sc_info.mci_max_sg_elements);
553 1.1 bouyer
554 1.1 bouyer printf("%s: max_rq %d lds_pres %d lds_deg %d lds_off %d pd_pres %d\n",
555 1.1 bouyer DEVNAME(sc),
556 1.1 bouyer sc->sc_info.mci_max_request_size,
557 1.1 bouyer sc->sc_info.mci_lds_present,
558 1.1 bouyer sc->sc_info.mci_lds_degraded,
559 1.1 bouyer sc->sc_info.mci_lds_offline,
560 1.1 bouyer sc->sc_info.mci_pd_present);
561 1.1 bouyer
562 1.1 bouyer printf("%s: pd_dsk_prs %d pd_dsk_pred_fail %d pd_dsk_fail %d\n",
563 1.1 bouyer DEVNAME(sc),
564 1.1 bouyer sc->sc_info.mci_pd_disks_present,
565 1.1 bouyer sc->sc_info.mci_pd_disks_pred_failure,
566 1.1 bouyer sc->sc_info.mci_pd_disks_failed);
567 1.1 bouyer
568 1.1 bouyer printf("%s: nvram %d mem %d flash %d\n",
569 1.1 bouyer DEVNAME(sc),
570 1.1 bouyer sc->sc_info.mci_nvram_size,
571 1.1 bouyer sc->sc_info.mci_memory_size,
572 1.1 bouyer sc->sc_info.mci_flash_size);
573 1.1 bouyer
574 1.1 bouyer printf("%s: ram_cor %d ram_uncor %d clus_all %d clus_act %d\n",
575 1.1 bouyer DEVNAME(sc),
576 1.1 bouyer sc->sc_info.mci_ram_correctable_errors,
577 1.1 bouyer sc->sc_info.mci_ram_uncorrectable_errors,
578 1.1 bouyer sc->sc_info.mci_cluster_allowed,
579 1.1 bouyer sc->sc_info.mci_cluster_active);
580 1.1 bouyer
581 1.1 bouyer printf("%s: max_strps_io %d raid_lvl %#x adapt_ops %#x ld_ops %#x\n",
582 1.1 bouyer DEVNAME(sc),
583 1.1 bouyer sc->sc_info.mci_max_strips_per_io,
584 1.1 bouyer sc->sc_info.mci_raid_levels,
585 1.1 bouyer sc->sc_info.mci_adapter_ops,
586 1.1 bouyer sc->sc_info.mci_ld_ops);
587 1.1 bouyer
588 1.1 bouyer printf("%s: strp_sz_min %d strp_sz_max %d pd_ops %#x pd_mix %#x\n",
589 1.1 bouyer DEVNAME(sc),
590 1.1 bouyer sc->sc_info.mci_stripe_sz_ops.min,
591 1.1 bouyer sc->sc_info.mci_stripe_sz_ops.max,
592 1.1 bouyer sc->sc_info.mci_pd_ops,
593 1.1 bouyer sc->sc_info.mci_pd_mix_support);
594 1.1 bouyer
595 1.1 bouyer printf("%s: ecc_bucket %d pckg_prop %s\n",
596 1.1 bouyer DEVNAME(sc),
597 1.1 bouyer sc->sc_info.mci_ecc_bucket_count,
598 1.1 bouyer sc->sc_info.mci_package_version);
599 1.1 bouyer
600 1.1 bouyer printf("%s: sq_nm %d prd_fail_poll %d intr_thrtl %d intr_thrtl_to %d\n",
601 1.1 bouyer DEVNAME(sc),
602 1.1 bouyer sc->sc_info.mci_properties.mcp_seq_num,
603 1.1 bouyer sc->sc_info.mci_properties.mcp_pred_fail_poll_interval,
604 1.1 bouyer sc->sc_info.mci_properties.mcp_intr_throttle_cnt,
605 1.1 bouyer sc->sc_info.mci_properties.mcp_intr_throttle_timeout);
606 1.1 bouyer
607 1.1 bouyer printf("%s: rbld_rate %d patr_rd_rate %d bgi_rate %d cc_rate %d\n",
608 1.1 bouyer DEVNAME(sc),
609 1.1 bouyer sc->sc_info.mci_properties.mcp_rebuild_rate,
610 1.1 bouyer sc->sc_info.mci_properties.mcp_patrol_read_rate,
611 1.1 bouyer sc->sc_info.mci_properties.mcp_bgi_rate,
612 1.1 bouyer sc->sc_info.mci_properties.mcp_cc_rate);
613 1.1 bouyer
614 1.1 bouyer printf("%s: rc_rate %d ch_flsh %d spin_cnt %d spin_dly %d clus_en %d\n",
615 1.1 bouyer DEVNAME(sc),
616 1.1 bouyer sc->sc_info.mci_properties.mcp_recon_rate,
617 1.1 bouyer sc->sc_info.mci_properties.mcp_cache_flush_interval,
618 1.1 bouyer sc->sc_info.mci_properties.mcp_spinup_drv_cnt,
619 1.1 bouyer sc->sc_info.mci_properties.mcp_spinup_delay,
620 1.1 bouyer sc->sc_info.mci_properties.mcp_cluster_enable);
621 1.1 bouyer
622 1.1 bouyer printf("%s: coerc %d alarm %d dis_auto_rbld %d dis_bat_wrn %d ecc %d\n",
623 1.1 bouyer DEVNAME(sc),
624 1.1 bouyer sc->sc_info.mci_properties.mcp_coercion_mode,
625 1.1 bouyer sc->sc_info.mci_properties.mcp_alarm_enable,
626 1.1 bouyer sc->sc_info.mci_properties.mcp_disable_auto_rebuild,
627 1.1 bouyer sc->sc_info.mci_properties.mcp_disable_battery_warn,
628 1.1 bouyer sc->sc_info.mci_properties.mcp_ecc_bucket_size);
629 1.1 bouyer
630 1.1 bouyer printf("%s: ecc_leak %d rest_hs %d exp_encl_dev %d\n",
631 1.1 bouyer DEVNAME(sc),
632 1.1 bouyer sc->sc_info.mci_properties.mcp_ecc_bucket_leak_rate,
633 1.1 bouyer sc->sc_info.mci_properties.mcp_restore_hotspare_on_insertion,
634 1.1 bouyer sc->sc_info.mci_properties.mcp_expose_encl_devices);
635 1.1 bouyer
636 1.1 bouyer printf("%s: vendor %#x device %#x subvendor %#x subdevice %#x\n",
637 1.1 bouyer DEVNAME(sc),
638 1.1 bouyer sc->sc_info.mci_pci.mip_vendor,
639 1.1 bouyer sc->sc_info.mci_pci.mip_device,
640 1.1 bouyer sc->sc_info.mci_pci.mip_subvendor,
641 1.1 bouyer sc->sc_info.mci_pci.mip_subdevice);
642 1.1 bouyer
643 1.1 bouyer printf("%s: type %#x port_count %d port_addr ",
644 1.1 bouyer DEVNAME(sc),
645 1.1 bouyer sc->sc_info.mci_host.mih_type,
646 1.1 bouyer sc->sc_info.mci_host.mih_port_count);
647 1.1 bouyer
648 1.1 bouyer for (i = 0; i < 8; i++)
649 1.4 bouyer printf("%.0lx ", sc->sc_info.mci_host.mih_port_addr[i]);
650 1.1 bouyer printf("\n");
651 1.1 bouyer
652 1.1 bouyer printf("%s: type %.x port_count %d port_addr ",
653 1.1 bouyer DEVNAME(sc),
654 1.1 bouyer sc->sc_info.mci_device.mid_type,
655 1.1 bouyer sc->sc_info.mci_device.mid_port_count);
656 1.1 bouyer
657 1.1 bouyer for (i = 0; i < 8; i++)
658 1.4 bouyer printf("%.0lx ", sc->sc_info.mci_device.mid_port_addr[i]);
659 1.1 bouyer printf("\n");
660 1.1 bouyer #endif /* MFI_DEBUG */
661 1.1 bouyer
662 1.13 xtraeme return 0;
663 1.1 bouyer }
664 1.1 bouyer
665 1.13 xtraeme static void
666 1.1 bouyer mfiminphys(struct buf *bp)
667 1.1 bouyer {
668 1.1 bouyer DNPRINTF(MFI_D_MISC, "mfiminphys: %d\n", bp->b_bcount);
669 1.1 bouyer
670 1.1 bouyer /* XXX currently using MFI_MAXFER = MAXPHYS */
671 1.1 bouyer if (bp->b_bcount > MFI_MAXFER)
672 1.1 bouyer bp->b_bcount = MFI_MAXFER;
673 1.1 bouyer minphys(bp);
674 1.1 bouyer }
675 1.1 bouyer
676 1.1 bouyer int
677 1.27 dyoung mfi_rescan(device_t self, const char *ifattr, const int *locators)
678 1.27 dyoung {
679 1.27 dyoung struct mfi_softc *sc = device_private(self);
680 1.27 dyoung
681 1.27 dyoung if (sc->sc_child != NULL)
682 1.27 dyoung return 0;
683 1.27 dyoung
684 1.27 dyoung sc->sc_child = config_found_sm_loc(self, ifattr, locators, &sc->sc_chan,
685 1.27 dyoung scsiprint, NULL);
686 1.27 dyoung
687 1.27 dyoung return 0;
688 1.27 dyoung }
689 1.27 dyoung
690 1.27 dyoung void
691 1.27 dyoung mfi_childdetached(device_t self, device_t child)
692 1.27 dyoung {
693 1.27 dyoung struct mfi_softc *sc = device_private(self);
694 1.27 dyoung
695 1.27 dyoung KASSERT(self == sc->sc_dev);
696 1.27 dyoung KASSERT(child == sc->sc_child);
697 1.27 dyoung
698 1.27 dyoung if (child == sc->sc_child)
699 1.27 dyoung sc->sc_child = NULL;
700 1.27 dyoung }
701 1.27 dyoung
702 1.27 dyoung int
703 1.24 dyoung mfi_detach(struct mfi_softc *sc, int flags)
704 1.24 dyoung {
705 1.24 dyoung int error;
706 1.24 dyoung
707 1.24 dyoung DNPRINTF(MFI_D_MISC, "%s: mfi_detach\n", DEVNAME(sc));
708 1.24 dyoung
709 1.26 dyoung if ((error = config_detach_children(sc->sc_dev, flags)) != 0)
710 1.25 dyoung return error;
711 1.25 dyoung
712 1.24 dyoung #if NBIO > 0
713 1.24 dyoung mfi_destroy_sensors(sc);
714 1.26 dyoung bio_unregister(sc->sc_dev);
715 1.24 dyoung #endif /* NBIO > 0 */
716 1.24 dyoung
717 1.24 dyoung mfi_intr_disable(sc);
718 1.24 dyoung
719 1.24 dyoung /* TBD: shutdown firmware */
720 1.24 dyoung
721 1.24 dyoung if ((error = mfi_destroy_ccb(sc)) != 0)
722 1.24 dyoung return error;
723 1.24 dyoung
724 1.27 dyoung mfi_freemem(sc, &sc->sc_sense);
725 1.24 dyoung
726 1.27 dyoung mfi_freemem(sc, &sc->sc_frames);
727 1.24 dyoung
728 1.27 dyoung mfi_freemem(sc, &sc->sc_pcq);
729 1.24 dyoung
730 1.24 dyoung return 0;
731 1.24 dyoung }
732 1.24 dyoung
733 1.24 dyoung int
734 1.12 xtraeme mfi_attach(struct mfi_softc *sc, enum mfi_iop iop)
735 1.1 bouyer {
736 1.1 bouyer struct scsipi_adapter *adapt = &sc->sc_adapt;
737 1.1 bouyer struct scsipi_channel *chan = &sc->sc_chan;
738 1.39 bouyer uint32_t status, frames, max_sgl;
739 1.1 bouyer int i;
740 1.1 bouyer
741 1.1 bouyer DNPRINTF(MFI_D_MISC, "%s: mfi_attach\n", DEVNAME(sc));
742 1.1 bouyer
743 1.12 xtraeme switch (iop) {
744 1.12 xtraeme case MFI_IOP_XSCALE:
745 1.12 xtraeme sc->sc_iop = &mfi_iop_xscale;
746 1.12 xtraeme break;
747 1.12 xtraeme case MFI_IOP_PPC:
748 1.12 xtraeme sc->sc_iop = &mfi_iop_ppc;
749 1.12 xtraeme break;
750 1.33 msaitoh case MFI_IOP_GEN2:
751 1.33 msaitoh sc->sc_iop = &mfi_iop_gen2;
752 1.33 msaitoh break;
753 1.38 sborrill case MFI_IOP_SKINNY:
754 1.38 sborrill sc->sc_iop = &mfi_iop_skinny;
755 1.38 sborrill break;
756 1.12 xtraeme default:
757 1.12 xtraeme panic("%s: unknown iop %d", DEVNAME(sc), iop);
758 1.12 xtraeme }
759 1.12 xtraeme
760 1.1 bouyer if (mfi_transition_firmware(sc))
761 1.13 xtraeme return 1;
762 1.1 bouyer
763 1.1 bouyer TAILQ_INIT(&sc->sc_ccb_freeq);
764 1.1 bouyer
765 1.12 xtraeme status = mfi_fw_state(sc);
766 1.1 bouyer sc->sc_max_cmds = status & MFI_STATE_MAXCMD_MASK;
767 1.39 bouyer max_sgl = (status & MFI_STATE_MAXSGL_MASK) >> 16;
768 1.39 bouyer if (sc->sc_64bit_dma) {
769 1.39 bouyer sc->sc_max_sgl = min(max_sgl, (128 * 1024) / PAGE_SIZE + 1);
770 1.39 bouyer sc->sc_sgl_size = sizeof(struct mfi_sg64);
771 1.39 bouyer sc->sc_sgl_flags = MFI_FRAME_SGL64;
772 1.39 bouyer } else {
773 1.39 bouyer sc->sc_max_sgl = max_sgl;
774 1.39 bouyer sc->sc_sgl_size = sizeof(struct mfi_sg32);
775 1.39 bouyer sc->sc_sgl_flags = MFI_FRAME_SGL32;
776 1.39 bouyer }
777 1.1 bouyer DNPRINTF(MFI_D_MISC, "%s: max commands: %u, max sgl: %u\n",
778 1.1 bouyer DEVNAME(sc), sc->sc_max_cmds, sc->sc_max_sgl);
779 1.1 bouyer
780 1.1 bouyer /* consumer/producer and reply queue memory */
781 1.1 bouyer sc->sc_pcq = mfi_allocmem(sc, (sizeof(uint32_t) * sc->sc_max_cmds) +
782 1.1 bouyer sizeof(struct mfi_prod_cons));
783 1.1 bouyer if (sc->sc_pcq == NULL) {
784 1.1 bouyer aprint_error("%s: unable to allocate reply queue memory\n",
785 1.1 bouyer DEVNAME(sc));
786 1.1 bouyer goto nopcq;
787 1.1 bouyer }
788 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0,
789 1.1 bouyer sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons),
790 1.1 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
791 1.1 bouyer
792 1.1 bouyer /* frame memory */
793 1.39 bouyer frames = (sc->sc_sgl_size * sc->sc_max_sgl + MFI_FRAME_SIZE - 1) /
794 1.39 bouyer MFI_FRAME_SIZE + 1;
795 1.1 bouyer sc->sc_frames_size = frames * MFI_FRAME_SIZE;
796 1.1 bouyer sc->sc_frames = mfi_allocmem(sc, sc->sc_frames_size * sc->sc_max_cmds);
797 1.1 bouyer if (sc->sc_frames == NULL) {
798 1.1 bouyer aprint_error("%s: unable to allocate frame memory\n",
799 1.1 bouyer DEVNAME(sc));
800 1.1 bouyer goto noframe;
801 1.1 bouyer }
802 1.1 bouyer /* XXX hack, fix this */
803 1.1 bouyer if (MFIMEM_DVA(sc->sc_frames) & 0x3f) {
804 1.1 bouyer aprint_error("%s: improper frame alignment (%#llx) FIXME\n",
805 1.1 bouyer DEVNAME(sc), (long long int)MFIMEM_DVA(sc->sc_frames));
806 1.1 bouyer goto noframe;
807 1.1 bouyer }
808 1.1 bouyer
809 1.1 bouyer /* sense memory */
810 1.1 bouyer sc->sc_sense = mfi_allocmem(sc, sc->sc_max_cmds * MFI_SENSE_SIZE);
811 1.1 bouyer if (sc->sc_sense == NULL) {
812 1.1 bouyer aprint_error("%s: unable to allocate sense memory\n",
813 1.1 bouyer DEVNAME(sc));
814 1.1 bouyer goto nosense;
815 1.1 bouyer }
816 1.1 bouyer
817 1.1 bouyer /* now that we have all memory bits go initialize ccbs */
818 1.1 bouyer if (mfi_init_ccb(sc)) {
819 1.1 bouyer aprint_error("%s: could not init ccb list\n", DEVNAME(sc));
820 1.1 bouyer goto noinit;
821 1.1 bouyer }
822 1.1 bouyer
823 1.1 bouyer /* kickstart firmware with all addresses and pointers */
824 1.1 bouyer if (mfi_initialize_firmware(sc)) {
825 1.1 bouyer aprint_error("%s: could not initialize firmware\n",
826 1.1 bouyer DEVNAME(sc));
827 1.1 bouyer goto noinit;
828 1.1 bouyer }
829 1.1 bouyer
830 1.1 bouyer if (mfi_get_info(sc)) {
831 1.1 bouyer aprint_error("%s: could not retrieve controller information\n",
832 1.1 bouyer DEVNAME(sc));
833 1.1 bouyer goto noinit;
834 1.1 bouyer }
835 1.1 bouyer
836 1.1 bouyer aprint_normal("%s: logical drives %d, version %s, %dMB RAM\n",
837 1.1 bouyer DEVNAME(sc),
838 1.1 bouyer sc->sc_info.mci_lds_present,
839 1.1 bouyer sc->sc_info.mci_package_version,
840 1.1 bouyer sc->sc_info.mci_memory_size);
841 1.1 bouyer
842 1.1 bouyer sc->sc_ld_cnt = sc->sc_info.mci_lds_present;
843 1.1 bouyer sc->sc_max_ld = sc->sc_ld_cnt;
844 1.1 bouyer for (i = 0; i < sc->sc_ld_cnt; i++)
845 1.1 bouyer sc->sc_ld[i].ld_present = 1;
846 1.1 bouyer
847 1.1 bouyer memset(adapt, 0, sizeof(*adapt));
848 1.26 dyoung adapt->adapt_dev = sc->sc_dev;
849 1.1 bouyer adapt->adapt_nchannels = 1;
850 1.1 bouyer if (sc->sc_ld_cnt)
851 1.1 bouyer adapt->adapt_openings = sc->sc_max_cmds / sc->sc_ld_cnt;
852 1.1 bouyer else
853 1.1 bouyer adapt->adapt_openings = sc->sc_max_cmds;
854 1.1 bouyer adapt->adapt_max_periph = adapt->adapt_openings;
855 1.1 bouyer adapt->adapt_request = mfi_scsipi_request;
856 1.1 bouyer adapt->adapt_minphys = mfiminphys;
857 1.1 bouyer
858 1.1 bouyer memset(chan, 0, sizeof(*chan));
859 1.1 bouyer chan->chan_adapter = adapt;
860 1.1 bouyer chan->chan_bustype = &scsi_bustype;
861 1.1 bouyer chan->chan_channel = 0;
862 1.1 bouyer chan->chan_flags = 0;
863 1.1 bouyer chan->chan_nluns = 8;
864 1.1 bouyer chan->chan_ntargets = MFI_MAX_LD;
865 1.1 bouyer chan->chan_id = MFI_MAX_LD;
866 1.1 bouyer
867 1.27 dyoung mfi_rescan(sc->sc_dev, "scsi", NULL);
868 1.1 bouyer
869 1.1 bouyer /* enable interrupts */
870 1.12 xtraeme mfi_intr_enable(sc);
871 1.1 bouyer
872 1.1 bouyer #if NBIO > 0
873 1.26 dyoung if (bio_register(sc->sc_dev, mfi_ioctl) != 0)
874 1.1 bouyer panic("%s: controller registration failed", DEVNAME(sc));
875 1.1 bouyer if (mfi_create_sensors(sc) != 0)
876 1.1 bouyer aprint_error("%s: unable to create sensors\n", DEVNAME(sc));
877 1.1 bouyer #endif /* NBIO > 0 */
878 1.1 bouyer
879 1.13 xtraeme return 0;
880 1.1 bouyer noinit:
881 1.27 dyoung mfi_freemem(sc, &sc->sc_sense);
882 1.1 bouyer nosense:
883 1.27 dyoung mfi_freemem(sc, &sc->sc_frames);
884 1.1 bouyer noframe:
885 1.27 dyoung mfi_freemem(sc, &sc->sc_pcq);
886 1.1 bouyer nopcq:
887 1.13 xtraeme return 1;
888 1.1 bouyer }
889 1.1 bouyer
890 1.13 xtraeme static int
891 1.1 bouyer mfi_poll(struct mfi_ccb *ccb)
892 1.1 bouyer {
893 1.1 bouyer struct mfi_softc *sc = ccb->ccb_sc;
894 1.1 bouyer struct mfi_frame_header *hdr;
895 1.1 bouyer int to = 0;
896 1.1 bouyer
897 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: mfi_poll\n", DEVNAME(sc));
898 1.1 bouyer
899 1.1 bouyer hdr = &ccb->ccb_frame->mfr_header;
900 1.1 bouyer hdr->mfh_cmd_status = 0xff;
901 1.1 bouyer hdr->mfh_flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE;
902 1.1 bouyer
903 1.12 xtraeme mfi_post(sc, ccb);
904 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames),
905 1.1 bouyer ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames),
906 1.1 bouyer sc->sc_frames_size, BUS_DMASYNC_POSTREAD);
907 1.1 bouyer
908 1.1 bouyer while (hdr->mfh_cmd_status == 0xff) {
909 1.1 bouyer delay(1000);
910 1.1 bouyer if (to++ > 5000) /* XXX 5 seconds busywait sucks */
911 1.1 bouyer break;
912 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames),
913 1.1 bouyer ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames),
914 1.1 bouyer sc->sc_frames_size, BUS_DMASYNC_POSTREAD);
915 1.1 bouyer }
916 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames),
917 1.1 bouyer ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames),
918 1.1 bouyer sc->sc_frames_size, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
919 1.1 bouyer
920 1.1 bouyer if (ccb->ccb_data != NULL) {
921 1.1 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done sync\n",
922 1.1 bouyer DEVNAME(sc));
923 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
924 1.1 bouyer ccb->ccb_dmamap->dm_mapsize,
925 1.1 bouyer (ccb->ccb_direction & MFI_DATA_IN) ?
926 1.1 bouyer BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
927 1.1 bouyer
928 1.1 bouyer bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap);
929 1.1 bouyer }
930 1.1 bouyer
931 1.1 bouyer if (hdr->mfh_cmd_status == 0xff) {
932 1.1 bouyer printf("%s: timeout on ccb %d\n", DEVNAME(sc),
933 1.1 bouyer hdr->mfh_context);
934 1.1 bouyer ccb->ccb_flags |= MFI_CCB_F_ERR;
935 1.13 xtraeme return 1;
936 1.1 bouyer }
937 1.30 dyoung
938 1.13 xtraeme return 0;
939 1.1 bouyer }
940 1.1 bouyer
941 1.1 bouyer int
942 1.1 bouyer mfi_intr(void *arg)
943 1.1 bouyer {
944 1.1 bouyer struct mfi_softc *sc = arg;
945 1.1 bouyer struct mfi_prod_cons *pcq;
946 1.1 bouyer struct mfi_ccb *ccb;
947 1.12 xtraeme uint32_t producer, consumer, ctx;
948 1.1 bouyer int claimed = 0;
949 1.1 bouyer
950 1.12 xtraeme if (!mfi_my_intr(sc))
951 1.12 xtraeme return 0;
952 1.1 bouyer
953 1.4 bouyer pcq = MFIMEM_KVA(sc->sc_pcq);
954 1.4 bouyer
955 1.4 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_intr %#lx %#lx\n", DEVNAME(sc),
956 1.4 bouyer (u_long)sc, (u_long)pcq);
957 1.1 bouyer
958 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0,
959 1.1 bouyer sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons),
960 1.1 bouyer BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
961 1.1 bouyer
962 1.1 bouyer producer = pcq->mpc_producer;
963 1.1 bouyer consumer = pcq->mpc_consumer;
964 1.1 bouyer
965 1.1 bouyer while (consumer != producer) {
966 1.1 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_intr pi %#x ci %#x\n",
967 1.1 bouyer DEVNAME(sc), producer, consumer);
968 1.1 bouyer
969 1.1 bouyer ctx = pcq->mpc_reply_q[consumer];
970 1.1 bouyer pcq->mpc_reply_q[consumer] = MFI_INVALID_CTX;
971 1.1 bouyer if (ctx == MFI_INVALID_CTX)
972 1.1 bouyer printf("%s: invalid context, p: %d c: %d\n",
973 1.1 bouyer DEVNAME(sc), producer, consumer);
974 1.1 bouyer else {
975 1.1 bouyer /* XXX remove from queue and call scsi_done */
976 1.1 bouyer ccb = &sc->sc_ccb[ctx];
977 1.1 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_intr context %#x\n",
978 1.1 bouyer DEVNAME(sc), ctx);
979 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames),
980 1.1 bouyer ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames),
981 1.1 bouyer sc->sc_frames_size,
982 1.1 bouyer BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
983 1.1 bouyer ccb->ccb_done(ccb);
984 1.1 bouyer
985 1.1 bouyer claimed = 1;
986 1.1 bouyer }
987 1.1 bouyer consumer++;
988 1.1 bouyer if (consumer == (sc->sc_max_cmds + 1))
989 1.1 bouyer consumer = 0;
990 1.1 bouyer }
991 1.1 bouyer
992 1.1 bouyer pcq->mpc_consumer = consumer;
993 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0,
994 1.1 bouyer sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons),
995 1.1 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
996 1.1 bouyer
997 1.13 xtraeme return claimed;
998 1.1 bouyer }
999 1.1 bouyer
1000 1.13 xtraeme static int
1001 1.1 bouyer mfi_scsi_io(struct mfi_ccb *ccb, struct scsipi_xfer *xs, uint32_t blockno,
1002 1.1 bouyer uint32_t blockcnt)
1003 1.1 bouyer {
1004 1.1 bouyer struct scsipi_periph *periph = xs->xs_periph;
1005 1.1 bouyer struct mfi_io_frame *io;
1006 1.1 bouyer
1007 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: mfi_scsi_io: %d\n",
1008 1.15 cegger device_xname(periph->periph_channel->chan_adapter->adapt_dev),
1009 1.1 bouyer periph->periph_target);
1010 1.1 bouyer
1011 1.1 bouyer if (!xs->data)
1012 1.13 xtraeme return 1;
1013 1.1 bouyer
1014 1.1 bouyer io = &ccb->ccb_frame->mfr_io;
1015 1.1 bouyer if (xs->xs_control & XS_CTL_DATA_IN) {
1016 1.1 bouyer io->mif_header.mfh_cmd = MFI_CMD_LD_READ;
1017 1.1 bouyer ccb->ccb_direction = MFI_DATA_IN;
1018 1.1 bouyer } else {
1019 1.1 bouyer io->mif_header.mfh_cmd = MFI_CMD_LD_WRITE;
1020 1.1 bouyer ccb->ccb_direction = MFI_DATA_OUT;
1021 1.1 bouyer }
1022 1.1 bouyer io->mif_header.mfh_target_id = periph->periph_target;
1023 1.1 bouyer io->mif_header.mfh_timeout = 0;
1024 1.1 bouyer io->mif_header.mfh_flags = 0;
1025 1.1 bouyer io->mif_header.mfh_sense_len = MFI_SENSE_SIZE;
1026 1.1 bouyer io->mif_header.mfh_data_len= blockcnt;
1027 1.1 bouyer io->mif_lba_hi = 0;
1028 1.1 bouyer io->mif_lba_lo = blockno;
1029 1.1 bouyer io->mif_sense_addr_lo = htole32(ccb->ccb_psense);
1030 1.1 bouyer io->mif_sense_addr_hi = 0;
1031 1.1 bouyer
1032 1.1 bouyer ccb->ccb_done = mfi_scsi_xs_done;
1033 1.1 bouyer ccb->ccb_xs = xs;
1034 1.1 bouyer ccb->ccb_frame_size = MFI_IO_FRAME_SIZE;
1035 1.1 bouyer ccb->ccb_sgl = &io->mif_sgl;
1036 1.1 bouyer ccb->ccb_data = xs->data;
1037 1.1 bouyer ccb->ccb_len = xs->datalen;
1038 1.1 bouyer
1039 1.14 xtraeme if (mfi_create_sgl(ccb, (xs->xs_control & XS_CTL_NOSLEEP) ?
1040 1.14 xtraeme BUS_DMA_NOWAIT : BUS_DMA_WAITOK))
1041 1.13 xtraeme return 1;
1042 1.1 bouyer
1043 1.13 xtraeme return 0;
1044 1.1 bouyer }
1045 1.1 bouyer
1046 1.13 xtraeme static void
1047 1.1 bouyer mfi_scsi_xs_done(struct mfi_ccb *ccb)
1048 1.1 bouyer {
1049 1.1 bouyer struct scsipi_xfer *xs = ccb->ccb_xs;
1050 1.1 bouyer struct mfi_softc *sc = ccb->ccb_sc;
1051 1.1 bouyer struct mfi_frame_header *hdr = &ccb->ccb_frame->mfr_header;
1052 1.1 bouyer
1053 1.4 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done %#lx %#lx\n",
1054 1.4 bouyer DEVNAME(sc), (u_long)ccb, (u_long)ccb->ccb_frame);
1055 1.1 bouyer
1056 1.1 bouyer if (xs->data != NULL) {
1057 1.1 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done sync\n",
1058 1.1 bouyer DEVNAME(sc));
1059 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
1060 1.1 bouyer ccb->ccb_dmamap->dm_mapsize,
1061 1.1 bouyer (xs->xs_control & XS_CTL_DATA_IN) ?
1062 1.1 bouyer BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1063 1.1 bouyer
1064 1.1 bouyer bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap);
1065 1.1 bouyer }
1066 1.1 bouyer
1067 1.1 bouyer if (hdr->mfh_cmd_status != MFI_STAT_OK) {
1068 1.1 bouyer xs->error = XS_DRIVER_STUFFUP;
1069 1.1 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done stuffup %#x\n",
1070 1.1 bouyer DEVNAME(sc), hdr->mfh_cmd_status);
1071 1.1 bouyer
1072 1.1 bouyer if (hdr->mfh_scsi_status != 0) {
1073 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_sense),
1074 1.1 bouyer ccb->ccb_psense - MFIMEM_DVA(sc->sc_sense),
1075 1.1 bouyer MFI_SENSE_SIZE, BUS_DMASYNC_POSTREAD);
1076 1.1 bouyer DNPRINTF(MFI_D_INTR,
1077 1.4 bouyer "%s: mfi_scsi_xs_done sense %#x %lx %lx\n",
1078 1.1 bouyer DEVNAME(sc), hdr->mfh_scsi_status,
1079 1.4 bouyer (u_long)&xs->sense, (u_long)ccb->ccb_sense);
1080 1.1 bouyer memset(&xs->sense, 0, sizeof(xs->sense));
1081 1.1 bouyer memcpy(&xs->sense, ccb->ccb_sense,
1082 1.1 bouyer sizeof(struct scsi_sense_data));
1083 1.1 bouyer xs->error = XS_SENSE;
1084 1.1 bouyer }
1085 1.1 bouyer } else {
1086 1.1 bouyer xs->error = XS_NOERROR;
1087 1.1 bouyer xs->status = SCSI_OK;
1088 1.1 bouyer xs->resid = 0;
1089 1.1 bouyer }
1090 1.1 bouyer
1091 1.1 bouyer mfi_put_ccb(ccb);
1092 1.1 bouyer scsipi_done(xs);
1093 1.1 bouyer }
1094 1.1 bouyer
1095 1.13 xtraeme static int
1096 1.1 bouyer mfi_scsi_ld(struct mfi_ccb *ccb, struct scsipi_xfer *xs)
1097 1.1 bouyer {
1098 1.1 bouyer struct mfi_pass_frame *pf;
1099 1.1 bouyer struct scsipi_periph *periph = xs->xs_periph;
1100 1.1 bouyer
1101 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: mfi_scsi_ld: %d\n",
1102 1.15 cegger device_xname(periph->periph_channel->chan_adapter->adapt_dev),
1103 1.1 bouyer periph->periph_target);
1104 1.1 bouyer
1105 1.1 bouyer pf = &ccb->ccb_frame->mfr_pass;
1106 1.1 bouyer pf->mpf_header.mfh_cmd = MFI_CMD_LD_SCSI_IO;
1107 1.1 bouyer pf->mpf_header.mfh_target_id = periph->periph_target;
1108 1.1 bouyer pf->mpf_header.mfh_lun_id = 0;
1109 1.1 bouyer pf->mpf_header.mfh_cdb_len = xs->cmdlen;
1110 1.1 bouyer pf->mpf_header.mfh_timeout = 0;
1111 1.1 bouyer pf->mpf_header.mfh_data_len= xs->datalen; /* XXX */
1112 1.1 bouyer pf->mpf_header.mfh_sense_len = MFI_SENSE_SIZE;
1113 1.1 bouyer
1114 1.1 bouyer pf->mpf_sense_addr_hi = 0;
1115 1.1 bouyer pf->mpf_sense_addr_lo = htole32(ccb->ccb_psense);
1116 1.1 bouyer
1117 1.1 bouyer memset(pf->mpf_cdb, 0, 16);
1118 1.1 bouyer memcpy(pf->mpf_cdb, &xs->cmdstore, xs->cmdlen);
1119 1.1 bouyer
1120 1.1 bouyer ccb->ccb_done = mfi_scsi_xs_done;
1121 1.1 bouyer ccb->ccb_xs = xs;
1122 1.1 bouyer ccb->ccb_frame_size = MFI_PASS_FRAME_SIZE;
1123 1.1 bouyer ccb->ccb_sgl = &pf->mpf_sgl;
1124 1.1 bouyer
1125 1.1 bouyer if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT))
1126 1.1 bouyer ccb->ccb_direction = (xs->xs_control & XS_CTL_DATA_IN) ?
1127 1.1 bouyer MFI_DATA_IN : MFI_DATA_OUT;
1128 1.1 bouyer else
1129 1.1 bouyer ccb->ccb_direction = MFI_DATA_NONE;
1130 1.1 bouyer
1131 1.1 bouyer if (xs->data) {
1132 1.1 bouyer ccb->ccb_data = xs->data;
1133 1.1 bouyer ccb->ccb_len = xs->datalen;
1134 1.1 bouyer
1135 1.14 xtraeme if (mfi_create_sgl(ccb, (xs->xs_control & XS_CTL_NOSLEEP) ?
1136 1.14 xtraeme BUS_DMA_NOWAIT : BUS_DMA_WAITOK))
1137 1.13 xtraeme return 1;
1138 1.1 bouyer }
1139 1.1 bouyer
1140 1.13 xtraeme return 0;
1141 1.1 bouyer }
1142 1.1 bouyer
1143 1.13 xtraeme static void
1144 1.1 bouyer mfi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
1145 1.1 bouyer void *arg)
1146 1.1 bouyer {
1147 1.1 bouyer struct scsipi_periph *periph;
1148 1.1 bouyer struct scsipi_xfer *xs;
1149 1.1 bouyer struct scsipi_adapter *adapt = chan->chan_adapter;
1150 1.26 dyoung struct mfi_softc *sc = device_private(adapt->adapt_dev);
1151 1.1 bouyer struct mfi_ccb *ccb;
1152 1.1 bouyer struct scsi_rw_6 *rw;
1153 1.1 bouyer struct scsipi_rw_10 *rwb;
1154 1.1 bouyer uint32_t blockno, blockcnt;
1155 1.1 bouyer uint8_t target;
1156 1.1 bouyer uint8_t mbox[MFI_MBOX_SIZE];
1157 1.1 bouyer int s;
1158 1.1 bouyer
1159 1.1 bouyer switch (req) {
1160 1.1 bouyer case ADAPTER_REQ_GROW_RESOURCES:
1161 1.1 bouyer /* Not supported. */
1162 1.1 bouyer return;
1163 1.1 bouyer case ADAPTER_REQ_SET_XFER_MODE:
1164 1.1 bouyer /* Not supported. */
1165 1.1 bouyer return;
1166 1.1 bouyer case ADAPTER_REQ_RUN_XFER:
1167 1.1 bouyer break;
1168 1.1 bouyer }
1169 1.1 bouyer
1170 1.1 bouyer xs = arg;
1171 1.4 bouyer
1172 1.4 bouyer DNPRINTF(MFI_D_CMD, "%s: mfi_scsipi_request req %d opcode: %#x\n",
1173 1.4 bouyer DEVNAME(sc), req, xs->cmd->opcode);
1174 1.4 bouyer
1175 1.1 bouyer periph = xs->xs_periph;
1176 1.1 bouyer target = periph->periph_target;
1177 1.1 bouyer
1178 1.1 bouyer s = splbio();
1179 1.1 bouyer if (target >= MFI_MAX_LD || !sc->sc_ld[target].ld_present ||
1180 1.1 bouyer periph->periph_lun != 0) {
1181 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: invalid target %d\n",
1182 1.1 bouyer DEVNAME(sc), target);
1183 1.1 bouyer xs->error = XS_SELTIMEOUT;
1184 1.1 bouyer scsipi_done(xs);
1185 1.1 bouyer splx(s);
1186 1.1 bouyer return;
1187 1.1 bouyer }
1188 1.1 bouyer
1189 1.1 bouyer if ((ccb = mfi_get_ccb(sc)) == NULL) {
1190 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: mfi_scsipi_request no ccb\n", DEVNAME(sc));
1191 1.1 bouyer xs->error = XS_RESOURCE_SHORTAGE;
1192 1.1 bouyer scsipi_done(xs);
1193 1.1 bouyer splx(s);
1194 1.1 bouyer return;
1195 1.1 bouyer }
1196 1.1 bouyer
1197 1.1 bouyer switch (xs->cmd->opcode) {
1198 1.1 bouyer /* IO path */
1199 1.1 bouyer case READ_10:
1200 1.1 bouyer case WRITE_10:
1201 1.1 bouyer rwb = (struct scsipi_rw_10 *)xs->cmd;
1202 1.1 bouyer blockno = _4btol(rwb->addr);
1203 1.1 bouyer blockcnt = _2btol(rwb->length);
1204 1.1 bouyer if (mfi_scsi_io(ccb, xs, blockno, blockcnt)) {
1205 1.1 bouyer mfi_put_ccb(ccb);
1206 1.1 bouyer goto stuffup;
1207 1.1 bouyer }
1208 1.1 bouyer break;
1209 1.1 bouyer
1210 1.1 bouyer case SCSI_READ_6_COMMAND:
1211 1.1 bouyer case SCSI_WRITE_6_COMMAND:
1212 1.1 bouyer rw = (struct scsi_rw_6 *)xs->cmd;
1213 1.1 bouyer blockno = _3btol(rw->addr) & (SRW_TOPADDR << 16 | 0xffff);
1214 1.1 bouyer blockcnt = rw->length ? rw->length : 0x100;
1215 1.1 bouyer if (mfi_scsi_io(ccb, xs, blockno, blockcnt)) {
1216 1.1 bouyer mfi_put_ccb(ccb);
1217 1.1 bouyer goto stuffup;
1218 1.1 bouyer }
1219 1.1 bouyer break;
1220 1.1 bouyer
1221 1.1 bouyer case SCSI_SYNCHRONIZE_CACHE_10:
1222 1.1 bouyer mbox[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
1223 1.19 bouyer if (mfi_mgmt(ccb, xs,
1224 1.19 bouyer MR_DCMD_CTRL_CACHE_FLUSH, MFI_DATA_NONE, 0, NULL, mbox)) {
1225 1.19 bouyer mfi_put_ccb(ccb);
1226 1.1 bouyer goto stuffup;
1227 1.19 bouyer }
1228 1.19 bouyer break;
1229 1.1 bouyer
1230 1.1 bouyer /* hand it of to the firmware and let it deal with it */
1231 1.1 bouyer case SCSI_TEST_UNIT_READY:
1232 1.1 bouyer /* save off sd? after autoconf */
1233 1.1 bouyer if (!cold) /* XXX bogus */
1234 1.26 dyoung strlcpy(sc->sc_ld[target].ld_dev, device_xname(sc->sc_dev),
1235 1.1 bouyer sizeof(sc->sc_ld[target].ld_dev));
1236 1.1 bouyer /* FALLTHROUGH */
1237 1.1 bouyer
1238 1.1 bouyer default:
1239 1.1 bouyer if (mfi_scsi_ld(ccb, xs)) {
1240 1.1 bouyer mfi_put_ccb(ccb);
1241 1.1 bouyer goto stuffup;
1242 1.1 bouyer }
1243 1.1 bouyer break;
1244 1.1 bouyer }
1245 1.1 bouyer
1246 1.1 bouyer DNPRINTF(MFI_D_CMD, "%s: start io %d\n", DEVNAME(sc), target);
1247 1.1 bouyer
1248 1.1 bouyer if (xs->xs_control & XS_CTL_POLL) {
1249 1.1 bouyer if (mfi_poll(ccb)) {
1250 1.1 bouyer /* XXX check for sense in ccb->ccb_sense? */
1251 1.1 bouyer printf("%s: mfi_scsipi_request poll failed\n",
1252 1.1 bouyer DEVNAME(sc));
1253 1.22 cegger memset(&xs->sense, 0, sizeof(xs->sense));
1254 1.1 bouyer xs->sense.scsi_sense.response_code =
1255 1.1 bouyer SSD_RCODE_VALID | SSD_RCODE_CURRENT;
1256 1.1 bouyer xs->sense.scsi_sense.flags = SKEY_ILLEGAL_REQUEST;
1257 1.1 bouyer xs->sense.scsi_sense.asc = 0x20; /* invalid opcode */
1258 1.1 bouyer xs->error = XS_SENSE;
1259 1.1 bouyer xs->status = SCSI_CHECK;
1260 1.1 bouyer } else {
1261 1.1 bouyer DNPRINTF(MFI_D_DMA,
1262 1.1 bouyer "%s: mfi_scsipi_request poll complete %d\n",
1263 1.1 bouyer DEVNAME(sc), ccb->ccb_dmamap->dm_nsegs);
1264 1.1 bouyer xs->error = XS_NOERROR;
1265 1.1 bouyer xs->status = SCSI_OK;
1266 1.1 bouyer xs->resid = 0;
1267 1.1 bouyer }
1268 1.1 bouyer mfi_put_ccb(ccb);
1269 1.1 bouyer scsipi_done(xs);
1270 1.1 bouyer splx(s);
1271 1.1 bouyer return;
1272 1.1 bouyer }
1273 1.1 bouyer
1274 1.12 xtraeme mfi_post(sc, ccb);
1275 1.1 bouyer
1276 1.1 bouyer DNPRINTF(MFI_D_DMA, "%s: mfi_scsipi_request queued %d\n", DEVNAME(sc),
1277 1.1 bouyer ccb->ccb_dmamap->dm_nsegs);
1278 1.1 bouyer
1279 1.1 bouyer splx(s);
1280 1.1 bouyer return;
1281 1.1 bouyer
1282 1.1 bouyer stuffup:
1283 1.1 bouyer xs->error = XS_DRIVER_STUFFUP;
1284 1.1 bouyer scsipi_done(xs);
1285 1.1 bouyer splx(s);
1286 1.1 bouyer }
1287 1.1 bouyer
1288 1.13 xtraeme static int
1289 1.1 bouyer mfi_create_sgl(struct mfi_ccb *ccb, int flags)
1290 1.1 bouyer {
1291 1.1 bouyer struct mfi_softc *sc = ccb->ccb_sc;
1292 1.1 bouyer struct mfi_frame_header *hdr;
1293 1.1 bouyer bus_dma_segment_t *sgd;
1294 1.1 bouyer union mfi_sgl *sgl;
1295 1.1 bouyer int error, i;
1296 1.1 bouyer
1297 1.4 bouyer DNPRINTF(MFI_D_DMA, "%s: mfi_create_sgl %#lx\n", DEVNAME(sc),
1298 1.4 bouyer (u_long)ccb->ccb_data);
1299 1.1 bouyer
1300 1.1 bouyer if (!ccb->ccb_data)
1301 1.13 xtraeme return 1;
1302 1.1 bouyer
1303 1.1 bouyer error = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap,
1304 1.1 bouyer ccb->ccb_data, ccb->ccb_len, NULL, flags);
1305 1.1 bouyer if (error) {
1306 1.1 bouyer if (error == EFBIG)
1307 1.1 bouyer printf("more than %d dma segs\n",
1308 1.1 bouyer sc->sc_max_sgl);
1309 1.1 bouyer else
1310 1.1 bouyer printf("error %d loading dma map\n", error);
1311 1.13 xtraeme return 1;
1312 1.1 bouyer }
1313 1.1 bouyer
1314 1.1 bouyer hdr = &ccb->ccb_frame->mfr_header;
1315 1.1 bouyer sgl = ccb->ccb_sgl;
1316 1.1 bouyer sgd = ccb->ccb_dmamap->dm_segs;
1317 1.1 bouyer for (i = 0; i < ccb->ccb_dmamap->dm_nsegs; i++) {
1318 1.39 bouyer if (sc->sc_64bit_dma) {
1319 1.39 bouyer sgl->sg64[i].addr = htole64(sgd[i].ds_addr);
1320 1.41 bouyer sgl->sg64[i].len = htole32(sgd[i].ds_len);
1321 1.39 bouyer DNPRINTF(MFI_D_DMA, "%s: addr: %#" PRIx64 " len: %#"
1322 1.39 bouyer PRIx64 "\n",
1323 1.39 bouyer DEVNAME(sc), sgl->sg64[i].addr, sgl->sg64[i].len);
1324 1.39 bouyer } else {
1325 1.39 bouyer sgl->sg32[i].addr = htole32(sgd[i].ds_addr);
1326 1.39 bouyer sgl->sg32[i].len = htole32(sgd[i].ds_len);
1327 1.39 bouyer DNPRINTF(MFI_D_DMA, "%s: addr: %#x len: %#x\n",
1328 1.39 bouyer DEVNAME(sc), sgl->sg32[i].addr, sgl->sg32[i].len);
1329 1.39 bouyer }
1330 1.1 bouyer }
1331 1.1 bouyer
1332 1.1 bouyer if (ccb->ccb_direction == MFI_DATA_IN) {
1333 1.1 bouyer hdr->mfh_flags |= MFI_FRAME_DIR_READ;
1334 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
1335 1.1 bouyer ccb->ccb_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1336 1.1 bouyer } else {
1337 1.1 bouyer hdr->mfh_flags |= MFI_FRAME_DIR_WRITE;
1338 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
1339 1.1 bouyer ccb->ccb_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
1340 1.1 bouyer }
1341 1.1 bouyer
1342 1.39 bouyer hdr->mfh_flags |= sc->sc_sgl_flags;
1343 1.1 bouyer hdr->mfh_sg_count = ccb->ccb_dmamap->dm_nsegs;
1344 1.39 bouyer ccb->ccb_frame_size += sc->sc_sgl_size * ccb->ccb_dmamap->dm_nsegs;
1345 1.1 bouyer ccb->ccb_extra_frames = (ccb->ccb_frame_size - 1) / MFI_FRAME_SIZE;
1346 1.1 bouyer
1347 1.1 bouyer DNPRINTF(MFI_D_DMA, "%s: sg_count: %d frame_size: %d frames_size: %d"
1348 1.1 bouyer " dm_nsegs: %d extra_frames: %d\n",
1349 1.1 bouyer DEVNAME(sc),
1350 1.1 bouyer hdr->mfh_sg_count,
1351 1.1 bouyer ccb->ccb_frame_size,
1352 1.1 bouyer sc->sc_frames_size,
1353 1.1 bouyer ccb->ccb_dmamap->dm_nsegs,
1354 1.1 bouyer ccb->ccb_extra_frames);
1355 1.1 bouyer
1356 1.13 xtraeme return 0;
1357 1.1 bouyer }
1358 1.1 bouyer
1359 1.13 xtraeme static int
1360 1.19 bouyer mfi_mgmt_internal(struct mfi_softc *sc, uint32_t opc, uint32_t dir,
1361 1.33 msaitoh uint32_t len, void *buf, uint8_t *mbox)
1362 1.33 msaitoh {
1363 1.1 bouyer struct mfi_ccb *ccb;
1364 1.1 bouyer int rv = 1;
1365 1.1 bouyer
1366 1.1 bouyer if ((ccb = mfi_get_ccb(sc)) == NULL)
1367 1.13 xtraeme return rv;
1368 1.19 bouyer rv = mfi_mgmt(ccb, NULL, opc, dir, len, buf, mbox);
1369 1.19 bouyer if (rv)
1370 1.19 bouyer return rv;
1371 1.19 bouyer
1372 1.19 bouyer if (cold) {
1373 1.19 bouyer if (mfi_poll(ccb))
1374 1.19 bouyer goto done;
1375 1.19 bouyer } else {
1376 1.19 bouyer mfi_post(sc, ccb);
1377 1.19 bouyer
1378 1.19 bouyer DNPRINTF(MFI_D_MISC, "%s: mfi_mgmt_internal sleeping\n",
1379 1.19 bouyer DEVNAME(sc));
1380 1.19 bouyer while (ccb->ccb_state != MFI_CCB_DONE)
1381 1.19 bouyer tsleep(ccb, PRIBIO, "mfi_mgmt", 0);
1382 1.19 bouyer
1383 1.19 bouyer if (ccb->ccb_flags & MFI_CCB_F_ERR)
1384 1.19 bouyer goto done;
1385 1.19 bouyer }
1386 1.19 bouyer rv = 0;
1387 1.19 bouyer
1388 1.19 bouyer done:
1389 1.19 bouyer mfi_put_ccb(ccb);
1390 1.19 bouyer return rv;
1391 1.19 bouyer }
1392 1.19 bouyer
1393 1.19 bouyer static int
1394 1.19 bouyer mfi_mgmt(struct mfi_ccb *ccb, struct scsipi_xfer *xs,
1395 1.19 bouyer uint32_t opc, uint32_t dir, uint32_t len, void *buf, uint8_t *mbox)
1396 1.19 bouyer {
1397 1.19 bouyer struct mfi_dcmd_frame *dcmd;
1398 1.19 bouyer
1399 1.19 bouyer DNPRINTF(MFI_D_MISC, "%s: mfi_mgmt %#x\n", DEVNAME(ccb->ccb_sc), opc);
1400 1.1 bouyer
1401 1.1 bouyer dcmd = &ccb->ccb_frame->mfr_dcmd;
1402 1.1 bouyer memset(dcmd->mdf_mbox, 0, MFI_MBOX_SIZE);
1403 1.1 bouyer dcmd->mdf_header.mfh_cmd = MFI_CMD_DCMD;
1404 1.1 bouyer dcmd->mdf_header.mfh_timeout = 0;
1405 1.1 bouyer
1406 1.1 bouyer dcmd->mdf_opcode = opc;
1407 1.1 bouyer dcmd->mdf_header.mfh_data_len = 0;
1408 1.1 bouyer ccb->ccb_direction = dir;
1409 1.19 bouyer ccb->ccb_xs = xs;
1410 1.1 bouyer ccb->ccb_done = mfi_mgmt_done;
1411 1.1 bouyer
1412 1.1 bouyer ccb->ccb_frame_size = MFI_DCMD_FRAME_SIZE;
1413 1.1 bouyer
1414 1.1 bouyer /* handle special opcodes */
1415 1.1 bouyer if (mbox)
1416 1.1 bouyer memcpy(dcmd->mdf_mbox, mbox, MFI_MBOX_SIZE);
1417 1.1 bouyer
1418 1.1 bouyer if (dir != MFI_DATA_NONE) {
1419 1.1 bouyer dcmd->mdf_header.mfh_data_len = len;
1420 1.1 bouyer ccb->ccb_data = buf;
1421 1.1 bouyer ccb->ccb_len = len;
1422 1.1 bouyer ccb->ccb_sgl = &dcmd->mdf_sgl;
1423 1.1 bouyer
1424 1.1 bouyer if (mfi_create_sgl(ccb, BUS_DMA_WAITOK))
1425 1.19 bouyer return 1;
1426 1.1 bouyer }
1427 1.19 bouyer return 0;
1428 1.1 bouyer }
1429 1.1 bouyer
1430 1.13 xtraeme static void
1431 1.1 bouyer mfi_mgmt_done(struct mfi_ccb *ccb)
1432 1.1 bouyer {
1433 1.19 bouyer struct scsipi_xfer *xs = ccb->ccb_xs;
1434 1.1 bouyer struct mfi_softc *sc = ccb->ccb_sc;
1435 1.1 bouyer struct mfi_frame_header *hdr = &ccb->ccb_frame->mfr_header;
1436 1.1 bouyer
1437 1.4 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done %#lx %#lx\n",
1438 1.4 bouyer DEVNAME(sc), (u_long)ccb, (u_long)ccb->ccb_frame);
1439 1.1 bouyer
1440 1.1 bouyer if (ccb->ccb_data != NULL) {
1441 1.1 bouyer DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done sync\n",
1442 1.1 bouyer DEVNAME(sc));
1443 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
1444 1.1 bouyer ccb->ccb_dmamap->dm_mapsize,
1445 1.1 bouyer (ccb->ccb_direction & MFI_DATA_IN) ?
1446 1.1 bouyer BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1447 1.1 bouyer
1448 1.1 bouyer bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap);
1449 1.1 bouyer }
1450 1.1 bouyer
1451 1.1 bouyer if (hdr->mfh_cmd_status != MFI_STAT_OK)
1452 1.1 bouyer ccb->ccb_flags |= MFI_CCB_F_ERR;
1453 1.1 bouyer
1454 1.1 bouyer ccb->ccb_state = MFI_CCB_DONE;
1455 1.19 bouyer if (xs) {
1456 1.19 bouyer if (hdr->mfh_cmd_status != MFI_STAT_OK) {
1457 1.19 bouyer xs->error = XS_DRIVER_STUFFUP;
1458 1.19 bouyer } else {
1459 1.19 bouyer xs->error = XS_NOERROR;
1460 1.19 bouyer xs->status = SCSI_OK;
1461 1.19 bouyer xs->resid = 0;
1462 1.19 bouyer }
1463 1.19 bouyer mfi_put_ccb(ccb);
1464 1.19 bouyer scsipi_done(xs);
1465 1.30 dyoung } else
1466 1.19 bouyer wakeup(ccb);
1467 1.1 bouyer }
1468 1.1 bouyer
1469 1.1 bouyer #if NBIO > 0
1470 1.1 bouyer int
1471 1.23 cegger mfi_ioctl(device_t dev, u_long cmd, void *addr)
1472 1.1 bouyer {
1473 1.26 dyoung struct mfi_softc *sc = device_private(dev);
1474 1.1 bouyer int error = 0;
1475 1.31 bouyer int s;
1476 1.31 bouyer
1477 1.31 bouyer KERNEL_LOCK(1, curlwp);
1478 1.31 bouyer s = splbio();
1479 1.1 bouyer
1480 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl ", DEVNAME(sc));
1481 1.1 bouyer
1482 1.1 bouyer switch (cmd) {
1483 1.1 bouyer case BIOCINQ:
1484 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "inq\n");
1485 1.1 bouyer error = mfi_ioctl_inq(sc, (struct bioc_inq *)addr);
1486 1.1 bouyer break;
1487 1.1 bouyer
1488 1.1 bouyer case BIOCVOL:
1489 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "vol\n");
1490 1.1 bouyer error = mfi_ioctl_vol(sc, (struct bioc_vol *)addr);
1491 1.1 bouyer break;
1492 1.1 bouyer
1493 1.1 bouyer case BIOCDISK:
1494 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "disk\n");
1495 1.1 bouyer error = mfi_ioctl_disk(sc, (struct bioc_disk *)addr);
1496 1.1 bouyer break;
1497 1.1 bouyer
1498 1.1 bouyer case BIOCALARM:
1499 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "alarm\n");
1500 1.1 bouyer error = mfi_ioctl_alarm(sc, (struct bioc_alarm *)addr);
1501 1.1 bouyer break;
1502 1.1 bouyer
1503 1.1 bouyer case BIOCBLINK:
1504 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "blink\n");
1505 1.1 bouyer error = mfi_ioctl_blink(sc, (struct bioc_blink *)addr);
1506 1.1 bouyer break;
1507 1.1 bouyer
1508 1.1 bouyer case BIOCSETSTATE:
1509 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "setstate\n");
1510 1.1 bouyer error = mfi_ioctl_setstate(sc, (struct bioc_setstate *)addr);
1511 1.1 bouyer break;
1512 1.1 bouyer
1513 1.1 bouyer default:
1514 1.1 bouyer DNPRINTF(MFI_D_IOCTL, " invalid ioctl\n");
1515 1.1 bouyer error = EINVAL;
1516 1.1 bouyer }
1517 1.4 bouyer splx(s);
1518 1.31 bouyer KERNEL_UNLOCK_ONE(curlwp);
1519 1.13 xtraeme
1520 1.4 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl return %x\n", DEVNAME(sc), error);
1521 1.13 xtraeme return error;
1522 1.1 bouyer }
1523 1.1 bouyer
1524 1.13 xtraeme static int
1525 1.1 bouyer mfi_ioctl_inq(struct mfi_softc *sc, struct bioc_inq *bi)
1526 1.1 bouyer {
1527 1.1 bouyer struct mfi_conf *cfg;
1528 1.1 bouyer int rv = EINVAL;
1529 1.1 bouyer
1530 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_inq\n", DEVNAME(sc));
1531 1.1 bouyer
1532 1.1 bouyer if (mfi_get_info(sc)) {
1533 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_inq failed\n",
1534 1.1 bouyer DEVNAME(sc));
1535 1.13 xtraeme return EIO;
1536 1.1 bouyer }
1537 1.1 bouyer
1538 1.1 bouyer /* get figures */
1539 1.1 bouyer cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK);
1540 1.19 bouyer if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN,
1541 1.19 bouyer sizeof *cfg, cfg, NULL))
1542 1.1 bouyer goto freeme;
1543 1.1 bouyer
1544 1.1 bouyer strlcpy(bi->bi_dev, DEVNAME(sc), sizeof(bi->bi_dev));
1545 1.1 bouyer bi->bi_novol = cfg->mfc_no_ld + cfg->mfc_no_hs;
1546 1.1 bouyer bi->bi_nodisk = sc->sc_info.mci_pd_disks_present;
1547 1.1 bouyer
1548 1.1 bouyer rv = 0;
1549 1.1 bouyer freeme:
1550 1.1 bouyer free(cfg, M_DEVBUF);
1551 1.13 xtraeme return rv;
1552 1.1 bouyer }
1553 1.1 bouyer
1554 1.13 xtraeme static int
1555 1.1 bouyer mfi_ioctl_vol(struct mfi_softc *sc, struct bioc_vol *bv)
1556 1.1 bouyer {
1557 1.1 bouyer int i, per, rv = EINVAL;
1558 1.1 bouyer uint8_t mbox[MFI_MBOX_SIZE];
1559 1.1 bouyer
1560 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol %#x\n",
1561 1.1 bouyer DEVNAME(sc), bv->bv_volid);
1562 1.1 bouyer
1563 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_LD_GET_LIST, MFI_DATA_IN,
1564 1.1 bouyer sizeof(sc->sc_ld_list), &sc->sc_ld_list, NULL))
1565 1.1 bouyer goto done;
1566 1.1 bouyer
1567 1.1 bouyer i = bv->bv_volid;
1568 1.1 bouyer mbox[0] = sc->sc_ld_list.mll_list[i].mll_ld.mld_target;
1569 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol target %#x\n",
1570 1.1 bouyer DEVNAME(sc), mbox[0]);
1571 1.1 bouyer
1572 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_LD_GET_INFO, MFI_DATA_IN,
1573 1.1 bouyer sizeof(sc->sc_ld_details), &sc->sc_ld_details, mbox))
1574 1.1 bouyer goto done;
1575 1.1 bouyer
1576 1.1 bouyer if (bv->bv_volid >= sc->sc_ld_list.mll_no_ld) {
1577 1.1 bouyer /* go do hotspares */
1578 1.1 bouyer rv = mfi_bio_hs(sc, bv->bv_volid, MFI_MGMT_VD, bv);
1579 1.1 bouyer goto done;
1580 1.1 bouyer }
1581 1.1 bouyer
1582 1.1 bouyer strlcpy(bv->bv_dev, sc->sc_ld[i].ld_dev, sizeof(bv->bv_dev));
1583 1.1 bouyer
1584 1.1 bouyer switch(sc->sc_ld_list.mll_list[i].mll_state) {
1585 1.1 bouyer case MFI_LD_OFFLINE:
1586 1.1 bouyer bv->bv_status = BIOC_SVOFFLINE;
1587 1.1 bouyer break;
1588 1.1 bouyer
1589 1.1 bouyer case MFI_LD_PART_DEGRADED:
1590 1.1 bouyer case MFI_LD_DEGRADED:
1591 1.1 bouyer bv->bv_status = BIOC_SVDEGRADED;
1592 1.1 bouyer break;
1593 1.1 bouyer
1594 1.1 bouyer case MFI_LD_ONLINE:
1595 1.1 bouyer bv->bv_status = BIOC_SVONLINE;
1596 1.1 bouyer break;
1597 1.1 bouyer
1598 1.1 bouyer default:
1599 1.1 bouyer bv->bv_status = BIOC_SVINVALID;
1600 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: invalid logical disk state %#x\n",
1601 1.1 bouyer DEVNAME(sc),
1602 1.1 bouyer sc->sc_ld_list.mll_list[i].mll_state);
1603 1.1 bouyer }
1604 1.1 bouyer
1605 1.1 bouyer /* additional status can modify MFI status */
1606 1.1 bouyer switch (sc->sc_ld_details.mld_progress.mlp_in_prog) {
1607 1.1 bouyer case MFI_LD_PROG_CC:
1608 1.1 bouyer case MFI_LD_PROG_BGI:
1609 1.1 bouyer bv->bv_status = BIOC_SVSCRUB;
1610 1.1 bouyer per = (int)sc->sc_ld_details.mld_progress.mlp_cc.mp_progress;
1611 1.1 bouyer bv->bv_percent = (per * 100) / 0xffff;
1612 1.1 bouyer bv->bv_seconds =
1613 1.1 bouyer sc->sc_ld_details.mld_progress.mlp_cc.mp_elapsed_seconds;
1614 1.1 bouyer break;
1615 1.1 bouyer
1616 1.1 bouyer case MFI_LD_PROG_FGI:
1617 1.1 bouyer case MFI_LD_PROG_RECONSTRUCT:
1618 1.1 bouyer /* nothing yet */
1619 1.1 bouyer break;
1620 1.1 bouyer }
1621 1.1 bouyer
1622 1.1 bouyer /*
1623 1.1 bouyer * The RAID levels are determined per the SNIA DDF spec, this is only
1624 1.1 bouyer * a subset that is valid for the MFI contrller.
1625 1.1 bouyer */
1626 1.1 bouyer bv->bv_level = sc->sc_ld_details.mld_cfg.mlc_parm.mpa_pri_raid;
1627 1.1 bouyer if (sc->sc_ld_details.mld_cfg.mlc_parm.mpa_sec_raid ==
1628 1.1 bouyer MFI_DDF_SRL_SPANNED)
1629 1.1 bouyer bv->bv_level *= 10;
1630 1.1 bouyer
1631 1.1 bouyer bv->bv_nodisk = sc->sc_ld_details.mld_cfg.mlc_parm.mpa_no_drv_per_span *
1632 1.1 bouyer sc->sc_ld_details.mld_cfg.mlc_parm.mpa_span_depth;
1633 1.1 bouyer
1634 1.1 bouyer bv->bv_size = sc->sc_ld_details.mld_size * 512; /* bytes per block */
1635 1.1 bouyer
1636 1.1 bouyer rv = 0;
1637 1.1 bouyer done:
1638 1.4 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol done %x\n",
1639 1.4 bouyer DEVNAME(sc), rv);
1640 1.13 xtraeme return rv;
1641 1.1 bouyer }
1642 1.1 bouyer
1643 1.13 xtraeme static int
1644 1.1 bouyer mfi_ioctl_disk(struct mfi_softc *sc, struct bioc_disk *bd)
1645 1.1 bouyer {
1646 1.1 bouyer struct mfi_conf *cfg;
1647 1.1 bouyer struct mfi_array *ar;
1648 1.1 bouyer struct mfi_ld_cfg *ld;
1649 1.1 bouyer struct mfi_pd_details *pd;
1650 1.4 bouyer struct scsipi_inquiry_data *inqbuf;
1651 1.1 bouyer char vend[8+16+4+1];
1652 1.1 bouyer int i, rv = EINVAL;
1653 1.1 bouyer int arr, vol, disk;
1654 1.1 bouyer uint32_t size;
1655 1.1 bouyer uint8_t mbox[MFI_MBOX_SIZE];
1656 1.1 bouyer
1657 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_disk %#x\n",
1658 1.1 bouyer DEVNAME(sc), bd->bd_diskid);
1659 1.1 bouyer
1660 1.4 bouyer pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK | M_ZERO);
1661 1.1 bouyer
1662 1.1 bouyer /* send single element command to retrieve size for full structure */
1663 1.1 bouyer cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK);
1664 1.19 bouyer if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN,
1665 1.19 bouyer sizeof *cfg, cfg, NULL))
1666 1.1 bouyer goto freeme;
1667 1.1 bouyer
1668 1.1 bouyer size = cfg->mfc_size;
1669 1.1 bouyer free(cfg, M_DEVBUF);
1670 1.1 bouyer
1671 1.1 bouyer /* memory for read config */
1672 1.13 xtraeme cfg = malloc(size, M_DEVBUF, M_WAITOK|M_ZERO);
1673 1.19 bouyer if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN,
1674 1.19 bouyer size, cfg, NULL))
1675 1.1 bouyer goto freeme;
1676 1.1 bouyer
1677 1.1 bouyer ar = cfg->mfc_array;
1678 1.1 bouyer
1679 1.1 bouyer /* calculate offset to ld structure */
1680 1.1 bouyer ld = (struct mfi_ld_cfg *)(
1681 1.1 bouyer ((uint8_t *)cfg) + offsetof(struct mfi_conf, mfc_array) +
1682 1.1 bouyer cfg->mfc_array_size * cfg->mfc_no_array);
1683 1.1 bouyer
1684 1.1 bouyer vol = bd->bd_volid;
1685 1.1 bouyer
1686 1.1 bouyer if (vol >= cfg->mfc_no_ld) {
1687 1.1 bouyer /* do hotspares */
1688 1.1 bouyer rv = mfi_bio_hs(sc, bd->bd_volid, MFI_MGMT_SD, bd);
1689 1.1 bouyer goto freeme;
1690 1.1 bouyer }
1691 1.1 bouyer
1692 1.1 bouyer /* find corresponding array for ld */
1693 1.1 bouyer for (i = 0, arr = 0; i < vol; i++)
1694 1.1 bouyer arr += ld[i].mlc_parm.mpa_span_depth;
1695 1.1 bouyer
1696 1.1 bouyer /* offset disk into pd list */
1697 1.1 bouyer disk = bd->bd_diskid % ld[vol].mlc_parm.mpa_no_drv_per_span;
1698 1.1 bouyer
1699 1.1 bouyer /* offset array index into the next spans */
1700 1.1 bouyer arr += bd->bd_diskid / ld[vol].mlc_parm.mpa_no_drv_per_span;
1701 1.1 bouyer
1702 1.1 bouyer bd->bd_target = ar[arr].pd[disk].mar_enc_slot;
1703 1.1 bouyer switch (ar[arr].pd[disk].mar_pd_state){
1704 1.1 bouyer case MFI_PD_UNCONFIG_GOOD:
1705 1.1 bouyer bd->bd_status = BIOC_SDUNUSED;
1706 1.1 bouyer break;
1707 1.1 bouyer
1708 1.1 bouyer case MFI_PD_HOTSPARE: /* XXX dedicated hotspare part of array? */
1709 1.1 bouyer bd->bd_status = BIOC_SDHOTSPARE;
1710 1.1 bouyer break;
1711 1.1 bouyer
1712 1.1 bouyer case MFI_PD_OFFLINE:
1713 1.1 bouyer bd->bd_status = BIOC_SDOFFLINE;
1714 1.1 bouyer break;
1715 1.1 bouyer
1716 1.1 bouyer case MFI_PD_FAILED:
1717 1.1 bouyer bd->bd_status = BIOC_SDFAILED;
1718 1.1 bouyer break;
1719 1.1 bouyer
1720 1.1 bouyer case MFI_PD_REBUILD:
1721 1.1 bouyer bd->bd_status = BIOC_SDREBUILD;
1722 1.1 bouyer break;
1723 1.1 bouyer
1724 1.1 bouyer case MFI_PD_ONLINE:
1725 1.1 bouyer bd->bd_status = BIOC_SDONLINE;
1726 1.1 bouyer break;
1727 1.1 bouyer
1728 1.1 bouyer case MFI_PD_UNCONFIG_BAD: /* XXX define new state in bio */
1729 1.1 bouyer default:
1730 1.1 bouyer bd->bd_status = BIOC_SDINVALID;
1731 1.1 bouyer break;
1732 1.1 bouyer
1733 1.1 bouyer }
1734 1.1 bouyer
1735 1.1 bouyer /* get the remaining fields */
1736 1.1 bouyer *((uint16_t *)&mbox) = ar[arr].pd[disk].mar_pd.mfp_id;
1737 1.4 bouyer memset(pd, 0, sizeof(*pd));
1738 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_PD_GET_INFO, MFI_DATA_IN,
1739 1.1 bouyer sizeof *pd, pd, mbox))
1740 1.1 bouyer goto freeme;
1741 1.1 bouyer
1742 1.1 bouyer bd->bd_size = pd->mpd_size * 512; /* bytes per block */
1743 1.1 bouyer
1744 1.1 bouyer /* if pd->mpd_enc_idx is 0 then it is not in an enclosure */
1745 1.1 bouyer bd->bd_channel = pd->mpd_enc_idx;
1746 1.1 bouyer
1747 1.4 bouyer inqbuf = (struct scsipi_inquiry_data *)&pd->mpd_inq_data;
1748 1.1 bouyer memcpy(vend, inqbuf->vendor, sizeof vend - 1);
1749 1.1 bouyer vend[sizeof vend - 1] = '\0';
1750 1.1 bouyer strlcpy(bd->bd_vendor, vend, sizeof(bd->bd_vendor));
1751 1.1 bouyer
1752 1.1 bouyer /* XXX find a way to retrieve serial nr from drive */
1753 1.1 bouyer /* XXX find a way to get bd_procdev */
1754 1.1 bouyer
1755 1.1 bouyer rv = 0;
1756 1.1 bouyer freeme:
1757 1.1 bouyer free(pd, M_DEVBUF);
1758 1.1 bouyer free(cfg, M_DEVBUF);
1759 1.1 bouyer
1760 1.13 xtraeme return rv;
1761 1.1 bouyer }
1762 1.1 bouyer
1763 1.13 xtraeme static int
1764 1.1 bouyer mfi_ioctl_alarm(struct mfi_softc *sc, struct bioc_alarm *ba)
1765 1.1 bouyer {
1766 1.1 bouyer uint32_t opc, dir = MFI_DATA_NONE;
1767 1.1 bouyer int rv = 0;
1768 1.1 bouyer int8_t ret;
1769 1.1 bouyer
1770 1.1 bouyer switch(ba->ba_opcode) {
1771 1.1 bouyer case BIOC_SADISABLE:
1772 1.1 bouyer opc = MR_DCMD_SPEAKER_DISABLE;
1773 1.1 bouyer break;
1774 1.1 bouyer
1775 1.1 bouyer case BIOC_SAENABLE:
1776 1.1 bouyer opc = MR_DCMD_SPEAKER_ENABLE;
1777 1.1 bouyer break;
1778 1.1 bouyer
1779 1.1 bouyer case BIOC_SASILENCE:
1780 1.1 bouyer opc = MR_DCMD_SPEAKER_SILENCE;
1781 1.1 bouyer break;
1782 1.1 bouyer
1783 1.1 bouyer case BIOC_GASTATUS:
1784 1.1 bouyer opc = MR_DCMD_SPEAKER_GET;
1785 1.1 bouyer dir = MFI_DATA_IN;
1786 1.1 bouyer break;
1787 1.1 bouyer
1788 1.1 bouyer case BIOC_SATEST:
1789 1.1 bouyer opc = MR_DCMD_SPEAKER_TEST;
1790 1.1 bouyer break;
1791 1.1 bouyer
1792 1.1 bouyer default:
1793 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_alarm biocalarm invalid "
1794 1.1 bouyer "opcode %x\n", DEVNAME(sc), ba->ba_opcode);
1795 1.13 xtraeme return EINVAL;
1796 1.1 bouyer }
1797 1.1 bouyer
1798 1.19 bouyer if (mfi_mgmt_internal(sc, opc, dir, sizeof(ret), &ret, NULL))
1799 1.1 bouyer rv = EINVAL;
1800 1.1 bouyer else
1801 1.1 bouyer if (ba->ba_opcode == BIOC_GASTATUS)
1802 1.1 bouyer ba->ba_status = ret;
1803 1.1 bouyer else
1804 1.1 bouyer ba->ba_status = 0;
1805 1.1 bouyer
1806 1.13 xtraeme return rv;
1807 1.1 bouyer }
1808 1.1 bouyer
1809 1.13 xtraeme static int
1810 1.1 bouyer mfi_ioctl_blink(struct mfi_softc *sc, struct bioc_blink *bb)
1811 1.1 bouyer {
1812 1.1 bouyer int i, found, rv = EINVAL;
1813 1.1 bouyer uint8_t mbox[MFI_MBOX_SIZE];
1814 1.1 bouyer uint32_t cmd;
1815 1.1 bouyer struct mfi_pd_list *pd;
1816 1.1 bouyer
1817 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_blink %x\n", DEVNAME(sc),
1818 1.1 bouyer bb->bb_status);
1819 1.1 bouyer
1820 1.1 bouyer /* channel 0 means not in an enclosure so can't be blinked */
1821 1.1 bouyer if (bb->bb_channel == 0)
1822 1.13 xtraeme return EINVAL;
1823 1.1 bouyer
1824 1.1 bouyer pd = malloc(MFI_PD_LIST_SIZE, M_DEVBUF, M_WAITOK);
1825 1.1 bouyer
1826 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_PD_GET_LIST, MFI_DATA_IN,
1827 1.1 bouyer MFI_PD_LIST_SIZE, pd, NULL))
1828 1.1 bouyer goto done;
1829 1.1 bouyer
1830 1.1 bouyer for (i = 0, found = 0; i < pd->mpl_no_pd; i++)
1831 1.1 bouyer if (bb->bb_channel == pd->mpl_address[i].mpa_enc_index &&
1832 1.1 bouyer bb->bb_target == pd->mpl_address[i].mpa_enc_slot) {
1833 1.1 bouyer found = 1;
1834 1.1 bouyer break;
1835 1.1 bouyer }
1836 1.1 bouyer
1837 1.1 bouyer if (!found)
1838 1.1 bouyer goto done;
1839 1.1 bouyer
1840 1.1 bouyer memset(mbox, 0, sizeof mbox);
1841 1.1 bouyer
1842 1.20 yamt *((uint16_t *)&mbox) = pd->mpl_address[i].mpa_pd_id;
1843 1.1 bouyer
1844 1.1 bouyer switch (bb->bb_status) {
1845 1.1 bouyer case BIOC_SBUNBLINK:
1846 1.1 bouyer cmd = MR_DCMD_PD_UNBLINK;
1847 1.1 bouyer break;
1848 1.1 bouyer
1849 1.1 bouyer case BIOC_SBBLINK:
1850 1.1 bouyer cmd = MR_DCMD_PD_BLINK;
1851 1.1 bouyer break;
1852 1.1 bouyer
1853 1.1 bouyer case BIOC_SBALARM:
1854 1.1 bouyer default:
1855 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_blink biocblink invalid "
1856 1.1 bouyer "opcode %x\n", DEVNAME(sc), bb->bb_status);
1857 1.1 bouyer goto done;
1858 1.1 bouyer }
1859 1.1 bouyer
1860 1.1 bouyer
1861 1.19 bouyer if (mfi_mgmt_internal(sc, cmd, MFI_DATA_NONE, 0, NULL, mbox))
1862 1.1 bouyer goto done;
1863 1.1 bouyer
1864 1.1 bouyer rv = 0;
1865 1.1 bouyer done:
1866 1.1 bouyer free(pd, M_DEVBUF);
1867 1.13 xtraeme return rv;
1868 1.1 bouyer }
1869 1.1 bouyer
1870 1.13 xtraeme static int
1871 1.1 bouyer mfi_ioctl_setstate(struct mfi_softc *sc, struct bioc_setstate *bs)
1872 1.1 bouyer {
1873 1.1 bouyer struct mfi_pd_list *pd;
1874 1.1 bouyer int i, found, rv = EINVAL;
1875 1.1 bouyer uint8_t mbox[MFI_MBOX_SIZE];
1876 1.1 bouyer uint32_t cmd;
1877 1.1 bouyer
1878 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_setstate %x\n", DEVNAME(sc),
1879 1.1 bouyer bs->bs_status);
1880 1.1 bouyer
1881 1.1 bouyer pd = malloc(MFI_PD_LIST_SIZE, M_DEVBUF, M_WAITOK);
1882 1.1 bouyer
1883 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_PD_GET_LIST, MFI_DATA_IN,
1884 1.1 bouyer MFI_PD_LIST_SIZE, pd, NULL))
1885 1.1 bouyer goto done;
1886 1.1 bouyer
1887 1.1 bouyer for (i = 0, found = 0; i < pd->mpl_no_pd; i++)
1888 1.1 bouyer if (bs->bs_channel == pd->mpl_address[i].mpa_enc_index &&
1889 1.1 bouyer bs->bs_target == pd->mpl_address[i].mpa_enc_slot) {
1890 1.1 bouyer found = 1;
1891 1.1 bouyer break;
1892 1.1 bouyer }
1893 1.1 bouyer
1894 1.1 bouyer if (!found)
1895 1.1 bouyer goto done;
1896 1.1 bouyer
1897 1.1 bouyer memset(mbox, 0, sizeof mbox);
1898 1.1 bouyer
1899 1.20 yamt *((uint16_t *)&mbox) = pd->mpl_address[i].mpa_pd_id;
1900 1.1 bouyer
1901 1.1 bouyer switch (bs->bs_status) {
1902 1.1 bouyer case BIOC_SSONLINE:
1903 1.1 bouyer mbox[2] = MFI_PD_ONLINE;
1904 1.1 bouyer cmd = MD_DCMD_PD_SET_STATE;
1905 1.1 bouyer break;
1906 1.1 bouyer
1907 1.1 bouyer case BIOC_SSOFFLINE:
1908 1.1 bouyer mbox[2] = MFI_PD_OFFLINE;
1909 1.1 bouyer cmd = MD_DCMD_PD_SET_STATE;
1910 1.1 bouyer break;
1911 1.1 bouyer
1912 1.1 bouyer case BIOC_SSHOTSPARE:
1913 1.1 bouyer mbox[2] = MFI_PD_HOTSPARE;
1914 1.1 bouyer cmd = MD_DCMD_PD_SET_STATE;
1915 1.1 bouyer break;
1916 1.1 bouyer /*
1917 1.1 bouyer case BIOC_SSREBUILD:
1918 1.1 bouyer cmd = MD_DCMD_PD_REBUILD;
1919 1.1 bouyer break;
1920 1.1 bouyer */
1921 1.1 bouyer default:
1922 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_setstate invalid "
1923 1.1 bouyer "opcode %x\n", DEVNAME(sc), bs->bs_status);
1924 1.1 bouyer goto done;
1925 1.1 bouyer }
1926 1.1 bouyer
1927 1.1 bouyer
1928 1.19 bouyer if (mfi_mgmt_internal(sc, MD_DCMD_PD_SET_STATE, MFI_DATA_NONE,
1929 1.19 bouyer 0, NULL, mbox))
1930 1.1 bouyer goto done;
1931 1.1 bouyer
1932 1.1 bouyer rv = 0;
1933 1.1 bouyer done:
1934 1.1 bouyer free(pd, M_DEVBUF);
1935 1.13 xtraeme return rv;
1936 1.1 bouyer }
1937 1.1 bouyer
1938 1.13 xtraeme static int
1939 1.1 bouyer mfi_bio_hs(struct mfi_softc *sc, int volid, int type, void *bio_hs)
1940 1.1 bouyer {
1941 1.1 bouyer struct mfi_conf *cfg;
1942 1.1 bouyer struct mfi_hotspare *hs;
1943 1.1 bouyer struct mfi_pd_details *pd;
1944 1.1 bouyer struct bioc_disk *sdhs;
1945 1.1 bouyer struct bioc_vol *vdhs;
1946 1.4 bouyer struct scsipi_inquiry_data *inqbuf;
1947 1.1 bouyer char vend[8+16+4+1];
1948 1.1 bouyer int i, rv = EINVAL;
1949 1.1 bouyer uint32_t size;
1950 1.1 bouyer uint8_t mbox[MFI_MBOX_SIZE];
1951 1.1 bouyer
1952 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs %d\n", DEVNAME(sc), volid);
1953 1.1 bouyer
1954 1.1 bouyer if (!bio_hs)
1955 1.13 xtraeme return EINVAL;
1956 1.1 bouyer
1957 1.4 bouyer pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK | M_ZERO);
1958 1.1 bouyer
1959 1.1 bouyer /* send single element command to retrieve size for full structure */
1960 1.1 bouyer cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK);
1961 1.19 bouyer if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN,
1962 1.19 bouyer sizeof *cfg, cfg, NULL))
1963 1.1 bouyer goto freeme;
1964 1.1 bouyer
1965 1.1 bouyer size = cfg->mfc_size;
1966 1.1 bouyer free(cfg, M_DEVBUF);
1967 1.1 bouyer
1968 1.1 bouyer /* memory for read config */
1969 1.13 xtraeme cfg = malloc(size, M_DEVBUF, M_WAITOK|M_ZERO);
1970 1.19 bouyer if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN,
1971 1.19 bouyer size, cfg, NULL))
1972 1.1 bouyer goto freeme;
1973 1.1 bouyer
1974 1.1 bouyer /* calculate offset to hs structure */
1975 1.1 bouyer hs = (struct mfi_hotspare *)(
1976 1.1 bouyer ((uint8_t *)cfg) + offsetof(struct mfi_conf, mfc_array) +
1977 1.1 bouyer cfg->mfc_array_size * cfg->mfc_no_array +
1978 1.1 bouyer cfg->mfc_ld_size * cfg->mfc_no_ld);
1979 1.1 bouyer
1980 1.1 bouyer if (volid < cfg->mfc_no_ld)
1981 1.1 bouyer goto freeme; /* not a hotspare */
1982 1.1 bouyer
1983 1.1 bouyer if (volid > (cfg->mfc_no_ld + cfg->mfc_no_hs))
1984 1.1 bouyer goto freeme; /* not a hotspare */
1985 1.1 bouyer
1986 1.1 bouyer /* offset into hotspare structure */
1987 1.1 bouyer i = volid - cfg->mfc_no_ld;
1988 1.1 bouyer
1989 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs i %d volid %d no_ld %d no_hs %d "
1990 1.1 bouyer "hs %p cfg %p id %02x\n", DEVNAME(sc), i, volid, cfg->mfc_no_ld,
1991 1.1 bouyer cfg->mfc_no_hs, hs, cfg, hs[i].mhs_pd.mfp_id);
1992 1.1 bouyer
1993 1.1 bouyer /* get pd fields */
1994 1.1 bouyer memset(mbox, 0, sizeof mbox);
1995 1.1 bouyer *((uint16_t *)&mbox) = hs[i].mhs_pd.mfp_id;
1996 1.19 bouyer if (mfi_mgmt_internal(sc, MR_DCMD_PD_GET_INFO, MFI_DATA_IN,
1997 1.1 bouyer sizeof *pd, pd, mbox)) {
1998 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs illegal PD\n",
1999 1.1 bouyer DEVNAME(sc));
2000 1.1 bouyer goto freeme;
2001 1.1 bouyer }
2002 1.1 bouyer
2003 1.1 bouyer switch (type) {
2004 1.1 bouyer case MFI_MGMT_VD:
2005 1.1 bouyer vdhs = bio_hs;
2006 1.1 bouyer vdhs->bv_status = BIOC_SVONLINE;
2007 1.14 xtraeme vdhs->bv_size = pd->mpd_size * 512; /* bytes per block */
2008 1.1 bouyer vdhs->bv_level = -1; /* hotspare */
2009 1.1 bouyer vdhs->bv_nodisk = 1;
2010 1.1 bouyer break;
2011 1.1 bouyer
2012 1.1 bouyer case MFI_MGMT_SD:
2013 1.1 bouyer sdhs = bio_hs;
2014 1.1 bouyer sdhs->bd_status = BIOC_SDHOTSPARE;
2015 1.14 xtraeme sdhs->bd_size = pd->mpd_size * 512; /* bytes per block */
2016 1.1 bouyer sdhs->bd_channel = pd->mpd_enc_idx;
2017 1.1 bouyer sdhs->bd_target = pd->mpd_enc_slot;
2018 1.4 bouyer inqbuf = (struct scsipi_inquiry_data *)&pd->mpd_inq_data;
2019 1.4 bouyer memcpy(vend, inqbuf->vendor, sizeof(vend) - 1);
2020 1.1 bouyer vend[sizeof vend - 1] = '\0';
2021 1.1 bouyer strlcpy(sdhs->bd_vendor, vend, sizeof(sdhs->bd_vendor));
2022 1.1 bouyer break;
2023 1.1 bouyer
2024 1.1 bouyer default:
2025 1.1 bouyer goto freeme;
2026 1.1 bouyer }
2027 1.1 bouyer
2028 1.1 bouyer DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs 6\n", DEVNAME(sc));
2029 1.1 bouyer rv = 0;
2030 1.1 bouyer freeme:
2031 1.1 bouyer free(pd, M_DEVBUF);
2032 1.1 bouyer free(cfg, M_DEVBUF);
2033 1.1 bouyer
2034 1.13 xtraeme return rv;
2035 1.1 bouyer }
2036 1.1 bouyer
2037 1.13 xtraeme static int
2038 1.24 dyoung mfi_destroy_sensors(struct mfi_softc *sc)
2039 1.24 dyoung {
2040 1.27 dyoung if (sc->sc_sme == NULL)
2041 1.27 dyoung return 0;
2042 1.24 dyoung sysmon_envsys_unregister(sc->sc_sme);
2043 1.27 dyoung sc->sc_sme = NULL;
2044 1.24 dyoung free(sc->sc_sensor, M_DEVBUF);
2045 1.24 dyoung return 0;
2046 1.24 dyoung }
2047 1.24 dyoung
2048 1.24 dyoung static int
2049 1.1 bouyer mfi_create_sensors(struct mfi_softc *sc)
2050 1.1 bouyer {
2051 1.13 xtraeme int i;
2052 1.4 bouyer int nsensors = sc->sc_ld_cnt;
2053 1.32 msaitoh int rv;
2054 1.1 bouyer
2055 1.11 xtraeme sc->sc_sme = sysmon_envsys_create();
2056 1.11 xtraeme sc->sc_sensor = malloc(sizeof(envsys_data_t) * nsensors,
2057 1.11 xtraeme M_DEVBUF, M_NOWAIT | M_ZERO);
2058 1.11 xtraeme if (sc->sc_sensor == NULL) {
2059 1.11 xtraeme aprint_error("%s: can't allocate envsys_data_t\n",
2060 1.4 bouyer DEVNAME(sc));
2061 1.13 xtraeme return ENOMEM;
2062 1.4 bouyer }
2063 1.6 xtraeme
2064 1.4 bouyer for (i = 0; i < nsensors; i++) {
2065 1.11 xtraeme sc->sc_sensor[i].units = ENVSYS_DRIVE;
2066 1.35 pgoyette sc->sc_sensor[i].state = ENVSYS_SINVALID;
2067 1.36 pgoyette sc->sc_sensor[i].value_cur = ENVSYS_DRIVE_EMPTY;
2068 1.6 xtraeme /* Enable monitoring for drive state changes */
2069 1.11 xtraeme sc->sc_sensor[i].flags |= ENVSYS_FMONSTCHANGED;
2070 1.4 bouyer /* logical drives */
2071 1.11 xtraeme snprintf(sc->sc_sensor[i].desc,
2072 1.11 xtraeme sizeof(sc->sc_sensor[i].desc), "%s:%d",
2073 1.4 bouyer DEVNAME(sc), i);
2074 1.11 xtraeme if (sysmon_envsys_sensor_attach(sc->sc_sme,
2075 1.11 xtraeme &sc->sc_sensor[i]))
2076 1.11 xtraeme goto out;
2077 1.4 bouyer }
2078 1.6 xtraeme
2079 1.11 xtraeme sc->sc_sme->sme_name = DEVNAME(sc);
2080 1.11 xtraeme sc->sc_sme->sme_cookie = sc;
2081 1.11 xtraeme sc->sc_sme->sme_refresh = mfi_sensor_refresh;
2082 1.32 msaitoh rv = sysmon_envsys_register(sc->sc_sme);
2083 1.32 msaitoh if (rv != 0) {
2084 1.32 msaitoh aprint_error("%s: unable to register with sysmon (rv = %d)\n",
2085 1.32 msaitoh DEVNAME(sc), rv);
2086 1.11 xtraeme goto out;
2087 1.1 bouyer }
2088 1.13 xtraeme return 0;
2089 1.11 xtraeme
2090 1.11 xtraeme out:
2091 1.11 xtraeme free(sc->sc_sensor, M_DEVBUF);
2092 1.11 xtraeme sysmon_envsys_destroy(sc->sc_sme);
2093 1.32 msaitoh sc->sc_sme = NULL;
2094 1.11 xtraeme return EINVAL;
2095 1.1 bouyer }
2096 1.1 bouyer
2097 1.13 xtraeme static void
2098 1.11 xtraeme mfi_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *edata)
2099 1.1 bouyer {
2100 1.4 bouyer struct mfi_softc *sc = sme->sme_cookie;
2101 1.1 bouyer struct bioc_vol bv;
2102 1.4 bouyer int s;
2103 1.28 bouyer int error;
2104 1.1 bouyer
2105 1.6 xtraeme if (edata->sensor >= sc->sc_ld_cnt)
2106 1.11 xtraeme return;
2107 1.1 bouyer
2108 1.22 cegger memset(&bv, 0, sizeof(bv));
2109 1.6 xtraeme bv.bv_volid = edata->sensor;
2110 1.28 bouyer KERNEL_LOCK(1, curlwp);
2111 1.4 bouyer s = splbio();
2112 1.28 bouyer error = mfi_ioctl_vol(sc, &bv);
2113 1.4 bouyer splx(s);
2114 1.28 bouyer KERNEL_UNLOCK_ONE(curlwp);
2115 1.28 bouyer if (error)
2116 1.28 bouyer return;
2117 1.1 bouyer
2118 1.4 bouyer switch(bv.bv_status) {
2119 1.4 bouyer case BIOC_SVOFFLINE:
2120 1.6 xtraeme edata->value_cur = ENVSYS_DRIVE_FAIL;
2121 1.6 xtraeme edata->state = ENVSYS_SCRITICAL;
2122 1.4 bouyer break;
2123 1.1 bouyer
2124 1.4 bouyer case BIOC_SVDEGRADED:
2125 1.6 xtraeme edata->value_cur = ENVSYS_DRIVE_PFAIL;
2126 1.6 xtraeme edata->state = ENVSYS_SCRITICAL;
2127 1.4 bouyer break;
2128 1.1 bouyer
2129 1.4 bouyer case BIOC_SVSCRUB:
2130 1.4 bouyer case BIOC_SVONLINE:
2131 1.6 xtraeme edata->value_cur = ENVSYS_DRIVE_ONLINE;
2132 1.6 xtraeme edata->state = ENVSYS_SVALID;
2133 1.4 bouyer break;
2134 1.1 bouyer
2135 1.4 bouyer case BIOC_SVINVALID:
2136 1.4 bouyer /* FALLTRHOUGH */
2137 1.4 bouyer default:
2138 1.6 xtraeme edata->value_cur = 0; /* unknown */
2139 1.6 xtraeme edata->state = ENVSYS_SINVALID;
2140 1.1 bouyer }
2141 1.4 bouyer }
2142 1.4 bouyer
2143 1.1 bouyer #endif /* NBIO > 0 */
2144 1.12 xtraeme
2145 1.13 xtraeme static uint32_t
2146 1.12 xtraeme mfi_xscale_fw_state(struct mfi_softc *sc)
2147 1.12 xtraeme {
2148 1.12 xtraeme return mfi_read(sc, MFI_OMSG0);
2149 1.12 xtraeme }
2150 1.30 dyoung
2151 1.13 xtraeme static void
2152 1.24 dyoung mfi_xscale_intr_dis(struct mfi_softc *sc)
2153 1.24 dyoung {
2154 1.24 dyoung mfi_write(sc, MFI_OMSK, 0);
2155 1.24 dyoung }
2156 1.24 dyoung
2157 1.24 dyoung static void
2158 1.12 xtraeme mfi_xscale_intr_ena(struct mfi_softc *sc)
2159 1.12 xtraeme {
2160 1.12 xtraeme mfi_write(sc, MFI_OMSK, MFI_ENABLE_INTR);
2161 1.12 xtraeme }
2162 1.30 dyoung
2163 1.13 xtraeme static int
2164 1.12 xtraeme mfi_xscale_intr(struct mfi_softc *sc)
2165 1.12 xtraeme {
2166 1.12 xtraeme uint32_t status;
2167 1.12 xtraeme
2168 1.12 xtraeme status = mfi_read(sc, MFI_OSTS);
2169 1.12 xtraeme if (!ISSET(status, MFI_OSTS_INTR_VALID))
2170 1.12 xtraeme return 0;
2171 1.12 xtraeme
2172 1.12 xtraeme /* write status back to acknowledge interrupt */
2173 1.12 xtraeme mfi_write(sc, MFI_OSTS, status);
2174 1.12 xtraeme return 1;
2175 1.12 xtraeme }
2176 1.30 dyoung
2177 1.13 xtraeme static void
2178 1.12 xtraeme mfi_xscale_post(struct mfi_softc *sc, struct mfi_ccb *ccb)
2179 1.12 xtraeme {
2180 1.14 xtraeme bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames),
2181 1.14 xtraeme ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames),
2182 1.14 xtraeme sc->sc_frames_size, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2183 1.14 xtraeme bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_sense),
2184 1.14 xtraeme ccb->ccb_psense - MFIMEM_DVA(sc->sc_sense),
2185 1.14 xtraeme MFI_SENSE_SIZE, BUS_DMASYNC_PREREAD);
2186 1.14 xtraeme
2187 1.12 xtraeme mfi_write(sc, MFI_IQP, (ccb->ccb_pframe >> 3) |
2188 1.12 xtraeme ccb->ccb_extra_frames);
2189 1.12 xtraeme }
2190 1.30 dyoung
2191 1.13 xtraeme static uint32_t
2192 1.12 xtraeme mfi_ppc_fw_state(struct mfi_softc *sc)
2193 1.12 xtraeme {
2194 1.12 xtraeme return mfi_read(sc, MFI_OSP);
2195 1.12 xtraeme }
2196 1.30 dyoung
2197 1.13 xtraeme static void
2198 1.24 dyoung mfi_ppc_intr_dis(struct mfi_softc *sc)
2199 1.24 dyoung {
2200 1.24 dyoung /* Taking a wild guess --dyoung */
2201 1.24 dyoung mfi_write(sc, MFI_OMSK, ~(uint32_t)0x0);
2202 1.24 dyoung mfi_write(sc, MFI_ODC, 0xffffffff);
2203 1.24 dyoung }
2204 1.24 dyoung
2205 1.24 dyoung static void
2206 1.12 xtraeme mfi_ppc_intr_ena(struct mfi_softc *sc)
2207 1.12 xtraeme {
2208 1.12 xtraeme mfi_write(sc, MFI_ODC, 0xffffffff);
2209 1.12 xtraeme mfi_write(sc, MFI_OMSK, ~0x80000004);
2210 1.12 xtraeme }
2211 1.30 dyoung
2212 1.13 xtraeme static int
2213 1.12 xtraeme mfi_ppc_intr(struct mfi_softc *sc)
2214 1.12 xtraeme {
2215 1.12 xtraeme uint32_t status;
2216 1.30 dyoung
2217 1.12 xtraeme status = mfi_read(sc, MFI_OSTS);
2218 1.12 xtraeme if (!ISSET(status, MFI_OSTS_PPC_INTR_VALID))
2219 1.12 xtraeme return 0;
2220 1.30 dyoung
2221 1.12 xtraeme /* write status back to acknowledge interrupt */
2222 1.12 xtraeme mfi_write(sc, MFI_ODC, status);
2223 1.12 xtraeme return 1;
2224 1.12 xtraeme }
2225 1.30 dyoung
2226 1.13 xtraeme static void
2227 1.12 xtraeme mfi_ppc_post(struct mfi_softc *sc, struct mfi_ccb *ccb)
2228 1.12 xtraeme {
2229 1.12 xtraeme mfi_write(sc, MFI_IQP, 0x1 | ccb->ccb_pframe |
2230 1.12 xtraeme (ccb->ccb_extra_frames << 1));
2231 1.12 xtraeme }
2232 1.33 msaitoh
2233 1.33 msaitoh u_int32_t
2234 1.33 msaitoh mfi_gen2_fw_state(struct mfi_softc *sc)
2235 1.33 msaitoh {
2236 1.33 msaitoh return (mfi_read(sc, MFI_OSP));
2237 1.33 msaitoh }
2238 1.33 msaitoh
2239 1.33 msaitoh void
2240 1.33 msaitoh mfi_gen2_intr_dis(struct mfi_softc *sc)
2241 1.33 msaitoh {
2242 1.33 msaitoh mfi_write(sc, MFI_OMSK, 0xffffffff);
2243 1.33 msaitoh mfi_write(sc, MFI_ODC, 0xffffffff);
2244 1.33 msaitoh }
2245 1.33 msaitoh
2246 1.33 msaitoh void
2247 1.33 msaitoh mfi_gen2_intr_ena(struct mfi_softc *sc)
2248 1.33 msaitoh {
2249 1.33 msaitoh mfi_write(sc, MFI_ODC, 0xffffffff);
2250 1.33 msaitoh mfi_write(sc, MFI_OMSK, ~MFI_OSTS_GEN2_INTR_VALID);
2251 1.33 msaitoh }
2252 1.33 msaitoh
2253 1.33 msaitoh int
2254 1.33 msaitoh mfi_gen2_intr(struct mfi_softc *sc)
2255 1.33 msaitoh {
2256 1.33 msaitoh u_int32_t status;
2257 1.33 msaitoh
2258 1.33 msaitoh status = mfi_read(sc, MFI_OSTS);
2259 1.33 msaitoh if (!ISSET(status, MFI_OSTS_GEN2_INTR_VALID))
2260 1.33 msaitoh return (0);
2261 1.33 msaitoh
2262 1.33 msaitoh /* write status back to acknowledge interrupt */
2263 1.33 msaitoh mfi_write(sc, MFI_ODC, status);
2264 1.33 msaitoh
2265 1.33 msaitoh return (1);
2266 1.33 msaitoh }
2267 1.33 msaitoh
2268 1.33 msaitoh void
2269 1.33 msaitoh mfi_gen2_post(struct mfi_softc *sc, struct mfi_ccb *ccb)
2270 1.33 msaitoh {
2271 1.33 msaitoh mfi_write(sc, MFI_IQP, 0x1 | ccb->ccb_pframe |
2272 1.33 msaitoh (ccb->ccb_extra_frames << 1));
2273 1.33 msaitoh }
2274 1.38 sborrill
2275 1.38 sborrill u_int32_t
2276 1.38 sborrill mfi_skinny_fw_state(struct mfi_softc *sc)
2277 1.38 sborrill {
2278 1.38 sborrill return (mfi_read(sc, MFI_OSP));
2279 1.38 sborrill }
2280 1.38 sborrill
2281 1.38 sborrill void
2282 1.38 sborrill mfi_skinny_intr_dis(struct mfi_softc *sc)
2283 1.38 sborrill {
2284 1.38 sborrill mfi_write(sc, MFI_OMSK, 0);
2285 1.38 sborrill }
2286 1.38 sborrill
2287 1.38 sborrill void
2288 1.38 sborrill mfi_skinny_intr_ena(struct mfi_softc *sc)
2289 1.38 sborrill {
2290 1.38 sborrill mfi_write(sc, MFI_OMSK, ~0x00000001);
2291 1.38 sborrill }
2292 1.38 sborrill
2293 1.38 sborrill int
2294 1.38 sborrill mfi_skinny_intr(struct mfi_softc *sc)
2295 1.38 sborrill {
2296 1.38 sborrill u_int32_t status;
2297 1.38 sborrill
2298 1.38 sborrill status = mfi_read(sc, MFI_OSTS);
2299 1.38 sborrill if (!ISSET(status, MFI_OSTS_SKINNY_INTR_VALID))
2300 1.38 sborrill return (0);
2301 1.38 sborrill
2302 1.38 sborrill /* write status back to acknowledge interrupt */
2303 1.38 sborrill mfi_write(sc, MFI_OSTS, status);
2304 1.38 sborrill
2305 1.38 sborrill return (1);
2306 1.38 sborrill }
2307 1.38 sborrill
2308 1.38 sborrill void
2309 1.38 sborrill mfi_skinny_post(struct mfi_softc *sc, struct mfi_ccb *ccb)
2310 1.38 sborrill {
2311 1.38 sborrill mfi_write(sc, MFI_IQPL, 0x1 | ccb->ccb_pframe |
2312 1.38 sborrill (ccb->ccb_extra_frames << 1));
2313 1.38 sborrill mfi_write(sc, MFI_IQPH, 0x00000000);
2314 1.38 sborrill }
2315