mfi.c revision 1.1
1 /* $OpenBSD: mfi.c,v 1.66 2006/11/28 23:59:45 dlg Exp $ */ 2 /* 3 * Copyright (c) 2006 Marco Peereboom <marco (at) peereboom.us> 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 /* #include "bio.h" XXX */ 19 20 #include <sys/param.h> 21 #include <sys/systm.h> 22 #include <sys/buf.h> 23 #include <sys/ioctl.h> 24 #include <sys/device.h> 25 #include <sys/kernel.h> 26 #include <sys/malloc.h> 27 #include <sys/proc.h> 28 29 #include <uvm/uvm_param.h> 30 31 #include <machine/bus.h> 32 33 #include <dev/scsipi/scsipi_all.h> 34 #include <dev/scsipi/scsi_all.h> 35 #include <dev/scsipi/scsi_spc.h> 36 #include <dev/scsipi/scsipi_disk.h> 37 #include <dev/scsipi/scsi_disk.h> 38 #include <dev/scsipi/scsiconf.h> 39 40 #include <dev/ic/mfireg.h> 41 #include <dev/ic/mfivar.h> 42 43 #if NBIO > 0 44 #include <dev/biovar.h> 45 #include <sys/sensors.h> 46 #endif /* NBIO > 0 */ 47 48 #ifdef MFI_DEBUG 49 uint32_t mfi_debug = 0 50 /* | MFI_D_CMD */ 51 /* | MFI_D_INTR */ 52 /* | MFI_D_MISC */ 53 /* | MFI_D_DMA */ 54 | MFI_D_IOCTL 55 /* | MFI_D_RW */ 56 /* | MFI_D_MEM */ 57 /* | MFI_D_CCB */ 58 ; 59 #endif 60 61 void mfi_scsipi_request(struct scsipi_channel *, 62 scsipi_adapter_req_t, void *); 63 int mfi_scsi_ioctl(struct scsipi_channel *, u_long, caddr_t, int, 64 struct proc *); 65 void mfiminphys(struct buf *bp); 66 67 struct mfi_ccb *mfi_get_ccb(struct mfi_softc *); 68 void mfi_put_ccb(struct mfi_ccb *); 69 int mfi_init_ccb(struct mfi_softc *); 70 71 struct mfi_mem *mfi_allocmem(struct mfi_softc *, size_t); 72 void mfi_freemem(struct mfi_softc *, struct mfi_mem *); 73 74 int mfi_transition_firmware(struct mfi_softc *); 75 int mfi_initialize_firmware(struct mfi_softc *); 76 int mfi_get_info(struct mfi_softc *); 77 uint32_t mfi_read(struct mfi_softc *, bus_size_t); 78 void mfi_write(struct mfi_softc *, bus_size_t, uint32_t); 79 int mfi_poll(struct mfi_ccb *); 80 int mfi_despatch_cmd(struct mfi_ccb *); 81 int mfi_create_sgl(struct mfi_ccb *, int); 82 83 /* commands */ 84 int mfi_scsi_ld(struct mfi_ccb *, struct scsipi_xfer *); 85 int mfi_scsi_io(struct mfi_ccb *, struct scsipi_xfer *, uint32_t, 86 uint32_t); 87 void mfi_scsi_xs_done(struct mfi_ccb *); 88 int mfi_mgmt(struct mfi_softc *, uint32_t, uint32_t, uint32_t, 89 void *, uint8_t *); 90 void mfi_mgmt_done(struct mfi_ccb *); 91 92 #if NBIO > 0 93 int mfi_ioctl(struct device *, u_long, caddr_t); 94 int mfi_ioctl_inq(struct mfi_softc *, struct bioc_inq *); 95 int mfi_ioctl_vol(struct mfi_softc *, struct bioc_vol *); 96 int mfi_ioctl_disk(struct mfi_softc *, struct bioc_disk *); 97 int mfi_ioctl_alarm(struct mfi_softc *, struct bioc_alarm *); 98 int mfi_ioctl_blink(struct mfi_softc *sc, struct bioc_blink *); 99 int mfi_ioctl_setstate(struct mfi_softc *, struct bioc_setstate *); 100 int mfi_bio_hs(struct mfi_softc *, int, int, void *); 101 int mfi_create_sensors(struct mfi_softc *); 102 void mfi_refresh_sensors(void *); 103 #endif /* NBIO > 0 */ 104 105 struct mfi_ccb * 106 mfi_get_ccb(struct mfi_softc *sc) 107 { 108 struct mfi_ccb *ccb; 109 int s; 110 111 s = splbio(); 112 ccb = TAILQ_FIRST(&sc->sc_ccb_freeq); 113 if (ccb) { 114 TAILQ_REMOVE(&sc->sc_ccb_freeq, ccb, ccb_link); 115 ccb->ccb_state = MFI_CCB_READY; 116 } 117 splx(s); 118 119 DNPRINTF(MFI_D_CCB, "%s: mfi_get_ccb: %p\n", DEVNAME(sc), ccb); 120 121 return (ccb); 122 } 123 124 void 125 mfi_put_ccb(struct mfi_ccb *ccb) 126 { 127 struct mfi_softc *sc = ccb->ccb_sc; 128 int s; 129 130 DNPRINTF(MFI_D_CCB, "%s: mfi_put_ccb: %p\n", DEVNAME(sc), ccb); 131 132 s = splbio(); 133 ccb->ccb_state = MFI_CCB_FREE; 134 ccb->ccb_xs = NULL; 135 ccb->ccb_flags = 0; 136 ccb->ccb_done = NULL; 137 ccb->ccb_direction = 0; 138 ccb->ccb_frame_size = 0; 139 ccb->ccb_extra_frames = 0; 140 ccb->ccb_sgl = NULL; 141 ccb->ccb_data = NULL; 142 ccb->ccb_len = 0; 143 TAILQ_INSERT_TAIL(&sc->sc_ccb_freeq, ccb, ccb_link); 144 splx(s); 145 } 146 147 int 148 mfi_init_ccb(struct mfi_softc *sc) 149 { 150 struct mfi_ccb *ccb; 151 uint32_t i; 152 int error; 153 154 DNPRINTF(MFI_D_CCB, "%s: mfi_init_ccb\n", DEVNAME(sc)); 155 156 sc->sc_ccb = malloc(sizeof(struct mfi_ccb) * sc->sc_max_cmds, 157 M_DEVBUF, M_WAITOK); 158 memset(sc->sc_ccb, 0, sizeof(struct mfi_ccb) * sc->sc_max_cmds); 159 160 for (i = 0; i < sc->sc_max_cmds; i++) { 161 ccb = &sc->sc_ccb[i]; 162 163 ccb->ccb_sc = sc; 164 165 /* select i'th frame */ 166 ccb->ccb_frame = (union mfi_frame *) 167 ((char*)MFIMEM_KVA(sc->sc_frames) + sc->sc_frames_size * i); 168 ccb->ccb_pframe = 169 MFIMEM_DVA(sc->sc_frames) + sc->sc_frames_size * i; 170 ccb->ccb_frame->mfr_header.mfh_context = i; 171 172 /* select i'th sense */ 173 ccb->ccb_sense = (struct mfi_sense *) 174 ((char*)MFIMEM_KVA(sc->sc_sense) + MFI_SENSE_SIZE * i); 175 ccb->ccb_psense = 176 (MFIMEM_DVA(sc->sc_sense) + MFI_SENSE_SIZE * i); 177 178 /* create a dma map for transfer */ 179 error = bus_dmamap_create(sc->sc_dmat, 180 MAXPHYS, sc->sc_max_sgl, MAXPHYS, 0, 181 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->ccb_dmamap); 182 if (error) { 183 printf("%s: cannot create ccb dmamap (%d)\n", 184 DEVNAME(sc), error); 185 goto destroy; 186 } 187 188 DNPRINTF(MFI_D_CCB, 189 "ccb(%d): %p frame: %#x (%#x) sense: %#x (%#x) map: %#x\n", 190 ccb->ccb_frame->mfr_header.mfh_context, ccb, 191 ccb->ccb_frame, ccb->ccb_pframe, 192 ccb->ccb_sense, ccb->ccb_psense, 193 ccb->ccb_dmamap); 194 195 /* add ccb to queue */ 196 mfi_put_ccb(ccb); 197 } 198 199 return (0); 200 destroy: 201 /* free dma maps and ccb memory */ 202 while (i) { 203 ccb = &sc->sc_ccb[i]; 204 bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap); 205 i--; 206 } 207 208 free(sc->sc_ccb, M_DEVBUF); 209 210 return (1); 211 } 212 213 uint32_t 214 mfi_read(struct mfi_softc *sc, bus_size_t r) 215 { 216 uint32_t rv; 217 218 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 219 BUS_SPACE_BARRIER_READ); 220 rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, r); 221 222 DNPRINTF(MFI_D_RW, "%s: mr 0x%x 0x08%x ", DEVNAME(sc), r, rv); 223 return (rv); 224 } 225 226 void 227 mfi_write(struct mfi_softc *sc, bus_size_t r, uint32_t v) 228 { 229 DNPRINTF(MFI_D_RW, "%s: mw 0x%x 0x%08x", DEVNAME(sc), r, v); 230 231 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v); 232 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 233 BUS_SPACE_BARRIER_WRITE); 234 } 235 236 struct mfi_mem * 237 mfi_allocmem(struct mfi_softc *sc, size_t size) 238 { 239 struct mfi_mem *mm; 240 int nsegs; 241 242 DNPRINTF(MFI_D_MEM, "%s: mfi_allocmem: %d\n", DEVNAME(sc), 243 size); 244 245 mm = malloc(sizeof(struct mfi_mem), M_DEVBUF, M_NOWAIT); 246 if (mm == NULL) 247 return (NULL); 248 249 memset(mm, 0, sizeof(struct mfi_mem)); 250 mm->am_size = size; 251 252 if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, 253 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &mm->am_map) != 0) 254 goto amfree; 255 256 if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &mm->am_seg, 1, 257 &nsegs, BUS_DMA_NOWAIT) != 0) 258 goto destroy; 259 260 if (bus_dmamem_map(sc->sc_dmat, &mm->am_seg, nsegs, size, &mm->am_kva, 261 BUS_DMA_NOWAIT) != 0) 262 goto free; 263 264 if (bus_dmamap_load(sc->sc_dmat, mm->am_map, mm->am_kva, size, NULL, 265 BUS_DMA_NOWAIT) != 0) 266 goto unmap; 267 268 DNPRINTF(MFI_D_MEM, " kva: %p dva: %p map: %p\n", 269 mm->am_kva, mm->am_map->dm_segs[0].ds_addr, mm->am_map); 270 271 memset(mm->am_kva, 0, size); 272 return (mm); 273 274 unmap: 275 bus_dmamem_unmap(sc->sc_dmat, mm->am_kva, size); 276 free: 277 bus_dmamem_free(sc->sc_dmat, &mm->am_seg, 1); 278 destroy: 279 bus_dmamap_destroy(sc->sc_dmat, mm->am_map); 280 amfree: 281 free(mm, M_DEVBUF); 282 283 return (NULL); 284 } 285 286 void 287 mfi_freemem(struct mfi_softc *sc, struct mfi_mem *mm) 288 { 289 DNPRINTF(MFI_D_MEM, "%s: mfi_freemem: %p\n", DEVNAME(sc), mm); 290 291 bus_dmamap_unload(sc->sc_dmat, mm->am_map); 292 bus_dmamem_unmap(sc->sc_dmat, mm->am_kva, mm->am_size); 293 bus_dmamem_free(sc->sc_dmat, &mm->am_seg, 1); 294 bus_dmamap_destroy(sc->sc_dmat, mm->am_map); 295 free(mm, M_DEVBUF); 296 } 297 298 int 299 mfi_transition_firmware(struct mfi_softc *sc) 300 { 301 int32_t fw_state, cur_state; 302 int max_wait, i; 303 304 fw_state = mfi_read(sc, MFI_OMSG0) & MFI_STATE_MASK; 305 306 DNPRINTF(MFI_D_CMD, "%s: mfi_transition_firmware: %#x\n", DEVNAME(sc), 307 fw_state); 308 309 while (fw_state != MFI_STATE_READY) { 310 DNPRINTF(MFI_D_MISC, 311 "%s: waiting for firmware to become ready\n", 312 DEVNAME(sc)); 313 cur_state = fw_state; 314 switch (fw_state) { 315 case MFI_STATE_FAULT: 316 printf("%s: firmware fault\n", DEVNAME(sc)); 317 return (1); 318 case MFI_STATE_WAIT_HANDSHAKE: 319 mfi_write(sc, MFI_IDB, MFI_INIT_CLEAR_HANDSHAKE); 320 max_wait = 2; 321 break; 322 case MFI_STATE_OPERATIONAL: 323 mfi_write(sc, MFI_IDB, MFI_INIT_READY); 324 max_wait = 10; 325 break; 326 case MFI_STATE_UNDEFINED: 327 case MFI_STATE_BB_INIT: 328 max_wait = 2; 329 break; 330 case MFI_STATE_FW_INIT: 331 case MFI_STATE_DEVICE_SCAN: 332 case MFI_STATE_FLUSH_CACHE: 333 max_wait = 20; 334 break; 335 default: 336 printf("%s: unknown firmware state %d\n", 337 DEVNAME(sc), fw_state); 338 return (1); 339 } 340 for (i = 0; i < (max_wait * 10); i++) { 341 fw_state = mfi_read(sc, MFI_OMSG0) & MFI_STATE_MASK; 342 if (fw_state == cur_state) 343 DELAY(100000); 344 else 345 break; 346 } 347 if (fw_state == cur_state) { 348 printf("%s: firmware stuck in state %#x\n", 349 DEVNAME(sc), fw_state); 350 return (1); 351 } 352 } 353 354 return (0); 355 } 356 357 int 358 mfi_initialize_firmware(struct mfi_softc *sc) 359 { 360 struct mfi_ccb *ccb; 361 struct mfi_init_frame *init; 362 struct mfi_init_qinfo *qinfo; 363 364 DNPRINTF(MFI_D_MISC, "%s: mfi_initialize_firmware\n", DEVNAME(sc)); 365 366 if ((ccb = mfi_get_ccb(sc)) == NULL) 367 return (1); 368 369 init = &ccb->ccb_frame->mfr_init; 370 qinfo = (struct mfi_init_qinfo *)((uint8_t *)init + MFI_FRAME_SIZE); 371 372 memset(qinfo, 0, sizeof *qinfo); 373 qinfo->miq_rq_entries = sc->sc_max_cmds + 1; 374 qinfo->miq_rq_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) + 375 offsetof(struct mfi_prod_cons, mpc_reply_q)); 376 qinfo->miq_pi_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) + 377 offsetof(struct mfi_prod_cons, mpc_producer)); 378 qinfo->miq_ci_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) + 379 offsetof(struct mfi_prod_cons, mpc_consumer)); 380 381 init->mif_header.mfh_cmd = MFI_CMD_INIT; 382 init->mif_header.mfh_data_len = sizeof *qinfo; 383 init->mif_qinfo_new_addr_lo = htole32(ccb->ccb_pframe + MFI_FRAME_SIZE); 384 385 DNPRINTF(MFI_D_MISC, "%s: entries: %#x rq: %#x pi: %#x ci: %#x\n", 386 DEVNAME(sc), 387 qinfo->miq_rq_entries, qinfo->miq_rq_addr_lo, 388 qinfo->miq_pi_addr_lo, qinfo->miq_ci_addr_lo); 389 390 if (mfi_poll(ccb)) { 391 printf("%s: mfi_initialize_firmware failed\n", DEVNAME(sc)); 392 return (1); 393 } 394 395 mfi_put_ccb(ccb); 396 397 return (0); 398 } 399 400 int 401 mfi_get_info(struct mfi_softc *sc) 402 { 403 #ifdef MFI_DEBUG 404 int i; 405 #endif 406 DNPRINTF(MFI_D_MISC, "%s: mfi_get_info\n", DEVNAME(sc)); 407 408 if (mfi_mgmt(sc, MR_DCMD_CTRL_GET_INFO, MFI_DATA_IN, 409 sizeof(sc->sc_info), &sc->sc_info, NULL)) 410 return (1); 411 412 #ifdef MFI_DEBUG 413 414 for (i = 0; i < sc->sc_info.mci_image_component_count; i++) { 415 printf("%s: active FW %s Version %s date %s time %s\n", 416 DEVNAME(sc), 417 sc->sc_info.mci_image_component[i].mic_name, 418 sc->sc_info.mci_image_component[i].mic_version, 419 sc->sc_info.mci_image_component[i].mic_build_date, 420 sc->sc_info.mci_image_component[i].mic_build_time); 421 } 422 423 for (i = 0; i < sc->sc_info.mci_pending_image_component_count; i++) { 424 printf("%s: pending FW %s Version %s date %s time %s\n", 425 DEVNAME(sc), 426 sc->sc_info.mci_pending_image_component[i].mic_name, 427 sc->sc_info.mci_pending_image_component[i].mic_version, 428 sc->sc_info.mci_pending_image_component[i].mic_build_date, 429 sc->sc_info.mci_pending_image_component[i].mic_build_time); 430 } 431 432 printf("%s: max_arms %d max_spans %d max_arrs %d max_lds %d name %s\n", 433 DEVNAME(sc), 434 sc->sc_info.mci_max_arms, 435 sc->sc_info.mci_max_spans, 436 sc->sc_info.mci_max_arrays, 437 sc->sc_info.mci_max_lds, 438 sc->sc_info.mci_product_name); 439 440 printf("%s: serial %s present %#x fw time %d max_cmds %d max_sg %d\n", 441 DEVNAME(sc), 442 sc->sc_info.mci_serial_number, 443 sc->sc_info.mci_hw_present, 444 sc->sc_info.mci_current_fw_time, 445 sc->sc_info.mci_max_cmds, 446 sc->sc_info.mci_max_sg_elements); 447 448 printf("%s: max_rq %d lds_pres %d lds_deg %d lds_off %d pd_pres %d\n", 449 DEVNAME(sc), 450 sc->sc_info.mci_max_request_size, 451 sc->sc_info.mci_lds_present, 452 sc->sc_info.mci_lds_degraded, 453 sc->sc_info.mci_lds_offline, 454 sc->sc_info.mci_pd_present); 455 456 printf("%s: pd_dsk_prs %d pd_dsk_pred_fail %d pd_dsk_fail %d\n", 457 DEVNAME(sc), 458 sc->sc_info.mci_pd_disks_present, 459 sc->sc_info.mci_pd_disks_pred_failure, 460 sc->sc_info.mci_pd_disks_failed); 461 462 printf("%s: nvram %d mem %d flash %d\n", 463 DEVNAME(sc), 464 sc->sc_info.mci_nvram_size, 465 sc->sc_info.mci_memory_size, 466 sc->sc_info.mci_flash_size); 467 468 printf("%s: ram_cor %d ram_uncor %d clus_all %d clus_act %d\n", 469 DEVNAME(sc), 470 sc->sc_info.mci_ram_correctable_errors, 471 sc->sc_info.mci_ram_uncorrectable_errors, 472 sc->sc_info.mci_cluster_allowed, 473 sc->sc_info.mci_cluster_active); 474 475 printf("%s: max_strps_io %d raid_lvl %#x adapt_ops %#x ld_ops %#x\n", 476 DEVNAME(sc), 477 sc->sc_info.mci_max_strips_per_io, 478 sc->sc_info.mci_raid_levels, 479 sc->sc_info.mci_adapter_ops, 480 sc->sc_info.mci_ld_ops); 481 482 printf("%s: strp_sz_min %d strp_sz_max %d pd_ops %#x pd_mix %#x\n", 483 DEVNAME(sc), 484 sc->sc_info.mci_stripe_sz_ops.min, 485 sc->sc_info.mci_stripe_sz_ops.max, 486 sc->sc_info.mci_pd_ops, 487 sc->sc_info.mci_pd_mix_support); 488 489 printf("%s: ecc_bucket %d pckg_prop %s\n", 490 DEVNAME(sc), 491 sc->sc_info.mci_ecc_bucket_count, 492 sc->sc_info.mci_package_version); 493 494 printf("%s: sq_nm %d prd_fail_poll %d intr_thrtl %d intr_thrtl_to %d\n", 495 DEVNAME(sc), 496 sc->sc_info.mci_properties.mcp_seq_num, 497 sc->sc_info.mci_properties.mcp_pred_fail_poll_interval, 498 sc->sc_info.mci_properties.mcp_intr_throttle_cnt, 499 sc->sc_info.mci_properties.mcp_intr_throttle_timeout); 500 501 printf("%s: rbld_rate %d patr_rd_rate %d bgi_rate %d cc_rate %d\n", 502 DEVNAME(sc), 503 sc->sc_info.mci_properties.mcp_rebuild_rate, 504 sc->sc_info.mci_properties.mcp_patrol_read_rate, 505 sc->sc_info.mci_properties.mcp_bgi_rate, 506 sc->sc_info.mci_properties.mcp_cc_rate); 507 508 printf("%s: rc_rate %d ch_flsh %d spin_cnt %d spin_dly %d clus_en %d\n", 509 DEVNAME(sc), 510 sc->sc_info.mci_properties.mcp_recon_rate, 511 sc->sc_info.mci_properties.mcp_cache_flush_interval, 512 sc->sc_info.mci_properties.mcp_spinup_drv_cnt, 513 sc->sc_info.mci_properties.mcp_spinup_delay, 514 sc->sc_info.mci_properties.mcp_cluster_enable); 515 516 printf("%s: coerc %d alarm %d dis_auto_rbld %d dis_bat_wrn %d ecc %d\n", 517 DEVNAME(sc), 518 sc->sc_info.mci_properties.mcp_coercion_mode, 519 sc->sc_info.mci_properties.mcp_alarm_enable, 520 sc->sc_info.mci_properties.mcp_disable_auto_rebuild, 521 sc->sc_info.mci_properties.mcp_disable_battery_warn, 522 sc->sc_info.mci_properties.mcp_ecc_bucket_size); 523 524 printf("%s: ecc_leak %d rest_hs %d exp_encl_dev %d\n", 525 DEVNAME(sc), 526 sc->sc_info.mci_properties.mcp_ecc_bucket_leak_rate, 527 sc->sc_info.mci_properties.mcp_restore_hotspare_on_insertion, 528 sc->sc_info.mci_properties.mcp_expose_encl_devices); 529 530 printf("%s: vendor %#x device %#x subvendor %#x subdevice %#x\n", 531 DEVNAME(sc), 532 sc->sc_info.mci_pci.mip_vendor, 533 sc->sc_info.mci_pci.mip_device, 534 sc->sc_info.mci_pci.mip_subvendor, 535 sc->sc_info.mci_pci.mip_subdevice); 536 537 printf("%s: type %#x port_count %d port_addr ", 538 DEVNAME(sc), 539 sc->sc_info.mci_host.mih_type, 540 sc->sc_info.mci_host.mih_port_count); 541 542 for (i = 0; i < 8; i++) 543 printf("%.0llx ", sc->sc_info.mci_host.mih_port_addr[i]); 544 printf("\n"); 545 546 printf("%s: type %.x port_count %d port_addr ", 547 DEVNAME(sc), 548 sc->sc_info.mci_device.mid_type, 549 sc->sc_info.mci_device.mid_port_count); 550 551 for (i = 0; i < 8; i++) 552 printf("%.0llx ", sc->sc_info.mci_device.mid_port_addr[i]); 553 printf("\n"); 554 #endif /* MFI_DEBUG */ 555 556 return (0); 557 } 558 559 void 560 mfiminphys(struct buf *bp) 561 { 562 DNPRINTF(MFI_D_MISC, "mfiminphys: %d\n", bp->b_bcount); 563 564 /* XXX currently using MFI_MAXFER = MAXPHYS */ 565 if (bp->b_bcount > MFI_MAXFER) 566 bp->b_bcount = MFI_MAXFER; 567 minphys(bp); 568 } 569 570 int 571 mfi_attach(struct mfi_softc *sc) 572 { 573 struct scsipi_adapter *adapt = &sc->sc_adapt; 574 struct scsipi_channel *chan = &sc->sc_chan; 575 uint32_t status, frames; 576 int i; 577 578 DNPRINTF(MFI_D_MISC, "%s: mfi_attach\n", DEVNAME(sc)); 579 580 if (mfi_transition_firmware(sc)) 581 return (1); 582 583 TAILQ_INIT(&sc->sc_ccb_freeq); 584 585 /* rw_init(&sc->sc_lock, "mfi_lock"); XXX */ 586 587 status = mfi_read(sc, MFI_OMSG0); 588 sc->sc_max_cmds = status & MFI_STATE_MAXCMD_MASK; 589 sc->sc_max_sgl = (status & MFI_STATE_MAXSGL_MASK) >> 16; 590 DNPRINTF(MFI_D_MISC, "%s: max commands: %u, max sgl: %u\n", 591 DEVNAME(sc), sc->sc_max_cmds, sc->sc_max_sgl); 592 593 /* consumer/producer and reply queue memory */ 594 sc->sc_pcq = mfi_allocmem(sc, (sizeof(uint32_t) * sc->sc_max_cmds) + 595 sizeof(struct mfi_prod_cons)); 596 if (sc->sc_pcq == NULL) { 597 aprint_error("%s: unable to allocate reply queue memory\n", 598 DEVNAME(sc)); 599 goto nopcq; 600 } 601 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0, 602 sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons), 603 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 604 605 /* frame memory */ 606 /* we are not doing 64 bit IO so only calculate # of 32 bit frames */ 607 frames = (sizeof(struct mfi_sg32) * sc->sc_max_sgl + 608 MFI_FRAME_SIZE - 1) / MFI_FRAME_SIZE + 1; 609 sc->sc_frames_size = frames * MFI_FRAME_SIZE; 610 sc->sc_frames = mfi_allocmem(sc, sc->sc_frames_size * sc->sc_max_cmds); 611 if (sc->sc_frames == NULL) { 612 aprint_error("%s: unable to allocate frame memory\n", 613 DEVNAME(sc)); 614 goto noframe; 615 } 616 /* XXX hack, fix this */ 617 if (MFIMEM_DVA(sc->sc_frames) & 0x3f) { 618 aprint_error("%s: improper frame alignment (%#llx) FIXME\n", 619 DEVNAME(sc), (long long int)MFIMEM_DVA(sc->sc_frames)); 620 goto noframe; 621 } 622 623 /* sense memory */ 624 sc->sc_sense = mfi_allocmem(sc, sc->sc_max_cmds * MFI_SENSE_SIZE); 625 if (sc->sc_sense == NULL) { 626 aprint_error("%s: unable to allocate sense memory\n", 627 DEVNAME(sc)); 628 goto nosense; 629 } 630 631 /* now that we have all memory bits go initialize ccbs */ 632 if (mfi_init_ccb(sc)) { 633 aprint_error("%s: could not init ccb list\n", DEVNAME(sc)); 634 goto noinit; 635 } 636 637 /* kickstart firmware with all addresses and pointers */ 638 if (mfi_initialize_firmware(sc)) { 639 aprint_error("%s: could not initialize firmware\n", 640 DEVNAME(sc)); 641 goto noinit; 642 } 643 644 if (mfi_get_info(sc)) { 645 aprint_error("%s: could not retrieve controller information\n", 646 DEVNAME(sc)); 647 goto noinit; 648 } 649 650 aprint_normal("%s: logical drives %d, version %s, %dMB RAM\n", 651 DEVNAME(sc), 652 sc->sc_info.mci_lds_present, 653 sc->sc_info.mci_package_version, 654 sc->sc_info.mci_memory_size); 655 656 sc->sc_ld_cnt = sc->sc_info.mci_lds_present; 657 sc->sc_max_ld = sc->sc_ld_cnt; 658 for (i = 0; i < sc->sc_ld_cnt; i++) 659 sc->sc_ld[i].ld_present = 1; 660 661 memset(adapt, 0, sizeof(*adapt)); 662 adapt->adapt_dev = &sc->sc_dev; 663 adapt->adapt_nchannels = 1; 664 if (sc->sc_ld_cnt) 665 adapt->adapt_openings = sc->sc_max_cmds / sc->sc_ld_cnt; 666 else 667 adapt->adapt_openings = sc->sc_max_cmds; 668 adapt->adapt_max_periph = adapt->adapt_openings; 669 adapt->adapt_request = mfi_scsipi_request; 670 adapt->adapt_minphys = mfiminphys; 671 adapt->adapt_ioctl = mfi_scsi_ioctl; 672 673 memset(chan, 0, sizeof(*chan)); 674 chan->chan_adapter = adapt; 675 chan->chan_bustype = &scsi_bustype; 676 chan->chan_channel = 0; 677 chan->chan_flags = 0; 678 chan->chan_nluns = 8; 679 chan->chan_ntargets = MFI_MAX_LD; 680 chan->chan_id = MFI_MAX_LD; 681 682 (void) config_found(&sc->sc_dev, &sc->sc_chan, scsiprint); 683 684 /* enable interrupts */ 685 mfi_write(sc, MFI_OMSK, MFI_ENABLE_INTR); 686 687 #if NBIO > 0 688 if (bio_register(&sc->sc_dev, mfi_ioctl) != 0) 689 panic("%s: controller registration failed", DEVNAME(sc)); 690 else 691 sc->sc_ioctl = mfi_ioctl; 692 693 if (mfi_create_sensors(sc) != 0) 694 aprint_error("%s: unable to create sensors\n", DEVNAME(sc)); 695 #endif /* NBIO > 0 */ 696 697 return (0); 698 noinit: 699 mfi_freemem(sc, sc->sc_sense); 700 nosense: 701 mfi_freemem(sc, sc->sc_frames); 702 noframe: 703 mfi_freemem(sc, sc->sc_pcq); 704 nopcq: 705 return (1); 706 } 707 708 int 709 mfi_despatch_cmd(struct mfi_ccb *ccb) 710 { 711 struct mfi_softc *sc = ccb->ccb_sc; 712 DNPRINTF(MFI_D_CMD, "%s: mfi_despatch_cmd\n", DEVNAME(sc)); 713 714 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 715 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 716 sc->sc_frames_size, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 717 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_sense), 718 ccb->ccb_psense - MFIMEM_DVA(sc->sc_sense), 719 MFI_SENSE_SIZE, BUS_DMASYNC_PREREAD); 720 721 mfi_write(ccb->ccb_sc, MFI_IQP, htole32((ccb->ccb_pframe >> 3) | 722 ccb->ccb_extra_frames)); 723 724 return(0); 725 } 726 727 int 728 mfi_poll(struct mfi_ccb *ccb) 729 { 730 struct mfi_softc *sc = ccb->ccb_sc; 731 struct mfi_frame_header *hdr; 732 int to = 0; 733 734 DNPRINTF(MFI_D_CMD, "%s: mfi_poll\n", DEVNAME(sc)); 735 736 hdr = &ccb->ccb_frame->mfr_header; 737 hdr->mfh_cmd_status = 0xff; 738 hdr->mfh_flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE; 739 740 mfi_despatch_cmd(ccb); 741 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 742 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 743 sc->sc_frames_size, BUS_DMASYNC_POSTREAD); 744 745 while (hdr->mfh_cmd_status == 0xff) { 746 delay(1000); 747 if (to++ > 5000) /* XXX 5 seconds busywait sucks */ 748 break; 749 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 750 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 751 sc->sc_frames_size, BUS_DMASYNC_POSTREAD); 752 } 753 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 754 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 755 sc->sc_frames_size, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 756 757 if (ccb->ccb_data != NULL) { 758 DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done sync\n", 759 DEVNAME(sc)); 760 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 761 ccb->ccb_dmamap->dm_mapsize, 762 (ccb->ccb_direction & MFI_DATA_IN) ? 763 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 764 765 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap); 766 } 767 768 if (hdr->mfh_cmd_status == 0xff) { 769 printf("%s: timeout on ccb %d\n", DEVNAME(sc), 770 hdr->mfh_context); 771 ccb->ccb_flags |= MFI_CCB_F_ERR; 772 return (1); 773 } 774 775 return (0); 776 } 777 778 int 779 mfi_intr(void *arg) 780 { 781 struct mfi_softc *sc = arg; 782 struct mfi_prod_cons *pcq; 783 struct mfi_ccb *ccb; 784 uint32_t status, producer, consumer, ctx; 785 int claimed = 0; 786 787 status = mfi_read(sc, MFI_OSTS); 788 if ((status & MFI_OSTS_INTR_VALID) == 0) 789 return (claimed); 790 /* write status back to acknowledge interrupt */ 791 mfi_write(sc, MFI_OSTS, status); 792 793 DNPRINTF(MFI_D_INTR, "%s: mfi_intr %#x %#x\n", DEVNAME(sc), sc, pcq); 794 795 pcq = MFIMEM_KVA(sc->sc_pcq); 796 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0, 797 sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons), 798 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 799 800 producer = pcq->mpc_producer; 801 consumer = pcq->mpc_consumer; 802 803 while (consumer != producer) { 804 DNPRINTF(MFI_D_INTR, "%s: mfi_intr pi %#x ci %#x\n", 805 DEVNAME(sc), producer, consumer); 806 807 ctx = pcq->mpc_reply_q[consumer]; 808 pcq->mpc_reply_q[consumer] = MFI_INVALID_CTX; 809 if (ctx == MFI_INVALID_CTX) 810 printf("%s: invalid context, p: %d c: %d\n", 811 DEVNAME(sc), producer, consumer); 812 else { 813 /* XXX remove from queue and call scsi_done */ 814 ccb = &sc->sc_ccb[ctx]; 815 DNPRINTF(MFI_D_INTR, "%s: mfi_intr context %#x\n", 816 DEVNAME(sc), ctx); 817 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 818 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 819 sc->sc_frames_size, 820 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 821 ccb->ccb_done(ccb); 822 823 claimed = 1; 824 } 825 consumer++; 826 if (consumer == (sc->sc_max_cmds + 1)) 827 consumer = 0; 828 } 829 830 pcq->mpc_consumer = consumer; 831 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0, 832 sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons), 833 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 834 835 return (claimed); 836 } 837 838 int 839 mfi_scsi_io(struct mfi_ccb *ccb, struct scsipi_xfer *xs, uint32_t blockno, 840 uint32_t blockcnt) 841 { 842 struct scsipi_periph *periph = xs->xs_periph; 843 struct mfi_io_frame *io; 844 845 DNPRINTF(MFI_D_CMD, "%s: mfi_scsi_io: %d\n", 846 periph->periph_channel->chan_adapter->adapt_dev->dv_xname, 847 periph->periph_target); 848 849 if (!xs->data) 850 return (1); 851 852 io = &ccb->ccb_frame->mfr_io; 853 if (xs->xs_control & XS_CTL_DATA_IN) { 854 io->mif_header.mfh_cmd = MFI_CMD_LD_READ; 855 ccb->ccb_direction = MFI_DATA_IN; 856 } else { 857 io->mif_header.mfh_cmd = MFI_CMD_LD_WRITE; 858 ccb->ccb_direction = MFI_DATA_OUT; 859 } 860 io->mif_header.mfh_target_id = periph->periph_target; 861 io->mif_header.mfh_timeout = 0; 862 io->mif_header.mfh_flags = 0; 863 io->mif_header.mfh_sense_len = MFI_SENSE_SIZE; 864 io->mif_header.mfh_data_len= blockcnt; 865 io->mif_lba_hi = 0; 866 io->mif_lba_lo = blockno; 867 io->mif_sense_addr_lo = htole32(ccb->ccb_psense); 868 io->mif_sense_addr_hi = 0; 869 870 ccb->ccb_done = mfi_scsi_xs_done; 871 ccb->ccb_xs = xs; 872 ccb->ccb_frame_size = MFI_IO_FRAME_SIZE; 873 ccb->ccb_sgl = &io->mif_sgl; 874 ccb->ccb_data = xs->data; 875 ccb->ccb_len = xs->datalen; 876 877 if (mfi_create_sgl(ccb, xs->xs_control & XS_CTL_NOSLEEP) ? 878 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) 879 return (1); 880 881 return (0); 882 } 883 884 void 885 mfi_scsi_xs_done(struct mfi_ccb *ccb) 886 { 887 struct scsipi_xfer *xs = ccb->ccb_xs; 888 struct mfi_softc *sc = ccb->ccb_sc; 889 struct mfi_frame_header *hdr = &ccb->ccb_frame->mfr_header; 890 891 DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done %#x %#x\n", 892 DEVNAME(sc), ccb, ccb->ccb_frame); 893 894 if (xs->data != NULL) { 895 DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done sync\n", 896 DEVNAME(sc)); 897 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 898 ccb->ccb_dmamap->dm_mapsize, 899 (xs->xs_control & XS_CTL_DATA_IN) ? 900 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 901 902 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap); 903 } 904 905 if (hdr->mfh_cmd_status != MFI_STAT_OK) { 906 xs->error = XS_DRIVER_STUFFUP; 907 DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done stuffup %#x\n", 908 DEVNAME(sc), hdr->mfh_cmd_status); 909 910 if (hdr->mfh_scsi_status != 0) { 911 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_sense), 912 ccb->ccb_psense - MFIMEM_DVA(sc->sc_sense), 913 MFI_SENSE_SIZE, BUS_DMASYNC_POSTREAD); 914 DNPRINTF(MFI_D_INTR, 915 "%s: mfi_scsi_xs_done sense %#x %x %x\n", 916 DEVNAME(sc), hdr->mfh_scsi_status, 917 &xs->sense, ccb->ccb_sense); 918 memset(&xs->sense, 0, sizeof(xs->sense)); 919 memcpy(&xs->sense, ccb->ccb_sense, 920 sizeof(struct scsi_sense_data)); 921 xs->error = XS_SENSE; 922 } 923 } else { 924 xs->error = XS_NOERROR; 925 xs->status = SCSI_OK; 926 xs->resid = 0; 927 } 928 929 mfi_put_ccb(ccb); 930 scsipi_done(xs); 931 } 932 933 int 934 mfi_scsi_ld(struct mfi_ccb *ccb, struct scsipi_xfer *xs) 935 { 936 struct mfi_pass_frame *pf; 937 struct scsipi_periph *periph = xs->xs_periph; 938 939 DNPRINTF(MFI_D_CMD, "%s: mfi_scsi_ld: %d\n", 940 periph->periph_channel->chan_adapter->adapt_dev->dv_xname, 941 periph->periph_target); 942 943 pf = &ccb->ccb_frame->mfr_pass; 944 pf->mpf_header.mfh_cmd = MFI_CMD_LD_SCSI_IO; 945 pf->mpf_header.mfh_target_id = periph->periph_target; 946 pf->mpf_header.mfh_lun_id = 0; 947 pf->mpf_header.mfh_cdb_len = xs->cmdlen; 948 pf->mpf_header.mfh_timeout = 0; 949 pf->mpf_header.mfh_data_len= xs->datalen; /* XXX */ 950 pf->mpf_header.mfh_sense_len = MFI_SENSE_SIZE; 951 952 pf->mpf_sense_addr_hi = 0; 953 pf->mpf_sense_addr_lo = htole32(ccb->ccb_psense); 954 955 memset(pf->mpf_cdb, 0, 16); 956 memcpy(pf->mpf_cdb, &xs->cmdstore, xs->cmdlen); 957 958 ccb->ccb_done = mfi_scsi_xs_done; 959 ccb->ccb_xs = xs; 960 ccb->ccb_frame_size = MFI_PASS_FRAME_SIZE; 961 ccb->ccb_sgl = &pf->mpf_sgl; 962 963 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) 964 ccb->ccb_direction = (xs->xs_control & XS_CTL_DATA_IN) ? 965 MFI_DATA_IN : MFI_DATA_OUT; 966 else 967 ccb->ccb_direction = MFI_DATA_NONE; 968 969 if (xs->data) { 970 ccb->ccb_data = xs->data; 971 ccb->ccb_len = xs->datalen; 972 973 if (mfi_create_sgl(ccb, xs->xs_control & XS_CTL_NOSLEEP) ? 974 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) 975 return (1); 976 } 977 978 return (0); 979 } 980 981 void 982 mfi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 983 void *arg) 984 { 985 struct scsipi_periph *periph; 986 struct scsipi_xfer *xs; 987 struct scsipi_adapter *adapt = chan->chan_adapter; 988 struct mfi_softc *sc = (void *) adapt->adapt_dev; 989 struct mfi_ccb *ccb; 990 struct scsi_rw_6 *rw; 991 struct scsipi_rw_10 *rwb; 992 uint32_t blockno, blockcnt; 993 uint8_t target; 994 uint8_t mbox[MFI_MBOX_SIZE]; 995 int s; 996 997 DNPRINTF(MFI_D_CMD, "%s: mfi_scsipi_request req %d opcode: %#x\n", 998 DEVNAME(sc), req, xs->cmd->opcode); 999 1000 switch (req) { 1001 case ADAPTER_REQ_GROW_RESOURCES: 1002 /* Not supported. */ 1003 return; 1004 case ADAPTER_REQ_SET_XFER_MODE: 1005 /* Not supported. */ 1006 return; 1007 case ADAPTER_REQ_RUN_XFER: 1008 break; 1009 } 1010 1011 xs = arg; 1012 periph = xs->xs_periph; 1013 target = periph->periph_target; 1014 1015 s = splbio(); 1016 if (target >= MFI_MAX_LD || !sc->sc_ld[target].ld_present || 1017 periph->periph_lun != 0) { 1018 DNPRINTF(MFI_D_CMD, "%s: invalid target %d\n", 1019 DEVNAME(sc), target); 1020 xs->error = XS_SELTIMEOUT; 1021 scsipi_done(xs); 1022 splx(s); 1023 return; 1024 } 1025 1026 if ((ccb = mfi_get_ccb(sc)) == NULL) { 1027 DNPRINTF(MFI_D_CMD, "%s: mfi_scsipi_request no ccb\n", DEVNAME(sc)); 1028 xs->error = XS_RESOURCE_SHORTAGE; 1029 scsipi_done(xs); 1030 splx(s); 1031 return; 1032 } 1033 1034 switch (xs->cmd->opcode) { 1035 /* IO path */ 1036 case READ_10: 1037 case WRITE_10: 1038 rwb = (struct scsipi_rw_10 *)xs->cmd; 1039 blockno = _4btol(rwb->addr); 1040 blockcnt = _2btol(rwb->length); 1041 if (mfi_scsi_io(ccb, xs, blockno, blockcnt)) { 1042 mfi_put_ccb(ccb); 1043 goto stuffup; 1044 } 1045 break; 1046 1047 case SCSI_READ_6_COMMAND: 1048 case SCSI_WRITE_6_COMMAND: 1049 rw = (struct scsi_rw_6 *)xs->cmd; 1050 blockno = _3btol(rw->addr) & (SRW_TOPADDR << 16 | 0xffff); 1051 blockcnt = rw->length ? rw->length : 0x100; 1052 if (mfi_scsi_io(ccb, xs, blockno, blockcnt)) { 1053 mfi_put_ccb(ccb); 1054 goto stuffup; 1055 } 1056 break; 1057 1058 case SCSI_SYNCHRONIZE_CACHE_10: 1059 mfi_put_ccb(ccb); /* we don't need this */ 1060 1061 mbox[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE; 1062 if (mfi_mgmt(sc, MR_DCMD_CTRL_CACHE_FLUSH, MFI_DATA_NONE, 1063 0, NULL, mbox)) 1064 goto stuffup; 1065 xs->error = XS_NOERROR; 1066 xs->status = SCSI_OK; 1067 xs->resid = 0; 1068 scsipi_done(xs); 1069 splx(s); 1070 return; 1071 /* NOTREACHED */ 1072 1073 /* hand it of to the firmware and let it deal with it */ 1074 case SCSI_TEST_UNIT_READY: 1075 /* save off sd? after autoconf */ 1076 if (!cold) /* XXX bogus */ 1077 strlcpy(sc->sc_ld[target].ld_dev, sc->sc_dev.dv_xname, 1078 sizeof(sc->sc_ld[target].ld_dev)); 1079 /* FALLTHROUGH */ 1080 1081 default: 1082 if (mfi_scsi_ld(ccb, xs)) { 1083 mfi_put_ccb(ccb); 1084 goto stuffup; 1085 } 1086 break; 1087 } 1088 1089 DNPRINTF(MFI_D_CMD, "%s: start io %d\n", DEVNAME(sc), target); 1090 1091 if (xs->xs_control & XS_CTL_POLL) { 1092 if (mfi_poll(ccb)) { 1093 /* XXX check for sense in ccb->ccb_sense? */ 1094 printf("%s: mfi_scsipi_request poll failed\n", 1095 DEVNAME(sc)); 1096 mfi_put_ccb(ccb); 1097 bzero(&xs->sense, sizeof(xs->sense)); 1098 xs->sense.scsi_sense.response_code = 1099 SSD_RCODE_VALID | SSD_RCODE_CURRENT; 1100 xs->sense.scsi_sense.flags = SKEY_ILLEGAL_REQUEST; 1101 xs->sense.scsi_sense.asc = 0x20; /* invalid opcode */ 1102 xs->error = XS_SENSE; 1103 xs->status = SCSI_CHECK; 1104 } else { 1105 DNPRINTF(MFI_D_DMA, 1106 "%s: mfi_scsipi_request poll complete %d\n", 1107 DEVNAME(sc), ccb->ccb_dmamap->dm_nsegs); 1108 xs->error = XS_NOERROR; 1109 xs->status = SCSI_OK; 1110 xs->resid = 0; 1111 } 1112 mfi_put_ccb(ccb); 1113 scsipi_done(xs); 1114 splx(s); 1115 return; 1116 } 1117 1118 mfi_despatch_cmd(ccb); 1119 1120 DNPRINTF(MFI_D_DMA, "%s: mfi_scsipi_request queued %d\n", DEVNAME(sc), 1121 ccb->ccb_dmamap->dm_nsegs); 1122 1123 splx(s); 1124 return; 1125 1126 stuffup: 1127 xs->error = XS_DRIVER_STUFFUP; 1128 scsipi_done(xs); 1129 splx(s); 1130 } 1131 1132 int 1133 mfi_create_sgl(struct mfi_ccb *ccb, int flags) 1134 { 1135 struct mfi_softc *sc = ccb->ccb_sc; 1136 struct mfi_frame_header *hdr; 1137 bus_dma_segment_t *sgd; 1138 union mfi_sgl *sgl; 1139 int error, i; 1140 1141 DNPRINTF(MFI_D_DMA, "%s: mfi_create_sgl %#x\n", DEVNAME(sc), 1142 ccb->ccb_data); 1143 1144 if (!ccb->ccb_data) 1145 return (1); 1146 1147 error = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap, 1148 ccb->ccb_data, ccb->ccb_len, NULL, flags); 1149 if (error) { 1150 if (error == EFBIG) 1151 printf("more than %d dma segs\n", 1152 sc->sc_max_sgl); 1153 else 1154 printf("error %d loading dma map\n", error); 1155 return (1); 1156 } 1157 1158 hdr = &ccb->ccb_frame->mfr_header; 1159 sgl = ccb->ccb_sgl; 1160 sgd = ccb->ccb_dmamap->dm_segs; 1161 for (i = 0; i < ccb->ccb_dmamap->dm_nsegs; i++) { 1162 sgl->sg32[i].addr = htole32(sgd[i].ds_addr); 1163 sgl->sg32[i].len = htole32(sgd[i].ds_len); 1164 DNPRINTF(MFI_D_DMA, "%s: addr: %#x len: %#x\n", 1165 DEVNAME(sc), sgl->sg32[i].addr, sgl->sg32[i].len); 1166 } 1167 1168 if (ccb->ccb_direction == MFI_DATA_IN) { 1169 hdr->mfh_flags |= MFI_FRAME_DIR_READ; 1170 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 1171 ccb->ccb_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1172 } else { 1173 hdr->mfh_flags |= MFI_FRAME_DIR_WRITE; 1174 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 1175 ccb->ccb_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE); 1176 } 1177 1178 hdr->mfh_sg_count = ccb->ccb_dmamap->dm_nsegs; 1179 /* for 64 bit io make the sizeof a variable to hold whatever sg size */ 1180 ccb->ccb_frame_size += sizeof(struct mfi_sg32) * 1181 ccb->ccb_dmamap->dm_nsegs; 1182 ccb->ccb_extra_frames = (ccb->ccb_frame_size - 1) / MFI_FRAME_SIZE; 1183 1184 DNPRINTF(MFI_D_DMA, "%s: sg_count: %d frame_size: %d frames_size: %d" 1185 " dm_nsegs: %d extra_frames: %d\n", 1186 DEVNAME(sc), 1187 hdr->mfh_sg_count, 1188 ccb->ccb_frame_size, 1189 sc->sc_frames_size, 1190 ccb->ccb_dmamap->dm_nsegs, 1191 ccb->ccb_extra_frames); 1192 1193 return (0); 1194 } 1195 1196 int 1197 mfi_mgmt(struct mfi_softc *sc, uint32_t opc, uint32_t dir, uint32_t len, 1198 void *buf, uint8_t *mbox) 1199 { 1200 struct mfi_ccb *ccb; 1201 struct mfi_dcmd_frame *dcmd; 1202 int rv = 1; 1203 1204 DNPRINTF(MFI_D_MISC, "%s: mfi_mgmt %#x\n", DEVNAME(sc), opc); 1205 1206 if ((ccb = mfi_get_ccb(sc)) == NULL) 1207 return (rv); 1208 1209 dcmd = &ccb->ccb_frame->mfr_dcmd; 1210 memset(dcmd->mdf_mbox, 0, MFI_MBOX_SIZE); 1211 dcmd->mdf_header.mfh_cmd = MFI_CMD_DCMD; 1212 dcmd->mdf_header.mfh_timeout = 0; 1213 1214 dcmd->mdf_opcode = opc; 1215 dcmd->mdf_header.mfh_data_len = 0; 1216 ccb->ccb_direction = dir; 1217 ccb->ccb_done = mfi_mgmt_done; 1218 1219 ccb->ccb_frame_size = MFI_DCMD_FRAME_SIZE; 1220 1221 /* handle special opcodes */ 1222 if (mbox) 1223 memcpy(dcmd->mdf_mbox, mbox, MFI_MBOX_SIZE); 1224 1225 if (dir != MFI_DATA_NONE) { 1226 dcmd->mdf_header.mfh_data_len = len; 1227 ccb->ccb_data = buf; 1228 ccb->ccb_len = len; 1229 ccb->ccb_sgl = &dcmd->mdf_sgl; 1230 1231 if (mfi_create_sgl(ccb, BUS_DMA_WAITOK)) 1232 goto done; 1233 } 1234 1235 if (cold) { 1236 if (mfi_poll(ccb)) 1237 goto done; 1238 } else { 1239 mfi_despatch_cmd(ccb); 1240 1241 DNPRINTF(MFI_D_MISC, "%s: mfi_mgmt sleeping\n", DEVNAME(sc)); 1242 while (ccb->ccb_state != MFI_CCB_DONE) 1243 tsleep(ccb, PRIBIO, "mfi_mgmt", 0); 1244 1245 if (ccb->ccb_flags & MFI_CCB_F_ERR) 1246 goto done; 1247 } 1248 1249 rv = 0; 1250 1251 done: 1252 mfi_put_ccb(ccb); 1253 return (rv); 1254 } 1255 1256 void 1257 mfi_mgmt_done(struct mfi_ccb *ccb) 1258 { 1259 struct mfi_softc *sc = ccb->ccb_sc; 1260 struct mfi_frame_header *hdr = &ccb->ccb_frame->mfr_header; 1261 1262 DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done %#x %#x\n", 1263 DEVNAME(sc), ccb, ccb->ccb_frame); 1264 1265 if (ccb->ccb_data != NULL) { 1266 DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done sync\n", 1267 DEVNAME(sc)); 1268 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 1269 ccb->ccb_dmamap->dm_mapsize, 1270 (ccb->ccb_direction & MFI_DATA_IN) ? 1271 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1272 1273 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap); 1274 } 1275 1276 if (hdr->mfh_cmd_status != MFI_STAT_OK) 1277 ccb->ccb_flags |= MFI_CCB_F_ERR; 1278 1279 ccb->ccb_state = MFI_CCB_DONE; 1280 1281 wakeup(ccb); 1282 } 1283 1284 1285 int 1286 mfi_scsi_ioctl(struct scsipi_channel *chan, u_long cmd, caddr_t arg, 1287 int flag, struct proc *p) 1288 { 1289 return (ENOTTY); 1290 } 1291 1292 #if NBIO > 0 1293 int 1294 mfi_ioctl(struct device *dev, u_long cmd, caddr_t addr) 1295 { 1296 struct mfi_softc *sc = (struct mfi_softc *)dev; 1297 int error = 0; 1298 1299 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl ", DEVNAME(sc)); 1300 1301 rw_enter_write(&sc->sc_lock); 1302 1303 switch (cmd) { 1304 case BIOCINQ: 1305 DNPRINTF(MFI_D_IOCTL, "inq\n"); 1306 error = mfi_ioctl_inq(sc, (struct bioc_inq *)addr); 1307 break; 1308 1309 case BIOCVOL: 1310 DNPRINTF(MFI_D_IOCTL, "vol\n"); 1311 error = mfi_ioctl_vol(sc, (struct bioc_vol *)addr); 1312 break; 1313 1314 case BIOCDISK: 1315 DNPRINTF(MFI_D_IOCTL, "disk\n"); 1316 error = mfi_ioctl_disk(sc, (struct bioc_disk *)addr); 1317 break; 1318 1319 case BIOCALARM: 1320 DNPRINTF(MFI_D_IOCTL, "alarm\n"); 1321 error = mfi_ioctl_alarm(sc, (struct bioc_alarm *)addr); 1322 break; 1323 1324 case BIOCBLINK: 1325 DNPRINTF(MFI_D_IOCTL, "blink\n"); 1326 error = mfi_ioctl_blink(sc, (struct bioc_blink *)addr); 1327 break; 1328 1329 case BIOCSETSTATE: 1330 DNPRINTF(MFI_D_IOCTL, "setstate\n"); 1331 error = mfi_ioctl_setstate(sc, (struct bioc_setstate *)addr); 1332 break; 1333 1334 default: 1335 DNPRINTF(MFI_D_IOCTL, " invalid ioctl\n"); 1336 error = EINVAL; 1337 } 1338 1339 rw_exit_write(&sc->sc_lock); 1340 1341 return (error); 1342 } 1343 1344 int 1345 mfi_ioctl_inq(struct mfi_softc *sc, struct bioc_inq *bi) 1346 { 1347 struct mfi_conf *cfg; 1348 int rv = EINVAL; 1349 1350 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_inq\n", DEVNAME(sc)); 1351 1352 if (mfi_get_info(sc)) { 1353 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_inq failed\n", 1354 DEVNAME(sc)); 1355 return (EIO); 1356 } 1357 1358 /* get figures */ 1359 cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK); 1360 if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, sizeof *cfg, cfg, NULL)) 1361 goto freeme; 1362 1363 strlcpy(bi->bi_dev, DEVNAME(sc), sizeof(bi->bi_dev)); 1364 bi->bi_novol = cfg->mfc_no_ld + cfg->mfc_no_hs; 1365 bi->bi_nodisk = sc->sc_info.mci_pd_disks_present; 1366 1367 rv = 0; 1368 freeme: 1369 free(cfg, M_DEVBUF); 1370 return (rv); 1371 } 1372 1373 int 1374 mfi_ioctl_vol(struct mfi_softc *sc, struct bioc_vol *bv) 1375 { 1376 int i, per, rv = EINVAL; 1377 uint8_t mbox[MFI_MBOX_SIZE]; 1378 1379 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol %#x\n", 1380 DEVNAME(sc), bv->bv_volid); 1381 1382 if (mfi_mgmt(sc, MR_DCMD_LD_GET_LIST, MFI_DATA_IN, 1383 sizeof(sc->sc_ld_list), &sc->sc_ld_list, NULL)) 1384 goto done; 1385 1386 i = bv->bv_volid; 1387 mbox[0] = sc->sc_ld_list.mll_list[i].mll_ld.mld_target; 1388 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol target %#x\n", 1389 DEVNAME(sc), mbox[0]); 1390 1391 if (mfi_mgmt(sc, MR_DCMD_LD_GET_INFO, MFI_DATA_IN, 1392 sizeof(sc->sc_ld_details), &sc->sc_ld_details, mbox)) 1393 goto done; 1394 1395 if (bv->bv_volid >= sc->sc_ld_list.mll_no_ld) { 1396 /* go do hotspares */ 1397 rv = mfi_bio_hs(sc, bv->bv_volid, MFI_MGMT_VD, bv); 1398 goto done; 1399 } 1400 1401 strlcpy(bv->bv_dev, sc->sc_ld[i].ld_dev, sizeof(bv->bv_dev)); 1402 1403 switch(sc->sc_ld_list.mll_list[i].mll_state) { 1404 case MFI_LD_OFFLINE: 1405 bv->bv_status = BIOC_SVOFFLINE; 1406 break; 1407 1408 case MFI_LD_PART_DEGRADED: 1409 case MFI_LD_DEGRADED: 1410 bv->bv_status = BIOC_SVDEGRADED; 1411 break; 1412 1413 case MFI_LD_ONLINE: 1414 bv->bv_status = BIOC_SVONLINE; 1415 break; 1416 1417 default: 1418 bv->bv_status = BIOC_SVINVALID; 1419 DNPRINTF(MFI_D_IOCTL, "%s: invalid logical disk state %#x\n", 1420 DEVNAME(sc), 1421 sc->sc_ld_list.mll_list[i].mll_state); 1422 } 1423 1424 /* additional status can modify MFI status */ 1425 switch (sc->sc_ld_details.mld_progress.mlp_in_prog) { 1426 case MFI_LD_PROG_CC: 1427 case MFI_LD_PROG_BGI: 1428 bv->bv_status = BIOC_SVSCRUB; 1429 per = (int)sc->sc_ld_details.mld_progress.mlp_cc.mp_progress; 1430 bv->bv_percent = (per * 100) / 0xffff; 1431 bv->bv_seconds = 1432 sc->sc_ld_details.mld_progress.mlp_cc.mp_elapsed_seconds; 1433 break; 1434 1435 case MFI_LD_PROG_FGI: 1436 case MFI_LD_PROG_RECONSTRUCT: 1437 /* nothing yet */ 1438 break; 1439 } 1440 1441 /* 1442 * The RAID levels are determined per the SNIA DDF spec, this is only 1443 * a subset that is valid for the MFI contrller. 1444 */ 1445 bv->bv_level = sc->sc_ld_details.mld_cfg.mlc_parm.mpa_pri_raid; 1446 if (sc->sc_ld_details.mld_cfg.mlc_parm.mpa_sec_raid == 1447 MFI_DDF_SRL_SPANNED) 1448 bv->bv_level *= 10; 1449 1450 bv->bv_nodisk = sc->sc_ld_details.mld_cfg.mlc_parm.mpa_no_drv_per_span * 1451 sc->sc_ld_details.mld_cfg.mlc_parm.mpa_span_depth; 1452 1453 bv->bv_size = sc->sc_ld_details.mld_size * 512; /* bytes per block */ 1454 1455 rv = 0; 1456 done: 1457 return (rv); 1458 } 1459 1460 int 1461 mfi_ioctl_disk(struct mfi_softc *sc, struct bioc_disk *bd) 1462 { 1463 struct mfi_conf *cfg; 1464 struct mfi_array *ar; 1465 struct mfi_ld_cfg *ld; 1466 struct mfi_pd_details *pd; 1467 struct scsi_inquiry_data *inqbuf; 1468 char vend[8+16+4+1]; 1469 int i, rv = EINVAL; 1470 int arr, vol, disk; 1471 uint32_t size; 1472 uint8_t mbox[MFI_MBOX_SIZE]; 1473 1474 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_disk %#x\n", 1475 DEVNAME(sc), bd->bd_diskid); 1476 1477 pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK); 1478 1479 /* send single element command to retrieve size for full structure */ 1480 cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK); 1481 if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, sizeof *cfg, cfg, NULL)) 1482 goto freeme; 1483 1484 size = cfg->mfc_size; 1485 free(cfg, M_DEVBUF); 1486 1487 /* memory for read config */ 1488 cfg = malloc(size, M_DEVBUF, M_WAITOK); 1489 memset(cfg, 0, size); 1490 if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, size, cfg, NULL)) 1491 goto freeme; 1492 1493 ar = cfg->mfc_array; 1494 1495 /* calculate offset to ld structure */ 1496 ld = (struct mfi_ld_cfg *)( 1497 ((uint8_t *)cfg) + offsetof(struct mfi_conf, mfc_array) + 1498 cfg->mfc_array_size * cfg->mfc_no_array); 1499 1500 vol = bd->bd_volid; 1501 1502 if (vol >= cfg->mfc_no_ld) { 1503 /* do hotspares */ 1504 rv = mfi_bio_hs(sc, bd->bd_volid, MFI_MGMT_SD, bd); 1505 goto freeme; 1506 } 1507 1508 /* find corresponding array for ld */ 1509 for (i = 0, arr = 0; i < vol; i++) 1510 arr += ld[i].mlc_parm.mpa_span_depth; 1511 1512 /* offset disk into pd list */ 1513 disk = bd->bd_diskid % ld[vol].mlc_parm.mpa_no_drv_per_span; 1514 1515 /* offset array index into the next spans */ 1516 arr += bd->bd_diskid / ld[vol].mlc_parm.mpa_no_drv_per_span; 1517 1518 bd->bd_target = ar[arr].pd[disk].mar_enc_slot; 1519 switch (ar[arr].pd[disk].mar_pd_state){ 1520 case MFI_PD_UNCONFIG_GOOD: 1521 bd->bd_status = BIOC_SDUNUSED; 1522 break; 1523 1524 case MFI_PD_HOTSPARE: /* XXX dedicated hotspare part of array? */ 1525 bd->bd_status = BIOC_SDHOTSPARE; 1526 break; 1527 1528 case MFI_PD_OFFLINE: 1529 bd->bd_status = BIOC_SDOFFLINE; 1530 break; 1531 1532 case MFI_PD_FAILED: 1533 bd->bd_status = BIOC_SDFAILED; 1534 break; 1535 1536 case MFI_PD_REBUILD: 1537 bd->bd_status = BIOC_SDREBUILD; 1538 break; 1539 1540 case MFI_PD_ONLINE: 1541 bd->bd_status = BIOC_SDONLINE; 1542 break; 1543 1544 case MFI_PD_UNCONFIG_BAD: /* XXX define new state in bio */ 1545 default: 1546 bd->bd_status = BIOC_SDINVALID; 1547 break; 1548 1549 } 1550 1551 /* get the remaining fields */ 1552 *((uint16_t *)&mbox) = ar[arr].pd[disk].mar_pd.mfp_id; 1553 if (mfi_mgmt(sc, MR_DCMD_PD_GET_INFO, MFI_DATA_IN, 1554 sizeof *pd, pd, mbox)) 1555 goto freeme; 1556 1557 bd->bd_size = pd->mpd_size * 512; /* bytes per block */ 1558 1559 /* if pd->mpd_enc_idx is 0 then it is not in an enclosure */ 1560 bd->bd_channel = pd->mpd_enc_idx; 1561 1562 inqbuf = (struct scsi_inquiry_data *)&pd->mpd_inq_data; 1563 memcpy(vend, inqbuf->vendor, sizeof vend - 1); 1564 vend[sizeof vend - 1] = '\0'; 1565 strlcpy(bd->bd_vendor, vend, sizeof(bd->bd_vendor)); 1566 1567 /* XXX find a way to retrieve serial nr from drive */ 1568 /* XXX find a way to get bd_procdev */ 1569 1570 rv = 0; 1571 freeme: 1572 free(pd, M_DEVBUF); 1573 free(cfg, M_DEVBUF); 1574 1575 return (rv); 1576 } 1577 1578 int 1579 mfi_ioctl_alarm(struct mfi_softc *sc, struct bioc_alarm *ba) 1580 { 1581 uint32_t opc, dir = MFI_DATA_NONE; 1582 int rv = 0; 1583 int8_t ret; 1584 1585 switch(ba->ba_opcode) { 1586 case BIOC_SADISABLE: 1587 opc = MR_DCMD_SPEAKER_DISABLE; 1588 break; 1589 1590 case BIOC_SAENABLE: 1591 opc = MR_DCMD_SPEAKER_ENABLE; 1592 break; 1593 1594 case BIOC_SASILENCE: 1595 opc = MR_DCMD_SPEAKER_SILENCE; 1596 break; 1597 1598 case BIOC_GASTATUS: 1599 opc = MR_DCMD_SPEAKER_GET; 1600 dir = MFI_DATA_IN; 1601 break; 1602 1603 case BIOC_SATEST: 1604 opc = MR_DCMD_SPEAKER_TEST; 1605 break; 1606 1607 default: 1608 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_alarm biocalarm invalid " 1609 "opcode %x\n", DEVNAME(sc), ba->ba_opcode); 1610 return (EINVAL); 1611 } 1612 1613 if (mfi_mgmt(sc, opc, dir, sizeof(ret), &ret, NULL)) 1614 rv = EINVAL; 1615 else 1616 if (ba->ba_opcode == BIOC_GASTATUS) 1617 ba->ba_status = ret; 1618 else 1619 ba->ba_status = 0; 1620 1621 return (rv); 1622 } 1623 1624 int 1625 mfi_ioctl_blink(struct mfi_softc *sc, struct bioc_blink *bb) 1626 { 1627 int i, found, rv = EINVAL; 1628 uint8_t mbox[MFI_MBOX_SIZE]; 1629 uint32_t cmd; 1630 struct mfi_pd_list *pd; 1631 1632 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_blink %x\n", DEVNAME(sc), 1633 bb->bb_status); 1634 1635 /* channel 0 means not in an enclosure so can't be blinked */ 1636 if (bb->bb_channel == 0) 1637 return (EINVAL); 1638 1639 pd = malloc(MFI_PD_LIST_SIZE, M_DEVBUF, M_WAITOK); 1640 1641 if (mfi_mgmt(sc, MR_DCMD_PD_GET_LIST, MFI_DATA_IN, 1642 MFI_PD_LIST_SIZE, pd, NULL)) 1643 goto done; 1644 1645 for (i = 0, found = 0; i < pd->mpl_no_pd; i++) 1646 if (bb->bb_channel == pd->mpl_address[i].mpa_enc_index && 1647 bb->bb_target == pd->mpl_address[i].mpa_enc_slot) { 1648 found = 1; 1649 break; 1650 } 1651 1652 if (!found) 1653 goto done; 1654 1655 memset(mbox, 0, sizeof mbox); 1656 1657 *((uint16_t *)&mbox) = pd->mpl_address[i].mpa_pd_id;; 1658 1659 switch (bb->bb_status) { 1660 case BIOC_SBUNBLINK: 1661 cmd = MR_DCMD_PD_UNBLINK; 1662 break; 1663 1664 case BIOC_SBBLINK: 1665 cmd = MR_DCMD_PD_BLINK; 1666 break; 1667 1668 case BIOC_SBALARM: 1669 default: 1670 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_blink biocblink invalid " 1671 "opcode %x\n", DEVNAME(sc), bb->bb_status); 1672 goto done; 1673 } 1674 1675 1676 if (mfi_mgmt(sc, cmd, MFI_DATA_NONE, 0, NULL, mbox)) 1677 goto done; 1678 1679 rv = 0; 1680 done: 1681 free(pd, M_DEVBUF); 1682 return (rv); 1683 } 1684 1685 int 1686 mfi_ioctl_setstate(struct mfi_softc *sc, struct bioc_setstate *bs) 1687 { 1688 struct mfi_pd_list *pd; 1689 int i, found, rv = EINVAL; 1690 uint8_t mbox[MFI_MBOX_SIZE]; 1691 uint32_t cmd; 1692 1693 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_setstate %x\n", DEVNAME(sc), 1694 bs->bs_status); 1695 1696 pd = malloc(MFI_PD_LIST_SIZE, M_DEVBUF, M_WAITOK); 1697 1698 if (mfi_mgmt(sc, MR_DCMD_PD_GET_LIST, MFI_DATA_IN, 1699 MFI_PD_LIST_SIZE, pd, NULL)) 1700 goto done; 1701 1702 for (i = 0, found = 0; i < pd->mpl_no_pd; i++) 1703 if (bs->bs_channel == pd->mpl_address[i].mpa_enc_index && 1704 bs->bs_target == pd->mpl_address[i].mpa_enc_slot) { 1705 found = 1; 1706 break; 1707 } 1708 1709 if (!found) 1710 goto done; 1711 1712 memset(mbox, 0, sizeof mbox); 1713 1714 *((uint16_t *)&mbox) = pd->mpl_address[i].mpa_pd_id;; 1715 1716 switch (bs->bs_status) { 1717 case BIOC_SSONLINE: 1718 mbox[2] = MFI_PD_ONLINE; 1719 cmd = MD_DCMD_PD_SET_STATE; 1720 break; 1721 1722 case BIOC_SSOFFLINE: 1723 mbox[2] = MFI_PD_OFFLINE; 1724 cmd = MD_DCMD_PD_SET_STATE; 1725 break; 1726 1727 case BIOC_SSHOTSPARE: 1728 mbox[2] = MFI_PD_HOTSPARE; 1729 cmd = MD_DCMD_PD_SET_STATE; 1730 break; 1731 /* 1732 case BIOC_SSREBUILD: 1733 cmd = MD_DCMD_PD_REBUILD; 1734 break; 1735 */ 1736 default: 1737 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_setstate invalid " 1738 "opcode %x\n", DEVNAME(sc), bs->bs_status); 1739 goto done; 1740 } 1741 1742 1743 if (mfi_mgmt(sc, MD_DCMD_PD_SET_STATE, MFI_DATA_NONE, 0, NULL, mbox)) 1744 goto done; 1745 1746 rv = 0; 1747 done: 1748 free(pd, M_DEVBUF); 1749 return (rv); 1750 } 1751 1752 int 1753 mfi_bio_hs(struct mfi_softc *sc, int volid, int type, void *bio_hs) 1754 { 1755 struct mfi_conf *cfg; 1756 struct mfi_hotspare *hs; 1757 struct mfi_pd_details *pd; 1758 struct bioc_disk *sdhs; 1759 struct bioc_vol *vdhs; 1760 struct scsi_inquiry_data *inqbuf; 1761 char vend[8+16+4+1]; 1762 int i, rv = EINVAL; 1763 uint32_t size; 1764 uint8_t mbox[MFI_MBOX_SIZE]; 1765 1766 DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs %d\n", DEVNAME(sc), volid); 1767 1768 if (!bio_hs) 1769 return (EINVAL); 1770 1771 pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK); 1772 1773 /* send single element command to retrieve size for full structure */ 1774 cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK); 1775 if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, sizeof *cfg, cfg, NULL)) 1776 goto freeme; 1777 1778 size = cfg->mfc_size; 1779 free(cfg, M_DEVBUF); 1780 1781 /* memory for read config */ 1782 cfg = malloc(size, M_DEVBUF, M_WAITOK); 1783 memset(cfg, 0, size); 1784 if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, size, cfg, NULL)) 1785 goto freeme; 1786 1787 /* calculate offset to hs structure */ 1788 hs = (struct mfi_hotspare *)( 1789 ((uint8_t *)cfg) + offsetof(struct mfi_conf, mfc_array) + 1790 cfg->mfc_array_size * cfg->mfc_no_array + 1791 cfg->mfc_ld_size * cfg->mfc_no_ld); 1792 1793 if (volid < cfg->mfc_no_ld) 1794 goto freeme; /* not a hotspare */ 1795 1796 if (volid > (cfg->mfc_no_ld + cfg->mfc_no_hs)) 1797 goto freeme; /* not a hotspare */ 1798 1799 /* offset into hotspare structure */ 1800 i = volid - cfg->mfc_no_ld; 1801 1802 DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs i %d volid %d no_ld %d no_hs %d " 1803 "hs %p cfg %p id %02x\n", DEVNAME(sc), i, volid, cfg->mfc_no_ld, 1804 cfg->mfc_no_hs, hs, cfg, hs[i].mhs_pd.mfp_id); 1805 1806 /* get pd fields */ 1807 memset(mbox, 0, sizeof mbox); 1808 *((uint16_t *)&mbox) = hs[i].mhs_pd.mfp_id; 1809 if (mfi_mgmt(sc, MR_DCMD_PD_GET_INFO, MFI_DATA_IN, 1810 sizeof *pd, pd, mbox)) { 1811 DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs illegal PD\n", 1812 DEVNAME(sc)); 1813 goto freeme; 1814 } 1815 1816 switch (type) { 1817 case MFI_MGMT_VD: 1818 vdhs = bio_hs; 1819 vdhs->bv_status = BIOC_SVONLINE; 1820 vdhs->bv_size = pd->mpd_size / 2; /* XXX why? / 2 */ 1821 vdhs->bv_level = -1; /* hotspare */ 1822 vdhs->bv_nodisk = 1; 1823 break; 1824 1825 case MFI_MGMT_SD: 1826 sdhs = bio_hs; 1827 sdhs->bd_status = BIOC_SDHOTSPARE; 1828 sdhs->bd_size = pd->mpd_size / 2; /* XXX why? / 2 */ 1829 sdhs->bd_channel = pd->mpd_enc_idx; 1830 sdhs->bd_target = pd->mpd_enc_slot; 1831 inqbuf = (struct scsi_inquiry_data *)&pd->mpd_inq_data; 1832 memcpy(vend, inqbuf->vendor, sizeof vend - 1); 1833 vend[sizeof vend - 1] = '\0'; 1834 strlcpy(sdhs->bd_vendor, vend, sizeof(sdhs->bd_vendor)); 1835 break; 1836 1837 default: 1838 goto freeme; 1839 } 1840 1841 DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs 6\n", DEVNAME(sc)); 1842 rv = 0; 1843 freeme: 1844 free(pd, M_DEVBUF); 1845 free(cfg, M_DEVBUF); 1846 1847 return (rv); 1848 } 1849 1850 int 1851 mfi_create_sensors(struct mfi_softc *sc) 1852 { 1853 struct device *dev; 1854 struct scsibus_softc *ssc; 1855 int i; 1856 1857 TAILQ_FOREACH(dev, &alldevs, dv_list) { 1858 if (dev->dv_parent != &sc->sc_dev) 1859 continue; 1860 1861 /* check if this is the scsibus for the logical disks */ 1862 ssc = (struct scsibus_softc *)dev; 1863 if (ssc->adapter_link == &sc->sc_link) 1864 break; 1865 } 1866 1867 if (ssc == NULL) 1868 return (1); 1869 1870 sc->sc_sensors = malloc(sizeof(struct sensor) * sc->sc_ld_cnt, 1871 M_DEVBUF, M_WAITOK); 1872 if (sc->sc_sensors == NULL) 1873 return (1); 1874 bzero(sc->sc_sensors, sizeof(struct sensor) * sc->sc_ld_cnt); 1875 1876 for (i = 0; i < sc->sc_ld_cnt; i++) { 1877 if (ssc->sc_link[i][0] == NULL) 1878 goto bad; 1879 1880 dev = ssc->sc_link[i][0]->device_softc; 1881 1882 sc->sc_sensors[i].type = SENSOR_DRIVE; 1883 sc->sc_sensors[i].status = SENSOR_S_UNKNOWN; 1884 1885 strlcpy(sc->sc_sensors[i].device, DEVNAME(sc), 1886 sizeof(sc->sc_sensors[i].device)); 1887 strlcpy(sc->sc_sensors[i].desc, dev->dv_xname, 1888 sizeof(sc->sc_sensors[i].desc)); 1889 1890 sensor_add(&sc->sc_sensors[i]); 1891 } 1892 1893 if (sensor_task_register(sc, mfi_refresh_sensors, 10) != 0) 1894 goto bad; 1895 1896 return (0); 1897 1898 bad: 1899 while (--i >= 0) 1900 sensor_del(&sc->sc_sensors[i]); 1901 free(sc->sc_sensors, M_DEVBUF); 1902 1903 return (1); 1904 } 1905 1906 void 1907 mfi_refresh_sensors(void *arg) 1908 { 1909 struct mfi_softc *sc = arg; 1910 int i; 1911 struct bioc_vol bv; 1912 1913 1914 for (i = 0; i < sc->sc_ld_cnt; i++) { 1915 bzero(&bv, sizeof(bv)); 1916 bv.bv_volid = i; 1917 if (mfi_ioctl_vol(sc, &bv)) 1918 return; 1919 1920 switch(bv.bv_status) { 1921 case BIOC_SVOFFLINE: 1922 sc->sc_sensors[i].value = SENSOR_DRIVE_FAIL; 1923 sc->sc_sensors[i].status = SENSOR_S_CRIT; 1924 break; 1925 1926 case BIOC_SVDEGRADED: 1927 sc->sc_sensors[i].value = SENSOR_DRIVE_PFAIL; 1928 sc->sc_sensors[i].status = SENSOR_S_WARN; 1929 break; 1930 1931 case BIOC_SVSCRUB: 1932 case BIOC_SVONLINE: 1933 sc->sc_sensors[i].value = SENSOR_DRIVE_ONLINE; 1934 sc->sc_sensors[i].status = SENSOR_S_OK; 1935 break; 1936 1937 case BIOC_SVINVALID: 1938 /* FALLTRHOUGH */ 1939 default: 1940 sc->sc_sensors[i].value = 0; /* unknown */ 1941 sc->sc_sensors[i].status = SENSOR_S_UNKNOWN; 1942 } 1943 1944 } 1945 } 1946 #endif /* NBIO > 0 */ 1947
Indexes created Tue Sep 23 14:10:03 GMT 2025