mfi.c revision 1.16
1 /* $NetBSD: mfi.c,v 1.16 2008/04/22 09:29:08 cegger Exp $ */ 2 /* $OpenBSD: mfi.c,v 1.66 2006/11/28 23:59:45 dlg Exp $ */ 3 /* 4 * Copyright (c) 2006 Marco Peereboom <marco (at) peereboom.us> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <sys/cdefs.h> 20 __KERNEL_RCSID(0, "$NetBSD: mfi.c,v 1.16 2008/04/22 09:29:08 cegger Exp $"); 21 22 #include "bio.h" 23 24 #include <sys/param.h> 25 #include <sys/systm.h> 26 #include <sys/buf.h> 27 #include <sys/ioctl.h> 28 #include <sys/device.h> 29 #include <sys/kernel.h> 30 #include <sys/malloc.h> 31 #include <sys/proc.h> 32 33 #include <uvm/uvm_param.h> 34 35 #include <sys/bus.h> 36 37 #include <dev/scsipi/scsipi_all.h> 38 #include <dev/scsipi/scsi_all.h> 39 #include <dev/scsipi/scsi_spc.h> 40 #include <dev/scsipi/scsipi_disk.h> 41 #include <dev/scsipi/scsi_disk.h> 42 #include <dev/scsipi/scsiconf.h> 43 44 #include <dev/ic/mfireg.h> 45 #include <dev/ic/mfivar.h> 46 47 #if NBIO > 0 48 #include <dev/biovar.h> 49 #endif /* NBIO > 0 */ 50 51 #ifdef MFI_DEBUG 52 uint32_t mfi_debug = 0 53 /* | MFI_D_CMD */ 54 /* | MFI_D_INTR */ 55 /* | MFI_D_MISC */ 56 /* | MFI_D_DMA */ 57 | MFI_D_IOCTL 58 /* | MFI_D_RW */ 59 /* | MFI_D_MEM */ 60 /* | MFI_D_CCB */ 61 ; 62 #endif 63 64 static void mfi_scsipi_request(struct scsipi_channel *, 65 scsipi_adapter_req_t, void *); 66 static void mfiminphys(struct buf *bp); 67 68 static struct mfi_ccb *mfi_get_ccb(struct mfi_softc *); 69 static void mfi_put_ccb(struct mfi_ccb *); 70 static int mfi_init_ccb(struct mfi_softc *); 71 72 static struct mfi_mem *mfi_allocmem(struct mfi_softc *, size_t); 73 static void mfi_freemem(struct mfi_softc *, struct mfi_mem *); 74 75 static int mfi_transition_firmware(struct mfi_softc *); 76 static int mfi_initialize_firmware(struct mfi_softc *); 77 static int mfi_get_info(struct mfi_softc *); 78 static uint32_t mfi_read(struct mfi_softc *, bus_size_t); 79 static void mfi_write(struct mfi_softc *, bus_size_t, uint32_t); 80 static int mfi_poll(struct mfi_ccb *); 81 static int mfi_create_sgl(struct mfi_ccb *, int); 82 83 /* commands */ 84 static int mfi_scsi_ld(struct mfi_ccb *, struct scsipi_xfer *); 85 static int mfi_scsi_io(struct mfi_ccb *, struct scsipi_xfer *, 86 uint32_t, uint32_t); 87 static void mfi_scsi_xs_done(struct mfi_ccb *); 88 static int mfi_mgmt(struct mfi_softc *, uint32_t, uint32_t, 89 uint32_t, void *, uint8_t *); 90 static void mfi_mgmt_done(struct mfi_ccb *); 91 92 #if NBIO > 0 93 static int mfi_ioctl(struct device *, u_long, void *); 94 static int mfi_ioctl_inq(struct mfi_softc *, struct bioc_inq *); 95 static int mfi_ioctl_vol(struct mfi_softc *, struct bioc_vol *); 96 static int mfi_ioctl_disk(struct mfi_softc *, struct bioc_disk *); 97 static int mfi_ioctl_alarm(struct mfi_softc *, 98 struct bioc_alarm *); 99 static int mfi_ioctl_blink(struct mfi_softc *sc, 100 struct bioc_blink *); 101 static int mfi_ioctl_setstate(struct mfi_softc *, 102 struct bioc_setstate *); 103 static int mfi_bio_hs(struct mfi_softc *, int, int, void *); 104 static int mfi_create_sensors(struct mfi_softc *); 105 static void mfi_sensor_refresh(struct sysmon_envsys *, 106 envsys_data_t *); 107 #endif /* NBIO > 0 */ 108 109 static uint32_t mfi_xscale_fw_state(struct mfi_softc *sc); 110 static void mfi_xscale_intr_ena(struct mfi_softc *sc); 111 static int mfi_xscale_intr(struct mfi_softc *sc); 112 static void mfi_xscale_post(struct mfi_softc *sc, struct mfi_ccb *ccb); 113 114 static const struct mfi_iop_ops mfi_iop_xscale = { 115 mfi_xscale_fw_state, 116 mfi_xscale_intr_ena, 117 mfi_xscale_intr, 118 mfi_xscale_post 119 }; 120 121 static uint32_t mfi_ppc_fw_state(struct mfi_softc *sc); 122 static void mfi_ppc_intr_ena(struct mfi_softc *sc); 123 static int mfi_ppc_intr(struct mfi_softc *sc); 124 static void mfi_ppc_post(struct mfi_softc *sc, struct mfi_ccb *ccb); 125 126 static const struct mfi_iop_ops mfi_iop_ppc = { 127 mfi_ppc_fw_state, 128 mfi_ppc_intr_ena, 129 mfi_ppc_intr, 130 mfi_ppc_post 131 }; 132 133 #define mfi_fw_state(_s) ((_s)->sc_iop->mio_fw_state(_s)) 134 #define mfi_intr_enable(_s) ((_s)->sc_iop->mio_intr_ena(_s)) 135 #define mfi_my_intr(_s) ((_s)->sc_iop->mio_intr(_s)) 136 #define mfi_post(_s, _c) ((_s)->sc_iop->mio_post((_s), (_c))) 137 138 static struct mfi_ccb * 139 mfi_get_ccb(struct mfi_softc *sc) 140 { 141 struct mfi_ccb *ccb; 142 int s; 143 144 s = splbio(); 145 ccb = TAILQ_FIRST(&sc->sc_ccb_freeq); 146 if (ccb) { 147 TAILQ_REMOVE(&sc->sc_ccb_freeq, ccb, ccb_link); 148 ccb->ccb_state = MFI_CCB_READY; 149 } 150 splx(s); 151 152 DNPRINTF(MFI_D_CCB, "%s: mfi_get_ccb: %p\n", DEVNAME(sc), ccb); 153 154 return ccb; 155 } 156 157 static void 158 mfi_put_ccb(struct mfi_ccb *ccb) 159 { 160 struct mfi_softc *sc = ccb->ccb_sc; 161 int s; 162 163 DNPRINTF(MFI_D_CCB, "%s: mfi_put_ccb: %p\n", DEVNAME(sc), ccb); 164 165 s = splbio(); 166 ccb->ccb_state = MFI_CCB_FREE; 167 ccb->ccb_xs = NULL; 168 ccb->ccb_flags = 0; 169 ccb->ccb_done = NULL; 170 ccb->ccb_direction = 0; 171 ccb->ccb_frame_size = 0; 172 ccb->ccb_extra_frames = 0; 173 ccb->ccb_sgl = NULL; 174 ccb->ccb_data = NULL; 175 ccb->ccb_len = 0; 176 TAILQ_INSERT_TAIL(&sc->sc_ccb_freeq, ccb, ccb_link); 177 splx(s); 178 } 179 180 static int 181 mfi_init_ccb(struct mfi_softc *sc) 182 { 183 struct mfi_ccb *ccb; 184 uint32_t i; 185 int error; 186 187 DNPRINTF(MFI_D_CCB, "%s: mfi_init_ccb\n", DEVNAME(sc)); 188 189 sc->sc_ccb = malloc(sizeof(struct mfi_ccb) * sc->sc_max_cmds, 190 M_DEVBUF, M_WAITOK|M_ZERO); 191 192 for (i = 0; i < sc->sc_max_cmds; i++) { 193 ccb = &sc->sc_ccb[i]; 194 195 ccb->ccb_sc = sc; 196 197 /* select i'th frame */ 198 ccb->ccb_frame = (union mfi_frame *) 199 ((char*)MFIMEM_KVA(sc->sc_frames) + sc->sc_frames_size * i); 200 ccb->ccb_pframe = 201 MFIMEM_DVA(sc->sc_frames) + sc->sc_frames_size * i; 202 ccb->ccb_frame->mfr_header.mfh_context = i; 203 204 /* select i'th sense */ 205 ccb->ccb_sense = (struct mfi_sense *) 206 ((char*)MFIMEM_KVA(sc->sc_sense) + MFI_SENSE_SIZE * i); 207 ccb->ccb_psense = 208 (MFIMEM_DVA(sc->sc_sense) + MFI_SENSE_SIZE * i); 209 210 /* create a dma map for transfer */ 211 error = bus_dmamap_create(sc->sc_dmat, 212 MAXPHYS, sc->sc_max_sgl, MAXPHYS, 0, 213 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->ccb_dmamap); 214 if (error) { 215 printf("%s: cannot create ccb dmamap (%d)\n", 216 DEVNAME(sc), error); 217 goto destroy; 218 } 219 220 DNPRINTF(MFI_D_CCB, 221 "ccb(%d): %p frame: %#lx (%#lx) sense: %#lx (%#lx) map: %#lx\n", 222 ccb->ccb_frame->mfr_header.mfh_context, ccb, 223 (u_long)ccb->ccb_frame, (u_long)ccb->ccb_pframe, 224 (u_long)ccb->ccb_sense, (u_long)ccb->ccb_psense, 225 (u_long)ccb->ccb_dmamap); 226 227 /* add ccb to queue */ 228 mfi_put_ccb(ccb); 229 } 230 231 return 0; 232 destroy: 233 /* free dma maps and ccb memory */ 234 if (i > 0) { 235 i--; /* the failing index hasn't been allocated */ 236 for (; i > 0; i--) { 237 ccb = &sc->sc_ccb[i]; 238 bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap); 239 } 240 KASSERT(i == 0); 241 ccb = &sc->sc_ccb[i]; 242 bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap); 243 } 244 245 free(sc->sc_ccb, M_DEVBUF); 246 247 return 1; 248 } 249 250 static uint32_t 251 mfi_read(struct mfi_softc *sc, bus_size_t r) 252 { 253 uint32_t rv; 254 255 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 256 BUS_SPACE_BARRIER_READ); 257 rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, r); 258 259 DNPRINTF(MFI_D_RW, "%s: mr 0x%lx 0x08%x ", DEVNAME(sc), (u_long)r, rv); 260 return rv; 261 } 262 263 static void 264 mfi_write(struct mfi_softc *sc, bus_size_t r, uint32_t v) 265 { 266 DNPRINTF(MFI_D_RW, "%s: mw 0x%lx 0x%08x", DEVNAME(sc), (u_long)r, v); 267 268 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v); 269 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 270 BUS_SPACE_BARRIER_WRITE); 271 } 272 273 static struct mfi_mem * 274 mfi_allocmem(struct mfi_softc *sc, size_t size) 275 { 276 struct mfi_mem *mm; 277 int nsegs; 278 279 DNPRINTF(MFI_D_MEM, "%s: mfi_allocmem: %ld\n", DEVNAME(sc), 280 (long)size); 281 282 mm = malloc(sizeof(struct mfi_mem), M_DEVBUF, M_NOWAIT|M_ZERO); 283 if (mm == NULL) 284 return NULL; 285 286 mm->am_size = size; 287 288 if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, 289 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &mm->am_map) != 0) 290 goto amfree; 291 292 if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &mm->am_seg, 1, 293 &nsegs, BUS_DMA_NOWAIT) != 0) 294 goto destroy; 295 296 if (bus_dmamem_map(sc->sc_dmat, &mm->am_seg, nsegs, size, &mm->am_kva, 297 BUS_DMA_NOWAIT) != 0) 298 goto free; 299 300 if (bus_dmamap_load(sc->sc_dmat, mm->am_map, mm->am_kva, size, NULL, 301 BUS_DMA_NOWAIT) != 0) 302 goto unmap; 303 304 DNPRINTF(MFI_D_MEM, " kva: %p dva: %p map: %p\n", 305 mm->am_kva, (void *)mm->am_map->dm_segs[0].ds_addr, mm->am_map); 306 307 memset(mm->am_kva, 0, size); 308 return mm; 309 310 unmap: 311 bus_dmamem_unmap(sc->sc_dmat, mm->am_kva, size); 312 free: 313 bus_dmamem_free(sc->sc_dmat, &mm->am_seg, 1); 314 destroy: 315 bus_dmamap_destroy(sc->sc_dmat, mm->am_map); 316 amfree: 317 free(mm, M_DEVBUF); 318 319 return NULL; 320 } 321 322 static void 323 mfi_freemem(struct mfi_softc *sc, struct mfi_mem *mm) 324 { 325 DNPRINTF(MFI_D_MEM, "%s: mfi_freemem: %p\n", DEVNAME(sc), mm); 326 327 bus_dmamap_unload(sc->sc_dmat, mm->am_map); 328 bus_dmamem_unmap(sc->sc_dmat, mm->am_kva, mm->am_size); 329 bus_dmamem_free(sc->sc_dmat, &mm->am_seg, 1); 330 bus_dmamap_destroy(sc->sc_dmat, mm->am_map); 331 free(mm, M_DEVBUF); 332 } 333 334 static int 335 mfi_transition_firmware(struct mfi_softc *sc) 336 { 337 int32_t fw_state, cur_state; 338 int max_wait, i; 339 340 fw_state = mfi_fw_state(sc) & MFI_STATE_MASK; 341 342 DNPRINTF(MFI_D_CMD, "%s: mfi_transition_firmware: %#x\n", DEVNAME(sc), 343 fw_state); 344 345 while (fw_state != MFI_STATE_READY) { 346 DNPRINTF(MFI_D_MISC, 347 "%s: waiting for firmware to become ready\n", 348 DEVNAME(sc)); 349 cur_state = fw_state; 350 switch (fw_state) { 351 case MFI_STATE_FAULT: 352 printf("%s: firmware fault\n", DEVNAME(sc)); 353 return 1; 354 case MFI_STATE_WAIT_HANDSHAKE: 355 mfi_write(sc, MFI_IDB, MFI_INIT_CLEAR_HANDSHAKE); 356 max_wait = 2; 357 break; 358 case MFI_STATE_OPERATIONAL: 359 mfi_write(sc, MFI_IDB, MFI_INIT_READY); 360 max_wait = 10; 361 break; 362 case MFI_STATE_UNDEFINED: 363 case MFI_STATE_BB_INIT: 364 max_wait = 2; 365 break; 366 case MFI_STATE_FW_INIT: 367 case MFI_STATE_DEVICE_SCAN: 368 case MFI_STATE_FLUSH_CACHE: 369 max_wait = 20; 370 break; 371 default: 372 printf("%s: unknown firmware state %d\n", 373 DEVNAME(sc), fw_state); 374 return 1; 375 } 376 for (i = 0; i < (max_wait * 10); i++) { 377 fw_state = mfi_fw_state(sc) & MFI_STATE_MASK; 378 if (fw_state == cur_state) 379 DELAY(100000); 380 else 381 break; 382 } 383 if (fw_state == cur_state) { 384 printf("%s: firmware stuck in state %#x\n", 385 DEVNAME(sc), fw_state); 386 return 1; 387 } 388 } 389 390 return 0; 391 } 392 393 static int 394 mfi_initialize_firmware(struct mfi_softc *sc) 395 { 396 struct mfi_ccb *ccb; 397 struct mfi_init_frame *init; 398 struct mfi_init_qinfo *qinfo; 399 400 DNPRINTF(MFI_D_MISC, "%s: mfi_initialize_firmware\n", DEVNAME(sc)); 401 402 if ((ccb = mfi_get_ccb(sc)) == NULL) 403 return 1; 404 405 init = &ccb->ccb_frame->mfr_init; 406 qinfo = (struct mfi_init_qinfo *)((uint8_t *)init + MFI_FRAME_SIZE); 407 408 memset(qinfo, 0, sizeof *qinfo); 409 qinfo->miq_rq_entries = sc->sc_max_cmds + 1; 410 qinfo->miq_rq_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) + 411 offsetof(struct mfi_prod_cons, mpc_reply_q)); 412 qinfo->miq_pi_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) + 413 offsetof(struct mfi_prod_cons, mpc_producer)); 414 qinfo->miq_ci_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) + 415 offsetof(struct mfi_prod_cons, mpc_consumer)); 416 417 init->mif_header.mfh_cmd = MFI_CMD_INIT; 418 init->mif_header.mfh_data_len = sizeof *qinfo; 419 init->mif_qinfo_new_addr_lo = htole32(ccb->ccb_pframe + MFI_FRAME_SIZE); 420 421 DNPRINTF(MFI_D_MISC, "%s: entries: %#x rq: %#x pi: %#x ci: %#x\n", 422 DEVNAME(sc), 423 qinfo->miq_rq_entries, qinfo->miq_rq_addr_lo, 424 qinfo->miq_pi_addr_lo, qinfo->miq_ci_addr_lo); 425 426 if (mfi_poll(ccb)) { 427 printf("%s: mfi_initialize_firmware failed\n", DEVNAME(sc)); 428 return 1; 429 } 430 431 mfi_put_ccb(ccb); 432 433 return 0; 434 } 435 436 static int 437 mfi_get_info(struct mfi_softc *sc) 438 { 439 #ifdef MFI_DEBUG 440 int i; 441 #endif 442 DNPRINTF(MFI_D_MISC, "%s: mfi_get_info\n", DEVNAME(sc)); 443 444 if (mfi_mgmt(sc, MR_DCMD_CTRL_GET_INFO, MFI_DATA_IN, 445 sizeof(sc->sc_info), &sc->sc_info, NULL)) 446 return 1; 447 448 #ifdef MFI_DEBUG 449 450 for (i = 0; i < sc->sc_info.mci_image_component_count; i++) { 451 printf("%s: active FW %s Version %s date %s time %s\n", 452 DEVNAME(sc), 453 sc->sc_info.mci_image_component[i].mic_name, 454 sc->sc_info.mci_image_component[i].mic_version, 455 sc->sc_info.mci_image_component[i].mic_build_date, 456 sc->sc_info.mci_image_component[i].mic_build_time); 457 } 458 459 for (i = 0; i < sc->sc_info.mci_pending_image_component_count; i++) { 460 printf("%s: pending FW %s Version %s date %s time %s\n", 461 DEVNAME(sc), 462 sc->sc_info.mci_pending_image_component[i].mic_name, 463 sc->sc_info.mci_pending_image_component[i].mic_version, 464 sc->sc_info.mci_pending_image_component[i].mic_build_date, 465 sc->sc_info.mci_pending_image_component[i].mic_build_time); 466 } 467 468 printf("%s: max_arms %d max_spans %d max_arrs %d max_lds %d name %s\n", 469 DEVNAME(sc), 470 sc->sc_info.mci_max_arms, 471 sc->sc_info.mci_max_spans, 472 sc->sc_info.mci_max_arrays, 473 sc->sc_info.mci_max_lds, 474 sc->sc_info.mci_product_name); 475 476 printf("%s: serial %s present %#x fw time %d max_cmds %d max_sg %d\n", 477 DEVNAME(sc), 478 sc->sc_info.mci_serial_number, 479 sc->sc_info.mci_hw_present, 480 sc->sc_info.mci_current_fw_time, 481 sc->sc_info.mci_max_cmds, 482 sc->sc_info.mci_max_sg_elements); 483 484 printf("%s: max_rq %d lds_pres %d lds_deg %d lds_off %d pd_pres %d\n", 485 DEVNAME(sc), 486 sc->sc_info.mci_max_request_size, 487 sc->sc_info.mci_lds_present, 488 sc->sc_info.mci_lds_degraded, 489 sc->sc_info.mci_lds_offline, 490 sc->sc_info.mci_pd_present); 491 492 printf("%s: pd_dsk_prs %d pd_dsk_pred_fail %d pd_dsk_fail %d\n", 493 DEVNAME(sc), 494 sc->sc_info.mci_pd_disks_present, 495 sc->sc_info.mci_pd_disks_pred_failure, 496 sc->sc_info.mci_pd_disks_failed); 497 498 printf("%s: nvram %d mem %d flash %d\n", 499 DEVNAME(sc), 500 sc->sc_info.mci_nvram_size, 501 sc->sc_info.mci_memory_size, 502 sc->sc_info.mci_flash_size); 503 504 printf("%s: ram_cor %d ram_uncor %d clus_all %d clus_act %d\n", 505 DEVNAME(sc), 506 sc->sc_info.mci_ram_correctable_errors, 507 sc->sc_info.mci_ram_uncorrectable_errors, 508 sc->sc_info.mci_cluster_allowed, 509 sc->sc_info.mci_cluster_active); 510 511 printf("%s: max_strps_io %d raid_lvl %#x adapt_ops %#x ld_ops %#x\n", 512 DEVNAME(sc), 513 sc->sc_info.mci_max_strips_per_io, 514 sc->sc_info.mci_raid_levels, 515 sc->sc_info.mci_adapter_ops, 516 sc->sc_info.mci_ld_ops); 517 518 printf("%s: strp_sz_min %d strp_sz_max %d pd_ops %#x pd_mix %#x\n", 519 DEVNAME(sc), 520 sc->sc_info.mci_stripe_sz_ops.min, 521 sc->sc_info.mci_stripe_sz_ops.max, 522 sc->sc_info.mci_pd_ops, 523 sc->sc_info.mci_pd_mix_support); 524 525 printf("%s: ecc_bucket %d pckg_prop %s\n", 526 DEVNAME(sc), 527 sc->sc_info.mci_ecc_bucket_count, 528 sc->sc_info.mci_package_version); 529 530 printf("%s: sq_nm %d prd_fail_poll %d intr_thrtl %d intr_thrtl_to %d\n", 531 DEVNAME(sc), 532 sc->sc_info.mci_properties.mcp_seq_num, 533 sc->sc_info.mci_properties.mcp_pred_fail_poll_interval, 534 sc->sc_info.mci_properties.mcp_intr_throttle_cnt, 535 sc->sc_info.mci_properties.mcp_intr_throttle_timeout); 536 537 printf("%s: rbld_rate %d patr_rd_rate %d bgi_rate %d cc_rate %d\n", 538 DEVNAME(sc), 539 sc->sc_info.mci_properties.mcp_rebuild_rate, 540 sc->sc_info.mci_properties.mcp_patrol_read_rate, 541 sc->sc_info.mci_properties.mcp_bgi_rate, 542 sc->sc_info.mci_properties.mcp_cc_rate); 543 544 printf("%s: rc_rate %d ch_flsh %d spin_cnt %d spin_dly %d clus_en %d\n", 545 DEVNAME(sc), 546 sc->sc_info.mci_properties.mcp_recon_rate, 547 sc->sc_info.mci_properties.mcp_cache_flush_interval, 548 sc->sc_info.mci_properties.mcp_spinup_drv_cnt, 549 sc->sc_info.mci_properties.mcp_spinup_delay, 550 sc->sc_info.mci_properties.mcp_cluster_enable); 551 552 printf("%s: coerc %d alarm %d dis_auto_rbld %d dis_bat_wrn %d ecc %d\n", 553 DEVNAME(sc), 554 sc->sc_info.mci_properties.mcp_coercion_mode, 555 sc->sc_info.mci_properties.mcp_alarm_enable, 556 sc->sc_info.mci_properties.mcp_disable_auto_rebuild, 557 sc->sc_info.mci_properties.mcp_disable_battery_warn, 558 sc->sc_info.mci_properties.mcp_ecc_bucket_size); 559 560 printf("%s: ecc_leak %d rest_hs %d exp_encl_dev %d\n", 561 DEVNAME(sc), 562 sc->sc_info.mci_properties.mcp_ecc_bucket_leak_rate, 563 sc->sc_info.mci_properties.mcp_restore_hotspare_on_insertion, 564 sc->sc_info.mci_properties.mcp_expose_encl_devices); 565 566 printf("%s: vendor %#x device %#x subvendor %#x subdevice %#x\n", 567 DEVNAME(sc), 568 sc->sc_info.mci_pci.mip_vendor, 569 sc->sc_info.mci_pci.mip_device, 570 sc->sc_info.mci_pci.mip_subvendor, 571 sc->sc_info.mci_pci.mip_subdevice); 572 573 printf("%s: type %#x port_count %d port_addr ", 574 DEVNAME(sc), 575 sc->sc_info.mci_host.mih_type, 576 sc->sc_info.mci_host.mih_port_count); 577 578 for (i = 0; i < 8; i++) 579 printf("%.0lx ", sc->sc_info.mci_host.mih_port_addr[i]); 580 printf("\n"); 581 582 printf("%s: type %.x port_count %d port_addr ", 583 DEVNAME(sc), 584 sc->sc_info.mci_device.mid_type, 585 sc->sc_info.mci_device.mid_port_count); 586 587 for (i = 0; i < 8; i++) 588 printf("%.0lx ", sc->sc_info.mci_device.mid_port_addr[i]); 589 printf("\n"); 590 #endif /* MFI_DEBUG */ 591 592 return 0; 593 } 594 595 static void 596 mfiminphys(struct buf *bp) 597 { 598 DNPRINTF(MFI_D_MISC, "mfiminphys: %d\n", bp->b_bcount); 599 600 /* XXX currently using MFI_MAXFER = MAXPHYS */ 601 if (bp->b_bcount > MFI_MAXFER) 602 bp->b_bcount = MFI_MAXFER; 603 minphys(bp); 604 } 605 606 int 607 mfi_attach(struct mfi_softc *sc, enum mfi_iop iop) 608 { 609 struct scsipi_adapter *adapt = &sc->sc_adapt; 610 struct scsipi_channel *chan = &sc->sc_chan; 611 uint32_t status, frames; 612 int i; 613 614 DNPRINTF(MFI_D_MISC, "%s: mfi_attach\n", DEVNAME(sc)); 615 616 switch (iop) { 617 case MFI_IOP_XSCALE: 618 sc->sc_iop = &mfi_iop_xscale; 619 break; 620 case MFI_IOP_PPC: 621 sc->sc_iop = &mfi_iop_ppc; 622 break; 623 default: 624 panic("%s: unknown iop %d", DEVNAME(sc), iop); 625 } 626 627 if (mfi_transition_firmware(sc)) 628 return 1; 629 630 TAILQ_INIT(&sc->sc_ccb_freeq); 631 632 status = mfi_fw_state(sc); 633 sc->sc_max_cmds = status & MFI_STATE_MAXCMD_MASK; 634 sc->sc_max_sgl = (status & MFI_STATE_MAXSGL_MASK) >> 16; 635 DNPRINTF(MFI_D_MISC, "%s: max commands: %u, max sgl: %u\n", 636 DEVNAME(sc), sc->sc_max_cmds, sc->sc_max_sgl); 637 638 /* consumer/producer and reply queue memory */ 639 sc->sc_pcq = mfi_allocmem(sc, (sizeof(uint32_t) * sc->sc_max_cmds) + 640 sizeof(struct mfi_prod_cons)); 641 if (sc->sc_pcq == NULL) { 642 aprint_error("%s: unable to allocate reply queue memory\n", 643 DEVNAME(sc)); 644 goto nopcq; 645 } 646 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0, 647 sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons), 648 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 649 650 /* frame memory */ 651 /* we are not doing 64 bit IO so only calculate # of 32 bit frames */ 652 frames = (sizeof(struct mfi_sg32) * sc->sc_max_sgl + 653 MFI_FRAME_SIZE - 1) / MFI_FRAME_SIZE + 1; 654 sc->sc_frames_size = frames * MFI_FRAME_SIZE; 655 sc->sc_frames = mfi_allocmem(sc, sc->sc_frames_size * sc->sc_max_cmds); 656 if (sc->sc_frames == NULL) { 657 aprint_error("%s: unable to allocate frame memory\n", 658 DEVNAME(sc)); 659 goto noframe; 660 } 661 /* XXX hack, fix this */ 662 if (MFIMEM_DVA(sc->sc_frames) & 0x3f) { 663 aprint_error("%s: improper frame alignment (%#llx) FIXME\n", 664 DEVNAME(sc), (long long int)MFIMEM_DVA(sc->sc_frames)); 665 goto noframe; 666 } 667 668 /* sense memory */ 669 sc->sc_sense = mfi_allocmem(sc, sc->sc_max_cmds * MFI_SENSE_SIZE); 670 if (sc->sc_sense == NULL) { 671 aprint_error("%s: unable to allocate sense memory\n", 672 DEVNAME(sc)); 673 goto nosense; 674 } 675 676 /* now that we have all memory bits go initialize ccbs */ 677 if (mfi_init_ccb(sc)) { 678 aprint_error("%s: could not init ccb list\n", DEVNAME(sc)); 679 goto noinit; 680 } 681 682 /* kickstart firmware with all addresses and pointers */ 683 if (mfi_initialize_firmware(sc)) { 684 aprint_error("%s: could not initialize firmware\n", 685 DEVNAME(sc)); 686 goto noinit; 687 } 688 689 if (mfi_get_info(sc)) { 690 aprint_error("%s: could not retrieve controller information\n", 691 DEVNAME(sc)); 692 goto noinit; 693 } 694 695 aprint_normal("%s: logical drives %d, version %s, %dMB RAM\n", 696 DEVNAME(sc), 697 sc->sc_info.mci_lds_present, 698 sc->sc_info.mci_package_version, 699 sc->sc_info.mci_memory_size); 700 701 sc->sc_ld_cnt = sc->sc_info.mci_lds_present; 702 sc->sc_max_ld = sc->sc_ld_cnt; 703 for (i = 0; i < sc->sc_ld_cnt; i++) 704 sc->sc_ld[i].ld_present = 1; 705 706 memset(adapt, 0, sizeof(*adapt)); 707 adapt->adapt_dev = &sc->sc_dev; 708 adapt->adapt_nchannels = 1; 709 if (sc->sc_ld_cnt) 710 adapt->adapt_openings = sc->sc_max_cmds / sc->sc_ld_cnt; 711 else 712 adapt->adapt_openings = sc->sc_max_cmds; 713 adapt->adapt_max_periph = adapt->adapt_openings; 714 adapt->adapt_request = mfi_scsipi_request; 715 adapt->adapt_minphys = mfiminphys; 716 717 memset(chan, 0, sizeof(*chan)); 718 chan->chan_adapter = adapt; 719 chan->chan_bustype = &scsi_bustype; 720 chan->chan_channel = 0; 721 chan->chan_flags = 0; 722 chan->chan_nluns = 8; 723 chan->chan_ntargets = MFI_MAX_LD; 724 chan->chan_id = MFI_MAX_LD; 725 726 (void)config_found(&sc->sc_dev, &sc->sc_chan, scsiprint); 727 728 /* enable interrupts */ 729 mfi_intr_enable(sc); 730 731 #if NBIO > 0 732 if (bio_register(&sc->sc_dev, mfi_ioctl) != 0) 733 panic("%s: controller registration failed", DEVNAME(sc)); 734 if (mfi_create_sensors(sc) != 0) 735 aprint_error("%s: unable to create sensors\n", DEVNAME(sc)); 736 #endif /* NBIO > 0 */ 737 738 return 0; 739 noinit: 740 mfi_freemem(sc, sc->sc_sense); 741 nosense: 742 mfi_freemem(sc, sc->sc_frames); 743 noframe: 744 mfi_freemem(sc, sc->sc_pcq); 745 nopcq: 746 return 1; 747 } 748 749 static int 750 mfi_poll(struct mfi_ccb *ccb) 751 { 752 struct mfi_softc *sc = ccb->ccb_sc; 753 struct mfi_frame_header *hdr; 754 int to = 0; 755 756 DNPRINTF(MFI_D_CMD, "%s: mfi_poll\n", DEVNAME(sc)); 757 758 hdr = &ccb->ccb_frame->mfr_header; 759 hdr->mfh_cmd_status = 0xff; 760 hdr->mfh_flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE; 761 762 mfi_post(sc, ccb); 763 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 764 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 765 sc->sc_frames_size, BUS_DMASYNC_POSTREAD); 766 767 while (hdr->mfh_cmd_status == 0xff) { 768 delay(1000); 769 if (to++ > 5000) /* XXX 5 seconds busywait sucks */ 770 break; 771 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 772 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 773 sc->sc_frames_size, BUS_DMASYNC_POSTREAD); 774 } 775 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 776 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 777 sc->sc_frames_size, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 778 779 if (ccb->ccb_data != NULL) { 780 DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done sync\n", 781 DEVNAME(sc)); 782 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 783 ccb->ccb_dmamap->dm_mapsize, 784 (ccb->ccb_direction & MFI_DATA_IN) ? 785 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 786 787 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap); 788 } 789 790 if (hdr->mfh_cmd_status == 0xff) { 791 printf("%s: timeout on ccb %d\n", DEVNAME(sc), 792 hdr->mfh_context); 793 ccb->ccb_flags |= MFI_CCB_F_ERR; 794 return 1; 795 } 796 797 return 0; 798 } 799 800 int 801 mfi_intr(void *arg) 802 { 803 struct mfi_softc *sc = arg; 804 struct mfi_prod_cons *pcq; 805 struct mfi_ccb *ccb; 806 uint32_t producer, consumer, ctx; 807 int claimed = 0; 808 809 if (!mfi_my_intr(sc)) 810 return 0; 811 812 pcq = MFIMEM_KVA(sc->sc_pcq); 813 814 DNPRINTF(MFI_D_INTR, "%s: mfi_intr %#lx %#lx\n", DEVNAME(sc), 815 (u_long)sc, (u_long)pcq); 816 817 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0, 818 sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons), 819 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 820 821 producer = pcq->mpc_producer; 822 consumer = pcq->mpc_consumer; 823 824 while (consumer != producer) { 825 DNPRINTF(MFI_D_INTR, "%s: mfi_intr pi %#x ci %#x\n", 826 DEVNAME(sc), producer, consumer); 827 828 ctx = pcq->mpc_reply_q[consumer]; 829 pcq->mpc_reply_q[consumer] = MFI_INVALID_CTX; 830 if (ctx == MFI_INVALID_CTX) 831 printf("%s: invalid context, p: %d c: %d\n", 832 DEVNAME(sc), producer, consumer); 833 else { 834 /* XXX remove from queue and call scsi_done */ 835 ccb = &sc->sc_ccb[ctx]; 836 DNPRINTF(MFI_D_INTR, "%s: mfi_intr context %#x\n", 837 DEVNAME(sc), ctx); 838 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 839 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 840 sc->sc_frames_size, 841 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 842 ccb->ccb_done(ccb); 843 844 claimed = 1; 845 } 846 consumer++; 847 if (consumer == (sc->sc_max_cmds + 1)) 848 consumer = 0; 849 } 850 851 pcq->mpc_consumer = consumer; 852 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0, 853 sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons), 854 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 855 856 return claimed; 857 } 858 859 static int 860 mfi_scsi_io(struct mfi_ccb *ccb, struct scsipi_xfer *xs, uint32_t blockno, 861 uint32_t blockcnt) 862 { 863 struct scsipi_periph *periph = xs->xs_periph; 864 struct mfi_io_frame *io; 865 866 DNPRINTF(MFI_D_CMD, "%s: mfi_scsi_io: %d\n", 867 device_xname(periph->periph_channel->chan_adapter->adapt_dev), 868 periph->periph_target); 869 870 if (!xs->data) 871 return 1; 872 873 io = &ccb->ccb_frame->mfr_io; 874 if (xs->xs_control & XS_CTL_DATA_IN) { 875 io->mif_header.mfh_cmd = MFI_CMD_LD_READ; 876 ccb->ccb_direction = MFI_DATA_IN; 877 } else { 878 io->mif_header.mfh_cmd = MFI_CMD_LD_WRITE; 879 ccb->ccb_direction = MFI_DATA_OUT; 880 } 881 io->mif_header.mfh_target_id = periph->periph_target; 882 io->mif_header.mfh_timeout = 0; 883 io->mif_header.mfh_flags = 0; 884 io->mif_header.mfh_sense_len = MFI_SENSE_SIZE; 885 io->mif_header.mfh_data_len= blockcnt; 886 io->mif_lba_hi = 0; 887 io->mif_lba_lo = blockno; 888 io->mif_sense_addr_lo = htole32(ccb->ccb_psense); 889 io->mif_sense_addr_hi = 0; 890 891 ccb->ccb_done = mfi_scsi_xs_done; 892 ccb->ccb_xs = xs; 893 ccb->ccb_frame_size = MFI_IO_FRAME_SIZE; 894 ccb->ccb_sgl = &io->mif_sgl; 895 ccb->ccb_data = xs->data; 896 ccb->ccb_len = xs->datalen; 897 898 if (mfi_create_sgl(ccb, (xs->xs_control & XS_CTL_NOSLEEP) ? 899 BUS_DMA_NOWAIT : BUS_DMA_WAITOK)) 900 return 1; 901 902 return 0; 903 } 904 905 static void 906 mfi_scsi_xs_done(struct mfi_ccb *ccb) 907 { 908 struct scsipi_xfer *xs = ccb->ccb_xs; 909 struct mfi_softc *sc = ccb->ccb_sc; 910 struct mfi_frame_header *hdr = &ccb->ccb_frame->mfr_header; 911 912 DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done %#lx %#lx\n", 913 DEVNAME(sc), (u_long)ccb, (u_long)ccb->ccb_frame); 914 915 if (xs->data != NULL) { 916 DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done sync\n", 917 DEVNAME(sc)); 918 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 919 ccb->ccb_dmamap->dm_mapsize, 920 (xs->xs_control & XS_CTL_DATA_IN) ? 921 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 922 923 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap); 924 } 925 926 if (hdr->mfh_cmd_status != MFI_STAT_OK) { 927 xs->error = XS_DRIVER_STUFFUP; 928 DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done stuffup %#x\n", 929 DEVNAME(sc), hdr->mfh_cmd_status); 930 931 if (hdr->mfh_scsi_status != 0) { 932 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_sense), 933 ccb->ccb_psense - MFIMEM_DVA(sc->sc_sense), 934 MFI_SENSE_SIZE, BUS_DMASYNC_POSTREAD); 935 DNPRINTF(MFI_D_INTR, 936 "%s: mfi_scsi_xs_done sense %#x %lx %lx\n", 937 DEVNAME(sc), hdr->mfh_scsi_status, 938 (u_long)&xs->sense, (u_long)ccb->ccb_sense); 939 memset(&xs->sense, 0, sizeof(xs->sense)); 940 memcpy(&xs->sense, ccb->ccb_sense, 941 sizeof(struct scsi_sense_data)); 942 xs->error = XS_SENSE; 943 } 944 } else { 945 xs->error = XS_NOERROR; 946 xs->status = SCSI_OK; 947 xs->resid = 0; 948 } 949 950 mfi_put_ccb(ccb); 951 scsipi_done(xs); 952 } 953 954 static int 955 mfi_scsi_ld(struct mfi_ccb *ccb, struct scsipi_xfer *xs) 956 { 957 struct mfi_pass_frame *pf; 958 struct scsipi_periph *periph = xs->xs_periph; 959 960 DNPRINTF(MFI_D_CMD, "%s: mfi_scsi_ld: %d\n", 961 device_xname(periph->periph_channel->chan_adapter->adapt_dev), 962 periph->periph_target); 963 964 pf = &ccb->ccb_frame->mfr_pass; 965 pf->mpf_header.mfh_cmd = MFI_CMD_LD_SCSI_IO; 966 pf->mpf_header.mfh_target_id = periph->periph_target; 967 pf->mpf_header.mfh_lun_id = 0; 968 pf->mpf_header.mfh_cdb_len = xs->cmdlen; 969 pf->mpf_header.mfh_timeout = 0; 970 pf->mpf_header.mfh_data_len= xs->datalen; /* XXX */ 971 pf->mpf_header.mfh_sense_len = MFI_SENSE_SIZE; 972 973 pf->mpf_sense_addr_hi = 0; 974 pf->mpf_sense_addr_lo = htole32(ccb->ccb_psense); 975 976 memset(pf->mpf_cdb, 0, 16); 977 memcpy(pf->mpf_cdb, &xs->cmdstore, xs->cmdlen); 978 979 ccb->ccb_done = mfi_scsi_xs_done; 980 ccb->ccb_xs = xs; 981 ccb->ccb_frame_size = MFI_PASS_FRAME_SIZE; 982 ccb->ccb_sgl = &pf->mpf_sgl; 983 984 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) 985 ccb->ccb_direction = (xs->xs_control & XS_CTL_DATA_IN) ? 986 MFI_DATA_IN : MFI_DATA_OUT; 987 else 988 ccb->ccb_direction = MFI_DATA_NONE; 989 990 if (xs->data) { 991 ccb->ccb_data = xs->data; 992 ccb->ccb_len = xs->datalen; 993 994 if (mfi_create_sgl(ccb, (xs->xs_control & XS_CTL_NOSLEEP) ? 995 BUS_DMA_NOWAIT : BUS_DMA_WAITOK)) 996 return 1; 997 } 998 999 return 0; 1000 } 1001 1002 static void 1003 mfi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 1004 void *arg) 1005 { 1006 struct scsipi_periph *periph; 1007 struct scsipi_xfer *xs; 1008 struct scsipi_adapter *adapt = chan->chan_adapter; 1009 struct mfi_softc *sc = (void *) adapt->adapt_dev; 1010 struct mfi_ccb *ccb; 1011 struct scsi_rw_6 *rw; 1012 struct scsipi_rw_10 *rwb; 1013 uint32_t blockno, blockcnt; 1014 uint8_t target; 1015 uint8_t mbox[MFI_MBOX_SIZE]; 1016 int s; 1017 1018 switch (req) { 1019 case ADAPTER_REQ_GROW_RESOURCES: 1020 /* Not supported. */ 1021 return; 1022 case ADAPTER_REQ_SET_XFER_MODE: 1023 /* Not supported. */ 1024 return; 1025 case ADAPTER_REQ_RUN_XFER: 1026 break; 1027 } 1028 1029 xs = arg; 1030 1031 DNPRINTF(MFI_D_CMD, "%s: mfi_scsipi_request req %d opcode: %#x\n", 1032 DEVNAME(sc), req, xs->cmd->opcode); 1033 1034 periph = xs->xs_periph; 1035 target = periph->periph_target; 1036 1037 s = splbio(); 1038 if (target >= MFI_MAX_LD || !sc->sc_ld[target].ld_present || 1039 periph->periph_lun != 0) { 1040 DNPRINTF(MFI_D_CMD, "%s: invalid target %d\n", 1041 DEVNAME(sc), target); 1042 xs->error = XS_SELTIMEOUT; 1043 scsipi_done(xs); 1044 splx(s); 1045 return; 1046 } 1047 1048 if ((ccb = mfi_get_ccb(sc)) == NULL) { 1049 DNPRINTF(MFI_D_CMD, "%s: mfi_scsipi_request no ccb\n", DEVNAME(sc)); 1050 xs->error = XS_RESOURCE_SHORTAGE; 1051 scsipi_done(xs); 1052 splx(s); 1053 return; 1054 } 1055 1056 switch (xs->cmd->opcode) { 1057 /* IO path */ 1058 case READ_10: 1059 case WRITE_10: 1060 rwb = (struct scsipi_rw_10 *)xs->cmd; 1061 blockno = _4btol(rwb->addr); 1062 blockcnt = _2btol(rwb->length); 1063 if (mfi_scsi_io(ccb, xs, blockno, blockcnt)) { 1064 mfi_put_ccb(ccb); 1065 goto stuffup; 1066 } 1067 break; 1068 1069 case SCSI_READ_6_COMMAND: 1070 case SCSI_WRITE_6_COMMAND: 1071 rw = (struct scsi_rw_6 *)xs->cmd; 1072 blockno = _3btol(rw->addr) & (SRW_TOPADDR << 16 | 0xffff); 1073 blockcnt = rw->length ? rw->length : 0x100; 1074 if (mfi_scsi_io(ccb, xs, blockno, blockcnt)) { 1075 mfi_put_ccb(ccb); 1076 goto stuffup; 1077 } 1078 break; 1079 1080 case SCSI_SYNCHRONIZE_CACHE_10: 1081 mfi_put_ccb(ccb); /* we don't need this */ 1082 1083 mbox[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE; 1084 if (mfi_mgmt(sc, MR_DCMD_CTRL_CACHE_FLUSH, MFI_DATA_NONE, 1085 0, NULL, mbox)) 1086 goto stuffup; 1087 xs->error = XS_NOERROR; 1088 xs->status = SCSI_OK; 1089 xs->resid = 0; 1090 scsipi_done(xs); 1091 splx(s); 1092 return; 1093 /* NOTREACHED */ 1094 1095 /* hand it of to the firmware and let it deal with it */ 1096 case SCSI_TEST_UNIT_READY: 1097 /* save off sd? after autoconf */ 1098 if (!cold) /* XXX bogus */ 1099 strlcpy(sc->sc_ld[target].ld_dev, device_xname(&sc->sc_dev), 1100 sizeof(sc->sc_ld[target].ld_dev)); 1101 /* FALLTHROUGH */ 1102 1103 default: 1104 if (mfi_scsi_ld(ccb, xs)) { 1105 mfi_put_ccb(ccb); 1106 goto stuffup; 1107 } 1108 break; 1109 } 1110 1111 DNPRINTF(MFI_D_CMD, "%s: start io %d\n", DEVNAME(sc), target); 1112 1113 if (xs->xs_control & XS_CTL_POLL) { 1114 if (mfi_poll(ccb)) { 1115 /* XXX check for sense in ccb->ccb_sense? */ 1116 printf("%s: mfi_scsipi_request poll failed\n", 1117 DEVNAME(sc)); 1118 mfi_put_ccb(ccb); 1119 bzero(&xs->sense, sizeof(xs->sense)); 1120 xs->sense.scsi_sense.response_code = 1121 SSD_RCODE_VALID | SSD_RCODE_CURRENT; 1122 xs->sense.scsi_sense.flags = SKEY_ILLEGAL_REQUEST; 1123 xs->sense.scsi_sense.asc = 0x20; /* invalid opcode */ 1124 xs->error = XS_SENSE; 1125 xs->status = SCSI_CHECK; 1126 } else { 1127 DNPRINTF(MFI_D_DMA, 1128 "%s: mfi_scsipi_request poll complete %d\n", 1129 DEVNAME(sc), ccb->ccb_dmamap->dm_nsegs); 1130 xs->error = XS_NOERROR; 1131 xs->status = SCSI_OK; 1132 xs->resid = 0; 1133 } 1134 mfi_put_ccb(ccb); 1135 scsipi_done(xs); 1136 splx(s); 1137 return; 1138 } 1139 1140 mfi_post(sc, ccb); 1141 1142 DNPRINTF(MFI_D_DMA, "%s: mfi_scsipi_request queued %d\n", DEVNAME(sc), 1143 ccb->ccb_dmamap->dm_nsegs); 1144 1145 splx(s); 1146 return; 1147 1148 stuffup: 1149 xs->error = XS_DRIVER_STUFFUP; 1150 scsipi_done(xs); 1151 splx(s); 1152 } 1153 1154 static int 1155 mfi_create_sgl(struct mfi_ccb *ccb, int flags) 1156 { 1157 struct mfi_softc *sc = ccb->ccb_sc; 1158 struct mfi_frame_header *hdr; 1159 bus_dma_segment_t *sgd; 1160 union mfi_sgl *sgl; 1161 int error, i; 1162 1163 DNPRINTF(MFI_D_DMA, "%s: mfi_create_sgl %#lx\n", DEVNAME(sc), 1164 (u_long)ccb->ccb_data); 1165 1166 if (!ccb->ccb_data) 1167 return 1; 1168 1169 error = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap, 1170 ccb->ccb_data, ccb->ccb_len, NULL, flags); 1171 if (error) { 1172 if (error == EFBIG) 1173 printf("more than %d dma segs\n", 1174 sc->sc_max_sgl); 1175 else 1176 printf("error %d loading dma map\n", error); 1177 return 1; 1178 } 1179 1180 hdr = &ccb->ccb_frame->mfr_header; 1181 sgl = ccb->ccb_sgl; 1182 sgd = ccb->ccb_dmamap->dm_segs; 1183 for (i = 0; i < ccb->ccb_dmamap->dm_nsegs; i++) { 1184 sgl->sg32[i].addr = htole32(sgd[i].ds_addr); 1185 sgl->sg32[i].len = htole32(sgd[i].ds_len); 1186 DNPRINTF(MFI_D_DMA, "%s: addr: %#x len: %#x\n", 1187 DEVNAME(sc), sgl->sg32[i].addr, sgl->sg32[i].len); 1188 } 1189 1190 if (ccb->ccb_direction == MFI_DATA_IN) { 1191 hdr->mfh_flags |= MFI_FRAME_DIR_READ; 1192 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 1193 ccb->ccb_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1194 } else { 1195 hdr->mfh_flags |= MFI_FRAME_DIR_WRITE; 1196 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 1197 ccb->ccb_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE); 1198 } 1199 1200 hdr->mfh_sg_count = ccb->ccb_dmamap->dm_nsegs; 1201 /* for 64 bit io make the sizeof a variable to hold whatever sg size */ 1202 ccb->ccb_frame_size += sizeof(struct mfi_sg32) * 1203 ccb->ccb_dmamap->dm_nsegs; 1204 ccb->ccb_extra_frames = (ccb->ccb_frame_size - 1) / MFI_FRAME_SIZE; 1205 1206 DNPRINTF(MFI_D_DMA, "%s: sg_count: %d frame_size: %d frames_size: %d" 1207 " dm_nsegs: %d extra_frames: %d\n", 1208 DEVNAME(sc), 1209 hdr->mfh_sg_count, 1210 ccb->ccb_frame_size, 1211 sc->sc_frames_size, 1212 ccb->ccb_dmamap->dm_nsegs, 1213 ccb->ccb_extra_frames); 1214 1215 return 0; 1216 } 1217 1218 static int 1219 mfi_mgmt(struct mfi_softc *sc, uint32_t opc, uint32_t dir, uint32_t len, 1220 void *buf, uint8_t *mbox) 1221 { 1222 struct mfi_ccb *ccb; 1223 struct mfi_dcmd_frame *dcmd; 1224 int rv = 1; 1225 1226 DNPRINTF(MFI_D_MISC, "%s: mfi_mgmt %#x\n", DEVNAME(sc), opc); 1227 1228 if ((ccb = mfi_get_ccb(sc)) == NULL) 1229 return rv; 1230 1231 dcmd = &ccb->ccb_frame->mfr_dcmd; 1232 memset(dcmd->mdf_mbox, 0, MFI_MBOX_SIZE); 1233 dcmd->mdf_header.mfh_cmd = MFI_CMD_DCMD; 1234 dcmd->mdf_header.mfh_timeout = 0; 1235 1236 dcmd->mdf_opcode = opc; 1237 dcmd->mdf_header.mfh_data_len = 0; 1238 ccb->ccb_direction = dir; 1239 ccb->ccb_done = mfi_mgmt_done; 1240 1241 ccb->ccb_frame_size = MFI_DCMD_FRAME_SIZE; 1242 1243 /* handle special opcodes */ 1244 if (mbox) 1245 memcpy(dcmd->mdf_mbox, mbox, MFI_MBOX_SIZE); 1246 1247 if (dir != MFI_DATA_NONE) { 1248 dcmd->mdf_header.mfh_data_len = len; 1249 ccb->ccb_data = buf; 1250 ccb->ccb_len = len; 1251 ccb->ccb_sgl = &dcmd->mdf_sgl; 1252 1253 if (mfi_create_sgl(ccb, BUS_DMA_WAITOK)) 1254 goto done; 1255 } 1256 1257 if (cold) { 1258 if (mfi_poll(ccb)) 1259 goto done; 1260 } else { 1261 mfi_post(sc, ccb); 1262 1263 DNPRINTF(MFI_D_MISC, "%s: mfi_mgmt sleeping\n", DEVNAME(sc)); 1264 while (ccb->ccb_state != MFI_CCB_DONE) 1265 tsleep(ccb, PRIBIO, "mfi_mgmt", 0); 1266 1267 if (ccb->ccb_flags & MFI_CCB_F_ERR) 1268 goto done; 1269 } 1270 1271 rv = 0; 1272 1273 done: 1274 mfi_put_ccb(ccb); 1275 return rv; 1276 } 1277 1278 static void 1279 mfi_mgmt_done(struct mfi_ccb *ccb) 1280 { 1281 struct mfi_softc *sc = ccb->ccb_sc; 1282 struct mfi_frame_header *hdr = &ccb->ccb_frame->mfr_header; 1283 1284 DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done %#lx %#lx\n", 1285 DEVNAME(sc), (u_long)ccb, (u_long)ccb->ccb_frame); 1286 1287 if (ccb->ccb_data != NULL) { 1288 DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done sync\n", 1289 DEVNAME(sc)); 1290 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 1291 ccb->ccb_dmamap->dm_mapsize, 1292 (ccb->ccb_direction & MFI_DATA_IN) ? 1293 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1294 1295 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap); 1296 } 1297 1298 if (hdr->mfh_cmd_status != MFI_STAT_OK) 1299 ccb->ccb_flags |= MFI_CCB_F_ERR; 1300 1301 ccb->ccb_state = MFI_CCB_DONE; 1302 1303 wakeup(ccb); 1304 } 1305 1306 #if NBIO > 0 1307 int 1308 mfi_ioctl(struct device *dev, u_long cmd, void *addr) 1309 { 1310 struct mfi_softc *sc = (struct mfi_softc *)dev; 1311 int error = 0; 1312 int s = splbio(); 1313 1314 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl ", DEVNAME(sc)); 1315 1316 switch (cmd) { 1317 case BIOCINQ: 1318 DNPRINTF(MFI_D_IOCTL, "inq\n"); 1319 error = mfi_ioctl_inq(sc, (struct bioc_inq *)addr); 1320 break; 1321 1322 case BIOCVOL: 1323 DNPRINTF(MFI_D_IOCTL, "vol\n"); 1324 error = mfi_ioctl_vol(sc, (struct bioc_vol *)addr); 1325 break; 1326 1327 case BIOCDISK: 1328 DNPRINTF(MFI_D_IOCTL, "disk\n"); 1329 error = mfi_ioctl_disk(sc, (struct bioc_disk *)addr); 1330 break; 1331 1332 case BIOCALARM: 1333 DNPRINTF(MFI_D_IOCTL, "alarm\n"); 1334 error = mfi_ioctl_alarm(sc, (struct bioc_alarm *)addr); 1335 break; 1336 1337 case BIOCBLINK: 1338 DNPRINTF(MFI_D_IOCTL, "blink\n"); 1339 error = mfi_ioctl_blink(sc, (struct bioc_blink *)addr); 1340 break; 1341 1342 case BIOCSETSTATE: 1343 DNPRINTF(MFI_D_IOCTL, "setstate\n"); 1344 error = mfi_ioctl_setstate(sc, (struct bioc_setstate *)addr); 1345 break; 1346 1347 default: 1348 DNPRINTF(MFI_D_IOCTL, " invalid ioctl\n"); 1349 error = EINVAL; 1350 } 1351 splx(s); 1352 1353 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl return %x\n", DEVNAME(sc), error); 1354 return error; 1355 } 1356 1357 static int 1358 mfi_ioctl_inq(struct mfi_softc *sc, struct bioc_inq *bi) 1359 { 1360 struct mfi_conf *cfg; 1361 int rv = EINVAL; 1362 1363 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_inq\n", DEVNAME(sc)); 1364 1365 if (mfi_get_info(sc)) { 1366 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_inq failed\n", 1367 DEVNAME(sc)); 1368 return EIO; 1369 } 1370 1371 /* get figures */ 1372 cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK); 1373 if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, sizeof *cfg, cfg, NULL)) 1374 goto freeme; 1375 1376 strlcpy(bi->bi_dev, DEVNAME(sc), sizeof(bi->bi_dev)); 1377 bi->bi_novol = cfg->mfc_no_ld + cfg->mfc_no_hs; 1378 bi->bi_nodisk = sc->sc_info.mci_pd_disks_present; 1379 1380 rv = 0; 1381 freeme: 1382 free(cfg, M_DEVBUF); 1383 return rv; 1384 } 1385 1386 static int 1387 mfi_ioctl_vol(struct mfi_softc *sc, struct bioc_vol *bv) 1388 { 1389 int i, per, rv = EINVAL; 1390 uint8_t mbox[MFI_MBOX_SIZE]; 1391 1392 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol %#x\n", 1393 DEVNAME(sc), bv->bv_volid); 1394 1395 if (mfi_mgmt(sc, MR_DCMD_LD_GET_LIST, MFI_DATA_IN, 1396 sizeof(sc->sc_ld_list), &sc->sc_ld_list, NULL)) 1397 goto done; 1398 1399 i = bv->bv_volid; 1400 mbox[0] = sc->sc_ld_list.mll_list[i].mll_ld.mld_target; 1401 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol target %#x\n", 1402 DEVNAME(sc), mbox[0]); 1403 1404 if (mfi_mgmt(sc, MR_DCMD_LD_GET_INFO, MFI_DATA_IN, 1405 sizeof(sc->sc_ld_details), &sc->sc_ld_details, mbox)) 1406 goto done; 1407 1408 if (bv->bv_volid >= sc->sc_ld_list.mll_no_ld) { 1409 /* go do hotspares */ 1410 rv = mfi_bio_hs(sc, bv->bv_volid, MFI_MGMT_VD, bv); 1411 goto done; 1412 } 1413 1414 strlcpy(bv->bv_dev, sc->sc_ld[i].ld_dev, sizeof(bv->bv_dev)); 1415 1416 switch(sc->sc_ld_list.mll_list[i].mll_state) { 1417 case MFI_LD_OFFLINE: 1418 bv->bv_status = BIOC_SVOFFLINE; 1419 break; 1420 1421 case MFI_LD_PART_DEGRADED: 1422 case MFI_LD_DEGRADED: 1423 bv->bv_status = BIOC_SVDEGRADED; 1424 break; 1425 1426 case MFI_LD_ONLINE: 1427 bv->bv_status = BIOC_SVONLINE; 1428 break; 1429 1430 default: 1431 bv->bv_status = BIOC_SVINVALID; 1432 DNPRINTF(MFI_D_IOCTL, "%s: invalid logical disk state %#x\n", 1433 DEVNAME(sc), 1434 sc->sc_ld_list.mll_list[i].mll_state); 1435 } 1436 1437 /* additional status can modify MFI status */ 1438 switch (sc->sc_ld_details.mld_progress.mlp_in_prog) { 1439 case MFI_LD_PROG_CC: 1440 case MFI_LD_PROG_BGI: 1441 bv->bv_status = BIOC_SVSCRUB; 1442 per = (int)sc->sc_ld_details.mld_progress.mlp_cc.mp_progress; 1443 bv->bv_percent = (per * 100) / 0xffff; 1444 bv->bv_seconds = 1445 sc->sc_ld_details.mld_progress.mlp_cc.mp_elapsed_seconds; 1446 break; 1447 1448 case MFI_LD_PROG_FGI: 1449 case MFI_LD_PROG_RECONSTRUCT: 1450 /* nothing yet */ 1451 break; 1452 } 1453 1454 /* 1455 * The RAID levels are determined per the SNIA DDF spec, this is only 1456 * a subset that is valid for the MFI contrller. 1457 */ 1458 bv->bv_level = sc->sc_ld_details.mld_cfg.mlc_parm.mpa_pri_raid; 1459 if (sc->sc_ld_details.mld_cfg.mlc_parm.mpa_sec_raid == 1460 MFI_DDF_SRL_SPANNED) 1461 bv->bv_level *= 10; 1462 1463 bv->bv_nodisk = sc->sc_ld_details.mld_cfg.mlc_parm.mpa_no_drv_per_span * 1464 sc->sc_ld_details.mld_cfg.mlc_parm.mpa_span_depth; 1465 1466 bv->bv_size = sc->sc_ld_details.mld_size * 512; /* bytes per block */ 1467 1468 rv = 0; 1469 done: 1470 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol done %x\n", 1471 DEVNAME(sc), rv); 1472 return rv; 1473 } 1474 1475 static int 1476 mfi_ioctl_disk(struct mfi_softc *sc, struct bioc_disk *bd) 1477 { 1478 struct mfi_conf *cfg; 1479 struct mfi_array *ar; 1480 struct mfi_ld_cfg *ld; 1481 struct mfi_pd_details *pd; 1482 struct scsipi_inquiry_data *inqbuf; 1483 char vend[8+16+4+1]; 1484 int i, rv = EINVAL; 1485 int arr, vol, disk; 1486 uint32_t size; 1487 uint8_t mbox[MFI_MBOX_SIZE]; 1488 1489 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_disk %#x\n", 1490 DEVNAME(sc), bd->bd_diskid); 1491 1492 pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK | M_ZERO); 1493 1494 /* send single element command to retrieve size for full structure */ 1495 cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK); 1496 if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, sizeof *cfg, cfg, NULL)) 1497 goto freeme; 1498 1499 size = cfg->mfc_size; 1500 free(cfg, M_DEVBUF); 1501 1502 /* memory for read config */ 1503 cfg = malloc(size, M_DEVBUF, M_WAITOK|M_ZERO); 1504 if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, size, cfg, NULL)) 1505 goto freeme; 1506 1507 ar = cfg->mfc_array; 1508 1509 /* calculate offset to ld structure */ 1510 ld = (struct mfi_ld_cfg *)( 1511 ((uint8_t *)cfg) + offsetof(struct mfi_conf, mfc_array) + 1512 cfg->mfc_array_size * cfg->mfc_no_array); 1513 1514 vol = bd->bd_volid; 1515 1516 if (vol >= cfg->mfc_no_ld) { 1517 /* do hotspares */ 1518 rv = mfi_bio_hs(sc, bd->bd_volid, MFI_MGMT_SD, bd); 1519 goto freeme; 1520 } 1521 1522 /* find corresponding array for ld */ 1523 for (i = 0, arr = 0; i < vol; i++) 1524 arr += ld[i].mlc_parm.mpa_span_depth; 1525 1526 /* offset disk into pd list */ 1527 disk = bd->bd_diskid % ld[vol].mlc_parm.mpa_no_drv_per_span; 1528 1529 /* offset array index into the next spans */ 1530 arr += bd->bd_diskid / ld[vol].mlc_parm.mpa_no_drv_per_span; 1531 1532 bd->bd_target = ar[arr].pd[disk].mar_enc_slot; 1533 switch (ar[arr].pd[disk].mar_pd_state){ 1534 case MFI_PD_UNCONFIG_GOOD: 1535 bd->bd_status = BIOC_SDUNUSED; 1536 break; 1537 1538 case MFI_PD_HOTSPARE: /* XXX dedicated hotspare part of array? */ 1539 bd->bd_status = BIOC_SDHOTSPARE; 1540 break; 1541 1542 case MFI_PD_OFFLINE: 1543 bd->bd_status = BIOC_SDOFFLINE; 1544 break; 1545 1546 case MFI_PD_FAILED: 1547 bd->bd_status = BIOC_SDFAILED; 1548 break; 1549 1550 case MFI_PD_REBUILD: 1551 bd->bd_status = BIOC_SDREBUILD; 1552 break; 1553 1554 case MFI_PD_ONLINE: 1555 bd->bd_status = BIOC_SDONLINE; 1556 break; 1557 1558 case MFI_PD_UNCONFIG_BAD: /* XXX define new state in bio */ 1559 default: 1560 bd->bd_status = BIOC_SDINVALID; 1561 break; 1562 1563 } 1564 1565 /* get the remaining fields */ 1566 *((uint16_t *)&mbox) = ar[arr].pd[disk].mar_pd.mfp_id; 1567 memset(pd, 0, sizeof(*pd)); 1568 if (mfi_mgmt(sc, MR_DCMD_PD_GET_INFO, MFI_DATA_IN, 1569 sizeof *pd, pd, mbox)) 1570 goto freeme; 1571 1572 bd->bd_size = pd->mpd_size * 512; /* bytes per block */ 1573 1574 /* if pd->mpd_enc_idx is 0 then it is not in an enclosure */ 1575 bd->bd_channel = pd->mpd_enc_idx; 1576 1577 inqbuf = (struct scsipi_inquiry_data *)&pd->mpd_inq_data; 1578 memcpy(vend, inqbuf->vendor, sizeof vend - 1); 1579 vend[sizeof vend - 1] = '\0'; 1580 strlcpy(bd->bd_vendor, vend, sizeof(bd->bd_vendor)); 1581 1582 /* XXX find a way to retrieve serial nr from drive */ 1583 /* XXX find a way to get bd_procdev */ 1584 1585 rv = 0; 1586 freeme: 1587 free(pd, M_DEVBUF); 1588 free(cfg, M_DEVBUF); 1589 1590 return rv; 1591 } 1592 1593 static int 1594 mfi_ioctl_alarm(struct mfi_softc *sc, struct bioc_alarm *ba) 1595 { 1596 uint32_t opc, dir = MFI_DATA_NONE; 1597 int rv = 0; 1598 int8_t ret; 1599 1600 switch(ba->ba_opcode) { 1601 case BIOC_SADISABLE: 1602 opc = MR_DCMD_SPEAKER_DISABLE; 1603 break; 1604 1605 case BIOC_SAENABLE: 1606 opc = MR_DCMD_SPEAKER_ENABLE; 1607 break; 1608 1609 case BIOC_SASILENCE: 1610 opc = MR_DCMD_SPEAKER_SILENCE; 1611 break; 1612 1613 case BIOC_GASTATUS: 1614 opc = MR_DCMD_SPEAKER_GET; 1615 dir = MFI_DATA_IN; 1616 break; 1617 1618 case BIOC_SATEST: 1619 opc = MR_DCMD_SPEAKER_TEST; 1620 break; 1621 1622 default: 1623 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_alarm biocalarm invalid " 1624 "opcode %x\n", DEVNAME(sc), ba->ba_opcode); 1625 return EINVAL; 1626 } 1627 1628 if (mfi_mgmt(sc, opc, dir, sizeof(ret), &ret, NULL)) 1629 rv = EINVAL; 1630 else 1631 if (ba->ba_opcode == BIOC_GASTATUS) 1632 ba->ba_status = ret; 1633 else 1634 ba->ba_status = 0; 1635 1636 return rv; 1637 } 1638 1639 static int 1640 mfi_ioctl_blink(struct mfi_softc *sc, struct bioc_blink *bb) 1641 { 1642 int i, found, rv = EINVAL; 1643 uint8_t mbox[MFI_MBOX_SIZE]; 1644 uint32_t cmd; 1645 struct mfi_pd_list *pd; 1646 1647 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_blink %x\n", DEVNAME(sc), 1648 bb->bb_status); 1649 1650 /* channel 0 means not in an enclosure so can't be blinked */ 1651 if (bb->bb_channel == 0) 1652 return EINVAL; 1653 1654 pd = malloc(MFI_PD_LIST_SIZE, M_DEVBUF, M_WAITOK); 1655 1656 if (mfi_mgmt(sc, MR_DCMD_PD_GET_LIST, MFI_DATA_IN, 1657 MFI_PD_LIST_SIZE, pd, NULL)) 1658 goto done; 1659 1660 for (i = 0, found = 0; i < pd->mpl_no_pd; i++) 1661 if (bb->bb_channel == pd->mpl_address[i].mpa_enc_index && 1662 bb->bb_target == pd->mpl_address[i].mpa_enc_slot) { 1663 found = 1; 1664 break; 1665 } 1666 1667 if (!found) 1668 goto done; 1669 1670 memset(mbox, 0, sizeof mbox); 1671 1672 *((uint16_t *)&mbox) = pd->mpl_address[i].mpa_pd_id;; 1673 1674 switch (bb->bb_status) { 1675 case BIOC_SBUNBLINK: 1676 cmd = MR_DCMD_PD_UNBLINK; 1677 break; 1678 1679 case BIOC_SBBLINK: 1680 cmd = MR_DCMD_PD_BLINK; 1681 break; 1682 1683 case BIOC_SBALARM: 1684 default: 1685 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_blink biocblink invalid " 1686 "opcode %x\n", DEVNAME(sc), bb->bb_status); 1687 goto done; 1688 } 1689 1690 1691 if (mfi_mgmt(sc, cmd, MFI_DATA_NONE, 0, NULL, mbox)) 1692 goto done; 1693 1694 rv = 0; 1695 done: 1696 free(pd, M_DEVBUF); 1697 return rv; 1698 } 1699 1700 static int 1701 mfi_ioctl_setstate(struct mfi_softc *sc, struct bioc_setstate *bs) 1702 { 1703 struct mfi_pd_list *pd; 1704 int i, found, rv = EINVAL; 1705 uint8_t mbox[MFI_MBOX_SIZE]; 1706 uint32_t cmd; 1707 1708 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_setstate %x\n", DEVNAME(sc), 1709 bs->bs_status); 1710 1711 pd = malloc(MFI_PD_LIST_SIZE, M_DEVBUF, M_WAITOK); 1712 1713 if (mfi_mgmt(sc, MR_DCMD_PD_GET_LIST, MFI_DATA_IN, 1714 MFI_PD_LIST_SIZE, pd, NULL)) 1715 goto done; 1716 1717 for (i = 0, found = 0; i < pd->mpl_no_pd; i++) 1718 if (bs->bs_channel == pd->mpl_address[i].mpa_enc_index && 1719 bs->bs_target == pd->mpl_address[i].mpa_enc_slot) { 1720 found = 1; 1721 break; 1722 } 1723 1724 if (!found) 1725 goto done; 1726 1727 memset(mbox, 0, sizeof mbox); 1728 1729 *((uint16_t *)&mbox) = pd->mpl_address[i].mpa_pd_id;; 1730 1731 switch (bs->bs_status) { 1732 case BIOC_SSONLINE: 1733 mbox[2] = MFI_PD_ONLINE; 1734 cmd = MD_DCMD_PD_SET_STATE; 1735 break; 1736 1737 case BIOC_SSOFFLINE: 1738 mbox[2] = MFI_PD_OFFLINE; 1739 cmd = MD_DCMD_PD_SET_STATE; 1740 break; 1741 1742 case BIOC_SSHOTSPARE: 1743 mbox[2] = MFI_PD_HOTSPARE; 1744 cmd = MD_DCMD_PD_SET_STATE; 1745 break; 1746 /* 1747 case BIOC_SSREBUILD: 1748 cmd = MD_DCMD_PD_REBUILD; 1749 break; 1750 */ 1751 default: 1752 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_setstate invalid " 1753 "opcode %x\n", DEVNAME(sc), bs->bs_status); 1754 goto done; 1755 } 1756 1757 1758 if (mfi_mgmt(sc, MD_DCMD_PD_SET_STATE, MFI_DATA_NONE, 0, NULL, mbox)) 1759 goto done; 1760 1761 rv = 0; 1762 done: 1763 free(pd, M_DEVBUF); 1764 return rv; 1765 } 1766 1767 static int 1768 mfi_bio_hs(struct mfi_softc *sc, int volid, int type, void *bio_hs) 1769 { 1770 struct mfi_conf *cfg; 1771 struct mfi_hotspare *hs; 1772 struct mfi_pd_details *pd; 1773 struct bioc_disk *sdhs; 1774 struct bioc_vol *vdhs; 1775 struct scsipi_inquiry_data *inqbuf; 1776 char vend[8+16+4+1]; 1777 int i, rv = EINVAL; 1778 uint32_t size; 1779 uint8_t mbox[MFI_MBOX_SIZE]; 1780 1781 DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs %d\n", DEVNAME(sc), volid); 1782 1783 if (!bio_hs) 1784 return EINVAL; 1785 1786 pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK | M_ZERO); 1787 1788 /* send single element command to retrieve size for full structure */ 1789 cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK); 1790 if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, sizeof *cfg, cfg, NULL)) 1791 goto freeme; 1792 1793 size = cfg->mfc_size; 1794 free(cfg, M_DEVBUF); 1795 1796 /* memory for read config */ 1797 cfg = malloc(size, M_DEVBUF, M_WAITOK|M_ZERO); 1798 if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, size, cfg, NULL)) 1799 goto freeme; 1800 1801 /* calculate offset to hs structure */ 1802 hs = (struct mfi_hotspare *)( 1803 ((uint8_t *)cfg) + offsetof(struct mfi_conf, mfc_array) + 1804 cfg->mfc_array_size * cfg->mfc_no_array + 1805 cfg->mfc_ld_size * cfg->mfc_no_ld); 1806 1807 if (volid < cfg->mfc_no_ld) 1808 goto freeme; /* not a hotspare */ 1809 1810 if (volid > (cfg->mfc_no_ld + cfg->mfc_no_hs)) 1811 goto freeme; /* not a hotspare */ 1812 1813 /* offset into hotspare structure */ 1814 i = volid - cfg->mfc_no_ld; 1815 1816 DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs i %d volid %d no_ld %d no_hs %d " 1817 "hs %p cfg %p id %02x\n", DEVNAME(sc), i, volid, cfg->mfc_no_ld, 1818 cfg->mfc_no_hs, hs, cfg, hs[i].mhs_pd.mfp_id); 1819 1820 /* get pd fields */ 1821 memset(mbox, 0, sizeof mbox); 1822 *((uint16_t *)&mbox) = hs[i].mhs_pd.mfp_id; 1823 if (mfi_mgmt(sc, MR_DCMD_PD_GET_INFO, MFI_DATA_IN, 1824 sizeof *pd, pd, mbox)) { 1825 DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs illegal PD\n", 1826 DEVNAME(sc)); 1827 goto freeme; 1828 } 1829 1830 switch (type) { 1831 case MFI_MGMT_VD: 1832 vdhs = bio_hs; 1833 vdhs->bv_status = BIOC_SVONLINE; 1834 vdhs->bv_size = pd->mpd_size * 512; /* bytes per block */ 1835 vdhs->bv_level = -1; /* hotspare */ 1836 vdhs->bv_nodisk = 1; 1837 break; 1838 1839 case MFI_MGMT_SD: 1840 sdhs = bio_hs; 1841 sdhs->bd_status = BIOC_SDHOTSPARE; 1842 sdhs->bd_size = pd->mpd_size * 512; /* bytes per block */ 1843 sdhs->bd_channel = pd->mpd_enc_idx; 1844 sdhs->bd_target = pd->mpd_enc_slot; 1845 inqbuf = (struct scsipi_inquiry_data *)&pd->mpd_inq_data; 1846 memcpy(vend, inqbuf->vendor, sizeof(vend) - 1); 1847 vend[sizeof vend - 1] = '\0'; 1848 strlcpy(sdhs->bd_vendor, vend, sizeof(sdhs->bd_vendor)); 1849 break; 1850 1851 default: 1852 goto freeme; 1853 } 1854 1855 DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs 6\n", DEVNAME(sc)); 1856 rv = 0; 1857 freeme: 1858 free(pd, M_DEVBUF); 1859 free(cfg, M_DEVBUF); 1860 1861 return rv; 1862 } 1863 1864 static int 1865 mfi_create_sensors(struct mfi_softc *sc) 1866 { 1867 int i; 1868 int nsensors = sc->sc_ld_cnt; 1869 1870 sc->sc_sme = sysmon_envsys_create(); 1871 sc->sc_sensor = malloc(sizeof(envsys_data_t) * nsensors, 1872 M_DEVBUF, M_NOWAIT | M_ZERO); 1873 if (sc->sc_sensor == NULL) { 1874 aprint_error("%s: can't allocate envsys_data_t\n", 1875 DEVNAME(sc)); 1876 return ENOMEM; 1877 } 1878 1879 for (i = 0; i < nsensors; i++) { 1880 sc->sc_sensor[i].units = ENVSYS_DRIVE; 1881 sc->sc_sensor[i].monitor = true; 1882 /* Enable monitoring for drive state changes */ 1883 sc->sc_sensor[i].flags |= ENVSYS_FMONSTCHANGED; 1884 /* logical drives */ 1885 snprintf(sc->sc_sensor[i].desc, 1886 sizeof(sc->sc_sensor[i].desc), "%s:%d", 1887 DEVNAME(sc), i); 1888 if (sysmon_envsys_sensor_attach(sc->sc_sme, 1889 &sc->sc_sensor[i])) 1890 goto out; 1891 } 1892 1893 sc->sc_sme->sme_name = DEVNAME(sc); 1894 sc->sc_sme->sme_cookie = sc; 1895 sc->sc_sme->sme_refresh = mfi_sensor_refresh; 1896 if (sysmon_envsys_register(sc->sc_sme)) { 1897 aprint_error("%s: unable to register with sysmon\n", 1898 DEVNAME(sc)); 1899 goto out; 1900 } 1901 return 0; 1902 1903 out: 1904 free(sc->sc_sensor, M_DEVBUF); 1905 sysmon_envsys_destroy(sc->sc_sme); 1906 return EINVAL; 1907 } 1908 1909 static void 1910 mfi_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *edata) 1911 { 1912 struct mfi_softc *sc = sme->sme_cookie; 1913 struct bioc_vol bv; 1914 int s; 1915 1916 if (edata->sensor >= sc->sc_ld_cnt) 1917 return; 1918 1919 bzero(&bv, sizeof(bv)); 1920 bv.bv_volid = edata->sensor; 1921 s = splbio(); 1922 if (mfi_ioctl_vol(sc, &bv)) { 1923 splx(s); 1924 return; 1925 } 1926 splx(s); 1927 1928 switch(bv.bv_status) { 1929 case BIOC_SVOFFLINE: 1930 edata->value_cur = ENVSYS_DRIVE_FAIL; 1931 edata->state = ENVSYS_SCRITICAL; 1932 break; 1933 1934 case BIOC_SVDEGRADED: 1935 edata->value_cur = ENVSYS_DRIVE_PFAIL; 1936 edata->state = ENVSYS_SCRITICAL; 1937 break; 1938 1939 case BIOC_SVSCRUB: 1940 case BIOC_SVONLINE: 1941 edata->value_cur = ENVSYS_DRIVE_ONLINE; 1942 edata->state = ENVSYS_SVALID; 1943 break; 1944 1945 case BIOC_SVINVALID: 1946 /* FALLTRHOUGH */ 1947 default: 1948 edata->value_cur = 0; /* unknown */ 1949 edata->state = ENVSYS_SINVALID; 1950 } 1951 } 1952 1953 #endif /* NBIO > 0 */ 1954 1955 static uint32_t 1956 mfi_xscale_fw_state(struct mfi_softc *sc) 1957 { 1958 return mfi_read(sc, MFI_OMSG0); 1959 } 1960 1961 static void 1962 mfi_xscale_intr_ena(struct mfi_softc *sc) 1963 { 1964 mfi_write(sc, MFI_OMSK, MFI_ENABLE_INTR); 1965 } 1966 1967 static int 1968 mfi_xscale_intr(struct mfi_softc *sc) 1969 { 1970 uint32_t status; 1971 1972 status = mfi_read(sc, MFI_OSTS); 1973 if (!ISSET(status, MFI_OSTS_INTR_VALID)) 1974 return 0; 1975 1976 /* write status back to acknowledge interrupt */ 1977 mfi_write(sc, MFI_OSTS, status); 1978 return 1; 1979 } 1980 1981 static void 1982 mfi_xscale_post(struct mfi_softc *sc, struct mfi_ccb *ccb) 1983 { 1984 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 1985 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 1986 sc->sc_frames_size, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1987 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_sense), 1988 ccb->ccb_psense - MFIMEM_DVA(sc->sc_sense), 1989 MFI_SENSE_SIZE, BUS_DMASYNC_PREREAD); 1990 1991 mfi_write(sc, MFI_IQP, (ccb->ccb_pframe >> 3) | 1992 ccb->ccb_extra_frames); 1993 } 1994 1995 static uint32_t 1996 mfi_ppc_fw_state(struct mfi_softc *sc) 1997 { 1998 return mfi_read(sc, MFI_OSP); 1999 } 2000 2001 static void 2002 mfi_ppc_intr_ena(struct mfi_softc *sc) 2003 { 2004 mfi_write(sc, MFI_ODC, 0xffffffff); 2005 mfi_write(sc, MFI_OMSK, ~0x80000004); 2006 } 2007 2008 static int 2009 mfi_ppc_intr(struct mfi_softc *sc) 2010 { 2011 uint32_t status; 2012 2013 status = mfi_read(sc, MFI_OSTS); 2014 if (!ISSET(status, MFI_OSTS_PPC_INTR_VALID)) 2015 return 0; 2016 2017 /* write status back to acknowledge interrupt */ 2018 mfi_write(sc, MFI_ODC, status); 2019 return 1; 2020 } 2021 2022 static void 2023 mfi_ppc_post(struct mfi_softc *sc, struct mfi_ccb *ccb) 2024 { 2025 mfi_write(sc, MFI_IQP, 0x1 | ccb->ccb_pframe | 2026 (ccb->ccb_extra_frames << 1)); 2027 } 2028
Indexes created Fri Sep 26 20:09:58 GMT 2025