mfi.c revision 1.26
1 /* $NetBSD: mfi.c,v 1.26 2009/07/16 18:10:00 dyoung Exp $ */ 2 /* $OpenBSD: mfi.c,v 1.66 2006/11/28 23:59:45 dlg Exp $ */ 3 /* 4 * Copyright (c) 2006 Marco Peereboom <marco (at) peereboom.us> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <sys/cdefs.h> 20 __KERNEL_RCSID(0, "$NetBSD: mfi.c,v 1.26 2009/07/16 18:10:00 dyoung Exp $"); 21 22 #include "bio.h" 23 24 #include <sys/param.h> 25 #include <sys/systm.h> 26 #include <sys/buf.h> 27 #include <sys/ioctl.h> 28 #include <sys/device.h> 29 #include <sys/kernel.h> 30 #include <sys/malloc.h> 31 #include <sys/proc.h> 32 33 #include <uvm/uvm_param.h> 34 35 #include <sys/bus.h> 36 37 #include <dev/scsipi/scsipi_all.h> 38 #include <dev/scsipi/scsi_all.h> 39 #include <dev/scsipi/scsi_spc.h> 40 #include <dev/scsipi/scsipi_disk.h> 41 #include <dev/scsipi/scsi_disk.h> 42 #include <dev/scsipi/scsiconf.h> 43 44 #include <dev/ic/mfireg.h> 45 #include <dev/ic/mfivar.h> 46 47 #if NBIO > 0 48 #include <dev/biovar.h> 49 #endif /* NBIO > 0 */ 50 51 #ifdef MFI_DEBUG 52 uint32_t mfi_debug = 0 53 /* | MFI_D_CMD */ 54 /* | MFI_D_INTR */ 55 /* | MFI_D_MISC */ 56 /* | MFI_D_DMA */ 57 | MFI_D_IOCTL 58 /* | MFI_D_RW */ 59 /* | MFI_D_MEM */ 60 /* | MFI_D_CCB */ 61 ; 62 #endif 63 64 static void mfi_scsipi_request(struct scsipi_channel *, 65 scsipi_adapter_req_t, void *); 66 static void mfiminphys(struct buf *bp); 67 68 static struct mfi_ccb *mfi_get_ccb(struct mfi_softc *); 69 static void mfi_put_ccb(struct mfi_ccb *); 70 static int mfi_init_ccb(struct mfi_softc *); 71 72 static struct mfi_mem *mfi_allocmem(struct mfi_softc *, size_t); 73 static void mfi_freemem(struct mfi_softc *, struct mfi_mem *); 74 75 static int mfi_transition_firmware(struct mfi_softc *); 76 static int mfi_initialize_firmware(struct mfi_softc *); 77 static int mfi_get_info(struct mfi_softc *); 78 static uint32_t mfi_read(struct mfi_softc *, bus_size_t); 79 static void mfi_write(struct mfi_softc *, bus_size_t, uint32_t); 80 static int mfi_poll(struct mfi_ccb *); 81 static int mfi_create_sgl(struct mfi_ccb *, int); 82 83 /* commands */ 84 static int mfi_scsi_ld(struct mfi_ccb *, struct scsipi_xfer *); 85 static int mfi_scsi_io(struct mfi_ccb *, struct scsipi_xfer *, 86 uint32_t, uint32_t); 87 static void mfi_scsi_xs_done(struct mfi_ccb *); 88 static int mfi_mgmt_internal(struct mfi_softc *, 89 uint32_t, uint32_t, uint32_t, void *, uint8_t *); 90 static int mfi_mgmt(struct mfi_ccb *,struct scsipi_xfer *, 91 uint32_t, uint32_t, uint32_t, void *, uint8_t *); 92 static void mfi_mgmt_done(struct mfi_ccb *); 93 94 #if NBIO > 0 95 static int mfi_ioctl(device_t, u_long, void *); 96 static int mfi_ioctl_inq(struct mfi_softc *, struct bioc_inq *); 97 static int mfi_ioctl_vol(struct mfi_softc *, struct bioc_vol *); 98 static int mfi_ioctl_disk(struct mfi_softc *, struct bioc_disk *); 99 static int mfi_ioctl_alarm(struct mfi_softc *, 100 struct bioc_alarm *); 101 static int mfi_ioctl_blink(struct mfi_softc *sc, 102 struct bioc_blink *); 103 static int mfi_ioctl_setstate(struct mfi_softc *, 104 struct bioc_setstate *); 105 static int mfi_bio_hs(struct mfi_softc *, int, int, void *); 106 static int mfi_create_sensors(struct mfi_softc *); 107 static int mfi_destroy_sensors(struct mfi_softc *); 108 static void mfi_sensor_refresh(struct sysmon_envsys *, 109 envsys_data_t *); 110 #endif /* NBIO > 0 */ 111 112 static uint32_t mfi_xscale_fw_state(struct mfi_softc *sc); 113 static void mfi_xscale_intr_ena(struct mfi_softc *sc); 114 static void mfi_xscale_intr_dis(struct mfi_softc *sc); 115 static int mfi_xscale_intr(struct mfi_softc *sc); 116 static void mfi_xscale_post(struct mfi_softc *sc, struct mfi_ccb *ccb); 117 118 static const struct mfi_iop_ops mfi_iop_xscale = { 119 mfi_xscale_fw_state, 120 mfi_xscale_intr_dis, 121 mfi_xscale_intr_ena, 122 mfi_xscale_intr, 123 mfi_xscale_post 124 }; 125 126 static uint32_t mfi_ppc_fw_state(struct mfi_softc *sc); 127 static void mfi_ppc_intr_ena(struct mfi_softc *sc); 128 static void mfi_ppc_intr_dis(struct mfi_softc *sc); 129 static int mfi_ppc_intr(struct mfi_softc *sc); 130 static void mfi_ppc_post(struct mfi_softc *sc, struct mfi_ccb *ccb); 131 132 static const struct mfi_iop_ops mfi_iop_ppc = { 133 mfi_ppc_fw_state, 134 mfi_ppc_intr_dis, 135 mfi_ppc_intr_ena, 136 mfi_ppc_intr, 137 mfi_ppc_post 138 }; 139 140 #define mfi_fw_state(_s) ((_s)->sc_iop->mio_fw_state(_s)) 141 #define mfi_intr_enable(_s) ((_s)->sc_iop->mio_intr_ena(_s)) 142 #define mfi_intr_disable(_s) ((_s)->sc_iop->mio_intr_dis(_s)) 143 #define mfi_my_intr(_s) ((_s)->sc_iop->mio_intr(_s)) 144 #define mfi_post(_s, _c) ((_s)->sc_iop->mio_post((_s), (_c))) 145 146 static struct mfi_ccb * 147 mfi_get_ccb(struct mfi_softc *sc) 148 { 149 struct mfi_ccb *ccb; 150 int s; 151 152 s = splbio(); 153 ccb = TAILQ_FIRST(&sc->sc_ccb_freeq); 154 if (ccb) { 155 TAILQ_REMOVE(&sc->sc_ccb_freeq, ccb, ccb_link); 156 ccb->ccb_state = MFI_CCB_READY; 157 } 158 splx(s); 159 160 DNPRINTF(MFI_D_CCB, "%s: mfi_get_ccb: %p\n", DEVNAME(sc), ccb); 161 162 return ccb; 163 } 164 165 static void 166 mfi_put_ccb(struct mfi_ccb *ccb) 167 { 168 struct mfi_softc *sc = ccb->ccb_sc; 169 int s; 170 171 DNPRINTF(MFI_D_CCB, "%s: mfi_put_ccb: %p\n", DEVNAME(sc), ccb); 172 173 s = splbio(); 174 ccb->ccb_state = MFI_CCB_FREE; 175 ccb->ccb_xs = NULL; 176 ccb->ccb_flags = 0; 177 ccb->ccb_done = NULL; 178 ccb->ccb_direction = 0; 179 ccb->ccb_frame_size = 0; 180 ccb->ccb_extra_frames = 0; 181 ccb->ccb_sgl = NULL; 182 ccb->ccb_data = NULL; 183 ccb->ccb_len = 0; 184 TAILQ_INSERT_TAIL(&sc->sc_ccb_freeq, ccb, ccb_link); 185 splx(s); 186 } 187 188 static int 189 mfi_destroy_ccb(struct mfi_softc *sc) 190 { 191 struct mfi_ccb *ccb; 192 uint32_t i; 193 194 DNPRINTF(MFI_D_CCB, "%s: mfi_init_ccb\n", DEVNAME(sc)); 195 196 197 for (i = 0; (ccb = mfi_get_ccb(sc)) != NULL; i++) { 198 /* create a dma map for transfer */ 199 bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap); 200 } 201 202 if (i < sc->sc_max_cmds) 203 return EBUSY; 204 205 free(sc->sc_ccb, M_DEVBUF); 206 207 return 0; 208 } 209 210 static int 211 mfi_init_ccb(struct mfi_softc *sc) 212 { 213 struct mfi_ccb *ccb; 214 uint32_t i; 215 int error; 216 217 DNPRINTF(MFI_D_CCB, "%s: mfi_init_ccb\n", DEVNAME(sc)); 218 219 sc->sc_ccb = malloc(sizeof(struct mfi_ccb) * sc->sc_max_cmds, 220 M_DEVBUF, M_WAITOK|M_ZERO); 221 222 for (i = 0; i < sc->sc_max_cmds; i++) { 223 ccb = &sc->sc_ccb[i]; 224 225 ccb->ccb_sc = sc; 226 227 /* select i'th frame */ 228 ccb->ccb_frame = (union mfi_frame *) 229 ((char*)MFIMEM_KVA(sc->sc_frames) + sc->sc_frames_size * i); 230 ccb->ccb_pframe = 231 MFIMEM_DVA(sc->sc_frames) + sc->sc_frames_size * i; 232 ccb->ccb_frame->mfr_header.mfh_context = i; 233 234 /* select i'th sense */ 235 ccb->ccb_sense = (struct mfi_sense *) 236 ((char*)MFIMEM_KVA(sc->sc_sense) + MFI_SENSE_SIZE * i); 237 ccb->ccb_psense = 238 (MFIMEM_DVA(sc->sc_sense) + MFI_SENSE_SIZE * i); 239 240 /* create a dma map for transfer */ 241 error = bus_dmamap_create(sc->sc_dmat, 242 MAXPHYS, sc->sc_max_sgl, MAXPHYS, 0, 243 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->ccb_dmamap); 244 if (error) { 245 printf("%s: cannot create ccb dmamap (%d)\n", 246 DEVNAME(sc), error); 247 goto destroy; 248 } 249 250 DNPRINTF(MFI_D_CCB, 251 "ccb(%d): %p frame: %#lx (%#lx) sense: %#lx (%#lx) map: %#lx\n", 252 ccb->ccb_frame->mfr_header.mfh_context, ccb, 253 (u_long)ccb->ccb_frame, (u_long)ccb->ccb_pframe, 254 (u_long)ccb->ccb_sense, (u_long)ccb->ccb_psense, 255 (u_long)ccb->ccb_dmamap); 256 257 /* add ccb to queue */ 258 mfi_put_ccb(ccb); 259 } 260 261 return 0; 262 destroy: 263 /* free dma maps and ccb memory */ 264 while (i) { 265 i--; 266 ccb = &sc->sc_ccb[i]; 267 bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap); 268 } 269 270 free(sc->sc_ccb, M_DEVBUF); 271 272 return 1; 273 } 274 275 static uint32_t 276 mfi_read(struct mfi_softc *sc, bus_size_t r) 277 { 278 uint32_t rv; 279 280 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 281 BUS_SPACE_BARRIER_READ); 282 rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, r); 283 284 DNPRINTF(MFI_D_RW, "%s: mr 0x%lx 0x08%x ", DEVNAME(sc), (u_long)r, rv); 285 return rv; 286 } 287 288 static void 289 mfi_write(struct mfi_softc *sc, bus_size_t r, uint32_t v) 290 { 291 DNPRINTF(MFI_D_RW, "%s: mw 0x%lx 0x%08x", DEVNAME(sc), (u_long)r, v); 292 293 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v); 294 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 295 BUS_SPACE_BARRIER_WRITE); 296 } 297 298 static struct mfi_mem * 299 mfi_allocmem(struct mfi_softc *sc, size_t size) 300 { 301 struct mfi_mem *mm; 302 int nsegs; 303 304 DNPRINTF(MFI_D_MEM, "%s: mfi_allocmem: %ld\n", DEVNAME(sc), 305 (long)size); 306 307 mm = malloc(sizeof(struct mfi_mem), M_DEVBUF, M_NOWAIT|M_ZERO); 308 if (mm == NULL) 309 return NULL; 310 311 mm->am_size = size; 312 313 if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, 314 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &mm->am_map) != 0) 315 goto amfree; 316 317 if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &mm->am_seg, 1, 318 &nsegs, BUS_DMA_NOWAIT) != 0) 319 goto destroy; 320 321 if (bus_dmamem_map(sc->sc_dmat, &mm->am_seg, nsegs, size, &mm->am_kva, 322 BUS_DMA_NOWAIT) != 0) 323 goto free; 324 325 if (bus_dmamap_load(sc->sc_dmat, mm->am_map, mm->am_kva, size, NULL, 326 BUS_DMA_NOWAIT) != 0) 327 goto unmap; 328 329 DNPRINTF(MFI_D_MEM, " kva: %p dva: %p map: %p\n", 330 mm->am_kva, (void *)mm->am_map->dm_segs[0].ds_addr, mm->am_map); 331 332 memset(mm->am_kva, 0, size); 333 return mm; 334 335 unmap: 336 bus_dmamem_unmap(sc->sc_dmat, mm->am_kva, size); 337 free: 338 bus_dmamem_free(sc->sc_dmat, &mm->am_seg, 1); 339 destroy: 340 bus_dmamap_destroy(sc->sc_dmat, mm->am_map); 341 amfree: 342 free(mm, M_DEVBUF); 343 344 return NULL; 345 } 346 347 static void 348 mfi_freemem(struct mfi_softc *sc, struct mfi_mem *mm) 349 { 350 DNPRINTF(MFI_D_MEM, "%s: mfi_freemem: %p\n", DEVNAME(sc), mm); 351 352 bus_dmamap_unload(sc->sc_dmat, mm->am_map); 353 bus_dmamem_unmap(sc->sc_dmat, mm->am_kva, mm->am_size); 354 bus_dmamem_free(sc->sc_dmat, &mm->am_seg, 1); 355 bus_dmamap_destroy(sc->sc_dmat, mm->am_map); 356 free(mm, M_DEVBUF); 357 } 358 359 static int 360 mfi_transition_firmware(struct mfi_softc *sc) 361 { 362 uint32_t fw_state, cur_state; 363 int max_wait, i; 364 365 fw_state = mfi_fw_state(sc) & MFI_STATE_MASK; 366 367 DNPRINTF(MFI_D_CMD, "%s: mfi_transition_firmware: %#x\n", DEVNAME(sc), 368 fw_state); 369 370 while (fw_state != MFI_STATE_READY) { 371 DNPRINTF(MFI_D_MISC, 372 "%s: waiting for firmware to become ready\n", 373 DEVNAME(sc)); 374 cur_state = fw_state; 375 switch (fw_state) { 376 case MFI_STATE_FAULT: 377 printf("%s: firmware fault\n", DEVNAME(sc)); 378 return 1; 379 case MFI_STATE_WAIT_HANDSHAKE: 380 mfi_write(sc, MFI_IDB, MFI_INIT_CLEAR_HANDSHAKE); 381 max_wait = 2; 382 break; 383 case MFI_STATE_OPERATIONAL: 384 mfi_write(sc, MFI_IDB, MFI_INIT_READY); 385 max_wait = 10; 386 break; 387 case MFI_STATE_UNDEFINED: 388 case MFI_STATE_BB_INIT: 389 max_wait = 2; 390 break; 391 case MFI_STATE_FW_INIT: 392 case MFI_STATE_DEVICE_SCAN: 393 case MFI_STATE_FLUSH_CACHE: 394 max_wait = 20; 395 break; 396 default: 397 printf("%s: unknown firmware state %d\n", 398 DEVNAME(sc), fw_state); 399 return 1; 400 } 401 for (i = 0; i < (max_wait * 10); i++) { 402 fw_state = mfi_fw_state(sc) & MFI_STATE_MASK; 403 if (fw_state == cur_state) 404 DELAY(100000); 405 else 406 break; 407 } 408 if (fw_state == cur_state) { 409 printf("%s: firmware stuck in state %#x\n", 410 DEVNAME(sc), fw_state); 411 return 1; 412 } 413 } 414 415 return 0; 416 } 417 418 static int 419 mfi_initialize_firmware(struct mfi_softc *sc) 420 { 421 struct mfi_ccb *ccb; 422 struct mfi_init_frame *init; 423 struct mfi_init_qinfo *qinfo; 424 425 DNPRINTF(MFI_D_MISC, "%s: mfi_initialize_firmware\n", DEVNAME(sc)); 426 427 if ((ccb = mfi_get_ccb(sc)) == NULL) 428 return 1; 429 430 init = &ccb->ccb_frame->mfr_init; 431 qinfo = (struct mfi_init_qinfo *)((uint8_t *)init + MFI_FRAME_SIZE); 432 433 memset(qinfo, 0, sizeof *qinfo); 434 qinfo->miq_rq_entries = sc->sc_max_cmds + 1; 435 qinfo->miq_rq_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) + 436 offsetof(struct mfi_prod_cons, mpc_reply_q)); 437 qinfo->miq_pi_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) + 438 offsetof(struct mfi_prod_cons, mpc_producer)); 439 qinfo->miq_ci_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) + 440 offsetof(struct mfi_prod_cons, mpc_consumer)); 441 442 init->mif_header.mfh_cmd = MFI_CMD_INIT; 443 init->mif_header.mfh_data_len = sizeof *qinfo; 444 init->mif_qinfo_new_addr_lo = htole32(ccb->ccb_pframe + MFI_FRAME_SIZE); 445 446 DNPRINTF(MFI_D_MISC, "%s: entries: %#x rq: %#x pi: %#x ci: %#x\n", 447 DEVNAME(sc), 448 qinfo->miq_rq_entries, qinfo->miq_rq_addr_lo, 449 qinfo->miq_pi_addr_lo, qinfo->miq_ci_addr_lo); 450 451 if (mfi_poll(ccb)) { 452 printf("%s: mfi_initialize_firmware failed\n", DEVNAME(sc)); 453 return 1; 454 } 455 456 mfi_put_ccb(ccb); 457 458 return 0; 459 } 460 461 static int 462 mfi_get_info(struct mfi_softc *sc) 463 { 464 #ifdef MFI_DEBUG 465 int i; 466 #endif 467 DNPRINTF(MFI_D_MISC, "%s: mfi_get_info\n", DEVNAME(sc)); 468 469 if (mfi_mgmt_internal(sc, MR_DCMD_CTRL_GET_INFO, MFI_DATA_IN, 470 sizeof(sc->sc_info), &sc->sc_info, NULL)) 471 return 1; 472 473 #ifdef MFI_DEBUG 474 475 for (i = 0; i < sc->sc_info.mci_image_component_count; i++) { 476 printf("%s: active FW %s Version %s date %s time %s\n", 477 DEVNAME(sc), 478 sc->sc_info.mci_image_component[i].mic_name, 479 sc->sc_info.mci_image_component[i].mic_version, 480 sc->sc_info.mci_image_component[i].mic_build_date, 481 sc->sc_info.mci_image_component[i].mic_build_time); 482 } 483 484 for (i = 0; i < sc->sc_info.mci_pending_image_component_count; i++) { 485 printf("%s: pending FW %s Version %s date %s time %s\n", 486 DEVNAME(sc), 487 sc->sc_info.mci_pending_image_component[i].mic_name, 488 sc->sc_info.mci_pending_image_component[i].mic_version, 489 sc->sc_info.mci_pending_image_component[i].mic_build_date, 490 sc->sc_info.mci_pending_image_component[i].mic_build_time); 491 } 492 493 printf("%s: max_arms %d max_spans %d max_arrs %d max_lds %d name %s\n", 494 DEVNAME(sc), 495 sc->sc_info.mci_max_arms, 496 sc->sc_info.mci_max_spans, 497 sc->sc_info.mci_max_arrays, 498 sc->sc_info.mci_max_lds, 499 sc->sc_info.mci_product_name); 500 501 printf("%s: serial %s present %#x fw time %d max_cmds %d max_sg %d\n", 502 DEVNAME(sc), 503 sc->sc_info.mci_serial_number, 504 sc->sc_info.mci_hw_present, 505 sc->sc_info.mci_current_fw_time, 506 sc->sc_info.mci_max_cmds, 507 sc->sc_info.mci_max_sg_elements); 508 509 printf("%s: max_rq %d lds_pres %d lds_deg %d lds_off %d pd_pres %d\n", 510 DEVNAME(sc), 511 sc->sc_info.mci_max_request_size, 512 sc->sc_info.mci_lds_present, 513 sc->sc_info.mci_lds_degraded, 514 sc->sc_info.mci_lds_offline, 515 sc->sc_info.mci_pd_present); 516 517 printf("%s: pd_dsk_prs %d pd_dsk_pred_fail %d pd_dsk_fail %d\n", 518 DEVNAME(sc), 519 sc->sc_info.mci_pd_disks_present, 520 sc->sc_info.mci_pd_disks_pred_failure, 521 sc->sc_info.mci_pd_disks_failed); 522 523 printf("%s: nvram %d mem %d flash %d\n", 524 DEVNAME(sc), 525 sc->sc_info.mci_nvram_size, 526 sc->sc_info.mci_memory_size, 527 sc->sc_info.mci_flash_size); 528 529 printf("%s: ram_cor %d ram_uncor %d clus_all %d clus_act %d\n", 530 DEVNAME(sc), 531 sc->sc_info.mci_ram_correctable_errors, 532 sc->sc_info.mci_ram_uncorrectable_errors, 533 sc->sc_info.mci_cluster_allowed, 534 sc->sc_info.mci_cluster_active); 535 536 printf("%s: max_strps_io %d raid_lvl %#x adapt_ops %#x ld_ops %#x\n", 537 DEVNAME(sc), 538 sc->sc_info.mci_max_strips_per_io, 539 sc->sc_info.mci_raid_levels, 540 sc->sc_info.mci_adapter_ops, 541 sc->sc_info.mci_ld_ops); 542 543 printf("%s: strp_sz_min %d strp_sz_max %d pd_ops %#x pd_mix %#x\n", 544 DEVNAME(sc), 545 sc->sc_info.mci_stripe_sz_ops.min, 546 sc->sc_info.mci_stripe_sz_ops.max, 547 sc->sc_info.mci_pd_ops, 548 sc->sc_info.mci_pd_mix_support); 549 550 printf("%s: ecc_bucket %d pckg_prop %s\n", 551 DEVNAME(sc), 552 sc->sc_info.mci_ecc_bucket_count, 553 sc->sc_info.mci_package_version); 554 555 printf("%s: sq_nm %d prd_fail_poll %d intr_thrtl %d intr_thrtl_to %d\n", 556 DEVNAME(sc), 557 sc->sc_info.mci_properties.mcp_seq_num, 558 sc->sc_info.mci_properties.mcp_pred_fail_poll_interval, 559 sc->sc_info.mci_properties.mcp_intr_throttle_cnt, 560 sc->sc_info.mci_properties.mcp_intr_throttle_timeout); 561 562 printf("%s: rbld_rate %d patr_rd_rate %d bgi_rate %d cc_rate %d\n", 563 DEVNAME(sc), 564 sc->sc_info.mci_properties.mcp_rebuild_rate, 565 sc->sc_info.mci_properties.mcp_patrol_read_rate, 566 sc->sc_info.mci_properties.mcp_bgi_rate, 567 sc->sc_info.mci_properties.mcp_cc_rate); 568 569 printf("%s: rc_rate %d ch_flsh %d spin_cnt %d spin_dly %d clus_en %d\n", 570 DEVNAME(sc), 571 sc->sc_info.mci_properties.mcp_recon_rate, 572 sc->sc_info.mci_properties.mcp_cache_flush_interval, 573 sc->sc_info.mci_properties.mcp_spinup_drv_cnt, 574 sc->sc_info.mci_properties.mcp_spinup_delay, 575 sc->sc_info.mci_properties.mcp_cluster_enable); 576 577 printf("%s: coerc %d alarm %d dis_auto_rbld %d dis_bat_wrn %d ecc %d\n", 578 DEVNAME(sc), 579 sc->sc_info.mci_properties.mcp_coercion_mode, 580 sc->sc_info.mci_properties.mcp_alarm_enable, 581 sc->sc_info.mci_properties.mcp_disable_auto_rebuild, 582 sc->sc_info.mci_properties.mcp_disable_battery_warn, 583 sc->sc_info.mci_properties.mcp_ecc_bucket_size); 584 585 printf("%s: ecc_leak %d rest_hs %d exp_encl_dev %d\n", 586 DEVNAME(sc), 587 sc->sc_info.mci_properties.mcp_ecc_bucket_leak_rate, 588 sc->sc_info.mci_properties.mcp_restore_hotspare_on_insertion, 589 sc->sc_info.mci_properties.mcp_expose_encl_devices); 590 591 printf("%s: vendor %#x device %#x subvendor %#x subdevice %#x\n", 592 DEVNAME(sc), 593 sc->sc_info.mci_pci.mip_vendor, 594 sc->sc_info.mci_pci.mip_device, 595 sc->sc_info.mci_pci.mip_subvendor, 596 sc->sc_info.mci_pci.mip_subdevice); 597 598 printf("%s: type %#x port_count %d port_addr ", 599 DEVNAME(sc), 600 sc->sc_info.mci_host.mih_type, 601 sc->sc_info.mci_host.mih_port_count); 602 603 for (i = 0; i < 8; i++) 604 printf("%.0lx ", sc->sc_info.mci_host.mih_port_addr[i]); 605 printf("\n"); 606 607 printf("%s: type %.x port_count %d port_addr ", 608 DEVNAME(sc), 609 sc->sc_info.mci_device.mid_type, 610 sc->sc_info.mci_device.mid_port_count); 611 612 for (i = 0; i < 8; i++) 613 printf("%.0lx ", sc->sc_info.mci_device.mid_port_addr[i]); 614 printf("\n"); 615 #endif /* MFI_DEBUG */ 616 617 return 0; 618 } 619 620 static void 621 mfiminphys(struct buf *bp) 622 { 623 DNPRINTF(MFI_D_MISC, "mfiminphys: %d\n", bp->b_bcount); 624 625 /* XXX currently using MFI_MAXFER = MAXPHYS */ 626 if (bp->b_bcount > MFI_MAXFER) 627 bp->b_bcount = MFI_MAXFER; 628 minphys(bp); 629 } 630 631 int 632 mfi_detach(struct mfi_softc *sc, int flags) 633 { 634 int error; 635 636 DNPRINTF(MFI_D_MISC, "%s: mfi_detach\n", DEVNAME(sc)); 637 638 if ((error = config_detach_children(sc->sc_dev, flags)) != 0) 639 return error; 640 641 #if NBIO > 0 642 mfi_destroy_sensors(sc); 643 bio_unregister(sc->sc_dev); 644 #endif /* NBIO > 0 */ 645 646 mfi_intr_disable(sc); 647 648 /* TBD: shutdown firmware */ 649 650 if ((error = mfi_destroy_ccb(sc)) != 0) 651 return error; 652 653 mfi_freemem(sc, sc->sc_sense); 654 655 mfi_freemem(sc, sc->sc_frames); 656 657 mfi_freemem(sc, sc->sc_pcq); 658 659 return 0; 660 } 661 662 int 663 mfi_attach(struct mfi_softc *sc, enum mfi_iop iop) 664 { 665 struct scsipi_adapter *adapt = &sc->sc_adapt; 666 struct scsipi_channel *chan = &sc->sc_chan; 667 uint32_t status, frames; 668 int i; 669 670 DNPRINTF(MFI_D_MISC, "%s: mfi_attach\n", DEVNAME(sc)); 671 672 switch (iop) { 673 case MFI_IOP_XSCALE: 674 sc->sc_iop = &mfi_iop_xscale; 675 break; 676 case MFI_IOP_PPC: 677 sc->sc_iop = &mfi_iop_ppc; 678 break; 679 default: 680 panic("%s: unknown iop %d", DEVNAME(sc), iop); 681 } 682 683 if (mfi_transition_firmware(sc)) 684 return 1; 685 686 TAILQ_INIT(&sc->sc_ccb_freeq); 687 688 status = mfi_fw_state(sc); 689 sc->sc_max_cmds = status & MFI_STATE_MAXCMD_MASK; 690 sc->sc_max_sgl = (status & MFI_STATE_MAXSGL_MASK) >> 16; 691 DNPRINTF(MFI_D_MISC, "%s: max commands: %u, max sgl: %u\n", 692 DEVNAME(sc), sc->sc_max_cmds, sc->sc_max_sgl); 693 694 /* consumer/producer and reply queue memory */ 695 sc->sc_pcq = mfi_allocmem(sc, (sizeof(uint32_t) * sc->sc_max_cmds) + 696 sizeof(struct mfi_prod_cons)); 697 if (sc->sc_pcq == NULL) { 698 aprint_error("%s: unable to allocate reply queue memory\n", 699 DEVNAME(sc)); 700 goto nopcq; 701 } 702 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0, 703 sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons), 704 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 705 706 /* frame memory */ 707 /* we are not doing 64 bit IO so only calculate # of 32 bit frames */ 708 frames = (sizeof(struct mfi_sg32) * sc->sc_max_sgl + 709 MFI_FRAME_SIZE - 1) / MFI_FRAME_SIZE + 1; 710 sc->sc_frames_size = frames * MFI_FRAME_SIZE; 711 sc->sc_frames = mfi_allocmem(sc, sc->sc_frames_size * sc->sc_max_cmds); 712 if (sc->sc_frames == NULL) { 713 aprint_error("%s: unable to allocate frame memory\n", 714 DEVNAME(sc)); 715 goto noframe; 716 } 717 /* XXX hack, fix this */ 718 if (MFIMEM_DVA(sc->sc_frames) & 0x3f) { 719 aprint_error("%s: improper frame alignment (%#llx) FIXME\n", 720 DEVNAME(sc), (long long int)MFIMEM_DVA(sc->sc_frames)); 721 goto noframe; 722 } 723 724 /* sense memory */ 725 sc->sc_sense = mfi_allocmem(sc, sc->sc_max_cmds * MFI_SENSE_SIZE); 726 if (sc->sc_sense == NULL) { 727 aprint_error("%s: unable to allocate sense memory\n", 728 DEVNAME(sc)); 729 goto nosense; 730 } 731 732 /* now that we have all memory bits go initialize ccbs */ 733 if (mfi_init_ccb(sc)) { 734 aprint_error("%s: could not init ccb list\n", DEVNAME(sc)); 735 goto noinit; 736 } 737 738 /* kickstart firmware with all addresses and pointers */ 739 if (mfi_initialize_firmware(sc)) { 740 aprint_error("%s: could not initialize firmware\n", 741 DEVNAME(sc)); 742 goto noinit; 743 } 744 745 if (mfi_get_info(sc)) { 746 aprint_error("%s: could not retrieve controller information\n", 747 DEVNAME(sc)); 748 goto noinit; 749 } 750 751 aprint_normal("%s: logical drives %d, version %s, %dMB RAM\n", 752 DEVNAME(sc), 753 sc->sc_info.mci_lds_present, 754 sc->sc_info.mci_package_version, 755 sc->sc_info.mci_memory_size); 756 757 sc->sc_ld_cnt = sc->sc_info.mci_lds_present; 758 sc->sc_max_ld = sc->sc_ld_cnt; 759 for (i = 0; i < sc->sc_ld_cnt; i++) 760 sc->sc_ld[i].ld_present = 1; 761 762 memset(adapt, 0, sizeof(*adapt)); 763 adapt->adapt_dev = sc->sc_dev; 764 adapt->adapt_nchannels = 1; 765 if (sc->sc_ld_cnt) 766 adapt->adapt_openings = sc->sc_max_cmds / sc->sc_ld_cnt; 767 else 768 adapt->adapt_openings = sc->sc_max_cmds; 769 adapt->adapt_max_periph = adapt->adapt_openings; 770 adapt->adapt_request = mfi_scsipi_request; 771 adapt->adapt_minphys = mfiminphys; 772 773 memset(chan, 0, sizeof(*chan)); 774 chan->chan_adapter = adapt; 775 chan->chan_bustype = &scsi_bustype; 776 chan->chan_channel = 0; 777 chan->chan_flags = 0; 778 chan->chan_nluns = 8; 779 chan->chan_ntargets = MFI_MAX_LD; 780 chan->chan_id = MFI_MAX_LD; 781 782 (void)config_found(sc->sc_dev, &sc->sc_chan, scsiprint); 783 784 /* enable interrupts */ 785 mfi_intr_enable(sc); 786 787 #if NBIO > 0 788 if (bio_register(sc->sc_dev, mfi_ioctl) != 0) 789 panic("%s: controller registration failed", DEVNAME(sc)); 790 if (mfi_create_sensors(sc) != 0) 791 aprint_error("%s: unable to create sensors\n", DEVNAME(sc)); 792 #endif /* NBIO > 0 */ 793 794 return 0; 795 noinit: 796 mfi_freemem(sc, sc->sc_sense); 797 nosense: 798 mfi_freemem(sc, sc->sc_frames); 799 noframe: 800 mfi_freemem(sc, sc->sc_pcq); 801 nopcq: 802 return 1; 803 } 804 805 static int 806 mfi_poll(struct mfi_ccb *ccb) 807 { 808 struct mfi_softc *sc = ccb->ccb_sc; 809 struct mfi_frame_header *hdr; 810 int to = 0; 811 812 DNPRINTF(MFI_D_CMD, "%s: mfi_poll\n", DEVNAME(sc)); 813 814 hdr = &ccb->ccb_frame->mfr_header; 815 hdr->mfh_cmd_status = 0xff; 816 hdr->mfh_flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE; 817 818 mfi_post(sc, ccb); 819 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 820 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 821 sc->sc_frames_size, BUS_DMASYNC_POSTREAD); 822 823 while (hdr->mfh_cmd_status == 0xff) { 824 delay(1000); 825 if (to++ > 5000) /* XXX 5 seconds busywait sucks */ 826 break; 827 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 828 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 829 sc->sc_frames_size, BUS_DMASYNC_POSTREAD); 830 } 831 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 832 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 833 sc->sc_frames_size, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 834 835 if (ccb->ccb_data != NULL) { 836 DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done sync\n", 837 DEVNAME(sc)); 838 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 839 ccb->ccb_dmamap->dm_mapsize, 840 (ccb->ccb_direction & MFI_DATA_IN) ? 841 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 842 843 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap); 844 } 845 846 if (hdr->mfh_cmd_status == 0xff) { 847 printf("%s: timeout on ccb %d\n", DEVNAME(sc), 848 hdr->mfh_context); 849 ccb->ccb_flags |= MFI_CCB_F_ERR; 850 return 1; 851 } 852 853 return 0; 854 } 855 856 int 857 mfi_intr(void *arg) 858 { 859 struct mfi_softc *sc = arg; 860 struct mfi_prod_cons *pcq; 861 struct mfi_ccb *ccb; 862 uint32_t producer, consumer, ctx; 863 int claimed = 0; 864 865 if (!mfi_my_intr(sc)) 866 return 0; 867 868 pcq = MFIMEM_KVA(sc->sc_pcq); 869 870 DNPRINTF(MFI_D_INTR, "%s: mfi_intr %#lx %#lx\n", DEVNAME(sc), 871 (u_long)sc, (u_long)pcq); 872 873 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0, 874 sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons), 875 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 876 877 producer = pcq->mpc_producer; 878 consumer = pcq->mpc_consumer; 879 880 while (consumer != producer) { 881 DNPRINTF(MFI_D_INTR, "%s: mfi_intr pi %#x ci %#x\n", 882 DEVNAME(sc), producer, consumer); 883 884 ctx = pcq->mpc_reply_q[consumer]; 885 pcq->mpc_reply_q[consumer] = MFI_INVALID_CTX; 886 if (ctx == MFI_INVALID_CTX) 887 printf("%s: invalid context, p: %d c: %d\n", 888 DEVNAME(sc), producer, consumer); 889 else { 890 /* XXX remove from queue and call scsi_done */ 891 ccb = &sc->sc_ccb[ctx]; 892 DNPRINTF(MFI_D_INTR, "%s: mfi_intr context %#x\n", 893 DEVNAME(sc), ctx); 894 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 895 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 896 sc->sc_frames_size, 897 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 898 ccb->ccb_done(ccb); 899 900 claimed = 1; 901 } 902 consumer++; 903 if (consumer == (sc->sc_max_cmds + 1)) 904 consumer = 0; 905 } 906 907 pcq->mpc_consumer = consumer; 908 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_pcq), 0, 909 sizeof(uint32_t) * sc->sc_max_cmds + sizeof(struct mfi_prod_cons), 910 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 911 912 return claimed; 913 } 914 915 static int 916 mfi_scsi_io(struct mfi_ccb *ccb, struct scsipi_xfer *xs, uint32_t blockno, 917 uint32_t blockcnt) 918 { 919 struct scsipi_periph *periph = xs->xs_periph; 920 struct mfi_io_frame *io; 921 922 DNPRINTF(MFI_D_CMD, "%s: mfi_scsi_io: %d\n", 923 device_xname(periph->periph_channel->chan_adapter->adapt_dev), 924 periph->periph_target); 925 926 if (!xs->data) 927 return 1; 928 929 io = &ccb->ccb_frame->mfr_io; 930 if (xs->xs_control & XS_CTL_DATA_IN) { 931 io->mif_header.mfh_cmd = MFI_CMD_LD_READ; 932 ccb->ccb_direction = MFI_DATA_IN; 933 } else { 934 io->mif_header.mfh_cmd = MFI_CMD_LD_WRITE; 935 ccb->ccb_direction = MFI_DATA_OUT; 936 } 937 io->mif_header.mfh_target_id = periph->periph_target; 938 io->mif_header.mfh_timeout = 0; 939 io->mif_header.mfh_flags = 0; 940 io->mif_header.mfh_sense_len = MFI_SENSE_SIZE; 941 io->mif_header.mfh_data_len= blockcnt; 942 io->mif_lba_hi = 0; 943 io->mif_lba_lo = blockno; 944 io->mif_sense_addr_lo = htole32(ccb->ccb_psense); 945 io->mif_sense_addr_hi = 0; 946 947 ccb->ccb_done = mfi_scsi_xs_done; 948 ccb->ccb_xs = xs; 949 ccb->ccb_frame_size = MFI_IO_FRAME_SIZE; 950 ccb->ccb_sgl = &io->mif_sgl; 951 ccb->ccb_data = xs->data; 952 ccb->ccb_len = xs->datalen; 953 954 if (mfi_create_sgl(ccb, (xs->xs_control & XS_CTL_NOSLEEP) ? 955 BUS_DMA_NOWAIT : BUS_DMA_WAITOK)) 956 return 1; 957 958 return 0; 959 } 960 961 static void 962 mfi_scsi_xs_done(struct mfi_ccb *ccb) 963 { 964 struct scsipi_xfer *xs = ccb->ccb_xs; 965 struct mfi_softc *sc = ccb->ccb_sc; 966 struct mfi_frame_header *hdr = &ccb->ccb_frame->mfr_header; 967 968 DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done %#lx %#lx\n", 969 DEVNAME(sc), (u_long)ccb, (u_long)ccb->ccb_frame); 970 971 if (xs->data != NULL) { 972 DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done sync\n", 973 DEVNAME(sc)); 974 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 975 ccb->ccb_dmamap->dm_mapsize, 976 (xs->xs_control & XS_CTL_DATA_IN) ? 977 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 978 979 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap); 980 } 981 982 if (hdr->mfh_cmd_status != MFI_STAT_OK) { 983 xs->error = XS_DRIVER_STUFFUP; 984 DNPRINTF(MFI_D_INTR, "%s: mfi_scsi_xs_done stuffup %#x\n", 985 DEVNAME(sc), hdr->mfh_cmd_status); 986 987 if (hdr->mfh_scsi_status != 0) { 988 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_sense), 989 ccb->ccb_psense - MFIMEM_DVA(sc->sc_sense), 990 MFI_SENSE_SIZE, BUS_DMASYNC_POSTREAD); 991 DNPRINTF(MFI_D_INTR, 992 "%s: mfi_scsi_xs_done sense %#x %lx %lx\n", 993 DEVNAME(sc), hdr->mfh_scsi_status, 994 (u_long)&xs->sense, (u_long)ccb->ccb_sense); 995 memset(&xs->sense, 0, sizeof(xs->sense)); 996 memcpy(&xs->sense, ccb->ccb_sense, 997 sizeof(struct scsi_sense_data)); 998 xs->error = XS_SENSE; 999 } 1000 } else { 1001 xs->error = XS_NOERROR; 1002 xs->status = SCSI_OK; 1003 xs->resid = 0; 1004 } 1005 1006 mfi_put_ccb(ccb); 1007 scsipi_done(xs); 1008 } 1009 1010 static int 1011 mfi_scsi_ld(struct mfi_ccb *ccb, struct scsipi_xfer *xs) 1012 { 1013 struct mfi_pass_frame *pf; 1014 struct scsipi_periph *periph = xs->xs_periph; 1015 1016 DNPRINTF(MFI_D_CMD, "%s: mfi_scsi_ld: %d\n", 1017 device_xname(periph->periph_channel->chan_adapter->adapt_dev), 1018 periph->periph_target); 1019 1020 pf = &ccb->ccb_frame->mfr_pass; 1021 pf->mpf_header.mfh_cmd = MFI_CMD_LD_SCSI_IO; 1022 pf->mpf_header.mfh_target_id = periph->periph_target; 1023 pf->mpf_header.mfh_lun_id = 0; 1024 pf->mpf_header.mfh_cdb_len = xs->cmdlen; 1025 pf->mpf_header.mfh_timeout = 0; 1026 pf->mpf_header.mfh_data_len= xs->datalen; /* XXX */ 1027 pf->mpf_header.mfh_sense_len = MFI_SENSE_SIZE; 1028 1029 pf->mpf_sense_addr_hi = 0; 1030 pf->mpf_sense_addr_lo = htole32(ccb->ccb_psense); 1031 1032 memset(pf->mpf_cdb, 0, 16); 1033 memcpy(pf->mpf_cdb, &xs->cmdstore, xs->cmdlen); 1034 1035 ccb->ccb_done = mfi_scsi_xs_done; 1036 ccb->ccb_xs = xs; 1037 ccb->ccb_frame_size = MFI_PASS_FRAME_SIZE; 1038 ccb->ccb_sgl = &pf->mpf_sgl; 1039 1040 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) 1041 ccb->ccb_direction = (xs->xs_control & XS_CTL_DATA_IN) ? 1042 MFI_DATA_IN : MFI_DATA_OUT; 1043 else 1044 ccb->ccb_direction = MFI_DATA_NONE; 1045 1046 if (xs->data) { 1047 ccb->ccb_data = xs->data; 1048 ccb->ccb_len = xs->datalen; 1049 1050 if (mfi_create_sgl(ccb, (xs->xs_control & XS_CTL_NOSLEEP) ? 1051 BUS_DMA_NOWAIT : BUS_DMA_WAITOK)) 1052 return 1; 1053 } 1054 1055 return 0; 1056 } 1057 1058 static void 1059 mfi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 1060 void *arg) 1061 { 1062 struct scsipi_periph *periph; 1063 struct scsipi_xfer *xs; 1064 struct scsipi_adapter *adapt = chan->chan_adapter; 1065 struct mfi_softc *sc = device_private(adapt->adapt_dev); 1066 struct mfi_ccb *ccb; 1067 struct scsi_rw_6 *rw; 1068 struct scsipi_rw_10 *rwb; 1069 uint32_t blockno, blockcnt; 1070 uint8_t target; 1071 uint8_t mbox[MFI_MBOX_SIZE]; 1072 int s; 1073 1074 switch (req) { 1075 case ADAPTER_REQ_GROW_RESOURCES: 1076 /* Not supported. */ 1077 return; 1078 case ADAPTER_REQ_SET_XFER_MODE: 1079 /* Not supported. */ 1080 return; 1081 case ADAPTER_REQ_RUN_XFER: 1082 break; 1083 } 1084 1085 xs = arg; 1086 1087 DNPRINTF(MFI_D_CMD, "%s: mfi_scsipi_request req %d opcode: %#x\n", 1088 DEVNAME(sc), req, xs->cmd->opcode); 1089 1090 periph = xs->xs_periph; 1091 target = periph->periph_target; 1092 1093 s = splbio(); 1094 if (target >= MFI_MAX_LD || !sc->sc_ld[target].ld_present || 1095 periph->periph_lun != 0) { 1096 DNPRINTF(MFI_D_CMD, "%s: invalid target %d\n", 1097 DEVNAME(sc), target); 1098 xs->error = XS_SELTIMEOUT; 1099 scsipi_done(xs); 1100 splx(s); 1101 return; 1102 } 1103 1104 if ((ccb = mfi_get_ccb(sc)) == NULL) { 1105 DNPRINTF(MFI_D_CMD, "%s: mfi_scsipi_request no ccb\n", DEVNAME(sc)); 1106 xs->error = XS_RESOURCE_SHORTAGE; 1107 scsipi_done(xs); 1108 splx(s); 1109 return; 1110 } 1111 1112 switch (xs->cmd->opcode) { 1113 /* IO path */ 1114 case READ_10: 1115 case WRITE_10: 1116 rwb = (struct scsipi_rw_10 *)xs->cmd; 1117 blockno = _4btol(rwb->addr); 1118 blockcnt = _2btol(rwb->length); 1119 if (mfi_scsi_io(ccb, xs, blockno, blockcnt)) { 1120 mfi_put_ccb(ccb); 1121 goto stuffup; 1122 } 1123 break; 1124 1125 case SCSI_READ_6_COMMAND: 1126 case SCSI_WRITE_6_COMMAND: 1127 rw = (struct scsi_rw_6 *)xs->cmd; 1128 blockno = _3btol(rw->addr) & (SRW_TOPADDR << 16 | 0xffff); 1129 blockcnt = rw->length ? rw->length : 0x100; 1130 if (mfi_scsi_io(ccb, xs, blockno, blockcnt)) { 1131 mfi_put_ccb(ccb); 1132 goto stuffup; 1133 } 1134 break; 1135 1136 case SCSI_SYNCHRONIZE_CACHE_10: 1137 mbox[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE; 1138 if (mfi_mgmt(ccb, xs, 1139 MR_DCMD_CTRL_CACHE_FLUSH, MFI_DATA_NONE, 0, NULL, mbox)) { 1140 mfi_put_ccb(ccb); 1141 goto stuffup; 1142 } 1143 break; 1144 1145 /* hand it of to the firmware and let it deal with it */ 1146 case SCSI_TEST_UNIT_READY: 1147 /* save off sd? after autoconf */ 1148 if (!cold) /* XXX bogus */ 1149 strlcpy(sc->sc_ld[target].ld_dev, device_xname(sc->sc_dev), 1150 sizeof(sc->sc_ld[target].ld_dev)); 1151 /* FALLTHROUGH */ 1152 1153 default: 1154 if (mfi_scsi_ld(ccb, xs)) { 1155 mfi_put_ccb(ccb); 1156 goto stuffup; 1157 } 1158 break; 1159 } 1160 1161 DNPRINTF(MFI_D_CMD, "%s: start io %d\n", DEVNAME(sc), target); 1162 1163 if (xs->xs_control & XS_CTL_POLL) { 1164 if (mfi_poll(ccb)) { 1165 /* XXX check for sense in ccb->ccb_sense? */ 1166 printf("%s: mfi_scsipi_request poll failed\n", 1167 DEVNAME(sc)); 1168 memset(&xs->sense, 0, sizeof(xs->sense)); 1169 xs->sense.scsi_sense.response_code = 1170 SSD_RCODE_VALID | SSD_RCODE_CURRENT; 1171 xs->sense.scsi_sense.flags = SKEY_ILLEGAL_REQUEST; 1172 xs->sense.scsi_sense.asc = 0x20; /* invalid opcode */ 1173 xs->error = XS_SENSE; 1174 xs->status = SCSI_CHECK; 1175 } else { 1176 DNPRINTF(MFI_D_DMA, 1177 "%s: mfi_scsipi_request poll complete %d\n", 1178 DEVNAME(sc), ccb->ccb_dmamap->dm_nsegs); 1179 xs->error = XS_NOERROR; 1180 xs->status = SCSI_OK; 1181 xs->resid = 0; 1182 } 1183 mfi_put_ccb(ccb); 1184 scsipi_done(xs); 1185 splx(s); 1186 return; 1187 } 1188 1189 mfi_post(sc, ccb); 1190 1191 DNPRINTF(MFI_D_DMA, "%s: mfi_scsipi_request queued %d\n", DEVNAME(sc), 1192 ccb->ccb_dmamap->dm_nsegs); 1193 1194 splx(s); 1195 return; 1196 1197 stuffup: 1198 xs->error = XS_DRIVER_STUFFUP; 1199 scsipi_done(xs); 1200 splx(s); 1201 } 1202 1203 static int 1204 mfi_create_sgl(struct mfi_ccb *ccb, int flags) 1205 { 1206 struct mfi_softc *sc = ccb->ccb_sc; 1207 struct mfi_frame_header *hdr; 1208 bus_dma_segment_t *sgd; 1209 union mfi_sgl *sgl; 1210 int error, i; 1211 1212 DNPRINTF(MFI_D_DMA, "%s: mfi_create_sgl %#lx\n", DEVNAME(sc), 1213 (u_long)ccb->ccb_data); 1214 1215 if (!ccb->ccb_data) 1216 return 1; 1217 1218 error = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap, 1219 ccb->ccb_data, ccb->ccb_len, NULL, flags); 1220 if (error) { 1221 if (error == EFBIG) 1222 printf("more than %d dma segs\n", 1223 sc->sc_max_sgl); 1224 else 1225 printf("error %d loading dma map\n", error); 1226 return 1; 1227 } 1228 1229 hdr = &ccb->ccb_frame->mfr_header; 1230 sgl = ccb->ccb_sgl; 1231 sgd = ccb->ccb_dmamap->dm_segs; 1232 for (i = 0; i < ccb->ccb_dmamap->dm_nsegs; i++) { 1233 sgl->sg32[i].addr = htole32(sgd[i].ds_addr); 1234 sgl->sg32[i].len = htole32(sgd[i].ds_len); 1235 DNPRINTF(MFI_D_DMA, "%s: addr: %#x len: %#x\n", 1236 DEVNAME(sc), sgl->sg32[i].addr, sgl->sg32[i].len); 1237 } 1238 1239 if (ccb->ccb_direction == MFI_DATA_IN) { 1240 hdr->mfh_flags |= MFI_FRAME_DIR_READ; 1241 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 1242 ccb->ccb_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1243 } else { 1244 hdr->mfh_flags |= MFI_FRAME_DIR_WRITE; 1245 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 1246 ccb->ccb_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE); 1247 } 1248 1249 hdr->mfh_sg_count = ccb->ccb_dmamap->dm_nsegs; 1250 /* for 64 bit io make the sizeof a variable to hold whatever sg size */ 1251 ccb->ccb_frame_size += sizeof(struct mfi_sg32) * 1252 ccb->ccb_dmamap->dm_nsegs; 1253 ccb->ccb_extra_frames = (ccb->ccb_frame_size - 1) / MFI_FRAME_SIZE; 1254 1255 DNPRINTF(MFI_D_DMA, "%s: sg_count: %d frame_size: %d frames_size: %d" 1256 " dm_nsegs: %d extra_frames: %d\n", 1257 DEVNAME(sc), 1258 hdr->mfh_sg_count, 1259 ccb->ccb_frame_size, 1260 sc->sc_frames_size, 1261 ccb->ccb_dmamap->dm_nsegs, 1262 ccb->ccb_extra_frames); 1263 1264 return 0; 1265 } 1266 1267 static int 1268 mfi_mgmt_internal(struct mfi_softc *sc, uint32_t opc, uint32_t dir, 1269 uint32_t len, void *buf, uint8_t *mbox) { 1270 struct mfi_ccb *ccb; 1271 int rv = 1; 1272 1273 if ((ccb = mfi_get_ccb(sc)) == NULL) 1274 return rv; 1275 rv = mfi_mgmt(ccb, NULL, opc, dir, len, buf, mbox); 1276 if (rv) 1277 return rv; 1278 1279 if (cold) { 1280 if (mfi_poll(ccb)) 1281 goto done; 1282 } else { 1283 mfi_post(sc, ccb); 1284 1285 DNPRINTF(MFI_D_MISC, "%s: mfi_mgmt_internal sleeping\n", 1286 DEVNAME(sc)); 1287 while (ccb->ccb_state != MFI_CCB_DONE) 1288 tsleep(ccb, PRIBIO, "mfi_mgmt", 0); 1289 1290 if (ccb->ccb_flags & MFI_CCB_F_ERR) 1291 goto done; 1292 } 1293 rv = 0; 1294 1295 done: 1296 mfi_put_ccb(ccb); 1297 return rv; 1298 } 1299 1300 static int 1301 mfi_mgmt(struct mfi_ccb *ccb, struct scsipi_xfer *xs, 1302 uint32_t opc, uint32_t dir, uint32_t len, void *buf, uint8_t *mbox) 1303 { 1304 struct mfi_dcmd_frame *dcmd; 1305 1306 DNPRINTF(MFI_D_MISC, "%s: mfi_mgmt %#x\n", DEVNAME(ccb->ccb_sc), opc); 1307 1308 dcmd = &ccb->ccb_frame->mfr_dcmd; 1309 memset(dcmd->mdf_mbox, 0, MFI_MBOX_SIZE); 1310 dcmd->mdf_header.mfh_cmd = MFI_CMD_DCMD; 1311 dcmd->mdf_header.mfh_timeout = 0; 1312 1313 dcmd->mdf_opcode = opc; 1314 dcmd->mdf_header.mfh_data_len = 0; 1315 ccb->ccb_direction = dir; 1316 ccb->ccb_xs = xs; 1317 ccb->ccb_done = mfi_mgmt_done; 1318 1319 ccb->ccb_frame_size = MFI_DCMD_FRAME_SIZE; 1320 1321 /* handle special opcodes */ 1322 if (mbox) 1323 memcpy(dcmd->mdf_mbox, mbox, MFI_MBOX_SIZE); 1324 1325 if (dir != MFI_DATA_NONE) { 1326 dcmd->mdf_header.mfh_data_len = len; 1327 ccb->ccb_data = buf; 1328 ccb->ccb_len = len; 1329 ccb->ccb_sgl = &dcmd->mdf_sgl; 1330 1331 if (mfi_create_sgl(ccb, BUS_DMA_WAITOK)) 1332 return 1; 1333 } 1334 return 0; 1335 } 1336 1337 static void 1338 mfi_mgmt_done(struct mfi_ccb *ccb) 1339 { 1340 struct scsipi_xfer *xs = ccb->ccb_xs; 1341 struct mfi_softc *sc = ccb->ccb_sc; 1342 struct mfi_frame_header *hdr = &ccb->ccb_frame->mfr_header; 1343 1344 DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done %#lx %#lx\n", 1345 DEVNAME(sc), (u_long)ccb, (u_long)ccb->ccb_frame); 1346 1347 if (ccb->ccb_data != NULL) { 1348 DNPRINTF(MFI_D_INTR, "%s: mfi_mgmt_done sync\n", 1349 DEVNAME(sc)); 1350 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0, 1351 ccb->ccb_dmamap->dm_mapsize, 1352 (ccb->ccb_direction & MFI_DATA_IN) ? 1353 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1354 1355 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap); 1356 } 1357 1358 if (hdr->mfh_cmd_status != MFI_STAT_OK) 1359 ccb->ccb_flags |= MFI_CCB_F_ERR; 1360 1361 ccb->ccb_state = MFI_CCB_DONE; 1362 if (xs) { 1363 if (hdr->mfh_cmd_status != MFI_STAT_OK) { 1364 xs->error = XS_DRIVER_STUFFUP; 1365 } else { 1366 xs->error = XS_NOERROR; 1367 xs->status = SCSI_OK; 1368 xs->resid = 0; 1369 } 1370 mfi_put_ccb(ccb); 1371 scsipi_done(xs); 1372 } else 1373 wakeup(ccb); 1374 } 1375 1376 #if NBIO > 0 1377 int 1378 mfi_ioctl(device_t dev, u_long cmd, void *addr) 1379 { 1380 struct mfi_softc *sc = device_private(dev); 1381 int error = 0; 1382 int s = splbio(); 1383 1384 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl ", DEVNAME(sc)); 1385 1386 switch (cmd) { 1387 case BIOCINQ: 1388 DNPRINTF(MFI_D_IOCTL, "inq\n"); 1389 error = mfi_ioctl_inq(sc, (struct bioc_inq *)addr); 1390 break; 1391 1392 case BIOCVOL: 1393 DNPRINTF(MFI_D_IOCTL, "vol\n"); 1394 error = mfi_ioctl_vol(sc, (struct bioc_vol *)addr); 1395 break; 1396 1397 case BIOCDISK: 1398 DNPRINTF(MFI_D_IOCTL, "disk\n"); 1399 error = mfi_ioctl_disk(sc, (struct bioc_disk *)addr); 1400 break; 1401 1402 case BIOCALARM: 1403 DNPRINTF(MFI_D_IOCTL, "alarm\n"); 1404 error = mfi_ioctl_alarm(sc, (struct bioc_alarm *)addr); 1405 break; 1406 1407 case BIOCBLINK: 1408 DNPRINTF(MFI_D_IOCTL, "blink\n"); 1409 error = mfi_ioctl_blink(sc, (struct bioc_blink *)addr); 1410 break; 1411 1412 case BIOCSETSTATE: 1413 DNPRINTF(MFI_D_IOCTL, "setstate\n"); 1414 error = mfi_ioctl_setstate(sc, (struct bioc_setstate *)addr); 1415 break; 1416 1417 default: 1418 DNPRINTF(MFI_D_IOCTL, " invalid ioctl\n"); 1419 error = EINVAL; 1420 } 1421 splx(s); 1422 1423 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl return %x\n", DEVNAME(sc), error); 1424 return error; 1425 } 1426 1427 static int 1428 mfi_ioctl_inq(struct mfi_softc *sc, struct bioc_inq *bi) 1429 { 1430 struct mfi_conf *cfg; 1431 int rv = EINVAL; 1432 1433 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_inq\n", DEVNAME(sc)); 1434 1435 if (mfi_get_info(sc)) { 1436 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_inq failed\n", 1437 DEVNAME(sc)); 1438 return EIO; 1439 } 1440 1441 /* get figures */ 1442 cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK); 1443 if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, 1444 sizeof *cfg, cfg, NULL)) 1445 goto freeme; 1446 1447 strlcpy(bi->bi_dev, DEVNAME(sc), sizeof(bi->bi_dev)); 1448 bi->bi_novol = cfg->mfc_no_ld + cfg->mfc_no_hs; 1449 bi->bi_nodisk = sc->sc_info.mci_pd_disks_present; 1450 1451 rv = 0; 1452 freeme: 1453 free(cfg, M_DEVBUF); 1454 return rv; 1455 } 1456 1457 static int 1458 mfi_ioctl_vol(struct mfi_softc *sc, struct bioc_vol *bv) 1459 { 1460 int i, per, rv = EINVAL; 1461 uint8_t mbox[MFI_MBOX_SIZE]; 1462 1463 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol %#x\n", 1464 DEVNAME(sc), bv->bv_volid); 1465 1466 if (mfi_mgmt_internal(sc, MR_DCMD_LD_GET_LIST, MFI_DATA_IN, 1467 sizeof(sc->sc_ld_list), &sc->sc_ld_list, NULL)) 1468 goto done; 1469 1470 i = bv->bv_volid; 1471 mbox[0] = sc->sc_ld_list.mll_list[i].mll_ld.mld_target; 1472 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol target %#x\n", 1473 DEVNAME(sc), mbox[0]); 1474 1475 if (mfi_mgmt_internal(sc, MR_DCMD_LD_GET_INFO, MFI_DATA_IN, 1476 sizeof(sc->sc_ld_details), &sc->sc_ld_details, mbox)) 1477 goto done; 1478 1479 if (bv->bv_volid >= sc->sc_ld_list.mll_no_ld) { 1480 /* go do hotspares */ 1481 rv = mfi_bio_hs(sc, bv->bv_volid, MFI_MGMT_VD, bv); 1482 goto done; 1483 } 1484 1485 strlcpy(bv->bv_dev, sc->sc_ld[i].ld_dev, sizeof(bv->bv_dev)); 1486 1487 switch(sc->sc_ld_list.mll_list[i].mll_state) { 1488 case MFI_LD_OFFLINE: 1489 bv->bv_status = BIOC_SVOFFLINE; 1490 break; 1491 1492 case MFI_LD_PART_DEGRADED: 1493 case MFI_LD_DEGRADED: 1494 bv->bv_status = BIOC_SVDEGRADED; 1495 break; 1496 1497 case MFI_LD_ONLINE: 1498 bv->bv_status = BIOC_SVONLINE; 1499 break; 1500 1501 default: 1502 bv->bv_status = BIOC_SVINVALID; 1503 DNPRINTF(MFI_D_IOCTL, "%s: invalid logical disk state %#x\n", 1504 DEVNAME(sc), 1505 sc->sc_ld_list.mll_list[i].mll_state); 1506 } 1507 1508 /* additional status can modify MFI status */ 1509 switch (sc->sc_ld_details.mld_progress.mlp_in_prog) { 1510 case MFI_LD_PROG_CC: 1511 case MFI_LD_PROG_BGI: 1512 bv->bv_status = BIOC_SVSCRUB; 1513 per = (int)sc->sc_ld_details.mld_progress.mlp_cc.mp_progress; 1514 bv->bv_percent = (per * 100) / 0xffff; 1515 bv->bv_seconds = 1516 sc->sc_ld_details.mld_progress.mlp_cc.mp_elapsed_seconds; 1517 break; 1518 1519 case MFI_LD_PROG_FGI: 1520 case MFI_LD_PROG_RECONSTRUCT: 1521 /* nothing yet */ 1522 break; 1523 } 1524 1525 /* 1526 * The RAID levels are determined per the SNIA DDF spec, this is only 1527 * a subset that is valid for the MFI contrller. 1528 */ 1529 bv->bv_level = sc->sc_ld_details.mld_cfg.mlc_parm.mpa_pri_raid; 1530 if (sc->sc_ld_details.mld_cfg.mlc_parm.mpa_sec_raid == 1531 MFI_DDF_SRL_SPANNED) 1532 bv->bv_level *= 10; 1533 1534 bv->bv_nodisk = sc->sc_ld_details.mld_cfg.mlc_parm.mpa_no_drv_per_span * 1535 sc->sc_ld_details.mld_cfg.mlc_parm.mpa_span_depth; 1536 1537 bv->bv_size = sc->sc_ld_details.mld_size * 512; /* bytes per block */ 1538 1539 rv = 0; 1540 done: 1541 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_vol done %x\n", 1542 DEVNAME(sc), rv); 1543 return rv; 1544 } 1545 1546 static int 1547 mfi_ioctl_disk(struct mfi_softc *sc, struct bioc_disk *bd) 1548 { 1549 struct mfi_conf *cfg; 1550 struct mfi_array *ar; 1551 struct mfi_ld_cfg *ld; 1552 struct mfi_pd_details *pd; 1553 struct scsipi_inquiry_data *inqbuf; 1554 char vend[8+16+4+1]; 1555 int i, rv = EINVAL; 1556 int arr, vol, disk; 1557 uint32_t size; 1558 uint8_t mbox[MFI_MBOX_SIZE]; 1559 1560 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_disk %#x\n", 1561 DEVNAME(sc), bd->bd_diskid); 1562 1563 pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK | M_ZERO); 1564 1565 /* send single element command to retrieve size for full structure */ 1566 cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK); 1567 if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, 1568 sizeof *cfg, cfg, NULL)) 1569 goto freeme; 1570 1571 size = cfg->mfc_size; 1572 free(cfg, M_DEVBUF); 1573 1574 /* memory for read config */ 1575 cfg = malloc(size, M_DEVBUF, M_WAITOK|M_ZERO); 1576 if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, 1577 size, cfg, NULL)) 1578 goto freeme; 1579 1580 ar = cfg->mfc_array; 1581 1582 /* calculate offset to ld structure */ 1583 ld = (struct mfi_ld_cfg *)( 1584 ((uint8_t *)cfg) + offsetof(struct mfi_conf, mfc_array) + 1585 cfg->mfc_array_size * cfg->mfc_no_array); 1586 1587 vol = bd->bd_volid; 1588 1589 if (vol >= cfg->mfc_no_ld) { 1590 /* do hotspares */ 1591 rv = mfi_bio_hs(sc, bd->bd_volid, MFI_MGMT_SD, bd); 1592 goto freeme; 1593 } 1594 1595 /* find corresponding array for ld */ 1596 for (i = 0, arr = 0; i < vol; i++) 1597 arr += ld[i].mlc_parm.mpa_span_depth; 1598 1599 /* offset disk into pd list */ 1600 disk = bd->bd_diskid % ld[vol].mlc_parm.mpa_no_drv_per_span; 1601 1602 /* offset array index into the next spans */ 1603 arr += bd->bd_diskid / ld[vol].mlc_parm.mpa_no_drv_per_span; 1604 1605 bd->bd_target = ar[arr].pd[disk].mar_enc_slot; 1606 switch (ar[arr].pd[disk].mar_pd_state){ 1607 case MFI_PD_UNCONFIG_GOOD: 1608 bd->bd_status = BIOC_SDUNUSED; 1609 break; 1610 1611 case MFI_PD_HOTSPARE: /* XXX dedicated hotspare part of array? */ 1612 bd->bd_status = BIOC_SDHOTSPARE; 1613 break; 1614 1615 case MFI_PD_OFFLINE: 1616 bd->bd_status = BIOC_SDOFFLINE; 1617 break; 1618 1619 case MFI_PD_FAILED: 1620 bd->bd_status = BIOC_SDFAILED; 1621 break; 1622 1623 case MFI_PD_REBUILD: 1624 bd->bd_status = BIOC_SDREBUILD; 1625 break; 1626 1627 case MFI_PD_ONLINE: 1628 bd->bd_status = BIOC_SDONLINE; 1629 break; 1630 1631 case MFI_PD_UNCONFIG_BAD: /* XXX define new state in bio */ 1632 default: 1633 bd->bd_status = BIOC_SDINVALID; 1634 break; 1635 1636 } 1637 1638 /* get the remaining fields */ 1639 *((uint16_t *)&mbox) = ar[arr].pd[disk].mar_pd.mfp_id; 1640 memset(pd, 0, sizeof(*pd)); 1641 if (mfi_mgmt_internal(sc, MR_DCMD_PD_GET_INFO, MFI_DATA_IN, 1642 sizeof *pd, pd, mbox)) 1643 goto freeme; 1644 1645 bd->bd_size = pd->mpd_size * 512; /* bytes per block */ 1646 1647 /* if pd->mpd_enc_idx is 0 then it is not in an enclosure */ 1648 bd->bd_channel = pd->mpd_enc_idx; 1649 1650 inqbuf = (struct scsipi_inquiry_data *)&pd->mpd_inq_data; 1651 memcpy(vend, inqbuf->vendor, sizeof vend - 1); 1652 vend[sizeof vend - 1] = '\0'; 1653 strlcpy(bd->bd_vendor, vend, sizeof(bd->bd_vendor)); 1654 1655 /* XXX find a way to retrieve serial nr from drive */ 1656 /* XXX find a way to get bd_procdev */ 1657 1658 rv = 0; 1659 freeme: 1660 free(pd, M_DEVBUF); 1661 free(cfg, M_DEVBUF); 1662 1663 return rv; 1664 } 1665 1666 static int 1667 mfi_ioctl_alarm(struct mfi_softc *sc, struct bioc_alarm *ba) 1668 { 1669 uint32_t opc, dir = MFI_DATA_NONE; 1670 int rv = 0; 1671 int8_t ret; 1672 1673 switch(ba->ba_opcode) { 1674 case BIOC_SADISABLE: 1675 opc = MR_DCMD_SPEAKER_DISABLE; 1676 break; 1677 1678 case BIOC_SAENABLE: 1679 opc = MR_DCMD_SPEAKER_ENABLE; 1680 break; 1681 1682 case BIOC_SASILENCE: 1683 opc = MR_DCMD_SPEAKER_SILENCE; 1684 break; 1685 1686 case BIOC_GASTATUS: 1687 opc = MR_DCMD_SPEAKER_GET; 1688 dir = MFI_DATA_IN; 1689 break; 1690 1691 case BIOC_SATEST: 1692 opc = MR_DCMD_SPEAKER_TEST; 1693 break; 1694 1695 default: 1696 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_alarm biocalarm invalid " 1697 "opcode %x\n", DEVNAME(sc), ba->ba_opcode); 1698 return EINVAL; 1699 } 1700 1701 if (mfi_mgmt_internal(sc, opc, dir, sizeof(ret), &ret, NULL)) 1702 rv = EINVAL; 1703 else 1704 if (ba->ba_opcode == BIOC_GASTATUS) 1705 ba->ba_status = ret; 1706 else 1707 ba->ba_status = 0; 1708 1709 return rv; 1710 } 1711 1712 static int 1713 mfi_ioctl_blink(struct mfi_softc *sc, struct bioc_blink *bb) 1714 { 1715 int i, found, rv = EINVAL; 1716 uint8_t mbox[MFI_MBOX_SIZE]; 1717 uint32_t cmd; 1718 struct mfi_pd_list *pd; 1719 1720 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_blink %x\n", DEVNAME(sc), 1721 bb->bb_status); 1722 1723 /* channel 0 means not in an enclosure so can't be blinked */ 1724 if (bb->bb_channel == 0) 1725 return EINVAL; 1726 1727 pd = malloc(MFI_PD_LIST_SIZE, M_DEVBUF, M_WAITOK); 1728 1729 if (mfi_mgmt_internal(sc, MR_DCMD_PD_GET_LIST, MFI_DATA_IN, 1730 MFI_PD_LIST_SIZE, pd, NULL)) 1731 goto done; 1732 1733 for (i = 0, found = 0; i < pd->mpl_no_pd; i++) 1734 if (bb->bb_channel == pd->mpl_address[i].mpa_enc_index && 1735 bb->bb_target == pd->mpl_address[i].mpa_enc_slot) { 1736 found = 1; 1737 break; 1738 } 1739 1740 if (!found) 1741 goto done; 1742 1743 memset(mbox, 0, sizeof mbox); 1744 1745 *((uint16_t *)&mbox) = pd->mpl_address[i].mpa_pd_id; 1746 1747 switch (bb->bb_status) { 1748 case BIOC_SBUNBLINK: 1749 cmd = MR_DCMD_PD_UNBLINK; 1750 break; 1751 1752 case BIOC_SBBLINK: 1753 cmd = MR_DCMD_PD_BLINK; 1754 break; 1755 1756 case BIOC_SBALARM: 1757 default: 1758 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_blink biocblink invalid " 1759 "opcode %x\n", DEVNAME(sc), bb->bb_status); 1760 goto done; 1761 } 1762 1763 1764 if (mfi_mgmt_internal(sc, cmd, MFI_DATA_NONE, 0, NULL, mbox)) 1765 goto done; 1766 1767 rv = 0; 1768 done: 1769 free(pd, M_DEVBUF); 1770 return rv; 1771 } 1772 1773 static int 1774 mfi_ioctl_setstate(struct mfi_softc *sc, struct bioc_setstate *bs) 1775 { 1776 struct mfi_pd_list *pd; 1777 int i, found, rv = EINVAL; 1778 uint8_t mbox[MFI_MBOX_SIZE]; 1779 uint32_t cmd; 1780 1781 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_setstate %x\n", DEVNAME(sc), 1782 bs->bs_status); 1783 1784 pd = malloc(MFI_PD_LIST_SIZE, M_DEVBUF, M_WAITOK); 1785 1786 if (mfi_mgmt_internal(sc, MR_DCMD_PD_GET_LIST, MFI_DATA_IN, 1787 MFI_PD_LIST_SIZE, pd, NULL)) 1788 goto done; 1789 1790 for (i = 0, found = 0; i < pd->mpl_no_pd; i++) 1791 if (bs->bs_channel == pd->mpl_address[i].mpa_enc_index && 1792 bs->bs_target == pd->mpl_address[i].mpa_enc_slot) { 1793 found = 1; 1794 break; 1795 } 1796 1797 if (!found) 1798 goto done; 1799 1800 memset(mbox, 0, sizeof mbox); 1801 1802 *((uint16_t *)&mbox) = pd->mpl_address[i].mpa_pd_id; 1803 1804 switch (bs->bs_status) { 1805 case BIOC_SSONLINE: 1806 mbox[2] = MFI_PD_ONLINE; 1807 cmd = MD_DCMD_PD_SET_STATE; 1808 break; 1809 1810 case BIOC_SSOFFLINE: 1811 mbox[2] = MFI_PD_OFFLINE; 1812 cmd = MD_DCMD_PD_SET_STATE; 1813 break; 1814 1815 case BIOC_SSHOTSPARE: 1816 mbox[2] = MFI_PD_HOTSPARE; 1817 cmd = MD_DCMD_PD_SET_STATE; 1818 break; 1819 /* 1820 case BIOC_SSREBUILD: 1821 cmd = MD_DCMD_PD_REBUILD; 1822 break; 1823 */ 1824 default: 1825 DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_setstate invalid " 1826 "opcode %x\n", DEVNAME(sc), bs->bs_status); 1827 goto done; 1828 } 1829 1830 1831 if (mfi_mgmt_internal(sc, MD_DCMD_PD_SET_STATE, MFI_DATA_NONE, 1832 0, NULL, mbox)) 1833 goto done; 1834 1835 rv = 0; 1836 done: 1837 free(pd, M_DEVBUF); 1838 return rv; 1839 } 1840 1841 static int 1842 mfi_bio_hs(struct mfi_softc *sc, int volid, int type, void *bio_hs) 1843 { 1844 struct mfi_conf *cfg; 1845 struct mfi_hotspare *hs; 1846 struct mfi_pd_details *pd; 1847 struct bioc_disk *sdhs; 1848 struct bioc_vol *vdhs; 1849 struct scsipi_inquiry_data *inqbuf; 1850 char vend[8+16+4+1]; 1851 int i, rv = EINVAL; 1852 uint32_t size; 1853 uint8_t mbox[MFI_MBOX_SIZE]; 1854 1855 DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs %d\n", DEVNAME(sc), volid); 1856 1857 if (!bio_hs) 1858 return EINVAL; 1859 1860 pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK | M_ZERO); 1861 1862 /* send single element command to retrieve size for full structure */ 1863 cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK); 1864 if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, 1865 sizeof *cfg, cfg, NULL)) 1866 goto freeme; 1867 1868 size = cfg->mfc_size; 1869 free(cfg, M_DEVBUF); 1870 1871 /* memory for read config */ 1872 cfg = malloc(size, M_DEVBUF, M_WAITOK|M_ZERO); 1873 if (mfi_mgmt_internal(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, 1874 size, cfg, NULL)) 1875 goto freeme; 1876 1877 /* calculate offset to hs structure */ 1878 hs = (struct mfi_hotspare *)( 1879 ((uint8_t *)cfg) + offsetof(struct mfi_conf, mfc_array) + 1880 cfg->mfc_array_size * cfg->mfc_no_array + 1881 cfg->mfc_ld_size * cfg->mfc_no_ld); 1882 1883 if (volid < cfg->mfc_no_ld) 1884 goto freeme; /* not a hotspare */ 1885 1886 if (volid > (cfg->mfc_no_ld + cfg->mfc_no_hs)) 1887 goto freeme; /* not a hotspare */ 1888 1889 /* offset into hotspare structure */ 1890 i = volid - cfg->mfc_no_ld; 1891 1892 DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs i %d volid %d no_ld %d no_hs %d " 1893 "hs %p cfg %p id %02x\n", DEVNAME(sc), i, volid, cfg->mfc_no_ld, 1894 cfg->mfc_no_hs, hs, cfg, hs[i].mhs_pd.mfp_id); 1895 1896 /* get pd fields */ 1897 memset(mbox, 0, sizeof mbox); 1898 *((uint16_t *)&mbox) = hs[i].mhs_pd.mfp_id; 1899 if (mfi_mgmt_internal(sc, MR_DCMD_PD_GET_INFO, MFI_DATA_IN, 1900 sizeof *pd, pd, mbox)) { 1901 DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs illegal PD\n", 1902 DEVNAME(sc)); 1903 goto freeme; 1904 } 1905 1906 switch (type) { 1907 case MFI_MGMT_VD: 1908 vdhs = bio_hs; 1909 vdhs->bv_status = BIOC_SVONLINE; 1910 vdhs->bv_size = pd->mpd_size * 512; /* bytes per block */ 1911 vdhs->bv_level = -1; /* hotspare */ 1912 vdhs->bv_nodisk = 1; 1913 break; 1914 1915 case MFI_MGMT_SD: 1916 sdhs = bio_hs; 1917 sdhs->bd_status = BIOC_SDHOTSPARE; 1918 sdhs->bd_size = pd->mpd_size * 512; /* bytes per block */ 1919 sdhs->bd_channel = pd->mpd_enc_idx; 1920 sdhs->bd_target = pd->mpd_enc_slot; 1921 inqbuf = (struct scsipi_inquiry_data *)&pd->mpd_inq_data; 1922 memcpy(vend, inqbuf->vendor, sizeof(vend) - 1); 1923 vend[sizeof vend - 1] = '\0'; 1924 strlcpy(sdhs->bd_vendor, vend, sizeof(sdhs->bd_vendor)); 1925 break; 1926 1927 default: 1928 goto freeme; 1929 } 1930 1931 DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs 6\n", DEVNAME(sc)); 1932 rv = 0; 1933 freeme: 1934 free(pd, M_DEVBUF); 1935 free(cfg, M_DEVBUF); 1936 1937 return rv; 1938 } 1939 1940 static int 1941 mfi_destroy_sensors(struct mfi_softc *sc) 1942 { 1943 sysmon_envsys_unregister(sc->sc_sme); 1944 free(sc->sc_sensor, M_DEVBUF); 1945 return 0; 1946 } 1947 1948 static int 1949 mfi_create_sensors(struct mfi_softc *sc) 1950 { 1951 int i; 1952 int nsensors = sc->sc_ld_cnt; 1953 1954 sc->sc_sme = sysmon_envsys_create(); 1955 sc->sc_sensor = malloc(sizeof(envsys_data_t) * nsensors, 1956 M_DEVBUF, M_NOWAIT | M_ZERO); 1957 if (sc->sc_sensor == NULL) { 1958 aprint_error("%s: can't allocate envsys_data_t\n", 1959 DEVNAME(sc)); 1960 return ENOMEM; 1961 } 1962 1963 for (i = 0; i < nsensors; i++) { 1964 sc->sc_sensor[i].units = ENVSYS_DRIVE; 1965 sc->sc_sensor[i].monitor = true; 1966 /* Enable monitoring for drive state changes */ 1967 sc->sc_sensor[i].flags |= ENVSYS_FMONSTCHANGED; 1968 /* logical drives */ 1969 snprintf(sc->sc_sensor[i].desc, 1970 sizeof(sc->sc_sensor[i].desc), "%s:%d", 1971 DEVNAME(sc), i); 1972 if (sysmon_envsys_sensor_attach(sc->sc_sme, 1973 &sc->sc_sensor[i])) 1974 goto out; 1975 } 1976 1977 sc->sc_sme->sme_name = DEVNAME(sc); 1978 sc->sc_sme->sme_cookie = sc; 1979 sc->sc_sme->sme_refresh = mfi_sensor_refresh; 1980 if (sysmon_envsys_register(sc->sc_sme)) { 1981 aprint_error("%s: unable to register with sysmon\n", 1982 DEVNAME(sc)); 1983 goto out; 1984 } 1985 return 0; 1986 1987 out: 1988 free(sc->sc_sensor, M_DEVBUF); 1989 sysmon_envsys_destroy(sc->sc_sme); 1990 return EINVAL; 1991 } 1992 1993 static void 1994 mfi_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *edata) 1995 { 1996 struct mfi_softc *sc = sme->sme_cookie; 1997 struct bioc_vol bv; 1998 int s; 1999 2000 if (edata->sensor >= sc->sc_ld_cnt) 2001 return; 2002 2003 memset(&bv, 0, sizeof(bv)); 2004 bv.bv_volid = edata->sensor; 2005 s = splbio(); 2006 if (mfi_ioctl_vol(sc, &bv)) { 2007 splx(s); 2008 return; 2009 } 2010 splx(s); 2011 2012 switch(bv.bv_status) { 2013 case BIOC_SVOFFLINE: 2014 edata->value_cur = ENVSYS_DRIVE_FAIL; 2015 edata->state = ENVSYS_SCRITICAL; 2016 break; 2017 2018 case BIOC_SVDEGRADED: 2019 edata->value_cur = ENVSYS_DRIVE_PFAIL; 2020 edata->state = ENVSYS_SCRITICAL; 2021 break; 2022 2023 case BIOC_SVSCRUB: 2024 case BIOC_SVONLINE: 2025 edata->value_cur = ENVSYS_DRIVE_ONLINE; 2026 edata->state = ENVSYS_SVALID; 2027 break; 2028 2029 case BIOC_SVINVALID: 2030 /* FALLTRHOUGH */ 2031 default: 2032 edata->value_cur = 0; /* unknown */ 2033 edata->state = ENVSYS_SINVALID; 2034 } 2035 } 2036 2037 #endif /* NBIO > 0 */ 2038 2039 static uint32_t 2040 mfi_xscale_fw_state(struct mfi_softc *sc) 2041 { 2042 return mfi_read(sc, MFI_OMSG0); 2043 } 2044 2045 static void 2046 mfi_xscale_intr_dis(struct mfi_softc *sc) 2047 { 2048 mfi_write(sc, MFI_OMSK, 0); 2049 } 2050 2051 static void 2052 mfi_xscale_intr_ena(struct mfi_softc *sc) 2053 { 2054 mfi_write(sc, MFI_OMSK, MFI_ENABLE_INTR); 2055 } 2056 2057 static int 2058 mfi_xscale_intr(struct mfi_softc *sc) 2059 { 2060 uint32_t status; 2061 2062 status = mfi_read(sc, MFI_OSTS); 2063 if (!ISSET(status, MFI_OSTS_INTR_VALID)) 2064 return 0; 2065 2066 /* write status back to acknowledge interrupt */ 2067 mfi_write(sc, MFI_OSTS, status); 2068 return 1; 2069 } 2070 2071 static void 2072 mfi_xscale_post(struct mfi_softc *sc, struct mfi_ccb *ccb) 2073 { 2074 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_frames), 2075 ccb->ccb_pframe - MFIMEM_DVA(sc->sc_frames), 2076 sc->sc_frames_size, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2077 bus_dmamap_sync(sc->sc_dmat, MFIMEM_MAP(sc->sc_sense), 2078 ccb->ccb_psense - MFIMEM_DVA(sc->sc_sense), 2079 MFI_SENSE_SIZE, BUS_DMASYNC_PREREAD); 2080 2081 mfi_write(sc, MFI_IQP, (ccb->ccb_pframe >> 3) | 2082 ccb->ccb_extra_frames); 2083 } 2084 2085 static uint32_t 2086 mfi_ppc_fw_state(struct mfi_softc *sc) 2087 { 2088 return mfi_read(sc, MFI_OSP); 2089 } 2090 2091 static void 2092 mfi_ppc_intr_dis(struct mfi_softc *sc) 2093 { 2094 /* Taking a wild guess --dyoung */ 2095 mfi_write(sc, MFI_OMSK, ~(uint32_t)0x0); 2096 mfi_write(sc, MFI_ODC, 0xffffffff); 2097 } 2098 2099 static void 2100 mfi_ppc_intr_ena(struct mfi_softc *sc) 2101 { 2102 mfi_write(sc, MFI_ODC, 0xffffffff); 2103 mfi_write(sc, MFI_OMSK, ~0x80000004); 2104 } 2105 2106 static int 2107 mfi_ppc_intr(struct mfi_softc *sc) 2108 { 2109 uint32_t status; 2110 2111 status = mfi_read(sc, MFI_OSTS); 2112 if (!ISSET(status, MFI_OSTS_PPC_INTR_VALID)) 2113 return 0; 2114 2115 /* write status back to acknowledge interrupt */ 2116 mfi_write(sc, MFI_ODC, status); 2117 return 1; 2118 } 2119 2120 static void 2121 mfi_ppc_post(struct mfi_softc *sc, struct mfi_ccb *ccb) 2122 { 2123 mfi_write(sc, MFI_IQP, 0x1 | ccb->ccb_pframe | 2124 (ccb->ccb_extra_frames << 1)); 2125 } 2126
Indexes created Wed Sep 24 05:09:52 GMT 2025