1 1.11 matt /* $NetBSD: mk48txxreg.h,v 1.11 2011/01/04 01:28:15 matt Exp $ */ 2 1.1 pk /*- 3 1.1 pk * Copyright (c) 2000 The NetBSD Foundation, Inc. 4 1.1 pk * All rights reserved. 5 1.1 pk * 6 1.1 pk * This code is derived from software contributed to The NetBSD Foundation 7 1.1 pk * by Paul Kranenburg. 8 1.1 pk * 9 1.1 pk * Redistribution and use in source and binary forms, with or without 10 1.1 pk * modification, are permitted provided that the following conditions 11 1.1 pk * are met: 12 1.1 pk * 1. Redistributions of source code must retain the above copyright 13 1.1 pk * notice, this list of conditions and the following disclaimer. 14 1.1 pk * 2. Redistributions in binary form must reproduce the above copyright 15 1.1 pk * notice, this list of conditions and the following disclaimer in the 16 1.1 pk * documentation and/or other materials provided with the distribution. 17 1.1 pk * 18 1.1 pk * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 1.1 pk * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 1.1 pk * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 1.1 pk * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 1.1 pk * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 1.1 pk * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 1.1 pk * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 1.1 pk * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 1.1 pk * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 1.1 pk * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 1.1 pk * POSSIBILITY OF SUCH DAMAGE. 29 1.1 pk */ 30 1.1 pk 31 1.1 pk /* 32 1.1 pk * Mostek MK48Txx clocks. 33 1.1 pk * 34 1.1 pk * The MK48T02 has 2KB of non-volatile memory. The time-of-day clock 35 1.1 pk * registers start at offset 0x7f8. 36 1.1 pk * 37 1.5 kleink * The MK48T08 and MK48T18 have 8KB of non-volatile memory 38 1.1 pk * 39 1.1 pk * The MK48T59 also has 8KB of non-volatile memory but in addition it 40 1.1 pk * has a battery low detection bit and a power supply wakeup alarm for 41 1.1 pk * power management. It's at offset 0x1ff0 in the NVRAM. 42 1.1 pk */ 43 1.1 pk 44 1.1 pk /* 45 1.1 pk * Mostek MK48TXX register definitions 46 1.1 pk */ 47 1.1 pk 48 1.1 pk /* 49 1.1 pk * The first bank of eight registers at offset (nvramsz - 16) is 50 1.8 bjh21 * available only on more recent (which??) MK48Txx models. 51 1.1 pk */ 52 1.8 bjh21 #define MK48TXX_IFLAGS 0 /* flags */ 53 1.8 bjh21 /* 1 unused on MK48T59 */ 54 1.8 bjh21 #define MK48TXX_IASEC 2 /* alarm seconds (0..59; BCD) */ 55 1.8 bjh21 #define MK48TXX_IAMIN 3 /* alarm minutes (0..59; BCD) */ 56 1.8 bjh21 #define MK48TXX_IAHOUR 4 /* alarm hour (0..23; BCD) */ 57 1.8 bjh21 #define MK48TXX_IADAY 5 /* alarm day (1..31; BCD) */ 58 1.8 bjh21 #define MK48TXX_IINTR 6 /* interrupts */ 59 1.8 bjh21 #define MK48TXX_IWDOG 7 /* watchdog */ 60 1.11 matt #define MK48TXX_ICSR 8 /* control register / century (DS1553) */ 61 1.1 pk #define MK48TXX_ISEC 9 /* seconds (0..59; BCD) */ 62 1.1 pk #define MK48TXX_IMIN 10 /* minutes (0..59; BCD) */ 63 1.1 pk #define MK48TXX_IHOUR 11 /* hour (0..23; BCD) */ 64 1.1 pk #define MK48TXX_IWDAY 12 /* weekday (1..7) */ 65 1.1 pk #define MK48TXX_IDAY 13 /* day in month (1..31; BCD) */ 66 1.1 pk #define MK48TXX_IMON 14 /* month (1..12; BCD) */ 67 1.1 pk #define MK48TXX_IYEAR 15 /* year (0..99; BCD) */ 68 1.1 pk 69 1.8 bjh21 /* Bits in the flags register */ 70 1.8 bjh21 #define MK48TXX_FLAGS_WDF 0x80 /* watchdog flag */ 71 1.8 bjh21 #define MK48TXX_FLAGS_ALARM 0x40 /* alarm flag */ 72 1.8 bjh21 #define MK48TXX_FLAGS_BATTLOW 0x10 /* battery low */ 73 1.8 bjh21 74 1.8 bjh21 /* Bits in the interrupt register */ 75 1.8 bjh21 #define MK48TXX_INTR_AFE 0x80 /* alarm flag enable */ 76 1.8 bjh21 #define MK48TXX_INTR_ABE 0x20 /* alarm in battery backup enable */ 77 1.8 bjh21 78 1.8 bjh21 /* Bits in the watchdog register */ 79 1.8 bjh21 #define MK48TXX_WDOG_WDS 0x80 /* watchdog steering */ 80 1.8 bjh21 #define MK48TXX_WDOG_BMB_MASK 0x7c /* watchdog multiplier bits */ 81 1.8 bjh21 #define MK48TXX_WDOG_BMB_SHIFT 2 82 1.8 bjh21 #define MK48TXX_WDOG_RES_MASK 0x03 /* watchdog resolution bits */ 83 1.8 bjh21 #define MK48TXX_WDOG_RES_1_16S 0x00 /* 1/16 seconds */ 84 1.8 bjh21 #define MK48TXX_WDOG_RES_1_4S 0x01 /* 1/4 seconds */ 85 1.8 bjh21 #define MK48TXX_WDOG_RES_1S 0x02 /* 1 second */ 86 1.8 bjh21 #define MK48TXX_WDOG_RES_4S 0x03 /* 4 seconds */ 87 1.8 bjh21 88 1.1 pk /* Bits in the control register */ 89 1.1 pk #define MK48TXX_CSR_WRITE 0x80 /* want to write */ 90 1.1 pk #define MK48TXX_CSR_READ 0x40 /* want to read (freeze clock) */ 91 1.11 matt #define MK48TXX_CSR_CENT_MASK 0x3f /* century mask */ 92 1.1 pk 93 1.8 bjh21 /* Bit in the weekday register */ 94 1.8 bjh21 #define MK48TXX_WDAY_FT 0x40 /* freq test: toggle sec[0] at 512Hz */ 95 1.8 bjh21 /* next two are on MK48T59 only */ 96 1.8 bjh21 #define MK48TXX_WDAY_CEB 0x20 /* century enable */ 97 1.8 bjh21 #define MK48TXX_WDAY_CB 0x10 /* century bit */ 98 1.8 bjh21 99 1.8 bjh21 /* Bit in the seconds register */ 100 1.8 bjh21 #define MK48TXX_SEC_STOP 0x80 /* stop the oscillator */ 101 1.8 bjh21 102 1.1 pk #define MK48T02_CLKSZ 2048 103 1.1 pk #define MK48T02_CLKOFF 0x7f0 104 1.1 pk 105 1.1 pk #define MK48T08_CLKSZ 8192 106 1.1 pk #define MK48T08_CLKOFF 0x1ff0 107 1.5 kleink 108 1.5 kleink #define MK48T18_CLKSZ 8192 109 1.5 kleink #define MK48T18_CLKOFF 0x1ff0 110 1.1 pk 111 1.1 pk #define MK48T59_CLKSZ 8192 112 1.1 pk #define MK48T59_CLKOFF 0x1ff0 113 1.11 matt 114 1.11 matt #define DS1553_CLKSZ 8192 115 1.11 matt #define DS1553_CLKOFF 0x1ff0 116