mpt_mpilib.h revision 1.3.38.2
1 1.3.38.2 tron /* $NetBSD: mpt_mpilib.h,v 1.3.38.2 2007/07/27 13:06:52 tron Exp $ */ 2 1.3.38.2 tron 3 1.3.38.2 tron /* 4 1.3.38.2 tron * Copyright (c) 2000, 2001 by LSI Logic Corporation 5 1.3.38.2 tron * 6 1.3.38.2 tron * Redistribution and use in source and binary forms, with or without 7 1.3.38.2 tron * modification, are permitted provided that the following conditions 8 1.3.38.2 tron * are met: 9 1.3.38.2 tron * 1. Redistributions of source code must retain the above copyright 10 1.3.38.2 tron * notice immediately at the beginning of the file, without modification, 11 1.3.38.2 tron * this list of conditions, and the following disclaimer. 12 1.3.38.2 tron * 2. The name of the author may not be used to endorse or promote products 13 1.3.38.2 tron * derived from this software without specific prior written permission. 14 1.3.38.2 tron * 15 1.3.38.2 tron * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 1.3.38.2 tron * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 1.3.38.2 tron * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 1.3.38.2 tron * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 19 1.3.38.2 tron * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 1.3.38.2 tron * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 1.3.38.2 tron * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 1.3.38.2 tron * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 1.3.38.2 tron * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 1.3.38.2 tron * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 1.3.38.2 tron * SUCH DAMAGE. 26 1.3.38.2 tron * 27 1.3.38.2 tron * 28 1.3.38.2 tron * Name: MPI_TYPE.H 29 1.3.38.2 tron * Title: MPI Basic type definitions 30 1.3.38.2 tron * Creation Date: June 6, 2000 31 1.3.38.2 tron * 32 1.3.38.2 tron * MPI Version: 01.02.01 33 1.3.38.2 tron * 34 1.3.38.2 tron * Version History 35 1.3.38.2 tron * --------------- 36 1.3.38.2 tron * 37 1.3.38.2 tron * Date Version Description 38 1.3.38.2 tron * -------- -------- ------------------------------------------------------ 39 1.3.38.2 tron * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 40 1.3.38.2 tron * 06-06-00 01.00.01 Update version number for 1.0 release. 41 1.3.38.2 tron * 11-02-00 01.01.01 Original release for post 1.0 work 42 1.3.38.2 tron * 02-20-01 01.01.02 Added define and ifdef for MPI_POINTER. 43 1.3.38.2 tron * 08-08-01 01.02.01 Original release for v1.2 work. 44 1.3.38.2 tron * -------------------------------------------------------------------------- 45 1.3.38.2 tron */ 46 1.3.38.2 tron 47 1.3.38.2 tron #ifndef MPI_TYPE_H 48 1.3.38.2 tron #define MPI_TYPE_H 49 1.3.38.2 tron 50 1.3.38.2 tron 51 1.3.38.2 tron /******************************************************************************* 52 1.3.38.2 tron * Define MPI_POINTER if it hasn't already been defined. By default MPI_POINTER 53 1.3.38.2 tron * is defined to be a near pointer. MPI_POINTER can be defined as a far pointer 54 1.3.38.2 tron * by defining MPI_POINTER as "far *" before this header file is included. 55 1.3.38.2 tron */ 56 1.3.38.2 tron #ifndef MPI_POINTER 57 1.3.38.2 tron #define MPI_POINTER * 58 1.3.38.2 tron #endif 59 1.3.38.2 tron 60 1.3.38.2 tron 61 1.3.38.2 tron /***************************************************************************** 62 1.3.38.2 tron * 63 1.3.38.2 tron * B a s i c T y p e s 64 1.3.38.2 tron * 65 1.3.38.2 tron *****************************************************************************/ 66 1.3.38.2 tron 67 1.3.38.2 tron #ifdef __NetBSD__ 68 1.3.38.2 tron typedef int8_t S8; 69 1.3.38.2 tron typedef uint8_t U8; 70 1.3.38.2 tron typedef int16_t S16; 71 1.3.38.2 tron typedef uint16_t U16; 72 1.3.38.2 tron typedef int32_t S32; 73 1.3.38.2 tron typedef uint32_t U32; 74 1.3.38.2 tron #else /* ! __NetBSD__ */ 75 1.3.38.2 tron typedef signed char S8; 76 1.3.38.2 tron typedef unsigned char U8; 77 1.3.38.2 tron typedef signed short S16; 78 1.3.38.2 tron typedef unsigned short U16; 79 1.3.38.2 tron 80 1.3.38.2 tron #if defined(unix) || defined(__arm) || defined(ALPHA) || defined(__GNUC__) 81 1.3.38.2 tron 82 1.3.38.2 tron typedef signed int S32; 83 1.3.38.2 tron typedef unsigned int U32; 84 1.3.38.2 tron 85 1.3.38.2 tron #else 86 1.3.38.2 tron 87 1.3.38.2 tron typedef signed long S32; 88 1.3.38.2 tron typedef unsigned long U32; 89 1.3.38.2 tron 90 1.3.38.2 tron #endif 91 1.3.38.2 tron #endif /* __NetBSD__ */ 92 1.3.38.2 tron 93 1.3.38.2 tron 94 1.3.38.2 tron typedef struct _S64 95 1.3.38.2 tron { 96 1.3.38.2 tron U32 Low; 97 1.3.38.2 tron S32 High; 98 1.3.38.2 tron } S64; 99 1.3.38.2 tron 100 1.3.38.2 tron typedef struct _U64 101 1.3.38.2 tron { 102 1.3.38.2 tron U32 Low; 103 1.3.38.2 tron U32 High; 104 1.3.38.2 tron } U64; 105 1.3.38.2 tron 106 1.3.38.2 tron 107 1.3.38.2 tron /****************************************************************************/ 108 1.3.38.2 tron /* Pointers */ 109 1.3.38.2 tron /****************************************************************************/ 110 1.3.38.2 tron 111 1.3.38.2 tron typedef S8 *PS8; 112 1.3.38.2 tron typedef U8 *PU8; 113 1.3.38.2 tron typedef S16 *PS16; 114 1.3.38.2 tron typedef U16 *PU16; 115 1.3.38.2 tron typedef S32 *PS32; 116 1.3.38.2 tron typedef U32 *PU32; 117 1.3.38.2 tron typedef S64 *PS64; 118 1.3.38.2 tron typedef U64 *PU64; 119 1.3.38.2 tron 120 1.3.38.2 tron 121 1.3.38.2 tron #endif 122 1.3.38.2 tron 123 1.3.38.2 tron 124 1.3.38.2 tron /* 125 1.3.38.2 tron * Copyright (c) 2000, 2001 by LSI Logic Corporation 126 1.3.38.2 tron * 127 1.3.38.2 tron * Redistribution and use in source and binary forms, with or without 128 1.3.38.2 tron * modification, are permitted provided that the following conditions 129 1.3.38.2 tron * are met: 130 1.3.38.2 tron * 1. Redistributions of source code must retain the above copyright 131 1.3.38.2 tron * notice immediately at the beginning of the file, without modification, 132 1.3.38.2 tron * this list of conditions, and the following disclaimer. 133 1.3.38.2 tron * 2. The name of the author may not be used to endorse or promote products 134 1.3.38.2 tron * derived from this software without specific prior written permission. 135 1.3.38.2 tron * 136 1.3.38.2 tron * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 137 1.3.38.2 tron * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 138 1.3.38.2 tron * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 139 1.3.38.2 tron * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 140 1.3.38.2 tron * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 141 1.3.38.2 tron * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 142 1.3.38.2 tron * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 143 1.3.38.2 tron * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 144 1.3.38.2 tron * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 145 1.3.38.2 tron * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 146 1.3.38.2 tron * SUCH DAMAGE. 147 1.3.38.2 tron * 148 1.3.38.2 tron * 149 1.3.38.2 tron * Name: MPI.H 150 1.3.38.2 tron * Title: MPI Message independent structures and definitions 151 1.3.38.2 tron * Creation Date: July 27, 2000 152 1.3.38.2 tron * 153 1.3.38.2 tron * MPI Version: 01.02.03 154 1.3.38.2 tron * 155 1.3.38.2 tron * Version History 156 1.3.38.2 tron * --------------- 157 1.3.38.2 tron * 158 1.3.38.2 tron * Date Version Description 159 1.3.38.2 tron * -------- -------- ------------------------------------------------------ 160 1.3.38.2 tron * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 161 1.3.38.2 tron * 05-24-00 00.10.02 Added MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH definition. 162 1.3.38.2 tron * 06-06-00 01.00.01 Update MPI_VERSION_MAJOR and MPI_VERSION_MINOR. 163 1.3.38.2 tron * 06-22-00 01.00.02 Added MPI_IOCSTATUS_LAN_ definitions. 164 1.3.38.2 tron * Removed LAN_SUSPEND function definition. 165 1.3.38.2 tron * Added MPI_MSGFLAGS_CONTINUATION_REPLY definition. 166 1.3.38.2 tron * 06-30-00 01.00.03 Added MPI_CONTEXT_REPLY_TYPE_LAN definition. 167 1.3.38.2 tron * Added MPI_GET/SET_CONTEXT_REPLY_TYPE macros. 168 1.3.38.2 tron * 07-27-00 01.00.04 Added MPI_FAULT_ definitions. 169 1.3.38.2 tron * Removed MPI_IOCSTATUS_MSG/DATA_XFER_ERROR definitions. 170 1.3.38.2 tron * Added MPI_IOCSTATUS_INTERNAL_ERROR definition. 171 1.3.38.2 tron * Added MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH. 172 1.3.38.2 tron * 11-02-00 01.01.01 Original release for post 1.0 work. 173 1.3.38.2 tron * 12-04-00 01.01.02 Added new function codes. 174 1.3.38.2 tron * 01-09-01 01.01.03 Added more definitions to the system interface section 175 1.3.38.2 tron * Added MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT. 176 1.3.38.2 tron * 01-25-01 01.01.04 Changed MPI_VERSION_MINOR from 0x00 to 0x01. 177 1.3.38.2 tron * 02-20-01 01.01.05 Started using MPI_POINTER. 178 1.3.38.2 tron * Fixed value for MPI_DIAG_RW_ENABLE. 179 1.3.38.2 tron * Added defines for MPI_DIAG_PREVENT_IOC_BOOT and 180 1.3.38.2 tron * MPI_DIAG_CLEAR_FLASH_BAD_SIG. 181 1.3.38.2 tron * Obsoleted MPI_IOCSTATUS_TARGET_FC_ defines. 182 1.3.38.2 tron * 02-27-01 01.01.06 Removed MPI_HOST_INDEX_REGISTER define. 183 1.3.38.2 tron * Added function codes for RAID. 184 1.3.38.2 tron * 04-09-01 01.01.07 Added alternate define for MPI_DOORBELL_ACTIVE, 185 1.3.38.2 tron * MPI_DOORBELL_USED, to better match the spec. 186 1.3.38.2 tron * 08-08-01 01.02.01 Original release for v1.2 work. 187 1.3.38.2 tron * Changed MPI_VERSION_MINOR from 0x01 to 0x02. 188 1.3.38.2 tron * Added define MPI_FUNCTION_TOOLBOX. 189 1.3.38.2 tron * 09-28-01 01.02.02 New function code MPI_SCSI_ENCLOSURE_PROCESSOR. 190 1.3.38.2 tron * 11-01-01 01.02.03 Changed name to MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR. 191 1.3.38.2 tron * -------------------------------------------------------------------------- 192 1.3.38.2 tron */ 193 1.3.38.2 tron 194 1.3.38.2 tron #ifndef MPI_H 195 1.3.38.2 tron #define MPI_H 196 1.3.38.2 tron 197 1.3.38.2 tron 198 1.3.38.2 tron /***************************************************************************** 199 1.3.38.2 tron * 200 1.3.38.2 tron * M P I V e r s i o n D e f i n i t i o n s 201 1.3.38.2 tron * 202 1.3.38.2 tron *****************************************************************************/ 203 1.3.38.2 tron 204 1.3.38.2 tron #define MPI_VERSION_MAJOR (0x01) 205 1.3.38.2 tron #define MPI_VERSION_MINOR (0x02) 206 1.3.38.2 tron #define MPI_VERSION ((MPI_VERSION_MAJOR << 8) | MPI_VERSION_MINOR) 207 1.3.38.2 tron 208 1.3.38.2 tron /* Note: The major versions of 0xe0 through 0xff are reserved */ 209 1.3.38.2 tron 210 1.3.38.2 tron /***************************************************************************** 211 1.3.38.2 tron * 212 1.3.38.2 tron * I O C S t a t e D e f i n i t i o n s 213 1.3.38.2 tron * 214 1.3.38.2 tron *****************************************************************************/ 215 1.3.38.2 tron 216 1.3.38.2 tron #define MPI_IOC_STATE_RESET (0x00000000) 217 1.3.38.2 tron #define MPI_IOC_STATE_READY (0x10000000) 218 1.3.38.2 tron #define MPI_IOC_STATE_OPERATIONAL (0x20000000) 219 1.3.38.2 tron #define MPI_IOC_STATE_FAULT (0x40000000) 220 1.3.38.2 tron 221 1.3.38.2 tron #define MPI_IOC_STATE_MASK (0xF0000000) 222 1.3.38.2 tron #define MPI_IOC_STATE_SHIFT (28) 223 1.3.38.2 tron 224 1.3.38.2 tron /* Fault state codes (product independent range 0x8000-0xFFFF) */ 225 1.3.38.2 tron 226 1.3.38.2 tron #define MPI_FAULT_REQUEST_MESSAGE_PCI_PARITY_ERROR (0x8111) 227 1.3.38.2 tron #define MPI_FAULT_REQUEST_MESSAGE_PCI_BUS_FAULT (0x8112) 228 1.3.38.2 tron #define MPI_FAULT_REPLY_MESSAGE_PCI_PARITY_ERROR (0x8113) 229 1.3.38.2 tron #define MPI_FAULT_REPLY_MESSAGE_PCI_BUS_FAULT (0x8114) 230 1.3.38.2 tron #define MPI_FAULT_DATA_SEND_PCI_PARITY_ERROR (0x8115) 231 1.3.38.2 tron #define MPI_FAULT_DATA_SEND_PCI_BUS_FAULT (0x8116) 232 1.3.38.2 tron #define MPI_FAULT_DATA_RECEIVE_PCI_PARITY_ERROR (0x8117) 233 1.3.38.2 tron #define MPI_FAULT_DATA_RECEIVE_PCI_BUS_FAULT (0x8118) 234 1.3.38.2 tron 235 1.3.38.2 tron 236 1.3.38.2 tron /***************************************************************************** 237 1.3.38.2 tron * 238 1.3.38.2 tron * P C I S y s t e m I n t e r f a c e R e g i s t e r s 239 1.3.38.2 tron * 240 1.3.38.2 tron *****************************************************************************/ 241 1.3.38.2 tron 242 1.3.38.2 tron /* S y s t e m D o o r b e l l */ 243 1.3.38.2 tron #define MPI_DOORBELL_OFFSET (0x00000000) 244 1.3.38.2 tron #define MPI_DOORBELL_ACTIVE (0x08000000) /* DoorbellUsed */ 245 1.3.38.2 tron #define MPI_DOORBELL_USED (MPI_DOORBELL_ACTIVE) 246 1.3.38.2 tron #define MPI_DOORBELL_ACTIVE_SHIFT (27) 247 1.3.38.2 tron #define MPI_DOORBELL_WHO_INIT_MASK (0x07000000) 248 1.3.38.2 tron #define MPI_DOORBELL_WHO_INIT_SHIFT (24) 249 1.3.38.2 tron #define MPI_DOORBELL_FUNCTION_MASK (0xFF000000) 250 1.3.38.2 tron #define MPI_DOORBELL_FUNCTION_SHIFT (24) 251 1.3.38.2 tron #define MPI_DOORBELL_ADD_DWORDS_MASK (0x00FF0000) 252 1.3.38.2 tron #define MPI_DOORBELL_ADD_DWORDS_SHIFT (16) 253 1.3.38.2 tron #define MPI_DOORBELL_DATA_MASK (0x0000FFFF) 254 1.3.38.2 tron 255 1.3.38.2 tron 256 1.3.38.2 tron #define MPI_WRITE_SEQUENCE_OFFSET (0x00000004) 257 1.3.38.2 tron #define MPI_WRSEQ_KEY_VALUE_MASK (0x0000000F) 258 1.3.38.2 tron #define MPI_WRSEQ_1ST_KEY_VALUE (0x04) 259 1.3.38.2 tron #define MPI_WRSEQ_2ND_KEY_VALUE (0x0B) 260 1.3.38.2 tron #define MPI_WRSEQ_3RD_KEY_VALUE (0x02) 261 1.3.38.2 tron #define MPI_WRSEQ_4TH_KEY_VALUE (0x07) 262 1.3.38.2 tron #define MPI_WRSEQ_5TH_KEY_VALUE (0x0D) 263 1.3.38.2 tron 264 1.3.38.2 tron #define MPI_DIAGNOSTIC_OFFSET (0x00000008) 265 1.3.38.2 tron #define MPI_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400) 266 1.3.38.2 tron #define MPI_DIAG_PREVENT_IOC_BOOT (0x00000200) 267 1.3.38.2 tron #define MPI_DIAG_DRWE (0x00000080) 268 1.3.38.2 tron #define MPI_DIAG_FLASH_BAD_SIG (0x00000040) 269 1.3.38.2 tron #define MPI_DIAG_RESET_HISTORY (0x00000020) 270 1.3.38.2 tron #define MPI_DIAG_RW_ENABLE (0x00000010) 271 1.3.38.2 tron #define MPI_DIAG_RESET_ADAPTER (0x00000004) 272 1.3.38.2 tron #define MPI_DIAG_DISABLE_ARM (0x00000002) 273 1.3.38.2 tron #define MPI_DIAG_MEM_ENABLE (0x00000001) 274 1.3.38.2 tron 275 1.3.38.2 tron #define MPI_TEST_BASE_ADDRESS_OFFSET (0x0000000C) 276 1.3.38.2 tron 277 1.3.38.2 tron #define MPI_DIAG_RW_DATA_OFFSET (0x00000010) 278 1.3.38.2 tron 279 1.3.38.2 tron #define MPI_DIAG_RW_ADDRESS_OFFSET (0x00000014) 280 1.3.38.2 tron 281 1.3.38.2 tron #define MPI_HOST_INTERRUPT_STATUS_OFFSET (0x00000030) 282 1.3.38.2 tron #define MPI_HIS_IOP_DOORBELL_STATUS (0x80000000) 283 1.3.38.2 tron #define MPI_HIS_REPLY_MESSAGE_INTERRUPT (0x00000008) 284 1.3.38.2 tron #define MPI_HIS_DOORBELL_INTERRUPT (0x00000001) 285 1.3.38.2 tron 286 1.3.38.2 tron #define MPI_HOST_INTERRUPT_MASK_OFFSET (0x00000034) 287 1.3.38.2 tron #define MPI_HIM_RIM (0x00000008) 288 1.3.38.2 tron #define MPI_HIM_DIM (0x00000001) 289 1.3.38.2 tron 290 1.3.38.2 tron #define MPI_REQUEST_QUEUE_OFFSET (0x00000040) 291 1.3.38.2 tron #define MPI_REQUEST_POST_FIFO_OFFSET (0x00000040) 292 1.3.38.2 tron 293 1.3.38.2 tron #define MPI_REPLY_QUEUE_OFFSET (0x00000044) 294 1.3.38.2 tron #define MPI_REPLY_POST_FIFO_OFFSET (0x00000044) 295 1.3.38.2 tron #define MPI_REPLY_FREE_FIFO_OFFSET (0x00000044) 296 1.3.38.2 tron 297 1.3.38.2 tron 298 1.3.38.2 tron 299 1.3.38.2 tron /***************************************************************************** 300 1.3.38.2 tron * 301 1.3.38.2 tron * M e s s a g e F r a m e D e s c r i p t o r s 302 1.3.38.2 tron * 303 1.3.38.2 tron *****************************************************************************/ 304 1.3.38.2 tron 305 1.3.38.2 tron #define MPI_REQ_MF_DESCRIPTOR_NB_MASK (0x00000003) 306 1.3.38.2 tron #define MPI_REQ_MF_DESCRIPTOR_F_BIT (0x00000004) 307 1.3.38.2 tron #define MPI_REQ_MF_DESCRIPTOR_ADDRESS_MASK (0xFFFFFFF8) 308 1.3.38.2 tron 309 1.3.38.2 tron #define MPI_ADDRESS_REPLY_A_BIT (0x80000000) 310 1.3.38.2 tron #define MPI_ADDRESS_REPLY_ADDRESS_MASK (0x7FFFFFFF) 311 1.3.38.2 tron 312 1.3.38.2 tron #define MPI_CONTEXT_REPLY_A_BIT (0x80000000) 313 1.3.38.2 tron #define MPI_CONTEXT_REPLY_TYPE_MASK (0x60000000) 314 1.3.38.2 tron #define MPI_CONTEXT_REPLY_TYPE_SCSI_INIT (0x00) 315 1.3.38.2 tron #define MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET (0x01) 316 1.3.38.2 tron #define MPI_CONTEXT_REPLY_TYPE_LAN (0x02) 317 1.3.38.2 tron #define MPI_CONTEXT_REPLY_TYPE_SHIFT (29) 318 1.3.38.2 tron #define MPI_CONTEXT_REPLY_CONTEXT_MASK (0x1FFFFFFF) 319 1.3.38.2 tron 320 1.3.38.2 tron 321 1.3.38.2 tron /****************************************************************************/ 322 1.3.38.2 tron /* Context Reply macros */ 323 1.3.38.2 tron /****************************************************************************/ 324 1.3.38.2 tron 325 1.3.38.2 tron #define MPI_GET_CONTEXT_REPLY_TYPE(x) (((x) & MPI_CONTEXT_REPLY_TYPE_MASK) \ 326 1.3.38.2 tron >> MPI_CONTEXT_REPLY_TYPE_SHIFT) 327 1.3.38.2 tron 328 1.3.38.2 tron #define MPI_SET_CONTEXT_REPLY_TYPE(x, typ) \ 329 1.3.38.2 tron ((x) = ((x) & ~MPI_CONTEXT_REPLY_TYPE_MASK) | \ 330 1.3.38.2 tron (((typ) << MPI_CONTEXT_REPLY_TYPE_SHIFT) & \ 331 1.3.38.2 tron MPI_CONTEXT_REPLY_TYPE_MASK)) 332 1.3.38.2 tron 333 1.3.38.2 tron 334 1.3.38.2 tron /***************************************************************************** 335 1.3.38.2 tron * 336 1.3.38.2 tron * M e s s a g e F u n c t i o n s 337 1.3.38.2 tron * 0x80 -> 0x8F reserved for private message use per product 338 1.3.38.2 tron * 339 1.3.38.2 tron * 340 1.3.38.2 tron *****************************************************************************/ 341 1.3.38.2 tron 342 1.3.38.2 tron #define MPI_FUNCTION_SCSI_IO_REQUEST (0x00) 343 1.3.38.2 tron #define MPI_FUNCTION_SCSI_TASK_MGMT (0x01) 344 1.3.38.2 tron #define MPI_FUNCTION_IOC_INIT (0x02) 345 1.3.38.2 tron #define MPI_FUNCTION_IOC_FACTS (0x03) 346 1.3.38.2 tron #define MPI_FUNCTION_CONFIG (0x04) 347 1.3.38.2 tron #define MPI_FUNCTION_PORT_FACTS (0x05) 348 1.3.38.2 tron #define MPI_FUNCTION_PORT_ENABLE (0x06) 349 1.3.38.2 tron #define MPI_FUNCTION_EVENT_NOTIFICATION (0x07) 350 1.3.38.2 tron #define MPI_FUNCTION_EVENT_ACK (0x08) 351 1.3.38.2 tron #define MPI_FUNCTION_FW_DOWNLOAD (0x09) 352 1.3.38.2 tron #define MPI_FUNCTION_TARGET_CMD_BUFFER_POST (0x0A) 353 1.3.38.2 tron #define MPI_FUNCTION_TARGET_ASSIST (0x0B) 354 1.3.38.2 tron #define MPI_FUNCTION_TARGET_STATUS_SEND (0x0C) 355 1.3.38.2 tron #define MPI_FUNCTION_TARGET_MODE_ABORT (0x0D) 356 1.3.38.2 tron #define MPI_FUNCTION_TARGET_FC_BUF_POST_LINK_SRVC (0x0E) /* obsolete name */ 357 1.3.38.2 tron #define MPI_FUNCTION_TARGET_FC_RSP_LINK_SRVC (0x0F) /* obsolete name */ 358 1.3.38.2 tron #define MPI_FUNCTION_TARGET_FC_EX_SEND_LINK_SRVC (0x10) /* obsolete name */ 359 1.3.38.2 tron #define MPI_FUNCTION_TARGET_FC_ABORT (0x11) /* obsolete name */ 360 1.3.38.2 tron #define MPI_FUNCTION_FC_LINK_SRVC_BUF_POST (0x0E) 361 1.3.38.2 tron #define MPI_FUNCTION_FC_LINK_SRVC_RSP (0x0F) 362 1.3.38.2 tron #define MPI_FUNCTION_FC_EX_LINK_SRVC_SEND (0x10) 363 1.3.38.2 tron #define MPI_FUNCTION_FC_ABORT (0x11) 364 1.3.38.2 tron #define MPI_FUNCTION_FW_UPLOAD (0x12) 365 1.3.38.2 tron #define MPI_FUNCTION_FC_COMMON_TRANSPORT_SEND (0x13) 366 1.3.38.2 tron #define MPI_FUNCTION_FC_PRIMITIVE_SEND (0x14) 367 1.3.38.2 tron 368 1.3.38.2 tron #define MPI_FUNCTION_RAID_ACTION (0x15) 369 1.3.38.2 tron #define MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16) 370 1.3.38.2 tron 371 1.3.38.2 tron #define MPI_FUNCTION_TOOLBOX (0x17) 372 1.3.38.2 tron 373 1.3.38.2 tron #define MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) 374 1.3.38.2 tron 375 1.3.38.2 tron #define MPI_FUNCTION_LAN_SEND (0x20) 376 1.3.38.2 tron #define MPI_FUNCTION_LAN_RECEIVE (0x21) 377 1.3.38.2 tron #define MPI_FUNCTION_LAN_RESET (0x22) 378 1.3.38.2 tron 379 1.3.38.2 tron #define MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40) 380 1.3.38.2 tron #define MPI_FUNCTION_IO_UNIT_RESET (0x41) 381 1.3.38.2 tron #define MPI_FUNCTION_HANDSHAKE (0x42) 382 1.3.38.2 tron #define MPI_FUNCTION_REPLY_FRAME_REMOVAL (0x43) 383 1.3.38.2 tron 384 1.3.38.2 tron 385 1.3.38.2 tron 386 1.3.38.2 tron /***************************************************************************** 387 1.3.38.2 tron * 388 1.3.38.2 tron * S c a t t e r G a t h e r E l e m e n t s 389 1.3.38.2 tron * 390 1.3.38.2 tron *****************************************************************************/ 391 1.3.38.2 tron 392 1.3.38.2 tron /****************************************************************************/ 393 1.3.38.2 tron /* Simple element structures */ 394 1.3.38.2 tron /****************************************************************************/ 395 1.3.38.2 tron 396 1.3.38.2 tron typedef struct _SGE_SIMPLE32 397 1.3.38.2 tron { 398 1.3.38.2 tron U32 FlagsLength; 399 1.3.38.2 tron U32 Address; 400 1.3.38.2 tron } SGE_SIMPLE32, MPI_POINTER PTR_SGE_SIMPLE32, 401 1.3.38.2 tron SGESimple32_t, MPI_POINTER pSGESimple32_t; 402 1.3.38.2 tron 403 1.3.38.2 tron typedef struct _SGE_SIMPLE64 404 1.3.38.2 tron { 405 1.3.38.2 tron U32 FlagsLength; 406 1.3.38.2 tron U64 Address; 407 1.3.38.2 tron } SGE_SIMPLE64, MPI_POINTER PTR_SGE_SIMPLE64, 408 1.3.38.2 tron SGESimple64_t, MPI_POINTER pSGESimple64_t; 409 1.3.38.2 tron 410 1.3.38.2 tron typedef struct _SGE_SIMPLE_UNION 411 1.3.38.2 tron { 412 1.3.38.2 tron U32 FlagsLength; 413 1.3.38.2 tron union 414 1.3.38.2 tron { 415 1.3.38.2 tron U32 Address32; 416 1.3.38.2 tron U64 Address64; 417 1.3.38.2 tron } _u; 418 1.3.38.2 tron } SGESimpleUnion_t, MPI_POINTER pSGESimpleUnion_t, 419 1.3.38.2 tron SGE_SIMPLE_UNION, MPI_POINTER PTR_SGE_SIMPLE_UNION; 420 1.3.38.2 tron 421 1.3.38.2 tron /****************************************************************************/ 422 1.3.38.2 tron /* Chain element structures */ 423 1.3.38.2 tron /****************************************************************************/ 424 1.3.38.2 tron 425 1.3.38.2 tron typedef struct _SGE_CHAIN32 426 1.3.38.2 tron { 427 1.3.38.2 tron U16 Length; 428 1.3.38.2 tron U8 NextChainOffset; 429 1.3.38.2 tron U8 Flags; 430 1.3.38.2 tron U32 Address; 431 1.3.38.2 tron } SGE_CHAIN32, MPI_POINTER PTR_SGE_CHAIN32, 432 1.3.38.2 tron SGEChain32_t, MPI_POINTER pSGEChain32_t; 433 1.3.38.2 tron 434 1.3.38.2 tron typedef struct _SGE_CHAIN64 435 1.3.38.2 tron { 436 1.3.38.2 tron U16 Length; 437 1.3.38.2 tron U8 NextChainOffset; 438 1.3.38.2 tron U8 Flags; 439 1.3.38.2 tron U64 Address; 440 1.3.38.2 tron } SGE_CHAIN64, MPI_POINTER PTR_SGE_CHAIN64, 441 1.3.38.2 tron SGEChain64_t, MPI_POINTER pSGEChain64_t; 442 1.3.38.2 tron 443 1.3.38.2 tron typedef struct _SGE_CHAIN_UNION 444 1.3.38.2 tron { 445 1.3.38.2 tron U16 Length; 446 1.3.38.2 tron U8 NextChainOffset; 447 1.3.38.2 tron U8 Flags; 448 1.3.38.2 tron union 449 1.3.38.2 tron { 450 1.3.38.2 tron U32 Address32; 451 1.3.38.2 tron U64 Address64; 452 1.3.38.2 tron } _u; 453 1.3.38.2 tron } SGE_CHAIN_UNION, MPI_POINTER PTR_SGE_CHAIN_UNION, 454 1.3.38.2 tron SGEChainUnion_t, MPI_POINTER pSGEChainUnion_t; 455 1.3.38.2 tron 456 1.3.38.2 tron /****************************************************************************/ 457 1.3.38.2 tron /* Transaction Context element */ 458 1.3.38.2 tron /****************************************************************************/ 459 1.3.38.2 tron 460 1.3.38.2 tron typedef struct _SGE_TRANSACTION32 461 1.3.38.2 tron { 462 1.3.38.2 tron U8 Reserved; 463 1.3.38.2 tron U8 ContextSize; 464 1.3.38.2 tron U8 DetailsLength; 465 1.3.38.2 tron U8 Flags; 466 1.3.38.2 tron U32 TransactionContext[1]; 467 1.3.38.2 tron U32 TransactionDetails[1]; 468 1.3.38.2 tron } SGE_TRANSACTION32, MPI_POINTER PTR_SGE_TRANSACTION32, 469 1.3.38.2 tron SGETransaction32_t, MPI_POINTER pSGETransaction32_t; 470 1.3.38.2 tron 471 1.3.38.2 tron typedef struct _SGE_TRANSACTION64 472 1.3.38.2 tron { 473 1.3.38.2 tron U8 Reserved; 474 1.3.38.2 tron U8 ContextSize; 475 1.3.38.2 tron U8 DetailsLength; 476 1.3.38.2 tron U8 Flags; 477 1.3.38.2 tron U32 TransactionContext[2]; 478 1.3.38.2 tron U32 TransactionDetails[1]; 479 1.3.38.2 tron } SGE_TRANSACTION64, MPI_POINTER PTR_SGE_TRANSACTION64, 480 1.3.38.2 tron SGETransaction64_t, MPI_POINTER pSGETransaction64_t; 481 1.3.38.2 tron 482 1.3.38.2 tron typedef struct _SGE_TRANSACTION96 483 1.3.38.2 tron { 484 1.3.38.2 tron U8 Reserved; 485 1.3.38.2 tron U8 ContextSize; 486 1.3.38.2 tron U8 DetailsLength; 487 1.3.38.2 tron U8 Flags; 488 1.3.38.2 tron U32 TransactionContext[3]; 489 1.3.38.2 tron U32 TransactionDetails[1]; 490 1.3.38.2 tron } SGE_TRANSACTION96, MPI_POINTER PTR_SGE_TRANSACTION96, 491 1.3.38.2 tron SGETransaction96_t, MPI_POINTER pSGETransaction96_t; 492 1.3.38.2 tron 493 1.3.38.2 tron typedef struct _SGE_TRANSACTION128 494 1.3.38.2 tron { 495 1.3.38.2 tron U8 Reserved; 496 1.3.38.2 tron U8 ContextSize; 497 1.3.38.2 tron U8 DetailsLength; 498 1.3.38.2 tron U8 Flags; 499 1.3.38.2 tron U32 TransactionContext[4]; 500 1.3.38.2 tron U32 TransactionDetails[1]; 501 1.3.38.2 tron } SGE_TRANSACTION128, MPI_POINTER PTR_SGE_TRANSACTION128, 502 1.3.38.2 tron SGETransaction_t128, MPI_POINTER pSGETransaction_t128; 503 1.3.38.2 tron 504 1.3.38.2 tron typedef struct _SGE_TRANSACTION_UNION 505 1.3.38.2 tron { 506 1.3.38.2 tron U8 Reserved; 507 1.3.38.2 tron U8 ContextSize; 508 1.3.38.2 tron U8 DetailsLength; 509 1.3.38.2 tron U8 Flags; 510 1.3.38.2 tron union 511 1.3.38.2 tron { 512 1.3.38.2 tron U32 TransactionContext32[1]; 513 1.3.38.2 tron U32 TransactionContext64[2]; 514 1.3.38.2 tron U32 TransactionContext96[3]; 515 1.3.38.2 tron U32 TransactionContext128[4]; 516 1.3.38.2 tron } _u; 517 1.3.38.2 tron U32 TransactionDetails[1]; 518 1.3.38.2 tron } SGE_TRANSACTION_UNION, MPI_POINTER PTR_SGE_TRANSACTION_UNION, 519 1.3.38.2 tron SGETransactionUnion_t, MPI_POINTER pSGETransactionUnion_t; 520 1.3.38.2 tron 521 1.3.38.2 tron 522 1.3.38.2 tron /****************************************************************************/ 523 1.3.38.2 tron /* SGE IO types union for IO SGL's */ 524 1.3.38.2 tron /****************************************************************************/ 525 1.3.38.2 tron 526 1.3.38.2 tron typedef struct _SGE_IO_UNION 527 1.3.38.2 tron { 528 1.3.38.2 tron union 529 1.3.38.2 tron { 530 1.3.38.2 tron SGE_SIMPLE_UNION Simple; 531 1.3.38.2 tron SGE_CHAIN_UNION Chain; 532 1.3.38.2 tron } _u; 533 1.3.38.2 tron } SGE_IO_UNION, MPI_POINTER PTR_SGE_IO_UNION, 534 1.3.38.2 tron SGEIOUnion_t, MPI_POINTER pSGEIOUnion_t; 535 1.3.38.2 tron 536 1.3.38.2 tron /****************************************************************************/ 537 1.3.38.2 tron /* SGE union for SGL's with Simple and Transaction elements */ 538 1.3.38.2 tron /****************************************************************************/ 539 1.3.38.2 tron 540 1.3.38.2 tron typedef struct _SGE_TRANS_SIMPLE_UNION 541 1.3.38.2 tron { 542 1.3.38.2 tron union 543 1.3.38.2 tron { 544 1.3.38.2 tron SGE_SIMPLE_UNION Simple; 545 1.3.38.2 tron SGE_TRANSACTION_UNION Transaction; 546 1.3.38.2 tron } _u; 547 1.3.38.2 tron } SGE_TRANS_SIMPLE_UNION, MPI_POINTER PTR_SGE_TRANS_SIMPLE_UNION, 548 1.3.38.2 tron SGETransSimpleUnion_t, MPI_POINTER pSGETransSimpleUnion_t; 549 1.3.38.2 tron 550 1.3.38.2 tron /****************************************************************************/ 551 1.3.38.2 tron /* All SGE types union */ 552 1.3.38.2 tron /****************************************************************************/ 553 1.3.38.2 tron 554 1.3.38.2 tron typedef struct _SGE_MPI_UNION 555 1.3.38.2 tron { 556 1.3.38.2 tron union 557 1.3.38.2 tron { 558 1.3.38.2 tron SGE_SIMPLE_UNION Simple; 559 1.3.38.2 tron SGE_CHAIN_UNION Chain; 560 1.3.38.2 tron SGE_TRANSACTION_UNION Transaction; 561 1.3.38.2 tron } _u; 562 1.3.38.2 tron } SGE_MPI_UNION, MPI_POINTER PTR_SGE_MPI_UNION, 563 1.3.38.2 tron MPI_SGE_UNION_t, MPI_POINTER pMPI_SGE_UNION_t, 564 1.3.38.2 tron SGEAllUnion_t, MPI_POINTER pSGEAllUnion_t; 565 1.3.38.2 tron 566 1.3.38.2 tron 567 1.3.38.2 tron /****************************************************************************/ 568 1.3.38.2 tron /* SGE field definition and masks */ 569 1.3.38.2 tron /****************************************************************************/ 570 1.3.38.2 tron 571 1.3.38.2 tron /* Flags field bit definitions */ 572 1.3.38.2 tron 573 1.3.38.2 tron #define MPI_SGE_FLAGS_LAST_ELEMENT (0x80) 574 1.3.38.2 tron #define MPI_SGE_FLAGS_END_OF_BUFFER (0x40) 575 1.3.38.2 tron #define MPI_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30) 576 1.3.38.2 tron #define MPI_SGE_FLAGS_LOCAL_ADDRESS (0x08) 577 1.3.38.2 tron #define MPI_SGE_FLAGS_DIRECTION (0x04) 578 1.3.38.2 tron #define MPI_SGE_FLAGS_ADDRESS_SIZE (0x02) 579 1.3.38.2 tron #define MPI_SGE_FLAGS_END_OF_LIST (0x01) 580 1.3.38.2 tron 581 1.3.38.2 tron #define MPI_SGE_FLAGS_SHIFT (24) 582 1.3.38.2 tron 583 1.3.38.2 tron #define MPI_SGE_LENGTH_MASK (0x00FFFFFF) 584 1.3.38.2 tron #define MPI_SGE_CHAIN_LENGTH_MASK (0x0000FFFF) 585 1.3.38.2 tron 586 1.3.38.2 tron /* Element Type */ 587 1.3.38.2 tron 588 1.3.38.2 tron #define MPI_SGE_FLAGS_TRANSACTION_ELEMENT (0x00) 589 1.3.38.2 tron #define MPI_SGE_FLAGS_SIMPLE_ELEMENT (0x10) 590 1.3.38.2 tron #define MPI_SGE_FLAGS_CHAIN_ELEMENT (0x30) 591 1.3.38.2 tron #define MPI_SGE_FLAGS_ELEMENT_MASK (0x30) 592 1.3.38.2 tron 593 1.3.38.2 tron /* Address location */ 594 1.3.38.2 tron 595 1.3.38.2 tron #define MPI_SGE_FLAGS_SYSTEM_ADDRESS (0x00) 596 1.3.38.2 tron 597 1.3.38.2 tron /* Direction */ 598 1.3.38.2 tron 599 1.3.38.2 tron #define MPI_SGE_FLAGS_IOC_TO_HOST (0x00) 600 1.3.38.2 tron #define MPI_SGE_FLAGS_HOST_TO_IOC (0x04) 601 1.3.38.2 tron 602 1.3.38.2 tron /* Address Size */ 603 1.3.38.2 tron 604 1.3.38.2 tron #define MPI_SGE_FLAGS_32_BIT_ADDRESSING (0x00) 605 1.3.38.2 tron #define MPI_SGE_FLAGS_64_BIT_ADDRESSING (0x02) 606 1.3.38.2 tron 607 1.3.38.2 tron /* Context Size */ 608 1.3.38.2 tron 609 1.3.38.2 tron #define MPI_SGE_FLAGS_32_BIT_CONTEXT (0x00) 610 1.3.38.2 tron #define MPI_SGE_FLAGS_64_BIT_CONTEXT (0x02) 611 1.3.38.2 tron #define MPI_SGE_FLAGS_96_BIT_CONTEXT (0x04) 612 1.3.38.2 tron #define MPI_SGE_FLAGS_128_BIT_CONTEXT (0x06) 613 1.3.38.2 tron 614 1.3.38.2 tron #define MPI_SGE_CHAIN_OFFSET_MASK (0x00FF0000) 615 1.3.38.2 tron #define MPI_SGE_CHAIN_OFFSET_SHIFT (16) 616 1.3.38.2 tron 617 1.3.38.2 tron 618 1.3.38.2 tron /****************************************************************************/ 619 1.3.38.2 tron /* SGE operation Macros */ 620 1.3.38.2 tron /****************************************************************************/ 621 1.3.38.2 tron 622 1.3.38.2 tron /* SIMPLE FlagsLength manipulations... */ 623 1.3.38.2 tron #define MPI_SGE_SET_FLAGS(f) ((U32)(f) << MPI_SGE_FLAGS_SHIFT) 624 1.3.38.2 tron #define MPI_SGE_GET_FLAGS(fl) (((fl) & ~MPI_SGE_LENGTH_MASK) >> MPI_SGE_FLAGS_SHIFT) 625 1.3.38.2 tron #define MPI_SGE_LENGTH(fl) ((fl) & MPI_SGE_LENGTH_MASK) 626 1.3.38.2 tron #define MPI_SGE_CHAIN_LENGTH(fl) ((fl) & MPI_SGE_CHAIN_LENGTH_MASK) 627 1.3.38.2 tron 628 1.3.38.2 tron #define MPI_SGE_SET_FLAGS_LENGTH(f,l) (MPI_SGE_SET_FLAGS(f) | MPI_SGE_LENGTH(l)) 629 1.3.38.2 tron 630 1.3.38.2 tron #define MPI_pSGE_GET_FLAGS(psg) MPI_SGE_GET_FLAGS((psg)->FlagsLength) 631 1.3.38.2 tron #define MPI_pSGE_GET_LENGTH(psg) MPI_SGE_LENGTH((psg)->FlagsLength) 632 1.3.38.2 tron #define MPI_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI_SGE_SET_FLAGS_LENGTH(f,l) 633 1.3.38.2 tron /* CAUTION - The following are READ-MODIFY-WRITE! */ 634 1.3.38.2 tron #define MPI_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI_SGE_SET_FLAGS(f) 635 1.3.38.2 tron #define MPI_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI_SGE_LENGTH(l) 636 1.3.38.2 tron 637 1.3.38.2 tron #define MPI_GET_CHAIN_OFFSET(x) ((x&MPI_SGE_CHAIN_OFFSET_MASK)>>MPI_SGE_CHAIN_OFFSET_SHIFT) 638 1.3.38.2 tron 639 1.3.38.2 tron 640 1.3.38.2 tron 641 1.3.38.2 tron /***************************************************************************** 642 1.3.38.2 tron * 643 1.3.38.2 tron * S t a n d a r d M e s s a g e S t r u c t u r e s 644 1.3.38.2 tron * 645 1.3.38.2 tron *****************************************************************************/ 646 1.3.38.2 tron 647 1.3.38.2 tron /****************************************************************************/ 648 1.3.38.2 tron /* Standard message request header for all request messages */ 649 1.3.38.2 tron /****************************************************************************/ 650 1.3.38.2 tron 651 1.3.38.2 tron typedef struct _MSG_REQUEST_HEADER 652 1.3.38.2 tron { 653 1.3.38.2 tron U8 Reserved[2]; /* function specific */ 654 1.3.38.2 tron U8 ChainOffset; 655 1.3.38.2 tron U8 Function; 656 1.3.38.2 tron U8 Reserved1[3]; /* function specific */ 657 1.3.38.2 tron U8 MsgFlags; 658 1.3.38.2 tron U32 MsgContext; 659 1.3.38.2 tron } MSG_REQUEST_HEADER, MPI_POINTER PTR_MSG_REQUEST_HEADER, 660 1.3.38.2 tron MPIHeader_t, MPI_POINTER pMPIHeader_t; 661 1.3.38.2 tron 662 1.3.38.2 tron 663 1.3.38.2 tron /****************************************************************************/ 664 1.3.38.2 tron /* Default Reply */ 665 1.3.38.2 tron /****************************************************************************/ 666 1.3.38.2 tron 667 1.3.38.2 tron typedef struct _MSG_DEFAULT_REPLY 668 1.3.38.2 tron { 669 1.3.38.2 tron U8 Reserved[2]; /* function specific */ 670 1.3.38.2 tron U8 MsgLength; 671 1.3.38.2 tron U8 Function; 672 1.3.38.2 tron U8 Reserved1[3]; /* function specific */ 673 1.3.38.2 tron U8 MsgFlags; 674 1.3.38.2 tron U32 MsgContext; 675 1.3.38.2 tron U8 Reserved2[2]; /* function specific */ 676 1.3.38.2 tron U16 IOCStatus; 677 1.3.38.2 tron U32 IOCLogInfo; 678 1.3.38.2 tron } MSG_DEFAULT_REPLY, MPI_POINTER PTR_MSG_DEFAULT_REPLY, 679 1.3.38.2 tron MPIDefaultReply_t, MPI_POINTER pMPIDefaultReply_t; 680 1.3.38.2 tron 681 1.3.38.2 tron 682 1.3.38.2 tron /* MsgFlags definition for all replies */ 683 1.3.38.2 tron 684 1.3.38.2 tron #define MPI_MSGFLAGS_CONTINUATION_REPLY (0x80) 685 1.3.38.2 tron 686 1.3.38.2 tron 687 1.3.38.2 tron /***************************************************************************** 688 1.3.38.2 tron * 689 1.3.38.2 tron * I O C S t a t u s V a l u e s 690 1.3.38.2 tron * 691 1.3.38.2 tron *****************************************************************************/ 692 1.3.38.2 tron 693 1.3.38.2 tron /****************************************************************************/ 694 1.3.38.2 tron /* Common IOCStatus values for all replies */ 695 1.3.38.2 tron /****************************************************************************/ 696 1.3.38.2 tron 697 1.3.38.2 tron #define MPI_IOCSTATUS_SUCCESS (0x0000) 698 1.3.38.2 tron #define MPI_IOCSTATUS_INVALID_FUNCTION (0x0001) 699 1.3.38.2 tron #define MPI_IOCSTATUS_BUSY (0x0002) 700 1.3.38.2 tron #define MPI_IOCSTATUS_INVALID_SGL (0x0003) 701 1.3.38.2 tron #define MPI_IOCSTATUS_INTERNAL_ERROR (0x0004) 702 1.3.38.2 tron #define MPI_IOCSTATUS_RESERVED (0x0005) 703 1.3.38.2 tron #define MPI_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006) 704 1.3.38.2 tron #define MPI_IOCSTATUS_INVALID_FIELD (0x0007) 705 1.3.38.2 tron #define MPI_IOCSTATUS_INVALID_STATE (0x0008) 706 1.3.38.2 tron 707 1.3.38.2 tron /****************************************************************************/ 708 1.3.38.2 tron /* Config IOCStatus values */ 709 1.3.38.2 tron /****************************************************************************/ 710 1.3.38.2 tron 711 1.3.38.2 tron #define MPI_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020) 712 1.3.38.2 tron #define MPI_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021) 713 1.3.38.2 tron #define MPI_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022) 714 1.3.38.2 tron #define MPI_IOCSTATUS_CONFIG_INVALID_DATA (0x0023) 715 1.3.38.2 tron #define MPI_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024) 716 1.3.38.2 tron #define MPI_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025) 717 1.3.38.2 tron 718 1.3.38.2 tron /****************************************************************************/ 719 1.3.38.2 tron /* SCSIIO Reply (SPI & FCP) initiator values */ 720 1.3.38.2 tron /****************************************************************************/ 721 1.3.38.2 tron 722 1.3.38.2 tron #define MPI_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040) 723 1.3.38.2 tron #define MPI_IOCSTATUS_SCSI_INVALID_BUS (0x0041) 724 1.3.38.2 tron #define MPI_IOCSTATUS_SCSI_INVALID_TARGETID (0x0042) 725 1.3.38.2 tron #define MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043) 726 1.3.38.2 tron #define MPI_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044) 727 1.3.38.2 tron #define MPI_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045) 728 1.3.38.2 tron #define MPI_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046) 729 1.3.38.2 tron #define MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047) 730 1.3.38.2 tron #define MPI_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048) 731 1.3.38.2 tron #define MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049) 732 1.3.38.2 tron #define MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A) 733 1.3.38.2 tron #define MPI_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B) 734 1.3.38.2 tron #define MPI_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C) 735 1.3.38.2 tron 736 1.3.38.2 tron /****************************************************************************/ 737 1.3.38.2 tron /* SCSI (SPI & FCP) target values */ 738 1.3.38.2 tron /****************************************************************************/ 739 1.3.38.2 tron 740 1.3.38.2 tron #define MPI_IOCSTATUS_TARGET_PRIORITY_IO (0x0060) 741 1.3.38.2 tron #define MPI_IOCSTATUS_TARGET_INVALID_PORT (0x0061) 742 1.3.38.2 tron #define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX (0x0062) 743 1.3.38.2 tron #define MPI_IOCSTATUS_TARGET_ABORTED (0x0063) 744 1.3.38.2 tron #define MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064) 745 1.3.38.2 tron #define MPI_IOCSTATUS_TARGET_NO_CONNECTION (0x0065) 746 1.3.38.2 tron #define MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A) 747 1.3.38.2 tron #define MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT (0x006B) 748 1.3.38.2 tron 749 1.3.38.2 tron /****************************************************************************/ 750 1.3.38.2 tron /* Additional FCP target values */ 751 1.3.38.2 tron /****************************************************************************/ 752 1.3.38.2 tron 753 1.3.38.2 tron #define MPI_IOCSTATUS_TARGET_FC_ABORTED (0x0066) /* obsolete */ 754 1.3.38.2 tron #define MPI_IOCSTATUS_TARGET_FC_RX_ID_INVALID (0x0067) /* obsolete */ 755 1.3.38.2 tron #define MPI_IOCSTATUS_TARGET_FC_DID_INVALID (0x0068) /* obsolete */ 756 1.3.38.2 tron #define MPI_IOCSTATUS_TARGET_FC_NODE_LOGGED_OUT (0x0069) /* obsolete */ 757 1.3.38.2 tron 758 1.3.38.2 tron /****************************************************************************/ 759 1.3.38.2 tron /* Fibre Channel Direct Access values */ 760 1.3.38.2 tron /****************************************************************************/ 761 1.3.38.2 tron 762 1.3.38.2 tron #define MPI_IOCSTATUS_FC_ABORTED (0x0066) 763 1.3.38.2 tron #define MPI_IOCSTATUS_FC_RX_ID_INVALID (0x0067) 764 1.3.38.2 tron #define MPI_IOCSTATUS_FC_DID_INVALID (0x0068) 765 1.3.38.2 tron #define MPI_IOCSTATUS_FC_NODE_LOGGED_OUT (0x0069) 766 1.3.38.2 tron 767 1.3.38.2 tron /****************************************************************************/ 768 1.3.38.2 tron /* LAN values */ 769 1.3.38.2 tron /****************************************************************************/ 770 1.3.38.2 tron 771 1.3.38.2 tron #define MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND (0x0080) 772 1.3.38.2 tron #define MPI_IOCSTATUS_LAN_DEVICE_FAILURE (0x0081) 773 1.3.38.2 tron #define MPI_IOCSTATUS_LAN_TRANSMIT_ERROR (0x0082) 774 1.3.38.2 tron #define MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED (0x0083) 775 1.3.38.2 tron #define MPI_IOCSTATUS_LAN_RECEIVE_ERROR (0x0084) 776 1.3.38.2 tron #define MPI_IOCSTATUS_LAN_RECEIVE_ABORTED (0x0085) 777 1.3.38.2 tron #define MPI_IOCSTATUS_LAN_PARTIAL_PACKET (0x0086) 778 1.3.38.2 tron #define MPI_IOCSTATUS_LAN_CANCELED (0x0087) 779 1.3.38.2 tron 780 1.3.38.2 tron 781 1.3.38.2 tron /****************************************************************************/ 782 1.3.38.2 tron /* IOCStatus flag to indicate that log info is available */ 783 1.3.38.2 tron /****************************************************************************/ 784 1.3.38.2 tron 785 1.3.38.2 tron #define MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000) 786 1.3.38.2 tron #define MPI_IOCSTATUS_MASK (0x7FFF) 787 1.3.38.2 tron 788 1.3.38.2 tron /****************************************************************************/ 789 1.3.38.2 tron /* LogInfo Types */ 790 1.3.38.2 tron /****************************************************************************/ 791 1.3.38.2 tron 792 1.3.38.2 tron #define MPI_IOCLOGINFO_TYPE_MASK (0xF0000000) 793 1.3.38.2 tron #define MPI_IOCLOGINFO_TYPE_NONE (0x0) 794 1.3.38.2 tron #define MPI_IOCLOGINFO_TYPE_SCSI (0x1) 795 1.3.38.2 tron #define MPI_IOCLOGINFO_TYPE_FC (0x2) 796 1.3.38.2 tron #define MPI_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF) 797 1.3.38.2 tron 798 1.3.38.2 tron 799 1.3.38.2 tron #endif 800 1.3.38.2 tron 801 1.3.38.2 tron /* 802 1.3.38.2 tron * Copyright (c) 2000, 2001 by LSI Logic Corporation 803 1.3.38.2 tron * 804 1.3.38.2 tron * Redistribution and use in source and binary forms, with or without 805 1.3.38.2 tron * modification, are permitted provided that the following conditions 806 1.3.38.2 tron * are met: 807 1.3.38.2 tron * 1. Redistributions of source code must retain the above copyright 808 1.3.38.2 tron * notice immediately at the beginning of the file, without modification, 809 1.3.38.2 tron * this list of conditions, and the following disclaimer. 810 1.3.38.2 tron * 2. The name of the author may not be used to endorse or promote products 811 1.3.38.2 tron * derived from this software without specific prior written permission. 812 1.3.38.2 tron * 813 1.3.38.2 tron * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 814 1.3.38.2 tron * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 815 1.3.38.2 tron * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 816 1.3.38.2 tron * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 817 1.3.38.2 tron * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 818 1.3.38.2 tron * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 819 1.3.38.2 tron * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 820 1.3.38.2 tron * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 821 1.3.38.2 tron * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 822 1.3.38.2 tron * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 823 1.3.38.2 tron * SUCH DAMAGE. 824 1.3.38.2 tron * 825 1.3.38.2 tron * 826 1.3.38.2 tron * Name: MPI_CNFG.H 827 1.3.38.2 tron * Title: MPI Config message, structures, and Pages 828 1.3.38.2 tron * Creation Date: July 27, 2000 829 1.3.38.2 tron * 830 1.3.38.2 tron * MPI Version: 01.02.05 831 1.3.38.2 tron * 832 1.3.38.2 tron * Version History 833 1.3.38.2 tron * --------------- 834 1.3.38.2 tron * 835 1.3.38.2 tron * Date Version Description 836 1.3.38.2 tron * -------- -------- ------------------------------------------------------ 837 1.3.38.2 tron * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 838 1.3.38.2 tron * 06-06-00 01.00.01 Update version number for 1.0 release. 839 1.3.38.2 tron * 06-08-00 01.00.02 Added _PAGEVERSION definitions for all pages. 840 1.3.38.2 tron * Added FcPhLowestVersion, FcPhHighestVersion, Reserved2 841 1.3.38.2 tron * fields to FC_DEVICE_0 page, updated the page version. 842 1.3.38.2 tron * Changed _FREE_RUNNING_CLOCK to _PACING_TRANSFERS in 843 1.3.38.2 tron * SCSI_PORT_0, SCSI_DEVICE_0 and SCSI_DEVICE_1 pages 844 1.3.38.2 tron * and updated the page versions. 845 1.3.38.2 tron * Added _RESPONSE_ID_MASK definition to SCSI_PORT_1 846 1.3.38.2 tron * page and updated the page version. 847 1.3.38.2 tron * Added Information field and _INFO_PARAMS_NEGOTIATED 848 1.3.38.2 tron * definitionto SCSI_DEVICE_0 page. 849 1.3.38.2 tron * 06-22-00 01.00.03 Removed batch controls from LAN_0 page and updated the 850 1.3.38.2 tron * page version. 851 1.3.38.2 tron * Added BucketsRemaining to LAN_1 page, redefined the 852 1.3.38.2 tron * state values, and updated the page version. 853 1.3.38.2 tron * Revised bus width definitions in SCSI_PORT_0, 854 1.3.38.2 tron * SCSI_DEVICE_0 and SCSI_DEVICE_1 pages. 855 1.3.38.2 tron * 06-30-00 01.00.04 Added MaxReplySize to LAN_1 page and updated the page 856 1.3.38.2 tron * version. 857 1.3.38.2 tron * Moved FC_DEVICE_0 PageAddress description to spec. 858 1.3.38.2 tron * 07-27-00 01.00.05 Corrected the SubsystemVendorID and SubsystemID field 859 1.3.38.2 tron * widths in IOC_0 page and updated the page version. 860 1.3.38.2 tron * 11-02-00 01.01.01 Original release for post 1.0 work 861 1.3.38.2 tron * Added Manufacturing pages, IO Unit Page 2, SCSI SPI 862 1.3.38.2 tron * Port Page 2, FC Port Page 4, FC Port Page 5 863 1.3.38.2 tron * 11-15-00 01.01.02 Interim changes to match proposals 864 1.3.38.2 tron * 12-04-00 01.01.03 Config page changes to match MPI rev 1.00.01. 865 1.3.38.2 tron * 12-05-00 01.01.04 Modified config page actions. 866 1.3.38.2 tron * 01-09-01 01.01.05 Added defines for page address formats. 867 1.3.38.2 tron * Data size for Manufacturing pages 2 and 3 no longer 868 1.3.38.2 tron * defined here. 869 1.3.38.2 tron * Io Unit Page 2 size is fixed at 4 adapters and some 870 1.3.38.2 tron * flags were changed. 871 1.3.38.2 tron * SCSI Port Page 2 Device Settings modified. 872 1.3.38.2 tron * New fields added to FC Port Page 0 and some flags 873 1.3.38.2 tron * cleaned up. 874 1.3.38.2 tron * Removed impedance flash from FC Port Page 1. 875 1.3.38.2 tron * Added FC Port pages 6 and 7. 876 1.3.38.2 tron * 01-25-01 01.01.06 Added MaxInitiators field to FcPortPage0. 877 1.3.38.2 tron * 01-29-01 01.01.07 Changed some defines to make them 32 character unique. 878 1.3.38.2 tron * Added some LinkType defines for FcPortPage0. 879 1.3.38.2 tron * 02-20-01 01.01.08 Started using MPI_POINTER. 880 1.3.38.2 tron * 02-27-01 01.01.09 Replaced MPI_CONFIG_PAGETYPE_SCSI_LUN with 881 1.3.38.2 tron * MPI_CONFIG_PAGETYPE_RAID_VOLUME. 882 1.3.38.2 tron * Added definitions and structures for IOC Page 2 and 883 1.3.38.2 tron * RAID Volume Page 2. 884 1.3.38.2 tron * 03-27-01 01.01.10 Added CONFIG_PAGE_FC_PORT_8 and CONFIG_PAGE_FC_PORT_9. 885 1.3.38.2 tron * CONFIG_PAGE_FC_PORT_3 now supports persistent by DID. 886 1.3.38.2 tron * Added VendorId and ProductRevLevel fields to 887 1.3.38.2 tron * RAIDVOL2_IM_PHYS_ID struct. 888 1.3.38.2 tron * Modified values for MPI_FCPORTPAGE0_FLAGS_ATTACH_ 889 1.3.38.2 tron * defines to make them compatible to MPI version 1.0. 890 1.3.38.2 tron * Added structure offset comments. 891 1.3.38.2 tron * 04-09-01 01.01.11 Added some new defines for the PageAddress field and 892 1.3.38.2 tron * removed some obsolete ones. 893 1.3.38.2 tron * Added IO Unit Page 3. 894 1.3.38.2 tron * Modified defines for Scsi Port Page 2. 895 1.3.38.2 tron * Modified RAID Volume Pages. 896 1.3.38.2 tron * 08-08-01 01.02.01 Original release for v1.2 work. 897 1.3.38.2 tron * Added SepID and SepBus to RVP2 IMPhysicalDisk struct. 898 1.3.38.2 tron * Added defines for the SEP bits in RVP2 VolumeSettings. 899 1.3.38.2 tron * Modified the DeviceSettings field in RVP2 to use the 900 1.3.38.2 tron * proper structure. 901 1.3.38.2 tron * Added defines for SES, SAF-TE, and cross channel for 902 1.3.38.2 tron * IOCPage2 CapabilitiesFlags. 903 1.3.38.2 tron * Removed define for MPI_IOUNITPAGE2_FLAGS_RAID_DISABLE. 904 1.3.38.2 tron * Removed define for 905 1.3.38.2 tron * MPI_SCSIPORTPAGE2_PORT_FLAGS_PARITY_ENABLE. 906 1.3.38.2 tron * Added define for MPI_CONFIG_PAGEATTR_RO_PERSISTENT. 907 1.3.38.2 tron * 08-29-01 01.02.02 Fixed value for MPI_MANUFACTPAGE_DEVID_53C1035. 908 1.3.38.2 tron * Added defines for MPI_FCPORTPAGE1_FLAGS_HARD_ALPA_ONLY 909 1.3.38.2 tron * and MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY. 910 1.3.38.2 tron * Removed MPI_SCSIPORTPAGE0_CAP_PACING_TRANSFERS, 911 1.3.38.2 tron * MPI_SCSIDEVPAGE0_NP_PACING_TRANSFERS, and 912 1.3.38.2 tron * MPI_SCSIDEVPAGE1_RP_PACING_TRANSFERS, and 913 1.3.38.2 tron * MPI_SCSIDEVPAGE1_CONF_PPR_ALLOWED. 914 1.3.38.2 tron * Added defines for MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED 915 1.3.38.2 tron * and MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED. 916 1.3.38.2 tron * Added OnBusTimerValue to CONFIG_PAGE_SCSI_PORT_1. 917 1.3.38.2 tron * Added rejected bits to SCSI Device Page 0 Information. 918 1.3.38.2 tron * Increased size of ALPA array in FC Port Page 2 by one 919 1.3.38.2 tron * and removed a one byte reserved field. 920 1.3.38.2 tron * 09-28-01 01.02.03 Swapped NegWireSpeedLow and NegWireSpeedLow in 921 1.3.38.2 tron * CONFIG_PAGE_LAN_1 to match preferred 64-bit ordering. 922 1.3.38.2 tron * Added structures for Manufacturing Page 4, IO Unit 923 1.3.38.2 tron * Page 3, IOC Page 3, IOC Page 4, RAID Volume Page 0, and 924 1.3.38.2 tron * RAID PhysDisk Page 0. 925 1.3.38.2 tron * 10-04-01 01.02.04 Added define for MPI_CONFIG_PAGETYPE_RAID_PHYSDISK. 926 1.3.38.2 tron * Modified some of the new defines to make them 32 927 1.3.38.2 tron * character unique. 928 1.3.38.2 tron * Modified how variable length pages (arrays) are defined. 929 1.3.38.2 tron * Added generic defines for hot spare pools and RAID 930 1.3.38.2 tron * volume types. 931 1.3.38.2 tron * 11-01-01 01.02.05 Added define for MPI_IOUNITPAGE1_DISABLE_IR. 932 1.3.38.2 tron * -------------------------------------------------------------------------- 933 1.3.38.2 tron */ 934 1.3.38.2 tron 935 1.3.38.2 tron #ifndef MPI_CNFG_H 936 1.3.38.2 tron #define MPI_CNFG_H 937 1.3.38.2 tron 938 1.3.38.2 tron 939 1.3.38.2 tron /***************************************************************************** 940 1.3.38.2 tron * 941 1.3.38.2 tron * C o n f i g M e s s a g e a n d S t r u c t u r e s 942 1.3.38.2 tron * 943 1.3.38.2 tron *****************************************************************************/ 944 1.3.38.2 tron 945 1.3.38.2 tron typedef struct _CONFIG_PAGE_HEADER 946 1.3.38.2 tron { 947 1.3.38.2 tron U8 PageVersion; /* 00h */ 948 1.3.38.2 tron U8 PageLength; /* 01h */ 949 1.3.38.2 tron U8 PageNumber; /* 02h */ 950 1.3.38.2 tron U8 PageType; /* 03h */ 951 1.3.38.2 tron } fCONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER, 952 1.3.38.2 tron ConfigPageHeader_t, MPI_POINTER pConfigPageHeader_t; 953 1.3.38.2 tron 954 1.3.38.2 tron typedef union _CONFIG_PAGE_HEADER_UNION 955 1.3.38.2 tron { 956 1.3.38.2 tron ConfigPageHeader_t Struct; 957 1.3.38.2 tron U8 Bytes[4]; 958 1.3.38.2 tron U16 Word16[2]; 959 1.3.38.2 tron U32 Word32; 960 1.3.38.2 tron } ConfigPageHeaderUnion, MPI_POINTER pConfigPageHeaderUnion, 961 1.3.38.2 tron fCONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION; 962 1.3.38.2 tron 963 1.3.38.2 tron 964 1.3.38.2 tron /**************************************************************************** 965 1.3.38.2 tron * PageType field values 966 1.3.38.2 tron ****************************************************************************/ 967 1.3.38.2 tron #define MPI_CONFIG_PAGEATTR_READ_ONLY (0x00) 968 1.3.38.2 tron #define MPI_CONFIG_PAGEATTR_CHANGEABLE (0x10) 969 1.3.38.2 tron #define MPI_CONFIG_PAGEATTR_PERSISTENT (0x20) 970 1.3.38.2 tron #define MPI_CONFIG_PAGEATTR_RO_PERSISTENT (0x30) 971 1.3.38.2 tron #define MPI_CONFIG_PAGEATTR_MASK (0xF0) 972 1.3.38.2 tron 973 1.3.38.2 tron #define MPI_CONFIG_PAGETYPE_IO_UNIT (0x00) 974 1.3.38.2 tron #define MPI_CONFIG_PAGETYPE_IOC (0x01) 975 1.3.38.2 tron #define MPI_CONFIG_PAGETYPE_BIOS (0x02) 976 1.3.38.2 tron #define MPI_CONFIG_PAGETYPE_SCSI_PORT (0x03) 977 1.3.38.2 tron #define MPI_CONFIG_PAGETYPE_SCSI_DEVICE (0x04) 978 1.3.38.2 tron #define MPI_CONFIG_PAGETYPE_FC_PORT (0x05) 979 1.3.38.2 tron #define MPI_CONFIG_PAGETYPE_FC_DEVICE (0x06) 980 1.3.38.2 tron #define MPI_CONFIG_PAGETYPE_LAN (0x07) 981 1.3.38.2 tron #define MPI_CONFIG_PAGETYPE_RAID_VOLUME (0x08) 982 1.3.38.2 tron #define MPI_CONFIG_PAGETYPE_MANUFACTURING (0x09) 983 1.3.38.2 tron #define MPI_CONFIG_PAGETYPE_RAID_PHYSDISK (0x0A) 984 1.3.38.2 tron #define MPI_CONFIG_PAGETYPE_MASK (0x0F) 985 1.3.38.2 tron 986 1.3.38.2 tron #define MPI_CONFIG_TYPENUM_MASK (0x0FFF) 987 1.3.38.2 tron 988 1.3.38.2 tron 989 1.3.38.2 tron /**************************************************************************** 990 1.3.38.2 tron * PageAddress field values 991 1.3.38.2 tron ****************************************************************************/ 992 1.3.38.2 tron #define MPI_SCSI_PORT_PGAD_PORT_MASK (0x000000FF) 993 1.3.38.2 tron 994 1.3.38.2 tron #define MPI_SCSI_DEVICE_TARGET_ID_MASK (0x000000FF) 995 1.3.38.2 tron #define MPI_SCSI_DEVICE_TARGET_ID_SHIFT (0) 996 1.3.38.2 tron #define MPI_SCSI_DEVICE_BUS_MASK (0x0000FF00) 997 1.3.38.2 tron #define MPI_SCSI_DEVICE_BUS_SHIFT (8) 998 1.3.38.2 tron 999 1.3.38.2 tron #define MPI_FC_PORT_PGAD_PORT_MASK (0xF0000000) 1000 1.3.38.2 tron #define MPI_FC_PORT_PGAD_PORT_SHIFT (28) 1001 1.3.38.2 tron #define MPI_FC_PORT_PGAD_FORM_MASK (0x0F000000) 1002 1.3.38.2 tron #define MPI_FC_PORT_PGAD_FORM_INDEX (0x01000000) 1003 1.3.38.2 tron #define MPI_FC_PORT_PGAD_INDEX_MASK (0x0000FFFF) 1004 1.3.38.2 tron #define MPI_FC_PORT_PGAD_INDEX_SHIFT (0) 1005 1.3.38.2 tron 1006 1.3.38.2 tron #define MPI_FC_DEVICE_PGAD_PORT_MASK (0xF0000000) 1007 1.3.38.2 tron #define MPI_FC_DEVICE_PGAD_PORT_SHIFT (28) 1008 1.3.38.2 tron #define MPI_FC_DEVICE_PGAD_FORM_MASK (0x0F000000) 1009 1.3.38.2 tron #define MPI_FC_DEVICE_PGAD_FORM_NEXT_DID (0x00000000) 1010 1.3.38.2 tron #define MPI_FC_DEVICE_PGAD_ND_PORT_MASK (0xF0000000) 1011 1.3.38.2 tron #define MPI_FC_DEVICE_PGAD_ND_PORT_SHIFT (28) 1012 1.3.38.2 tron #define MPI_FC_DEVICE_PGAD_ND_DID_MASK (0x00FFFFFF) 1013 1.3.38.2 tron #define MPI_FC_DEVICE_PGAD_ND_DID_SHIFT (0) 1014 1.3.38.2 tron #define MPI_FC_DEVICE_PGAD_FORM_BUS_TID (0x01000000) 1015 1.3.38.2 tron #define MPI_FC_DEVICE_PGAD_BT_BUS_MASK (0x0000FF00) 1016 1.3.38.2 tron #define MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT (8) 1017 1.3.38.2 tron #define MPI_FC_DEVICE_PGAD_BT_TID_MASK (0x000000FF) 1018 1.3.38.2 tron #define MPI_FC_DEVICE_PGAD_BT_TID_SHIFT (0) 1019 1.3.38.2 tron 1020 1.3.38.2 tron #define MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF) 1021 1.3.38.2 tron #define MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT (0) 1022 1.3.38.2 tron 1023 1.3.38.2 tron 1024 1.3.38.2 tron 1025 1.3.38.2 tron /**************************************************************************** 1026 1.3.38.2 tron * Config Request Message 1027 1.3.38.2 tron ****************************************************************************/ 1028 1.3.38.2 tron typedef struct _MSG_CONFIG 1029 1.3.38.2 tron { 1030 1.3.38.2 tron U8 Action; /* 00h */ 1031 1.3.38.2 tron U8 Reserved; /* 01h */ 1032 1.3.38.2 tron U8 ChainOffset; /* 02h */ 1033 1.3.38.2 tron U8 Function; /* 03h */ 1034 1.3.38.2 tron U8 Reserved1[3]; /* 04h */ 1035 1.3.38.2 tron U8 MsgFlags; /* 07h */ 1036 1.3.38.2 tron U32 MsgContext; /* 08h */ 1037 1.3.38.2 tron U8 Reserved2[8]; /* 0Ch */ 1038 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 14h */ 1039 1.3.38.2 tron U32 PageAddress; /* 18h */ 1040 1.3.38.2 tron SGE_IO_UNION PageBufferSGE; /* 1Ch */ 1041 1.3.38.2 tron } MSG_CONFIG, MPI_POINTER PTR_MSG_CONFIG, 1042 1.3.38.2 tron Config_t, MPI_POINTER pConfig_t; 1043 1.3.38.2 tron 1044 1.3.38.2 tron 1045 1.3.38.2 tron /**************************************************************************** 1046 1.3.38.2 tron * Action field values 1047 1.3.38.2 tron ****************************************************************************/ 1048 1.3.38.2 tron #define MPI_CONFIG_ACTION_PAGE_HEADER (0x00) 1049 1.3.38.2 tron #define MPI_CONFIG_ACTION_PAGE_READ_CURRENT (0x01) 1050 1.3.38.2 tron #define MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT (0x02) 1051 1.3.38.2 tron #define MPI_CONFIG_ACTION_PAGE_DEFAULT (0x03) 1052 1.3.38.2 tron #define MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM (0x04) 1053 1.3.38.2 tron #define MPI_CONFIG_ACTION_PAGE_READ_DEFAULT (0x05) 1054 1.3.38.2 tron #define MPI_CONFIG_ACTION_PAGE_READ_NVRAM (0x06) 1055 1.3.38.2 tron 1056 1.3.38.2 tron 1057 1.3.38.2 tron /* Config Reply Message */ 1058 1.3.38.2 tron typedef struct _MSG_CONFIG_REPLY 1059 1.3.38.2 tron { 1060 1.3.38.2 tron U8 Action; /* 00h */ 1061 1.3.38.2 tron U8 Reserved; /* 01h */ 1062 1.3.38.2 tron U8 MsgLength; /* 02h */ 1063 1.3.38.2 tron U8 Function; /* 03h */ 1064 1.3.38.2 tron U8 Reserved1[3]; /* 04h */ 1065 1.3.38.2 tron U8 MsgFlags; /* 07h */ 1066 1.3.38.2 tron U32 MsgContext; /* 08h */ 1067 1.3.38.2 tron U8 Reserved2[2]; /* 0Ch */ 1068 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 1069 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 1070 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 14h */ 1071 1.3.38.2 tron } MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY, 1072 1.3.38.2 tron ConfigReply_t, MPI_POINTER pConfigReply_t; 1073 1.3.38.2 tron 1074 1.3.38.2 tron 1075 1.3.38.2 tron 1076 1.3.38.2 tron /***************************************************************************** 1077 1.3.38.2 tron * 1078 1.3.38.2 tron * C o n f i g u r a t i o n P a g e s 1079 1.3.38.2 tron * 1080 1.3.38.2 tron *****************************************************************************/ 1081 1.3.38.2 tron 1082 1.3.38.2 tron /**************************************************************************** 1083 1.3.38.2 tron * Manufacturing Config pages 1084 1.3.38.2 tron ****************************************************************************/ 1085 1.3.38.2 tron #define MPI_MANUFACTPAGE_DEVICEID_FC909 (0x0621) 1086 1.3.38.2 tron #define MPI_MANUFACTPAGE_DEVICEID_FC919 (0x0624) 1087 1.3.38.2 tron #define MPI_MANUFACTPAGE_DEVICEID_FC929 (0x0622) 1088 1.3.38.2 tron #define MPI_MANUFACTPAGE_DEVICEID_FC919X (0x0628) 1089 1.3.38.2 tron #define MPI_MANUFACTPAGE_DEVICEID_FC929X (0x0626) 1090 1.3.38.2 tron #define MPI_MANUFACTPAGE_DEVID_53C1030 (0x0030) 1091 1.3.38.2 tron #define MPI_MANUFACTPAGE_DEVID_53C1030ZC (0x0031) 1092 1.3.38.2 tron #define MPI_MANUFACTPAGE_DEVID_1030_53C1035 (0x0032) 1093 1.3.38.2 tron #define MPI_MANUFACTPAGE_DEVID_1030ZC_53C1035 (0x0033) 1094 1.3.38.2 tron #define MPI_MANUFACTPAGE_DEVID_53C1035 (0x0040) 1095 1.3.38.2 tron #define MPI_MANUFACTPAGE_DEVID_53C1035ZC (0x0041) 1096 1.3.38.2 tron 1097 1.3.38.2 tron typedef struct _CONFIG_PAGE_MANUFACTURING_0 1098 1.3.38.2 tron { 1099 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1100 1.3.38.2 tron U8 ChipName[16]; /* 04h */ 1101 1.3.38.2 tron U8 ChipRevision[8]; /* 14h */ 1102 1.3.38.2 tron U8 BoardName[16]; /* 1Ch */ 1103 1.3.38.2 tron U8 BoardAssembly[16]; /* 2Ch */ 1104 1.3.38.2 tron U8 BoardTracerNumber[16]; /* 3Ch */ 1105 1.3.38.2 tron 1106 1.3.38.2 tron } fCONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0, 1107 1.3.38.2 tron ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t; 1108 1.3.38.2 tron 1109 1.3.38.2 tron #define MPI_MANUFACTURING0_PAGEVERSION (0x00) 1110 1.3.38.2 tron 1111 1.3.38.2 tron 1112 1.3.38.2 tron typedef struct _CONFIG_PAGE_MANUFACTURING_1 1113 1.3.38.2 tron { 1114 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1115 1.3.38.2 tron U8 VPD[256]; /* 04h */ 1116 1.3.38.2 tron } fCONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1, 1117 1.3.38.2 tron ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t; 1118 1.3.38.2 tron 1119 1.3.38.2 tron #define MPI_MANUFACTURING1_PAGEVERSION (0x00) 1120 1.3.38.2 tron 1121 1.3.38.2 tron 1122 1.3.38.2 tron typedef struct _MPI_CHIP_REVISION_ID 1123 1.3.38.2 tron { 1124 1.3.38.2 tron U16 DeviceID; /* 00h */ 1125 1.3.38.2 tron U8 PCIRevisionID; /* 02h */ 1126 1.3.38.2 tron U8 Reserved; /* 03h */ 1127 1.3.38.2 tron } MPI_CHIP_REVISION_ID, MPI_POINTER PTR_MPI_CHIP_REVISION_ID, 1128 1.3.38.2 tron MpiChipRevisionId_t, MPI_POINTER pMpiChipRevisionId_t; 1129 1.3.38.2 tron 1130 1.3.38.2 tron 1131 1.3.38.2 tron /* 1132 1.3.38.2 tron * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1133 1.3.38.2 tron * one and check Header.PageLength at runtime. 1134 1.3.38.2 tron */ 1135 1.3.38.2 tron #ifndef MPI_MAN_PAGE_2_HW_SETTINGS_WORDS 1136 1.3.38.2 tron #define MPI_MAN_PAGE_2_HW_SETTINGS_WORDS (1) 1137 1.3.38.2 tron #endif 1138 1.3.38.2 tron 1139 1.3.38.2 tron typedef struct _CONFIG_PAGE_MANUFACTURING_2 1140 1.3.38.2 tron { 1141 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1142 1.3.38.2 tron MPI_CHIP_REVISION_ID ChipId; /* 04h */ 1143 1.3.38.2 tron U32 HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 08h */ 1144 1.3.38.2 tron } fCONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2, 1145 1.3.38.2 tron ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t; 1146 1.3.38.2 tron 1147 1.3.38.2 tron #define MPI_MANUFACTURING2_PAGEVERSION (0x00) 1148 1.3.38.2 tron 1149 1.3.38.2 tron 1150 1.3.38.2 tron /* 1151 1.3.38.2 tron * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1152 1.3.38.2 tron * one and check Header.PageLength at runtime. 1153 1.3.38.2 tron */ 1154 1.3.38.2 tron #ifndef MPI_MAN_PAGE_3_INFO_WORDS 1155 1.3.38.2 tron #define MPI_MAN_PAGE_3_INFO_WORDS (1) 1156 1.3.38.2 tron #endif 1157 1.3.38.2 tron 1158 1.3.38.2 tron typedef struct _CONFIG_PAGE_MANUFACTURING_3 1159 1.3.38.2 tron { 1160 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1161 1.3.38.2 tron MPI_CHIP_REVISION_ID ChipId; /* 04h */ 1162 1.3.38.2 tron U32 Info[MPI_MAN_PAGE_3_INFO_WORDS];/* 08h */ 1163 1.3.38.2 tron } fCONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3, 1164 1.3.38.2 tron ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t; 1165 1.3.38.2 tron 1166 1.3.38.2 tron #define MPI_MANUFACTURING3_PAGEVERSION (0x00) 1167 1.3.38.2 tron 1168 1.3.38.2 tron 1169 1.3.38.2 tron typedef struct _CONFIG_PAGE_MANUFACTURING_4 1170 1.3.38.2 tron { 1171 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1172 1.3.38.2 tron U32 Reserved1; /* 04h */ 1173 1.3.38.2 tron U8 InfoOffset0; /* 08h */ 1174 1.3.38.2 tron U8 InfoSize0; /* 09h */ 1175 1.3.38.2 tron U8 InfoOffset1; /* 0Ah */ 1176 1.3.38.2 tron U8 InfoSize1; /* 0Bh */ 1177 1.3.38.2 tron U8 InquirySize; /* 0Ch */ 1178 1.3.38.2 tron U8 Reserved2; /* 0Dh */ 1179 1.3.38.2 tron U16 Reserved3; /* 0Eh */ 1180 1.3.38.2 tron U8 InquiryData[56]; /* 10h */ 1181 1.3.38.2 tron U32 ISVolumeSettings; /* 48h */ 1182 1.3.38.2 tron U32 IMEVolumeSettings; /* 4Ch */ 1183 1.3.38.2 tron U32 IMVolumeSettings; /* 50h */ 1184 1.3.38.2 tron } fCONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4, 1185 1.3.38.2 tron ManufacturingPage4_t, MPI_POINTER pManufacturingPage4_t; 1186 1.3.38.2 tron 1187 1.3.38.2 tron #define MPI_MANUFACTURING4_PAGEVERSION (0x00) 1188 1.3.38.2 tron 1189 1.3.38.2 tron 1190 1.3.38.2 tron /**************************************************************************** 1191 1.3.38.2 tron * IO Unit Config Pages 1192 1.3.38.2 tron ****************************************************************************/ 1193 1.3.38.2 tron 1194 1.3.38.2 tron typedef struct _CONFIG_PAGE_IO_UNIT_0 1195 1.3.38.2 tron { 1196 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1197 1.3.38.2 tron U64 UniqueValue; /* 04h */ 1198 1.3.38.2 tron } fCONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0, 1199 1.3.38.2 tron IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t; 1200 1.3.38.2 tron 1201 1.3.38.2 tron #define MPI_IOUNITPAGE0_PAGEVERSION (0x00) 1202 1.3.38.2 tron 1203 1.3.38.2 tron 1204 1.3.38.2 tron typedef struct _CONFIG_PAGE_IO_UNIT_1 1205 1.3.38.2 tron { 1206 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1207 1.3.38.2 tron U32 Flags; /* 04h */ 1208 1.3.38.2 tron } fCONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1, 1209 1.3.38.2 tron IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t; 1210 1.3.38.2 tron 1211 1.3.38.2 tron #define MPI_IOUNITPAGE1_PAGEVERSION (0x00) 1212 1.3.38.2 tron 1213 1.3.38.2 tron /* IO Unit Page 1 Flags defines */ 1214 1.3.38.2 tron 1215 1.3.38.2 tron #define MPI_IOUNITPAGE1_MULTI_FUNCTION (0x00000000) 1216 1.3.38.2 tron #define MPI_IOUNITPAGE1_SINGLE_FUNCTION (0x00000001) 1217 1.3.38.2 tron #define MPI_IOUNITPAGE1_MULTI_PATHING (0x00000002) 1218 1.3.38.2 tron #define MPI_IOUNITPAGE1_SINGLE_PATHING (0x00000000) 1219 1.3.38.2 tron #define MPI_IOUNITPAGE1_DISABLE_IR (0x00000040) 1220 1.3.38.2 tron #define MPI_IOUNITPAGE1_FORCE_32 (0x00000080) 1221 1.3.38.2 tron 1222 1.3.38.2 tron 1223 1.3.38.2 tron typedef struct _MPI_ADAPTER_INFO 1224 1.3.38.2 tron { 1225 1.3.38.2 tron U8 PciBusNumber; /* 00h */ 1226 1.3.38.2 tron U8 PciDeviceAndFunctionNumber; /* 01h */ 1227 1.3.38.2 tron U16 AdapterFlags; /* 02h */ 1228 1.3.38.2 tron } MPI_ADAPTER_INFO, MPI_POINTER PTR_MPI_ADAPTER_INFO, 1229 1.3.38.2 tron MpiAdapterInfo_t, MPI_POINTER pMpiAdapterInfo_t; 1230 1.3.38.2 tron 1231 1.3.38.2 tron #define MPI_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001) 1232 1.3.38.2 tron #define MPI_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002) 1233 1.3.38.2 tron 1234 1.3.38.2 tron typedef struct _CONFIG_PAGE_IO_UNIT_2 1235 1.3.38.2 tron { 1236 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1237 1.3.38.2 tron U32 Flags; /* 04h */ 1238 1.3.38.2 tron U32 BiosVersion; /* 08h */ 1239 1.3.38.2 tron MPI_ADAPTER_INFO AdapterOrder[4]; /* 0Ch */ 1240 1.3.38.2 tron } fCONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2, 1241 1.3.38.2 tron IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t; 1242 1.3.38.2 tron 1243 1.3.38.2 tron #define MPI_IOUNITPAGE2_PAGEVERSION (0x00) 1244 1.3.38.2 tron 1245 1.3.38.2 tron #define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR (0x00000002) 1246 1.3.38.2 tron #define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE (0x00000004) 1247 1.3.38.2 tron #define MPI_IOUNITPAGE2_FLAGS_COLOR_VIDEO_DISABLE (0x00000008) 1248 1.3.38.2 tron #define MPI_IOUNITPAGE2_FLAGS_DONT_HOOK_INT_40 (0x00000010) 1249 1.3.38.2 tron 1250 1.3.38.2 tron 1251 1.3.38.2 tron /* 1252 1.3.38.2 tron * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1253 1.3.38.2 tron * one and check Header.PageLength at runtime. 1254 1.3.38.2 tron */ 1255 1.3.38.2 tron #ifndef MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX 1256 1.3.38.2 tron #define MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX (1) 1257 1.3.38.2 tron #endif 1258 1.3.38.2 tron 1259 1.3.38.2 tron typedef struct _CONFIG_PAGE_IO_UNIT_3 1260 1.3.38.2 tron { 1261 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1262 1.3.38.2 tron U8 GPIOCount; /* 04h */ 1263 1.3.38.2 tron U8 Reserved1; /* 05h */ 1264 1.3.38.2 tron U16 Reserved2; /* 06h */ 1265 1.3.38.2 tron U16 GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX]; /* 08h */ 1266 1.3.38.2 tron } fCONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3, 1267 1.3.38.2 tron IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t; 1268 1.3.38.2 tron 1269 1.3.38.2 tron #define MPI_IOUNITPAGE3_PAGEVERSION (0x01) 1270 1.3.38.2 tron 1271 1.3.38.2 tron #define MPI_IOUNITPAGE3_GPIO_FUNCTION_MASK (0xFC) 1272 1.3.38.2 tron #define MPI_IOUNITPAGE3_GPIO_FUNCTION_SHIFT (2) 1273 1.3.38.2 tron #define MPI_IOUNITPAGE3_GPIO_SETTING_OFF (0x00) 1274 1.3.38.2 tron #define MPI_IOUNITPAGE3_GPIO_SETTING_ON (0x01) 1275 1.3.38.2 tron 1276 1.3.38.2 tron 1277 1.3.38.2 tron /**************************************************************************** 1278 1.3.38.2 tron * IOC Config Pages 1279 1.3.38.2 tron ****************************************************************************/ 1280 1.3.38.2 tron 1281 1.3.38.2 tron typedef struct _CONFIG_PAGE_IOC_0 1282 1.3.38.2 tron { 1283 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1284 1.3.38.2 tron U32 TotalNVStore; /* 04h */ 1285 1.3.38.2 tron U32 FreeNVStore; /* 08h */ 1286 1.3.38.2 tron U16 VendorID; /* 0Ch */ 1287 1.3.38.2 tron U16 DeviceID; /* 0Eh */ 1288 1.3.38.2 tron U8 RevisionID; /* 10h */ 1289 1.3.38.2 tron U8 Reserved[3]; /* 11h */ 1290 1.3.38.2 tron U32 ClassCode; /* 14h */ 1291 1.3.38.2 tron U16 SubsystemVendorID; /* 18h */ 1292 1.3.38.2 tron U16 SubsystemID; /* 1Ah */ 1293 1.3.38.2 tron } fCONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0, 1294 1.3.38.2 tron IOCPage0_t, MPI_POINTER pIOCPage0_t; 1295 1.3.38.2 tron 1296 1.3.38.2 tron #define MPI_IOCPAGE0_PAGEVERSION (0x01) 1297 1.3.38.2 tron 1298 1.3.38.2 tron 1299 1.3.38.2 tron typedef struct _CONFIG_PAGE_IOC_1 1300 1.3.38.2 tron { 1301 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1302 1.3.38.2 tron U32 Flags; /* 04h */ 1303 1.3.38.2 tron U32 CoalescingTimeout; /* 08h */ 1304 1.3.38.2 tron U8 CoalescingDepth; /* 0Ch */ 1305 1.3.38.2 tron U8 Reserved[3]; /* 0Dh */ 1306 1.3.38.2 tron } fCONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1, 1307 1.3.38.2 tron IOCPage1_t, MPI_POINTER pIOCPage1_t; 1308 1.3.38.2 tron 1309 1.3.38.2 tron #define MPI_IOCPAGE1_PAGEVERSION (0x00) 1310 1.3.38.2 tron 1311 1.3.38.2 tron #define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001) 1312 1.3.38.2 tron 1313 1.3.38.2 tron 1314 1.3.38.2 tron typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL 1315 1.3.38.2 tron { 1316 1.3.38.2 tron U8 VolumeID; /* 00h */ 1317 1.3.38.2 tron U8 VolumeBus; /* 01h */ 1318 1.3.38.2 tron U8 VolumeIOC; /* 02h */ 1319 1.3.38.2 tron U8 VolumePageNumber; /* 03h */ 1320 1.3.38.2 tron U8 VolumeType; /* 04h */ 1321 1.3.38.2 tron U8 Reserved2; /* 05h */ 1322 1.3.38.2 tron U16 Reserved3; /* 06h */ 1323 1.3.38.2 tron } fCONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL, 1324 1.3.38.2 tron ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t; 1325 1.3.38.2 tron 1326 1.3.38.2 tron /* 1327 1.3.38.2 tron * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1328 1.3.38.2 tron * one and check Header.PageLength at runtime. 1329 1.3.38.2 tron */ 1330 1.3.38.2 tron #ifndef MPI_IOC_PAGE_2_RAID_VOLUME_MAX 1331 1.3.38.2 tron #define MPI_IOC_PAGE_2_RAID_VOLUME_MAX (1) 1332 1.3.38.2 tron #endif 1333 1.3.38.2 tron 1334 1.3.38.2 tron typedef struct _CONFIG_PAGE_IOC_2 1335 1.3.38.2 tron { 1336 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1337 1.3.38.2 tron U32 CapabilitiesFlags; /* 04h */ 1338 1.3.38.2 tron U8 NumActiveVolumes; /* 08h */ 1339 1.3.38.2 tron U8 MaxVolumes; /* 09h */ 1340 1.3.38.2 tron U8 NumActivePhysDisks; /* 0Ah */ 1341 1.3.38.2 tron U8 MaxPhysDisks; /* 0Bh */ 1342 1.3.38.2 tron fCONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];/* 0Ch */ 1343 1.3.38.2 tron } fCONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2, 1344 1.3.38.2 tron IOCPage2_t, MPI_POINTER pIOCPage2_t; 1345 1.3.38.2 tron 1346 1.3.38.2 tron #define MPI_IOCPAGE2_PAGEVERSION (0x01) 1347 1.3.38.2 tron 1348 1.3.38.2 tron /* IOC Page 2 Capabilities flags */ 1349 1.3.38.2 tron 1350 1.3.38.2 tron #define MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT (0x00000001) 1351 1.3.38.2 tron #define MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT (0x00000002) 1352 1.3.38.2 tron #define MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT (0x00000004) 1353 1.3.38.2 tron #define MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT (0x20000000) 1354 1.3.38.2 tron #define MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT (0x40000000) 1355 1.3.38.2 tron #define MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT (0x80000000) 1356 1.3.38.2 tron 1357 1.3.38.2 tron /* IOC Page 2 Volume RAID Type values, also used in RAID Volume pages */ 1358 1.3.38.2 tron 1359 1.3.38.2 tron #define MPI_RAID_VOL_TYPE_IS (0x00) 1360 1.3.38.2 tron #define MPI_RAID_VOL_TYPE_IME (0x01) 1361 1.3.38.2 tron #define MPI_RAID_VOL_TYPE_IM (0x02) 1362 1.3.38.2 tron 1363 1.3.38.2 tron 1364 1.3.38.2 tron typedef struct _IOC_3_PHYS_DISK 1365 1.3.38.2 tron { 1366 1.3.38.2 tron U8 PhysDiskID; /* 00h */ 1367 1.3.38.2 tron U8 PhysDiskBus; /* 01h */ 1368 1.3.38.2 tron U8 PhysDiskIOC; /* 02h */ 1369 1.3.38.2 tron U8 PhysDiskNum; /* 03h */ 1370 1.3.38.2 tron } IOC_3_PHYS_DISK, MPI_POINTER PTR_IOC_3_PHYS_DISK, 1371 1.3.38.2 tron Ioc3PhysDisk_t, MPI_POINTER pIoc3PhysDisk_t; 1372 1.3.38.2 tron 1373 1.3.38.2 tron /* 1374 1.3.38.2 tron * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1375 1.3.38.2 tron * one and check Header.PageLength at runtime. 1376 1.3.38.2 tron */ 1377 1.3.38.2 tron #ifndef MPI_IOC_PAGE_3_PHYSDISK_MAX 1378 1.3.38.2 tron #define MPI_IOC_PAGE_3_PHYSDISK_MAX (1) 1379 1.3.38.2 tron #endif 1380 1.3.38.2 tron 1381 1.3.38.2 tron typedef struct _CONFIG_PAGE_IOC_3 1382 1.3.38.2 tron { 1383 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1384 1.3.38.2 tron U8 NumPhysDisks; /* 04h */ 1385 1.3.38.2 tron U8 Reserved1; /* 05h */ 1386 1.3.38.2 tron U16 Reserved2; /* 06h */ 1387 1.3.38.2 tron IOC_3_PHYS_DISK PhysDisk[MPI_IOC_PAGE_3_PHYSDISK_MAX]; /* 08h */ 1388 1.3.38.2 tron } fCONFIG_PAGE_IOC_3, MPI_POINTER PTR_CONFIG_PAGE_IOC_3, 1389 1.3.38.2 tron IOCPage3_t, MPI_POINTER pIOCPage3_t; 1390 1.3.38.2 tron 1391 1.3.38.2 tron #define MPI_IOCPAGE3_PAGEVERSION (0x00) 1392 1.3.38.2 tron 1393 1.3.38.2 tron 1394 1.3.38.2 tron typedef struct _IOC_4_SEP 1395 1.3.38.2 tron { 1396 1.3.38.2 tron U8 SEPTargetID; /* 00h */ 1397 1.3.38.2 tron U8 SEPBus; /* 01h */ 1398 1.3.38.2 tron U16 Reserved; /* 02h */ 1399 1.3.38.2 tron } IOC_4_SEP, MPI_POINTER PTR_IOC_4_SEP, 1400 1.3.38.2 tron Ioc4Sep_t, MPI_POINTER pIoc4Sep_t; 1401 1.3.38.2 tron 1402 1.3.38.2 tron /* 1403 1.3.38.2 tron * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1404 1.3.38.2 tron * one and check Header.PageLength at runtime. 1405 1.3.38.2 tron */ 1406 1.3.38.2 tron #ifndef MPI_IOC_PAGE_4_SEP_MAX 1407 1.3.38.2 tron #define MPI_IOC_PAGE_4_SEP_MAX (1) 1408 1.3.38.2 tron #endif 1409 1.3.38.2 tron 1410 1.3.38.2 tron typedef struct _CONFIG_PAGE_IOC_4 1411 1.3.38.2 tron { 1412 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1413 1.3.38.2 tron U8 ActiveSEP; /* 04h */ 1414 1.3.38.2 tron U8 MaxSEP; /* 05h */ 1415 1.3.38.2 tron U16 Reserved1; /* 06h */ 1416 1.3.38.2 tron IOC_4_SEP SEP[MPI_IOC_PAGE_4_SEP_MAX]; /* 08h */ 1417 1.3.38.2 tron } fCONFIG_PAGE_IOC_4, MPI_POINTER PTR_CONFIG_PAGE_IOC_4, 1418 1.3.38.2 tron IOCPage4_t, MPI_POINTER pIOCPage4_t; 1419 1.3.38.2 tron 1420 1.3.38.2 tron #define MPI_IOCPAGE4_PAGEVERSION (0x00) 1421 1.3.38.2 tron 1422 1.3.38.2 tron 1423 1.3.38.2 tron /**************************************************************************** 1424 1.3.38.2 tron * SCSI Port Config Pages 1425 1.3.38.2 tron ****************************************************************************/ 1426 1.3.38.2 tron 1427 1.3.38.2 tron typedef struct _CONFIG_PAGE_SCSI_PORT_0 1428 1.3.38.2 tron { 1429 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1430 1.3.38.2 tron U32 Capabilities; /* 04h */ 1431 1.3.38.2 tron U32 PhysicalInterface; /* 08h */ 1432 1.3.38.2 tron } fCONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0, 1433 1.3.38.2 tron SCSIPortPage0_t, MPI_POINTER pSCSIPortPage0_t; 1434 1.3.38.2 tron 1435 1.3.38.2 tron #define MPI_SCSIPORTPAGE0_PAGEVERSION (0x01) 1436 1.3.38.2 tron 1437 1.3.38.2 tron #define MPI_SCSIPORTPAGE0_CAP_IU (0x00000001) 1438 1.3.38.2 tron #define MPI_SCSIPORTPAGE0_CAP_DT (0x00000002) 1439 1.3.38.2 tron #define MPI_SCSIPORTPAGE0_CAP_QAS (0x00000004) 1440 1.3.38.2 tron #define MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK (0x0000FF00) 1441 1.3.38.2 tron #define MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK (0x00FF0000) 1442 1.3.38.2 tron #define MPI_SCSIPORTPAGE0_CAP_WIDE (0x20000000) 1443 1.3.38.2 tron #define MPI_SCSIPORTPAGE0_CAP_AIP (0x80000000) 1444 1.3.38.2 tron 1445 1.3.38.2 tron #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK (0x00000003) 1446 1.3.38.2 tron #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD (0x01) 1447 1.3.38.2 tron #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE (0x02) 1448 1.3.38.2 tron #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_LVD (0x03) 1449 1.3.38.2 tron 1450 1.3.38.2 tron 1451 1.3.38.2 tron typedef struct _CONFIG_PAGE_SCSI_PORT_1 1452 1.3.38.2 tron { 1453 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1454 1.3.38.2 tron U32 Configuration; /* 04h */ 1455 1.3.38.2 tron U32 OnBusTimerValue; /* 08h */ 1456 1.3.38.2 tron } fCONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1, 1457 1.3.38.2 tron SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t; 1458 1.3.38.2 tron 1459 1.3.38.2 tron #define MPI_SCSIPORTPAGE1_PAGEVERSION (0x02) 1460 1.3.38.2 tron 1461 1.3.38.2 tron #define MPI_SCSIPORTPAGE1_CFG_PORT_SCSI_ID_MASK (0x000000FF) 1462 1.3.38.2 tron #define MPI_SCSIPORTPAGE1_CFG_PORT_RESPONSE_ID_MASK (0xFFFF0000) 1463 1.3.38.2 tron 1464 1.3.38.2 tron 1465 1.3.38.2 tron typedef struct _MPI_DEVICE_INFO 1466 1.3.38.2 tron { 1467 1.3.38.2 tron U8 Timeout; /* 00h */ 1468 1.3.38.2 tron U8 SyncFactor; /* 01h */ 1469 1.3.38.2 tron U16 DeviceFlags; /* 02h */ 1470 1.3.38.2 tron } MPI_DEVICE_INFO, MPI_POINTER PTR_MPI_DEVICE_INFO, 1471 1.3.38.2 tron MpiDeviceInfo_t, MPI_POINTER pMpiDeviceInfo_t; 1472 1.3.38.2 tron 1473 1.3.38.2 tron typedef struct _CONFIG_PAGE_SCSI_PORT_2 1474 1.3.38.2 tron { 1475 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1476 1.3.38.2 tron U32 PortFlags; /* 04h */ 1477 1.3.38.2 tron U32 PortSettings; /* 08h */ 1478 1.3.38.2 tron MPI_DEVICE_INFO DeviceSettings[16]; /* 0Ch */ 1479 1.3.38.2 tron } fCONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2, 1480 1.3.38.2 tron SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t; 1481 1.3.38.2 tron 1482 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PAGEVERSION (0x01) 1483 1.3.38.2 tron 1484 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_FLAGS_SCAN_HIGH_TO_LOW (0x00000001) 1485 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET (0x00000004) 1486 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_FLAGS_ALTERNATE_CHS (0x00000008) 1487 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_FLAGS_TERMINATION_DISABLE (0x00000010) 1488 1.3.38.2 tron 1489 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_HOST_ID_MASK (0x0000000F) 1490 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_MASK_INIT_HBA (0x00000030) 1491 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_DISABLE_INIT_HBA (0x00000000) 1492 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_BIOS_INIT_HBA (0x00000010) 1493 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_OS_INIT_HBA (0x00000020) 1494 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_BIOS_OS_INIT_HBA (0x00000030) 1495 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_REMOVABLE_MEDIA (0x000000C0) 1496 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_SPINUP_DELAY_MASK (0x00000F00) 1497 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_MASK_NEGO_MASTER_SETTINGS (0x00003000) 1498 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_NEGO_MASTER_SETTINGS (0x00000000) 1499 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_NONE_MASTER_SETTINGS (0x00001000) 1500 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_PORT_ALL_MASTER_SETTINGS (0x00003000) 1501 1.3.38.2 tron 1502 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE (0x0001) 1503 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE (0x0002) 1504 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE (0x0004) 1505 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE (0x0008) 1506 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE (0x0010) 1507 1.3.38.2 tron #define MPI_SCSIPORTPAGE2_DEVICE_BOOT_CHOICE (0x0020) 1508 1.3.38.2 tron 1509 1.3.38.2 tron 1510 1.3.38.2 tron /**************************************************************************** 1511 1.3.38.2 tron * SCSI Target Device Config Pages 1512 1.3.38.2 tron ****************************************************************************/ 1513 1.3.38.2 tron 1514 1.3.38.2 tron typedef struct _CONFIG_PAGE_SCSI_DEVICE_0 1515 1.3.38.2 tron { 1516 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1517 1.3.38.2 tron U32 NegotiatedParameters; /* 04h */ 1518 1.3.38.2 tron U32 Information; /* 08h */ 1519 1.3.38.2 tron } fCONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0, 1520 1.3.38.2 tron SCSIDevicePage0_t, MPI_POINTER pSCSIDevicePage0_t; 1521 1.3.38.2 tron 1522 1.3.38.2 tron #define MPI_SCSIDEVPAGE0_PAGEVERSION (0x02) 1523 1.3.38.2 tron 1524 1.3.38.2 tron #define MPI_SCSIDEVPAGE0_NP_IU (0x00000001) 1525 1.3.38.2 tron #define MPI_SCSIDEVPAGE0_NP_DT (0x00000002) 1526 1.3.38.2 tron #define MPI_SCSIDEVPAGE0_NP_QAS (0x00000004) 1527 1.3.38.2 tron #define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_PERIOD_MASK (0x0000FF00) 1528 1.3.38.2 tron #define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_OFFSET_MASK (0x00FF0000) 1529 1.3.38.2 tron #define MPI_SCSIDEVPAGE0_NP_WIDE (0x20000000) 1530 1.3.38.2 tron #define MPI_SCSIDEVPAGE0_NP_AIP (0x80000000) 1531 1.3.38.2 tron 1532 1.3.38.2 tron #define MPI_SCSIDEVPAGE0_INFO_PARAMS_NEGOTIATED (0x00000001) 1533 1.3.38.2 tron #define MPI_SCSIDEVPAGE0_INFO_SDTR_REJECTED (0x00000002) 1534 1.3.38.2 tron #define MPI_SCSIDEVPAGE0_INFO_WDTR_REJECTED (0x00000004) 1535 1.3.38.2 tron #define MPI_SCSIDEVPAGE0_INFO_PPR_REJECTED (0x00000008) 1536 1.3.38.2 tron 1537 1.3.38.2 tron 1538 1.3.38.2 tron typedef struct _CONFIG_PAGE_SCSI_DEVICE_1 1539 1.3.38.2 tron { 1540 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1541 1.3.38.2 tron U32 RequestedParameters; /* 04h */ 1542 1.3.38.2 tron U32 Reserved; /* 08h */ 1543 1.3.38.2 tron U32 Configuration; /* 0Ch */ 1544 1.3.38.2 tron } fCONFIG_PAGE_SCSI_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_1, 1545 1.3.38.2 tron SCSIDevicePage1_t, MPI_POINTER pSCSIDevicePage1_t; 1546 1.3.38.2 tron 1547 1.3.38.2 tron #define MPI_SCSIDEVPAGE1_PAGEVERSION (0x03) 1548 1.3.38.2 tron 1549 1.3.38.2 tron #define MPI_SCSIDEVPAGE1_RP_IU (0x00000001) 1550 1.3.38.2 tron #define MPI_SCSIDEVPAGE1_RP_DT (0x00000002) 1551 1.3.38.2 tron #define MPI_SCSIDEVPAGE1_RP_QAS (0x00000004) 1552 1.3.38.2 tron #define MPI_SCSIDEVPAGE1_RP_MIN_SYNC_PERIOD_MASK (0x0000FF00) 1553 1.3.38.2 tron #define MPI_SCSIDEVPAGE1_RP_MAX_SYNC_OFFSET_MASK (0x00FF0000) 1554 1.3.38.2 tron #define MPI_SCSIDEVPAGE1_RP_WIDE (0x20000000) 1555 1.3.38.2 tron #define MPI_SCSIDEVPAGE1_RP_AIP (0x80000000) 1556 1.3.38.2 tron 1557 1.3.38.2 tron #define MPI_SCSIDEVPAGE1_DV_LVD_DRIVE_STRENGTH_MASK (0x00000003) 1558 1.3.38.2 tron #define MPI_SCSIDEVPAGE1_DV_SE_SLEW_RATE_MASK (0x00000300) 1559 1.3.38.2 tron 1560 1.3.38.2 tron #define MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED (0x00000002) 1561 1.3.38.2 tron #define MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED (0x00000004) 1562 1.3.38.2 tron 1563 1.3.38.2 tron 1564 1.3.38.2 tron typedef struct _CONFIG_PAGE_SCSI_DEVICE_2 1565 1.3.38.2 tron { 1566 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1567 1.3.38.2 tron U32 DomainValidation; /* 04h */ 1568 1.3.38.2 tron U32 ParityPipeSelect; /* 08h */ 1569 1.3.38.2 tron U32 DataPipeSelect; /* 0Ch */ 1570 1.3.38.2 tron } fCONFIG_PAGE_SCSI_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_2, 1571 1.3.38.2 tron SCSIDevicePage2_t, MPI_POINTER pSCSIDevicePage2_t; 1572 1.3.38.2 tron 1573 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_PAGEVERSION (0x00) 1574 1.3.38.2 tron 1575 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DV_ISI_ENABLE (0x00000010) 1576 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DV_SECONDARY_DRIVER_ENABLE (0x00000020) 1577 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DV_SLEW_RATE_CTRL (0x00000380) 1578 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DV_PRIM_DRIVE_STR_CTRL (0x00001C00) 1579 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DV_SECOND_DRIVE_STR_CTRL (0x0000E000) 1580 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DV_XCLKH_ST (0x10000000) 1581 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DV_XCLKS_ST (0x20000000) 1582 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DV_XCLKH_DT (0x40000000) 1583 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DV_XCLKS_DT (0x80000000) 1584 1.3.38.2 tron 1585 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_PPS_PPS_MASK (0x00000003) 1586 1.3.38.2 tron 1587 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_0_PL_SELECT_MASK (0x00000003) 1588 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_1_PL_SELECT_MASK (0x0000000C) 1589 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_2_PL_SELECT_MASK (0x00000030) 1590 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_3_PL_SELECT_MASK (0x000000C0) 1591 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_4_PL_SELECT_MASK (0x00000300) 1592 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_5_PL_SELECT_MASK (0x00000C00) 1593 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_6_PL_SELECT_MASK (0x00003000) 1594 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_7_PL_SELECT_MASK (0x0000C000) 1595 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_8_PL_SELECT_MASK (0x00030000) 1596 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_9_PL_SELECT_MASK (0x000C0000) 1597 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_10_PL_SELECT_MASK (0x00300000) 1598 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_11_PL_SELECT_MASK (0x00C00000) 1599 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_12_PL_SELECT_MASK (0x03000000) 1600 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_13_PL_SELECT_MASK (0x0C000000) 1601 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_14_PL_SELECT_MASK (0x30000000) 1602 1.3.38.2 tron #define MPI_SCSIDEVPAGE2_DPS_BIT_15_PL_SELECT_MASK (0xC0000000) 1603 1.3.38.2 tron 1604 1.3.38.2 tron 1605 1.3.38.2 tron /**************************************************************************** 1606 1.3.38.2 tron * FC Port Config Pages 1607 1.3.38.2 tron ****************************************************************************/ 1608 1.3.38.2 tron 1609 1.3.38.2 tron typedef struct _CONFIG_PAGE_FC_PORT_0 1610 1.3.38.2 tron { 1611 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1612 1.3.38.2 tron U32 Flags; /* 04h */ 1613 1.3.38.2 tron U8 MPIPortNumber; /* 08h */ 1614 1.3.38.2 tron U8 LinkType; /* 09h */ 1615 1.3.38.2 tron U8 PortState; /* 0Ah */ 1616 1.3.38.2 tron U8 Reserved; /* 0Bh */ 1617 1.3.38.2 tron U32 PortIdentifier; /* 0Ch */ 1618 1.3.38.2 tron U64 WWNN; /* 10h */ 1619 1.3.38.2 tron U64 WWPN; /* 18h */ 1620 1.3.38.2 tron U32 SupportedServiceClass; /* 20h */ 1621 1.3.38.2 tron U32 SupportedSpeeds; /* 24h */ 1622 1.3.38.2 tron U32 CurrentSpeed; /* 28h */ 1623 1.3.38.2 tron U32 MaxFrameSize; /* 2Ch */ 1624 1.3.38.2 tron U64 FabricWWNN; /* 30h */ 1625 1.3.38.2 tron U64 FabricWWPN; /* 38h */ 1626 1.3.38.2 tron U32 DiscoveredPortsCount; /* 40h */ 1627 1.3.38.2 tron U32 MaxInitiators; /* 44h */ 1628 1.3.38.2 tron } fCONFIG_PAGE_FC_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_0, 1629 1.3.38.2 tron FCPortPage0_t, MPI_POINTER pFCPortPage0_t; 1630 1.3.38.2 tron 1631 1.3.38.2 tron #define MPI_FCPORTPAGE0_PAGEVERSION (0x01) 1632 1.3.38.2 tron 1633 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_PROT_MASK (0x0000000F) 1634 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_INIT (MPI_PORTFACTS_PROTOCOL_INITIATOR) 1635 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_TARG (MPI_PORTFACTS_PROTOCOL_TARGET) 1636 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_PROT_LAN (MPI_PORTFACTS_PROTOCOL_LAN) 1637 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_PROT_LOGBUSADDR (MPI_PORTFACTS_PROTOCOL_LOGBUSADDR) 1638 1.3.38.2 tron 1639 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_ALIAS_ALPA_SUPPORTED (0x00000010) 1640 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_ALIAS_WWN_SUPPORTED (0x00000020) 1641 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_FABRIC_WWN_VALID (0x00000030) 1642 1.3.38.2 tron 1643 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_ATTACH_TYPE_MASK (0x00000F00) 1644 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_ATTACH_NO_INIT (0x00000000) 1645 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_ATTACH_POINT_TO_POINT (0x00000100) 1646 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_ATTACH_PRIVATE_LOOP (0x00000200) 1647 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_ATTACH_FABRIC_DIRECT (0x00000400) 1648 1.3.38.2 tron #define MPI_FCPORTPAGE0_FLAGS_ATTACH_PUBLIC_LOOP (0x00000800) 1649 1.3.38.2 tron 1650 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_RESERVED (0x00) 1651 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_OTHER (0x01) 1652 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_UNKNOWN (0x02) 1653 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_COPPER (0x03) 1654 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_SINGLE_1300 (0x04) 1655 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_SINGLE_1500 (0x05) 1656 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_50_LASER_MULTI (0x06) 1657 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_50_LED_MULTI (0x07) 1658 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_62_LASER_MULTI (0x08) 1659 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_62_LED_MULTI (0x09) 1660 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_MULTI_LONG_WAVE (0x0A) 1661 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_MULTI_SHORT_WAVE (0x0B) 1662 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_LASER_SHORT_WAVE (0x0C) 1663 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_LED_SHORT_WAVE (0x0D) 1664 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_1300_LONG_WAVE (0x0E) 1665 1.3.38.2 tron #define MPI_FCPORTPAGE0_LTYPE_1500_LONG_WAVE (0x0F) 1666 1.3.38.2 tron 1667 1.3.38.2 tron #define MPI_FCPORTPAGE0_PORTSTATE_UNKNOWN (0x01) /*(SNIA)HBA_PORTSTATE_UNKNOWN 1 Unknown */ 1668 1.3.38.2 tron #define MPI_FCPORTPAGE0_PORTSTATE_ONLINE (0x02) /*(SNIA)HBA_PORTSTATE_ONLINE 2 Operational */ 1669 1.3.38.2 tron #define MPI_FCPORTPAGE0_PORTSTATE_OFFLINE (0x03) /*(SNIA)HBA_PORTSTATE_OFFLINE 3 User Offline */ 1670 1.3.38.2 tron #define MPI_FCPORTPAGE0_PORTSTATE_BYPASSED (0x04) /*(SNIA)HBA_PORTSTATE_BYPASSED 4 Bypassed */ 1671 1.3.38.2 tron #define MPI_FCPORTPAGE0_PORTSTATE_DIAGNOST (0x05) /*(SNIA)HBA_PORTSTATE_DIAGNOSTICS 5 In diagnostics mode */ 1672 1.3.38.2 tron #define MPI_FCPORTPAGE0_PORTSTATE_LINKDOWN (0x06) /*(SNIA)HBA_PORTSTATE_LINKDOWN 6 Link Down */ 1673 1.3.38.2 tron #define MPI_FCPORTPAGE0_PORTSTATE_ERROR (0x07) /*(SNIA)HBA_PORTSTATE_ERROR 7 Port Error */ 1674 1.3.38.2 tron #define MPI_FCPORTPAGE0_PORTSTATE_LOOPBACK (0x08) /*(SNIA)HBA_PORTSTATE_LOOPBACK 8 Loopback */ 1675 1.3.38.2 tron 1676 1.3.38.2 tron #define MPI_FCPORTPAGE0_SUPPORT_CLASS_1 (0x00000001) 1677 1.3.38.2 tron #define MPI_FCPORTPAGE0_SUPPORT_CLASS_2 (0x00000002) 1678 1.3.38.2 tron #define MPI_FCPORTPAGE0_SUPPORT_CLASS_3 (0x00000004) 1679 1.3.38.2 tron 1680 1.3.38.2 tron #define MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED (0x00000001) /* (SNIA)HBA_PORTSPEED_1GBIT 1 1 GBit/sec */ 1681 1.3.38.2 tron #define MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED (0x00000002) /* (SNIA)HBA_PORTSPEED_2GBIT 2 2 GBit/sec */ 1682 1.3.38.2 tron #define MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED (0x00000004) /* (SNIA)HBA_PORTSPEED_10GBIT 4 10 GBit/sec */ 1683 1.3.38.2 tron 1684 1.3.38.2 tron #define MPI_FCPORTPAGE0_CURRENT_SPEED_1GBIT MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED 1685 1.3.38.2 tron #define MPI_FCPORTPAGE0_CURRENT_SPEED_2GBIT MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED 1686 1.3.38.2 tron #define MPI_FCPORTPAGE0_CURRENT_SPEED_10GBIT MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED 1687 1.3.38.2 tron 1688 1.3.38.2 tron 1689 1.3.38.2 tron typedef struct _CONFIG_PAGE_FC_PORT_1 1690 1.3.38.2 tron { 1691 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1692 1.3.38.2 tron U32 Flags; /* 04h */ 1693 1.3.38.2 tron U64 NoSEEPROMWWNN; /* 08h */ 1694 1.3.38.2 tron U64 NoSEEPROMWWPN; /* 10h */ 1695 1.3.38.2 tron U8 HardALPA; /* 18h */ 1696 1.3.38.2 tron U8 LinkConfig; /* 19h */ 1697 1.3.38.2 tron U8 TopologyConfig; /* 1Ah */ 1698 1.3.38.2 tron U8 Reserved; /* 1Bh */ 1699 1.3.38.2 tron } fCONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1, 1700 1.3.38.2 tron FCPortPage1_t, MPI_POINTER pFCPortPage1_t; 1701 1.3.38.2 tron 1702 1.3.38.2 tron #define MPI_FCPORTPAGE1_PAGEVERSION (0x02) 1703 1.3.38.2 tron 1704 1.3.38.2 tron #define MPI_FCPORTPAGE1_FLAGS_EXT_FCP_STATUS_EN (0x08000000) 1705 1.3.38.2 tron #define MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY (0x04000000) 1706 1.3.38.2 tron #define MPI_FCPORTPAGE1_FLAGS_SORT_BY_DID (0x00000001) 1707 1.3.38.2 tron #define MPI_FCPORTPAGE1_FLAGS_SORT_BY_WWN (0x00000000) 1708 1.3.38.2 tron 1709 1.3.38.2 tron #define MPI_FCPORTPAGE1_FLAGS_PROT_MASK (0xF0000000) 1710 1.3.38.2 tron #define MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT (28) 1711 1.3.38.2 tron #define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_INIT ((U32)MPI_PORTFACTS_PROTOCOL_INITIATOR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT) 1712 1.3.38.2 tron #define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_TARG ((U32)MPI_PORTFACTS_PROTOCOL_TARGET << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT) 1713 1.3.38.2 tron #define MPI_FCPORTPAGE1_FLAGS_PROT_LAN ((U32)MPI_PORTFACTS_PROTOCOL_LAN << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT) 1714 1.3.38.2 tron #define MPI_FCPORTPAGE1_FLAGS_PROT_LOGBUSADDR ((U32)MPI_PORTFACTS_PROTOCOL_LOGBUSADDR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT) 1715 1.3.38.2 tron 1716 1.3.38.2 tron #define MPI_FCPORTPAGE1_HARD_ALPA_NOT_USED (0xFF) 1717 1.3.38.2 tron 1718 1.3.38.2 tron #define MPI_FCPORTPAGE1_LCONFIG_SPEED_MASK (0x0F) 1719 1.3.38.2 tron #define MPI_FCPORTPAGE1_LCONFIG_SPEED_1GIG (0x00) 1720 1.3.38.2 tron #define MPI_FCPORTPAGE1_LCONFIG_SPEED_2GIG (0x01) 1721 1.3.38.2 tron #define MPI_FCPORTPAGE1_LCONFIG_SPEED_4GIG (0x02) 1722 1.3.38.2 tron #define MPI_FCPORTPAGE1_LCONFIG_SPEED_10GIG (0x03) 1723 1.3.38.2 tron #define MPI_FCPORTPAGE1_LCONFIG_SPEED_AUTO (0x0F) 1724 1.3.38.2 tron 1725 1.3.38.2 tron #define MPI_FCPORTPAGE1_TOPOLOGY_MASK (0x0F) 1726 1.3.38.2 tron #define MPI_FCPORTPAGE1_TOPOLOGY_NLPORT (0x01) 1727 1.3.38.2 tron #define MPI_FCPORTPAGE1_TOPOLOGY_NPORT (0x02) 1728 1.3.38.2 tron #define MPI_FCPORTPAGE1_TOPOLOGY_AUTO (0x0F) 1729 1.3.38.2 tron 1730 1.3.38.2 tron 1731 1.3.38.2 tron typedef struct _CONFIG_PAGE_FC_PORT_2 1732 1.3.38.2 tron { 1733 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1734 1.3.38.2 tron U8 NumberActive; /* 04h */ 1735 1.3.38.2 tron U8 ALPA[127]; /* 05h */ 1736 1.3.38.2 tron } fCONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2, 1737 1.3.38.2 tron FCPortPage2_t, MPI_POINTER pFCPortPage2_t; 1738 1.3.38.2 tron 1739 1.3.38.2 tron #define MPI_FCPORTPAGE2_PAGEVERSION (0x01) 1740 1.3.38.2 tron 1741 1.3.38.2 tron 1742 1.3.38.2 tron typedef struct _WWN_FORMAT 1743 1.3.38.2 tron { 1744 1.3.38.2 tron U64 WWNN; /* 00h */ 1745 1.3.38.2 tron U64 WWPN; /* 08h */ 1746 1.3.38.2 tron } WWN_FORMAT, MPI_POINTER PTR_WWN_FORMAT, 1747 1.3.38.2 tron WWNFormat, MPI_POINTER pWWNFormat; 1748 1.3.38.2 tron 1749 1.3.38.2 tron typedef union _FC_PORT_PERSISTENT_PHYSICAL_ID 1750 1.3.38.2 tron { 1751 1.3.38.2 tron WWN_FORMAT WWN; 1752 1.3.38.2 tron U32 Did; 1753 1.3.38.2 tron } FC_PORT_PERSISTENT_PHYSICAL_ID, MPI_POINTER PTR_FC_PORT_PERSISTENT_PHYSICAL_ID, 1754 1.3.38.2 tron PersistentPhysicalId_t, MPI_POINTER pPersistentPhysicalId_t; 1755 1.3.38.2 tron 1756 1.3.38.2 tron typedef struct _FC_PORT_PERSISTENT 1757 1.3.38.2 tron { 1758 1.3.38.2 tron FC_PORT_PERSISTENT_PHYSICAL_ID PhysicalIdentifier; /* 00h */ 1759 1.3.38.2 tron U8 TargetID; /* 10h */ 1760 1.3.38.2 tron U8 Bus; /* 11h */ 1761 1.3.38.2 tron U16 Flags; /* 12h */ 1762 1.3.38.2 tron } FC_PORT_PERSISTENT, MPI_POINTER PTR_FC_PORT_PERSISTENT, 1763 1.3.38.2 tron PersistentData_t, MPI_POINTER pPersistentData_t; 1764 1.3.38.2 tron 1765 1.3.38.2 tron #define MPI_PERSISTENT_FLAGS_SHIFT (16) 1766 1.3.38.2 tron #define MPI_PERSISTENT_FLAGS_ENTRY_VALID (0x0001) 1767 1.3.38.2 tron #define MPI_PERSISTENT_FLAGS_SCAN_ID (0x0002) 1768 1.3.38.2 tron #define MPI_PERSISTENT_FLAGS_SCAN_LUNS (0x0004) 1769 1.3.38.2 tron #define MPI_PERSISTENT_FLAGS_BOOT_DEVICE (0x0008) 1770 1.3.38.2 tron #define MPI_PERSISTENT_FLAGS_BY_DID (0x0080) 1771 1.3.38.2 tron 1772 1.3.38.2 tron /* 1773 1.3.38.2 tron * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1774 1.3.38.2 tron * one and check Header.PageLength at runtime. 1775 1.3.38.2 tron */ 1776 1.3.38.2 tron #ifndef MPI_FC_PORT_PAGE_3_ENTRY_MAX 1777 1.3.38.2 tron #define MPI_FC_PORT_PAGE_3_ENTRY_MAX (1) 1778 1.3.38.2 tron #endif 1779 1.3.38.2 tron 1780 1.3.38.2 tron typedef struct _CONFIG_PAGE_FC_PORT_3 1781 1.3.38.2 tron { 1782 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1783 1.3.38.2 tron FC_PORT_PERSISTENT Entry[MPI_FC_PORT_PAGE_3_ENTRY_MAX]; /* 04h */ 1784 1.3.38.2 tron } fCONFIG_PAGE_FC_PORT_3, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_3, 1785 1.3.38.2 tron FCPortPage3_t, MPI_POINTER pFCPortPage3_t; 1786 1.3.38.2 tron 1787 1.3.38.2 tron #define MPI_FCPORTPAGE3_PAGEVERSION (0x01) 1788 1.3.38.2 tron 1789 1.3.38.2 tron 1790 1.3.38.2 tron typedef struct _CONFIG_PAGE_FC_PORT_4 1791 1.3.38.2 tron { 1792 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1793 1.3.38.2 tron U32 PortFlags; /* 04h */ 1794 1.3.38.2 tron U32 PortSettings; /* 08h */ 1795 1.3.38.2 tron } fCONFIG_PAGE_FC_PORT_4, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_4, 1796 1.3.38.2 tron FCPortPage4_t, MPI_POINTER pFCPortPage4_t; 1797 1.3.38.2 tron 1798 1.3.38.2 tron #define MPI_FCPORTPAGE4_PAGEVERSION (0x00) 1799 1.3.38.2 tron 1800 1.3.38.2 tron #define MPI_FCPORTPAGE4_PORT_FLAGS_ALTERNATE_CHS (0x00000008) 1801 1.3.38.2 tron 1802 1.3.38.2 tron #define MPI_FCPORTPAGE4_PORT_MASK_INIT_HBA (0x00000030) 1803 1.3.38.2 tron #define MPI_FCPORTPAGE4_PORT_DISABLE_INIT_HBA (0x00000000) 1804 1.3.38.2 tron #define MPI_FCPORTPAGE4_PORT_BIOS_INIT_HBA (0x00000010) 1805 1.3.38.2 tron #define MPI_FCPORTPAGE4_PORT_OS_INIT_HBA (0x00000020) 1806 1.3.38.2 tron #define MPI_FCPORTPAGE4_PORT_BIOS_OS_INIT_HBA (0x00000030) 1807 1.3.38.2 tron #define MPI_FCPORTPAGE4_PORT_REMOVABLE_MEDIA (0x000000C0) 1808 1.3.38.2 tron #define MPI_FCPORTPAGE4_PORT_SPINUP_DELAY_MASK (0x00000F00) 1809 1.3.38.2 tron 1810 1.3.38.2 tron 1811 1.3.38.2 tron typedef struct _CONFIG_PAGE_FC_PORT_5_ALIAS_INFO 1812 1.3.38.2 tron { 1813 1.3.38.2 tron U8 Flags; /* 00h */ 1814 1.3.38.2 tron U8 AliasAlpa; /* 01h */ 1815 1.3.38.2 tron U16 Reserved; /* 02h */ 1816 1.3.38.2 tron U64 AliasWWNN; /* 04h */ 1817 1.3.38.2 tron U64 AliasWWPN; /* 0Ch */ 1818 1.3.38.2 tron } fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO, 1819 1.3.38.2 tron MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5_ALIAS_INFO, 1820 1.3.38.2 tron FcPortPage5AliasInfo_t, MPI_POINTER pFcPortPage5AliasInfo_t; 1821 1.3.38.2 tron 1822 1.3.38.2 tron /* 1823 1.3.38.2 tron * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1824 1.3.38.2 tron * one and check Header.PageLength at runtime. 1825 1.3.38.2 tron */ 1826 1.3.38.2 tron #ifndef MPI_FC_PORT_PAGE_5_ALIAS_MAX 1827 1.3.38.2 tron #define MPI_FC_PORT_PAGE_5_ALIAS_MAX (1) 1828 1.3.38.2 tron #endif 1829 1.3.38.2 tron 1830 1.3.38.2 tron typedef struct _CONFIG_PAGE_FC_PORT_5 1831 1.3.38.2 tron { 1832 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1833 1.3.38.2 tron fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO AliasInfo[MPI_FC_PORT_PAGE_5_ALIAS_MAX];/* 04h */ 1834 1.3.38.2 tron } fCONFIG_PAGE_FC_PORT_5, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5, 1835 1.3.38.2 tron FCPortPage5_t, MPI_POINTER pFCPortPage5_t; 1836 1.3.38.2 tron 1837 1.3.38.2 tron #define MPI_FCPORTPAGE5_PAGEVERSION (0x00) 1838 1.3.38.2 tron 1839 1.3.38.2 tron #define MPI_FCPORTPAGE5_FLAGS_ALIAS_ALPA_VALID (0x01) 1840 1.3.38.2 tron #define MPI_FCPORTPAGE5_FLAGS_ALIAS_WWN_VALID (0x02) 1841 1.3.38.2 tron 1842 1.3.38.2 tron 1843 1.3.38.2 tron typedef struct _CONFIG_PAGE_FC_PORT_6 1844 1.3.38.2 tron { 1845 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1846 1.3.38.2 tron U32 Reserved; /* 04h */ 1847 1.3.38.2 tron U64 TimeSinceReset; /* 08h */ 1848 1.3.38.2 tron U64 TxFrames; /* 10h */ 1849 1.3.38.2 tron U64 RxFrames; /* 18h */ 1850 1.3.38.2 tron U64 TxWords; /* 20h */ 1851 1.3.38.2 tron U64 RxWords; /* 28h */ 1852 1.3.38.2 tron U64 LipCount; /* 30h */ 1853 1.3.38.2 tron U64 NosCount; /* 38h */ 1854 1.3.38.2 tron U64 ErrorFrames; /* 40h */ 1855 1.3.38.2 tron U64 DumpedFrames; /* 48h */ 1856 1.3.38.2 tron U64 LinkFailureCount; /* 50h */ 1857 1.3.38.2 tron U64 LossOfSyncCount; /* 58h */ 1858 1.3.38.2 tron U64 LossOfSignalCount; /* 60h */ 1859 1.3.38.2 tron U64 PrimativeSeqErrCount; /* 68h */ 1860 1.3.38.2 tron U64 InvalidTxWordCount; /* 70h */ 1861 1.3.38.2 tron U64 InvalidCrcCount; /* 78h */ 1862 1.3.38.2 tron U64 FcpInitiatorIoCount; /* 80h */ 1863 1.3.38.2 tron } fCONFIG_PAGE_FC_PORT_6, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_6, 1864 1.3.38.2 tron FCPortPage6_t, MPI_POINTER pFCPortPage6_t; 1865 1.3.38.2 tron 1866 1.3.38.2 tron #define MPI_FCPORTPAGE6_PAGEVERSION (0x00) 1867 1.3.38.2 tron 1868 1.3.38.2 tron 1869 1.3.38.2 tron typedef struct _CONFIG_PAGE_FC_PORT_7 1870 1.3.38.2 tron { 1871 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1872 1.3.38.2 tron U32 Reserved; /* 04h */ 1873 1.3.38.2 tron U8 PortSymbolicName[256]; /* 08h */ 1874 1.3.38.2 tron } fCONFIG_PAGE_FC_PORT_7, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_7, 1875 1.3.38.2 tron FCPortPage7_t, MPI_POINTER pFCPortPage7_t; 1876 1.3.38.2 tron 1877 1.3.38.2 tron #define MPI_FCPORTPAGE7_PAGEVERSION (0x00) 1878 1.3.38.2 tron 1879 1.3.38.2 tron 1880 1.3.38.2 tron typedef struct _CONFIG_PAGE_FC_PORT_8 1881 1.3.38.2 tron { 1882 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1883 1.3.38.2 tron U32 BitVector[8]; /* 04h */ 1884 1.3.38.2 tron } fCONFIG_PAGE_FC_PORT_8, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_8, 1885 1.3.38.2 tron FCPortPage8_t, MPI_POINTER pFCPortPage8_t; 1886 1.3.38.2 tron 1887 1.3.38.2 tron #define MPI_FCPORTPAGE8_PAGEVERSION (0x00) 1888 1.3.38.2 tron 1889 1.3.38.2 tron 1890 1.3.38.2 tron typedef struct _CONFIG_PAGE_FC_PORT_9 1891 1.3.38.2 tron { 1892 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1893 1.3.38.2 tron U32 Reserved; /* 04h */ 1894 1.3.38.2 tron U64 GlobalWWPN; /* 08h */ 1895 1.3.38.2 tron U64 GlobalWWNN; /* 10h */ 1896 1.3.38.2 tron U32 UnitType; /* 18h */ 1897 1.3.38.2 tron U32 PhysicalPortNumber; /* 1Ch */ 1898 1.3.38.2 tron U32 NumAttachedNodes; /* 20h */ 1899 1.3.38.2 tron U16 IPVersion; /* 24h */ 1900 1.3.38.2 tron U16 UDPPortNumber; /* 26h */ 1901 1.3.38.2 tron U8 IPAddress[16]; /* 28h */ 1902 1.3.38.2 tron U16 Reserved1; /* 38h */ 1903 1.3.38.2 tron U16 TopologyDiscoveryFlags; /* 3Ah */ 1904 1.3.38.2 tron } fCONFIG_PAGE_FC_PORT_9, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_9, 1905 1.3.38.2 tron FCPortPage9_t, MPI_POINTER pFCPortPage9_t; 1906 1.3.38.2 tron 1907 1.3.38.2 tron #define MPI_FCPORTPAGE9_PAGEVERSION (0x00) 1908 1.3.38.2 tron 1909 1.3.38.2 tron 1910 1.3.38.2 tron /**************************************************************************** 1911 1.3.38.2 tron * FC Device Config Pages 1912 1.3.38.2 tron ****************************************************************************/ 1913 1.3.38.2 tron 1914 1.3.38.2 tron typedef struct _CONFIG_PAGE_FC_DEVICE_0 1915 1.3.38.2 tron { 1916 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 1917 1.3.38.2 tron U64 WWNN; /* 04h */ 1918 1.3.38.2 tron U64 WWPN; /* 0Ch */ 1919 1.3.38.2 tron U32 PortIdentifier; /* 14h */ 1920 1.3.38.2 tron U8 Protocol; /* 18h */ 1921 1.3.38.2 tron U8 Flags; /* 19h */ 1922 1.3.38.2 tron U16 BBCredit; /* 1Ah */ 1923 1.3.38.2 tron U16 MaxRxFrameSize; /* 1Ch */ 1924 1.3.38.2 tron U8 Reserved1; /* 1Eh */ 1925 1.3.38.2 tron U8 PortNumber; /* 1Fh */ 1926 1.3.38.2 tron U8 FcPhLowestVersion; /* 20h */ 1927 1.3.38.2 tron U8 FcPhHighestVersion; /* 21h */ 1928 1.3.38.2 tron U8 CurrentTargetID; /* 22h */ 1929 1.3.38.2 tron U8 CurrentBus; /* 23h */ 1930 1.3.38.2 tron } fCONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0, 1931 1.3.38.2 tron FCDevicePage0_t, MPI_POINTER pFCDevicePage0_t; 1932 1.3.38.2 tron 1933 1.3.38.2 tron #define MPI_FC_DEVICE_PAGE0_PAGEVERSION (0x02) 1934 1.3.38.2 tron 1935 1.3.38.2 tron #define MPI_FC_DEVICE_PAGE0_FLAGS_TARGETID_BUS_VALID (0x01) 1936 1.3.38.2 tron 1937 1.3.38.2 tron #define MPI_FC_DEVICE_PAGE0_PROT_IP (0x01) 1938 1.3.38.2 tron #define MPI_FC_DEVICE_PAGE0_PROT_FCP_TARGET (0x02) 1939 1.3.38.2 tron #define MPI_FC_DEVICE_PAGE0_PROT_FCP_INITIATOR (0x04) 1940 1.3.38.2 tron 1941 1.3.38.2 tron #define MPI_FC_DEVICE_PAGE0_PGAD_PORT_MASK (MPI_FC_DEVICE_PGAD_PORT_MASK) 1942 1.3.38.2 tron #define MPI_FC_DEVICE_PAGE0_PGAD_FORM_MASK (MPI_FC_DEVICE_PGAD_FORM_MASK) 1943 1.3.38.2 tron #define MPI_FC_DEVICE_PAGE0_PGAD_FORM_NEXT_DID (MPI_FC_DEVICE_PGAD_FORM_NEXT_DID) 1944 1.3.38.2 tron #define MPI_FC_DEVICE_PAGE0_PGAD_FORM_BUS_TID (MPI_FC_DEVICE_PGAD_FORM_BUS_TID) 1945 1.3.38.2 tron #define MPI_FC_DEVICE_PAGE0_PGAD_DID_MASK (MPI_FC_DEVICE_PGAD_ND_DID_MASK) 1946 1.3.38.2 tron #define MPI_FC_DEVICE_PAGE0_PGAD_BUS_MASK (MPI_FC_DEVICE_PGAD_BT_BUS_MASK) 1947 1.3.38.2 tron #define MPI_FC_DEVICE_PAGE0_PGAD_BUS_SHIFT (MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT) 1948 1.3.38.2 tron #define MPI_FC_DEVICE_PAGE0_PGAD_TID_MASK (MPI_FC_DEVICE_PGAD_BT_TID_MASK) 1949 1.3.38.2 tron 1950 1.3.38.2 tron 1951 1.3.38.2 tron /**************************************************************************** 1952 1.3.38.2 tron * RAID Volume Config Pages 1953 1.3.38.2 tron ****************************************************************************/ 1954 1.3.38.2 tron 1955 1.3.38.2 tron typedef struct _RAID_VOL0_PHYS_DISK 1956 1.3.38.2 tron { 1957 1.3.38.2 tron U16 Reserved; /* 00h */ 1958 1.3.38.2 tron U8 PhysDiskMap; /* 02h */ 1959 1.3.38.2 tron U8 PhysDiskNum; /* 03h */ 1960 1.3.38.2 tron } RAID_VOL0_PHYS_DISK, MPI_POINTER PTR_RAID_VOL0_PHYS_DISK, 1961 1.3.38.2 tron RaidVol0PhysDisk_t, MPI_POINTER pRaidVol0PhysDisk_t; 1962 1.3.38.2 tron 1963 1.3.38.2 tron #define MPI_RAIDVOL0_PHYSDISK_PRIMARY (0x01) 1964 1.3.38.2 tron #define MPI_RAIDVOL0_PHYSDISK_SECONDARY (0x02) 1965 1.3.38.2 tron 1966 1.3.38.2 tron typedef struct _RAID_VOL0_STATUS 1967 1.3.38.2 tron { 1968 1.3.38.2 tron U8 Flags; /* 00h */ 1969 1.3.38.2 tron U8 State; /* 01h */ 1970 1.3.38.2 tron U16 Reserved; /* 02h */ 1971 1.3.38.2 tron } RAID_VOL0_STATUS, MPI_POINTER PTR_RAID_VOL0_STATUS, 1972 1.3.38.2 tron RaidVol0Status_t, MPI_POINTER pRaidVol0Status_t; 1973 1.3.38.2 tron 1974 1.3.38.2 tron /* RAID Volume Page 0 VolumeStatus defines */ 1975 1.3.38.2 tron 1976 1.3.38.2 tron #define MPI_RAIDVOL0_STATUS_FLAG_ENABLED (0x01) 1977 1.3.38.2 tron #define MPI_RAIDVOL0_STATUS_FLAG_QUIESCED (0x02) 1978 1.3.38.2 tron #define MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS (0x04) 1979 1.3.38.2 tron 1980 1.3.38.2 tron #define MPI_RAIDVOL0_STATUS_STATE_OPTIMAL (0x00) 1981 1.3.38.2 tron #define MPI_RAIDVOL0_STATUS_STATE_DEGRADED (0x01) 1982 1.3.38.2 tron #define MPI_RAIDVOL0_STATUS_STATE_FAILED (0x02) 1983 1.3.38.2 tron 1984 1.3.38.2 tron typedef struct _RAID_VOL0_SETTINGS 1985 1.3.38.2 tron { 1986 1.3.38.2 tron U16 Settings; /* 00h */ 1987 1.3.38.2 tron U8 HotSparePool; /* 01h */ /* MPI_RAID_HOT_SPARE_POOL_ */ 1988 1.3.38.2 tron U8 Reserved; /* 02h */ 1989 1.3.38.2 tron } RAID_VOL0_SETTINGS, MPI_POINTER PTR_RAID_VOL0_SETTINGS, 1990 1.3.38.2 tron RaidVol0Settings, MPI_POINTER pRaidVol0Settings; 1991 1.3.38.2 tron 1992 1.3.38.2 tron /* RAID Volume Page 0 VolumeSettings defines */ 1993 1.3.38.2 tron 1994 1.3.38.2 tron #define MPI_RAIDVOL0_SETTING_WRITE_CACHING_ENABLE (0x0001) 1995 1.3.38.2 tron #define MPI_RAIDVOL0_SETTING_OFFLINE_ON_SMART (0x0002) 1996 1.3.38.2 tron #define MPI_RAIDVOL0_SETTING_AUTO_CONFIGURE (0x0004) 1997 1.3.38.2 tron #define MPI_RAIDVOL0_SETTING_PRIORITY_RESYNC (0x0008) 1998 1.3.38.2 tron #define MPI_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0010) 1999 1.3.38.2 tron #define MPI_RAIDVOL0_SETTING_USE_DEFAULTS (0x8000) 2000 1.3.38.2 tron 2001 1.3.38.2 tron /* RAID Volume Page 0 HotSparePool defines, also used in RAID Physical Disk */ 2002 1.3.38.2 tron #define MPI_RAID_HOT_SPARE_POOL_0 (0x01) 2003 1.3.38.2 tron #define MPI_RAID_HOT_SPARE_POOL_1 (0x02) 2004 1.3.38.2 tron #define MPI_RAID_HOT_SPARE_POOL_2 (0x04) 2005 1.3.38.2 tron #define MPI_RAID_HOT_SPARE_POOL_3 (0x08) 2006 1.3.38.2 tron #define MPI_RAID_HOT_SPARE_POOL_4 (0x10) 2007 1.3.38.2 tron #define MPI_RAID_HOT_SPARE_POOL_5 (0x20) 2008 1.3.38.2 tron #define MPI_RAID_HOT_SPARE_POOL_6 (0x40) 2009 1.3.38.2 tron #define MPI_RAID_HOT_SPARE_POOL_7 (0x80) 2010 1.3.38.2 tron 2011 1.3.38.2 tron /* 2012 1.3.38.2 tron * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2013 1.3.38.2 tron * one and check Header.PageLength at runtime. 2014 1.3.38.2 tron */ 2015 1.3.38.2 tron #ifndef MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX 2016 1.3.38.2 tron #define MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX (1) 2017 1.3.38.2 tron #endif 2018 1.3.38.2 tron 2019 1.3.38.2 tron typedef struct _CONFIG_PAGE_RAID_VOL_0 2020 1.3.38.2 tron { 2021 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 2022 1.3.38.2 tron U8 VolumeID; /* 04h */ 2023 1.3.38.2 tron U8 VolumeBus; /* 05h */ 2024 1.3.38.2 tron U8 VolumeIOC; /* 06h */ 2025 1.3.38.2 tron U8 VolumeType; /* 07h */ /* MPI_RAID_VOL_TYPE_ */ 2026 1.3.38.2 tron RAID_VOL0_STATUS VolumeStatus; /* 08h */ 2027 1.3.38.2 tron RAID_VOL0_SETTINGS VolumeSettings; /* 0Ch */ 2028 1.3.38.2 tron U32 MaxLBA; /* 10h */ 2029 1.3.38.2 tron U32 Reserved1; /* 14h */ 2030 1.3.38.2 tron U32 StripeSize; /* 18h */ 2031 1.3.38.2 tron U32 Reserved2; /* 1Ch */ 2032 1.3.38.2 tron U32 Reserved3; /* 20h */ 2033 1.3.38.2 tron U8 NumPhysDisks; /* 24h */ 2034 1.3.38.2 tron U8 Reserved4; /* 25h */ 2035 1.3.38.2 tron U16 Reserved5; /* 26h */ 2036 1.3.38.2 tron RAID_VOL0_PHYS_DISK PhysDisk[MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX];/* 28h */ 2037 1.3.38.2 tron } fCONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0, 2038 1.3.38.2 tron RaidVolumePage0_t, MPI_POINTER pRaidVolumePage0_t; 2039 1.3.38.2 tron 2040 1.3.38.2 tron #define MPI_RAIDVOLPAGE0_PAGEVERSION (0x00) 2041 1.3.38.2 tron 2042 1.3.38.2 tron 2043 1.3.38.2 tron /**************************************************************************** 2044 1.3.38.2 tron * RAID Physical Disk Config Pages 2045 1.3.38.2 tron ****************************************************************************/ 2046 1.3.38.2 tron 2047 1.3.38.2 tron typedef struct _RAID_PHYS_DISK0_ERROR_DATA 2048 1.3.38.2 tron { 2049 1.3.38.2 tron U8 ErrorCdbByte; /* 00h */ 2050 1.3.38.2 tron U8 ErrorSenseKey; /* 01h */ 2051 1.3.38.2 tron U16 Reserved; /* 02h */ 2052 1.3.38.2 tron U16 ErrorCount; /* 04h */ 2053 1.3.38.2 tron U8 ErrorASC; /* 06h */ 2054 1.3.38.2 tron U8 ErrorASCQ; /* 07h */ 2055 1.3.38.2 tron U16 SmartCount; /* 08h */ 2056 1.3.38.2 tron U8 SmartASC; /* 0Ah */ 2057 1.3.38.2 tron U8 SmartASCQ; /* 0Bh */ 2058 1.3.38.2 tron } RAID_PHYS_DISK0_ERROR_DATA, MPI_POINTER PTR_RAID_PHYS_DISK0_ERROR_DATA, 2059 1.3.38.2 tron RaidPhysDisk0ErrorData_t, MPI_POINTER pRaidPhysDisk0ErrorData_t; 2060 1.3.38.2 tron 2061 1.3.38.2 tron typedef struct _RAID_PHYS_DISK_INQUIRY_DATA 2062 1.3.38.2 tron { 2063 1.3.38.2 tron U8 VendorID[8]; /* 00h */ 2064 1.3.38.2 tron U8 ProductID[16]; /* 08h */ 2065 1.3.38.2 tron U8 ProductRevLevel[4]; /* 18h */ 2066 1.3.38.2 tron U8 Info[32]; /* 1Ch */ 2067 1.3.38.2 tron } RAID_PHYS_DISK0_INQUIRY_DATA, MPI_POINTER PTR_RAID_PHYS_DISK0_INQUIRY_DATA, 2068 1.3.38.2 tron RaidPhysDisk0InquiryData, MPI_POINTER pRaidPhysDisk0InquiryData; 2069 1.3.38.2 tron 2070 1.3.38.2 tron typedef struct _RAID_PHYS_DISK0_SETTINGS 2071 1.3.38.2 tron { 2072 1.3.38.2 tron U8 SepID; /* 00h */ 2073 1.3.38.2 tron U8 SepBus; /* 01h */ 2074 1.3.38.2 tron U8 HotSparePool; /* 02h */ /* MPI_RAID_HOT_SPARE_POOL_ */ 2075 1.3.38.2 tron U8 PhysDiskSettings; /* 03h */ 2076 1.3.38.2 tron } RAID_PHYS_DISK0_SETTINGS, MPI_POINTER PTR_RAID_PHYS_DISK0_SETTINGS, 2077 1.3.38.2 tron RaidPhysDiskSettings_t, MPI_POINTER pRaidPhysDiskSettings_t; 2078 1.3.38.2 tron 2079 1.3.38.2 tron typedef struct _RAID_PHYS_DISK0_STATUS 2080 1.3.38.2 tron { 2081 1.3.38.2 tron U8 Flags; /* 00h */ 2082 1.3.38.2 tron U8 State; /* 01h */ 2083 1.3.38.2 tron U16 Reserved; /* 02h */ 2084 1.3.38.2 tron } RAID_PHYS_DISK0_STATUS, MPI_POINTER PTR_RAID_PHYS_DISK0_STATUS, 2085 1.3.38.2 tron RaidPhysDiskStatus_t, MPI_POINTER pRaidPhysDiskStatus_t; 2086 1.3.38.2 tron 2087 1.3.38.2 tron /* RAID Volume 2 IM Physical Disk DiskStatus flags */ 2088 1.3.38.2 tron 2089 1.3.38.2 tron #define MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x01) 2090 1.3.38.2 tron #define MPI_PHYSDISK0_STATUS_FLAG_QUIESCED (0x02) 2091 1.3.38.2 tron 2092 1.3.38.2 tron #define MPI_PHYSDISK0_STATUS_ONLINE (0x00) 2093 1.3.38.2 tron #define MPI_PHYSDISK0_STATUS_MISSING (0x01) 2094 1.3.38.2 tron #define MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE (0x02) 2095 1.3.38.2 tron #define MPI_PHYSDISK0_STATUS_FAILED (0x03) 2096 1.3.38.2 tron #define MPI_PHYSDISK0_STATUS_INITIALIZING (0x04) 2097 1.3.38.2 tron #define MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED (0x05) 2098 1.3.38.2 tron #define MPI_PHYSDISK0_STATUS_FAILED_REQUESTED (0x06) 2099 1.3.38.2 tron #define MPI_PHYSDISK0_STATUS_OTHER_OFFLINE (0xFF) 2100 1.3.38.2 tron 2101 1.3.38.2 tron typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_0 2102 1.3.38.2 tron { 2103 1.3.38.2 tron fCONFIG_PAGE_HEADER Header; /* 00h */ 2104 1.3.38.2 tron U8 PhysDiskID; /* 04h */ 2105 1.3.38.2 tron U8 PhysDiskBus; /* 05h */ 2106 1.3.38.2 tron U8 PhysDiskIOC; /* 06h */ 2107 1.3.38.2 tron U8 PhysDiskNum; /* 07h */ 2108 1.3.38.2 tron RAID_PHYS_DISK0_SETTINGS PhysDiskSettings; /* 08h */ 2109 1.3.38.2 tron U32 Reserved1; /* 0Ch */ 2110 1.3.38.2 tron U32 Reserved2; /* 10h */ 2111 1.3.38.2 tron U32 Reserved3; /* 14h */ 2112 1.3.38.2 tron U8 DiskIdentifier[16]; /* 18h */ 2113 1.3.38.2 tron RAID_PHYS_DISK0_INQUIRY_DATA InquiryData; /* 28h */ 2114 1.3.38.2 tron RAID_PHYS_DISK0_STATUS PhysDiskStatus; /* 64h */ 2115 1.3.38.2 tron U32 MaxLBA; /* 68h */ 2116 1.3.38.2 tron RAID_PHYS_DISK0_ERROR_DATA ErrorData; /* 6Ch */ 2117 1.3.38.2 tron } fCONFIG_PAGE_RAID_PHYS_DISK_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_0, 2118 1.3.38.2 tron RaidPhysDiskPage0_t, MPI_POINTER pRaidPhysDiskPage0_t; 2119 1.3.38.2 tron 2120 1.3.38.2 tron #define MPI_RAIDPHYSDISKPAGE0_PAGEVERSION (0x00) 2121 1.3.38.2 tron 2122 1.3.38.2 tron 2123 1.3.38.2 tron /**************************************************************************** 2124 1.3.38.2 tron * LAN Config Pages 2125 1.3.38.2 tron ****************************************************************************/ 2126 1.3.38.2 tron 2127 1.3.38.2 tron typedef struct _CONFIG_PAGE_LAN_0 2128 1.3.38.2 tron { 2129 1.3.38.2 tron ConfigPageHeader_t Header; /* 00h */ 2130 1.3.38.2 tron U16 TxRxModes; /* 04h */ 2131 1.3.38.2 tron U16 Reserved; /* 06h */ 2132 1.3.38.2 tron U32 PacketPrePad; /* 08h */ 2133 1.3.38.2 tron } fCONFIG_PAGE_LAN_0, MPI_POINTER PTR_CONFIG_PAGE_LAN_0, 2134 1.3.38.2 tron LANPage0_t, MPI_POINTER pLANPage0_t; 2135 1.3.38.2 tron 2136 1.3.38.2 tron #define MPI_LAN_PAGE0_PAGEVERSION (0x01) 2137 1.3.38.2 tron 2138 1.3.38.2 tron #define MPI_LAN_PAGE0_RETURN_LOOPBACK (0x0000) 2139 1.3.38.2 tron #define MPI_LAN_PAGE0_SUPPRESS_LOOPBACK (0x0001) 2140 1.3.38.2 tron #define MPI_LAN_PAGE0_LOOPBACK_MASK (0x0001) 2141 1.3.38.2 tron 2142 1.3.38.2 tron typedef struct _CONFIG_PAGE_LAN_1 2143 1.3.38.2 tron { 2144 1.3.38.2 tron ConfigPageHeader_t Header; /* 00h */ 2145 1.3.38.2 tron U16 Reserved; /* 04h */ 2146 1.3.38.2 tron U8 CurrentDeviceState; /* 06h */ 2147 1.3.38.2 tron U8 Reserved1; /* 07h */ 2148 1.3.38.2 tron U32 MinPacketSize; /* 08h */ 2149 1.3.38.2 tron U32 MaxPacketSize; /* 0Ch */ 2150 1.3.38.2 tron U32 HardwareAddressLow; /* 10h */ 2151 1.3.38.2 tron U32 HardwareAddressHigh; /* 14h */ 2152 1.3.38.2 tron U32 MaxWireSpeedLow; /* 18h */ 2153 1.3.38.2 tron U32 MaxWireSpeedHigh; /* 1Ch */ 2154 1.3.38.2 tron U32 BucketsRemaining; /* 20h */ 2155 1.3.38.2 tron U32 MaxReplySize; /* 24h */ 2156 1.3.38.2 tron U32 NegWireSpeedLow; /* 28h */ 2157 1.3.38.2 tron U32 NegWireSpeedHigh; /* 2Ch */ 2158 1.3.38.2 tron } fCONFIG_PAGE_LAN_1, MPI_POINTER PTR_CONFIG_PAGE_LAN_1, 2159 1.3.38.2 tron LANPage1_t, MPI_POINTER pLANPage1_t; 2160 1.3.38.2 tron 2161 1.3.38.2 tron #define MPI_LAN_PAGE1_PAGEVERSION (0x03) 2162 1.3.38.2 tron 2163 1.3.38.2 tron #define MPI_LAN_PAGE1_DEV_STATE_RESET (0x00) 2164 1.3.38.2 tron #define MPI_LAN_PAGE1_DEV_STATE_OPERATIONAL (0x01) 2165 1.3.38.2 tron 2166 1.3.38.2 tron #endif 2167 1.3.38.2 tron 2168 1.3.38.2 tron 2169 1.3.38.2 tron /* 2170 1.3.38.2 tron * Copyright (c) 2000, 2001 by LSI Logic Corporation 2171 1.3.38.2 tron * 2172 1.3.38.2 tron * Redistribution and use in source and binary forms, with or without 2173 1.3.38.2 tron * modification, are permitted provided that the following conditions 2174 1.3.38.2 tron * are met: 2175 1.3.38.2 tron * 1. Redistributions of source code must retain the above copyright 2176 1.3.38.2 tron * notice immediately at the beginning of the file, without modification, 2177 1.3.38.2 tron * this list of conditions, and the following disclaimer. 2178 1.3.38.2 tron * 2. The name of the author may not be used to endorse or promote products 2179 1.3.38.2 tron * derived from this software without specific prior written permission. 2180 1.3.38.2 tron * 2181 1.3.38.2 tron * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 2182 1.3.38.2 tron * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2183 1.3.38.2 tron * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2184 1.3.38.2 tron * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 2185 1.3.38.2 tron * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2186 1.3.38.2 tron * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2187 1.3.38.2 tron * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2188 1.3.38.2 tron * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2189 1.3.38.2 tron * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2190 1.3.38.2 tron * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2191 1.3.38.2 tron * SUCH DAMAGE. 2192 1.3.38.2 tron * 2193 1.3.38.2 tron * 2194 1.3.38.2 tron * Name: MPI_FC.H 2195 1.3.38.2 tron * Title: MPI Fibre Channel messages and structures 2196 1.3.38.2 tron * Creation Date: June 12, 2000 2197 1.3.38.2 tron * 2198 1.3.38.2 tron * MPI Version: 01.02.02 2199 1.3.38.2 tron * 2200 1.3.38.2 tron * Version History 2201 1.3.38.2 tron * --------------- 2202 1.3.38.2 tron * 2203 1.3.38.2 tron * Date Version Description 2204 1.3.38.2 tron * -------- -------- ------------------------------------------------------ 2205 1.3.38.2 tron * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 2206 1.3.38.2 tron * 06-06-00 01.00.01 Update version number for 1.0 release. 2207 1.3.38.2 tron * 06-12-00 01.00.02 Added _MSG_FC_ABORT_REPLY structure. 2208 1.3.38.2 tron * 11-02-00 01.01.01 Original release for post 1.0 work 2209 1.3.38.2 tron * 12-04-00 01.01.02 Added messages for Common Transport Send and 2210 1.3.38.2 tron * Primitive Send. 2211 1.3.38.2 tron * 01-09-01 01.01.03 Modifed some of the new flags to have an MPI prefix 2212 1.3.38.2 tron * and modified the FcPrimitiveSend flags. 2213 1.3.38.2 tron * 01-25-01 01.01.04 Move InitiatorIndex in LinkServiceRsp reply to a larger 2214 1.3.38.2 tron * field. 2215 1.3.38.2 tron * Added FC_ABORT_TYPE_CT_SEND_REQUEST and 2216 1.3.38.2 tron * FC_ABORT_TYPE_EXLINKSEND_REQUEST for FcAbort request. 2217 1.3.38.2 tron * Added MPI_FC_PRIM_SEND_FLAGS_STOP_SEND. 2218 1.3.38.2 tron * 02-20-01 01.01.05 Started using MPI_POINTER. 2219 1.3.38.2 tron * 03-27-01 01.01.06 Added Flags field to MSG_LINK_SERVICE_BUFFER_POST_REPLY 2220 1.3.38.2 tron * and defined MPI_LS_BUF_POST_REPLY_FLAG_NO_RSP_NEEDED. 2221 1.3.38.2 tron * Added MPI_FC_PRIM_SEND_FLAGS_RESET_LINK define. 2222 1.3.38.2 tron * Added structure offset comments. 2223 1.3.38.2 tron * 04-09-01 01.01.07 Added RspLength field to MSG_LINK_SERVICE_RSP_REQUEST. 2224 1.3.38.2 tron * 08-08-01 01.02.01 Original release for v1.2 work. 2225 1.3.38.2 tron * 09-28-01 01.02.02 Change name of reserved field in 2226 1.3.38.2 tron * MSG_LINK_SERVICE_RSP_REPLY. 2227 1.3.38.2 tron * -------------------------------------------------------------------------- 2228 1.3.38.2 tron */ 2229 1.3.38.2 tron 2230 1.3.38.2 tron #ifndef MPI_FC_H 2231 1.3.38.2 tron #define MPI_FC_H 2232 1.3.38.2 tron 2233 1.3.38.2 tron 2234 1.3.38.2 tron /***************************************************************************** 2235 1.3.38.2 tron * 2236 1.3.38.2 tron * F C T a r g e t M o d e M e s s a g e s 2237 1.3.38.2 tron * 2238 1.3.38.2 tron *****************************************************************************/ 2239 1.3.38.2 tron 2240 1.3.38.2 tron /****************************************************************************/ 2241 1.3.38.2 tron /* Link Service Buffer Post messages */ 2242 1.3.38.2 tron /****************************************************************************/ 2243 1.3.38.2 tron 2244 1.3.38.2 tron typedef struct _MSG_LINK_SERVICE_BUFFER_POST_REQUEST 2245 1.3.38.2 tron { 2246 1.3.38.2 tron U8 BufferPostFlags; /* 00h */ 2247 1.3.38.2 tron U8 BufferCount; /* 01h */ 2248 1.3.38.2 tron U8 ChainOffset; /* 02h */ 2249 1.3.38.2 tron U8 Function; /* 03h */ 2250 1.3.38.2 tron U16 Reserved; /* 04h */ 2251 1.3.38.2 tron U8 Reserved1; /* 06h */ 2252 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2253 1.3.38.2 tron U32 MsgContext; /* 08h */ 2254 1.3.38.2 tron SGE_TRANS_SIMPLE_UNION SGL; 2255 1.3.38.2 tron } MSG_LINK_SERVICE_BUFFER_POST_REQUEST, 2256 1.3.38.2 tron MPI_POINTER PTR_MSG_LINK_SERVICE_BUFFER_POST_REQUEST, 2257 1.3.38.2 tron LinkServiceBufferPostRequest_t, MPI_POINTER pLinkServiceBufferPostRequest_t; 2258 1.3.38.2 tron 2259 1.3.38.2 tron #define LINK_SERVICE_BUFFER_POST_FLAGS_PORT_MASK (0x01) 2260 1.3.38.2 tron 2261 1.3.38.2 tron typedef struct _WWNFORMAT 2262 1.3.38.2 tron { 2263 1.3.38.2 tron U32 PortNameHigh; /* 00h */ 2264 1.3.38.2 tron U32 PortNameLow; /* 04h */ 2265 1.3.38.2 tron U32 NodeNameHigh; /* 08h */ 2266 1.3.38.2 tron U32 NodeNameLow; /* 0Ch */ 2267 1.3.38.2 tron } WWNFORMAT, 2268 1.3.38.2 tron WwnFormat_t; 2269 1.3.38.2 tron 2270 1.3.38.2 tron /* Link Service Buffer Post Reply */ 2271 1.3.38.2 tron typedef struct _MSG_LINK_SERVICE_BUFFER_POST_REPLY 2272 1.3.38.2 tron { 2273 1.3.38.2 tron U8 Flags; /* 00h */ 2274 1.3.38.2 tron U8 Reserved; /* 01h */ 2275 1.3.38.2 tron U8 MsgLength; /* 02h */ 2276 1.3.38.2 tron U8 Function; /* 03h */ 2277 1.3.38.2 tron U16 Reserved1; /* 04h */ 2278 1.3.38.2 tron U8 PortNumber; /* 06h */ 2279 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2280 1.3.38.2 tron U32 MsgContext; /* 08h */ 2281 1.3.38.2 tron U16 Reserved2; /* 0Ch */ 2282 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 2283 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 2284 1.3.38.2 tron U32 TransferLength; /* 14h */ 2285 1.3.38.2 tron U32 TransactionContext; /* 18h */ 2286 1.3.38.2 tron U32 Rctl_Did; /* 1Ch */ 2287 1.3.38.2 tron U32 Csctl_Sid; /* 20h */ 2288 1.3.38.2 tron U32 Type_Fctl; /* 24h */ 2289 1.3.38.2 tron U16 SeqCnt; /* 28h */ 2290 1.3.38.2 tron U8 Dfctl; /* 2Ah */ 2291 1.3.38.2 tron U8 SeqId; /* 2Bh */ 2292 1.3.38.2 tron U16 Rxid; /* 2Ch */ 2293 1.3.38.2 tron U16 Oxid; /* 2Eh */ 2294 1.3.38.2 tron U32 Parameter; /* 30h */ 2295 1.3.38.2 tron WWNFORMAT Wwn; /* 34h */ 2296 1.3.38.2 tron } MSG_LINK_SERVICE_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_LINK_SERVICE_BUFFER_POST_REPLY, 2297 1.3.38.2 tron LinkServiceBufferPostReply_t, MPI_POINTER pLinkServiceBufferPostReply_t; 2298 1.3.38.2 tron 2299 1.3.38.2 tron #define MPI_LS_BUF_POST_REPLY_FLAG_NO_RSP_NEEDED (0x80) 2300 1.3.38.2 tron 2301 1.3.38.2 tron #define MPI_FC_DID_MASK (0x00FFFFFF) 2302 1.3.38.2 tron #define MPI_FC_DID_SHIFT (0) 2303 1.3.38.2 tron #define MPI_FC_RCTL_MASK (0xFF000000) 2304 1.3.38.2 tron #define MPI_FC_RCTL_SHIFT (24) 2305 1.3.38.2 tron #define MPI_FC_SID_MASK (0x00FFFFFF) 2306 1.3.38.2 tron #define MPI_FC_SID_SHIFT (0) 2307 1.3.38.2 tron #define MPI_FC_CSCTL_MASK (0xFF000000) 2308 1.3.38.2 tron #define MPI_FC_CSCTL_SHIFT (24) 2309 1.3.38.2 tron #define MPI_FC_FCTL_MASK (0x00FFFFFF) 2310 1.3.38.2 tron #define MPI_FC_FCTL_SHIFT (0) 2311 1.3.38.2 tron #define MPI_FC_TYPE_MASK (0xFF000000) 2312 1.3.38.2 tron #define MPI_FC_TYPE_SHIFT (24) 2313 1.3.38.2 tron 2314 1.3.38.2 tron /* obsolete name for the above */ 2315 1.3.38.2 tron #define FCP_TARGET_DID_MASK (0x00FFFFFF) 2316 1.3.38.2 tron #define FCP_TARGET_DID_SHIFT (0) 2317 1.3.38.2 tron #define FCP_TARGET_RCTL_MASK (0xFF000000) 2318 1.3.38.2 tron #define FCP_TARGET_RCTL_SHIFT (24) 2319 1.3.38.2 tron #define FCP_TARGET_SID_MASK (0x00FFFFFF) 2320 1.3.38.2 tron #define FCP_TARGET_SID_SHIFT (0) 2321 1.3.38.2 tron #define FCP_TARGET_CSCTL_MASK (0xFF000000) 2322 1.3.38.2 tron #define FCP_TARGET_CSCTL_SHIFT (24) 2323 1.3.38.2 tron #define FCP_TARGET_FCTL_MASK (0x00FFFFFF) 2324 1.3.38.2 tron #define FCP_TARGET_FCTL_SHIFT (0) 2325 1.3.38.2 tron #define FCP_TARGET_TYPE_MASK (0xFF000000) 2326 1.3.38.2 tron #define FCP_TARGET_TYPE_SHIFT (24) 2327 1.3.38.2 tron 2328 1.3.38.2 tron 2329 1.3.38.2 tron /****************************************************************************/ 2330 1.3.38.2 tron /* Link Service Response messages */ 2331 1.3.38.2 tron /****************************************************************************/ 2332 1.3.38.2 tron 2333 1.3.38.2 tron typedef struct _MSG_LINK_SERVICE_RSP_REQUEST 2334 1.3.38.2 tron { 2335 1.3.38.2 tron U8 RspFlags; /* 00h */ 2336 1.3.38.2 tron U8 RspLength; /* 01h */ 2337 1.3.38.2 tron U8 ChainOffset; /* 02h */ 2338 1.3.38.2 tron U8 Function; /* 03h */ 2339 1.3.38.2 tron U16 Reserved1; /* 04h */ 2340 1.3.38.2 tron U8 Reserved2; /* 06h */ 2341 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2342 1.3.38.2 tron U32 MsgContext; /* 08h */ 2343 1.3.38.2 tron U32 Rctl_Did; /* 0Ch */ 2344 1.3.38.2 tron U32 Csctl_Sid; /* 10h */ 2345 1.3.38.2 tron U32 Type_Fctl; /* 14h */ 2346 1.3.38.2 tron U16 SeqCnt; /* 18h */ 2347 1.3.38.2 tron U8 Dfctl; /* 1Ah */ 2348 1.3.38.2 tron U8 SeqId; /* 1Bh */ 2349 1.3.38.2 tron U16 Rxid; /* 1Ch */ 2350 1.3.38.2 tron U16 Oxid; /* 1Eh */ 2351 1.3.38.2 tron U32 Parameter; /* 20h */ 2352 1.3.38.2 tron SGE_SIMPLE_UNION SGL; /* 24h */ 2353 1.3.38.2 tron } MSG_LINK_SERVICE_RSP_REQUEST, MPI_POINTER PTR_MSG_LINK_SERVICE_RSP_REQUEST, 2354 1.3.38.2 tron LinkServiceRspRequest_t, MPI_POINTER pLinkServiceRspRequest_t; 2355 1.3.38.2 tron 2356 1.3.38.2 tron #define LINK_SERVICE_RSP_FLAGS_IMMEDIATE (0x80) 2357 1.3.38.2 tron #define LINK_SERVICE_RSP_FLAGS_PORT_MASK (0x01) 2358 1.3.38.2 tron 2359 1.3.38.2 tron 2360 1.3.38.2 tron /* Link Service Response Reply */ 2361 1.3.38.2 tron typedef struct _MSG_LINK_SERVICE_RSP_REPLY 2362 1.3.38.2 tron { 2363 1.3.38.2 tron U16 Reserved; /* 00h */ 2364 1.3.38.2 tron U8 MsgLength; /* 02h */ 2365 1.3.38.2 tron U8 Function; /* 03h */ 2366 1.3.38.2 tron U16 Reserved1; /* 04h */ 2367 1.3.38.2 tron U8 Reserved_0100_InitiatorIndex; /* 06h */ /* obsolete InitiatorIndex */ 2368 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2369 1.3.38.2 tron U32 MsgContext; /* 08h */ 2370 1.3.38.2 tron U16 Reserved3; /* 0Ch */ 2371 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 2372 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 2373 1.3.38.2 tron U32 InitiatorIndex; /* 14h */ 2374 1.3.38.2 tron } MSG_LINK_SERVICE_RSP_REPLY, MPI_POINTER PTR_MSG_LINK_SERVICE_RSP_REPLY, 2375 1.3.38.2 tron LinkServiceRspReply_t, MPI_POINTER pLinkServiceRspReply_t; 2376 1.3.38.2 tron 2377 1.3.38.2 tron 2378 1.3.38.2 tron /****************************************************************************/ 2379 1.3.38.2 tron /* Extended Link Service Send messages */ 2380 1.3.38.2 tron /****************************************************************************/ 2381 1.3.38.2 tron 2382 1.3.38.2 tron typedef struct _MSG_EXLINK_SERVICE_SEND_REQUEST 2383 1.3.38.2 tron { 2384 1.3.38.2 tron U8 SendFlags; /* 00h */ 2385 1.3.38.2 tron U8 Reserved; /* 01h */ 2386 1.3.38.2 tron U8 ChainOffset; /* 02h */ 2387 1.3.38.2 tron U8 Function; /* 03h */ 2388 1.3.38.2 tron U32 MsgFlags_Did; /* 04h */ 2389 1.3.38.2 tron U32 MsgContext; /* 08h */ 2390 1.3.38.2 tron U32 ElsCommandCode; /* 0Ch */ 2391 1.3.38.2 tron SGE_SIMPLE_UNION SGL; /* 10h */ 2392 1.3.38.2 tron } MSG_EXLINK_SERVICE_SEND_REQUEST, MPI_POINTER PTR_MSG_EXLINK_SERVICE_SEND_REQUEST, 2393 1.3.38.2 tron ExLinkServiceSendRequest_t, MPI_POINTER pExLinkServiceSendRequest_t; 2394 1.3.38.2 tron 2395 1.3.38.2 tron #define EX_LINK_SERVICE_SEND_DID_MASK (0x00FFFFFF) 2396 1.3.38.2 tron #define EX_LINK_SERVICE_SEND_DID_SHIFT (0) 2397 1.3.38.2 tron #define EX_LINK_SERVICE_SEND_MSGFLAGS_MASK (0xFF000000) 2398 1.3.38.2 tron #define EX_LINK_SERVICE_SEND_MSGFLAGS_SHIFT (24) 2399 1.3.38.2 tron 2400 1.3.38.2 tron 2401 1.3.38.2 tron /* Extended Link Service Send Reply */ 2402 1.3.38.2 tron typedef struct _MSG_EXLINK_SERVICE_SEND_REPLY 2403 1.3.38.2 tron { 2404 1.3.38.2 tron U16 Reserved; /* 00h */ 2405 1.3.38.2 tron U8 MsgLength; /* 02h */ 2406 1.3.38.2 tron U8 Function; /* 03h */ 2407 1.3.38.2 tron U16 Reserved1; /* 04h */ 2408 1.3.38.2 tron U8 Reserved2; /* 06h */ 2409 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2410 1.3.38.2 tron U32 MsgContext; /* 08h */ 2411 1.3.38.2 tron U16 Reserved3; /* 0Ch */ 2412 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 2413 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 2414 1.3.38.2 tron U32 ResponseLength; /* 14h */ 2415 1.3.38.2 tron } MSG_EXLINK_SERVICE_SEND_REPLY, MPI_POINTER PTR_MSG_EXLINK_SERVICE_SEND_REPLY, 2416 1.3.38.2 tron ExLinkServiceSendReply_t, MPI_POINTER pExLinkServiceSendReply_t; 2417 1.3.38.2 tron 2418 1.3.38.2 tron /****************************************************************************/ 2419 1.3.38.2 tron /* FC Abort messages */ 2420 1.3.38.2 tron /****************************************************************************/ 2421 1.3.38.2 tron 2422 1.3.38.2 tron typedef struct _MSG_FC_ABORT_REQUEST 2423 1.3.38.2 tron { 2424 1.3.38.2 tron U8 AbortFlags; /* 00h */ 2425 1.3.38.2 tron U8 AbortType; /* 01h */ 2426 1.3.38.2 tron U8 ChainOffset; /* 02h */ 2427 1.3.38.2 tron U8 Function; /* 03h */ 2428 1.3.38.2 tron U16 Reserved1; /* 04h */ 2429 1.3.38.2 tron U8 Reserved2; /* 06h */ 2430 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2431 1.3.38.2 tron U32 MsgContext; /* 08h */ 2432 1.3.38.2 tron U32 TransactionContextToAbort; /* 0Ch */ 2433 1.3.38.2 tron } MSG_FC_ABORT_REQUEST, MPI_POINTER PTR_MSG_FC_ABORT_REQUEST, 2434 1.3.38.2 tron FcAbortRequest_t, MPI_POINTER pFcAbortRequest_t; 2435 1.3.38.2 tron 2436 1.3.38.2 tron #define FC_ABORT_FLAG_PORT_MASK (0x01) 2437 1.3.38.2 tron 2438 1.3.38.2 tron #define FC_ABORT_TYPE_ALL_FC_BUFFERS (0x00) 2439 1.3.38.2 tron #define FC_ABORT_TYPE_EXACT_FC_BUFFER (0x01) 2440 1.3.38.2 tron #define FC_ABORT_TYPE_CT_SEND_REQUEST (0x02) 2441 1.3.38.2 tron #define FC_ABORT_TYPE_EXLINKSEND_REQUEST (0x03) 2442 1.3.38.2 tron 2443 1.3.38.2 tron /* FC Abort Reply */ 2444 1.3.38.2 tron typedef struct _MSG_FC_ABORT_REPLY 2445 1.3.38.2 tron { 2446 1.3.38.2 tron U16 Reserved; /* 00h */ 2447 1.3.38.2 tron U8 MsgLength; /* 02h */ 2448 1.3.38.2 tron U8 Function; /* 03h */ 2449 1.3.38.2 tron U16 Reserved1; /* 04h */ 2450 1.3.38.2 tron U8 Reserved2; /* 06h */ 2451 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2452 1.3.38.2 tron U32 MsgContext; /* 08h */ 2453 1.3.38.2 tron U16 Reserved3; /* 0Ch */ 2454 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 2455 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 2456 1.3.38.2 tron } MSG_FC_ABORT_REPLY, MPI_POINTER PTR_MSG_FC_ABORT_REPLY, 2457 1.3.38.2 tron FcAbortReply_t, MPI_POINTER pFcAbortReply_t; 2458 1.3.38.2 tron 2459 1.3.38.2 tron 2460 1.3.38.2 tron /****************************************************************************/ 2461 1.3.38.2 tron /* FC Common Transport Send messages */ 2462 1.3.38.2 tron /****************************************************************************/ 2463 1.3.38.2 tron 2464 1.3.38.2 tron typedef struct _MSG_FC_COMMON_TRANSPORT_SEND_REQUEST 2465 1.3.38.2 tron { 2466 1.3.38.2 tron U8 SendFlags; /* 00h */ 2467 1.3.38.2 tron U8 Reserved; /* 01h */ 2468 1.3.38.2 tron U8 ChainOffset; /* 02h */ 2469 1.3.38.2 tron U8 Function; /* 03h */ 2470 1.3.38.2 tron U32 MsgFlags_Did; /* 04h */ 2471 1.3.38.2 tron U32 MsgContext; /* 08h */ 2472 1.3.38.2 tron U16 CTCommandCode; /* 0Ch */ 2473 1.3.38.2 tron U8 FsType; /* 0Eh */ 2474 1.3.38.2 tron U8 Reserved1; /* 0Fh */ 2475 1.3.38.2 tron SGE_SIMPLE_UNION SGL; /* 10h */ 2476 1.3.38.2 tron } MSG_FC_COMMON_TRANSPORT_SEND_REQUEST, 2477 1.3.38.2 tron MPI_POINTER PTR_MSG_FC_COMMON_TRANSPORT_SEND_REQUEST, 2478 1.3.38.2 tron FcCommonTransportSendRequest_t, MPI_POINTER pFcCommonTransportSendRequest_t; 2479 1.3.38.2 tron 2480 1.3.38.2 tron #define MPI_FC_CT_SEND_DID_MASK (0x00FFFFFF) 2481 1.3.38.2 tron #define MPI_FC_CT_SEND_DID_SHIFT (0) 2482 1.3.38.2 tron #define MPI_FC_CT_SEND_MSGFLAGS_MASK (0xFF000000) 2483 1.3.38.2 tron #define MPI_FC_CT_SEND_MSGFLAGS_SHIFT (24) 2484 1.3.38.2 tron 2485 1.3.38.2 tron 2486 1.3.38.2 tron /* FC Common Transport Send Reply */ 2487 1.3.38.2 tron typedef struct _MSG_FC_COMMON_TRANSPORT_SEND_REPLY 2488 1.3.38.2 tron { 2489 1.3.38.2 tron U16 Reserved; /* 00h */ 2490 1.3.38.2 tron U8 MsgLength; /* 02h */ 2491 1.3.38.2 tron U8 Function; /* 03h */ 2492 1.3.38.2 tron U16 Reserved1; /* 04h */ 2493 1.3.38.2 tron U8 Reserved2; /* 06h */ 2494 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2495 1.3.38.2 tron U32 MsgContext; /* 08h */ 2496 1.3.38.2 tron U16 Reserved3; /* 0Ch */ 2497 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 2498 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 2499 1.3.38.2 tron U32 ResponseLength; /* 14h */ 2500 1.3.38.2 tron } MSG_FC_COMMON_TRANSPORT_SEND_REPLY, MPI_POINTER PTR_MSG_FC_COMMON_TRANSPORT_SEND_REPLY, 2501 1.3.38.2 tron FcCommonTransportSendReply_t, MPI_POINTER pFcCommonTransportSendReply_t; 2502 1.3.38.2 tron 2503 1.3.38.2 tron 2504 1.3.38.2 tron /****************************************************************************/ 2505 1.3.38.2 tron /* FC Primitive Send messages */ 2506 1.3.38.2 tron /****************************************************************************/ 2507 1.3.38.2 tron 2508 1.3.38.2 tron typedef struct _MSG_FC_PRIMITIVE_SEND_REQUEST 2509 1.3.38.2 tron { 2510 1.3.38.2 tron U8 SendFlags; /* 00h */ 2511 1.3.38.2 tron U8 Reserved; /* 01h */ 2512 1.3.38.2 tron U8 ChainOffset; /* 02h */ 2513 1.3.38.2 tron U8 Function; /* 03h */ 2514 1.3.38.2 tron U16 Reserved1; /* 04h */ 2515 1.3.38.2 tron U8 Reserved2; /* 06h */ 2516 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2517 1.3.38.2 tron U32 MsgContext; /* 08h */ 2518 1.3.38.2 tron U8 FcPrimitive[4]; /* 0Ch */ 2519 1.3.38.2 tron } MSG_FC_PRIMITIVE_SEND_REQUEST, MPI_POINTER PTR_MSG_FC_PRIMITIVE_SEND_REQUEST, 2520 1.3.38.2 tron FcPrimitiveSendRequest_t, MPI_POINTER pFcPrimitiveSendRequest_t; 2521 1.3.38.2 tron 2522 1.3.38.2 tron #define MPI_FC_PRIM_SEND_FLAGS_PORT_MASK (0x01) 2523 1.3.38.2 tron #define MPI_FC_PRIM_SEND_FLAGS_RESET_LINK (0x04) 2524 1.3.38.2 tron #define MPI_FC_PRIM_SEND_FLAGS_STOP_SEND (0x08) 2525 1.3.38.2 tron #define MPI_FC_PRIM_SEND_FLAGS_SEND_ONCE (0x10) 2526 1.3.38.2 tron #define MPI_FC_PRIM_SEND_FLAGS_SEND_AROUND (0x20) 2527 1.3.38.2 tron #define MPI_FC_PRIM_SEND_FLAGS_UNTIL_FULL (0x40) 2528 1.3.38.2 tron #define MPI_FC_PRIM_SEND_FLAGS_FOREVER (0x80) 2529 1.3.38.2 tron 2530 1.3.38.2 tron /* FC Primitive Send Reply */ 2531 1.3.38.2 tron typedef struct _MSG_FC_PRIMITIVE_SEND_REPLY 2532 1.3.38.2 tron { 2533 1.3.38.2 tron U8 SendFlags; /* 00h */ 2534 1.3.38.2 tron U8 Reserved; /* 01h */ 2535 1.3.38.2 tron U8 MsgLength; /* 02h */ 2536 1.3.38.2 tron U8 Function; /* 03h */ 2537 1.3.38.2 tron U16 Reserved1; /* 04h */ 2538 1.3.38.2 tron U8 Reserved2; /* 06h */ 2539 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2540 1.3.38.2 tron U32 MsgContext; /* 08h */ 2541 1.3.38.2 tron U16 Reserved3; /* 0Ch */ 2542 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 2543 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 2544 1.3.38.2 tron } MSG_FC_PRIMITIVE_SEND_REPLY, MPI_POINTER PTR_MSG_FC_PRIMITIVE_SEND_REPLY, 2545 1.3.38.2 tron FcPrimitiveSendReply_t, MPI_POINTER pFcPrimitiveSendReply_t; 2546 1.3.38.2 tron 2547 1.3.38.2 tron #endif 2548 1.3.38.2 tron 2549 1.3.38.2 tron 2550 1.3.38.2 tron /* 2551 1.3.38.2 tron * Copyright (c) 2000, 2001 by LSI Logic Corporation 2552 1.3.38.2 tron * 2553 1.3.38.2 tron * Redistribution and use in source and binary forms, with or without 2554 1.3.38.2 tron * modification, are permitted provided that the following conditions 2555 1.3.38.2 tron * are met: 2556 1.3.38.2 tron * 1. Redistributions of source code must retain the above copyright 2557 1.3.38.2 tron * notice immediately at the beginning of the file, without modification, 2558 1.3.38.2 tron * this list of conditions, and the following disclaimer. 2559 1.3.38.2 tron * 2. The name of the author may not be used to endorse or promote products 2560 1.3.38.2 tron * derived from this software without specific prior written permission. 2561 1.3.38.2 tron * 2562 1.3.38.2 tron * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 2563 1.3.38.2 tron * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2564 1.3.38.2 tron * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2565 1.3.38.2 tron * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 2566 1.3.38.2 tron * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2567 1.3.38.2 tron * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2568 1.3.38.2 tron * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2569 1.3.38.2 tron * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2570 1.3.38.2 tron * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2571 1.3.38.2 tron * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2572 1.3.38.2 tron * SUCH DAMAGE. 2573 1.3.38.2 tron * 2574 1.3.38.2 tron * 2575 1.3.38.2 tron * Name: MPI_INIT.H 2576 1.3.38.2 tron * Title: MPI initiator mode messages and structures 2577 1.3.38.2 tron * Creation Date: June 8, 2000 2578 1.3.38.2 tron * 2579 1.3.38.2 tron * MPI Version: 01.02.04 2580 1.3.38.2 tron * 2581 1.3.38.2 tron * Version History 2582 1.3.38.2 tron * --------------- 2583 1.3.38.2 tron * 2584 1.3.38.2 tron * Date Version Description 2585 1.3.38.2 tron * -------- -------- ------------------------------------------------------ 2586 1.3.38.2 tron * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 2587 1.3.38.2 tron * 05-24-00 00.10.02 Added SenseBufferLength to _MSG_SCSI_IO_REPLY. 2588 1.3.38.2 tron * 06-06-00 01.00.01 Update version number for 1.0 release. 2589 1.3.38.2 tron * 06-08-00 01.00.02 Added MPI_SCSI_RSP_INFO_ definitions. 2590 1.3.38.2 tron * 11-02-00 01.01.01 Original release for post 1.0 work. 2591 1.3.38.2 tron * 12-04-00 01.01.02 Added MPI_SCSIIO_CONTROL_NO_DISCONNECT. 2592 1.3.38.2 tron * 02-20-01 01.01.03 Started using MPI_POINTER. 2593 1.3.38.2 tron * 03-27-01 01.01.04 Added structure offset comments. 2594 1.3.38.2 tron * 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT. 2595 1.3.38.2 tron * 08-08-01 01.02.01 Original release for v1.2 work. 2596 1.3.38.2 tron * 08-29-01 01.02.02 Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET. 2597 1.3.38.2 tron * Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for 2598 1.3.38.2 tron * MSG_SCSI_IO_REPLY. 2599 1.3.38.2 tron * 09-28-01 01.02.03 Added structures and defines for SCSI Enclosure 2600 1.3.38.2 tron * Processor messages. 2601 1.3.38.2 tron * 10-04-01 01.02.04 Added defines for SEP request Action field. 2602 1.3.38.2 tron * -------------------------------------------------------------------------- 2603 1.3.38.2 tron */ 2604 1.3.38.2 tron 2605 1.3.38.2 tron #ifndef MPI_INIT_H 2606 1.3.38.2 tron #define MPI_INIT_H 2607 1.3.38.2 tron 2608 1.3.38.2 tron 2609 1.3.38.2 tron /***************************************************************************** 2610 1.3.38.2 tron * 2611 1.3.38.2 tron * S C S I I n i t i a t o r M e s s a g e s 2612 1.3.38.2 tron * 2613 1.3.38.2 tron *****************************************************************************/ 2614 1.3.38.2 tron 2615 1.3.38.2 tron /****************************************************************************/ 2616 1.3.38.2 tron /* SCSI IO messages and assocaited structures */ 2617 1.3.38.2 tron /****************************************************************************/ 2618 1.3.38.2 tron 2619 1.3.38.2 tron typedef struct _MSG_SCSI_IO_REQUEST 2620 1.3.38.2 tron { 2621 1.3.38.2 tron U8 TargetID; /* 00h */ 2622 1.3.38.2 tron U8 Bus; /* 01h */ 2623 1.3.38.2 tron U8 ChainOffset; /* 02h */ 2624 1.3.38.2 tron U8 Function; /* 03h */ 2625 1.3.38.2 tron U8 CDBLength; /* 04h */ 2626 1.3.38.2 tron U8 SenseBufferLength; /* 05h */ 2627 1.3.38.2 tron U8 Reserved; /* 06h */ 2628 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2629 1.3.38.2 tron U32 MsgContext; /* 08h */ 2630 1.3.38.2 tron U8 LUN[8]; /* 0Ch */ 2631 1.3.38.2 tron U32 Control; /* 14h */ 2632 1.3.38.2 tron U8 CDB[16]; /* 18h */ 2633 1.3.38.2 tron U32 DataLength; /* 28h */ 2634 1.3.38.2 tron U32 SenseBufferLowAddr; /* 2Ch */ 2635 1.3.38.2 tron SGE_IO_UNION SGL; /* 30h */ 2636 1.3.38.2 tron } MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST, 2637 1.3.38.2 tron SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t; 2638 1.3.38.2 tron 2639 1.3.38.2 tron 2640 1.3.38.2 tron /* SCSIO MsgFlags bits */ 2641 1.3.38.2 tron 2642 1.3.38.2 tron #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01) 2643 1.3.38.2 tron #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00) 2644 1.3.38.2 tron #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01) 2645 1.3.38.2 tron #define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02) 2646 1.3.38.2 tron #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00) 2647 1.3.38.2 tron #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02) 2648 1.3.38.2 tron 2649 1.3.38.2 tron /* SCSIIO LUN fields */ 2650 1.3.38.2 tron 2651 1.3.38.2 tron #define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) 2652 1.3.38.2 tron #define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) 2653 1.3.38.2 tron #define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) 2654 1.3.38.2 tron #define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) 2655 1.3.38.2 tron #define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00) 2656 1.3.38.2 tron #define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00) 2657 1.3.38.2 tron 2658 1.3.38.2 tron /* SCSIO Control bits */ 2659 1.3.38.2 tron 2660 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000) 2661 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000) 2662 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_WRITE (0x01000000) 2663 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_READ (0x02000000) 2664 1.3.38.2 tron 2665 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000) 2666 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26) 2667 1.3.38.2 tron 2668 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700) 2669 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000) 2670 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100) 2671 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200) 2672 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_ACAQ (0x00000400) 2673 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500) 2674 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700) 2675 1.3.38.2 tron 2676 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000) 2677 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000) 2678 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000) 2679 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000) 2680 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000) 2681 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_RESERVED (0x00080000) 2682 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000) 2683 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000) 2684 1.3.38.2 tron #define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000) 2685 1.3.38.2 tron 2686 1.3.38.2 tron 2687 1.3.38.2 tron /* SCSIIO reply structure */ 2688 1.3.38.2 tron typedef struct _MSG_SCSI_IO_REPLY 2689 1.3.38.2 tron { 2690 1.3.38.2 tron U8 TargetID; /* 00h */ 2691 1.3.38.2 tron U8 Bus; /* 01h */ 2692 1.3.38.2 tron U8 MsgLength; /* 02h */ 2693 1.3.38.2 tron U8 Function; /* 03h */ 2694 1.3.38.2 tron U8 CDBLength; /* 04h */ 2695 1.3.38.2 tron U8 SenseBufferLength; /* 05h */ 2696 1.3.38.2 tron U8 Reserved; /* 06h */ 2697 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2698 1.3.38.2 tron U32 MsgContext; /* 08h */ 2699 1.3.38.2 tron U8 SCSIStatus; /* 0Ch */ 2700 1.3.38.2 tron U8 SCSIState; /* 0Dh */ 2701 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 2702 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 2703 1.3.38.2 tron U32 TransferCount; /* 14h */ 2704 1.3.38.2 tron U32 SenseCount; /* 18h */ 2705 1.3.38.2 tron U32 ResponseInfo; /* 1Ch */ 2706 1.3.38.2 tron } MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY, 2707 1.3.38.2 tron SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t; 2708 1.3.38.2 tron 2709 1.3.38.2 tron 2710 1.3.38.2 tron /* SCSIIO Reply SCSIStatus values (SAM-2 status codes) */ 2711 1.3.38.2 tron 2712 1.3.38.2 tron #define MPI_SCSI_STATUS_SUCCESS (0x00) 2713 1.3.38.2 tron #define MPI_SCSI_STATUS_CHECK_CONDITION (0x02) 2714 1.3.38.2 tron #define MPI_SCSI_STATUS_CONDITION_MET (0x04) 2715 1.3.38.2 tron #define MPI_SCSI_STATUS_BUSY (0x08) 2716 1.3.38.2 tron #define MPI_SCSI_STATUS_INTERMEDIATE (0x10) 2717 1.3.38.2 tron #define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14) 2718 1.3.38.2 tron #define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18) 2719 1.3.38.2 tron #define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22) 2720 1.3.38.2 tron #define MPI_SCSI_STATUS_TASK_SET_FULL (0x28) 2721 1.3.38.2 tron #define MPI_SCSI_STATUS_ACA_ACTIVE (0x30) 2722 1.3.38.2 tron 2723 1.3.38.2 tron 2724 1.3.38.2 tron /* SCSIIO Reply SCSIState values */ 2725 1.3.38.2 tron 2726 1.3.38.2 tron #define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01) 2727 1.3.38.2 tron #define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02) 2728 1.3.38.2 tron #define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04) 2729 1.3.38.2 tron #define MPI_SCSI_STATE_TERMINATED (0x08) 2730 1.3.38.2 tron #define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10) 2731 1.3.38.2 tron #define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20) 2732 1.3.38.2 tron 2733 1.3.38.2 tron /* SCSIIO Reply ResponseInfo values */ 2734 1.3.38.2 tron /* (FCP-1 RSP_CODE values and SPI-3 Packetized Failure codes) */ 2735 1.3.38.2 tron 2736 1.3.38.2 tron #define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000) 2737 1.3.38.2 tron #define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000) 2738 1.3.38.2 tron #define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000) 2739 1.3.38.2 tron #define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000) 2740 1.3.38.2 tron #define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000) 2741 1.3.38.2 tron #define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000) 2742 1.3.38.2 tron #define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000) 2743 1.3.38.2 tron 2744 1.3.38.2 tron 2745 1.3.38.2 tron /****************************************************************************/ 2746 1.3.38.2 tron /* SCSI Task Management messages */ 2747 1.3.38.2 tron /****************************************************************************/ 2748 1.3.38.2 tron 2749 1.3.38.2 tron typedef struct _MSG_SCSI_TASK_MGMT 2750 1.3.38.2 tron { 2751 1.3.38.2 tron U8 TargetID; /* 00h */ 2752 1.3.38.2 tron U8 Bus; /* 01h */ 2753 1.3.38.2 tron U8 ChainOffset; /* 02h */ 2754 1.3.38.2 tron U8 Function; /* 03h */ 2755 1.3.38.2 tron U8 Reserved; /* 04h */ 2756 1.3.38.2 tron U8 TaskType; /* 05h */ 2757 1.3.38.2 tron U8 Reserved1; /* 06h */ 2758 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2759 1.3.38.2 tron U32 MsgContext; /* 08h */ 2760 1.3.38.2 tron U8 LUN[8]; /* 0Ch */ 2761 1.3.38.2 tron U32 Reserved2[7]; /* 14h */ 2762 1.3.38.2 tron U32 TaskMsgContext; /* 30h */ 2763 1.3.38.2 tron } MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT, 2764 1.3.38.2 tron SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t; 2765 1.3.38.2 tron 2766 1.3.38.2 tron /* TaskType values */ 2767 1.3.38.2 tron 2768 1.3.38.2 tron #define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01) 2769 1.3.38.2 tron #define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02) 2770 1.3.38.2 tron #define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03) 2771 1.3.38.2 tron #define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04) 2772 1.3.38.2 tron #define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05) 2773 1.3.38.2 tron 2774 1.3.38.2 tron /* MsgFlags bits */ 2775 1.3.38.2 tron #define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00) 2776 1.3.38.2 tron #define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02) 2777 1.3.38.2 tron #define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04) 2778 1.3.38.2 tron 2779 1.3.38.2 tron /* SCSI Task Management Reply */ 2780 1.3.38.2 tron typedef struct _MSG_SCSI_TASK_MGMT_REPLY 2781 1.3.38.2 tron { 2782 1.3.38.2 tron U8 TargetID; /* 00h */ 2783 1.3.38.2 tron U8 Bus; /* 01h */ 2784 1.3.38.2 tron U8 MsgLength; /* 02h */ 2785 1.3.38.2 tron U8 Function; /* 03h */ 2786 1.3.38.2 tron U8 Reserved; /* 04h */ 2787 1.3.38.2 tron U8 TaskType; /* 05h */ 2788 1.3.38.2 tron U8 Reserved1; /* 06h */ 2789 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2790 1.3.38.2 tron U32 MsgContext; /* 08h */ 2791 1.3.38.2 tron U8 Reserved2[2]; /* 0Ch */ 2792 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 2793 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 2794 1.3.38.2 tron U32 TerminationCount; /* 14h */ 2795 1.3.38.2 tron } MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY, 2796 1.3.38.2 tron SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t; 2797 1.3.38.2 tron 2798 1.3.38.2 tron 2799 1.3.38.2 tron /****************************************************************************/ 2800 1.3.38.2 tron /* SCSI Enclosure Processor messages */ 2801 1.3.38.2 tron /****************************************************************************/ 2802 1.3.38.2 tron 2803 1.3.38.2 tron typedef struct _MSG_SEP_REQUEST 2804 1.3.38.2 tron { 2805 1.3.38.2 tron U8 TargetID; /* 00h */ 2806 1.3.38.2 tron U8 Bus; /* 01h */ 2807 1.3.38.2 tron U8 ChainOffset; /* 02h */ 2808 1.3.38.2 tron U8 Function; /* 03h */ 2809 1.3.38.2 tron U8 Action; /* 04h */ 2810 1.3.38.2 tron U8 Reserved1; /* 05h */ 2811 1.3.38.2 tron U8 Reserved2; /* 06h */ 2812 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2813 1.3.38.2 tron U32 MsgContext; /* 08h */ 2814 1.3.38.2 tron U32 SlotStatus; /* 0Ch */ 2815 1.3.38.2 tron } MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST, 2816 1.3.38.2 tron SEPRequest_t, MPI_POINTER pSEPRequest_t; 2817 1.3.38.2 tron 2818 1.3.38.2 tron /* Action defines */ 2819 1.3.38.2 tron #define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00) 2820 1.3.38.2 tron #define MPI_SEP_REQ_ACTION_READ_STATUS (0x01) 2821 1.3.38.2 tron 2822 1.3.38.2 tron /* SlotStatus bits for MSG_SEP_REQUEST */ 2823 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001) 2824 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002) 2825 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004) 2826 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 2827 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 2828 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020) 2829 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 2830 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080) 2831 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100) 2832 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 2833 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 2834 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000) 2835 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000) 2836 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000) 2837 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000) 2838 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000) 2839 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000) 2840 1.3.38.2 tron #define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000) 2841 1.3.38.2 tron 2842 1.3.38.2 tron 2843 1.3.38.2 tron typedef struct _MSG_SEP_REPLY 2844 1.3.38.2 tron { 2845 1.3.38.2 tron U8 TargetID; /* 00h */ 2846 1.3.38.2 tron U8 Bus; /* 01h */ 2847 1.3.38.2 tron U8 MsgLength; /* 02h */ 2848 1.3.38.2 tron U8 Function; /* 03h */ 2849 1.3.38.2 tron U8 Action; /* 04h */ 2850 1.3.38.2 tron U8 Reserved1; /* 05h */ 2851 1.3.38.2 tron U8 Reserved2; /* 06h */ 2852 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2853 1.3.38.2 tron U32 MsgContext; /* 08h */ 2854 1.3.38.2 tron U16 Reserved3; /* 0Ch */ 2855 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 2856 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 2857 1.3.38.2 tron U32 SlotStatus; /* 14h */ 2858 1.3.38.2 tron } MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY, 2859 1.3.38.2 tron SEPReply_t, MPI_POINTER pSEPReply_t; 2860 1.3.38.2 tron 2861 1.3.38.2 tron /* SlotStatus bits for MSG_SEP_REPLY */ 2862 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001) 2863 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002) 2864 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004) 2865 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 2866 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 2867 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020) 2868 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 2869 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080) 2870 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100) 2871 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 2872 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000) 2873 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 2874 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000) 2875 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000) 2876 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000) 2877 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000) 2878 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000) 2879 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000) 2880 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000) 2881 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000) 2882 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000) 2883 1.3.38.2 tron #define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000) 2884 1.3.38.2 tron 2885 1.3.38.2 tron #endif 2886 1.3.38.2 tron 2887 1.3.38.2 tron /* 2888 1.3.38.2 tron * Copyright (c) 2000, 2001 by LSI Logic Corporation 2889 1.3.38.2 tron * 2890 1.3.38.2 tron * Redistribution and use in source and binary forms, with or without 2891 1.3.38.2 tron * modification, are permitted provided that the following conditions 2892 1.3.38.2 tron * are met: 2893 1.3.38.2 tron * 1. Redistributions of source code must retain the above copyright 2894 1.3.38.2 tron * notice immediately at the beginning of the file, without modification, 2895 1.3.38.2 tron * this list of conditions, and the following disclaimer. 2896 1.3.38.2 tron * 2. The name of the author may not be used to endorse or promote products 2897 1.3.38.2 tron * derived from this software without specific prior written permission. 2898 1.3.38.2 tron * 2899 1.3.38.2 tron * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 2900 1.3.38.2 tron * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2901 1.3.38.2 tron * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2902 1.3.38.2 tron * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 2903 1.3.38.2 tron * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2904 1.3.38.2 tron * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2905 1.3.38.2 tron * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2906 1.3.38.2 tron * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2907 1.3.38.2 tron * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2908 1.3.38.2 tron * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2909 1.3.38.2 tron * SUCH DAMAGE. 2910 1.3.38.2 tron * 2911 1.3.38.2 tron * 2912 1.3.38.2 tron * Name: MPI_IOC.H 2913 1.3.38.2 tron * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages 2914 1.3.38.2 tron * Creation Date: August 11, 2000 2915 1.3.38.2 tron * 2916 1.3.38.2 tron * MPI Version: 01.02.04 2917 1.3.38.2 tron * 2918 1.3.38.2 tron * Version History 2919 1.3.38.2 tron * --------------- 2920 1.3.38.2 tron * 2921 1.3.38.2 tron * Date Version Description 2922 1.3.38.2 tron * -------- -------- ------------------------------------------------------ 2923 1.3.38.2 tron * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 2924 1.3.38.2 tron * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure. 2925 1.3.38.2 tron * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY. 2926 1.3.38.2 tron * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure. 2927 1.3.38.2 tron * Added _MSG_EVENT_ACK_REPLY structure. 2928 1.3.38.2 tron * Added _MSG_FW_DOWNLOAD_REPLY structure. 2929 1.3.38.2 tron * Added _MSG_TOOLBOX_REPLY structure. 2930 1.3.38.2 tron * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure. 2931 1.3.38.2 tron * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI, 2932 1.3.38.2 tron * _LINK_STATUS, _LOOP_STATE and _LOGOUT. 2933 1.3.38.2 tron * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in 2934 1.3.38.2 tron * _MSG_EVENT_ACK_REPLY structure to match specification. 2935 1.3.38.2 tron * 11-02-00 01.01.01 Original release for post 1.0 work. 2936 1.3.38.2 tron * Added a value for Manufacturer to WhoInit. 2937 1.3.38.2 tron * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and 2938 1.3.38.2 tron * removed toolbox message. 2939 1.3.38.2 tron * 01-09-01 01.01.03 Added event enabled and disabled defines. 2940 1.3.38.2 tron * Added structures for FwHeader and DataHeader. 2941 1.3.38.2 tron * Added ImageType to FwUpload reply. 2942 1.3.38.2 tron * 02-20-01 01.01.04 Started using MPI_POINTER. 2943 1.3.38.2 tron * 02-27-01 01.01.05 Added event for RAID status change and its event data. 2944 1.3.38.2 tron * Added IocNumber field to MSG_IOC_FACTS_REPLY. 2945 1.3.38.2 tron * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER. 2946 1.3.38.2 tron * Added structure offset comments. 2947 1.3.38.2 tron * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE. 2948 1.3.38.2 tron * 08-08-01 01.02.01 Original release for v1.2 work. 2949 1.3.38.2 tron * New format for FWVersion and ProductId in 2950 1.3.38.2 tron * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER. 2951 1.3.38.2 tron * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and 2952 1.3.38.2 tron * related structure and defines. 2953 1.3.38.2 tron * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED. 2954 1.3.38.2 tron * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE. 2955 1.3.38.2 tron * Replaced a reserved field in MSG_IOC_FACTS_REPLY with 2956 1.3.38.2 tron * IOCExceptions and changed DataImageSize to reserved. 2957 1.3.38.2 tron * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and 2958 1.3.38.2 tron * MPI_FW_UPLOAD_ITYPE_NVDATA. 2959 1.3.38.2 tron * 09-28-01 01.02.03 Modified Event Data for Integrated RAID. 2960 1.3.38.2 tron * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field. 2961 1.3.38.2 tron * -------------------------------------------------------------------------- 2962 1.3.38.2 tron */ 2963 1.3.38.2 tron 2964 1.3.38.2 tron #ifndef MPI_IOC_H 2965 1.3.38.2 tron #define MPI_IOC_H 2966 1.3.38.2 tron 2967 1.3.38.2 tron 2968 1.3.38.2 tron /***************************************************************************** 2969 1.3.38.2 tron * 2970 1.3.38.2 tron * I O C M e s s a g e s 2971 1.3.38.2 tron * 2972 1.3.38.2 tron *****************************************************************************/ 2973 1.3.38.2 tron 2974 1.3.38.2 tron /****************************************************************************/ 2975 1.3.38.2 tron /* IOCInit message */ 2976 1.3.38.2 tron /****************************************************************************/ 2977 1.3.38.2 tron 2978 1.3.38.2 tron typedef struct _MSG_IOC_INIT 2979 1.3.38.2 tron { 2980 1.3.38.2 tron U8 WhoInit; /* 00h */ 2981 1.3.38.2 tron U8 Reserved; /* 01h */ 2982 1.3.38.2 tron U8 ChainOffset; /* 02h */ 2983 1.3.38.2 tron U8 Function; /* 03h */ 2984 1.3.38.2 tron U8 Flags; /* 04h */ 2985 1.3.38.2 tron U8 MaxDevices; /* 05h */ 2986 1.3.38.2 tron U8 MaxBuses; /* 06h */ 2987 1.3.38.2 tron U8 MsgFlags; /* 07h */ 2988 1.3.38.2 tron U32 MsgContext; /* 08h */ 2989 1.3.38.2 tron U16 ReplyFrameSize; /* 0Ch */ 2990 1.3.38.2 tron U8 Reserved1[2]; /* 0Eh */ 2991 1.3.38.2 tron U32 HostMfaHighAddr; /* 10h */ 2992 1.3.38.2 tron U32 SenseBufferHighAddr; /* 14h */ 2993 1.3.38.2 tron } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT, 2994 1.3.38.2 tron IOCInit_t, MPI_POINTER pIOCInit_t; 2995 1.3.38.2 tron 2996 1.3.38.2 tron /* WhoInit values */ 2997 1.3.38.2 tron #define MPI_WHOINIT_NO_ONE (0x00) 2998 1.3.38.2 tron #define MPI_WHOINIT_SYSTEM_BIOS (0x01) 2999 1.3.38.2 tron #define MPI_WHOINIT_ROM_BIOS (0x02) 3000 1.3.38.2 tron #define MPI_WHOINIT_PCI_PEER (0x03) 3001 1.3.38.2 tron #define MPI_WHOINIT_HOST_DRIVER (0x04) 3002 1.3.38.2 tron #define MPI_WHOINIT_MANUFACTURER (0x05) 3003 1.3.38.2 tron 3004 1.3.38.2 tron /* Flags values */ 3005 1.3.38.2 tron #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01) 3006 1.3.38.2 tron 3007 1.3.38.2 tron typedef struct _MSG_IOC_INIT_REPLY 3008 1.3.38.2 tron { 3009 1.3.38.2 tron U8 WhoInit; /* 00h */ 3010 1.3.38.2 tron U8 Reserved; /* 01h */ 3011 1.3.38.2 tron U8 MsgLength; /* 02h */ 3012 1.3.38.2 tron U8 Function; /* 03h */ 3013 1.3.38.2 tron U8 Flags; /* 04h */ 3014 1.3.38.2 tron U8 MaxDevices; /* 05h */ 3015 1.3.38.2 tron U8 MaxBuses; /* 06h */ 3016 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3017 1.3.38.2 tron U32 MsgContext; /* 08h */ 3018 1.3.38.2 tron U16 Reserved2; /* 0Ch */ 3019 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 3020 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 3021 1.3.38.2 tron } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY, 3022 1.3.38.2 tron IOCInitReply_t, MPI_POINTER pIOCInitReply_t; 3023 1.3.38.2 tron 3024 1.3.38.2 tron 3025 1.3.38.2 tron 3026 1.3.38.2 tron /****************************************************************************/ 3027 1.3.38.2 tron /* IOC Facts message */ 3028 1.3.38.2 tron /****************************************************************************/ 3029 1.3.38.2 tron 3030 1.3.38.2 tron typedef struct _MSG_IOC_FACTS 3031 1.3.38.2 tron { 3032 1.3.38.2 tron U8 Reserved[2]; /* 00h */ 3033 1.3.38.2 tron U8 ChainOffset; /* 01h */ 3034 1.3.38.2 tron U8 Function; /* 02h */ 3035 1.3.38.2 tron U8 Reserved1[3]; /* 03h */ 3036 1.3.38.2 tron U8 MsgFlags; /* 04h */ 3037 1.3.38.2 tron U32 MsgContext; /* 08h */ 3038 1.3.38.2 tron } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS, 3039 1.3.38.2 tron IOCFacts_t, MPI_POINTER pIOCFacts_t; 3040 1.3.38.2 tron 3041 1.3.38.2 tron typedef struct _MPI_FW_VERSION_STRUCT 3042 1.3.38.2 tron { 3043 1.3.38.2 tron U8 Dev; /* 00h */ 3044 1.3.38.2 tron U8 Unit; /* 01h */ 3045 1.3.38.2 tron U8 Minor; /* 02h */ 3046 1.3.38.2 tron U8 Major; /* 03h */ 3047 1.3.38.2 tron } MPI_FW_VERSION_STRUCT; 3048 1.3.38.2 tron 3049 1.3.38.2 tron typedef union _MPI_FW_VERSION 3050 1.3.38.2 tron { 3051 1.3.38.2 tron MPI_FW_VERSION_STRUCT Struct; 3052 1.3.38.2 tron U32 Word; 3053 1.3.38.2 tron } MPI_FW_VERSION; 3054 1.3.38.2 tron 3055 1.3.38.2 tron /* IOC Facts Reply */ 3056 1.3.38.2 tron typedef struct _MSG_IOC_FACTS_REPLY 3057 1.3.38.2 tron { 3058 1.3.38.2 tron U16 MsgVersion; /* 00h */ 3059 1.3.38.2 tron U8 MsgLength; /* 02h */ 3060 1.3.38.2 tron U8 Function; /* 03h */ 3061 1.3.38.2 tron U16 Reserved; /* 04h */ 3062 1.3.38.2 tron U8 IOCNumber; /* 06h */ 3063 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3064 1.3.38.2 tron U32 MsgContext; /* 08h */ 3065 1.3.38.2 tron U16 IOCExceptions; /* 0Ch */ 3066 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 3067 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 3068 1.3.38.2 tron U8 MaxChainDepth; /* 14h */ 3069 1.3.38.2 tron U8 WhoInit; /* 15h */ 3070 1.3.38.2 tron U8 BlockSize; /* 16h */ 3071 1.3.38.2 tron U8 Flags; /* 17h */ 3072 1.3.38.2 tron U16 ReplyQueueDepth; /* 18h */ 3073 1.3.38.2 tron U16 RequestFrameSize; /* 1Ah */ 3074 1.3.38.2 tron U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */ 3075 1.3.38.2 tron U16 ProductID; /* 1Eh */ 3076 1.3.38.2 tron U32 CurrentHostMfaHighAddr; /* 20h */ 3077 1.3.38.2 tron U16 GlobalCredits; /* 24h */ 3078 1.3.38.2 tron U8 NumberOfPorts; /* 26h */ 3079 1.3.38.2 tron U8 EventState; /* 27h */ 3080 1.3.38.2 tron U32 CurrentSenseBufferHighAddr; /* 28h */ 3081 1.3.38.2 tron U16 CurReplyFrameSize; /* 2Ch */ 3082 1.3.38.2 tron U8 MaxDevices; /* 2Eh */ 3083 1.3.38.2 tron U8 MaxBuses; /* 2Fh */ 3084 1.3.38.2 tron U32 FWImageSize; /* 30h */ 3085 1.3.38.2 tron U32 Reserved4; /* 34h */ 3086 1.3.38.2 tron MPI_FW_VERSION FWVersion; /* 38h */ 3087 1.3.38.2 tron } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY, 3088 1.3.38.2 tron IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t; 3089 1.3.38.2 tron 3090 1.3.38.2 tron #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00) 3091 1.3.38.2 tron #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF) 3092 1.3.38.2 tron 3093 1.3.38.2 tron #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001) 3094 1.3.38.2 tron 3095 1.3.38.2 tron #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01) 3096 1.3.38.2 tron 3097 1.3.38.2 tron #define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00) 3098 1.3.38.2 tron #define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01) 3099 1.3.38.2 tron 3100 1.3.38.2 tron 3101 1.3.38.2 tron 3102 1.3.38.2 tron /***************************************************************************** 3103 1.3.38.2 tron * 3104 1.3.38.2 tron * P o r t M e s s a g e s 3105 1.3.38.2 tron * 3106 1.3.38.2 tron *****************************************************************************/ 3107 1.3.38.2 tron 3108 1.3.38.2 tron /****************************************************************************/ 3109 1.3.38.2 tron /* Port Facts message and Reply */ 3110 1.3.38.2 tron /****************************************************************************/ 3111 1.3.38.2 tron 3112 1.3.38.2 tron typedef struct _MSG_PORT_FACTS 3113 1.3.38.2 tron { 3114 1.3.38.2 tron U8 Reserved[2]; /* 00h */ 3115 1.3.38.2 tron U8 ChainOffset; /* 02h */ 3116 1.3.38.2 tron U8 Function; /* 03h */ 3117 1.3.38.2 tron U8 Reserved1[2]; /* 04h */ 3118 1.3.38.2 tron U8 PortNumber; /* 06h */ 3119 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3120 1.3.38.2 tron U32 MsgContext; /* 08h */ 3121 1.3.38.2 tron } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS, 3122 1.3.38.2 tron PortFacts_t, MPI_POINTER pPortFacts_t; 3123 1.3.38.2 tron 3124 1.3.38.2 tron typedef struct _MSG_PORT_FACTS_REPLY 3125 1.3.38.2 tron { 3126 1.3.38.2 tron U16 Reserved; /* 00h */ 3127 1.3.38.2 tron U8 MsgLength; /* 02h */ 3128 1.3.38.2 tron U8 Function; /* 03h */ 3129 1.3.38.2 tron U16 Reserved1; /* 04h */ 3130 1.3.38.2 tron U8 PortNumber; /* 06h */ 3131 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3132 1.3.38.2 tron U32 MsgContext; /* 08h */ 3133 1.3.38.2 tron U16 Reserved2; /* 0Ch */ 3134 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 3135 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 3136 1.3.38.2 tron U8 Reserved3; /* 14h */ 3137 1.3.38.2 tron U8 PortType; /* 15h */ 3138 1.3.38.2 tron U16 MaxDevices; /* 16h */ 3139 1.3.38.2 tron U16 PortSCSIID; /* 18h */ 3140 1.3.38.2 tron U16 ProtocolFlags; /* 1Ah */ 3141 1.3.38.2 tron U16 MaxPostedCmdBuffers; /* 1Ch */ 3142 1.3.38.2 tron U16 MaxPersistentIDs; /* 1Eh */ 3143 1.3.38.2 tron U16 MaxLanBuckets; /* 20h */ 3144 1.3.38.2 tron U16 Reserved4; /* 22h */ 3145 1.3.38.2 tron U32 Reserved5; /* 24h */ 3146 1.3.38.2 tron } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY, 3147 1.3.38.2 tron PortFactsReply_t, MPI_POINTER pPortFactsReply_t; 3148 1.3.38.2 tron 3149 1.3.38.2 tron 3150 1.3.38.2 tron /* PortTypes values */ 3151 1.3.38.2 tron 3152 1.3.38.2 tron #define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00) 3153 1.3.38.2 tron #define MPI_PORTFACTS_PORTTYPE_SCSI (0x01) 3154 1.3.38.2 tron #define MPI_PORTFACTS_PORTTYPE_FC (0x10) 3155 1.3.38.2 tron #define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20) 3156 1.3.38.2 tron #define MPI_PORTFACTS_PORTTYPE_SAS (0x30) 3157 1.3.38.2 tron 3158 1.3.38.2 tron /* ProtocolFlags values */ 3159 1.3.38.2 tron 3160 1.3.38.2 tron #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01) 3161 1.3.38.2 tron #define MPI_PORTFACTS_PROTOCOL_LAN (0x02) 3162 1.3.38.2 tron #define MPI_PORTFACTS_PROTOCOL_TARGET (0x04) 3163 1.3.38.2 tron #define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08) 3164 1.3.38.2 tron 3165 1.3.38.2 tron 3166 1.3.38.2 tron /****************************************************************************/ 3167 1.3.38.2 tron /* Port Enable Message */ 3168 1.3.38.2 tron /****************************************************************************/ 3169 1.3.38.2 tron 3170 1.3.38.2 tron typedef struct _MSG_PORT_ENABLE 3171 1.3.38.2 tron { 3172 1.3.38.2 tron U8 Reserved[2]; /* 00h */ 3173 1.3.38.2 tron U8 ChainOffset; /* 02h */ 3174 1.3.38.2 tron U8 Function; /* 03h */ 3175 1.3.38.2 tron U8 Reserved1[2]; /* 04h */ 3176 1.3.38.2 tron U8 PortNumber; /* 06h */ 3177 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3178 1.3.38.2 tron U32 MsgContext; /* 08h */ 3179 1.3.38.2 tron } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE, 3180 1.3.38.2 tron PortEnable_t, MPI_POINTER pPortEnable_t; 3181 1.3.38.2 tron 3182 1.3.38.2 tron typedef struct _MSG_PORT_ENABLE_REPLY 3183 1.3.38.2 tron { 3184 1.3.38.2 tron U8 Reserved[2]; /* 00h */ 3185 1.3.38.2 tron U8 MsgLength; /* 02h */ 3186 1.3.38.2 tron U8 Function; /* 03h */ 3187 1.3.38.2 tron U8 Reserved1[2]; /* 04h */ 3188 1.3.38.2 tron U8 PortNumber; /* 05h */ 3189 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3190 1.3.38.2 tron U32 MsgContext; /* 08h */ 3191 1.3.38.2 tron U16 Reserved2; /* 0Ch */ 3192 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 3193 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 3194 1.3.38.2 tron } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY, 3195 1.3.38.2 tron PortEnableReply_t, MPI_POINTER pPortEnableReply_t; 3196 1.3.38.2 tron 3197 1.3.38.2 tron 3198 1.3.38.2 tron /***************************************************************************** 3199 1.3.38.2 tron * 3200 1.3.38.2 tron * E v e n t M e s s a g e s 3201 1.3.38.2 tron * 3202 1.3.38.2 tron *****************************************************************************/ 3203 1.3.38.2 tron 3204 1.3.38.2 tron /****************************************************************************/ 3205 1.3.38.2 tron /* Event Notification messages */ 3206 1.3.38.2 tron /****************************************************************************/ 3207 1.3.38.2 tron 3208 1.3.38.2 tron typedef struct _MSG_EVENT_NOTIFY 3209 1.3.38.2 tron { 3210 1.3.38.2 tron U8 Switch; /* 00h */ 3211 1.3.38.2 tron U8 Reserved; /* 01h */ 3212 1.3.38.2 tron U8 ChainOffset; /* 02h */ 3213 1.3.38.2 tron U8 Function; /* 03h */ 3214 1.3.38.2 tron U8 Reserved1[3]; /* 04h */ 3215 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3216 1.3.38.2 tron U32 MsgContext; /* 08h */ 3217 1.3.38.2 tron } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY, 3218 1.3.38.2 tron EventNotification_t, MPI_POINTER pEventNotification_t; 3219 1.3.38.2 tron 3220 1.3.38.2 tron /* Event Notification Reply */ 3221 1.3.38.2 tron 3222 1.3.38.2 tron typedef struct _MSG_EVENT_NOTIFY_REPLY 3223 1.3.38.2 tron { 3224 1.3.38.2 tron U16 EventDataLength; /* 00h */ 3225 1.3.38.2 tron U8 MsgLength; /* 02h */ 3226 1.3.38.2 tron U8 Function; /* 03h */ 3227 1.3.38.2 tron U8 Reserved1[2]; /* 04h */ 3228 1.3.38.2 tron U8 AckRequired; /* 06h */ 3229 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3230 1.3.38.2 tron U32 MsgContext; /* 08h */ 3231 1.3.38.2 tron U8 Reserved2[2]; /* 0Ch */ 3232 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 3233 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 3234 1.3.38.2 tron U32 Event; /* 14h */ 3235 1.3.38.2 tron U32 EventContext; /* 18h */ 3236 1.3.38.2 tron U32 Data[1]; /* 1Ch */ 3237 1.3.38.2 tron } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY, 3238 1.3.38.2 tron EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t; 3239 1.3.38.2 tron 3240 1.3.38.2 tron /* Event Acknowledge */ 3241 1.3.38.2 tron 3242 1.3.38.2 tron typedef struct _MSG_EVENT_ACK 3243 1.3.38.2 tron { 3244 1.3.38.2 tron U8 Reserved[2]; /* 00h */ 3245 1.3.38.2 tron U8 ChainOffset; /* 02h */ 3246 1.3.38.2 tron U8 Function; /* 03h */ 3247 1.3.38.2 tron U8 Reserved1[3]; /* 04h */ 3248 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3249 1.3.38.2 tron U32 MsgContext; /* 08h */ 3250 1.3.38.2 tron U32 Event; /* 0Ch */ 3251 1.3.38.2 tron U32 EventContext; /* 10h */ 3252 1.3.38.2 tron } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK, 3253 1.3.38.2 tron EventAck_t, MPI_POINTER pEventAck_t; 3254 1.3.38.2 tron 3255 1.3.38.2 tron typedef struct _MSG_EVENT_ACK_REPLY 3256 1.3.38.2 tron { 3257 1.3.38.2 tron U8 Reserved[2]; /* 00h */ 3258 1.3.38.2 tron U8 MsgLength; /* 02h */ 3259 1.3.38.2 tron U8 Function; /* 03h */ 3260 1.3.38.2 tron U8 Reserved1[3]; /* 04h */ 3261 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3262 1.3.38.2 tron U32 MsgContext; /* 08h */ 3263 1.3.38.2 tron U16 Reserved2; /* 0Ch */ 3264 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 3265 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 3266 1.3.38.2 tron } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY, 3267 1.3.38.2 tron EventAckReply_t, MPI_POINTER pEventAckReply_t; 3268 1.3.38.2 tron 3269 1.3.38.2 tron /* Switch */ 3270 1.3.38.2 tron 3271 1.3.38.2 tron #define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00) 3272 1.3.38.2 tron #define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01) 3273 1.3.38.2 tron 3274 1.3.38.2 tron /* Event */ 3275 1.3.38.2 tron 3276 1.3.38.2 tron #define MPI_EVENT_NONE (0x00000000) 3277 1.3.38.2 tron #define MPI_EVENT_LOG_DATA (0x00000001) 3278 1.3.38.2 tron #define MPI_EVENT_STATE_CHANGE (0x00000002) 3279 1.3.38.2 tron #define MPI_EVENT_UNIT_ATTENTION (0x00000003) 3280 1.3.38.2 tron #define MPI_EVENT_IOC_BUS_RESET (0x00000004) 3281 1.3.38.2 tron #define MPI_EVENT_EXT_BUS_RESET (0x00000005) 3282 1.3.38.2 tron #define MPI_EVENT_RESCAN (0x00000006) 3283 1.3.38.2 tron #define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007) 3284 1.3.38.2 tron #define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008) 3285 1.3.38.2 tron #define MPI_EVENT_LOGOUT (0x00000009) 3286 1.3.38.2 tron #define MPI_EVENT_EVENT_CHANGE (0x0000000A) 3287 1.3.38.2 tron #define MPI_EVENT_INTEGRATED_RAID (0x0000000B) 3288 1.3.38.2 tron #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C) 3289 1.3.38.2 tron #define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D) 3290 1.3.38.2 tron #define MPI_EVENT_QUEUE_FULL (0x0000000E) 3291 1.3.38.2 tron #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F) 3292 1.3.38.2 tron #define MPI_EVENT_SAS_SES (0x00000010) 3293 1.3.38.2 tron #define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011) 3294 1.3.38.2 tron #define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012) 3295 1.3.38.2 tron #define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013) 3296 1.3.38.2 tron #define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014) 3297 1.3.38.2 tron #define MPI_EVENT_IR2 (0x00000015) 3298 1.3.38.2 tron #define MPI_EVENT_SAS_DISCOVERY (0x00000016) 3299 1.3.38.2 tron 3300 1.3.38.2 tron /* AckRequired field values */ 3301 1.3.38.2 tron 3302 1.3.38.2 tron #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00) 3303 1.3.38.2 tron #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01) 3304 1.3.38.2 tron 3305 1.3.38.2 tron /* EventChange Event data */ 3306 1.3.38.2 tron 3307 1.3.38.2 tron typedef struct _EVENT_DATA_EVENT_CHANGE 3308 1.3.38.2 tron { 3309 1.3.38.2 tron U8 EventState; /* 00h */ 3310 1.3.38.2 tron U8 Reserved; /* 01h */ 3311 1.3.38.2 tron U16 Reserved1; /* 02h */ 3312 1.3.38.2 tron } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE, 3313 1.3.38.2 tron EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t; 3314 1.3.38.2 tron 3315 1.3.38.2 tron /* SCSI Event data for Port, Bus and Device forms */ 3316 1.3.38.2 tron 3317 1.3.38.2 tron typedef struct _EVENT_DATA_SCSI 3318 1.3.38.2 tron { 3319 1.3.38.2 tron U8 TargetID; /* 00h */ 3320 1.3.38.2 tron U8 BusPort; /* 01h */ 3321 1.3.38.2 tron U16 Reserved; /* 02h */ 3322 1.3.38.2 tron } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI, 3323 1.3.38.2 tron EventDataScsi_t, MPI_POINTER pEventDataScsi_t; 3324 1.3.38.2 tron 3325 1.3.38.2 tron /* SCSI Device Status Change Event data */ 3326 1.3.38.2 tron 3327 1.3.38.2 tron typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE 3328 1.3.38.2 tron { 3329 1.3.38.2 tron U8 TargetID; /* 00h */ 3330 1.3.38.2 tron U8 Bus; /* 01h */ 3331 1.3.38.2 tron U8 ReasonCode; /* 02h */ 3332 1.3.38.2 tron U8 LUN; /* 03h */ 3333 1.3.38.2 tron U8 ASC; /* 04h */ 3334 1.3.38.2 tron U8 ASCQ; /* 05h */ 3335 1.3.38.2 tron U16 Reserved; /* 06h */ 3336 1.3.38.2 tron } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE, 3337 1.3.38.2 tron MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE, 3338 1.3.38.2 tron MpiEventDataScsiDeviceStatusChange_t, 3339 1.3.38.2 tron MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t; 3340 1.3.38.2 tron 3341 1.3.38.2 tron /* MPI SCSI Device Status Change Event data ReasonCode values */ 3342 1.3.38.2 tron #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03) 3343 1.3.38.2 tron #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04) 3344 1.3.38.2 tron #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05) 3345 1.3.38.2 tron 3346 1.3.38.2 tron /* MPI Link Status Change Event data */ 3347 1.3.38.2 tron 3348 1.3.38.2 tron typedef struct _EVENT_DATA_LINK_STATUS 3349 1.3.38.2 tron { 3350 1.3.38.2 tron U8 State; /* 00h */ 3351 1.3.38.2 tron U8 Reserved; /* 01h */ 3352 1.3.38.2 tron U16 Reserved1; /* 02h */ 3353 1.3.38.2 tron U8 Reserved2; /* 04h */ 3354 1.3.38.2 tron U8 Port; /* 05h */ 3355 1.3.38.2 tron U16 Reserved3; /* 06h */ 3356 1.3.38.2 tron } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS, 3357 1.3.38.2 tron EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t; 3358 1.3.38.2 tron 3359 1.3.38.2 tron #define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000) 3360 1.3.38.2 tron #define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001) 3361 1.3.38.2 tron 3362 1.3.38.2 tron /* MPI Loop State Change Event data */ 3363 1.3.38.2 tron 3364 1.3.38.2 tron typedef struct _EVENT_DATA_LOOP_STATE 3365 1.3.38.2 tron { 3366 1.3.38.2 tron U8 Character4; /* 00h */ 3367 1.3.38.2 tron U8 Character3; /* 01h */ 3368 1.3.38.2 tron U8 Type; /* 02h */ 3369 1.3.38.2 tron U8 Reserved; /* 03h */ 3370 1.3.38.2 tron U8 Reserved1; /* 04h */ 3371 1.3.38.2 tron U8 Port; /* 05h */ 3372 1.3.38.2 tron U16 Reserved2; /* 06h */ 3373 1.3.38.2 tron } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE, 3374 1.3.38.2 tron EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t; 3375 1.3.38.2 tron 3376 1.3.38.2 tron #define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001) 3377 1.3.38.2 tron #define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002) 3378 1.3.38.2 tron #define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003) 3379 1.3.38.2 tron 3380 1.3.38.2 tron /* MPI LOGOUT Event data */ 3381 1.3.38.2 tron 3382 1.3.38.2 tron typedef struct _EVENT_DATA_LOGOUT 3383 1.3.38.2 tron { 3384 1.3.38.2 tron U32 NPortID; /* 00h */ 3385 1.3.38.2 tron U8 Reserved; /* 04h */ 3386 1.3.38.2 tron U8 Port; /* 05h */ 3387 1.3.38.2 tron U16 Reserved1; /* 06h */ 3388 1.3.38.2 tron } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT, 3389 1.3.38.2 tron EventDataLogout_t, MPI_POINTER pEventDataLogout_t; 3390 1.3.38.2 tron 3391 1.3.38.2 tron /* MPI Integrated RAID Event data */ 3392 1.3.38.2 tron 3393 1.3.38.2 tron typedef struct _EVENT_DATA_RAID 3394 1.3.38.2 tron { 3395 1.3.38.2 tron U8 VolumeID; /* 00h */ 3396 1.3.38.2 tron U8 VolumeBus; /* 01h */ 3397 1.3.38.2 tron U8 ReasonCode; /* 02h */ 3398 1.3.38.2 tron U8 PhysDiskNum; /* 03h */ 3399 1.3.38.2 tron U8 ASC; /* 04h */ 3400 1.3.38.2 tron U8 ASCQ; /* 05h */ 3401 1.3.38.2 tron U16 Reserved; /* 06h */ 3402 1.3.38.2 tron U32 SettingsStatus; /* 08h */ 3403 1.3.38.2 tron } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID, 3404 1.3.38.2 tron MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t; 3405 1.3.38.2 tron 3406 1.3.38.2 tron /* MPI Integrated RAID Event data ReasonCode values */ 3407 1.3.38.2 tron #define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00) 3408 1.3.38.2 tron #define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01) 3409 1.3.38.2 tron #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02) 3410 1.3.38.2 tron #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03) 3411 1.3.38.2 tron #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04) 3412 1.3.38.2 tron #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05) 3413 1.3.38.2 tron #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06) 3414 1.3.38.2 tron #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07) 3415 1.3.38.2 tron #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08) 3416 1.3.38.2 tron #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09) 3417 1.3.38.2 tron #define MPI_EVENT_RAID_RC_SMART_DATA (0x0A) 3418 1.3.38.2 tron #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B) 3419 1.3.38.2 tron 3420 1.3.38.2 tron /* MPI SAS Phy Link Event data */ 3421 1.3.38.2 tron 3422 1.3.38.2 tron typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS 3423 1.3.38.2 tron { 3424 1.3.38.2 tron U8 PhyNum; /* 00h */ 3425 1.3.38.2 tron U8 LinkRates; /* 01h */ 3426 1.3.38.2 tron U16 DevHandle; /* 02h */ 3427 1.3.38.2 tron U64 SASAddress; /* 04h */ 3428 1.3.38.2 tron } EVENT_DATA_SAS_PHY_LINK_STATUS, 3429 1.3.38.2 tron MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS, 3430 1.3.38.2 tron EventDataSASPhyLinkStatus_t, MPI_POINTER pEventDataSASPhyLinkStatus_t; 3431 1.3.38.2 tron 3432 1.3.38.2 tron #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0) 3433 1.3.38.2 tron #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4) 3434 1.3.38.2 tron #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F) 3435 1.3.38.2 tron #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0) 3436 1.3.38.2 tron #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00) 3437 1.3.38.2 tron #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01) 3438 1.3.38.2 tron #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEG (0x02) 3439 1.3.38.2 tron #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03) 3440 1.3.38.2 tron #define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08) 3441 1.3.38.2 tron #define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09) 3442 1.3.38.2 tron 3443 1.3.38.2 tron /***************************************************************************** 3444 1.3.38.2 tron * 3445 1.3.38.2 tron * F i r m w a r e L o a d M e s s a g e s 3446 1.3.38.2 tron * 3447 1.3.38.2 tron *****************************************************************************/ 3448 1.3.38.2 tron 3449 1.3.38.2 tron /****************************************************************************/ 3450 1.3.38.2 tron /* Firmware Download message and associated structures */ 3451 1.3.38.2 tron /****************************************************************************/ 3452 1.3.38.2 tron 3453 1.3.38.2 tron typedef struct _MSG_FW_DOWNLOAD 3454 1.3.38.2 tron { 3455 1.3.38.2 tron U8 ImageType; /* 00h */ 3456 1.3.38.2 tron U8 Reserved; /* 01h */ 3457 1.3.38.2 tron U8 ChainOffset; /* 02h */ 3458 1.3.38.2 tron U8 Function; /* 03h */ 3459 1.3.38.2 tron U8 Reserved1[3]; /* 04h */ 3460 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3461 1.3.38.2 tron U32 MsgContext; /* 08h */ 3462 1.3.38.2 tron SGE_MPI_UNION SGL; /* 0Ch */ 3463 1.3.38.2 tron } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD, 3464 1.3.38.2 tron FWDownload_t, MPI_POINTER pFWDownload_t; 3465 1.3.38.2 tron 3466 1.3.38.2 tron #define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00) 3467 1.3.38.2 tron #define MPI_FW_DOWNLOAD_ITYPE_FW (0x01) 3468 1.3.38.2 tron #define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02) 3469 1.3.38.2 tron #define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03) 3470 1.3.38.2 tron 3471 1.3.38.2 tron 3472 1.3.38.2 tron typedef struct _FWDownloadTCSGE 3473 1.3.38.2 tron { 3474 1.3.38.2 tron U8 Reserved; /* 00h */ 3475 1.3.38.2 tron U8 ContextSize; /* 01h */ 3476 1.3.38.2 tron U8 DetailsLength; /* 02h */ 3477 1.3.38.2 tron U8 Flags; /* 03h */ 3478 1.3.38.2 tron U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */ 3479 1.3.38.2 tron U32 ImageOffset; /* 08h */ 3480 1.3.38.2 tron U32 ImageSize; /* 0Ch */ 3481 1.3.38.2 tron } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE, 3482 1.3.38.2 tron FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t; 3483 1.3.38.2 tron 3484 1.3.38.2 tron /* Firmware Download reply */ 3485 1.3.38.2 tron typedef struct _MSG_FW_DOWNLOAD_REPLY 3486 1.3.38.2 tron { 3487 1.3.38.2 tron U8 ImageType; /* 00h */ 3488 1.3.38.2 tron U8 Reserved; /* 01h */ 3489 1.3.38.2 tron U8 MsgLength; /* 02h */ 3490 1.3.38.2 tron U8 Function; /* 03h */ 3491 1.3.38.2 tron U8 Reserved1[3]; /* 04h */ 3492 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3493 1.3.38.2 tron U32 MsgContext; /* 08h */ 3494 1.3.38.2 tron U16 Reserved2; /* 0Ch */ 3495 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 3496 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 3497 1.3.38.2 tron } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY, 3498 1.3.38.2 tron FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t; 3499 1.3.38.2 tron 3500 1.3.38.2 tron 3501 1.3.38.2 tron /****************************************************************************/ 3502 1.3.38.2 tron /* Firmware Upload message and associated structures */ 3503 1.3.38.2 tron /****************************************************************************/ 3504 1.3.38.2 tron 3505 1.3.38.2 tron typedef struct _MSG_FW_UPLOAD 3506 1.3.38.2 tron { 3507 1.3.38.2 tron U8 ImageType; /* 00h */ 3508 1.3.38.2 tron U8 Reserved; /* 01h */ 3509 1.3.38.2 tron U8 ChainOffset; /* 02h */ 3510 1.3.38.2 tron U8 Function; /* 03h */ 3511 1.3.38.2 tron U8 Reserved1[3]; /* 04h */ 3512 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3513 1.3.38.2 tron U32 MsgContext; /* 08h */ 3514 1.3.38.2 tron SGE_MPI_UNION SGL; /* 0Ch */ 3515 1.3.38.2 tron } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD, 3516 1.3.38.2 tron FWUpload_t, MPI_POINTER pFWUpload_t; 3517 1.3.38.2 tron 3518 1.3.38.2 tron #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00) 3519 1.3.38.2 tron #define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01) 3520 1.3.38.2 tron #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02) 3521 1.3.38.2 tron #define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03) 3522 1.3.38.2 tron 3523 1.3.38.2 tron typedef struct _FWUploadTCSGE 3524 1.3.38.2 tron { 3525 1.3.38.2 tron U8 Reserved; /* 00h */ 3526 1.3.38.2 tron U8 ContextSize; /* 01h */ 3527 1.3.38.2 tron U8 DetailsLength; /* 02h */ 3528 1.3.38.2 tron U8 Flags; /* 03h */ 3529 1.3.38.2 tron U32 Reserved1; /* 04h */ 3530 1.3.38.2 tron U32 ImageOffset; /* 08h */ 3531 1.3.38.2 tron U32 ImageSize; /* 0Ch */ 3532 1.3.38.2 tron } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE, 3533 1.3.38.2 tron FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t; 3534 1.3.38.2 tron 3535 1.3.38.2 tron /* Firmware Upload reply */ 3536 1.3.38.2 tron typedef struct _MSG_FW_UPLOAD_REPLY 3537 1.3.38.2 tron { 3538 1.3.38.2 tron U8 ImageType; /* 00h */ 3539 1.3.38.2 tron U8 Reserved; /* 01h */ 3540 1.3.38.2 tron U8 MsgLength; /* 02h */ 3541 1.3.38.2 tron U8 Function; /* 03h */ 3542 1.3.38.2 tron U8 Reserved1[3]; /* 04h */ 3543 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3544 1.3.38.2 tron U32 MsgContext; /* 08h */ 3545 1.3.38.2 tron U16 Reserved2; /* 0Ch */ 3546 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 3547 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 3548 1.3.38.2 tron U32 ActualImageSize; /* 14h */ 3549 1.3.38.2 tron } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY, 3550 1.3.38.2 tron FWUploadReply_t, MPI_POINTER pFWUploadReply_t; 3551 1.3.38.2 tron 3552 1.3.38.2 tron 3553 1.3.38.2 tron typedef struct _MPI_FW_HEADER 3554 1.3.38.2 tron { 3555 1.3.38.2 tron U32 ArmBranchInstruction0; /* 00h */ 3556 1.3.38.2 tron U32 Signature0; /* 04h */ 3557 1.3.38.2 tron U32 Signature1; /* 08h */ 3558 1.3.38.2 tron U32 Signature2; /* 0Ch */ 3559 1.3.38.2 tron U32 ArmBranchInstruction1; /* 10h */ 3560 1.3.38.2 tron U32 ArmBranchInstruction2; /* 14h */ 3561 1.3.38.2 tron U32 Reserved; /* 18h */ 3562 1.3.38.2 tron U32 Checksum; /* 1Ch */ 3563 1.3.38.2 tron U16 VendorId; /* 20h */ 3564 1.3.38.2 tron U16 ProductId; /* 22h */ 3565 1.3.38.2 tron MPI_FW_VERSION FWVersion; /* 24h */ 3566 1.3.38.2 tron U32 SeqCodeVersion; /* 28h */ 3567 1.3.38.2 tron U32 ImageSize; /* 2Ch */ 3568 1.3.38.2 tron U32 NextImageHeaderOffset; /* 30h */ 3569 1.3.38.2 tron U32 LoadStartAddress; /* 34h */ 3570 1.3.38.2 tron U32 IopResetVectorValue; /* 38h */ 3571 1.3.38.2 tron U32 IopResetRegAddr; /* 3Ch */ 3572 1.3.38.2 tron U32 VersionNameWhat; /* 40h */ 3573 1.3.38.2 tron U8 VersionName[32]; /* 44h */ 3574 1.3.38.2 tron U32 VendorNameWhat; /* 64h */ 3575 1.3.38.2 tron U8 VendorName[32]; /* 68h */ 3576 1.3.38.2 tron } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER, 3577 1.3.38.2 tron MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t; 3578 1.3.38.2 tron 3579 1.3.38.2 tron #define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840) 3580 1.3.38.2 tron 3581 1.3.38.2 tron /* defines for using the ProductId field */ 3582 1.3.38.2 tron #define MPI_FW_HEADER_PID_TYPE_MASK (0xF000) 3583 1.3.38.2 tron #define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000) 3584 1.3.38.2 tron #define MPI_FW_HEADER_PID_TYPE_FC (0x1000) 3585 1.3.38.2 tron 3586 1.3.38.2 tron #define MPI_FW_HEADER_PID_PROD_MASK (0x0F00) 3587 1.3.38.2 tron #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100) 3588 1.3.38.2 tron #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200) 3589 1.3.38.2 tron #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300) 3590 1.3.38.2 tron #define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400) 3591 1.3.38.2 tron #define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500) 3592 1.3.38.2 tron #define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600) 3593 1.3.38.2 tron 3594 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF) 3595 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001) 3596 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002) 3597 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003) 3598 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004) 3599 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005) 3600 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006) 3601 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007) 3602 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008) 3603 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009) 3604 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A) 3605 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000) 3606 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) 3607 1.3.38.2 tron #define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) 3608 1.3.38.2 tron 3609 1.3.38.2 tron typedef struct _MPI_EXT_IMAGE_HEADER 3610 1.3.38.2 tron { 3611 1.3.38.2 tron U8 ImageType; /* 00h */ 3612 1.3.38.2 tron U8 Reserved; /* 01h */ 3613 1.3.38.2 tron U16 Reserved1; /* 02h */ 3614 1.3.38.2 tron U32 Checksum; /* 04h */ 3615 1.3.38.2 tron U32 ImageSize; /* 08h */ 3616 1.3.38.2 tron U32 NextImageHeaderOffset; /* 0Ch */ 3617 1.3.38.2 tron U32 LoadStartAddress; /* 10h */ 3618 1.3.38.2 tron U32 Reserved2; /* 14h */ 3619 1.3.38.2 tron } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER, 3620 1.3.38.2 tron MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t; 3621 1.3.38.2 tron 3622 1.3.38.2 tron /* defines for the ImageType field */ 3623 1.3.38.2 tron #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00) 3624 1.3.38.2 tron #define MPI_EXT_IMAGE_TYPE_FW (0x01) 3625 1.3.38.2 tron #define MPI_EXT_IMAGE_TYPE_NVDATA (0x03) 3626 1.3.38.2 tron 3627 1.3.38.2 tron #endif 3628 1.3.38.2 tron 3629 1.3.38.2 tron /* 3630 1.3.38.2 tron * Copyright (c) 2000, 2001 by LSI Logic Corporation 3631 1.3.38.2 tron * 3632 1.3.38.2 tron * Redistribution and use in source and binary forms, with or without 3633 1.3.38.2 tron * modification, are permitted provided that the following conditions 3634 1.3.38.2 tron * are met: 3635 1.3.38.2 tron * 1. Redistributions of source code must retain the above copyright 3636 1.3.38.2 tron * notice immediately at the beginning of the file, without modification, 3637 1.3.38.2 tron * this list of conditions, and the following disclaimer. 3638 1.3.38.2 tron * 2. The name of the author may not be used to endorse or promote products 3639 1.3.38.2 tron * derived from this software without specific prior written permission. 3640 1.3.38.2 tron * 3641 1.3.38.2 tron * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 3642 1.3.38.2 tron * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 3643 1.3.38.2 tron * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 3644 1.3.38.2 tron * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 3645 1.3.38.2 tron * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 3646 1.3.38.2 tron * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 3647 1.3.38.2 tron * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3648 1.3.38.2 tron * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 3649 1.3.38.2 tron * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3650 1.3.38.2 tron * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3651 1.3.38.2 tron * SUCH DAMAGE. 3652 1.3.38.2 tron * 3653 1.3.38.2 tron * 3654 1.3.38.2 tron * Name: MPI_LAN.H 3655 1.3.38.2 tron * Title: MPI LAN messages and structures 3656 1.3.38.2 tron * Creation Date: June 30, 2000 3657 1.3.38.2 tron * 3658 1.3.38.2 tron * MPI Version: 01.02.01 3659 1.3.38.2 tron * 3660 1.3.38.2 tron * Version History 3661 1.3.38.2 tron * --------------- 3662 1.3.38.2 tron * 3663 1.3.38.2 tron * Date Version Description 3664 1.3.38.2 tron * -------- -------- ------------------------------------------------------ 3665 1.3.38.2 tron * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 3666 1.3.38.2 tron * 05-24-00 00.10.02 Added LANStatus field to _MSG_LAN_SEND_REPLY. 3667 1.3.38.2 tron * Added LANStatus field to _MSG_LAN_RECEIVE_POST_REPLY. 3668 1.3.38.2 tron * Moved ListCount field in _MSG_LAN_RECEIVE_POST_REPLY. 3669 1.3.38.2 tron * 06-06-00 01.00.01 Update version number for 1.0 release. 3670 1.3.38.2 tron * 06-12-00 01.00.02 Added MPI_ to BUCKETSTATUS_ definitions. 3671 1.3.38.2 tron * 06-22-00 01.00.03 Major changes to match new LAN definition in 1.0 spec. 3672 1.3.38.2 tron * 06-30-00 01.00.04 Added Context Reply definitions per revised proposal. 3673 1.3.38.2 tron * Changed transaction context usage to bucket/buffer. 3674 1.3.38.2 tron * 07-05-00 01.00.05 Removed LAN_RECEIVE_POST_BUCKET_CONTEXT_MASK definition 3675 1.3.38.2 tron * to lan private header file 3676 1.3.38.2 tron * 11-02-00 01.01.01 Original release for post 1.0 work 3677 1.3.38.2 tron * 02-20-01 01.01.02 Started using MPI_POINTER. 3678 1.3.38.2 tron * 03-27-01 01.01.03 Added structure offset comments. 3679 1.3.38.2 tron * 08-08-01 01.02.01 Original release for v1.2 work. 3680 1.3.38.2 tron * -------------------------------------------------------------------------- 3681 1.3.38.2 tron */ 3682 1.3.38.2 tron 3683 1.3.38.2 tron #ifndef MPI_LAN_H 3684 1.3.38.2 tron #define MPI_LAN_H 3685 1.3.38.2 tron 3686 1.3.38.2 tron 3687 1.3.38.2 tron /****************************************************************************** 3688 1.3.38.2 tron * 3689 1.3.38.2 tron * L A N M e s s a g e s 3690 1.3.38.2 tron * 3691 1.3.38.2 tron *******************************************************************************/ 3692 1.3.38.2 tron 3693 1.3.38.2 tron /* LANSend messages */ 3694 1.3.38.2 tron 3695 1.3.38.2 tron typedef struct _MSG_LAN_SEND_REQUEST 3696 1.3.38.2 tron { 3697 1.3.38.2 tron U16 Reserved; /* 00h */ 3698 1.3.38.2 tron U8 ChainOffset; /* 02h */ 3699 1.3.38.2 tron U8 Function; /* 03h */ 3700 1.3.38.2 tron U16 Reserved2; /* 04h */ 3701 1.3.38.2 tron U8 PortNumber; /* 06h */ 3702 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3703 1.3.38.2 tron U32 MsgContext; /* 08h */ 3704 1.3.38.2 tron SGE_MPI_UNION SG_List[1]; /* 0Ch */ 3705 1.3.38.2 tron } MSG_LAN_SEND_REQUEST, MPI_POINTER PTR_MSG_LAN_SEND_REQUEST, 3706 1.3.38.2 tron LANSendRequest_t, MPI_POINTER pLANSendRequest_t; 3707 1.3.38.2 tron 3708 1.3.38.2 tron 3709 1.3.38.2 tron typedef struct _MSG_LAN_SEND_REPLY 3710 1.3.38.2 tron { 3711 1.3.38.2 tron U16 Reserved; /* 00h */ 3712 1.3.38.2 tron U8 MsgLength; /* 02h */ 3713 1.3.38.2 tron U8 Function; /* 03h */ 3714 1.3.38.2 tron U8 Reserved2; /* 04h */ 3715 1.3.38.2 tron U8 NumberOfContexts; /* 05h */ 3716 1.3.38.2 tron U8 PortNumber; /* 06h */ 3717 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3718 1.3.38.2 tron U32 MsgContext; /* 08h */ 3719 1.3.38.2 tron U16 Reserved3; /* 0Ch */ 3720 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 3721 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 3722 1.3.38.2 tron U32 BufferContext; /* 14h */ 3723 1.3.38.2 tron } MSG_LAN_SEND_REPLY, MPI_POINTER PTR_MSG_LAN_SEND_REPLY, 3724 1.3.38.2 tron LANSendReply_t, MPI_POINTER pLANSendReply_t; 3725 1.3.38.2 tron 3726 1.3.38.2 tron 3727 1.3.38.2 tron /* LANReceivePost */ 3728 1.3.38.2 tron 3729 1.3.38.2 tron typedef struct _MSG_LAN_RECEIVE_POST_REQUEST 3730 1.3.38.2 tron { 3731 1.3.38.2 tron U16 Reserved; /* 00h */ 3732 1.3.38.2 tron U8 ChainOffset; /* 02h */ 3733 1.3.38.2 tron U8 Function; /* 03h */ 3734 1.3.38.2 tron U16 Reserved2; /* 04h */ 3735 1.3.38.2 tron U8 PortNumber; /* 06h */ 3736 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3737 1.3.38.2 tron U32 MsgContext; /* 08h */ 3738 1.3.38.2 tron U32 BucketCount; /* 0Ch */ 3739 1.3.38.2 tron SGE_MPI_UNION SG_List[1]; /* 10h */ 3740 1.3.38.2 tron } MSG_LAN_RECEIVE_POST_REQUEST, MPI_POINTER PTR_MSG_LAN_RECEIVE_POST_REQUEST, 3741 1.3.38.2 tron LANReceivePostRequest_t, MPI_POINTER pLANReceivePostRequest_t; 3742 1.3.38.2 tron 3743 1.3.38.2 tron 3744 1.3.38.2 tron typedef struct _MSG_LAN_RECEIVE_POST_REPLY 3745 1.3.38.2 tron { 3746 1.3.38.2 tron U16 Reserved; /* 00h */ 3747 1.3.38.2 tron U8 MsgLength; /* 02h */ 3748 1.3.38.2 tron U8 Function; /* 03h */ 3749 1.3.38.2 tron U8 Reserved2; /* 04h */ 3750 1.3.38.2 tron U8 NumberOfContexts; /* 05h */ 3751 1.3.38.2 tron U8 PortNumber; /* 06h */ 3752 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3753 1.3.38.2 tron U32 MsgContext; /* 08h */ 3754 1.3.38.2 tron U16 Reserved3; /* 0Ch */ 3755 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 3756 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 3757 1.3.38.2 tron U32 BucketsRemaining; /* 14h */ 3758 1.3.38.2 tron U32 PacketOffset; /* 18h */ 3759 1.3.38.2 tron U32 PacketLength; /* 1Ch */ 3760 1.3.38.2 tron U32 BucketContext[1]; /* 20h */ 3761 1.3.38.2 tron } MSG_LAN_RECEIVE_POST_REPLY, MPI_POINTER PTR_MSG_LAN_RECEIVE_POST_REPLY, 3762 1.3.38.2 tron LANReceivePostReply_t, MPI_POINTER pLANReceivePostReply_t; 3763 1.3.38.2 tron 3764 1.3.38.2 tron 3765 1.3.38.2 tron /* LANReset */ 3766 1.3.38.2 tron 3767 1.3.38.2 tron typedef struct _MSG_LAN_RESET_REQUEST 3768 1.3.38.2 tron { 3769 1.3.38.2 tron U16 Reserved; /* 00h */ 3770 1.3.38.2 tron U8 ChainOffset; /* 02h */ 3771 1.3.38.2 tron U8 Function; /* 03h */ 3772 1.3.38.2 tron U16 Reserved2; /* 04h */ 3773 1.3.38.2 tron U8 PortNumber; /* 05h */ 3774 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3775 1.3.38.2 tron U32 MsgContext; /* 08h */ 3776 1.3.38.2 tron } MSG_LAN_RESET_REQUEST, MPI_POINTER PTR_MSG_LAN_RESET_REQUEST, 3777 1.3.38.2 tron LANResetRequest_t, MPI_POINTER pLANResetRequest_t; 3778 1.3.38.2 tron 3779 1.3.38.2 tron 3780 1.3.38.2 tron typedef struct _MSG_LAN_RESET_REPLY 3781 1.3.38.2 tron { 3782 1.3.38.2 tron U16 Reserved; /* 00h */ 3783 1.3.38.2 tron U8 MsgLength; /* 02h */ 3784 1.3.38.2 tron U8 Function; /* 03h */ 3785 1.3.38.2 tron U16 Reserved2; /* 04h */ 3786 1.3.38.2 tron U8 PortNumber; /* 06h */ 3787 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3788 1.3.38.2 tron U32 MsgContext; /* 08h */ 3789 1.3.38.2 tron U16 Reserved3; /* 0Ch */ 3790 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 3791 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 3792 1.3.38.2 tron } MSG_LAN_RESET_REPLY, MPI_POINTER PTR_MSG_LAN_RESET_REPLY, 3793 1.3.38.2 tron LANResetReply_t, MPI_POINTER pLANResetReply_t; 3794 1.3.38.2 tron 3795 1.3.38.2 tron 3796 1.3.38.2 tron /****************************************************************************/ 3797 1.3.38.2 tron /* LAN Context Reply defines and macros */ 3798 1.3.38.2 tron /****************************************************************************/ 3799 1.3.38.2 tron 3800 1.3.38.2 tron #define LAN_REPLY_PACKET_LENGTH_MASK (0x0000FFFF) 3801 1.3.38.2 tron #define LAN_REPLY_PACKET_LENGTH_SHIFT (0) 3802 1.3.38.2 tron #define LAN_REPLY_BUCKET_CONTEXT_MASK (0x07FF0000) 3803 1.3.38.2 tron #define LAN_REPLY_BUCKET_CONTEXT_SHIFT (16) 3804 1.3.38.2 tron #define LAN_REPLY_BUFFER_CONTEXT_MASK (0x07FFFFFF) 3805 1.3.38.2 tron #define LAN_REPLY_BUFFER_CONTEXT_SHIFT (0) 3806 1.3.38.2 tron #define LAN_REPLY_FORM_MASK (0x18000000) 3807 1.3.38.2 tron #define LAN_REPLY_FORM_RECEIVE_SINGLE (0x00) 3808 1.3.38.2 tron #define LAN_REPLY_FORM_RECEIVE_MULTIPLE (0x01) 3809 1.3.38.2 tron #define LAN_REPLY_FORM_SEND_SINGLE (0x02) 3810 1.3.38.2 tron #define LAN_REPLY_FORM_MESSAGE_CONTEXT (0x03) 3811 1.3.38.2 tron #define LAN_REPLY_FORM_SHIFT (27) 3812 1.3.38.2 tron 3813 1.3.38.2 tron #define GET_LAN_PACKET_LENGTH(x) (((x) & LAN_REPLY_PACKET_LENGTH_MASK) \ 3814 1.3.38.2 tron >> LAN_REPLY_PACKET_LENGTH_SHIFT) 3815 1.3.38.2 tron 3816 1.3.38.2 tron #define SET_LAN_PACKET_LENGTH(x, lth) \ 3817 1.3.38.2 tron ((x) = ((x) & ~LAN_REPLY_PACKET_LENGTH_MASK) | \ 3818 1.3.38.2 tron (((lth) << LAN_REPLY_PACKET_LENGTH_SHIFT) & \ 3819 1.3.38.2 tron LAN_REPLY_PACKET_LENGTH_MASK)) 3820 1.3.38.2 tron 3821 1.3.38.2 tron #define GET_LAN_BUCKET_CONTEXT(x) (((x) & LAN_REPLY_BUCKET_CONTEXT_MASK) \ 3822 1.3.38.2 tron >> LAN_REPLY_BUCKET_CONTEXT_SHIFT) 3823 1.3.38.2 tron 3824 1.3.38.2 tron #define SET_LAN_BUCKET_CONTEXT(x, ctx) \ 3825 1.3.38.2 tron ((x) = ((x) & ~LAN_REPLY_BUCKET_CONTEXT_MASK) | \ 3826 1.3.38.2 tron (((ctx) << LAN_REPLY_BUCKET_CONTEXT_SHIFT) & \ 3827 1.3.38.2 tron LAN_REPLY_BUCKET_CONTEXT_MASK)) 3828 1.3.38.2 tron 3829 1.3.38.2 tron #define GET_LAN_BUFFER_CONTEXT(x) (((x) & LAN_REPLY_BUFFER_CONTEXT_MASK) \ 3830 1.3.38.2 tron >> LAN_REPLY_BUFFER_CONTEXT_SHIFT) 3831 1.3.38.2 tron 3832 1.3.38.2 tron #define SET_LAN_BUFFER_CONTEXT(x, ctx) \ 3833 1.3.38.2 tron ((x) = ((x) & ~LAN_REPLY_BUFFER_CONTEXT_MASK) | \ 3834 1.3.38.2 tron (((ctx) << LAN_REPLY_BUFFER_CONTEXT_SHIFT) & \ 3835 1.3.38.2 tron LAN_REPLY_BUFFER_CONTEXT_MASK)) 3836 1.3.38.2 tron 3837 1.3.38.2 tron #define GET_LAN_FORM(x) (((x) & LAN_REPLY_FORM_MASK) \ 3838 1.3.38.2 tron >> LAN_REPLY_FORM_SHIFT) 3839 1.3.38.2 tron 3840 1.3.38.2 tron #define SET_LAN_FORM(x, frm) \ 3841 1.3.38.2 tron ((x) = ((x) & ~LAN_REPLY_FORM_MASK) | \ 3842 1.3.38.2 tron (((frm) << LAN_REPLY_FORM_SHIFT) & \ 3843 1.3.38.2 tron LAN_REPLY_FORM_MASK)) 3844 1.3.38.2 tron 3845 1.3.38.2 tron 3846 1.3.38.2 tron /****************************************************************************/ 3847 1.3.38.2 tron /* LAN Current Device State defines */ 3848 1.3.38.2 tron /****************************************************************************/ 3849 1.3.38.2 tron 3850 1.3.38.2 tron #define MPI_LAN_DEVICE_STATE_RESET (0x00) 3851 1.3.38.2 tron #define MPI_LAN_DEVICE_STATE_OPERATIONAL (0x01) 3852 1.3.38.2 tron 3853 1.3.38.2 tron 3854 1.3.38.2 tron /****************************************************************************/ 3855 1.3.38.2 tron /* LAN Loopback defines */ 3856 1.3.38.2 tron /****************************************************************************/ 3857 1.3.38.2 tron 3858 1.3.38.2 tron #define MPI_LAN_TX_MODES_ENABLE_LOOPBACK_SUPPRESSION (0x01) 3859 1.3.38.2 tron 3860 1.3.38.2 tron #endif 3861 1.3.38.2 tron 3862 1.3.38.2 tron 3863 1.3.38.2 tron /* 3864 1.3.38.2 tron * Copyright (c) 2000, 2001 by LSI Logic Corporation 3865 1.3.38.2 tron * 3866 1.3.38.2 tron * Redistribution and use in source and binary forms, with or without 3867 1.3.38.2 tron * modification, are permitted provided that the following conditions 3868 1.3.38.2 tron * are met: 3869 1.3.38.2 tron * 1. Redistributions of source code must retain the above copyright 3870 1.3.38.2 tron * notice immediately at the beginning of the file, without modification, 3871 1.3.38.2 tron * this list of conditions, and the following disclaimer. 3872 1.3.38.2 tron * 2. The name of the author may not be used to endorse or promote products 3873 1.3.38.2 tron * derived from this software without specific prior written permission. 3874 1.3.38.2 tron * 3875 1.3.38.2 tron * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 3876 1.3.38.2 tron * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 3877 1.3.38.2 tron * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 3878 1.3.38.2 tron * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 3879 1.3.38.2 tron * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 3880 1.3.38.2 tron * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 3881 1.3.38.2 tron * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3882 1.3.38.2 tron * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 3883 1.3.38.2 tron * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3884 1.3.38.2 tron * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3885 1.3.38.2 tron * SUCH DAMAGE. 3886 1.3.38.2 tron * 3887 1.3.38.2 tron * 3888 1.3.38.2 tron * Name: MPI_TARG.H 3889 1.3.38.2 tron * Title: MPI Target mode messages and structures 3890 1.3.38.2 tron * Creation Date: June 22, 2000 3891 1.3.38.2 tron * 3892 1.3.38.2 tron * MPI Version: 01.02.04 3893 1.3.38.2 tron * 3894 1.3.38.2 tron * Version History 3895 1.3.38.2 tron * --------------- 3896 1.3.38.2 tron * 3897 1.3.38.2 tron * Date Version Description 3898 1.3.38.2 tron * -------- -------- ------------------------------------------------------ 3899 1.3.38.2 tron * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 3900 1.3.38.2 tron * 06-06-00 01.00.01 Update version number for 1.0 release. 3901 1.3.38.2 tron * 06-22-00 01.00.02 Added _MSG_TARGET_CMD_BUFFER_POST_REPLY structure. 3902 1.3.38.2 tron * Corrected DECSRIPTOR typo to DESCRIPTOR. 3903 1.3.38.2 tron * 11-02-00 01.01.01 Original release for post 1.0 work 3904 1.3.38.2 tron * Modified target mode to use IoIndex instead of 3905 1.3.38.2 tron * HostIndex and IocIndex. Added Alias. 3906 1.3.38.2 tron * 01-09-01 01.01.02 Added defines for TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER 3907 1.3.38.2 tron * and TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER. 3908 1.3.38.2 tron * 02-20-01 01.01.03 Started using MPI_POINTER. 3909 1.3.38.2 tron * Added structures for MPI_TARGET_SCSI_SPI_CMD_BUFFER and 3910 1.3.38.2 tron * MPI_TARGET_FCP_CMD_BUFFER. 3911 1.3.38.2 tron * 03-27-01 01.01.04 Added structure offset comments. 3912 1.3.38.2 tron * 08-08-01 01.02.01 Original release for v1.2 work. 3913 1.3.38.2 tron * 09-28-01 01.02.02 Added structure for MPI_TARGET_SCSI_SPI_STATUS_IU. 3914 1.3.38.2 tron * Added PriorityReason field to some replies and 3915 1.3.38.2 tron * defined more PriorityReason codes. 3916 1.3.38.2 tron * Added some defines for to support previous version 3917 1.3.38.2 tron * of MPI. 3918 1.3.38.2 tron * 10-04-01 01.02.03 Added PriorityReason to MSG_TARGET_ERROR_REPLY. 3919 1.3.38.2 tron * 11-01-01 01.02.04 Added define for TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY. 3920 1.3.38.2 tron * -------------------------------------------------------------------------- 3921 1.3.38.2 tron */ 3922 1.3.38.2 tron 3923 1.3.38.2 tron #ifndef MPI_TARG_H 3924 1.3.38.2 tron #define MPI_TARG_H 3925 1.3.38.2 tron 3926 1.3.38.2 tron 3927 1.3.38.2 tron /****************************************************************************** 3928 1.3.38.2 tron * 3929 1.3.38.2 tron * S C S I T a r g e t M e s s a g e s 3930 1.3.38.2 tron * 3931 1.3.38.2 tron *******************************************************************************/ 3932 1.3.38.2 tron 3933 1.3.38.2 tron typedef struct _CMD_BUFFER_DESCRIPTOR 3934 1.3.38.2 tron { 3935 1.3.38.2 tron U16 IoIndex; /* 00h */ 3936 1.3.38.2 tron U16 Reserved; /* 02h */ 3937 1.3.38.2 tron union /* 04h */ 3938 1.3.38.2 tron { 3939 1.3.38.2 tron U32 PhysicalAddress32; 3940 1.3.38.2 tron U64 PhysicalAddress64; 3941 1.3.38.2 tron } _u; 3942 1.3.38.2 tron } CMD_BUFFER_DESCRIPTOR, MPI_POINTER PTR_CMD_BUFFER_DESCRIPTOR, 3943 1.3.38.2 tron CmdBufferDescriptor_t, MPI_POINTER pCmdBufferDescriptor_t; 3944 1.3.38.2 tron 3945 1.3.38.2 tron 3946 1.3.38.2 tron /****************************************************************************/ 3947 1.3.38.2 tron /* Target Command Buffer Post Request */ 3948 1.3.38.2 tron /****************************************************************************/ 3949 1.3.38.2 tron 3950 1.3.38.2 tron typedef struct _MSG_TARGET_CMD_BUFFER_POST_REQUEST 3951 1.3.38.2 tron { 3952 1.3.38.2 tron U8 BufferPostFlags; /* 00h */ 3953 1.3.38.2 tron U8 BufferCount; /* 01h */ 3954 1.3.38.2 tron U8 ChainOffset; /* 02h */ 3955 1.3.38.2 tron U8 Function; /* 03h */ 3956 1.3.38.2 tron U8 BufferLength; /* 04h */ 3957 1.3.38.2 tron U8 Reserved; /* 05h */ 3958 1.3.38.2 tron U8 Reserved1; /* 06h */ 3959 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3960 1.3.38.2 tron U32 MsgContext; /* 08h */ 3961 1.3.38.2 tron CMD_BUFFER_DESCRIPTOR Buffer[1]; /* 0Ch */ 3962 1.3.38.2 tron } MSG_TARGET_CMD_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REQUEST, 3963 1.3.38.2 tron TargetCmdBufferPostRequest_t, MPI_POINTER pTargetCmdBufferPostRequest_t; 3964 1.3.38.2 tron 3965 1.3.38.2 tron #define CMD_BUFFER_POST_FLAGS_PORT_MASK (0x01) 3966 1.3.38.2 tron #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_MASK (0x80) 3967 1.3.38.2 tron #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_32 (0) 3968 1.3.38.2 tron #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_64 (1) 3969 1.3.38.2 tron #define CMD_BUFFER_POST_FLAGS_64_BIT_ADDR (0x80) 3970 1.3.38.2 tron 3971 1.3.38.2 tron #define CMD_BUFFER_POST_IO_INDEX_MASK (0x00003FFF) 3972 1.3.38.2 tron #define CMD_BUFFER_POST_IO_INDEX_MASK_0100 (0x000003FF) /* obsolete */ 3973 1.3.38.2 tron 3974 1.3.38.2 tron 3975 1.3.38.2 tron typedef struct _MSG_TARGET_CMD_BUFFER_POST_REPLY 3976 1.3.38.2 tron { 3977 1.3.38.2 tron U8 BufferPostFlags; /* 00h */ 3978 1.3.38.2 tron U8 BufferCount; /* 01h */ 3979 1.3.38.2 tron U8 MsgLength; /* 02h */ 3980 1.3.38.2 tron U8 Function; /* 03h */ 3981 1.3.38.2 tron U8 BufferLength; /* 04h */ 3982 1.3.38.2 tron U8 Reserved; /* 05h */ 3983 1.3.38.2 tron U8 Reserved1; /* 06h */ 3984 1.3.38.2 tron U8 MsgFlags; /* 07h */ 3985 1.3.38.2 tron U32 MsgContext; /* 08h */ 3986 1.3.38.2 tron U16 Reserved2; /* 0Ch */ 3987 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 3988 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 3989 1.3.38.2 tron } MSG_TARGET_CMD_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REPLY, 3990 1.3.38.2 tron TargetCmdBufferPostReply_t, MPI_POINTER pTargetCmdBufferPostReply_t; 3991 1.3.38.2 tron 3992 1.3.38.2 tron /* the following structure is obsolete as of MPI v1.2 */ 3993 1.3.38.2 tron typedef struct _MSG_PRIORITY_CMD_RECEIVED_REPLY 3994 1.3.38.2 tron { 3995 1.3.38.2 tron U16 Reserved; /* 00h */ 3996 1.3.38.2 tron U8 MsgLength; /* 02h */ 3997 1.3.38.2 tron U8 Function; /* 03h */ 3998 1.3.38.2 tron U16 Reserved1; /* 04h */ 3999 1.3.38.2 tron U8 Reserved2; /* 06h */ 4000 1.3.38.2 tron U8 MsgFlags; /* 07h */ 4001 1.3.38.2 tron U32 MsgContext; /* 08h */ 4002 1.3.38.2 tron U8 PriorityReason; /* 0Ch */ 4003 1.3.38.2 tron U8 Reserved3; /* 0Dh */ 4004 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 4005 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 4006 1.3.38.2 tron U32 ReplyWord; /* 14h */ 4007 1.3.38.2 tron } MSG_PRIORITY_CMD_RECEIVED_REPLY, MPI_POINTER PTR_MSG_PRIORITY_CMD_RECEIVED_REPLY, 4008 1.3.38.2 tron PriorityCommandReceivedReply_t, MPI_POINTER pPriorityCommandReceivedReply_t; 4009 1.3.38.2 tron 4010 1.3.38.2 tron #define PRIORITY_REASON_NO_DISCONNECT (0x00) 4011 1.3.38.2 tron #define PRIORITY_REASON_SCSI_TASK_MANAGEMENT (0x01) 4012 1.3.38.2 tron #define PRIORITY_REASON_CMD_PARITY_ERR (0x02) 4013 1.3.38.2 tron #define PRIORITY_REASON_MSG_OUT_PARITY_ERR (0x03) 4014 1.3.38.2 tron #define PRIORITY_REASON_LQ_CRC_ERR (0x04) 4015 1.3.38.2 tron #define PRIORITY_REASON_CMD_CRC_ERR (0x05) 4016 1.3.38.2 tron #define PRIORITY_REASON_PROTOCOL_ERR (0x06) 4017 1.3.38.2 tron #define PRIORITY_REASON_DATA_OUT_PARITY_ERR (0x07) 4018 1.3.38.2 tron #define PRIORITY_REASON_DATA_OUT_CRC_ERR (0x08) 4019 1.3.38.2 tron #define PRIORITY_REASON_UNKNOWN (0xFF) 4020 1.3.38.2 tron 4021 1.3.38.2 tron 4022 1.3.38.2 tron typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY 4023 1.3.38.2 tron { 4024 1.3.38.2 tron U16 Reserved; /* 00h */ 4025 1.3.38.2 tron U8 MsgLength; /* 02h */ 4026 1.3.38.2 tron U8 Function; /* 03h */ 4027 1.3.38.2 tron U16 Reserved1; /* 04h */ 4028 1.3.38.2 tron U8 Reserved2; /* 06h */ 4029 1.3.38.2 tron U8 MsgFlags; /* 07h */ 4030 1.3.38.2 tron U32 MsgContext; /* 08h */ 4031 1.3.38.2 tron U8 PriorityReason; /* 0Ch */ 4032 1.3.38.2 tron U8 Reserved3; /* 0Dh */ 4033 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 4034 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 4035 1.3.38.2 tron U32 ReplyWord; /* 14h */ 4036 1.3.38.2 tron } MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY, 4037 1.3.38.2 tron MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY, 4038 1.3.38.2 tron TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t; 4039 1.3.38.2 tron 4040 1.3.38.2 tron 4041 1.3.38.2 tron typedef struct _MPI_TARGET_FCP_CMD_BUFFER 4042 1.3.38.2 tron { 4043 1.3.38.2 tron U8 FcpLun[8]; /* 00h */ 4044 1.3.38.2 tron U8 FcpCntl[4]; /* 08h */ 4045 1.3.38.2 tron U8 FcpCdb[16]; /* 0Ch */ 4046 1.3.38.2 tron U32 FcpDl; /* 1Ch */ 4047 1.3.38.2 tron } MPI_TARGET_FCP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_CMD_BUFFER, 4048 1.3.38.2 tron MpiTargetFcpCmdBuffer, MPI_POINTER pMpiTargetFcpCmdBuffer; 4049 1.3.38.2 tron 4050 1.3.38.2 tron 4051 1.3.38.2 tron typedef struct _MPI_TARGET_SCSI_SPI_CMD_BUFFER 4052 1.3.38.2 tron { 4053 1.3.38.2 tron /* SPI L_Q information unit */ 4054 1.3.38.2 tron U8 L_QType; /* 00h */ 4055 1.3.38.2 tron U8 Reserved; /* 01h */ 4056 1.3.38.2 tron U16 Tag; /* 02h */ 4057 1.3.38.2 tron U8 LogicalUnitNumber[8]; /* 04h */ 4058 1.3.38.2 tron U32 DataLength; /* 0Ch */ 4059 1.3.38.2 tron /* SPI command information unit */ 4060 1.3.38.2 tron U8 ReservedFirstByteOfCommandIU; /* 10h */ 4061 1.3.38.2 tron U8 TaskAttribute; /* 11h */ 4062 1.3.38.2 tron U8 TaskManagementFlags; /* 12h */ 4063 1.3.38.2 tron U8 AdditionalCDBLength; /* 13h */ 4064 1.3.38.2 tron U8 CDB[16]; /* 14h */ 4065 1.3.38.2 tron } MPI_TARGET_SCSI_SPI_CMD_BUFFER, 4066 1.3.38.2 tron MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_CMD_BUFFER, 4067 1.3.38.2 tron MpiTargetScsiSpiCmdBuffer, MPI_POINTER pMpiTargetScsiSpiCmdBuffer; 4068 1.3.38.2 tron 4069 1.3.38.2 tron 4070 1.3.38.2 tron /****************************************************************************/ 4071 1.3.38.2 tron /* Target Assist Request */ 4072 1.3.38.2 tron /****************************************************************************/ 4073 1.3.38.2 tron 4074 1.3.38.2 tron typedef struct _MSG_TARGET_ASSIST_REQUEST 4075 1.3.38.2 tron { 4076 1.3.38.2 tron U8 StatusCode; /* 00h */ 4077 1.3.38.2 tron U8 TargetAssistFlags; /* 01h */ 4078 1.3.38.2 tron U8 ChainOffset; /* 02h */ 4079 1.3.38.2 tron U8 Function; /* 03h */ 4080 1.3.38.2 tron U16 QueueTag; /* 04h */ 4081 1.3.38.2 tron U8 Reserved; /* 06h */ 4082 1.3.38.2 tron U8 MsgFlags; /* 07h */ 4083 1.3.38.2 tron U32 MsgContext; /* 08h */ 4084 1.3.38.2 tron U32 ReplyWord; /* 0Ch */ 4085 1.3.38.2 tron U8 LUN[8]; /* 10h */ 4086 1.3.38.2 tron U32 RelativeOffset; /* 18h */ 4087 1.3.38.2 tron U32 DataLength; /* 1Ch */ 4088 1.3.38.2 tron SGE_IO_UNION SGL[1]; /* 20h */ 4089 1.3.38.2 tron } MSG_TARGET_ASSIST_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_REQUEST, 4090 1.3.38.2 tron TargetAssistRequest_t, MPI_POINTER pTargetAssistRequest_t; 4091 1.3.38.2 tron 4092 1.3.38.2 tron #define TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01) 4093 1.3.38.2 tron #define TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02) 4094 1.3.38.2 tron #define TARGET_ASSIST_FLAGS_HIGH_PRIORITY (0x04) 4095 1.3.38.2 tron #define TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80) 4096 1.3.38.2 tron 4097 1.3.38.2 tron 4098 1.3.38.2 tron typedef struct _MSG_TARGET_ERROR_REPLY 4099 1.3.38.2 tron { 4100 1.3.38.2 tron U16 Reserved; /* 00h */ 4101 1.3.38.2 tron U8 MsgLength; /* 02h */ 4102 1.3.38.2 tron U8 Function; /* 03h */ 4103 1.3.38.2 tron U16 Reserved1; /* 04h */ 4104 1.3.38.2 tron U8 Reserved2; /* 06h */ 4105 1.3.38.2 tron U8 MsgFlags; /* 07h */ 4106 1.3.38.2 tron U32 MsgContext; /* 08h */ 4107 1.3.38.2 tron U8 PriorityReason; /* 0Ch */ 4108 1.3.38.2 tron U8 Reserved3; /* 0Dh */ 4109 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 4110 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 4111 1.3.38.2 tron U32 ReplyWord; /* 14h */ 4112 1.3.38.2 tron U32 TransferCount; /* 18h */ 4113 1.3.38.2 tron } MSG_TARGET_ERROR_REPLY, MPI_POINTER PTR_MSG_TARGET_ERROR_REPLY, 4114 1.3.38.2 tron TargetErrorReply_t, MPI_POINTER pTargetErrorReply_t; 4115 1.3.38.2 tron 4116 1.3.38.2 tron 4117 1.3.38.2 tron /****************************************************************************/ 4118 1.3.38.2 tron /* Target Status Send Request */ 4119 1.3.38.2 tron /****************************************************************************/ 4120 1.3.38.2 tron 4121 1.3.38.2 tron typedef struct _MSG_TARGET_STATUS_SEND_REQUEST 4122 1.3.38.2 tron { 4123 1.3.38.2 tron U8 StatusCode; /* 00h */ 4124 1.3.38.2 tron U8 StatusFlags; /* 01h */ 4125 1.3.38.2 tron U8 ChainOffset; /* 02h */ 4126 1.3.38.2 tron U8 Function; /* 03h */ 4127 1.3.38.2 tron U16 QueueTag; /* 04h */ 4128 1.3.38.2 tron U8 Reserved; /* 06h */ 4129 1.3.38.2 tron U8 MsgFlags; /* 07h */ 4130 1.3.38.2 tron U32 MsgContext; /* 08h */ 4131 1.3.38.2 tron U32 ReplyWord; /* 0Ch */ 4132 1.3.38.2 tron U8 LUN[8]; /* 10h */ 4133 1.3.38.2 tron SGE_SIMPLE_UNION StatusDataSGE; /* 18h */ 4134 1.3.38.2 tron } MSG_TARGET_STATUS_SEND_REQUEST, MPI_POINTER PTR_MSG_TARGET_STATUS_SEND_REQUEST, 4135 1.3.38.2 tron TargetStatusSendRequest_t, MPI_POINTER pTargetStatusSendRequest_t; 4136 1.3.38.2 tron 4137 1.3.38.2 tron #define TARGET_STATUS_SEND_FLAGS_AUTO_GOOD_STATUS (0x01) 4138 1.3.38.2 tron #define TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY (0x04) 4139 1.3.38.2 tron #define TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER (0x80) 4140 1.3.38.2 tron 4141 1.3.38.2 tron typedef struct _MPI_TARGET_FCP_RSP_BUFFER 4142 1.3.38.2 tron { 4143 1.3.38.2 tron U8 Reserved0[8]; /* 00h */ 4144 1.3.38.2 tron U8 FcpStatus; /* 08h */ 4145 1.3.38.2 tron U8 FcpFlags; /* 09h */ 4146 1.3.38.2 tron U8 Reserved1[2]; /* 0Ah */ 4147 1.3.38.2 tron U32 FcpResid; /* 0Ch */ 4148 1.3.38.2 tron U32 FcpSenseLength; /* 10h */ 4149 1.3.38.2 tron U32 FcpResponseLength; /* 14h */ 4150 1.3.38.2 tron U8 FcpResponseData[8]; /* 18h */ 4151 1.3.38.2 tron U8 FcpSenseData[32]; /* Pad to 64 bytes */ /* 20h */ 4152 1.3.38.2 tron } MPI_TARGET_FCP_RSP_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_RSP_BUFFER, 4153 1.3.38.2 tron MpiTargetFcpRspBuffer, MPI_POINTER pMpiTargetFcpRspBuffer; 4154 1.3.38.2 tron 4155 1.3.38.2 tron typedef struct _MPI_TARGET_SCSI_SPI_STATUS_IU 4156 1.3.38.2 tron { 4157 1.3.38.2 tron U8 Reserved0; /* 00h */ 4158 1.3.38.2 tron U8 Reserved1; /* 01h */ 4159 1.3.38.2 tron U8 Valid; /* 02h */ 4160 1.3.38.2 tron U8 Status; /* 03h */ 4161 1.3.38.2 tron U32 SenseDataListLength; /* 04h */ 4162 1.3.38.2 tron U32 PktFailuresListLength; /* 08h */ 4163 1.3.38.2 tron U8 SenseData[52]; /* Pad the IU to 64 bytes */ /* 0Ch */ 4164 1.3.38.2 tron } MPI_TARGET_SCSI_SPI_STATUS_IU, MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_STATUS_IU, 4165 1.3.38.2 tron TargetScsiSpiStatusIU_t, MPI_POINTER pTargetScsiSpiStatusIU_t; 4166 1.3.38.2 tron 4167 1.3.38.2 tron /****************************************************************************/ 4168 1.3.38.2 tron /* Target Mode Abort Request */ 4169 1.3.38.2 tron /****************************************************************************/ 4170 1.3.38.2 tron 4171 1.3.38.2 tron typedef struct _MSG_TARGET_MODE_ABORT_REQUEST 4172 1.3.38.2 tron { 4173 1.3.38.2 tron U8 AbortType; /* 00h */ 4174 1.3.38.2 tron U8 Reserved; /* 01h */ 4175 1.3.38.2 tron U8 ChainOffset; /* 02h */ 4176 1.3.38.2 tron U8 Function; /* 03h */ 4177 1.3.38.2 tron U16 Reserved1; /* 04h */ 4178 1.3.38.2 tron U8 Reserved2; /* 06h */ 4179 1.3.38.2 tron U8 MsgFlags; /* 07h */ 4180 1.3.38.2 tron U32 MsgContext; /* 08h */ 4181 1.3.38.2 tron U32 ReplyWord; /* 0Ch */ 4182 1.3.38.2 tron U32 MsgContextToAbort; /* 10h */ 4183 1.3.38.2 tron } MSG_TARGET_MODE_ABORT, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT, 4184 1.3.38.2 tron TargetModeAbort_t, MPI_POINTER pTargetModeAbort_t; 4185 1.3.38.2 tron 4186 1.3.38.2 tron #define TARGET_MODE_ABORT_TYPE_ALL_CMD_BUFFERS (0x00) 4187 1.3.38.2 tron #define TARGET_MODE_ABORT_TYPE_ALL_IO (0x01) 4188 1.3.38.2 tron #define TARGET_MODE_ABORT_TYPE_EXACT_IO (0x02) 4189 1.3.38.2 tron #define TARGET_MODE_ABORT_TYPE_EXACT_IO_REQUEST (0x03) 4190 1.3.38.2 tron 4191 1.3.38.2 tron /* Target Mode Abort Reply */ 4192 1.3.38.2 tron 4193 1.3.38.2 tron typedef struct _MSG_TARGET_MODE_ABORT_REPLY 4194 1.3.38.2 tron { 4195 1.3.38.2 tron U16 Reserved; /* 00h */ 4196 1.3.38.2 tron U8 MsgLength; /* 02h */ 4197 1.3.38.2 tron U8 Function; /* 03h */ 4198 1.3.38.2 tron U16 Reserved1; /* 04h */ 4199 1.3.38.2 tron U8 Reserved2; /* 06h */ 4200 1.3.38.2 tron U8 MsgFlags; /* 07h */ 4201 1.3.38.2 tron U32 MsgContext; /* 08h */ 4202 1.3.38.2 tron U16 Reserved3; /* 0Ch */ 4203 1.3.38.2 tron U16 IOCStatus; /* 0Eh */ 4204 1.3.38.2 tron U32 IOCLogInfo; /* 10h */ 4205 1.3.38.2 tron U32 AbortCount; /* 14h */ 4206 1.3.38.2 tron } MSG_TARGET_MODE_ABORT_REPLY, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT_REPLY, 4207 1.3.38.2 tron TargetModeAbortReply_t, MPI_POINTER pTargetModeAbortReply_t; 4208 1.3.38.2 tron 4209 1.3.38.2 tron 4210 1.3.38.2 tron /****************************************************************************/ 4211 1.3.38.2 tron /* Target Mode Context Reply */ 4212 1.3.38.2 tron /****************************************************************************/ 4213 1.3.38.2 tron 4214 1.3.38.2 tron #define TARGET_MODE_REPLY_IO_INDEX_MASK (0x00003FFF) 4215 1.3.38.2 tron #define TARGET_MODE_REPLY_IO_INDEX_SHIFT (0) 4216 1.3.38.2 tron #define TARGET_MODE_REPLY_INITIATOR_INDEX_MASK (0x03FFC000) 4217 1.3.38.2 tron #define TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT (14) 4218 1.3.38.2 tron #define TARGET_MODE_REPLY_ALIAS_MASK (0x0C000000) 4219 1.3.38.2 tron #define TARGET_MODE_REPLY_ALIAS_SHIFT (26) 4220 1.3.38.2 tron #define TARGET_MODE_REPLY_PORT_MASK (0x10000000) 4221 1.3.38.2 tron #define TARGET_MODE_REPLY_PORT_SHIFT (28) 4222 1.3.38.2 tron 4223 1.3.38.2 tron 4224 1.3.38.2 tron #define GET_IO_INDEX(x) (((x) & TARGET_MODE_REPLY_IO_INDEX_MASK) \ 4225 1.3.38.2 tron >> TARGET_MODE_REPLY_IO_INDEX_SHIFT) 4226 1.3.38.2 tron 4227 1.3.38.2 tron #define SET_IO_INDEX(t, i) \ 4228 1.3.38.2 tron ((t) = ((t) & ~TARGET_MODE_REPLY_IO_INDEX_MASK) | \ 4229 1.3.38.2 tron (((i) << TARGET_MODE_REPLY_IO_INDEX_SHIFT) & \ 4230 1.3.38.2 tron TARGET_MODE_REPLY_IO_INDEX_MASK)) 4231 1.3.38.2 tron 4232 1.3.38.2 tron #define GET_INITIATOR_INDEX(x) (((x) & TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) \ 4233 1.3.38.2 tron >> TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) 4234 1.3.38.2 tron 4235 1.3.38.2 tron #define SET_INITIATOR_INDEX(t, ii) \ 4236 1.3.38.2 tron ((t) = ((t) & ~TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) | \ 4237 1.3.38.2 tron (((ii) << TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) & \ 4238 1.3.38.2 tron TARGET_MODE_REPLY_INITIATOR_INDEX_MASK)) 4239 1.3.38.2 tron 4240 1.3.38.2 tron #define GET_ALIAS(x) (((x) & TARGET_MODE_REPLY_ALIAS_MASK) \ 4241 1.3.38.2 tron >> TARGET_MODE_REPLY_ALIAS_SHIFT) 4242 1.3.38.2 tron 4243 1.3.38.2 tron #define SET_ALIAS(t, a) ((t) = ((t) & ~TARGET_MODE_REPLY_ALIAS_MASK) | \ 4244 1.3.38.2 tron (((a) << TARGET_MODE_REPLY_ALIAS_SHIFT) & \ 4245 1.3.38.2 tron TARGET_MODE_REPLY_ALIAS_MASK)) 4246 1.3.38.2 tron 4247 1.3.38.2 tron #define GET_PORT(x) (((x) & TARGET_MODE_REPLY_PORT_MASK) \ 4248 1.3.38.2 tron >> TARGET_MODE_REPLY_PORT_SHIFT) 4249 1.3.38.2 tron 4250 1.3.38.2 tron #define SET_PORT(t, p) ((t) = ((t) & ~TARGET_MODE_REPLY_PORT_MASK) | \ 4251 1.3.38.2 tron (((p) << TARGET_MODE_REPLY_PORT_SHIFT) & \ 4252 1.3.38.2 tron TARGET_MODE_REPLY_PORT_MASK)) 4253 1.3.38.2 tron 4254 1.3.38.2 tron /* the following obsolete values are for MPI v1.0 support */ 4255 1.3.38.2 tron #define TARGET_MODE_REPLY_0100_MASK_HOST_INDEX (0x000003FF) 4256 1.3.38.2 tron #define TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX (0) 4257 1.3.38.2 tron #define TARGET_MODE_REPLY_0100_MASK_IOC_INDEX (0x001FF800) 4258 1.3.38.2 tron #define TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX (11) 4259 1.3.38.2 tron #define TARGET_MODE_REPLY_0100_PORT_MASK (0x00400000) 4260 1.3.38.2 tron #define TARGET_MODE_REPLY_0100_PORT_SHIFT (22) 4261 1.3.38.2 tron #define TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX (0x1F800000) 4262 1.3.38.2 tron #define TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX (23) 4263 1.3.38.2 tron 4264 1.3.38.2 tron #define GET_HOST_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) \ 4265 1.3.38.2 tron >> TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) 4266 1.3.38.2 tron 4267 1.3.38.2 tron #define SET_HOST_INDEX_0100(t, hi) \ 4268 1.3.38.2 tron ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) | \ 4269 1.3.38.2 tron (((hi) << TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) & \ 4270 1.3.38.2 tron TARGET_MODE_REPLY_0100_MASK_HOST_INDEX)) 4271 1.3.38.2 tron 4272 1.3.38.2 tron #define GET_IOC_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) \ 4273 1.3.38.2 tron >> TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) 4274 1.3.38.2 tron 4275 1.3.38.2 tron #define SET_IOC_INDEX_0100(t, ii) \ 4276 1.3.38.2 tron ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) | \ 4277 1.3.38.2 tron (((ii) << TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) & \ 4278 1.3.38.2 tron TARGET_MODE_REPLY_0100_MASK_IOC_INDEX)) 4279 1.3.38.2 tron 4280 1.3.38.2 tron #define GET_INITIATOR_INDEX_0100(x) \ 4281 1.3.38.2 tron (((x) & TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) \ 4282 1.3.38.2 tron >> TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) 4283 1.3.38.2 tron 4284 1.3.38.2 tron #define SET_INITIATOR_INDEX_0100(t, ii) \ 4285 1.3.38.2 tron ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) | \ 4286 1.3.38.2 tron (((ii) << TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) & \ 4287 1.3.38.2 tron TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX)) 4288 1.3.38.2 tron 4289 1.3.38.2 tron 4290 1.3.38.2 tron #endif 4291 1.3.38.2 tron 4292
Indexes created Wed Oct 22 13:09:56 GMT 2025