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mtd803var.h revision 1.1.8.3
      1  1.1.8.3   skrll /* $NetBSD: mtd803var.h,v 1.1.8.3 2004/09/21 13:28:05 skrll Exp $ */
      2      1.1  martin 
      3      1.1  martin /*-
      4      1.1  martin  * Copyright (c) 2002 The NetBSD Foundation, Inc.
      5      1.1  martin  * All rights reserved.
      6      1.1  martin  *
      7      1.1  martin  * This code is derived from software contributed to The NetBSD Foundation
      8      1.1  martin  * by Peter Bex <Peter.Bex (at) student.kun.nl>.
      9      1.1  martin  *
     10      1.1  martin  * Redistribution and use in source and binary forms, with or without
     11      1.1  martin  * modification, are permitted provided that the following conditions
     12      1.1  martin  * are met:
     13      1.1  martin  * 1. Redistributions of source code must retain the above copyright
     14      1.1  martin  *    notice, this list of conditions and the following disclaimer.
     15      1.1  martin  * 2. Redistributions in binary form must reproduce the above copyright
     16      1.1  martin  *    notice, this list of conditions and the following disclaimer in the
     17      1.1  martin  *    documentation and/or other materials provided with the distribution.
     18      1.1  martin  * 3. All advertising materials mentioning features or use of this software
     19      1.1  martin  *    must display the following acknowledgement:
     20      1.1  martin  *      This product includes software developed by the NetBSD
     21      1.1  martin  *      Foundation, Inc. and its contributors.
     22      1.1  martin  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23      1.1  martin  *    contributors may be used to endorse or promote products derived
     24      1.1  martin  *    from this software without specific prior written permission.
     25      1.1  martin  *
     26      1.1  martin  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27      1.1  martin  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28      1.1  martin  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29      1.1  martin  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30      1.1  martin  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31      1.1  martin  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32      1.1  martin  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33      1.1  martin  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34      1.1  martin  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35      1.1  martin  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36      1.1  martin  * POSSIBILITY OF SUCH DAMAGE.
     37      1.1  martin  */
     38      1.1  martin 
     39      1.1  martin #include <sys/device.h>
     40      1.1  martin #include <sys/socket.h>
     41      1.1  martin #include <net/if.h>
     42      1.1  martin #include <net/if_ether.h>
     43      1.1  martin #include <net/if_media.h>
     44      1.1  martin #include <dev/mii/miivar.h>
     45      1.1  martin 
     46      1.1  martin 
     47      1.1  martin /* Number of Tx and Rx descriptors */
     48  1.1.8.1   skrll #define MTD_NUM_TXD		64
     49  1.1.8.1   skrll #define MTD_NUM_RXD		64
     50      1.1  martin /* Tx and Rx buffer size */
     51  1.1.8.1   skrll #define MTD_RXBUF_SIZE		1536
     52  1.1.8.1   skrll #define MTD_TXBUF_SIZE		1536
     53      1.1  martin 
     54      1.1  martin /* DMA mem must be longword (4 bytes) aligned */
     55      1.1  martin #define MTD_DMA_ALIGN		4
     56      1.1  martin 
     57      1.1  martin 
     58      1.1  martin /* Descriptor structure */
     59      1.1  martin struct mtd_desc {
     60      1.1  martin 	u_int32_t stat;			/* Status field */
     61      1.1  martin 	u_int32_t conf;			/* Config field */
     62      1.1  martin 	u_int32_t data;			/* Data buffer start address */
     63      1.1  martin 	u_int32_t next;			/* Next descriptor address */
     64      1.1  martin };
     65      1.1  martin 
     66      1.1  martin /* Softc struct */
     67      1.1  martin struct mtd_softc {
     68      1.1  martin 	struct device		dev;
     69      1.1  martin 	struct mii_data		mii;
     70      1.1  martin 	struct ethercom		ethercom;
     71      1.1  martin 	bus_space_tag_t		bus_tag;
     72      1.1  martin 	bus_space_handle_t	bus_handle;
     73      1.1  martin 	void *			sd_hook;
     74      1.1  martin 	u_int8_t		eaddr[ETHER_ADDR_LEN];
     75      1.1  martin 	volatile unsigned int	cur_tx;
     76      1.1  martin 	volatile unsigned int	cur_rx;
     77      1.1  martin 
     78      1.1  martin 	bus_dma_tag_t		dma_tag;
     79      1.1  martin 	struct mtd_desc *	desc;
     80      1.1  martin 	bus_dmamap_t		desc_dma_map;
     81      1.1  martin 	caddr_t			buf;
     82      1.1  martin 	bus_dmamap_t		buf_dma_map;
     83      1.1  martin 
     84      1.1  martin #if NRND > 0
     85      1.1  martin 	rndsource_element_t	rnd_src;
     86      1.1  martin #endif
     87      1.1  martin };
     88      1.1  martin 
     89      1.1  martin 
     90      1.1  martin /* Transmit descriptor layout */
     91      1.1  martin 	/* Status register */
     92      1.1  martin #define MTD_TXD_OWNER		0x80000000	/* Owner bit */
     93      1.1  martin #define MTD_TXD_RSRVD0		0x7fffc000	/* Bits [30:14] are reserved */
     94      1.1  martin #define MTD_TXD_ABORT		0x00002000	/* Transmit aborted */
     95      1.1  martin #define MTD_TXD_CSL		0x00001000	/* Carrier Sense Loss */
     96      1.1  martin #define MTD_TXD_LCOL		0x00000800	/* Late collision */
     97      1.1  martin #define MTD_TXD_EXCOL		0x00000400	/* Excessive collisions */
     98      1.1  martin #define MTD_TXD_DFD		0x00000200	/* Deferred */
     99      1.1  martin #define MTD_TXD_HBFAIL		0x00000100	/* Heart-beat failure */
    100      1.1  martin #define MTD_TXD_NRC		0x000000ff	/* Collision Retry Count */
    101      1.1  martin 	/* Configuration register */
    102      1.1  martin #define MTD_TXD_CONF_IRQC	0x80000000	/* Interrupt control */
    103      1.1  martin #define MTD_TXD_CONF_EIRQC	0x40000000	/* Early interrupt control */
    104      1.1  martin #define MTD_TXD_CONF_LSD	0x20000000	/* Last descriptor */
    105      1.1  martin #define MTD_TXD_CONF_FSD	0x10000000	/* First descriptor */
    106      1.1  martin #define MTD_TXD_CONF_CRC	0x08000000	/* CRC append */
    107      1.1  martin #define MTD_TXD_CONF_PAD	0x04000000	/* Pad control */
    108      1.1  martin #define MTD_TXD_CONF_RLCOL	0x02000000	/* Retry Late Collision */
    109      1.1  martin #define MTD_TXD_CONF_RSRVD0	0x01c00000	/* Bits [24:22] are reserved */
    110      1.1  martin #define MTD_TXD_CONF_PKTS	0x003ff800	/* Packet size */
    111      1.1  martin #define MTD_TXD_CONF_BUFS	0x000007ff	/* Transmit buffer size */
    112      1.1  martin 
    113      1.1  martin #define MTD_TXD_PKTS_SHIFT	11
    114      1.1  martin 
    115      1.1  martin /* Receive descriptor layout */
    116      1.1  martin 	/* Status register */
    117      1.1  martin #define MTD_RXD_OWNER		0x80000000	/* Owner bit */
    118      1.1  martin #define MTD_RXD_RSRVD3		0x70000000	/* Bits [30:28] are reserved */
    119      1.1  martin #define MTD_RXD_FLEN		0x0fff0000	/* Frame length */
    120      1.1  martin #define MTD_RXD_RSRVD2		0x00008000	/* Bit 15 is reserved */
    121      1.1  martin #define MTD_RXD_MAR		0x00004000	/* Multicast Address Received */
    122      1.1  martin #define MTD_RXD_BAR		0x00002000	/* Broadcast Address Received */
    123      1.1  martin #define MTD_RXD_PAR		0x00001000	/* Physical Address Received */
    124      1.1  martin #define MTD_RXD_FSD		0x00000800	/* First Descriptor */
    125      1.1  martin #define MTD_RXD_LSD		0x00000400	/* Last Descriptor */
    126      1.1  martin #define MTD_RXD_RSRVD1		0x00000300	/* Bits [9:8] are reserved */
    127      1.1  martin #define MTD_RXD_ERRSUM		0x00000080	/* Error summary */
    128      1.1  martin #define MTD_RXD_RUNT		0x00000040	/* Runt packet received */
    129      1.1  martin #define MTD_RXD_LONG		0x00000020	/* Long packet received */
    130      1.1  martin #define MTD_RXD_FALERR		0x00000010	/* Frame alignment error */
    131      1.1  martin #define MTD_RXD_CRC		0x00000008	/* CRC error. See manual :) */
    132      1.1  martin #define MTD_RXD_RXERR		0x00000004	/* Receive error */
    133      1.1  martin #define MTD_RXD_RSRVD0		0x00000003	/* Bits [1:0] are reserved */
    134      1.1  martin 	/* Configuration register */
    135  1.1.8.1   skrll #define MTD_RXD_CONF_RSRVD0	0xfffff800	/* Bits [31:11] are reserved */
    136  1.1.8.1   skrll #define MTD_RXD_CONF_BUFS	0x000007ff	/* Receive buffer size */
    137      1.1  martin 
    138      1.1  martin #define MTD_RXD_FLEN_SHIFT	16
    139      1.1  martin 
    140      1.1  martin extern int mtd_config __P((struct mtd_softc *));
    141      1.1  martin extern int mtd_irq_h __P((void *));
    142