mx98905.c revision 1.10 1 1.10 ad /* $NetBSD: mx98905.c,v 1.10 2007/10/19 11:59:57 ad Exp $ */
2 1.1 bjh21
3 1.1 bjh21 /*-
4 1.1 bjh21 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 1.1 bjh21 * All rights reserved.
6 1.1 bjh21 *
7 1.1 bjh21 * This code is derived from software contributed to The NetBSD Foundation
8 1.1 bjh21 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 bjh21 * NASA Ames Research Center.
10 1.1 bjh21 *
11 1.1 bjh21 * Redistribution and use in source and binary forms, with or without
12 1.1 bjh21 * modification, are permitted provided that the following conditions
13 1.1 bjh21 * are met:
14 1.1 bjh21 * 1. Redistributions of source code must retain the above copyright
15 1.1 bjh21 * notice, this list of conditions and the following disclaimer.
16 1.1 bjh21 * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 bjh21 * notice, this list of conditions and the following disclaimer in the
18 1.1 bjh21 * documentation and/or other materials provided with the distribution.
19 1.1 bjh21 * 3. All advertising materials mentioning features or use of this software
20 1.1 bjh21 * must display the following acknowledgement:
21 1.1 bjh21 * This product includes software developed by the NetBSD
22 1.1 bjh21 * Foundation, Inc. and its contributors.
23 1.1 bjh21 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 bjh21 * contributors may be used to endorse or promote products derived
25 1.1 bjh21 * from this software without specific prior written permission.
26 1.1 bjh21 *
27 1.1 bjh21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 bjh21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 bjh21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 bjh21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 bjh21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 bjh21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 bjh21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 bjh21 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 bjh21 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 bjh21 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 bjh21 * POSSIBILITY OF SUCH DAMAGE.
38 1.1 bjh21 */
39 1.1 bjh21
40 1.1 bjh21 /*
41 1.1 bjh21 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
42 1.1 bjh21 * adapters.
43 1.1 bjh21 *
44 1.1 bjh21 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
45 1.1 bjh21 *
46 1.1 bjh21 * Copyright (C) 1993, David Greenman. This software may be used, modified,
47 1.1 bjh21 * copied, distributed, and sold, in both source and binary form provided that
48 1.1 bjh21 * the above copyright and these terms are retained. Under no circumstances is
49 1.1 bjh21 * the author responsible for the proper functioning of this software, nor does
50 1.1 bjh21 * the author assume any responsibility for damages incurred with its use.
51 1.1 bjh21 */
52 1.1 bjh21
53 1.1 bjh21 /*
54 1.1 bjh21 * Special routines for the Macronix MX 98905. For use with the "ne" driver.
55 1.1 bjh21 */
56 1.1 bjh21
57 1.1 bjh21 /*
58 1.5 keihan * <URL:http://mail-index.NetBSD.org/port-arm32/1996/06/23/0005.html>:
59 1.1 bjh21 * There are 2 types of etherh card. One uses the macronics chipset MX98905
60 1.4 wiz * and that chipset has a bug in it, in that it the MSB remote DMA
61 1.1 bjh21 * register does not work. There is a workaround for this which
62 1.1 bjh21 * should be around soon. In fact, I think only the buffer ram test
63 1.4 wiz * ever transfers more than 256 bytes across the DMA channel, so diabling
64 1.1 bjh21 * it will make the mx stuff work.
65 1.1 bjh21 */
66 1.1 bjh21
67 1.1 bjh21 #include <sys/param.h>
68 1.1 bjh21
69 1.10 ad __KERNEL_RCSID(0, "$NetBSD: mx98905.c,v 1.10 2007/10/19 11:59:57 ad Exp $");
70 1.1 bjh21
71 1.1 bjh21 #include <sys/device.h>
72 1.1 bjh21 #include <sys/mbuf.h>
73 1.1 bjh21 #include <sys/socket.h>
74 1.1 bjh21 #include <sys/syslog.h>
75 1.1 bjh21 #include <sys/systm.h>
76 1.1 bjh21
77 1.1 bjh21 #include <net/if.h>
78 1.1 bjh21 #include <net/if_ether.h>
79 1.1 bjh21 #include <net/if_media.h>
80 1.1 bjh21
81 1.10 ad #include <sys/bus.h>
82 1.1 bjh21
83 1.1 bjh21 #include <dev/ic/dp8390reg.h>
84 1.1 bjh21 #include <dev/ic/dp8390var.h>
85 1.1 bjh21 #include <dev/ic/ne2000reg.h>
86 1.1 bjh21 #include <dev/ic/ne2000var.h>
87 1.1 bjh21 #include <dev/ic/mx98905var.h>
88 1.1 bjh21
89 1.1 bjh21 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
90 1.1 bjh21 #define bus_space_write_stream_2 bus_space_write_2
91 1.1 bjh21 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
92 1.1 bjh21 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
93 1.1 bjh21 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
94 1.2 bjh21
95 1.8 perry static inline void mx98905_write_setup(struct dp8390_softc *, int, int);
96 1.8 perry static inline void mx98905_write_wait(struct dp8390_softc *);
97 1.1 bjh21
98 1.1 bjh21 void
99 1.1 bjh21 mx98905_attach(struct dp8390_softc *sc)
100 1.1 bjh21 {
101 1.1 bjh21
102 1.1 bjh21 sc->ring_copy = mx98905_ring_copy;
103 1.1 bjh21 sc->write_mbuf = mx98905_write_mbuf;
104 1.1 bjh21 sc->read_hdr = mx98905_read_hdr;
105 1.1 bjh21 }
106 1.1 bjh21
107 1.8 perry static inline void
108 1.1 bjh21 mx98905_write_setup(sc, len, buf)
109 1.1 bjh21 struct dp8390_softc *sc;
110 1.1 bjh21 int len, buf;
111 1.1 bjh21 {
112 1.1 bjh21 bus_space_tag_t nict = sc->sc_regt;
113 1.1 bjh21 bus_space_handle_t nich = sc->sc_regh;
114 1.1 bjh21
115 1.1 bjh21 /* Select page 0 registers. */
116 1.1 bjh21 NIC_BARRIER(nict, nich);
117 1.1 bjh21 bus_space_write_1(nict, nich, ED_P0_CR,
118 1.1 bjh21 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
119 1.1 bjh21 NIC_BARRIER(nict, nich);
120 1.1 bjh21
121 1.1 bjh21 /* Reset remote DMA complete flag. */
122 1.1 bjh21 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
123 1.1 bjh21 NIC_BARRIER(nict, nich);
124 1.1 bjh21
125 1.1 bjh21 /* Set up DMA byte count. */
126 1.1 bjh21 bus_space_write_1(nict, nich, ED_P0_RBCR0, len);
127 1.1 bjh21 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8);
128 1.1 bjh21
129 1.1 bjh21 /* Set up destination address in NIC mem. */
130 1.1 bjh21 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf);
131 1.1 bjh21 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8);
132 1.1 bjh21
133 1.1 bjh21 /* Set remote DMA write. */
134 1.1 bjh21 NIC_BARRIER(nict, nich);
135 1.1 bjh21 bus_space_write_1(nict, nich,
136 1.1 bjh21 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
137 1.1 bjh21 NIC_BARRIER(nict, nich);
138 1.1 bjh21 }
139 1.1 bjh21
140 1.1 bjh21
141 1.8 perry static inline void
142 1.1 bjh21 mx98905_write_wait(sc)
143 1.1 bjh21 struct dp8390_softc *sc;
144 1.1 bjh21 {
145 1.1 bjh21 int maxwait = 100; /* about 120us */
146 1.1 bjh21 bus_space_tag_t nict = sc->sc_regt;
147 1.1 bjh21 bus_space_handle_t nich = sc->sc_regh;
148 1.1 bjh21
149 1.1 bjh21 /*
150 1.1 bjh21 * Wait for remote DMA to complete. This is necessary because on the
151 1.1 bjh21 * transmit side, data is handled internally by the NIC in bursts, and
152 1.1 bjh21 * we can't start another remote DMA until this one completes. Not
153 1.1 bjh21 * waiting causes really bad things to happen - like the NIC wedging
154 1.1 bjh21 * the bus.
155 1.1 bjh21 */
156 1.1 bjh21 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
157 1.1 bjh21 ED_ISR_RDC) && --maxwait) {
158 1.1 bjh21 bus_space_read_1(nict, nich, ED_P0_CRDA1);
159 1.1 bjh21 bus_space_read_1(nict, nich, ED_P0_CRDA0);
160 1.1 bjh21 NIC_BARRIER(nict, nich);
161 1.1 bjh21 DELAY(1);
162 1.1 bjh21 }
163 1.1 bjh21
164 1.1 bjh21 if (maxwait == 0) {
165 1.1 bjh21 log(LOG_WARNING,
166 1.1 bjh21 "%s: remote transmit DMA failed to complete\n",
167 1.1 bjh21 sc->sc_dev.dv_xname);
168 1.1 bjh21 dp8390_reset(sc);
169 1.1 bjh21 }
170 1.1 bjh21 }
171 1.1 bjh21
172 1.1 bjh21 /*
173 1.1 bjh21 * Write an mbuf chain to the destination NIC memory address using programmed
174 1.1 bjh21 * I/O.
175 1.1 bjh21 */
176 1.1 bjh21 int
177 1.1 bjh21 mx98905_write_mbuf(sc, m, buf)
178 1.1 bjh21 struct dp8390_softc *sc;
179 1.1 bjh21 struct mbuf *m;
180 1.1 bjh21 int buf;
181 1.1 bjh21 {
182 1.1 bjh21 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
183 1.1 bjh21 bus_space_tag_t nict = sc->sc_regt;
184 1.1 bjh21 bus_space_handle_t nich = sc->sc_regh;
185 1.1 bjh21 bus_space_tag_t asict = nsc->sc_asict;
186 1.1 bjh21 bus_space_handle_t asich = nsc->sc_asich;
187 1.1 bjh21 int savelen, dmalen, resid, len;
188 1.1 bjh21 u_int8_t *data, savebyte[2];
189 1.1 bjh21 int l, leftover;
190 1.1 bjh21 #ifdef DIAGNOSTIC
191 1.1 bjh21 u_int8_t *lim;
192 1.1 bjh21 #endif
193 1.3 bouyer int i;
194 1.1 bjh21
195 1.1 bjh21 resid = savelen = m->m_pkthdr.len;
196 1.1 bjh21
197 1.1 bjh21 dmalen = min(resid, 254);
198 1.1 bjh21
199 1.1 bjh21 mx98905_write_setup(sc, dmalen, buf);
200 1.1 bjh21
201 1.1 bjh21 buf += dmalen;
202 1.1 bjh21 resid -= dmalen;
203 1.1 bjh21
204 1.1 bjh21 /*
205 1.1 bjh21 * Transfer the mbuf chain to the NIC memory. NE2000 cards
206 1.1 bjh21 * require that data be transferred as words, and only words,
207 1.1 bjh21 * so that case requires some extra code to patch over odd-length
208 1.1 bjh21 * mbufs.
209 1.1 bjh21 */
210 1.1 bjh21 /* NE2000s are a bit trickier. */
211 1.1 bjh21 /* Start out with no leftover data. */
212 1.1 bjh21 leftover = 0;
213 1.1 bjh21 savebyte[0] = savebyte[1] = 0;
214 1.1 bjh21
215 1.1 bjh21 for (; m != 0; m = m->m_next) {
216 1.1 bjh21 l = m->m_len;
217 1.1 bjh21 if (l == 0)
218 1.1 bjh21 continue;
219 1.1 bjh21 data = mtod(m, u_int8_t *);
220 1.1 bjh21 #ifdef DIAGNOSTIC
221 1.1 bjh21 lim = data + l;
222 1.1 bjh21 #endif
223 1.1 bjh21 while (l > 0) {
224 1.1 bjh21 if (leftover) {
225 1.1 bjh21 /*
226 1.1 bjh21 * Data left over (from mbuf or
227 1.1 bjh21 * realignment). Buffer the next
228 1.1 bjh21 * byte, and write it and the leftover
229 1.1 bjh21 * data out.
230 1.1 bjh21 */
231 1.1 bjh21 savebyte[1] = *data++;
232 1.1 bjh21 l--;
233 1.1 bjh21 bus_space_write_stream_2(asict, asich,
234 1.1 bjh21 NE2000_ASIC_DATA, *(u_int16_t *)savebyte);
235 1.1 bjh21 dmalen -= 2;
236 1.1 bjh21 leftover = 0;
237 1.1 bjh21 } else if (BUS_SPACE_ALIGNED_POINTER(data,
238 1.1 bjh21 u_int16_t) == 0) {
239 1.1 bjh21 /* Unaligned data; buffer the next byte. */
240 1.1 bjh21 savebyte[0] = *data++;
241 1.1 bjh21 l--;
242 1.1 bjh21 leftover = 1;
243 1.1 bjh21 } else {
244 1.1 bjh21 /*
245 1.1 bjh21 * Aligned data; output contiguous
246 1.1 bjh21 * words as much as we can, then
247 1.1 bjh21 * buffer the remaining byte, if any.
248 1.1 bjh21 */
249 1.1 bjh21 len = min(l, dmalen);
250 1.1 bjh21 leftover = len & 1;
251 1.1 bjh21 len &= ~1;
252 1.1 bjh21 bus_space_write_multi_stream_2(asict,
253 1.1 bjh21 asich, NE2000_ASIC_DATA,
254 1.1 bjh21 (u_int16_t *)data, len >> 1);
255 1.1 bjh21 dmalen -= len;
256 1.1 bjh21 data += len;
257 1.1 bjh21 if (leftover)
258 1.1 bjh21 savebyte[0] = *data++;
259 1.1 bjh21 l -= len + leftover;
260 1.1 bjh21 }
261 1.1 bjh21 if (dmalen == 0 && resid > 0) {
262 1.1 bjh21 mx98905_write_wait(sc);
263 1.1 bjh21 dmalen = min(resid, 254);
264 1.1 bjh21
265 1.1 bjh21 mx98905_write_setup(sc, dmalen, buf);
266 1.1 bjh21
267 1.1 bjh21 buf += dmalen;
268 1.1 bjh21 resid -= dmalen;
269 1.1 bjh21 }
270 1.1 bjh21 }
271 1.1 bjh21 if (l < 0)
272 1.1 bjh21 panic("mx98905_write_mbuf: negative len");
273 1.1 bjh21 #ifdef DIAGNOSTIC
274 1.1 bjh21 if (data != lim)
275 1.1 bjh21 panic("mx98905_write_mbuf: data != lim");
276 1.1 bjh21 #endif
277 1.1 bjh21 }
278 1.1 bjh21 if (leftover) {
279 1.1 bjh21 savebyte[1] = 0;
280 1.1 bjh21 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA,
281 1.1 bjh21 *(u_int16_t *)savebyte);
282 1.3 bouyer }
283 1.3 bouyer if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
284 1.3 bouyer for(i = 0; i < (ETHER_MIN_LEN - ETHER_CRC_LEN - savelen) >> 1;
285 1.3 bouyer i++)
286 1.3 bouyer bus_space_write_stream_2(asict, asich,
287 1.3 bouyer NE2000_ASIC_DATA, 0);
288 1.3 bouyer savelen = ETHER_MIN_LEN - ETHER_CRC_LEN;
289 1.1 bjh21 }
290 1.1 bjh21 NIC_BARRIER(nict, nich);
291 1.1 bjh21
292 1.1 bjh21 mx98905_write_wait(sc);
293 1.1 bjh21
294 1.1 bjh21 return (savelen);
295 1.1 bjh21 }
296 1.1 bjh21
297 1.1 bjh21 /*
298 1.1 bjh21 * Given a source and destination address, copy 'amout' of a packet from
299 1.1 bjh21 * the ring buffer into a linear destination buffer. Takes into account
300 1.1 bjh21 * ring-wrap.
301 1.1 bjh21 */
302 1.1 bjh21 int
303 1.1 bjh21 mx98905_ring_copy(sc, src, dst, amount)
304 1.1 bjh21 struct dp8390_softc *sc;
305 1.1 bjh21 int src;
306 1.9 christos void *dst;
307 1.1 bjh21 u_short amount;
308 1.1 bjh21 {
309 1.1 bjh21 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
310 1.1 bjh21 bus_space_tag_t nict = sc->sc_regt;
311 1.1 bjh21 bus_space_handle_t nich = sc->sc_regh;
312 1.1 bjh21 bus_space_tag_t asict = nsc->sc_asict;
313 1.1 bjh21 bus_space_handle_t asich = nsc->sc_asich;
314 1.1 bjh21 u_short tmp_amount;
315 1.6 he int useword = nsc->sc_useword;
316 1.1 bjh21
317 1.1 bjh21 /* Does copy wrap to lower addr in ring buffer? */
318 1.1 bjh21 if (src + amount > sc->mem_end) {
319 1.1 bjh21 tmp_amount = sc->mem_end - src;
320 1.1 bjh21
321 1.1 bjh21 /* Copy amount up to end of NIC memory. */
322 1.1 bjh21 mx98905_readmem(nict, nich, asict, asich, src,
323 1.1 bjh21 (u_int8_t *)dst, tmp_amount, useword);
324 1.1 bjh21
325 1.1 bjh21 amount -= tmp_amount;
326 1.1 bjh21 src = sc->mem_ring;
327 1.1 bjh21 dst += tmp_amount;
328 1.1 bjh21 }
329 1.1 bjh21
330 1.1 bjh21 mx98905_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst,
331 1.1 bjh21 amount, useword);
332 1.1 bjh21
333 1.1 bjh21 return (src + amount);
334 1.1 bjh21 }
335 1.1 bjh21
336 1.1 bjh21 void
337 1.1 bjh21 mx98905_read_hdr(sc, buf, hdr)
338 1.1 bjh21 struct dp8390_softc *sc;
339 1.1 bjh21 int buf;
340 1.1 bjh21 struct dp8390_ring *hdr;
341 1.1 bjh21 {
342 1.1 bjh21 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
343 1.1 bjh21
344 1.1 bjh21 mx98905_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich,
345 1.1 bjh21 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring),
346 1.6 he nsc->sc_useword);
347 1.1 bjh21 #if BYTE_ORDER == BIG_ENDIAN
348 1.1 bjh21 hdr->count = bswap16(hdr->count);
349 1.1 bjh21 #endif
350 1.1 bjh21 }
351 1.1 bjh21
352 1.8 perry static inline void
353 1.1 bjh21 mx98905_read_setup(bus_space_tag_t nict, bus_space_handle_t nich,
354 1.1 bjh21 int len, int buf)
355 1.1 bjh21 {
356 1.1 bjh21
357 1.1 bjh21 /* Select page 0 registers. */
358 1.1 bjh21 NIC_BARRIER(nict, nich);
359 1.1 bjh21 bus_space_write_1(nict, nich, ED_P0_CR,
360 1.1 bjh21 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
361 1.1 bjh21 NIC_BARRIER(nict, nich);
362 1.1 bjh21
363 1.1 bjh21 /* Set up DMA byte count. */
364 1.1 bjh21 bus_space_write_1(nict, nich, ED_P0_RBCR0, len);
365 1.1 bjh21 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8);
366 1.1 bjh21
367 1.1 bjh21 /* Set up source address in NIC mem. */
368 1.1 bjh21 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf);
369 1.1 bjh21 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8);
370 1.1 bjh21
371 1.1 bjh21 NIC_BARRIER(nict, nich);
372 1.1 bjh21 bus_space_write_1(nict, nich, ED_P0_CR,
373 1.1 bjh21 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA);
374 1.1 bjh21
375 1.1 bjh21 bus_space_barrier(nict, nich, 0, NE2000_NPORTS,
376 1.1 bjh21 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
377 1.1 bjh21 }
378 1.1 bjh21
379 1.1 bjh21 /*
380 1.1 bjh21 * Given a NIC memory source address and a host memory destination address,
381 1.1 bjh21 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is
382 1.1 bjh21 * rounded up to a word - ok as long as mbufs are word sized.
383 1.1 bjh21 */
384 1.1 bjh21 void
385 1.1 bjh21 mx98905_readmem(nict, nich, asict, asich, src, dst, amount, useword)
386 1.1 bjh21 bus_space_tag_t nict;
387 1.1 bjh21 bus_space_handle_t nich;
388 1.1 bjh21 bus_space_tag_t asict;
389 1.1 bjh21 bus_space_handle_t asich;
390 1.1 bjh21 int src;
391 1.1 bjh21 u_int8_t *dst;
392 1.1 bjh21 size_t amount;
393 1.1 bjh21 int useword;
394 1.1 bjh21 {
395 1.1 bjh21 int len, resid;
396 1.1 bjh21
397 1.1 bjh21 resid = amount;
398 1.1 bjh21 /* Round up to a word. */
399 1.1 bjh21 if (resid & 1)
400 1.1 bjh21 ++resid;
401 1.1 bjh21
402 1.1 bjh21 while (resid > 0) {
403 1.1 bjh21 len = min(resid, 254);
404 1.1 bjh21 mx98905_read_setup(nict, nich, len, src);
405 1.1 bjh21 if (useword)
406 1.1 bjh21 bus_space_read_multi_stream_2(asict, asich,
407 1.1 bjh21 NE2000_ASIC_DATA, (u_int16_t *)dst, len >> 1);
408 1.1 bjh21 else
409 1.1 bjh21 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA,
410 1.1 bjh21 dst, len);
411 1.1 bjh21 resid -= len;
412 1.1 bjh21 src += len;
413 1.1 bjh21 dst += len;
414 1.1 bjh21 }
415 1.1 bjh21 }
416