mx98905.c revision 1.1
1 /* $NetBSD: mx98905.c,v 1.1 2001/12/15 17:47:35 bjh21 Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 42 * adapters. 43 * 44 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 45 * 46 * Copyright (C) 1993, David Greenman. This software may be used, modified, 47 * copied, distributed, and sold, in both source and binary form provided that 48 * the above copyright and these terms are retained. Under no circumstances is 49 * the author responsible for the proper functioning of this software, nor does 50 * the author assume any responsibility for damages incurred with its use. 51 */ 52 53 /* 54 * Special routines for the Macronix MX 98905. For use with the "ne" driver. 55 */ 56 57 /* 58 * <URL:http://mail-index.netbsd.org/port-arm32/1996/06/23/0005.html>: 59 * There are 2 types of etherh card. One uses the macronics chipset MX98905 60 * and that chipset has a bug in it, in that it the MSB remote dma 61 * register does not work. There is a workaround for this which 62 * should be around soon. In fact, I think only the buffer ram test 63 * ever transfers more than 256 bytes across the dma channel, so diabling 64 * it will make the mx stuff work. 65 */ 66 67 #include <sys/param.h> 68 69 __KERNEL_RCSID(0, "$NetBSD: mx98905.c,v 1.1 2001/12/15 17:47:35 bjh21 Exp $"); 70 71 #include <sys/device.h> 72 #include <sys/mbuf.h> 73 #include <sys/socket.h> 74 #include <sys/syslog.h> 75 #include <sys/systm.h> 76 77 #include <net/if.h> 78 #include <net/if_ether.h> 79 #include <net/if_media.h> 80 81 #include <machine/bus.h> 82 83 #include <dev/ic/dp8390reg.h> 84 #include <dev/ic/dp8390var.h> 85 #include <dev/ic/ne2000reg.h> 86 #include <dev/ic/ne2000var.h> 87 #include <dev/ic/mx98905var.h> 88 89 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 90 #define bus_space_write_stream_2 bus_space_write_2 91 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 92 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 93 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 94 95 void 96 mx98905_attach(struct dp8390_softc *sc) 97 { 98 99 sc->ring_copy = mx98905_ring_copy; 100 sc->write_mbuf = mx98905_write_mbuf; 101 sc->read_hdr = mx98905_read_hdr; 102 } 103 104 static __inline void 105 mx98905_write_setup(sc, len, buf) 106 struct dp8390_softc *sc; 107 int len, buf; 108 { 109 bus_space_tag_t nict = sc->sc_regt; 110 bus_space_handle_t nich = sc->sc_regh; 111 112 /* Select page 0 registers. */ 113 NIC_BARRIER(nict, nich); 114 bus_space_write_1(nict, nich, ED_P0_CR, 115 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 116 NIC_BARRIER(nict, nich); 117 118 /* Reset remote DMA complete flag. */ 119 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 120 NIC_BARRIER(nict, nich); 121 122 /* Set up DMA byte count. */ 123 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 124 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 125 126 /* Set up destination address in NIC mem. */ 127 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 128 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 129 130 /* Set remote DMA write. */ 131 NIC_BARRIER(nict, nich); 132 bus_space_write_1(nict, nich, 133 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 134 NIC_BARRIER(nict, nich); 135 } 136 137 138 static __inline void 139 mx98905_write_wait(sc) 140 struct dp8390_softc *sc; 141 { 142 int maxwait = 100; /* about 120us */ 143 bus_space_tag_t nict = sc->sc_regt; 144 bus_space_handle_t nich = sc->sc_regh; 145 146 /* 147 * Wait for remote DMA to complete. This is necessary because on the 148 * transmit side, data is handled internally by the NIC in bursts, and 149 * we can't start another remote DMA until this one completes. Not 150 * waiting causes really bad things to happen - like the NIC wedging 151 * the bus. 152 */ 153 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 154 ED_ISR_RDC) && --maxwait) { 155 bus_space_read_1(nict, nich, ED_P0_CRDA1); 156 bus_space_read_1(nict, nich, ED_P0_CRDA0); 157 NIC_BARRIER(nict, nich); 158 DELAY(1); 159 } 160 161 if (maxwait == 0) { 162 log(LOG_WARNING, 163 "%s: remote transmit DMA failed to complete\n", 164 sc->sc_dev.dv_xname); 165 dp8390_reset(sc); 166 } 167 } 168 169 /* 170 * Write an mbuf chain to the destination NIC memory address using programmed 171 * I/O. 172 */ 173 int 174 mx98905_write_mbuf(sc, m, buf) 175 struct dp8390_softc *sc; 176 struct mbuf *m; 177 int buf; 178 { 179 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 180 bus_space_tag_t nict = sc->sc_regt; 181 bus_space_handle_t nich = sc->sc_regh; 182 bus_space_tag_t asict = nsc->sc_asict; 183 bus_space_handle_t asich = nsc->sc_asich; 184 int savelen, dmalen, resid, len; 185 u_int8_t *data, savebyte[2]; 186 int l, leftover; 187 #ifdef DIAGNOSTIC 188 u_int8_t *lim; 189 #endif 190 191 resid = savelen = m->m_pkthdr.len; 192 193 dmalen = min(resid, 254); 194 195 mx98905_write_setup(sc, dmalen, buf); 196 197 buf += dmalen; 198 resid -= dmalen; 199 200 /* 201 * Transfer the mbuf chain to the NIC memory. NE2000 cards 202 * require that data be transferred as words, and only words, 203 * so that case requires some extra code to patch over odd-length 204 * mbufs. 205 */ 206 /* NE2000s are a bit trickier. */ 207 /* Start out with no leftover data. */ 208 leftover = 0; 209 savebyte[0] = savebyte[1] = 0; 210 211 for (; m != 0; m = m->m_next) { 212 l = m->m_len; 213 if (l == 0) 214 continue; 215 data = mtod(m, u_int8_t *); 216 #ifdef DIAGNOSTIC 217 lim = data + l; 218 #endif 219 while (l > 0) { 220 if (leftover) { 221 /* 222 * Data left over (from mbuf or 223 * realignment). Buffer the next 224 * byte, and write it and the leftover 225 * data out. 226 */ 227 savebyte[1] = *data++; 228 l--; 229 bus_space_write_stream_2(asict, asich, 230 NE2000_ASIC_DATA, *(u_int16_t *)savebyte); 231 dmalen -= 2; 232 leftover = 0; 233 } else if (BUS_SPACE_ALIGNED_POINTER(data, 234 u_int16_t) == 0) { 235 /* Unaligned data; buffer the next byte. */ 236 savebyte[0] = *data++; 237 l--; 238 leftover = 1; 239 } else { 240 /* 241 * Aligned data; output contiguous 242 * words as much as we can, then 243 * buffer the remaining byte, if any. 244 */ 245 len = min(l, dmalen); 246 leftover = len & 1; 247 len &= ~1; 248 bus_space_write_multi_stream_2(asict, 249 asich, NE2000_ASIC_DATA, 250 (u_int16_t *)data, len >> 1); 251 dmalen -= len; 252 data += len; 253 if (leftover) 254 savebyte[0] = *data++; 255 l -= len + leftover; 256 } 257 if (dmalen == 0 && resid > 0) { 258 mx98905_write_wait(sc); 259 dmalen = min(resid, 254); 260 261 mx98905_write_setup(sc, dmalen, buf); 262 263 buf += dmalen; 264 resid -= dmalen; 265 } 266 } 267 if (l < 0) 268 panic("mx98905_write_mbuf: negative len"); 269 #ifdef DIAGNOSTIC 270 if (data != lim) 271 panic("mx98905_write_mbuf: data != lim"); 272 #endif 273 } 274 if (leftover) { 275 savebyte[1] = 0; 276 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA, 277 *(u_int16_t *)savebyte); 278 } 279 NIC_BARRIER(nict, nich); 280 281 mx98905_write_wait(sc); 282 283 return (savelen); 284 } 285 286 /* 287 * Given a source and destination address, copy 'amout' of a packet from 288 * the ring buffer into a linear destination buffer. Takes into account 289 * ring-wrap. 290 */ 291 int 292 mx98905_ring_copy(sc, src, dst, amount) 293 struct dp8390_softc *sc; 294 int src; 295 caddr_t dst; 296 u_short amount; 297 { 298 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 299 bus_space_tag_t nict = sc->sc_regt; 300 bus_space_handle_t nich = sc->sc_regh; 301 bus_space_tag_t asict = nsc->sc_asict; 302 bus_space_handle_t asich = nsc->sc_asich; 303 u_short tmp_amount; 304 int useword = NE2000_USE_WORD(nsc); 305 306 /* Does copy wrap to lower addr in ring buffer? */ 307 if (src + amount > sc->mem_end) { 308 tmp_amount = sc->mem_end - src; 309 310 /* Copy amount up to end of NIC memory. */ 311 mx98905_readmem(nict, nich, asict, asich, src, 312 (u_int8_t *)dst, tmp_amount, useword); 313 314 amount -= tmp_amount; 315 src = sc->mem_ring; 316 dst += tmp_amount; 317 } 318 319 mx98905_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst, 320 amount, useword); 321 322 return (src + amount); 323 } 324 325 void 326 mx98905_read_hdr(sc, buf, hdr) 327 struct dp8390_softc *sc; 328 int buf; 329 struct dp8390_ring *hdr; 330 { 331 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 332 333 mx98905_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich, 334 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring), 335 NE2000_USE_WORD(nsc)); 336 #if BYTE_ORDER == BIG_ENDIAN 337 hdr->count = bswap16(hdr->count); 338 #endif 339 } 340 341 static __inline void 342 mx98905_read_setup(bus_space_tag_t nict, bus_space_handle_t nich, 343 int len, int buf) 344 { 345 346 /* Select page 0 registers. */ 347 NIC_BARRIER(nict, nich); 348 bus_space_write_1(nict, nich, ED_P0_CR, 349 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 350 NIC_BARRIER(nict, nich); 351 352 /* Set up DMA byte count. */ 353 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 354 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 355 356 /* Set up source address in NIC mem. */ 357 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 358 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 359 360 NIC_BARRIER(nict, nich); 361 bus_space_write_1(nict, nich, ED_P0_CR, 362 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA); 363 364 bus_space_barrier(nict, nich, 0, NE2000_NPORTS, 365 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 366 } 367 368 /* 369 * Given a NIC memory source address and a host memory destination address, 370 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is 371 * rounded up to a word - ok as long as mbufs are word sized. 372 */ 373 void 374 mx98905_readmem(nict, nich, asict, asich, src, dst, amount, useword) 375 bus_space_tag_t nict; 376 bus_space_handle_t nich; 377 bus_space_tag_t asict; 378 bus_space_handle_t asich; 379 int src; 380 u_int8_t *dst; 381 size_t amount; 382 int useword; 383 { 384 int len, resid; 385 386 resid = amount; 387 /* Round up to a word. */ 388 if (resid & 1) 389 ++resid; 390 391 while (resid > 0) { 392 len = min(resid, 254); 393 mx98905_read_setup(nict, nich, len, src); 394 if (useword) 395 bus_space_read_multi_stream_2(asict, asich, 396 NE2000_ASIC_DATA, (u_int16_t *)dst, len >> 1); 397 else 398 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA, 399 dst, len); 400 resid -= len; 401 src += len; 402 dst += len; 403 } 404 } 405
Indexes created Wed Oct 22 06:10:02 GMT 2025